2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <drm/drm_dp_helper.h>
29 #include <linux/dmi.h>
34 #include "intel_bios.h"
36 #define SLAVE_ADDR1 0x70
37 #define SLAVE_ADDR2 0x72
39 static int panel_type;
42 find_section(struct bdb_header *bdb, int section_id)
46 u16 total, current_size;
49 /* skip to first section */
50 index += bdb->header_size;
51 total = bdb->bdb_size;
53 /* walk the sections looking for section_id */
54 while (index < total) {
55 current_id = *(base + index);
57 current_size = *((u16 *)(base + index));
59 if (current_id == section_id)
61 index += current_size;
68 get_blocksize(void *p)
70 u16 *block_ptr, block_size;
72 block_ptr = (u16 *)((char *)p - 2);
73 block_size = *block_ptr;
78 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
79 const struct lvds_dvo_timing *dvo_timing)
81 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
82 dvo_timing->hactive_lo;
83 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
84 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
85 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
86 dvo_timing->hsync_pulse_width;
87 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
88 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
90 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
91 dvo_timing->vactive_lo;
92 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
93 dvo_timing->vsync_off;
94 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
95 dvo_timing->vsync_pulse_width;
96 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
97 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
98 panel_fixed_mode->clock = dvo_timing->clock * 10;
99 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
101 if (dvo_timing->hsync_positive)
102 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
104 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
106 if (dvo_timing->vsync_positive)
107 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
109 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
111 /* Some VBTs have bogus h/vtotal values */
112 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
113 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
114 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
115 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
117 drm_mode_set_name(panel_fixed_mode);
121 lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
122 const struct lvds_dvo_timing *b)
124 if (a->hactive_hi != b->hactive_hi ||
125 a->hactive_lo != b->hactive_lo)
128 if (a->hsync_off_hi != b->hsync_off_hi ||
129 a->hsync_off_lo != b->hsync_off_lo)
132 if (a->hsync_pulse_width != b->hsync_pulse_width)
135 if (a->hblank_hi != b->hblank_hi ||
136 a->hblank_lo != b->hblank_lo)
139 if (a->vactive_hi != b->vactive_hi ||
140 a->vactive_lo != b->vactive_lo)
143 if (a->vsync_off != b->vsync_off)
146 if (a->vsync_pulse_width != b->vsync_pulse_width)
149 if (a->vblank_hi != b->vblank_hi ||
150 a->vblank_lo != b->vblank_lo)
156 static const struct lvds_dvo_timing *
157 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
158 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
162 * the size of fp_timing varies on the different platform.
163 * So calculate the DVO timing relative offset in LVDS data
164 * entry to get the DVO timing entry
168 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
169 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
170 int dvo_timing_offset =
171 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
172 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
173 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
175 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
178 /* Try to find integrated panel data */
180 parse_lfp_panel_data(struct drm_i915_private *dev_priv,
181 struct bdb_header *bdb)
183 const struct bdb_lvds_options *lvds_options;
184 const struct bdb_lvds_lfp_data *lvds_lfp_data;
185 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
186 const struct lvds_dvo_timing *panel_dvo_timing;
187 struct drm_display_mode *panel_fixed_mode;
190 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
194 dev_priv->lvds_dither = lvds_options->pixel_dither;
195 if (lvds_options->panel_type == 0xff)
198 panel_type = lvds_options->panel_type;
200 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
204 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
205 if (!lvds_lfp_data_ptrs)
208 dev_priv->lvds_vbt = 1;
210 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
212 lvds_options->panel_type);
214 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
215 if (!panel_fixed_mode)
218 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
220 dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
222 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
223 drm_mode_debug_printmodeline(panel_fixed_mode);
226 * Iterate over the LVDS panel timing info to find the lowest clock
227 * for the native resolution.
229 downclock = panel_dvo_timing->clock;
230 for (i = 0; i < 16; i++) {
231 const struct lvds_dvo_timing *dvo_timing;
233 dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
236 if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
237 dvo_timing->clock < downclock)
238 downclock = dvo_timing->clock;
241 if (downclock < panel_dvo_timing->clock && i915_lvds_downclock) {
242 dev_priv->lvds_downclock_avail = 1;
243 dev_priv->lvds_downclock = downclock * 10;
244 DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
245 "Normal Clock %dKHz, downclock %dKHz\n",
246 panel_fixed_mode->clock, 10*downclock);
250 /* Try to find sdvo panel data */
252 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
253 struct bdb_header *bdb)
255 struct lvds_dvo_timing *dvo_timing;
256 struct drm_display_mode *panel_fixed_mode;
259 index = i915_vbt_sdvo_panel_type;
261 struct bdb_sdvo_lvds_options *sdvo_lvds_options;
263 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
264 if (!sdvo_lvds_options)
267 index = sdvo_lvds_options->panel_type;
270 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
274 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
275 if (!panel_fixed_mode)
278 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
280 dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode;
282 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
283 drm_mode_debug_printmodeline(panel_fixed_mode);
286 static int intel_bios_ssc_frequency(struct drm_device *dev,
289 switch (INTEL_INFO(dev)->gen) {
291 return alternate ? 66 : 48;
294 return alternate ? 100 : 96;
296 return alternate ? 100 : 120;
301 parse_general_features(struct drm_i915_private *dev_priv,
302 struct bdb_header *bdb)
304 struct drm_device *dev = dev_priv->dev;
305 struct bdb_general_features *general;
307 general = find_section(bdb, BDB_GENERAL_FEATURES);
309 dev_priv->int_tv_support = general->int_tv_support;
310 dev_priv->int_crt_support = general->int_crt_support;
311 dev_priv->lvds_use_ssc = general->enable_ssc;
312 dev_priv->lvds_ssc_freq =
313 intel_bios_ssc_frequency(dev, general->ssc_freq);
314 dev_priv->display_clock_mode = general->display_clock_mode;
315 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d\n",
316 dev_priv->int_tv_support,
317 dev_priv->int_crt_support,
318 dev_priv->lvds_use_ssc,
319 dev_priv->lvds_ssc_freq,
320 dev_priv->display_clock_mode);
325 parse_general_definitions(struct drm_i915_private *dev_priv,
326 struct bdb_header *bdb)
328 struct bdb_general_definitions *general;
330 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
332 u16 block_size = get_blocksize(general);
333 if (block_size >= sizeof(*general)) {
334 int bus_pin = general->crt_ddc_gmbus_pin;
335 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
336 if (intel_gmbus_is_port_valid(bus_pin))
337 dev_priv->crt_ddc_pin = bus_pin;
339 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
346 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
347 struct bdb_header *bdb)
349 struct sdvo_device_mapping *p_mapping;
350 struct bdb_general_definitions *p_defs;
351 struct child_device_config *p_child;
352 int i, child_device_num, count;
355 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
357 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
360 /* judge whether the size of child device meets the requirements.
361 * If the child device size obtained from general definition block
362 * is different with sizeof(struct child_device_config), skip the
363 * parsing of sdvo device info
365 if (p_defs->child_dev_size != sizeof(*p_child)) {
366 /* different child dev size . Ignore it */
367 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
370 /* get the block size of general definitions */
371 block_size = get_blocksize(p_defs);
372 /* get the number of child device */
373 child_device_num = (block_size - sizeof(*p_defs)) /
376 for (i = 0; i < child_device_num; i++) {
377 p_child = &(p_defs->devices[i]);
378 if (!p_child->device_type) {
379 /* skip the device block if device type is invalid */
382 if (p_child->slave_addr != SLAVE_ADDR1 &&
383 p_child->slave_addr != SLAVE_ADDR2) {
385 * If the slave address is neither 0x70 nor 0x72,
386 * it is not a SDVO device. Skip it.
390 if (p_child->dvo_port != DEVICE_PORT_DVOB &&
391 p_child->dvo_port != DEVICE_PORT_DVOC) {
392 /* skip the incorrect SDVO port */
393 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
396 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
399 (p_child->dvo_port == DEVICE_PORT_DVOB) ?
401 p_mapping = &(dev_priv->sdvo_mappings[p_child->dvo_port - 1]);
402 if (!p_mapping->initialized) {
403 p_mapping->dvo_port = p_child->dvo_port;
404 p_mapping->slave_addr = p_child->slave_addr;
405 p_mapping->dvo_wiring = p_child->dvo_wiring;
406 p_mapping->ddc_pin = p_child->ddc_pin;
407 p_mapping->i2c_pin = p_child->i2c_pin;
408 p_mapping->initialized = 1;
409 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
411 p_mapping->slave_addr,
412 p_mapping->dvo_wiring,
416 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
417 "two SDVO device.\n");
419 if (p_child->slave2_addr) {
420 /* Maybe this is a SDVO device with multiple inputs */
421 /* And the mapping info is not added */
422 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
423 " is a SDVO device with multiple inputs.\n");
429 /* No SDVO device info is found */
430 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
436 parse_driver_features(struct drm_i915_private *dev_priv,
437 struct bdb_header *bdb)
439 struct drm_device *dev = dev_priv->dev;
440 struct bdb_driver_features *driver;
442 driver = find_section(bdb, BDB_DRIVER_FEATURES);
446 if (SUPPORTS_EDP(dev) &&
447 driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
448 dev_priv->edp.support = 1;
450 if (driver->dual_frequency)
451 dev_priv->render_reclock_avail = true;
455 parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
458 struct edp_power_seq *edp_pps;
459 struct edp_link_params *edp_link_params;
461 edp = find_section(bdb, BDB_EDP);
463 if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp.support) {
464 DRM_DEBUG_KMS("No eDP BDB found but eDP panel "
465 "supported, assume %dbpp panel color "
472 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
474 dev_priv->edp.bpp = 18;
477 dev_priv->edp.bpp = 24;
480 dev_priv->edp.bpp = 30;
484 /* Get the eDP sequencing and link info */
485 edp_pps = &edp->power_seqs[panel_type];
486 edp_link_params = &edp->link_params[panel_type];
488 dev_priv->edp.pps = *edp_pps;
490 dev_priv->edp.rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
492 switch (edp_link_params->lanes) {
494 dev_priv->edp.lanes = 1;
497 dev_priv->edp.lanes = 2;
501 dev_priv->edp.lanes = 4;
504 switch (edp_link_params->preemphasis) {
506 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
509 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
512 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
515 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
518 switch (edp_link_params->vswing) {
520 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_400;
523 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_600;
526 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_800;
529 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_1200;
535 parse_device_mapping(struct drm_i915_private *dev_priv,
536 struct bdb_header *bdb)
538 struct bdb_general_definitions *p_defs;
539 struct child_device_config *p_child, *child_dev_ptr;
540 int i, child_device_num, count;
543 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
545 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
548 /* judge whether the size of child device meets the requirements.
549 * If the child device size obtained from general definition block
550 * is different with sizeof(struct child_device_config), skip the
551 * parsing of sdvo device info
553 if (p_defs->child_dev_size != sizeof(*p_child)) {
554 /* different child dev size . Ignore it */
555 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
558 /* get the block size of general definitions */
559 block_size = get_blocksize(p_defs);
560 /* get the number of child device */
561 child_device_num = (block_size - sizeof(*p_defs)) /
564 /* get the number of child device that is present */
565 for (i = 0; i < child_device_num; i++) {
566 p_child = &(p_defs->devices[i]);
567 if (!p_child->device_type) {
568 /* skip the device block if device type is invalid */
574 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
577 dev_priv->child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
578 if (!dev_priv->child_dev) {
579 DRM_DEBUG_KMS("No memory space for child device\n");
583 dev_priv->child_dev_num = count;
585 for (i = 0; i < child_device_num; i++) {
586 p_child = &(p_defs->devices[i]);
587 if (!p_child->device_type) {
588 /* skip the device block if device type is invalid */
591 child_dev_ptr = dev_priv->child_dev + count;
593 memcpy((void *)child_dev_ptr, (void *)p_child,
600 init_vbt_defaults(struct drm_i915_private *dev_priv)
602 struct drm_device *dev = dev_priv->dev;
604 dev_priv->crt_ddc_pin = GMBUS_PORT_VGADDC;
607 dev_priv->lvds_dither = 1;
608 dev_priv->lvds_vbt = 0;
610 /* SDVO panel data */
611 dev_priv->sdvo_lvds_vbt_mode = NULL;
613 /* general features */
614 dev_priv->int_tv_support = 1;
615 dev_priv->int_crt_support = 1;
617 /* Default to using SSC */
618 dev_priv->lvds_use_ssc = 1;
620 /* Core/SandyBridge/IvyBridge use 120MHz reference clock for LVDS */
621 if (HAS_PCH_SPLIT(dev))
622 dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 0);
624 dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
625 DRM_DEBUG("Set default to SSC at %dMHz\n", dev_priv->lvds_ssc_freq);
628 dev_priv->edp.bpp = 18;
631 static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
633 DRM_DEBUG_KMS("Falling back to manually reading VBT from "
634 "VBIOS ROM for %s\n",
639 static const struct dmi_system_id intel_no_opregion_vbt[] = {
641 .callback = intel_no_opregion_vbt_callback,
642 .ident = "ThinkCentre A57",
644 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
645 DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
652 * intel_parse_bios - find VBT and initialize settings from the BIOS
655 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
656 * to appropriate values.
658 * Returns 0 on success, nonzero on failure.
661 intel_parse_bios(struct drm_device *dev)
663 struct drm_i915_private *dev_priv = dev->dev_private;
664 struct pci_dev *pdev = dev->pdev;
665 struct bdb_header *bdb = NULL;
666 u8 __iomem *bios = NULL;
668 init_vbt_defaults(dev_priv);
670 /* XXX Should this validation be moved to intel_opregion.c? */
671 if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) {
672 struct vbt_header *vbt = dev_priv->opregion.vbt;
673 if (memcmp(vbt->signature, "$VBT", 4) == 0) {
674 DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n",
676 bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset);
678 dev_priv->opregion.vbt = NULL;
682 struct vbt_header *vbt = NULL;
686 bios = pci_map_rom(pdev, &size);
690 /* Scour memory looking for the VBT signature */
691 for (i = 0; i + 4 < size; i++) {
692 if (!memcmp(bios + i, "$VBT", 4)) {
693 vbt = (struct vbt_header *)(bios + i);
699 DRM_DEBUG_DRIVER("VBT signature missing\n");
700 pci_unmap_rom(pdev, bios);
704 bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset);
707 /* Grab useful general definitions */
708 parse_general_features(dev_priv, bdb);
709 parse_general_definitions(dev_priv, bdb);
710 parse_lfp_panel_data(dev_priv, bdb);
711 parse_sdvo_panel_data(dev_priv, bdb);
712 parse_sdvo_device_mapping(dev_priv, bdb);
713 parse_device_mapping(dev_priv, bdb);
714 parse_driver_features(dev_priv, bdb);
715 parse_edp(dev_priv, bdb);
718 pci_unmap_rom(pdev, bios);
723 /* Ensure that vital registers have been initialised, even if the BIOS
724 * is absent or just failing to do its job.
726 void intel_setup_bios(struct drm_device *dev)
728 struct drm_i915_private *dev_priv = dev->dev_private;
730 /* Set the Panel Power On/Off timings if uninitialized. */
731 if ((I915_READ(PP_ON_DELAYS) == 0) && (I915_READ(PP_OFF_DELAYS) == 0)) {
732 /* Set T2 to 40ms and T5 to 200ms */
733 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
735 /* Set T3 to 35ms and Tx to 200ms */
736 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);