2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_crtc_helper.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
39 /* Here's the desired hotplug mode */
40 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
41 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
42 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
43 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
44 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
45 ADPA_CRT_HOTPLUG_ENABLE)
48 struct intel_encoder base;
49 /* DPMS state is stored in the connector, which we need in the
50 * encoder's enable/disable callbacks */
51 struct intel_connector *connector;
52 bool force_hotplug_required;
56 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
58 return container_of(encoder, struct intel_crt, base);
61 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
63 return intel_encoder_to_crt(intel_attached_encoder(connector));
66 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
69 struct drm_device *dev = encoder->base.dev;
70 struct drm_i915_private *dev_priv = to_i915(dev);
71 struct intel_crt *crt = intel_encoder_to_crt(encoder);
72 enum intel_display_power_domain power_domain;
76 power_domain = intel_display_port_power_domain(encoder);
77 if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
82 tmp = I915_READ(crt->adpa_reg);
84 if (!(tmp & ADPA_DAC_ENABLE))
88 *pipe = PORT_TO_PIPE_CPT(tmp);
90 *pipe = PORT_TO_PIPE(tmp);
94 intel_display_power_put(dev_priv, power_domain);
99 static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
101 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
102 struct intel_crt *crt = intel_encoder_to_crt(encoder);
105 tmp = I915_READ(crt->adpa_reg);
107 if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
108 flags |= DRM_MODE_FLAG_PHSYNC;
110 flags |= DRM_MODE_FLAG_NHSYNC;
112 if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
113 flags |= DRM_MODE_FLAG_PVSYNC;
115 flags |= DRM_MODE_FLAG_NVSYNC;
120 static void intel_crt_get_config(struct intel_encoder *encoder,
121 struct intel_crtc_state *pipe_config)
123 pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
125 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
128 static void hsw_crt_get_config(struct intel_encoder *encoder,
129 struct intel_crtc_state *pipe_config)
131 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
133 intel_ddi_get_config(encoder, pipe_config);
135 pipe_config->base.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
136 DRM_MODE_FLAG_NHSYNC |
137 DRM_MODE_FLAG_PVSYNC |
138 DRM_MODE_FLAG_NVSYNC);
139 pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
141 pipe_config->base.adjusted_mode.crtc_clock = lpt_get_iclkip(dev_priv);
144 /* Note: The caller is required to filter out dpms modes not supported by the
146 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
148 struct drm_device *dev = encoder->base.dev;
149 struct drm_i915_private *dev_priv = to_i915(dev);
150 struct intel_crt *crt = intel_encoder_to_crt(encoder);
151 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
152 const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
155 if (INTEL_INFO(dev)->gen >= 5)
156 adpa = ADPA_HOTPLUG_BITS;
160 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
161 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
162 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
163 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
165 /* For CPT allow 3 pipe config, for others just use A or B */
166 if (HAS_PCH_LPT(dev))
167 ; /* Those bits don't exist here */
168 else if (HAS_PCH_CPT(dev))
169 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
170 else if (crtc->pipe == 0)
171 adpa |= ADPA_PIPE_A_SELECT;
173 adpa |= ADPA_PIPE_B_SELECT;
175 if (!HAS_PCH_SPLIT(dev))
176 I915_WRITE(BCLRPAT(crtc->pipe), 0);
179 case DRM_MODE_DPMS_ON:
180 adpa |= ADPA_DAC_ENABLE;
182 case DRM_MODE_DPMS_STANDBY:
183 adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
185 case DRM_MODE_DPMS_SUSPEND:
186 adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
188 case DRM_MODE_DPMS_OFF:
189 adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
193 I915_WRITE(crt->adpa_reg, adpa);
196 static void intel_disable_crt(struct intel_encoder *encoder)
198 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
201 static void pch_disable_crt(struct intel_encoder *encoder)
205 static void pch_post_disable_crt(struct intel_encoder *encoder)
207 intel_disable_crt(encoder);
210 static void intel_enable_crt(struct intel_encoder *encoder)
212 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_ON);
215 static enum drm_mode_status
216 intel_crt_mode_valid(struct drm_connector *connector,
217 struct drm_display_mode *mode)
219 struct drm_device *dev = connector->dev;
220 int max_dotclk = to_i915(dev)->max_dotclk_freq;
223 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
224 return MODE_NO_DBLESCAN;
226 if (mode->clock < 25000)
227 return MODE_CLOCK_LOW;
229 if (HAS_PCH_LPT(dev))
231 else if (IS_VALLEYVIEW(dev))
233 * 270 MHz due to current DPLL limits,
234 * DAC limit supposedly 355 MHz.
237 else if (IS_GEN3(dev) || IS_GEN4(dev))
241 if (mode->clock > max_clock)
242 return MODE_CLOCK_HIGH;
244 if (mode->clock > max_dotclk)
245 return MODE_CLOCK_HIGH;
247 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
248 if (HAS_PCH_LPT(dev) &&
249 (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
250 return MODE_CLOCK_HIGH;
255 static bool intel_crt_compute_config(struct intel_encoder *encoder,
256 struct intel_crtc_state *pipe_config)
258 struct drm_device *dev = encoder->base.dev;
260 if (HAS_PCH_SPLIT(dev))
261 pipe_config->has_pch_encoder = true;
263 /* LPT FDI RX only supports 8bpc. */
264 if (HAS_PCH_LPT(dev)) {
265 if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) {
266 DRM_DEBUG_KMS("LPT only supports 24bpp\n");
270 pipe_config->pipe_bpp = 24;
273 /* FDI must always be 2.7 GHz */
275 pipe_config->port_clock = 135000 * 2;
280 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
282 struct drm_device *dev = connector->dev;
283 struct intel_crt *crt = intel_attached_crt(connector);
284 struct drm_i915_private *dev_priv = to_i915(dev);
288 /* The first time through, trigger an explicit detection cycle */
289 if (crt->force_hotplug_required) {
290 bool turn_off_dac = HAS_PCH_SPLIT(dev);
293 crt->force_hotplug_required = 0;
295 save_adpa = adpa = I915_READ(crt->adpa_reg);
296 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
298 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
300 adpa &= ~ADPA_DAC_ENABLE;
302 I915_WRITE(crt->adpa_reg, adpa);
304 if (intel_wait_for_register(dev_priv,
306 ADPA_CRT_HOTPLUG_FORCE_TRIGGER, 0,
308 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
311 I915_WRITE(crt->adpa_reg, save_adpa);
312 POSTING_READ(crt->adpa_reg);
316 /* Check the status to see if both blue and green are on now */
317 adpa = I915_READ(crt->adpa_reg);
318 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
322 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
327 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
329 struct drm_device *dev = connector->dev;
330 struct intel_crt *crt = intel_attached_crt(connector);
331 struct drm_i915_private *dev_priv = to_i915(dev);
336 save_adpa = adpa = I915_READ(crt->adpa_reg);
337 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
339 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
341 I915_WRITE(crt->adpa_reg, adpa);
343 if (intel_wait_for_register(dev_priv,
345 ADPA_CRT_HOTPLUG_FORCE_TRIGGER, 0,
347 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
348 I915_WRITE(crt->adpa_reg, save_adpa);
351 /* Check the status to see if both blue and green are on now */
352 adpa = I915_READ(crt->adpa_reg);
353 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
358 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
364 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
366 * Not for i915G/i915GM
368 * \return true if CRT is connected.
369 * \return false if CRT is disconnected.
371 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
373 struct drm_device *dev = connector->dev;
374 struct drm_i915_private *dev_priv = to_i915(dev);
379 if (HAS_PCH_SPLIT(dev))
380 return intel_ironlake_crt_detect_hotplug(connector);
382 if (IS_VALLEYVIEW(dev))
383 return valleyview_crt_detect_hotplug(connector);
386 * On 4 series desktop, CRT detect sequence need to be done twice
387 * to get a reliable result.
390 if (IS_G4X(dev) && !IS_GM45(dev))
395 for (i = 0; i < tries ; i++) {
396 /* turn on the FORCE_DETECT */
397 i915_hotplug_interrupt_update(dev_priv,
398 CRT_HOTPLUG_FORCE_DETECT,
399 CRT_HOTPLUG_FORCE_DETECT);
400 /* wait for FORCE_DETECT to go off */
401 if (intel_wait_for_register(dev_priv, PORT_HOTPLUG_EN,
402 CRT_HOTPLUG_FORCE_DETECT, 0,
404 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
407 stat = I915_READ(PORT_HOTPLUG_STAT);
408 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
411 /* clear the interrupt we just generated, if any */
412 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
414 i915_hotplug_interrupt_update(dev_priv, CRT_HOTPLUG_FORCE_DETECT, 0);
419 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
420 struct i2c_adapter *i2c)
424 edid = drm_get_edid(connector, i2c);
426 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
427 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
428 intel_gmbus_force_bit(i2c, true);
429 edid = drm_get_edid(connector, i2c);
430 intel_gmbus_force_bit(i2c, false);
436 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
437 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
438 struct i2c_adapter *adapter)
443 edid = intel_crt_get_edid(connector, adapter);
447 ret = intel_connector_update_modes(connector, edid);
453 static bool intel_crt_detect_ddc(struct drm_connector *connector)
455 struct intel_crt *crt = intel_attached_crt(connector);
456 struct drm_i915_private *dev_priv = to_i915(crt->base.base.dev);
458 struct i2c_adapter *i2c;
460 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
462 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
463 edid = intel_crt_get_edid(connector, i2c);
466 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
469 * This may be a DVI-I connector with a shared DDC
470 * link between analog and digital outputs, so we
471 * have to check the EDID input spec of the attached device.
474 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
478 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
480 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
488 static enum drm_connector_status
489 intel_crt_load_detect(struct intel_crt *crt, uint32_t pipe)
491 struct drm_device *dev = crt->base.base.dev;
492 struct drm_i915_private *dev_priv = to_i915(dev);
493 uint32_t save_bclrpat;
494 uint32_t save_vtotal;
495 uint32_t vtotal, vactive;
497 uint32_t vblank, vblank_start, vblank_end;
499 i915_reg_t bclrpat_reg, vtotal_reg,
500 vblank_reg, vsync_reg, pipeconf_reg, pipe_dsl_reg;
502 enum drm_connector_status status;
504 DRM_DEBUG_KMS("starting load-detect on CRT\n");
506 bclrpat_reg = BCLRPAT(pipe);
507 vtotal_reg = VTOTAL(pipe);
508 vblank_reg = VBLANK(pipe);
509 vsync_reg = VSYNC(pipe);
510 pipeconf_reg = PIPECONF(pipe);
511 pipe_dsl_reg = PIPEDSL(pipe);
513 save_bclrpat = I915_READ(bclrpat_reg);
514 save_vtotal = I915_READ(vtotal_reg);
515 vblank = I915_READ(vblank_reg);
517 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
518 vactive = (save_vtotal & 0x7ff) + 1;
520 vblank_start = (vblank & 0xfff) + 1;
521 vblank_end = ((vblank >> 16) & 0xfff) + 1;
523 /* Set the border color to purple. */
524 I915_WRITE(bclrpat_reg, 0x500050);
527 uint32_t pipeconf = I915_READ(pipeconf_reg);
528 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
529 POSTING_READ(pipeconf_reg);
530 /* Wait for next Vblank to substitue
531 * border color for Color info */
532 intel_wait_for_vblank(dev, pipe);
533 st00 = I915_READ8(_VGA_MSR_WRITE);
534 status = ((st00 & (1 << 4)) != 0) ?
535 connector_status_connected :
536 connector_status_disconnected;
538 I915_WRITE(pipeconf_reg, pipeconf);
540 bool restore_vblank = false;
544 * If there isn't any border, add some.
545 * Yes, this will flicker
547 if (vblank_start <= vactive && vblank_end >= vtotal) {
548 uint32_t vsync = I915_READ(vsync_reg);
549 uint32_t vsync_start = (vsync & 0xffff) + 1;
551 vblank_start = vsync_start;
552 I915_WRITE(vblank_reg,
554 ((vblank_end - 1) << 16));
555 restore_vblank = true;
557 /* sample in the vertical border, selecting the larger one */
558 if (vblank_start - vactive >= vtotal - vblank_end)
559 vsample = (vblank_start + vactive) >> 1;
561 vsample = (vtotal + vblank_end) >> 1;
564 * Wait for the border to be displayed
566 while (I915_READ(pipe_dsl_reg) >= vactive)
568 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
571 * Watch ST00 for an entire scanline
577 /* Read the ST00 VGA status register */
578 st00 = I915_READ8(_VGA_MSR_WRITE);
581 } while ((I915_READ(pipe_dsl_reg) == dsl));
583 /* restore vblank if necessary */
585 I915_WRITE(vblank_reg, vblank);
587 * If more than 3/4 of the scanline detected a monitor,
588 * then it is assumed to be present. This works even on i830,
589 * where there isn't any way to force the border color across
592 status = detect * 4 > count * 3 ?
593 connector_status_connected :
594 connector_status_disconnected;
597 /* Restore previous settings */
598 I915_WRITE(bclrpat_reg, save_bclrpat);
603 static enum drm_connector_status
604 intel_crt_detect(struct drm_connector *connector, bool force)
606 struct drm_device *dev = connector->dev;
607 struct drm_i915_private *dev_priv = to_i915(dev);
608 struct intel_crt *crt = intel_attached_crt(connector);
609 struct intel_encoder *intel_encoder = &crt->base;
610 enum intel_display_power_domain power_domain;
611 enum drm_connector_status status;
612 struct intel_load_detect_pipe tmp;
613 struct drm_modeset_acquire_ctx ctx;
615 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
616 connector->base.id, connector->name,
619 power_domain = intel_display_port_power_domain(intel_encoder);
620 intel_display_power_get(dev_priv, power_domain);
622 if (I915_HAS_HOTPLUG(dev)) {
623 /* We can not rely on the HPD pin always being correctly wired
624 * up, for example many KVM do not pass it through, and so
625 * only trust an assertion that the monitor is connected.
627 if (intel_crt_detect_hotplug(connector)) {
628 DRM_DEBUG_KMS("CRT detected via hotplug\n");
629 status = connector_status_connected;
632 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
635 if (intel_crt_detect_ddc(connector)) {
636 status = connector_status_connected;
640 /* Load detection is broken on HPD capable machines. Whoever wants a
641 * broken monitor (without edid) to work behind a broken kvm (that fails
642 * to have the right resistors for HP detection) needs to fix this up.
643 * For now just bail out. */
644 if (I915_HAS_HOTPLUG(dev) && !i915.load_detect_test) {
645 status = connector_status_disconnected;
650 status = connector->status;
654 drm_modeset_acquire_init(&ctx, 0);
656 /* for pre-945g platforms use load detect */
657 if (intel_get_load_detect_pipe(connector, NULL, &tmp, &ctx)) {
658 if (intel_crt_detect_ddc(connector))
659 status = connector_status_connected;
660 else if (INTEL_INFO(dev)->gen < 4)
661 status = intel_crt_load_detect(crt,
662 to_intel_crtc(connector->state->crtc)->pipe);
663 else if (i915.load_detect_test)
664 status = connector_status_disconnected;
666 status = connector_status_unknown;
667 intel_release_load_detect_pipe(connector, &tmp, &ctx);
669 status = connector_status_unknown;
671 drm_modeset_drop_locks(&ctx);
672 drm_modeset_acquire_fini(&ctx);
675 intel_display_power_put(dev_priv, power_domain);
679 static void intel_crt_destroy(struct drm_connector *connector)
681 drm_connector_cleanup(connector);
685 static int intel_crt_get_modes(struct drm_connector *connector)
687 struct drm_device *dev = connector->dev;
688 struct drm_i915_private *dev_priv = to_i915(dev);
689 struct intel_crt *crt = intel_attached_crt(connector);
690 struct intel_encoder *intel_encoder = &crt->base;
691 enum intel_display_power_domain power_domain;
693 struct i2c_adapter *i2c;
695 power_domain = intel_display_port_power_domain(intel_encoder);
696 intel_display_power_get(dev_priv, power_domain);
698 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
699 ret = intel_crt_ddc_get_modes(connector, i2c);
700 if (ret || !IS_G4X(dev))
703 /* Try to probe digital port for output in DVI-I -> VGA mode. */
704 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPB);
705 ret = intel_crt_ddc_get_modes(connector, i2c);
708 intel_display_power_put(dev_priv, power_domain);
713 static int intel_crt_set_property(struct drm_connector *connector,
714 struct drm_property *property,
720 static void intel_crt_reset(struct drm_connector *connector)
722 struct drm_device *dev = connector->dev;
723 struct drm_i915_private *dev_priv = to_i915(dev);
724 struct intel_crt *crt = intel_attached_crt(connector);
726 if (INTEL_INFO(dev)->gen >= 5) {
729 adpa = I915_READ(crt->adpa_reg);
730 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
731 adpa |= ADPA_HOTPLUG_BITS;
732 I915_WRITE(crt->adpa_reg, adpa);
733 POSTING_READ(crt->adpa_reg);
735 DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);
736 crt->force_hotplug_required = 1;
742 * Routines for controlling stuff on the analog port
745 static const struct drm_connector_funcs intel_crt_connector_funcs = {
746 .reset = intel_crt_reset,
747 .dpms = drm_atomic_helper_connector_dpms,
748 .detect = intel_crt_detect,
749 .fill_modes = drm_helper_probe_single_connector_modes,
750 .late_register = intel_connector_register,
751 .early_unregister = intel_connector_unregister,
752 .destroy = intel_crt_destroy,
753 .set_property = intel_crt_set_property,
754 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
755 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
756 .atomic_get_property = intel_connector_atomic_get_property,
759 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
760 .mode_valid = intel_crt_mode_valid,
761 .get_modes = intel_crt_get_modes,
764 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
765 .destroy = intel_encoder_destroy,
768 static int intel_no_crt_dmi_callback(const struct dmi_system_id *id)
770 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
774 static const struct dmi_system_id intel_no_crt[] = {
776 .callback = intel_no_crt_dmi_callback,
779 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
780 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
784 .callback = intel_no_crt_dmi_callback,
785 .ident = "DELL XPS 8700",
787 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
788 DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
794 void intel_crt_init(struct drm_device *dev)
796 struct drm_connector *connector;
797 struct intel_crt *crt;
798 struct intel_connector *intel_connector;
799 struct drm_i915_private *dev_priv = to_i915(dev);
803 /* Skip machines without VGA that falsely report hotplug events */
804 if (dmi_check_system(intel_no_crt))
807 if (HAS_PCH_SPLIT(dev))
809 else if (IS_VALLEYVIEW(dev))
814 adpa = I915_READ(adpa_reg);
815 if ((adpa & ADPA_DAC_ENABLE) == 0) {
817 * On some machines (some IVB at least) CRT can be
818 * fused off, but there's no known fuse bit to
819 * indicate that. On these machine the ADPA register
820 * works normally, except the DAC enable bit won't
821 * take. So the only way to tell is attempt to enable
822 * it and see what happens.
824 I915_WRITE(adpa_reg, adpa | ADPA_DAC_ENABLE |
825 ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
826 if ((I915_READ(adpa_reg) & ADPA_DAC_ENABLE) == 0)
828 I915_WRITE(adpa_reg, adpa);
831 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
835 intel_connector = intel_connector_alloc();
836 if (!intel_connector) {
841 connector = &intel_connector->base;
842 crt->connector = intel_connector;
843 drm_connector_init(dev, &intel_connector->base,
844 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
846 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
847 DRM_MODE_ENCODER_DAC, "CRT");
849 intel_connector_attach_encoder(intel_connector, &crt->base);
851 crt->base.type = INTEL_OUTPUT_ANALOG;
852 crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
854 crt->base.crtc_mask = (1 << 0);
856 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
859 connector->interlace_allowed = 0;
861 connector->interlace_allowed = 1;
862 connector->doublescan_allowed = 0;
864 crt->adpa_reg = adpa_reg;
866 crt->base.compute_config = intel_crt_compute_config;
867 if (HAS_PCH_SPLIT(dev)) {
868 crt->base.disable = pch_disable_crt;
869 crt->base.post_disable = pch_post_disable_crt;
871 crt->base.disable = intel_disable_crt;
873 crt->base.enable = intel_enable_crt;
874 if (I915_HAS_HOTPLUG(dev))
875 crt->base.hpd_pin = HPD_CRT;
877 crt->base.get_config = hsw_crt_get_config;
878 crt->base.get_hw_state = intel_ddi_get_hw_state;
880 crt->base.get_config = intel_crt_get_config;
881 crt->base.get_hw_state = intel_crt_get_hw_state;
883 intel_connector->get_hw_state = intel_connector_get_hw_state;
885 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
887 if (!I915_HAS_HOTPLUG(dev))
888 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
891 * Configure the automatic hotplug detection stuff
893 crt->force_hotplug_required = 0;
896 * TODO: find a proper way to discover whether we need to set the the
897 * polarity and link reversal bits or not, instead of relying on the
900 if (HAS_PCH_LPT(dev)) {
901 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
902 FDI_RX_LINK_REVERSAL_OVERRIDE;
904 dev_priv->fdi_rx_config = I915_READ(FDI_RX_CTL(PIPE_A)) & fdi_config;
907 intel_crt_reset(connector);