drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include <linux/vga_switcheroo.h>
  35 #include <drm/drmP.h>
  36 #include <drm/drm_atomic_helper.h>
  37 #include <drm/drm_crtc.h>
  38 #include <drm/drm_edid.h>
  39 #include "intel_drv.h"
  40 #include <drm/i915_drm.h>
  41 #include "i915_drv.h"
  42 #include <linux/acpi.h>
  43
  44 /* Private structure for the integrated LVDS support */
  45 struct intel_lvds_connector {
  46         struct intel_connector base;
  47
  48         struct notifier_block lid_notifier;
  49 };
  50
  51 struct intel_lvds_pps {
  52         /* 100us units */
  53         int t1_t2;
  54         int t3;
  55         int t4;
  56         int t5;
  57         int tx;
  58
  59         int divider;
  60
  61         int port;
  62         bool powerdown_on_reset;
  63 };
  64
  65 struct intel_lvds_encoder {
  66         struct intel_encoder base;
  67
  68         bool is_dual_link;
  69         i915_reg_t reg;
  70         u32 a3_power;
  71
  72         struct intel_lvds_pps init_pps;
  73         u32 init_lvds_val;
  74
  75         struct intel_lvds_connector *attached_connector;
  76 };
  77
  78 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  79 {
  80         return container_of(encoder, struct intel_lvds_encoder, base.base);
  81 }
  82
  83 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  84 {
  85         return container_of(connector, struct intel_lvds_connector, base.base);
  86 }
  87
  88 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  89                                     enum pipe *pipe)
  90 {
  91         struct drm_device *dev = encoder->base.dev;
  92         struct drm_i915_private *dev_priv = to_i915(dev);
  93         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  94         enum intel_display_power_domain power_domain;
  95         u32 tmp;
  96         bool ret;
  97
  98         power_domain = intel_display_port_power_domain(encoder);
  99         if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
 100                 return false;
 101
 102         ret = false;
 103
 104         tmp = I915_READ(lvds_encoder->reg);
 105
 106         if (!(tmp & LVDS_PORT_EN))
 107                 goto out;
 108
 109         if (HAS_PCH_CPT(dev))
 110                 *pipe = PORT_TO_PIPE_CPT(tmp);
 111         else
 112                 *pipe = PORT_TO_PIPE(tmp);
 113
 114         ret = true;
 115
 116 out:
 117         intel_display_power_put(dev_priv, power_domain);
 118
 119         return ret;
 120 }
 121
 122 static void intel_lvds_get_config(struct intel_encoder *encoder,
 123                                   struct intel_crtc_state *pipe_config)
 124 {
 125         struct drm_device *dev = encoder->base.dev;
 126         struct drm_i915_private *dev_priv = to_i915(dev);
 127         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 128         u32 tmp, flags = 0;
 129
 130         tmp = I915_READ(lvds_encoder->reg);
 131         if (tmp & LVDS_HSYNC_POLARITY)
 132                 flags |= DRM_MODE_FLAG_NHSYNC;
 133         else
 134                 flags |= DRM_MODE_FLAG_PHSYNC;
 135         if (tmp & LVDS_VSYNC_POLARITY)
 136                 flags |= DRM_MODE_FLAG_NVSYNC;
 137         else
 138                 flags |= DRM_MODE_FLAG_PVSYNC;
 139
 140         pipe_config->base.adjusted_mode.flags |= flags;
 141
 142         if (INTEL_INFO(dev)->gen < 5)
 143                 pipe_config->gmch_pfit.lvds_border_bits =
 144                         tmp & LVDS_BORDER_ENABLE;
 145
 146         /* gen2/3 store dither state in pfit control, needs to match */
 147         if (INTEL_INFO(dev)->gen < 4) {
 148                 tmp = I915_READ(PFIT_CONTROL);
 149
 150                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
 151         }
 152
 153         pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 154 }
 155
 156 static void intel_lvds_pps_get_hw_state(struct drm_i915_private *dev_priv,
 157                                         struct intel_lvds_pps *pps)
 158 {
 159         u32 val;
 160
 161         pps->powerdown_on_reset = I915_READ(PP_CONTROL(0)) & PANEL_POWER_RESET;
 162
 163         val = I915_READ(PP_ON_DELAYS(0));
 164         pps->port = (val & PANEL_PORT_SELECT_MASK) >>
 165                     PANEL_PORT_SELECT_SHIFT;
 166         pps->t1_t2 = (val & PANEL_POWER_UP_DELAY_MASK) >>
 167                      PANEL_POWER_UP_DELAY_SHIFT;
 168         pps->t5 = (val & PANEL_LIGHT_ON_DELAY_MASK) >>
 169                   PANEL_LIGHT_ON_DELAY_SHIFT;
 170
 171         val = I915_READ(PP_OFF_DELAYS(0));
 172         pps->t3 = (val & PANEL_POWER_DOWN_DELAY_MASK) >>
 173                   PANEL_POWER_DOWN_DELAY_SHIFT;
 174         pps->tx = (val & PANEL_LIGHT_OFF_DELAY_MASK) >>
 175                   PANEL_LIGHT_OFF_DELAY_SHIFT;
 176
 177         val = I915_READ(PP_DIVISOR(0));
 178         pps->divider = (val & PP_REFERENCE_DIVIDER_MASK) >>
 179                        PP_REFERENCE_DIVIDER_SHIFT;
 180         val = (val & PANEL_POWER_CYCLE_DELAY_MASK) >>
 181               PANEL_POWER_CYCLE_DELAY_SHIFT;
 182         /*
 183          * Remove the BSpec specified +1 (100ms) offset that accounts for a
 184          * too short power-cycle delay due to the asynchronous programming of
 185          * the register.
 186          */
 187         if (val)
 188                 val--;
 189         /* Convert from 100ms to 100us units */
 190         pps->t4 = val * 1000;
 191
 192         if (INTEL_INFO(dev_priv)->gen <= 4 &&
 193             pps->t1_t2 == 0 && pps->t5 == 0 && pps->t3 == 0 && pps->tx == 0) {
 194                 DRM_DEBUG_KMS("Panel power timings uninitialized, "
 195                               "setting defaults\n");
 196                 /* Set T2 to 40ms and T5 to 200ms in 100 usec units */
 197                 pps->t1_t2 = 40 * 10;
 198                 pps->t5 = 200 * 10;
 199                 /* Set T3 to 35ms and Tx to 200ms in 100 usec units */
 200                 pps->t3 = 35 * 10;
 201                 pps->tx = 200 * 10;
 202         }
 203
 204         DRM_DEBUG_DRIVER("LVDS PPS:t1+t2 %d t3 %d t4 %d t5 %d tx %d "
 205                          "divider %d port %d powerdown_on_reset %d\n",
 206                          pps->t1_t2, pps->t3, pps->t4, pps->t5, pps->tx,
 207                          pps->divider, pps->port, pps->powerdown_on_reset);
 208 }
 209
 210 static void intel_lvds_pps_init_hw(struct drm_i915_private *dev_priv,
 211                                    struct intel_lvds_pps *pps)
 212 {
 213         u32 val;
 214
 215         val = I915_READ(PP_CONTROL(0));
 216         WARN_ON((val & PANEL_UNLOCK_MASK) != PANEL_UNLOCK_REGS);
 217         if (pps->powerdown_on_reset)
 218                 val |= PANEL_POWER_RESET;
 219         I915_WRITE(PP_CONTROL(0), val);
 220
 221         I915_WRITE(PP_ON_DELAYS(0), (pps->port << PANEL_PORT_SELECT_SHIFT) |
 222                                     (pps->t1_t2 << PANEL_POWER_UP_DELAY_SHIFT) |
 223                                     (pps->t5 << PANEL_LIGHT_ON_DELAY_SHIFT));
 224         I915_WRITE(PP_OFF_DELAYS(0), (pps->t3 << PANEL_POWER_DOWN_DELAY_SHIFT) |
 225                                      (pps->tx << PANEL_LIGHT_OFF_DELAY_SHIFT));
 226
 227         val = pps->divider << PP_REFERENCE_DIVIDER_SHIFT;
 228         val |= (DIV_ROUND_UP(pps->t4, 1000) + 1) <<
 229                PANEL_POWER_CYCLE_DELAY_SHIFT;
 230         I915_WRITE(PP_DIVISOR(0), val);
 231 }
 232
 233 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
 234 {
 235         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 236         struct drm_device *dev = encoder->base.dev;
 237         struct drm_i915_private *dev_priv = to_i915(dev);
 238         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 239         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 240         int pipe = crtc->pipe;
 241         u32 temp;
 242
 243         if (HAS_PCH_SPLIT(dev)) {
 244                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
 245                 assert_shared_dpll_disabled(dev_priv,
 246                                             crtc->config->shared_dpll);
 247         } else {
 248                 assert_pll_disabled(dev_priv, pipe);
 249         }
 250
 251         intel_lvds_pps_init_hw(dev_priv, &lvds_encoder->init_pps);
 252
 253         temp = lvds_encoder->init_lvds_val;
 254         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 255
 256         if (HAS_PCH_CPT(dev)) {
 257                 temp &= ~PORT_TRANS_SEL_MASK;
 258                 temp |= PORT_TRANS_SEL_CPT(pipe);
 259         } else {
 260                 if (pipe == 1) {
 261                         temp |= LVDS_PIPEB_SELECT;
 262                 } else {
 263                         temp &= ~LVDS_PIPEB_SELECT;
 264                 }
 265         }
 266
 267         /* set the corresponsding LVDS_BORDER bit */
 268         temp &= ~LVDS_BORDER_ENABLE;
 269         temp |= crtc->config->gmch_pfit.lvds_border_bits;
 270         /* Set the B0-B3 data pairs corresponding to whether we're going to
 271          * set the DPLLs for dual-channel mode or not.
 272          */
 273         if (lvds_encoder->is_dual_link)
 274                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 275         else
 276                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 277
 278         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 279          * appropriately here, but we need to look more thoroughly into how
 280          * panels behave in the two modes. For now, let's just maintain the
 281          * value we got from the BIOS.
 282          */
 283         temp &= ~LVDS_A3_POWER_MASK;
 284         temp |= lvds_encoder->a3_power;
 285
 286         /* Set the dithering flag on LVDS as needed, note that there is no
 287          * special lvds dither control bit on pch-split platforms, dithering is
 288          * only controlled through the PIPECONF reg. */
 289         if (IS_GEN4(dev_priv)) {
 290                 /* Bspec wording suggests that LVDS port dithering only exists
 291                  * for 18bpp panels. */
 292                 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
 293                         temp |= LVDS_ENABLE_DITHER;
 294                 else
 295                         temp &= ~LVDS_ENABLE_DITHER;
 296         }
 297         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 298         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 299                 temp |= LVDS_HSYNC_POLARITY;
 300         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 301                 temp |= LVDS_VSYNC_POLARITY;
 302
 303         I915_WRITE(lvds_encoder->reg, temp);
 304 }
 305
 306 /**
 307  * Sets the power state for the panel.
 308  */
 309 static void intel_enable_lvds(struct intel_encoder *encoder)
 310 {
 311         struct drm_device *dev = encoder->base.dev;
 312         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 313         struct intel_connector *intel_connector =
 314                 &lvds_encoder->attached_connector->base;
 315         struct drm_i915_private *dev_priv = to_i915(dev);
 316
 317         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 318
 319         I915_WRITE(PP_CONTROL(0), I915_READ(PP_CONTROL(0)) | PANEL_POWER_ON);
 320         POSTING_READ(lvds_encoder->reg);
 321         if (intel_wait_for_register(dev_priv, PP_STATUS(0), PP_ON, PP_ON, 1000))
 322                 DRM_ERROR("timed out waiting for panel to power on\n");
 323
 324         intel_panel_enable_backlight(intel_connector);
 325 }
 326
 327 static void intel_disable_lvds(struct intel_encoder *encoder)
 328 {
 329         struct drm_device *dev = encoder->base.dev;
 330         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 331         struct drm_i915_private *dev_priv = to_i915(dev);
 332
 333         I915_WRITE(PP_CONTROL(0), I915_READ(PP_CONTROL(0)) & ~PANEL_POWER_ON);
 334         if (intel_wait_for_register(dev_priv, PP_STATUS(0), PP_ON, 0, 1000))
 335                 DRM_ERROR("timed out waiting for panel to power off\n");
 336
 337         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 338         POSTING_READ(lvds_encoder->reg);
 339 }
 340
 341 static void gmch_disable_lvds(struct intel_encoder *encoder)
 342 {
 343         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 344         struct intel_connector *intel_connector =
 345                 &lvds_encoder->attached_connector->base;
 346
 347         intel_panel_disable_backlight(intel_connector);
 348
 349         intel_disable_lvds(encoder);
 350 }
 351
 352 static void pch_disable_lvds(struct intel_encoder *encoder)
 353 {
 354         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 355         struct intel_connector *intel_connector =
 356                 &lvds_encoder->attached_connector->base;
 357
 358         intel_panel_disable_backlight(intel_connector);
 359 }
 360
 361 static void pch_post_disable_lvds(struct intel_encoder *encoder)
 362 {
 363         intel_disable_lvds(encoder);
 364 }
 365
 366 static enum drm_mode_status
 367 intel_lvds_mode_valid(struct drm_connector *connector,
 368                       struct drm_display_mode *mode)
 369 {
 370         struct intel_connector *intel_connector = to_intel_connector(connector);
 371         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 372         int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
 373
 374         if (mode->hdisplay > fixed_mode->hdisplay)
 375                 return MODE_PANEL;
 376         if (mode->vdisplay > fixed_mode->vdisplay)
 377                 return MODE_PANEL;
 378         if (fixed_mode->clock > max_pixclk)
 379                 return MODE_CLOCK_HIGH;
 380
 381         return MODE_OK;
 382 }
 383
 384 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 385                                       struct intel_crtc_state *pipe_config)
 386 {
 387         struct drm_device *dev = intel_encoder->base.dev;
 388         struct intel_lvds_encoder *lvds_encoder =
 389                 to_lvds_encoder(&intel_encoder->base);
 390         struct intel_connector *intel_connector =
 391                 &lvds_encoder->attached_connector->base;
 392         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 393         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
 394         unsigned int lvds_bpp;
 395
 396         /* Should never happen!! */
 397         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 398                 DRM_ERROR("Can't support LVDS on pipe A\n");
 399                 return false;
 400         }
 401
 402         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
 403                 lvds_bpp = 8*3;
 404         else
 405                 lvds_bpp = 6*3;
 406
 407         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 408                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 409                               pipe_config->pipe_bpp, lvds_bpp);
 410                 pipe_config->pipe_bpp = lvds_bpp;
 411         }
 412
 413         /*
 414          * We have timings from the BIOS for the panel, put them in
 415          * to the adjusted mode.  The CRTC will be set up for this mode,
 416          * with the panel scaling set up to source from the H/VDisplay
 417          * of the original mode.
 418          */
 419         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 420                                adjusted_mode);
 421
 422         if (HAS_PCH_SPLIT(dev)) {
 423                 pipe_config->has_pch_encoder = true;
 424
 425                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 426                                         intel_connector->panel.fitting_mode);
 427         } else {
 428                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 429                                          intel_connector->panel.fitting_mode);
 430
 431         }
 432
 433         /*
 434          * XXX: It would be nice to support lower refresh rates on the
 435          * panels to reduce power consumption, and perhaps match the
 436          * user's requested refresh rate.
 437          */
 438
 439         return true;
 440 }
 441
 442 /**
 443  * Detect the LVDS connection.
 444  *
 445  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 446  * connected and closed means disconnected.  We also send hotplug events as
 447  * needed, using lid status notification from the input layer.
 448  */
 449 static enum drm_connector_status
 450 intel_lvds_detect(struct drm_connector *connector, bool force)
 451 {
 452         struct drm_device *dev = connector->dev;
 453         enum drm_connector_status status;
 454
 455         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 456                       connector->base.id, connector->name);
 457
 458         status = intel_panel_detect(dev);
 459         if (status != connector_status_unknown)
 460                 return status;
 461
 462         return connector_status_connected;
 463 }
 464
 465 /**
 466  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 467  */
 468 static int intel_lvds_get_modes(struct drm_connector *connector)
 469 {
 470         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 471         struct drm_device *dev = connector->dev;
 472         struct drm_display_mode *mode;
 473
 474         /* use cached edid if we have one */
 475         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 476                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 477
 478         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 479         if (mode == NULL)
 480                 return 0;
 481
 482         drm_mode_probed_add(connector, mode);
 483         return 1;
 484 }
 485
 486 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 487 {
 488         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 489         return 1;
 490 }
 491
 492 /* The GPU hangs up on these systems if modeset is performed on LID open */
 493 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 494         {
 495                 .callback = intel_no_modeset_on_lid_dmi_callback,
 496                 .ident = "Toshiba Tecra A11",
 497                 .matches = {
 498                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 499                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 500                 },
 501         },
 502
 503         { }     /* terminating entry */
 504 };
 505
 506 /*
 507  * Lid events. Note the use of 'modeset':
 508  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 509  *    and set it to MODESET_DONE on open
 510  *  - we use it as a "only once" bit (ie we ignore
 511  *    duplicate events where it was already properly set)
 512  *  - the suspend/resume paths will set it to
 513  *    MODESET_SUSPENDED and ignore the lid open event,
 514  *    because they restore the mode ("lid open").
 515  */
 516 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 517                             void *unused)
 518 {
 519         struct intel_lvds_connector *lvds_connector =
 520                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 521         struct drm_connector *connector = &lvds_connector->base.base;
 522         struct drm_device *dev = connector->dev;
 523         struct drm_i915_private *dev_priv = to_i915(dev);
 524
 525         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 526                 return NOTIFY_OK;
 527
 528         mutex_lock(&dev_priv->modeset_restore_lock);
 529         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 530                 goto exit;
 531         /*
 532          * check and update the status of LVDS connector after receiving
 533          * the LID nofication event.
 534          */
 535         connector->status = connector->funcs->detect(connector, false);
 536
 537         /* Don't force modeset on machines where it causes a GPU lockup */
 538         if (dmi_check_system(intel_no_modeset_on_lid))
 539                 goto exit;
 540         if (!acpi_lid_open()) {
 541                 /* do modeset on next lid open event */
 542                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 543                 goto exit;
 544         }
 545
 546         if (dev_priv->modeset_restore == MODESET_DONE)
 547                 goto exit;
 548
 549         /*
 550          * Some old platform's BIOS love to wreak havoc while the lid is closed.
 551          * We try to detect this here and undo any damage. The split for PCH
 552          * platforms is rather conservative and a bit arbitrary expect that on
 553          * those platforms VGA disabling requires actual legacy VGA I/O access,
 554          * and as part of the cleanup in the hw state restore we also redisable
 555          * the vga plane.
 556          */
 557         if (!HAS_PCH_SPLIT(dev))
 558                 intel_display_resume(dev);
 559
 560         dev_priv->modeset_restore = MODESET_DONE;
 561
 562 exit:
 563         mutex_unlock(&dev_priv->modeset_restore_lock);
 564         return NOTIFY_OK;
 565 }
 566
 567 /**
 568  * intel_lvds_destroy - unregister and free LVDS structures
 569  * @connector: connector to free
 570  *
 571  * Unregister the DDC bus for this connector then free the driver private
 572  * structure.
 573  */
 574 static void intel_lvds_destroy(struct drm_connector *connector)
 575 {
 576         struct intel_lvds_connector *lvds_connector =
 577                 to_lvds_connector(connector);
 578
 579         if (lvds_connector->lid_notifier.notifier_call)
 580                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 581
 582         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 583                 kfree(lvds_connector->base.edid);
 584
 585         intel_panel_fini(&lvds_connector->base.panel);
 586
 587         drm_connector_cleanup(connector);
 588         kfree(connector);
 589 }
 590
 591 static int intel_lvds_set_property(struct drm_connector *connector,
 592                                    struct drm_property *property,
 593                                    uint64_t value)
 594 {
 595         struct intel_connector *intel_connector = to_intel_connector(connector);
 596         struct drm_device *dev = connector->dev;
 597
 598         if (property == dev->mode_config.scaling_mode_property) {
 599                 struct drm_crtc *crtc;
 600
 601                 if (value == DRM_MODE_SCALE_NONE) {
 602                         DRM_DEBUG_KMS("no scaling not supported\n");
 603                         return -EINVAL;
 604                 }
 605
 606                 if (intel_connector->panel.fitting_mode == value) {
 607                         /* the LVDS scaling property is not changed */
 608                         return 0;
 609                 }
 610                 intel_connector->panel.fitting_mode = value;
 611
 612                 crtc = intel_attached_encoder(connector)->base.crtc;
 613                 if (crtc && crtc->state->enable) {
 614                         /*
 615                          * If the CRTC is enabled, the display will be changed
 616                          * according to the new panel fitting mode.
 617                          */
 618                         intel_crtc_restore_mode(crtc);
 619                 }
 620         }
 621
 622         return 0;
 623 }
 624
 625 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 626         .get_modes = intel_lvds_get_modes,
 627         .mode_valid = intel_lvds_mode_valid,
 628 };
 629
 630 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 631         .dpms = drm_atomic_helper_connector_dpms,
 632         .detect = intel_lvds_detect,
 633         .fill_modes = drm_helper_probe_single_connector_modes,
 634         .set_property = intel_lvds_set_property,
 635         .atomic_get_property = intel_connector_atomic_get_property,
 636         .late_register = intel_connector_register,
 637         .early_unregister = intel_connector_unregister,
 638         .destroy = intel_lvds_destroy,
 639         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 640         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 641 };
 642
 643 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 644         .destroy = intel_encoder_destroy,
 645 };
 646
 647 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 648 {
 649         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 650         return 1;
 651 }
 652
 653 /* These systems claim to have LVDS, but really don't */
 654 static const struct dmi_system_id intel_no_lvds[] = {
 655         {
 656                 .callback = intel_no_lvds_dmi_callback,
 657                 .ident = "Apple Mac Mini (Core series)",
 658                 .matches = {
 659                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 660                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 661                 },
 662         },
 663         {
 664                 .callback = intel_no_lvds_dmi_callback,
 665                 .ident = "Apple Mac Mini (Core 2 series)",
 666                 .matches = {
 667                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 668                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 669                 },
 670         },
 671         {
 672                 .callback = intel_no_lvds_dmi_callback,
 673                 .ident = "MSI IM-945GSE-A",
 674                 .matches = {
 675                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 676                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 677                 },
 678         },
 679         {
 680                 .callback = intel_no_lvds_dmi_callback,
 681                 .ident = "Dell Studio Hybrid",
 682                 .matches = {
 683                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 684                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 685                 },
 686         },
 687         {
 688                 .callback = intel_no_lvds_dmi_callback,
 689                 .ident = "Dell OptiPlex FX170",
 690                 .matches = {
 691                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 692                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 693                 },
 694         },
 695         {
 696                 .callback = intel_no_lvds_dmi_callback,
 697                 .ident = "AOpen Mini PC",
 698                 .matches = {
 699                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 700                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 701                 },
 702         },
 703         {
 704                 .callback = intel_no_lvds_dmi_callback,
 705                 .ident = "AOpen Mini PC MP915",
 706                 .matches = {
 707                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 708                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 709                 },
 710         },
 711         {
 712                 .callback = intel_no_lvds_dmi_callback,
 713                 .ident = "AOpen i915GMm-HFS",
 714                 .matches = {
 715                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 716                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 717                 },
 718         },
 719         {
 720                 .callback = intel_no_lvds_dmi_callback,
 721                 .ident = "AOpen i45GMx-I",
 722                 .matches = {
 723                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 724                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 725                 },
 726         },
 727         {
 728                 .callback = intel_no_lvds_dmi_callback,
 729                 .ident = "Aopen i945GTt-VFA",
 730                 .matches = {
 731                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 732                 },
 733         },
 734         {
 735                 .callback = intel_no_lvds_dmi_callback,
 736                 .ident = "Clientron U800",
 737                 .matches = {
 738                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 739                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 740                 },
 741         },
 742         {
 743                 .callback = intel_no_lvds_dmi_callback,
 744                 .ident = "Clientron E830",
 745                 .matches = {
 746                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 747                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 748                 },
 749         },
 750         {
 751                 .callback = intel_no_lvds_dmi_callback,
 752                 .ident = "Asus EeeBox PC EB1007",
 753                 .matches = {
 754                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 755                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 756                 },
 757         },
 758         {
 759                 .callback = intel_no_lvds_dmi_callback,
 760                 .ident = "Asus AT5NM10T-I",
 761                 .matches = {
 762                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 763                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 764                 },
 765         },
 766         {
 767                 .callback = intel_no_lvds_dmi_callback,
 768                 .ident = "Hewlett-Packard HP t5740",
 769                 .matches = {
 770                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 771                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 772                 },
 773         },
 774         {
 775                 .callback = intel_no_lvds_dmi_callback,
 776                 .ident = "Hewlett-Packard t5745",
 777                 .matches = {
 778                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 779                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 780                 },
 781         },
 782         {
 783                 .callback = intel_no_lvds_dmi_callback,
 784                 .ident = "Hewlett-Packard st5747",
 785                 .matches = {
 786                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 787                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 788                 },
 789         },
 790         {
 791                 .callback = intel_no_lvds_dmi_callback,
 792                 .ident = "MSI Wind Box DC500",
 793                 .matches = {
 794                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 795                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 796                 },
 797         },
 798         {
 799                 .callback = intel_no_lvds_dmi_callback,
 800                 .ident = "Gigabyte GA-D525TUD",
 801                 .matches = {
 802                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 803                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 804                 },
 805         },
 806         {
 807                 .callback = intel_no_lvds_dmi_callback,
 808                 .ident = "Supermicro X7SPA-H",
 809                 .matches = {
 810                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 811                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 812                 },
 813         },
 814         {
 815                 .callback = intel_no_lvds_dmi_callback,
 816                 .ident = "Fujitsu Esprimo Q900",
 817                 .matches = {
 818                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 819                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 820                 },
 821         },
 822         {
 823                 .callback = intel_no_lvds_dmi_callback,
 824                 .ident = "Intel D410PT",
 825                 .matches = {
 826                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 827                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
 828                 },
 829         },
 830         {
 831                 .callback = intel_no_lvds_dmi_callback,
 832                 .ident = "Intel D425KT",
 833                 .matches = {
 834                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 835                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
 836                 },
 837         },
 838         {
 839                 .callback = intel_no_lvds_dmi_callback,
 840                 .ident = "Intel D510MO",
 841                 .matches = {
 842                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 843                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 844                 },
 845         },
 846         {
 847                 .callback = intel_no_lvds_dmi_callback,
 848                 .ident = "Intel D525MW",
 849                 .matches = {
 850                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 851                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 852                 },
 853         },
 854
 855         { }     /* terminating entry */
 856 };
 857
 858 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 859 {
 860         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 861         return 1;
 862 }
 863
 864 static const struct dmi_system_id intel_dual_link_lvds[] = {
 865         {
 866                 .callback = intel_dual_link_lvds_callback,
 867                 .ident = "Apple MacBook Pro 15\" (2010)",
 868                 .matches = {
 869                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 870                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
 871                 },
 872         },
 873         {
 874                 .callback = intel_dual_link_lvds_callback,
 875                 .ident = "Apple MacBook Pro 15\" (2011)",
 876                 .matches = {
 877                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 878                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 879                 },
 880         },
 881         {
 882                 .callback = intel_dual_link_lvds_callback,
 883                 .ident = "Apple MacBook Pro 15\" (2012)",
 884                 .matches = {
 885                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 886                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
 887                 },
 888         },
 889         { }     /* terminating entry */
 890 };
 891
 892 struct intel_encoder *intel_get_lvds_encoder(struct drm_device *dev)
 893 {
 894         struct intel_encoder *intel_encoder;
 895
 896         for_each_intel_encoder(dev, intel_encoder)
 897                 if (intel_encoder->type == INTEL_OUTPUT_LVDS)
 898                         return intel_encoder;
 899
 900         return NULL;
 901 }
 902
 903 bool intel_is_dual_link_lvds(struct drm_device *dev)
 904 {
 905         struct intel_encoder *encoder = intel_get_lvds_encoder(dev);
 906
 907         return encoder && to_lvds_encoder(&encoder->base)->is_dual_link;
 908 }
 909
 910 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 911 {
 912         struct drm_device *dev = lvds_encoder->base.base.dev;
 913         unsigned int val;
 914         struct drm_i915_private *dev_priv = to_i915(dev);
 915
 916         /* use the module option value if specified */
 917         if (i915.lvds_channel_mode > 0)
 918                 return i915.lvds_channel_mode == 2;
 919
 920         /* single channel LVDS is limited to 112 MHz */
 921         if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
 922             > 112999)
 923                 return true;
 924
 925         if (dmi_check_system(intel_dual_link_lvds))
 926                 return true;
 927
 928         /* BIOS should set the proper LVDS register value at boot, but
 929          * in reality, it doesn't set the value when the lid is closed;
 930          * we need to check "the value to be set" in VBT when LVDS
 931          * register is uninitialized.
 932          */
 933         val = I915_READ(lvds_encoder->reg);
 934         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 935                 val = dev_priv->vbt.bios_lvds_val;
 936
 937         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 938 }
 939
 940 static bool intel_lvds_supported(struct drm_device *dev)
 941 {
 942         /* With the introduction of the PCH we gained a dedicated
 943          * LVDS presence pin, use it. */
 944         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
 945                 return true;
 946
 947         /* Otherwise LVDS was only attached to mobile products,
 948          * except for the inglorious 830gm */
 949         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
 950                 return true;
 951
 952         return false;
 953 }
 954
 955 /**
 956  * intel_lvds_init - setup LVDS connectors on this device
 957  * @dev: drm device
 958  *
 959  * Create the connector, register the LVDS DDC bus, and try to figure out what
 960  * modes we can display on the LVDS panel (if present).
 961  */
 962 void intel_lvds_init(struct drm_device *dev)
 963 {
 964         struct drm_i915_private *dev_priv = to_i915(dev);
 965         struct intel_lvds_encoder *lvds_encoder;
 966         struct intel_encoder *intel_encoder;
 967         struct intel_lvds_connector *lvds_connector;
 968         struct intel_connector *intel_connector;
 969         struct drm_connector *connector;
 970         struct drm_encoder *encoder;
 971         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 972         struct drm_display_mode *fixed_mode = NULL;
 973         struct drm_display_mode *downclock_mode = NULL;
 974         struct edid *edid;
 975         struct drm_crtc *crtc;
 976         i915_reg_t lvds_reg;
 977         u32 lvds;
 978         int pipe;
 979         u8 pin;
 980
 981         if (!intel_lvds_supported(dev))
 982                 return;
 983
 984         /* Skip init on machines we know falsely report LVDS */
 985         if (dmi_check_system(intel_no_lvds))
 986                 return;
 987
 988         if (HAS_PCH_SPLIT(dev))
 989                 lvds_reg = PCH_LVDS;
 990         else
 991                 lvds_reg = LVDS;
 992
 993         lvds = I915_READ(lvds_reg);
 994
 995         if (HAS_PCH_SPLIT(dev)) {
 996                 if ((lvds & LVDS_DETECTED) == 0)
 997                         return;
 998                 if (dev_priv->vbt.edp.support) {
 999                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
1000                         return;
1001                 }
1002         }
1003
1004         pin = GMBUS_PIN_PANEL;
1005         if (!intel_bios_is_lvds_present(dev_priv, &pin)) {
1006                 if ((lvds & LVDS_PORT_EN) == 0) {
1007                         DRM_DEBUG_KMS("LVDS is not present in VBT\n");
1008                         return;
1009                 }
1010                 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
1011         }
1012
1013         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
1014         if (!lvds_encoder)
1015                 return;
1016
1017         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
1018         if (!lvds_connector) {
1019                 kfree(lvds_encoder);
1020                 return;
1021         }
1022
1023         if (intel_connector_init(&lvds_connector->base) < 0) {
1024                 kfree(lvds_connector);
1025                 kfree(lvds_encoder);
1026                 return;
1027         }
1028
1029         lvds_encoder->attached_connector = lvds_connector;
1030
1031         intel_encoder = &lvds_encoder->base;
1032         encoder = &intel_encoder->base;
1033         intel_connector = &lvds_connector->base;
1034         connector = &intel_connector->base;
1035         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
1036                            DRM_MODE_CONNECTOR_LVDS);
1037
1038         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
1039                          DRM_MODE_ENCODER_LVDS, "LVDS");
1040
1041         intel_encoder->enable = intel_enable_lvds;
1042         intel_encoder->pre_enable = intel_pre_enable_lvds;
1043         intel_encoder->compute_config = intel_lvds_compute_config;
1044         if (HAS_PCH_SPLIT(dev_priv)) {
1045                 intel_encoder->disable = pch_disable_lvds;
1046                 intel_encoder->post_disable = pch_post_disable_lvds;
1047         } else {
1048                 intel_encoder->disable = gmch_disable_lvds;
1049         }
1050         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
1051         intel_encoder->get_config = intel_lvds_get_config;
1052         intel_connector->get_hw_state = intel_connector_get_hw_state;
1053
1054         intel_connector_attach_encoder(intel_connector, intel_encoder);
1055         intel_encoder->type = INTEL_OUTPUT_LVDS;
1056
1057         intel_encoder->cloneable = 0;
1058         if (HAS_PCH_SPLIT(dev))
1059                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1060         else if (IS_GEN4(dev))
1061                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1062         else
1063                 intel_encoder->crtc_mask = (1 << 1);
1064
1065         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1066         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1067         connector->interlace_allowed = false;
1068         connector->doublescan_allowed = false;
1069
1070         lvds_encoder->reg = lvds_reg;
1071
1072         /* create the scaling mode property */
1073         drm_mode_create_scaling_mode_property(dev);
1074         drm_object_attach_property(&connector->base,
1075                                       dev->mode_config.scaling_mode_property,
1076                                       DRM_MODE_SCALE_ASPECT);
1077         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1078
1079         intel_lvds_pps_get_hw_state(dev_priv, &lvds_encoder->init_pps);
1080         lvds_encoder->init_lvds_val = lvds;
1081
1082         /*
1083          * LVDS discovery:
1084          * 1) check for EDID on DDC
1085          * 2) check for VBT data
1086          * 3) check to see if LVDS is already on
1087          *    if none of the above, no panel
1088          * 4) make sure lid is open
1089          *    if closed, act like it's not there for now
1090          */
1091
1092         /*
1093          * Attempt to get the fixed panel mode from DDC.  Assume that the
1094          * preferred mode is the right one.
1095          */
1096         mutex_lock(&dev->mode_config.mutex);
1097         if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC)
1098                 edid = drm_get_edid_switcheroo(connector,
1099                                     intel_gmbus_get_adapter(dev_priv, pin));
1100         else
1101                 edid = drm_get_edid(connector,
1102                                     intel_gmbus_get_adapter(dev_priv, pin));
1103         if (edid) {
1104                 if (drm_add_edid_modes(connector, edid)) {
1105                         drm_mode_connector_update_edid_property(connector,
1106                                                                 edid);
1107                 } else {
1108                         kfree(edid);
1109                         edid = ERR_PTR(-EINVAL);
1110                 }
1111         } else {
1112                 edid = ERR_PTR(-ENOENT);
1113         }
1114         lvds_connector->base.edid = edid;
1115
1116         list_for_each_entry(scan, &connector->probed_modes, head) {
1117                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1118                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1119                         drm_mode_debug_printmodeline(scan);
1120
1121                         fixed_mode = drm_mode_duplicate(dev, scan);
1122                         if (fixed_mode)
1123                                 goto out;
1124                 }
1125         }
1126
1127         /* Failed to get EDID, what about VBT? */
1128         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1129                 DRM_DEBUG_KMS("using mode from VBT: ");
1130                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1131
1132                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1133                 if (fixed_mode) {
1134                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1135                         connector->display_info.width_mm = fixed_mode->width_mm;
1136                         connector->display_info.height_mm = fixed_mode->height_mm;
1137                         goto out;
1138                 }
1139         }
1140
1141         /*
1142          * If we didn't get EDID, try checking if the panel is already turned
1143          * on.  If so, assume that whatever is currently programmed is the
1144          * correct mode.
1145          */
1146
1147         /* Ironlake: FIXME if still fail, not try pipe mode now */
1148         if (HAS_PCH_SPLIT(dev))
1149                 goto failed;
1150
1151         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1152         crtc = intel_get_crtc_for_pipe(dev, pipe);
1153
1154         if (crtc && (lvds & LVDS_PORT_EN)) {
1155                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1156                 if (fixed_mode) {
1157                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1158                         drm_mode_debug_printmodeline(fixed_mode);
1159                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1160                         goto out;
1161                 }
1162         }
1163
1164         /* If we still don't have a mode after all that, give up. */
1165         if (!fixed_mode)
1166                 goto failed;
1167
1168 out:
1169         mutex_unlock(&dev->mode_config.mutex);
1170
1171         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1172         intel_panel_setup_backlight(connector, INVALID_PIPE);
1173
1174         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1175         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1176                       lvds_encoder->is_dual_link ? "dual" : "single");
1177
1178         lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK;
1179
1180         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1181         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1182                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1183                 lvds_connector->lid_notifier.notifier_call = NULL;
1184         }
1185
1186         return;
1187
1188 failed:
1189         mutex_unlock(&dev->mode_config.mutex);
1190
1191         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1192         drm_connector_cleanup(connector);
1193         drm_encoder_cleanup(encoder);
1194         kfree(lvds_encoder);
1195         kfree(lvds_connector);
1196         return;
1197 }