drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include <linux/vga_switcheroo.h>
  35 #include <drm/drmP.h>
  36 #include <drm/drm_atomic_helper.h>
  37 #include <drm/drm_crtc.h>
  38 #include <drm/drm_edid.h>
  39 #include "intel_drv.h"
  40 #include <drm/i915_drm.h>
  41 #include "i915_drv.h"
  42 #include <linux/acpi.h>
  43
  44 /* Private structure for the integrated LVDS support */
  45 struct intel_lvds_connector {
  46         struct intel_connector base;
  47
  48         struct notifier_block lid_notifier;
  49 };
  50
  51 struct intel_lvds_encoder {
  52         struct intel_encoder base;
  53
  54         bool is_dual_link;
  55         i915_reg_t reg;
  56         u32 a3_power;
  57
  58         struct intel_lvds_connector *attached_connector;
  59 };
  60
  61 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  62 {
  63         return container_of(encoder, struct intel_lvds_encoder, base.base);
  64 }
  65
  66 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  67 {
  68         return container_of(connector, struct intel_lvds_connector, base.base);
  69 }
  70
  71 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  72                                     enum pipe *pipe)
  73 {
  74         struct drm_device *dev = encoder->base.dev;
  75         struct drm_i915_private *dev_priv = dev->dev_private;
  76         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  77         enum intel_display_power_domain power_domain;
  78         u32 tmp;
  79         bool ret;
  80
  81         power_domain = intel_display_port_power_domain(encoder);
  82         if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
  83                 return false;
  84
  85         ret = false;
  86
  87         tmp = I915_READ(lvds_encoder->reg);
  88
  89         if (!(tmp & LVDS_PORT_EN))
  90                 goto out;
  91
  92         if (HAS_PCH_CPT(dev))
  93                 *pipe = PORT_TO_PIPE_CPT(tmp);
  94         else
  95                 *pipe = PORT_TO_PIPE(tmp);
  96
  97         ret = true;
  98
  99 out:
 100         intel_display_power_put(dev_priv, power_domain);
 101
 102         return ret;
 103 }
 104
 105 static void intel_lvds_get_config(struct intel_encoder *encoder,
 106                                   struct intel_crtc_state *pipe_config)
 107 {
 108         struct drm_device *dev = encoder->base.dev;
 109         struct drm_i915_private *dev_priv = dev->dev_private;
 110         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 111         u32 tmp, flags = 0;
 112
 113         tmp = I915_READ(lvds_encoder->reg);
 114         if (tmp & LVDS_HSYNC_POLARITY)
 115                 flags |= DRM_MODE_FLAG_NHSYNC;
 116         else
 117                 flags |= DRM_MODE_FLAG_PHSYNC;
 118         if (tmp & LVDS_VSYNC_POLARITY)
 119                 flags |= DRM_MODE_FLAG_NVSYNC;
 120         else
 121                 flags |= DRM_MODE_FLAG_PVSYNC;
 122
 123         pipe_config->base.adjusted_mode.flags |= flags;
 124
 125         if (INTEL_INFO(dev)->gen < 5)
 126                 pipe_config->gmch_pfit.lvds_border_bits =
 127                         tmp & LVDS_BORDER_ENABLE;
 128
 129         /* gen2/3 store dither state in pfit control, needs to match */
 130         if (INTEL_INFO(dev)->gen < 4) {
 131                 tmp = I915_READ(PFIT_CONTROL);
 132
 133                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
 134         }
 135
 136         pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 137 }
 138
 139 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
 140 {
 141         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 142         struct drm_device *dev = encoder->base.dev;
 143         struct drm_i915_private *dev_priv = dev->dev_private;
 144         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 145         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 146         int pipe = crtc->pipe;
 147         u32 temp;
 148
 149         if (HAS_PCH_SPLIT(dev)) {
 150                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
 151                 assert_shared_dpll_disabled(dev_priv,
 152                                             crtc->config->shared_dpll);
 153         } else {
 154                 assert_pll_disabled(dev_priv, pipe);
 155         }
 156
 157         temp = I915_READ(lvds_encoder->reg);
 158         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 159
 160         if (HAS_PCH_CPT(dev)) {
 161                 temp &= ~PORT_TRANS_SEL_MASK;
 162                 temp |= PORT_TRANS_SEL_CPT(pipe);
 163         } else {
 164                 if (pipe == 1) {
 165                         temp |= LVDS_PIPEB_SELECT;
 166                 } else {
 167                         temp &= ~LVDS_PIPEB_SELECT;
 168                 }
 169         }
 170
 171         /* set the corresponsding LVDS_BORDER bit */
 172         temp &= ~LVDS_BORDER_ENABLE;
 173         temp |= crtc->config->gmch_pfit.lvds_border_bits;
 174         /* Set the B0-B3 data pairs corresponding to whether we're going to
 175          * set the DPLLs for dual-channel mode or not.
 176          */
 177         if (lvds_encoder->is_dual_link)
 178                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 179         else
 180                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 181
 182         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 183          * appropriately here, but we need to look more thoroughly into how
 184          * panels behave in the two modes. For now, let's just maintain the
 185          * value we got from the BIOS.
 186          */
 187          temp &= ~LVDS_A3_POWER_MASK;
 188          temp |= lvds_encoder->a3_power;
 189
 190         /* Set the dithering flag on LVDS as needed, note that there is no
 191          * special lvds dither control bit on pch-split platforms, dithering is
 192          * only controlled through the PIPECONF reg. */
 193         if (IS_GEN4(dev_priv)) {
 194                 /* Bspec wording suggests that LVDS port dithering only exists
 195                  * for 18bpp panels. */
 196                 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
 197                         temp |= LVDS_ENABLE_DITHER;
 198                 else
 199                         temp &= ~LVDS_ENABLE_DITHER;
 200         }
 201         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 202         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 203                 temp |= LVDS_HSYNC_POLARITY;
 204         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 205                 temp |= LVDS_VSYNC_POLARITY;
 206
 207         I915_WRITE(lvds_encoder->reg, temp);
 208 }
 209
 210 /**
 211  * Sets the power state for the panel.
 212  */
 213 static void intel_enable_lvds(struct intel_encoder *encoder)
 214 {
 215         struct drm_device *dev = encoder->base.dev;
 216         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 217         struct intel_connector *intel_connector =
 218                 &lvds_encoder->attached_connector->base;
 219         struct drm_i915_private *dev_priv = dev->dev_private;
 220         i915_reg_t ctl_reg, stat_reg;
 221
 222         if (HAS_PCH_SPLIT(dev)) {
 223                 ctl_reg = PCH_PP_CONTROL;
 224                 stat_reg = PCH_PP_STATUS;
 225         } else {
 226                 ctl_reg = PP_CONTROL;
 227                 stat_reg = PP_STATUS;
 228         }
 229
 230         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 231
 232         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 233         POSTING_READ(lvds_encoder->reg);
 234         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 235                 DRM_ERROR("timed out waiting for panel to power on\n");
 236
 237         intel_panel_enable_backlight(intel_connector);
 238 }
 239
 240 static void intel_disable_lvds(struct intel_encoder *encoder)
 241 {
 242         struct drm_device *dev = encoder->base.dev;
 243         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 244         struct drm_i915_private *dev_priv = dev->dev_private;
 245         i915_reg_t ctl_reg, stat_reg;
 246
 247         if (HAS_PCH_SPLIT(dev)) {
 248                 ctl_reg = PCH_PP_CONTROL;
 249                 stat_reg = PCH_PP_STATUS;
 250         } else {
 251                 ctl_reg = PP_CONTROL;
 252                 stat_reg = PP_STATUS;
 253         }
 254
 255         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 256         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 257                 DRM_ERROR("timed out waiting for panel to power off\n");
 258
 259         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 260         POSTING_READ(lvds_encoder->reg);
 261 }
 262
 263 static void gmch_disable_lvds(struct intel_encoder *encoder)
 264 {
 265         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 266         struct intel_connector *intel_connector =
 267                 &lvds_encoder->attached_connector->base;
 268
 269         intel_panel_disable_backlight(intel_connector);
 270
 271         intel_disable_lvds(encoder);
 272 }
 273
 274 static void pch_disable_lvds(struct intel_encoder *encoder)
 275 {
 276         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 277         struct intel_connector *intel_connector =
 278                 &lvds_encoder->attached_connector->base;
 279
 280         intel_panel_disable_backlight(intel_connector);
 281 }
 282
 283 static void pch_post_disable_lvds(struct intel_encoder *encoder)
 284 {
 285         intel_disable_lvds(encoder);
 286 }
 287
 288 static enum drm_mode_status
 289 intel_lvds_mode_valid(struct drm_connector *connector,
 290                       struct drm_display_mode *mode)
 291 {
 292         struct intel_connector *intel_connector = to_intel_connector(connector);
 293         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 294         int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
 295
 296         if (mode->hdisplay > fixed_mode->hdisplay)
 297                 return MODE_PANEL;
 298         if (mode->vdisplay > fixed_mode->vdisplay)
 299                 return MODE_PANEL;
 300         if (fixed_mode->clock > max_pixclk)
 301                 return MODE_CLOCK_HIGH;
 302
 303         return MODE_OK;
 304 }
 305
 306 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 307                                       struct intel_crtc_state *pipe_config)
 308 {
 309         struct drm_device *dev = intel_encoder->base.dev;
 310         struct intel_lvds_encoder *lvds_encoder =
 311                 to_lvds_encoder(&intel_encoder->base);
 312         struct intel_connector *intel_connector =
 313                 &lvds_encoder->attached_connector->base;
 314         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 315         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
 316         unsigned int lvds_bpp;
 317
 318         /* Should never happen!! */
 319         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 320                 DRM_ERROR("Can't support LVDS on pipe A\n");
 321                 return false;
 322         }
 323
 324         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
 325                 lvds_bpp = 8*3;
 326         else
 327                 lvds_bpp = 6*3;
 328
 329         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 330                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 331                               pipe_config->pipe_bpp, lvds_bpp);
 332                 pipe_config->pipe_bpp = lvds_bpp;
 333         }
 334
 335         /*
 336          * We have timings from the BIOS for the panel, put them in
 337          * to the adjusted mode.  The CRTC will be set up for this mode,
 338          * with the panel scaling set up to source from the H/VDisplay
 339          * of the original mode.
 340          */
 341         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 342                                adjusted_mode);
 343
 344         if (HAS_PCH_SPLIT(dev)) {
 345                 pipe_config->has_pch_encoder = true;
 346
 347                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 348                                         intel_connector->panel.fitting_mode);
 349         } else {
 350                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 351                                          intel_connector->panel.fitting_mode);
 352
 353         }
 354
 355         /*
 356          * XXX: It would be nice to support lower refresh rates on the
 357          * panels to reduce power consumption, and perhaps match the
 358          * user's requested refresh rate.
 359          */
 360
 361         return true;
 362 }
 363
 364 /**
 365  * Detect the LVDS connection.
 366  *
 367  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 368  * connected and closed means disconnected.  We also send hotplug events as
 369  * needed, using lid status notification from the input layer.
 370  */
 371 static enum drm_connector_status
 372 intel_lvds_detect(struct drm_connector *connector, bool force)
 373 {
 374         struct drm_device *dev = connector->dev;
 375         enum drm_connector_status status;
 376
 377         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 378                       connector->base.id, connector->name);
 379
 380         status = intel_panel_detect(dev);
 381         if (status != connector_status_unknown)
 382                 return status;
 383
 384         return connector_status_connected;
 385 }
 386
 387 /**
 388  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 389  */
 390 static int intel_lvds_get_modes(struct drm_connector *connector)
 391 {
 392         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 393         struct drm_device *dev = connector->dev;
 394         struct drm_display_mode *mode;
 395
 396         /* use cached edid if we have one */
 397         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 398                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 399
 400         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 401         if (mode == NULL)
 402                 return 0;
 403
 404         drm_mode_probed_add(connector, mode);
 405         return 1;
 406 }
 407
 408 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 409 {
 410         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 411         return 1;
 412 }
 413
 414 /* The GPU hangs up on these systems if modeset is performed on LID open */
 415 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 416         {
 417                 .callback = intel_no_modeset_on_lid_dmi_callback,
 418                 .ident = "Toshiba Tecra A11",
 419                 .matches = {
 420                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 421                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 422                 },
 423         },
 424
 425         { }     /* terminating entry */
 426 };
 427
 428 /*
 429  * Lid events. Note the use of 'modeset':
 430  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 431  *    and set it to MODESET_DONE on open
 432  *  - we use it as a "only once" bit (ie we ignore
 433  *    duplicate events where it was already properly set)
 434  *  - the suspend/resume paths will set it to
 435  *    MODESET_SUSPENDED and ignore the lid open event,
 436  *    because they restore the mode ("lid open").
 437  */
 438 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 439                             void *unused)
 440 {
 441         struct intel_lvds_connector *lvds_connector =
 442                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 443         struct drm_connector *connector = &lvds_connector->base.base;
 444         struct drm_device *dev = connector->dev;
 445         struct drm_i915_private *dev_priv = dev->dev_private;
 446
 447         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 448                 return NOTIFY_OK;
 449
 450         mutex_lock(&dev_priv->modeset_restore_lock);
 451         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 452                 goto exit;
 453         /*
 454          * check and update the status of LVDS connector after receiving
 455          * the LID nofication event.
 456          */
 457         connector->status = connector->funcs->detect(connector, false);
 458
 459         /* Don't force modeset on machines where it causes a GPU lockup */
 460         if (dmi_check_system(intel_no_modeset_on_lid))
 461                 goto exit;
 462         if (!acpi_lid_open()) {
 463                 /* do modeset on next lid open event */
 464                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 465                 goto exit;
 466         }
 467
 468         if (dev_priv->modeset_restore == MODESET_DONE)
 469                 goto exit;
 470
 471         /*
 472          * Some old platform's BIOS love to wreak havoc while the lid is closed.
 473          * We try to detect this here and undo any damage. The split for PCH
 474          * platforms is rather conservative and a bit arbitrary expect that on
 475          * those platforms VGA disabling requires actual legacy VGA I/O access,
 476          * and as part of the cleanup in the hw state restore we also redisable
 477          * the vga plane.
 478          */
 479         if (!HAS_PCH_SPLIT(dev))
 480                 intel_display_resume(dev);
 481
 482         dev_priv->modeset_restore = MODESET_DONE;
 483
 484 exit:
 485         mutex_unlock(&dev_priv->modeset_restore_lock);
 486         return NOTIFY_OK;
 487 }
 488
 489 /**
 490  * intel_lvds_destroy - unregister and free LVDS structures
 491  * @connector: connector to free
 492  *
 493  * Unregister the DDC bus for this connector then free the driver private
 494  * structure.
 495  */
 496 static void intel_lvds_destroy(struct drm_connector *connector)
 497 {
 498         struct intel_lvds_connector *lvds_connector =
 499                 to_lvds_connector(connector);
 500
 501         if (lvds_connector->lid_notifier.notifier_call)
 502                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 503
 504         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 505                 kfree(lvds_connector->base.edid);
 506
 507         intel_panel_fini(&lvds_connector->base.panel);
 508
 509         drm_connector_cleanup(connector);
 510         kfree(connector);
 511 }
 512
 513 static int intel_lvds_set_property(struct drm_connector *connector,
 514                                    struct drm_property *property,
 515                                    uint64_t value)
 516 {
 517         struct intel_connector *intel_connector = to_intel_connector(connector);
 518         struct drm_device *dev = connector->dev;
 519
 520         if (property == dev->mode_config.scaling_mode_property) {
 521                 struct drm_crtc *crtc;
 522
 523                 if (value == DRM_MODE_SCALE_NONE) {
 524                         DRM_DEBUG_KMS("no scaling not supported\n");
 525                         return -EINVAL;
 526                 }
 527
 528                 if (intel_connector->panel.fitting_mode == value) {
 529                         /* the LVDS scaling property is not changed */
 530                         return 0;
 531                 }
 532                 intel_connector->panel.fitting_mode = value;
 533
 534                 crtc = intel_attached_encoder(connector)->base.crtc;
 535                 if (crtc && crtc->state->enable) {
 536                         /*
 537                          * If the CRTC is enabled, the display will be changed
 538                          * according to the new panel fitting mode.
 539                          */
 540                         intel_crtc_restore_mode(crtc);
 541                 }
 542         }
 543
 544         return 0;
 545 }
 546
 547 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 548         .get_modes = intel_lvds_get_modes,
 549         .mode_valid = intel_lvds_mode_valid,
 550 };
 551
 552 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 553         .dpms = drm_atomic_helper_connector_dpms,
 554         .detect = intel_lvds_detect,
 555         .fill_modes = drm_helper_probe_single_connector_modes,
 556         .set_property = intel_lvds_set_property,
 557         .atomic_get_property = intel_connector_atomic_get_property,
 558         .destroy = intel_lvds_destroy,
 559         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 560         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 561 };
 562
 563 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 564         .destroy = intel_encoder_destroy,
 565 };
 566
 567 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 568 {
 569         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 570         return 1;
 571 }
 572
 573 /* These systems claim to have LVDS, but really don't */
 574 static const struct dmi_system_id intel_no_lvds[] = {
 575         {
 576                 .callback = intel_no_lvds_dmi_callback,
 577                 .ident = "Apple Mac Mini (Core series)",
 578                 .matches = {
 579                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 580                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 581                 },
 582         },
 583         {
 584                 .callback = intel_no_lvds_dmi_callback,
 585                 .ident = "Apple Mac Mini (Core 2 series)",
 586                 .matches = {
 587                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 588                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 589                 },
 590         },
 591         {
 592                 .callback = intel_no_lvds_dmi_callback,
 593                 .ident = "MSI IM-945GSE-A",
 594                 .matches = {
 595                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 596                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 597                 },
 598         },
 599         {
 600                 .callback = intel_no_lvds_dmi_callback,
 601                 .ident = "Dell Studio Hybrid",
 602                 .matches = {
 603                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 604                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 605                 },
 606         },
 607         {
 608                 .callback = intel_no_lvds_dmi_callback,
 609                 .ident = "Dell OptiPlex FX170",
 610                 .matches = {
 611                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 612                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 613                 },
 614         },
 615         {
 616                 .callback = intel_no_lvds_dmi_callback,
 617                 .ident = "AOpen Mini PC",
 618                 .matches = {
 619                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 620                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 621                 },
 622         },
 623         {
 624                 .callback = intel_no_lvds_dmi_callback,
 625                 .ident = "AOpen Mini PC MP915",
 626                 .matches = {
 627                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 628                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 629                 },
 630         },
 631         {
 632                 .callback = intel_no_lvds_dmi_callback,
 633                 .ident = "AOpen i915GMm-HFS",
 634                 .matches = {
 635                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 636                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 637                 },
 638         },
 639         {
 640                 .callback = intel_no_lvds_dmi_callback,
 641                 .ident = "AOpen i45GMx-I",
 642                 .matches = {
 643                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 644                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 645                 },
 646         },
 647         {
 648                 .callback = intel_no_lvds_dmi_callback,
 649                 .ident = "Aopen i945GTt-VFA",
 650                 .matches = {
 651                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 652                 },
 653         },
 654         {
 655                 .callback = intel_no_lvds_dmi_callback,
 656                 .ident = "Clientron U800",
 657                 .matches = {
 658                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 659                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 660                 },
 661         },
 662         {
 663                 .callback = intel_no_lvds_dmi_callback,
 664                 .ident = "Clientron E830",
 665                 .matches = {
 666                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 667                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 668                 },
 669         },
 670         {
 671                 .callback = intel_no_lvds_dmi_callback,
 672                 .ident = "Asus EeeBox PC EB1007",
 673                 .matches = {
 674                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 675                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 676                 },
 677         },
 678         {
 679                 .callback = intel_no_lvds_dmi_callback,
 680                 .ident = "Asus AT5NM10T-I",
 681                 .matches = {
 682                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 683                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 684                 },
 685         },
 686         {
 687                 .callback = intel_no_lvds_dmi_callback,
 688                 .ident = "Hewlett-Packard HP t5740",
 689                 .matches = {
 690                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 691                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 692                 },
 693         },
 694         {
 695                 .callback = intel_no_lvds_dmi_callback,
 696                 .ident = "Hewlett-Packard t5745",
 697                 .matches = {
 698                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 699                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 700                 },
 701         },
 702         {
 703                 .callback = intel_no_lvds_dmi_callback,
 704                 .ident = "Hewlett-Packard st5747",
 705                 .matches = {
 706                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 707                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 708                 },
 709         },
 710         {
 711                 .callback = intel_no_lvds_dmi_callback,
 712                 .ident = "MSI Wind Box DC500",
 713                 .matches = {
 714                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 715                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 716                 },
 717         },
 718         {
 719                 .callback = intel_no_lvds_dmi_callback,
 720                 .ident = "Gigabyte GA-D525TUD",
 721                 .matches = {
 722                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 723                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 724                 },
 725         },
 726         {
 727                 .callback = intel_no_lvds_dmi_callback,
 728                 .ident = "Supermicro X7SPA-H",
 729                 .matches = {
 730                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 731                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 732                 },
 733         },
 734         {
 735                 .callback = intel_no_lvds_dmi_callback,
 736                 .ident = "Fujitsu Esprimo Q900",
 737                 .matches = {
 738                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 739                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 740                 },
 741         },
 742         {
 743                 .callback = intel_no_lvds_dmi_callback,
 744                 .ident = "Intel D410PT",
 745                 .matches = {
 746                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 747                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
 748                 },
 749         },
 750         {
 751                 .callback = intel_no_lvds_dmi_callback,
 752                 .ident = "Intel D425KT",
 753                 .matches = {
 754                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 755                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
 756                 },
 757         },
 758         {
 759                 .callback = intel_no_lvds_dmi_callback,
 760                 .ident = "Intel D510MO",
 761                 .matches = {
 762                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 763                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 764                 },
 765         },
 766         {
 767                 .callback = intel_no_lvds_dmi_callback,
 768                 .ident = "Intel D525MW",
 769                 .matches = {
 770                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 771                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 772                 },
 773         },
 774
 775         { }     /* terminating entry */
 776 };
 777
 778 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 779 {
 780         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 781         return 1;
 782 }
 783
 784 static const struct dmi_system_id intel_dual_link_lvds[] = {
 785         {
 786                 .callback = intel_dual_link_lvds_callback,
 787                 .ident = "Apple MacBook Pro 15\" (2010)",
 788                 .matches = {
 789                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 790                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
 791                 },
 792         },
 793         {
 794                 .callback = intel_dual_link_lvds_callback,
 795                 .ident = "Apple MacBook Pro 15\" (2011)",
 796                 .matches = {
 797                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 798                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 799                 },
 800         },
 801         {
 802                 .callback = intel_dual_link_lvds_callback,
 803                 .ident = "Apple MacBook Pro 15\" (2012)",
 804                 .matches = {
 805                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 806                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
 807                 },
 808         },
 809         { }     /* terminating entry */
 810 };
 811
 812 bool intel_is_dual_link_lvds(struct drm_device *dev)
 813 {
 814         struct intel_encoder *encoder;
 815         struct intel_lvds_encoder *lvds_encoder;
 816
 817         for_each_intel_encoder(dev, encoder) {
 818                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 819                         lvds_encoder = to_lvds_encoder(&encoder->base);
 820
 821                         return lvds_encoder->is_dual_link;
 822                 }
 823         }
 824
 825         return false;
 826 }
 827
 828 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 829 {
 830         struct drm_device *dev = lvds_encoder->base.base.dev;
 831         unsigned int val;
 832         struct drm_i915_private *dev_priv = dev->dev_private;
 833
 834         /* use the module option value if specified */
 835         if (i915.lvds_channel_mode > 0)
 836                 return i915.lvds_channel_mode == 2;
 837
 838         /* single channel LVDS is limited to 112 MHz */
 839         if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
 840             > 112999)
 841                 return true;
 842
 843         if (dmi_check_system(intel_dual_link_lvds))
 844                 return true;
 845
 846         /* BIOS should set the proper LVDS register value at boot, but
 847          * in reality, it doesn't set the value when the lid is closed;
 848          * we need to check "the value to be set" in VBT when LVDS
 849          * register is uninitialized.
 850          */
 851         val = I915_READ(lvds_encoder->reg);
 852         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 853                 val = dev_priv->vbt.bios_lvds_val;
 854
 855         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 856 }
 857
 858 static bool intel_lvds_supported(struct drm_device *dev)
 859 {
 860         /* With the introduction of the PCH we gained a dedicated
 861          * LVDS presence pin, use it. */
 862         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
 863                 return true;
 864
 865         /* Otherwise LVDS was only attached to mobile products,
 866          * except for the inglorious 830gm */
 867         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
 868                 return true;
 869
 870         return false;
 871 }
 872
 873 /**
 874  * intel_lvds_init - setup LVDS connectors on this device
 875  * @dev: drm device
 876  *
 877  * Create the connector, register the LVDS DDC bus, and try to figure out what
 878  * modes we can display on the LVDS panel (if present).
 879  */
 880 void intel_lvds_init(struct drm_device *dev)
 881 {
 882         struct drm_i915_private *dev_priv = dev->dev_private;
 883         struct intel_lvds_encoder *lvds_encoder;
 884         struct intel_encoder *intel_encoder;
 885         struct intel_lvds_connector *lvds_connector;
 886         struct intel_connector *intel_connector;
 887         struct drm_connector *connector;
 888         struct drm_encoder *encoder;
 889         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 890         struct drm_display_mode *fixed_mode = NULL;
 891         struct drm_display_mode *downclock_mode = NULL;
 892         struct edid *edid;
 893         struct drm_crtc *crtc;
 894         i915_reg_t lvds_reg;
 895         u32 lvds;
 896         int pipe;
 897         u8 pin;
 898
 899         /*
 900          * Unlock registers and just leave them unlocked. Do this before
 901          * checking quirk lists to avoid bogus WARNINGs.
 902          */
 903         if (HAS_PCH_SPLIT(dev)) {
 904                 I915_WRITE(PCH_PP_CONTROL,
 905                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
 906         } else if (INTEL_INFO(dev_priv)->gen < 5) {
 907                 I915_WRITE(PP_CONTROL,
 908                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
 909         }
 910         if (!intel_lvds_supported(dev))
 911                 return;
 912
 913         /* Skip init on machines we know falsely report LVDS */
 914         if (dmi_check_system(intel_no_lvds))
 915                 return;
 916
 917         if (HAS_PCH_SPLIT(dev))
 918                 lvds_reg = PCH_LVDS;
 919         else
 920                 lvds_reg = LVDS;
 921
 922         lvds = I915_READ(lvds_reg);
 923
 924         if (HAS_PCH_SPLIT(dev)) {
 925                 if ((lvds & LVDS_DETECTED) == 0)
 926                         return;
 927                 if (dev_priv->vbt.edp.support) {
 928                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 929                         return;
 930                 }
 931         }
 932
 933         pin = GMBUS_PIN_PANEL;
 934         if (!intel_bios_is_lvds_present(dev_priv, &pin)) {
 935                 if ((lvds & LVDS_PORT_EN) == 0) {
 936                         DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 937                         return;
 938                 }
 939                 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
 940         }
 941
 942          /* Set the Panel Power On/Off timings if uninitialized. */
 943         if (INTEL_INFO(dev_priv)->gen < 5 &&
 944             I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
 945                 /* Set T2 to 40ms and T5 to 200ms */
 946                 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
 947
 948                 /* Set T3 to 35ms and Tx to 200ms */
 949                 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
 950
 951                 DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n");
 952         }
 953
 954         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
 955         if (!lvds_encoder)
 956                 return;
 957
 958         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
 959         if (!lvds_connector) {
 960                 kfree(lvds_encoder);
 961                 return;
 962         }
 963
 964         if (intel_connector_init(&lvds_connector->base) < 0) {
 965                 kfree(lvds_connector);
 966                 kfree(lvds_encoder);
 967                 return;
 968         }
 969
 970         lvds_encoder->attached_connector = lvds_connector;
 971
 972         intel_encoder = &lvds_encoder->base;
 973         encoder = &intel_encoder->base;
 974         intel_connector = &lvds_connector->base;
 975         connector = &intel_connector->base;
 976         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 977                            DRM_MODE_CONNECTOR_LVDS);
 978
 979         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 980                          DRM_MODE_ENCODER_LVDS, "LVDS");
 981
 982         intel_encoder->enable = intel_enable_lvds;
 983         intel_encoder->pre_enable = intel_pre_enable_lvds;
 984         intel_encoder->compute_config = intel_lvds_compute_config;
 985         if (HAS_PCH_SPLIT(dev_priv)) {
 986                 intel_encoder->disable = pch_disable_lvds;
 987                 intel_encoder->post_disable = pch_post_disable_lvds;
 988         } else {
 989                 intel_encoder->disable = gmch_disable_lvds;
 990         }
 991         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
 992         intel_encoder->get_config = intel_lvds_get_config;
 993         intel_connector->get_hw_state = intel_connector_get_hw_state;
 994         intel_connector->unregister = intel_connector_unregister;
 995
 996         intel_connector_attach_encoder(intel_connector, intel_encoder);
 997         intel_encoder->type = INTEL_OUTPUT_LVDS;
 998
 999         intel_encoder->cloneable = 0;
1000         if (HAS_PCH_SPLIT(dev))
1001                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1002         else if (IS_GEN4(dev))
1003                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1004         else
1005                 intel_encoder->crtc_mask = (1 << 1);
1006
1007         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1008         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1009         connector->interlace_allowed = false;
1010         connector->doublescan_allowed = false;
1011
1012         lvds_encoder->reg = lvds_reg;
1013
1014         /* create the scaling mode property */
1015         drm_mode_create_scaling_mode_property(dev);
1016         drm_object_attach_property(&connector->base,
1017                                       dev->mode_config.scaling_mode_property,
1018                                       DRM_MODE_SCALE_ASPECT);
1019         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1020         /*
1021          * LVDS discovery:
1022          * 1) check for EDID on DDC
1023          * 2) check for VBT data
1024          * 3) check to see if LVDS is already on
1025          *    if none of the above, no panel
1026          * 4) make sure lid is open
1027          *    if closed, act like it's not there for now
1028          */
1029
1030         /*
1031          * Attempt to get the fixed panel mode from DDC.  Assume that the
1032          * preferred mode is the right one.
1033          */
1034         mutex_lock(&dev->mode_config.mutex);
1035         if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC)
1036                 edid = drm_get_edid_switcheroo(connector,
1037                                     intel_gmbus_get_adapter(dev_priv, pin));
1038         else
1039                 edid = drm_get_edid(connector,
1040                                     intel_gmbus_get_adapter(dev_priv, pin));
1041         if (edid) {
1042                 if (drm_add_edid_modes(connector, edid)) {
1043                         drm_mode_connector_update_edid_property(connector,
1044                                                                 edid);
1045                 } else {
1046                         kfree(edid);
1047                         edid = ERR_PTR(-EINVAL);
1048                 }
1049         } else {
1050                 edid = ERR_PTR(-ENOENT);
1051         }
1052         lvds_connector->base.edid = edid;
1053
1054         if (IS_ERR_OR_NULL(edid)) {
1055                 /* Didn't get an EDID, so
1056                  * Set wide sync ranges so we get all modes
1057                  * handed to valid_mode for checking
1058                  */
1059                 connector->display_info.min_vfreq = 0;
1060                 connector->display_info.max_vfreq = 200;
1061                 connector->display_info.min_hfreq = 0;
1062                 connector->display_info.max_hfreq = 200;
1063         }
1064
1065         list_for_each_entry(scan, &connector->probed_modes, head) {
1066                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1067                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1068                         drm_mode_debug_printmodeline(scan);
1069
1070                         fixed_mode = drm_mode_duplicate(dev, scan);
1071                         if (fixed_mode)
1072                                 goto out;
1073                 }
1074         }
1075
1076         /* Failed to get EDID, what about VBT? */
1077         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1078                 DRM_DEBUG_KMS("using mode from VBT: ");
1079                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1080
1081                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1082                 if (fixed_mode) {
1083                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1084                         connector->display_info.width_mm = fixed_mode->width_mm;
1085                         connector->display_info.height_mm = fixed_mode->height_mm;
1086                         goto out;
1087                 }
1088         }
1089
1090         /*
1091          * If we didn't get EDID, try checking if the panel is already turned
1092          * on.  If so, assume that whatever is currently programmed is the
1093          * correct mode.
1094          */
1095
1096         /* Ironlake: FIXME if still fail, not try pipe mode now */
1097         if (HAS_PCH_SPLIT(dev))
1098                 goto failed;
1099
1100         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1101         crtc = intel_get_crtc_for_pipe(dev, pipe);
1102
1103         if (crtc && (lvds & LVDS_PORT_EN)) {
1104                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1105                 if (fixed_mode) {
1106                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1107                         drm_mode_debug_printmodeline(fixed_mode);
1108                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1109                         goto out;
1110                 }
1111         }
1112
1113         /* If we still don't have a mode after all that, give up. */
1114         if (!fixed_mode)
1115                 goto failed;
1116
1117 out:
1118         mutex_unlock(&dev->mode_config.mutex);
1119
1120         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1121
1122         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1123         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1124                       lvds_encoder->is_dual_link ? "dual" : "single");
1125
1126         lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK;
1127
1128         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1129         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1130                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1131                 lvds_connector->lid_notifier.notifier_call = NULL;
1132         }
1133         drm_connector_register(connector);
1134
1135         intel_panel_setup_backlight(connector, INVALID_PIPE);
1136
1137         return;
1138
1139 failed:
1140         mutex_unlock(&dev->mode_config.mutex);
1141
1142         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1143         drm_connector_cleanup(connector);
1144         drm_encoder_cleanup(encoder);
1145         kfree(lvds_encoder);
1146         kfree(lvds_connector);
1147         return;
1148 }