Merge tag 'mmc-v4.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
[cascardo/linux.git] / drivers / gpu / drm / imx / ipuv3-crtc.c
1 /*
2  * i.MX IPUv3 Graphics driver
3  *
4  * Copyright (C) 2011 Sascha Hauer, Pengutronix
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 #include <linux/component.h>
16 #include <linux/module.h>
17 #include <linux/export.h>
18 #include <linux/device.h>
19 #include <linux/platform_device.h>
20 #include <drm/drmP.h>
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <linux/clk.h>
25 #include <linux/errno.h>
26 #include <drm/drm_gem_cma_helper.h>
27 #include <drm/drm_fb_cma_helper.h>
28
29 #include <video/imx-ipu-v3.h>
30 #include "imx-drm.h"
31 #include "ipuv3-plane.h"
32
33 #define DRIVER_DESC             "i.MX IPUv3 Graphics"
34
35 struct ipu_crtc {
36         struct device           *dev;
37         struct drm_crtc         base;
38         struct imx_drm_crtc     *imx_crtc;
39
40         /* plane[0] is the full plane, plane[1] is the partial plane */
41         struct ipu_plane        *plane[2];
42
43         struct ipu_dc           *dc;
44         struct ipu_di           *di;
45         int                     irq;
46 };
47
48 static inline struct ipu_crtc *to_ipu_crtc(struct drm_crtc *crtc)
49 {
50         return container_of(crtc, struct ipu_crtc, base);
51 }
52
53 static void ipu_crtc_enable(struct drm_crtc *crtc)
54 {
55         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
56         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
57
58         ipu_dc_enable(ipu);
59         ipu_dc_enable_channel(ipu_crtc->dc);
60         ipu_di_enable(ipu_crtc->di);
61 }
62
63 static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
64                                     struct drm_crtc_state *old_crtc_state)
65 {
66         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
67         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
68
69         ipu_dc_disable_channel(ipu_crtc->dc);
70         ipu_di_disable(ipu_crtc->di);
71         ipu_dc_disable(ipu);
72
73         spin_lock_irq(&crtc->dev->event_lock);
74         if (crtc->state->event) {
75                 drm_crtc_send_vblank_event(crtc, crtc->state->event);
76                 crtc->state->event = NULL;
77         }
78         spin_unlock_irq(&crtc->dev->event_lock);
79
80         /* always disable planes on the CRTC */
81         drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, true);
82
83         drm_crtc_vblank_off(crtc);
84 }
85
86 static void imx_drm_crtc_reset(struct drm_crtc *crtc)
87 {
88         struct imx_crtc_state *state;
89
90         if (crtc->state) {
91                 if (crtc->state->mode_blob)
92                         drm_property_unreference_blob(crtc->state->mode_blob);
93
94                 state = to_imx_crtc_state(crtc->state);
95                 memset(state, 0, sizeof(*state));
96         } else {
97                 state = kzalloc(sizeof(*state), GFP_KERNEL);
98                 if (!state)
99                         return;
100                 crtc->state = &state->base;
101         }
102
103         state->base.crtc = crtc;
104 }
105
106 static struct drm_crtc_state *imx_drm_crtc_duplicate_state(struct drm_crtc *crtc)
107 {
108         struct imx_crtc_state *state;
109
110         state = kzalloc(sizeof(*state), GFP_KERNEL);
111         if (!state)
112                 return NULL;
113
114         __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
115
116         WARN_ON(state->base.crtc != crtc);
117         state->base.crtc = crtc;
118
119         return &state->base;
120 }
121
122 static void imx_drm_crtc_destroy_state(struct drm_crtc *crtc,
123                                        struct drm_crtc_state *state)
124 {
125         __drm_atomic_helper_crtc_destroy_state(state);
126         kfree(to_imx_crtc_state(state));
127 }
128
129 static void imx_drm_crtc_destroy(struct drm_crtc *crtc)
130 {
131         imx_drm_remove_crtc(to_ipu_crtc(crtc)->imx_crtc);
132 }
133
134 static const struct drm_crtc_funcs ipu_crtc_funcs = {
135         .set_config = drm_atomic_helper_set_config,
136         .destroy = imx_drm_crtc_destroy,
137         .page_flip = drm_atomic_helper_page_flip,
138         .reset = imx_drm_crtc_reset,
139         .atomic_duplicate_state = imx_drm_crtc_duplicate_state,
140         .atomic_destroy_state = imx_drm_crtc_destroy_state,
141 };
142
143 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
144 {
145         struct ipu_crtc *ipu_crtc = dev_id;
146
147         drm_crtc_handle_vblank(&ipu_crtc->base);
148
149         return IRQ_HANDLED;
150 }
151
152 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
153                                   const struct drm_display_mode *mode,
154                                   struct drm_display_mode *adjusted_mode)
155 {
156         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
157         struct videomode vm;
158         int ret;
159
160         drm_display_mode_to_videomode(adjusted_mode, &vm);
161
162         ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
163         if (ret)
164                 return false;
165
166         if ((vm.vsync_len == 0) || (vm.hsync_len == 0))
167                 return false;
168
169         drm_display_mode_from_videomode(&vm, adjusted_mode);
170
171         return true;
172 }
173
174 static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
175                                  struct drm_crtc_state *state)
176 {
177         u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary);
178
179         if (state->active && (primary_plane_mask & state->plane_mask) == 0)
180                 return -EINVAL;
181
182         return 0;
183 }
184
185 static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
186                                   struct drm_crtc_state *old_crtc_state)
187 {
188         drm_crtc_vblank_on(crtc);
189
190         spin_lock_irq(&crtc->dev->event_lock);
191         if (crtc->state->event) {
192                 WARN_ON(drm_crtc_vblank_get(crtc));
193                 drm_crtc_arm_vblank_event(crtc, crtc->state->event);
194                 crtc->state->event = NULL;
195         }
196         spin_unlock_irq(&crtc->dev->event_lock);
197 }
198
199 static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
200 {
201         struct drm_device *dev = crtc->dev;
202         struct drm_encoder *encoder;
203         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
204         struct drm_display_mode *mode = &crtc->state->adjusted_mode;
205         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc->state);
206         struct ipu_di_signal_cfg sig_cfg = {};
207         unsigned long encoder_types = 0;
208
209         dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
210                         mode->hdisplay);
211         dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
212                         mode->vdisplay);
213
214         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
215                 if (encoder->crtc == crtc)
216                         encoder_types |= BIT(encoder->encoder_type);
217         }
218
219         dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
220                 __func__, encoder_types);
221
222         /*
223          * If we have DAC or LDB, then we need the IPU DI clock to be
224          * the same as the LDB DI clock. For TVDAC, derive the IPU DI
225          * clock from 27 MHz TVE_DI clock, but allow to divide it.
226          */
227         if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
228                              BIT(DRM_MODE_ENCODER_LVDS)))
229                 sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
230         else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
231                 sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
232         else
233                 sig_cfg.clkflags = 0;
234
235         sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW);
236         /* Default to driving pixel data on negative clock edges */
237         sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags &
238                              DRM_BUS_FLAG_PIXDATA_POSEDGE);
239         sig_cfg.bus_format = imx_crtc_state->bus_format;
240         sig_cfg.v_to_h_sync = 0;
241         sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
242         sig_cfg.vsync_pin = imx_crtc_state->di_vsync_pin;
243
244         drm_display_mode_to_videomode(mode, &sig_cfg.mode);
245
246         ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
247                          mode->flags & DRM_MODE_FLAG_INTERLACE,
248                          imx_crtc_state->bus_format, mode->hdisplay);
249         ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
250 }
251
252 static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
253         .mode_fixup = ipu_crtc_mode_fixup,
254         .mode_set_nofb = ipu_crtc_mode_set_nofb,
255         .atomic_check = ipu_crtc_atomic_check,
256         .atomic_begin = ipu_crtc_atomic_begin,
257         .atomic_disable = ipu_crtc_atomic_disable,
258         .enable = ipu_crtc_enable,
259 };
260
261 static int ipu_enable_vblank(struct drm_crtc *crtc)
262 {
263         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
264
265         enable_irq(ipu_crtc->irq);
266
267         return 0;
268 }
269
270 static void ipu_disable_vblank(struct drm_crtc *crtc)
271 {
272         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
273
274         disable_irq_nosync(ipu_crtc->irq);
275 }
276
277 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
278         .enable_vblank = ipu_enable_vblank,
279         .disable_vblank = ipu_disable_vblank,
280         .crtc_funcs = &ipu_crtc_funcs,
281         .crtc_helper_funcs = &ipu_helper_funcs,
282 };
283
284 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
285 {
286         if (!IS_ERR_OR_NULL(ipu_crtc->dc))
287                 ipu_dc_put(ipu_crtc->dc);
288         if (!IS_ERR_OR_NULL(ipu_crtc->di))
289                 ipu_di_put(ipu_crtc->di);
290 }
291
292 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
293                 struct ipu_client_platformdata *pdata)
294 {
295         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
296         int ret;
297
298         ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
299         if (IS_ERR(ipu_crtc->dc)) {
300                 ret = PTR_ERR(ipu_crtc->dc);
301                 goto err_out;
302         }
303
304         ipu_crtc->di = ipu_di_get(ipu, pdata->di);
305         if (IS_ERR(ipu_crtc->di)) {
306                 ret = PTR_ERR(ipu_crtc->di);
307                 goto err_out;
308         }
309
310         return 0;
311 err_out:
312         ipu_put_resources(ipu_crtc);
313
314         return ret;
315 }
316
317 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
318         struct ipu_client_platformdata *pdata, struct drm_device *drm)
319 {
320         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
321         int dp = -EINVAL;
322         int ret;
323
324         ret = ipu_get_resources(ipu_crtc, pdata);
325         if (ret) {
326                 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
327                                 ret);
328                 return ret;
329         }
330
331         if (pdata->dp >= 0)
332                 dp = IPU_DP_FLOW_SYNC_BG;
333         ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
334                                             DRM_PLANE_TYPE_PRIMARY);
335         if (IS_ERR(ipu_crtc->plane[0])) {
336                 ret = PTR_ERR(ipu_crtc->plane[0]);
337                 goto err_put_resources;
338         }
339
340         ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
341                         &ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs,
342                         pdata->of_node);
343         if (ret) {
344                 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
345                 goto err_put_resources;
346         }
347
348         ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
349         if (ret) {
350                 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
351                         ret);
352                 goto err_remove_crtc;
353         }
354
355         /* If this crtc is using the DP, add an overlay plane */
356         if (pdata->dp >= 0 && pdata->dma[1] > 0) {
357                 ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
358                                                 IPU_DP_FLOW_SYNC_FG,
359                                                 drm_crtc_mask(&ipu_crtc->base),
360                                                 DRM_PLANE_TYPE_OVERLAY);
361                 if (IS_ERR(ipu_crtc->plane[1])) {
362                         ipu_crtc->plane[1] = NULL;
363                 } else {
364                         ret = ipu_plane_get_resources(ipu_crtc->plane[1]);
365                         if (ret) {
366                                 dev_err(ipu_crtc->dev, "getting plane 1 "
367                                         "resources failed with %d.\n", ret);
368                                 goto err_put_plane0_res;
369                         }
370                 }
371         }
372
373         ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
374         ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
375                         "imx_drm", ipu_crtc);
376         if (ret < 0) {
377                 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
378                 goto err_put_plane1_res;
379         }
380         /* Only enable IRQ when we actually need it to trigger work. */
381         disable_irq(ipu_crtc->irq);
382
383         return 0;
384
385 err_put_plane1_res:
386         if (ipu_crtc->plane[1])
387                 ipu_plane_put_resources(ipu_crtc->plane[1]);
388 err_put_plane0_res:
389         ipu_plane_put_resources(ipu_crtc->plane[0]);
390 err_remove_crtc:
391         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
392 err_put_resources:
393         ipu_put_resources(ipu_crtc);
394
395         return ret;
396 }
397
398 static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
399 {
400         struct ipu_client_platformdata *pdata = dev->platform_data;
401         struct drm_device *drm = data;
402         struct ipu_crtc *ipu_crtc;
403         int ret;
404
405         ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
406         if (!ipu_crtc)
407                 return -ENOMEM;
408
409         ipu_crtc->dev = dev;
410
411         ret = ipu_crtc_init(ipu_crtc, pdata, drm);
412         if (ret)
413                 return ret;
414
415         dev_set_drvdata(dev, ipu_crtc);
416
417         return 0;
418 }
419
420 static void ipu_drm_unbind(struct device *dev, struct device *master,
421         void *data)
422 {
423         struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
424
425         ipu_put_resources(ipu_crtc);
426         if (ipu_crtc->plane[1])
427                 ipu_plane_put_resources(ipu_crtc->plane[1]);
428         ipu_plane_put_resources(ipu_crtc->plane[0]);
429 }
430
431 static const struct component_ops ipu_crtc_ops = {
432         .bind = ipu_drm_bind,
433         .unbind = ipu_drm_unbind,
434 };
435
436 static int ipu_drm_probe(struct platform_device *pdev)
437 {
438         struct device *dev = &pdev->dev;
439         int ret;
440
441         if (!dev->platform_data)
442                 return -EINVAL;
443
444         ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
445         if (ret)
446                 return ret;
447
448         return component_add(dev, &ipu_crtc_ops);
449 }
450
451 static int ipu_drm_remove(struct platform_device *pdev)
452 {
453         component_del(&pdev->dev, &ipu_crtc_ops);
454         return 0;
455 }
456
457 static struct platform_driver ipu_drm_driver = {
458         .driver = {
459                 .name = "imx-ipuv3-crtc",
460         },
461         .probe = ipu_drm_probe,
462         .remove = ipu_drm_remove,
463 };
464 module_platform_driver(ipu_drm_driver);
465
466 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
467 MODULE_DESCRIPTION(DRIVER_DESC);
468 MODULE_LICENSE("GPL");
469 MODULE_ALIAS("platform:imx-ipuv3-crtc");