drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv50.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "nv50.h"
  25
  26 void
  27 nv50_i2c_drive_scl(struct nvkm_i2c_port *base, int state)
  28 {
  29         struct nvkm_i2c *i2c = (void *)nvkm_i2c(base);
  30         struct nvkm_device *device = i2c->subdev.device;
  31         struct nv50_i2c_port *port = (void *)base;
  32         if (state) port->state |= 0x01;
  33         else       port->state &= 0xfe;
  34         nvkm_wr32(device, port->addr, port->state);
  35 }
  36
  37 void
  38 nv50_i2c_drive_sda(struct nvkm_i2c_port *base, int state)
  39 {
  40         struct nvkm_i2c *i2c = (void *)nvkm_i2c(base);
  41         struct nvkm_device *device = i2c->subdev.device;
  42         struct nv50_i2c_port *port = (void *)base;
  43         if (state) port->state |= 0x02;
  44         else       port->state &= 0xfd;
  45         nvkm_wr32(device, port->addr, port->state);
  46 }
  47
  48 int
  49 nv50_i2c_sense_scl(struct nvkm_i2c_port *base)
  50 {
  51         struct nvkm_i2c *i2c = (void *)nvkm_i2c(base);
  52         struct nvkm_device *device = i2c->subdev.device;
  53         struct nv50_i2c_port *port = (void *)base;
  54         return !!(nvkm_rd32(device, port->addr) & 0x00000001);
  55 }
  56
  57 int
  58 nv50_i2c_sense_sda(struct nvkm_i2c_port *base)
  59 {
  60         struct nvkm_i2c *i2c = (void *)nvkm_i2c(base);
  61         struct nvkm_device *device = i2c->subdev.device;
  62         struct nv50_i2c_port *port = (void *)base;
  63         return !!(nvkm_rd32(device, port->addr) & 0x00000002);
  64 }
  65
  66 static const struct nvkm_i2c_func
  67 nv50_i2c_func = {
  68         .drive_scl = nv50_i2c_drive_scl,
  69         .drive_sda = nv50_i2c_drive_sda,
  70         .sense_scl = nv50_i2c_sense_scl,
  71         .sense_sda = nv50_i2c_sense_sda,
  72 };
  73
  74 const u32 nv50_i2c_addr[] = {
  75         0x00e138, 0x00e150, 0x00e168, 0x00e180,
  76         0x00e254, 0x00e274, 0x00e764, 0x00e780,
  77         0x00e79c, 0x00e7b8
  78 };
  79 const int nv50_i2c_addr_nr = ARRAY_SIZE(nv50_i2c_addr);
  80
  81 static int
  82 nv50_i2c_port_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
  83                    struct nvkm_oclass *oclass, void *data, u32 index,
  84                    struct nvkm_object **pobject)
  85 {
  86         struct dcb_i2c_entry *info = data;
  87         struct nv50_i2c_port *port;
  88         int ret;
  89
  90         ret = nvkm_i2c_port_create(parent, engine, oclass, index,
  91                                    &nvkm_i2c_bit_algo, &nv50_i2c_func, &port);
  92         *pobject = nv_object(port);
  93         if (ret)
  94                 return ret;
  95
  96         if (info->drive >= nv50_i2c_addr_nr)
  97                 return -EINVAL;
  98
  99         port->state = 0x00000007;
 100         port->addr = nv50_i2c_addr[info->drive];
 101         return 0;
 102 }
 103
 104 int
 105 nv50_i2c_port_init(struct nvkm_object *object)
 106 {
 107         struct nvkm_i2c *i2c = (void *)nvkm_i2c(object);
 108         struct nvkm_device *device = i2c->subdev.device;
 109         struct nv50_i2c_port *port = (void *)object;
 110         nvkm_wr32(device, port->addr, port->state);
 111         return nvkm_i2c_port_init(&port->base);
 112 }
 113
 114 static struct nvkm_oclass
 115 nv50_i2c_sclass[] = {
 116         { .handle = NV_I2C_TYPE_DCBI2C(DCB_I2C_NVIO_BIT),
 117           .ofuncs = &(struct nvkm_ofuncs) {
 118                   .ctor = nv50_i2c_port_ctor,
 119                   .dtor = _nvkm_i2c_port_dtor,
 120                   .init = nv50_i2c_port_init,
 121                   .fini = _nvkm_i2c_port_fini,
 122           },
 123         },
 124         {}
 125 };
 126
 127 struct nvkm_oclass *
 128 nv50_i2c_oclass = &(struct nvkm_i2c_impl) {
 129         .base.handle = NV_SUBDEV(I2C, 0x50),
 130         .base.ofuncs = &(struct nvkm_ofuncs) {
 131                 .ctor = _nvkm_i2c_ctor,
 132                 .dtor = _nvkm_i2c_dtor,
 133                 .init = _nvkm_i2c_init,
 134                 .fini = _nvkm_i2c_fini,
 135         },
 136         .sclass = nv50_i2c_sclass,
 137         .pad_x = &nv04_i2c_pad_oclass,
 138 }.base;