drm/omap: Do not include video/omapdss.h directly in drivers
[cascardo/linux.git] / drivers / gpu / drm / omapdrm / dss / dss_features.c
1 /*
2  * linux/drivers/video/omap2/dss/dss_features.c
3  *
4  * Copyright (C) 2010 Texas Instruments
5  * Author: Archit Taneja <archit@ti.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/err.h>
24 #include <linux/slab.h>
25
26 #include "omapdss.h"
27 #include "dss.h"
28 #include "dss_features.h"
29
30 /* Defines a generic omap register field */
31 struct dss_reg_field {
32         u8 start, end;
33 };
34
35 struct dss_param_range {
36         int min, max;
37 };
38
39 struct omap_dss_features {
40         const struct dss_reg_field *reg_fields;
41         const int num_reg_fields;
42
43         const enum dss_feat_id *features;
44         const int num_features;
45
46         const int num_mgrs;
47         const int num_ovls;
48         const enum omap_display_type *supported_displays;
49         const enum omap_dss_output_id *supported_outputs;
50         const enum omap_color_mode *supported_color_modes;
51         const enum omap_overlay_caps *overlay_caps;
52         const char * const *clksrc_names;
53         const struct dss_param_range *dss_params;
54
55         const enum omap_dss_rotation_type supported_rotation_types;
56
57         const u32 buffer_size_unit;
58         const u32 burst_size_unit;
59 };
60
61 /* This struct is assigned to one of the below during initialization */
62 static const struct omap_dss_features *omap_current_dss_features;
63
64 static const struct dss_reg_field omap2_dss_reg_fields[] = {
65         [FEAT_REG_FIRHINC]                      = { 11, 0 },
66         [FEAT_REG_FIRVINC]                      = { 27, 16 },
67         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 8, 0 },
68         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 24, 16 },
69         [FEAT_REG_FIFOSIZE]                     = { 8, 0 },
70         [FEAT_REG_HORIZONTALACCU]               = { 9, 0 },
71         [FEAT_REG_VERTICALACCU]                 = { 25, 16 },
72         [FEAT_REG_DISPC_CLK_SWITCH]             = { 0, 0 },
73 };
74
75 static const struct dss_reg_field omap3_dss_reg_fields[] = {
76         [FEAT_REG_FIRHINC]                      = { 12, 0 },
77         [FEAT_REG_FIRVINC]                      = { 28, 16 },
78         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 11, 0 },
79         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 27, 16 },
80         [FEAT_REG_FIFOSIZE]                     = { 10, 0 },
81         [FEAT_REG_HORIZONTALACCU]               = { 9, 0 },
82         [FEAT_REG_VERTICALACCU]                 = { 25, 16 },
83         [FEAT_REG_DISPC_CLK_SWITCH]             = { 0, 0 },
84 };
85
86 static const struct dss_reg_field am43xx_dss_reg_fields[] = {
87         [FEAT_REG_FIRHINC]                      = { 12, 0 },
88         [FEAT_REG_FIRVINC]                      = { 28, 16 },
89         [FEAT_REG_FIFOLOWTHRESHOLD]     = { 11, 0 },
90         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 27, 16 },
91         [FEAT_REG_FIFOSIZE]             = { 10, 0 },
92         [FEAT_REG_HORIZONTALACCU]               = { 9, 0 },
93         [FEAT_REG_VERTICALACCU]                 = { 25, 16 },
94         [FEAT_REG_DISPC_CLK_SWITCH]             = { 0, 0 },
95 };
96
97 static const struct dss_reg_field omap4_dss_reg_fields[] = {
98         [FEAT_REG_FIRHINC]                      = { 12, 0 },
99         [FEAT_REG_FIRVINC]                      = { 28, 16 },
100         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 15, 0 },
101         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 31, 16 },
102         [FEAT_REG_FIFOSIZE]                     = { 15, 0 },
103         [FEAT_REG_HORIZONTALACCU]               = { 10, 0 },
104         [FEAT_REG_VERTICALACCU]                 = { 26, 16 },
105         [FEAT_REG_DISPC_CLK_SWITCH]             = { 9, 8 },
106 };
107
108 static const struct dss_reg_field omap5_dss_reg_fields[] = {
109         [FEAT_REG_FIRHINC]                      = { 12, 0 },
110         [FEAT_REG_FIRVINC]                      = { 28, 16 },
111         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 15, 0 },
112         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 31, 16 },
113         [FEAT_REG_FIFOSIZE]                     = { 15, 0 },
114         [FEAT_REG_HORIZONTALACCU]               = { 10, 0 },
115         [FEAT_REG_VERTICALACCU]                 = { 26, 16 },
116         [FEAT_REG_DISPC_CLK_SWITCH]             = { 9, 7 },
117 };
118
119 static const enum omap_display_type omap2_dss_supported_displays[] = {
120         /* OMAP_DSS_CHANNEL_LCD */
121         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
122
123         /* OMAP_DSS_CHANNEL_DIGIT */
124         OMAP_DISPLAY_TYPE_VENC,
125 };
126
127 static const enum omap_display_type omap3430_dss_supported_displays[] = {
128         /* OMAP_DSS_CHANNEL_LCD */
129         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
130         OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
131
132         /* OMAP_DSS_CHANNEL_DIGIT */
133         OMAP_DISPLAY_TYPE_VENC,
134 };
135
136 static const enum omap_display_type omap3630_dss_supported_displays[] = {
137         /* OMAP_DSS_CHANNEL_LCD */
138         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
139         OMAP_DISPLAY_TYPE_DSI,
140
141         /* OMAP_DSS_CHANNEL_DIGIT */
142         OMAP_DISPLAY_TYPE_VENC,
143 };
144
145 static const enum omap_display_type am43xx_dss_supported_displays[] = {
146         /* OMAP_DSS_CHANNEL_LCD */
147         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
148 };
149
150 static const enum omap_display_type omap4_dss_supported_displays[] = {
151         /* OMAP_DSS_CHANNEL_LCD */
152         OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
153
154         /* OMAP_DSS_CHANNEL_DIGIT */
155         OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
156
157         /* OMAP_DSS_CHANNEL_LCD2 */
158         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
159         OMAP_DISPLAY_TYPE_DSI,
160 };
161
162 static const enum omap_display_type omap5_dss_supported_displays[] = {
163         /* OMAP_DSS_CHANNEL_LCD */
164         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
165         OMAP_DISPLAY_TYPE_DSI,
166
167         /* OMAP_DSS_CHANNEL_DIGIT */
168         OMAP_DISPLAY_TYPE_HDMI | OMAP_DISPLAY_TYPE_DPI,
169
170         /* OMAP_DSS_CHANNEL_LCD2 */
171         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
172         OMAP_DISPLAY_TYPE_DSI,
173 };
174
175 static const enum omap_dss_output_id omap2_dss_supported_outputs[] = {
176         /* OMAP_DSS_CHANNEL_LCD */
177         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
178
179         /* OMAP_DSS_CHANNEL_DIGIT */
180         OMAP_DSS_OUTPUT_VENC,
181 };
182
183 static const enum omap_dss_output_id omap3430_dss_supported_outputs[] = {
184         /* OMAP_DSS_CHANNEL_LCD */
185         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
186         OMAP_DSS_OUTPUT_SDI | OMAP_DSS_OUTPUT_DSI1,
187
188         /* OMAP_DSS_CHANNEL_DIGIT */
189         OMAP_DSS_OUTPUT_VENC,
190 };
191
192 static const enum omap_dss_output_id omap3630_dss_supported_outputs[] = {
193         /* OMAP_DSS_CHANNEL_LCD */
194         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
195         OMAP_DSS_OUTPUT_DSI1,
196
197         /* OMAP_DSS_CHANNEL_DIGIT */
198         OMAP_DSS_OUTPUT_VENC,
199 };
200
201 static const enum omap_dss_output_id am43xx_dss_supported_outputs[] = {
202         /* OMAP_DSS_CHANNEL_LCD */
203         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
204 };
205
206 static const enum omap_dss_output_id omap4_dss_supported_outputs[] = {
207         /* OMAP_DSS_CHANNEL_LCD */
208         OMAP_DSS_OUTPUT_DBI | OMAP_DSS_OUTPUT_DSI1,
209
210         /* OMAP_DSS_CHANNEL_DIGIT */
211         OMAP_DSS_OUTPUT_VENC | OMAP_DSS_OUTPUT_HDMI,
212
213         /* OMAP_DSS_CHANNEL_LCD2 */
214         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
215         OMAP_DSS_OUTPUT_DSI2,
216 };
217
218 static const enum omap_dss_output_id omap5_dss_supported_outputs[] = {
219         /* OMAP_DSS_CHANNEL_LCD */
220         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
221         OMAP_DSS_OUTPUT_DSI1 | OMAP_DSS_OUTPUT_DSI2,
222
223         /* OMAP_DSS_CHANNEL_DIGIT */
224         OMAP_DSS_OUTPUT_HDMI,
225
226         /* OMAP_DSS_CHANNEL_LCD2 */
227         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
228         OMAP_DSS_OUTPUT_DSI1,
229
230         /* OMAP_DSS_CHANNEL_LCD3 */
231         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
232         OMAP_DSS_OUTPUT_DSI2,
233 };
234
235 static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
236         /* OMAP_DSS_GFX */
237         OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
238         OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
239         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
240         OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
241
242         /* OMAP_DSS_VIDEO1 */
243         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
244         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
245         OMAP_DSS_COLOR_UYVY,
246
247         /* OMAP_DSS_VIDEO2 */
248         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
249         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
250         OMAP_DSS_COLOR_UYVY,
251 };
252
253 static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
254         /* OMAP_DSS_GFX */
255         OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
256         OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
257         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
258         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
259         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
260         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
261
262         /* OMAP_DSS_VIDEO1 */
263         OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
264         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
265         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
266
267         /* OMAP_DSS_VIDEO2 */
268         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
269         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
270         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
271         OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
272         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
273 };
274
275 static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
276         /* OMAP_DSS_GFX */
277         OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
278         OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
279         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
280         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
281         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
282         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
283         OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
284         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
285
286         /* OMAP_DSS_VIDEO1 */
287         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
288         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
289         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
290         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
291         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
292         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
293         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
294         OMAP_DSS_COLOR_RGBX32,
295
296        /* OMAP_DSS_VIDEO2 */
297         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
298         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
299         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
300         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
301         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
302         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
303         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
304         OMAP_DSS_COLOR_RGBX32,
305
306         /* OMAP_DSS_VIDEO3 */
307         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
308         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
309         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
310         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
311         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
312         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
313         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
314         OMAP_DSS_COLOR_RGBX32,
315
316         /* OMAP_DSS_WB */
317         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
318         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
319         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
320         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
321         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
322         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
323         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
324         OMAP_DSS_COLOR_RGBX32,
325 };
326
327 static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
328         /* OMAP_DSS_GFX */
329         OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
330
331         /* OMAP_DSS_VIDEO1 */
332         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
333                 OMAP_DSS_OVL_CAP_REPLICATION,
334
335         /* OMAP_DSS_VIDEO2 */
336         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
337                 OMAP_DSS_OVL_CAP_REPLICATION,
338 };
339
340 static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = {
341         /* OMAP_DSS_GFX */
342         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_POS |
343                 OMAP_DSS_OVL_CAP_REPLICATION,
344
345         /* OMAP_DSS_VIDEO1 */
346         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
347                 OMAP_DSS_OVL_CAP_REPLICATION,
348
349         /* OMAP_DSS_VIDEO2 */
350         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
351                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
352 };
353
354 static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = {
355         /* OMAP_DSS_GFX */
356         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
357                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
358
359         /* OMAP_DSS_VIDEO1 */
360         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
361                 OMAP_DSS_OVL_CAP_REPLICATION,
362
363         /* OMAP_DSS_VIDEO2 */
364         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
365                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_POS |
366                 OMAP_DSS_OVL_CAP_REPLICATION,
367 };
368
369 static const enum omap_overlay_caps omap4_dss_overlay_caps[] = {
370         /* OMAP_DSS_GFX */
371         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
372                 OMAP_DSS_OVL_CAP_ZORDER | OMAP_DSS_OVL_CAP_POS |
373                 OMAP_DSS_OVL_CAP_REPLICATION,
374
375         /* OMAP_DSS_VIDEO1 */
376         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
377                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
378                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
379
380         /* OMAP_DSS_VIDEO2 */
381         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
382                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
383                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
384
385         /* OMAP_DSS_VIDEO3 */
386         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
387                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
388                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
389 };
390
391 static const char * const omap2_dss_clk_source_names[] = {
392         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "N/A",
393         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "N/A",
394         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS_FCLK1",
395 };
396
397 static const char * const omap3_dss_clk_source_names[] = {
398         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "DSI1_PLL_FCLK",
399         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "DSI2_PLL_FCLK",
400         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS1_ALWON_FCLK",
401 };
402
403 static const char * const omap4_dss_clk_source_names[] = {
404         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "PLL1_CLK1",
405         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "PLL1_CLK2",
406         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS_FCLK",
407         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
408         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI]   = "PLL2_CLK2",
409 };
410
411 static const char * const omap5_dss_clk_source_names[] = {
412         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "DPLL_DSI1_A_CLK1",
413         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "DPLL_DSI1_A_CLK2",
414         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS_CLK",
415         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "DPLL_DSI1_C_CLK1",
416         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI]   = "DPLL_DSI1_C_CLK2",
417 };
418
419 static const struct dss_param_range omap2_dss_param_range[] = {
420         [FEAT_PARAM_DSS_FCK]                    = { 0, 133000000 },
421         [FEAT_PARAM_DSS_PCD]                    = { 2, 255 },
422         [FEAT_PARAM_DOWNSCALE]                  = { 1, 2 },
423         /*
424          * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC
425          * scaler cannot scale a image with width more than 768.
426          */
427         [FEAT_PARAM_LINEWIDTH]                  = { 1, 768 },
428 };
429
430 static const struct dss_param_range omap3_dss_param_range[] = {
431         [FEAT_PARAM_DSS_FCK]                    = { 0, 173000000 },
432         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
433         [FEAT_PARAM_DSIPLL_LPDIV]               = { 1, (1 << 13) - 1},
434         [FEAT_PARAM_DSI_FCK]                    = { 0, 173000000 },
435         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
436         [FEAT_PARAM_LINEWIDTH]                  = { 1, 1024 },
437 };
438
439 static const struct dss_param_range am43xx_dss_param_range[] = {
440         [FEAT_PARAM_DSS_FCK]                    = { 0, 200000000 },
441         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
442         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
443         [FEAT_PARAM_LINEWIDTH]                  = { 1, 1024 },
444 };
445
446 static const struct dss_param_range omap4_dss_param_range[] = {
447         [FEAT_PARAM_DSS_FCK]                    = { 0, 186000000 },
448         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
449         [FEAT_PARAM_DSIPLL_LPDIV]               = { 0, (1 << 13) - 1 },
450         [FEAT_PARAM_DSI_FCK]                    = { 0, 170000000 },
451         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
452         [FEAT_PARAM_LINEWIDTH]                  = { 1, 2048 },
453 };
454
455 static const struct dss_param_range omap5_dss_param_range[] = {
456         [FEAT_PARAM_DSS_FCK]                    = { 0, 209250000 },
457         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
458         [FEAT_PARAM_DSIPLL_LPDIV]               = { 0, (1 << 13) - 1 },
459         [FEAT_PARAM_DSI_FCK]                    = { 0, 209250000 },
460         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
461         [FEAT_PARAM_LINEWIDTH]                  = { 1, 2048 },
462 };
463
464 static const enum dss_feat_id omap2_dss_feat_list[] = {
465         FEAT_LCDENABLEPOL,
466         FEAT_LCDENABLESIGNAL,
467         FEAT_PCKFREEENABLE,
468         FEAT_FUNCGATED,
469         FEAT_ROWREPEATENABLE,
470         FEAT_RESIZECONF,
471 };
472
473 static const enum dss_feat_id omap3430_dss_feat_list[] = {
474         FEAT_LCDENABLEPOL,
475         FEAT_LCDENABLESIGNAL,
476         FEAT_PCKFREEENABLE,
477         FEAT_FUNCGATED,
478         FEAT_LINEBUFFERSPLIT,
479         FEAT_ROWREPEATENABLE,
480         FEAT_RESIZECONF,
481         FEAT_DSI_REVERSE_TXCLKESC,
482         FEAT_VENC_REQUIRES_TV_DAC_CLK,
483         FEAT_CPR,
484         FEAT_PRELOAD,
485         FEAT_FIR_COEF_V,
486         FEAT_ALPHA_FIXED_ZORDER,
487         FEAT_FIFO_MERGE,
488         FEAT_OMAP3_DSI_FIFO_BUG,
489         FEAT_DPI_USES_VDDS_DSI,
490 };
491
492 static const enum dss_feat_id am35xx_dss_feat_list[] = {
493         FEAT_LCDENABLEPOL,
494         FEAT_LCDENABLESIGNAL,
495         FEAT_PCKFREEENABLE,
496         FEAT_FUNCGATED,
497         FEAT_LINEBUFFERSPLIT,
498         FEAT_ROWREPEATENABLE,
499         FEAT_RESIZECONF,
500         FEAT_DSI_REVERSE_TXCLKESC,
501         FEAT_VENC_REQUIRES_TV_DAC_CLK,
502         FEAT_CPR,
503         FEAT_PRELOAD,
504         FEAT_FIR_COEF_V,
505         FEAT_ALPHA_FIXED_ZORDER,
506         FEAT_FIFO_MERGE,
507         FEAT_OMAP3_DSI_FIFO_BUG,
508 };
509
510 static const enum dss_feat_id am43xx_dss_feat_list[] = {
511         FEAT_LCDENABLEPOL,
512         FEAT_LCDENABLESIGNAL,
513         FEAT_PCKFREEENABLE,
514         FEAT_FUNCGATED,
515         FEAT_LINEBUFFERSPLIT,
516         FEAT_ROWREPEATENABLE,
517         FEAT_RESIZECONF,
518         FEAT_CPR,
519         FEAT_PRELOAD,
520         FEAT_FIR_COEF_V,
521         FEAT_ALPHA_FIXED_ZORDER,
522         FEAT_FIFO_MERGE,
523 };
524
525 static const enum dss_feat_id omap3630_dss_feat_list[] = {
526         FEAT_LCDENABLEPOL,
527         FEAT_LCDENABLESIGNAL,
528         FEAT_PCKFREEENABLE,
529         FEAT_FUNCGATED,
530         FEAT_LINEBUFFERSPLIT,
531         FEAT_ROWREPEATENABLE,
532         FEAT_RESIZECONF,
533         FEAT_DSI_PLL_PWR_BUG,
534         FEAT_CPR,
535         FEAT_PRELOAD,
536         FEAT_FIR_COEF_V,
537         FEAT_ALPHA_FIXED_ZORDER,
538         FEAT_FIFO_MERGE,
539         FEAT_OMAP3_DSI_FIFO_BUG,
540         FEAT_DPI_USES_VDDS_DSI,
541 };
542
543 static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = {
544         FEAT_MGR_LCD2,
545         FEAT_CORE_CLK_DIV,
546         FEAT_LCD_CLK_SRC,
547         FEAT_DSI_DCS_CMD_CONFIG_VC,
548         FEAT_DSI_VC_OCP_WIDTH,
549         FEAT_DSI_GNQ,
550         FEAT_HANDLE_UV_SEPARATE,
551         FEAT_ATTR2,
552         FEAT_CPR,
553         FEAT_PRELOAD,
554         FEAT_FIR_COEF_V,
555         FEAT_ALPHA_FREE_ZORDER,
556         FEAT_FIFO_MERGE,
557         FEAT_BURST_2D,
558 };
559
560 static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = {
561         FEAT_MGR_LCD2,
562         FEAT_CORE_CLK_DIV,
563         FEAT_LCD_CLK_SRC,
564         FEAT_DSI_DCS_CMD_CONFIG_VC,
565         FEAT_DSI_VC_OCP_WIDTH,
566         FEAT_DSI_GNQ,
567         FEAT_HDMI_CTS_SWMODE,
568         FEAT_HANDLE_UV_SEPARATE,
569         FEAT_ATTR2,
570         FEAT_CPR,
571         FEAT_PRELOAD,
572         FEAT_FIR_COEF_V,
573         FEAT_ALPHA_FREE_ZORDER,
574         FEAT_FIFO_MERGE,
575         FEAT_BURST_2D,
576 };
577
578 static const enum dss_feat_id omap4_dss_feat_list[] = {
579         FEAT_MGR_LCD2,
580         FEAT_CORE_CLK_DIV,
581         FEAT_LCD_CLK_SRC,
582         FEAT_DSI_DCS_CMD_CONFIG_VC,
583         FEAT_DSI_VC_OCP_WIDTH,
584         FEAT_DSI_GNQ,
585         FEAT_HDMI_CTS_SWMODE,
586         FEAT_HDMI_AUDIO_USE_MCLK,
587         FEAT_HANDLE_UV_SEPARATE,
588         FEAT_ATTR2,
589         FEAT_CPR,
590         FEAT_PRELOAD,
591         FEAT_FIR_COEF_V,
592         FEAT_ALPHA_FREE_ZORDER,
593         FEAT_FIFO_MERGE,
594         FEAT_BURST_2D,
595 };
596
597 static const enum dss_feat_id omap5_dss_feat_list[] = {
598         FEAT_MGR_LCD2,
599         FEAT_MGR_LCD3,
600         FEAT_CORE_CLK_DIV,
601         FEAT_LCD_CLK_SRC,
602         FEAT_DSI_DCS_CMD_CONFIG_VC,
603         FEAT_DSI_VC_OCP_WIDTH,
604         FEAT_DSI_GNQ,
605         FEAT_HDMI_CTS_SWMODE,
606         FEAT_HDMI_AUDIO_USE_MCLK,
607         FEAT_HANDLE_UV_SEPARATE,
608         FEAT_ATTR2,
609         FEAT_CPR,
610         FEAT_PRELOAD,
611         FEAT_FIR_COEF_V,
612         FEAT_ALPHA_FREE_ZORDER,
613         FEAT_FIFO_MERGE,
614         FEAT_BURST_2D,
615         FEAT_DSI_PHY_DCC,
616         FEAT_MFLAG,
617 };
618
619 /* OMAP2 DSS Features */
620 static const struct omap_dss_features omap2_dss_features = {
621         .reg_fields = omap2_dss_reg_fields,
622         .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
623
624         .features = omap2_dss_feat_list,
625         .num_features = ARRAY_SIZE(omap2_dss_feat_list),
626
627         .num_mgrs = 2,
628         .num_ovls = 3,
629         .supported_displays = omap2_dss_supported_displays,
630         .supported_outputs = omap2_dss_supported_outputs,
631         .supported_color_modes = omap2_dss_supported_color_modes,
632         .overlay_caps = omap2_dss_overlay_caps,
633         .clksrc_names = omap2_dss_clk_source_names,
634         .dss_params = omap2_dss_param_range,
635         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
636         .buffer_size_unit = 1,
637         .burst_size_unit = 8,
638 };
639
640 /* OMAP3 DSS Features */
641 static const struct omap_dss_features omap3430_dss_features = {
642         .reg_fields = omap3_dss_reg_fields,
643         .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
644
645         .features = omap3430_dss_feat_list,
646         .num_features = ARRAY_SIZE(omap3430_dss_feat_list),
647
648         .num_mgrs = 2,
649         .num_ovls = 3,
650         .supported_displays = omap3430_dss_supported_displays,
651         .supported_outputs = omap3430_dss_supported_outputs,
652         .supported_color_modes = omap3_dss_supported_color_modes,
653         .overlay_caps = omap3430_dss_overlay_caps,
654         .clksrc_names = omap3_dss_clk_source_names,
655         .dss_params = omap3_dss_param_range,
656         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
657         .buffer_size_unit = 1,
658         .burst_size_unit = 8,
659 };
660
661 /*
662  * AM35xx DSS Features. This is basically OMAP3 DSS Features without the
663  * vdds_dsi regulator.
664  */
665 static const struct omap_dss_features am35xx_dss_features = {
666         .reg_fields = omap3_dss_reg_fields,
667         .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
668
669         .features = am35xx_dss_feat_list,
670         .num_features = ARRAY_SIZE(am35xx_dss_feat_list),
671
672         .num_mgrs = 2,
673         .num_ovls = 3,
674         .supported_displays = omap3430_dss_supported_displays,
675         .supported_outputs = omap3430_dss_supported_outputs,
676         .supported_color_modes = omap3_dss_supported_color_modes,
677         .overlay_caps = omap3430_dss_overlay_caps,
678         .clksrc_names = omap3_dss_clk_source_names,
679         .dss_params = omap3_dss_param_range,
680         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
681         .buffer_size_unit = 1,
682         .burst_size_unit = 8,
683 };
684
685 static const struct omap_dss_features am43xx_dss_features = {
686         .reg_fields = am43xx_dss_reg_fields,
687         .num_reg_fields = ARRAY_SIZE(am43xx_dss_reg_fields),
688
689         .features = am43xx_dss_feat_list,
690         .num_features = ARRAY_SIZE(am43xx_dss_feat_list),
691
692         .num_mgrs = 1,
693         .num_ovls = 3,
694         .supported_displays = am43xx_dss_supported_displays,
695         .supported_outputs = am43xx_dss_supported_outputs,
696         .supported_color_modes = omap3_dss_supported_color_modes,
697         .overlay_caps = omap3430_dss_overlay_caps,
698         .clksrc_names = omap2_dss_clk_source_names,
699         .dss_params = am43xx_dss_param_range,
700         .supported_rotation_types = OMAP_DSS_ROT_DMA,
701         .buffer_size_unit = 1,
702         .burst_size_unit = 8,
703 };
704
705 static const struct omap_dss_features omap3630_dss_features = {
706         .reg_fields = omap3_dss_reg_fields,
707         .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
708
709         .features = omap3630_dss_feat_list,
710         .num_features = ARRAY_SIZE(omap3630_dss_feat_list),
711
712         .num_mgrs = 2,
713         .num_ovls = 3,
714         .supported_displays = omap3630_dss_supported_displays,
715         .supported_outputs = omap3630_dss_supported_outputs,
716         .supported_color_modes = omap3_dss_supported_color_modes,
717         .overlay_caps = omap3630_dss_overlay_caps,
718         .clksrc_names = omap3_dss_clk_source_names,
719         .dss_params = omap3_dss_param_range,
720         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
721         .buffer_size_unit = 1,
722         .burst_size_unit = 8,
723 };
724
725 /* OMAP4 DSS Features */
726 /* For OMAP4430 ES 1.0 revision */
727 static const struct omap_dss_features omap4430_es1_0_dss_features  = {
728         .reg_fields = omap4_dss_reg_fields,
729         .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
730
731         .features = omap4430_es1_0_dss_feat_list,
732         .num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list),
733
734         .num_mgrs = 3,
735         .num_ovls = 4,
736         .supported_displays = omap4_dss_supported_displays,
737         .supported_outputs = omap4_dss_supported_outputs,
738         .supported_color_modes = omap4_dss_supported_color_modes,
739         .overlay_caps = omap4_dss_overlay_caps,
740         .clksrc_names = omap4_dss_clk_source_names,
741         .dss_params = omap4_dss_param_range,
742         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
743         .buffer_size_unit = 16,
744         .burst_size_unit = 16,
745 };
746
747 /* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */
748 static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
749         .reg_fields = omap4_dss_reg_fields,
750         .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
751
752         .features = omap4430_es2_0_1_2_dss_feat_list,
753         .num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list),
754
755         .num_mgrs = 3,
756         .num_ovls = 4,
757         .supported_displays = omap4_dss_supported_displays,
758         .supported_outputs = omap4_dss_supported_outputs,
759         .supported_color_modes = omap4_dss_supported_color_modes,
760         .overlay_caps = omap4_dss_overlay_caps,
761         .clksrc_names = omap4_dss_clk_source_names,
762         .dss_params = omap4_dss_param_range,
763         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
764         .buffer_size_unit = 16,
765         .burst_size_unit = 16,
766 };
767
768 /* For all the other OMAP4 versions */
769 static const struct omap_dss_features omap4_dss_features = {
770         .reg_fields = omap4_dss_reg_fields,
771         .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
772
773         .features = omap4_dss_feat_list,
774         .num_features = ARRAY_SIZE(omap4_dss_feat_list),
775
776         .num_mgrs = 3,
777         .num_ovls = 4,
778         .supported_displays = omap4_dss_supported_displays,
779         .supported_outputs = omap4_dss_supported_outputs,
780         .supported_color_modes = omap4_dss_supported_color_modes,
781         .overlay_caps = omap4_dss_overlay_caps,
782         .clksrc_names = omap4_dss_clk_source_names,
783         .dss_params = omap4_dss_param_range,
784         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
785         .buffer_size_unit = 16,
786         .burst_size_unit = 16,
787 };
788
789 /* OMAP5 DSS Features */
790 static const struct omap_dss_features omap5_dss_features = {
791         .reg_fields = omap5_dss_reg_fields,
792         .num_reg_fields = ARRAY_SIZE(omap5_dss_reg_fields),
793
794         .features = omap5_dss_feat_list,
795         .num_features = ARRAY_SIZE(omap5_dss_feat_list),
796
797         .num_mgrs = 4,
798         .num_ovls = 4,
799         .supported_displays = omap5_dss_supported_displays,
800         .supported_outputs = omap5_dss_supported_outputs,
801         .supported_color_modes = omap4_dss_supported_color_modes,
802         .overlay_caps = omap4_dss_overlay_caps,
803         .clksrc_names = omap5_dss_clk_source_names,
804         .dss_params = omap5_dss_param_range,
805         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
806         .buffer_size_unit = 16,
807         .burst_size_unit = 16,
808 };
809
810 /* Functions returning values related to a DSS feature */
811 int dss_feat_get_num_mgrs(void)
812 {
813         return omap_current_dss_features->num_mgrs;
814 }
815 EXPORT_SYMBOL(dss_feat_get_num_mgrs);
816
817 int dss_feat_get_num_ovls(void)
818 {
819         return omap_current_dss_features->num_ovls;
820 }
821 EXPORT_SYMBOL(dss_feat_get_num_ovls);
822
823 unsigned long dss_feat_get_param_min(enum dss_range_param param)
824 {
825         return omap_current_dss_features->dss_params[param].min;
826 }
827
828 unsigned long dss_feat_get_param_max(enum dss_range_param param)
829 {
830         return omap_current_dss_features->dss_params[param].max;
831 }
832
833 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
834 {
835         return omap_current_dss_features->supported_displays[channel];
836 }
837
838 enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel)
839 {
840         return omap_current_dss_features->supported_outputs[channel];
841 }
842
843 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
844 {
845         return omap_current_dss_features->supported_color_modes[plane];
846 }
847 EXPORT_SYMBOL(dss_feat_get_supported_color_modes);
848
849 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
850 {
851         return omap_current_dss_features->overlay_caps[plane];
852 }
853
854 bool dss_feat_color_mode_supported(enum omap_plane plane,
855                 enum omap_color_mode color_mode)
856 {
857         return omap_current_dss_features->supported_color_modes[plane] &
858                         color_mode;
859 }
860
861 const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
862 {
863         return omap_current_dss_features->clksrc_names[id];
864 }
865
866 u32 dss_feat_get_buffer_size_unit(void)
867 {
868         return omap_current_dss_features->buffer_size_unit;
869 }
870
871 u32 dss_feat_get_burst_size_unit(void)
872 {
873         return omap_current_dss_features->burst_size_unit;
874 }
875
876 /* DSS has_feature check */
877 bool dss_has_feature(enum dss_feat_id id)
878 {
879         int i;
880         const enum dss_feat_id *features = omap_current_dss_features->features;
881         const int num_features = omap_current_dss_features->num_features;
882
883         for (i = 0; i < num_features; i++) {
884                 if (features[i] == id)
885                         return true;
886         }
887
888         return false;
889 }
890
891 void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
892 {
893         if (id >= omap_current_dss_features->num_reg_fields)
894                 BUG();
895
896         *start = omap_current_dss_features->reg_fields[id].start;
897         *end = omap_current_dss_features->reg_fields[id].end;
898 }
899
900 bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
901 {
902         return omap_current_dss_features->supported_rotation_types & rot_type;
903 }
904
905 void dss_features_init(enum omapdss_version version)
906 {
907         switch (version) {
908         case OMAPDSS_VER_OMAP24xx:
909                 omap_current_dss_features = &omap2_dss_features;
910                 break;
911
912         case OMAPDSS_VER_OMAP34xx_ES1:
913         case OMAPDSS_VER_OMAP34xx_ES3:
914                 omap_current_dss_features = &omap3430_dss_features;
915                 break;
916
917         case OMAPDSS_VER_OMAP3630:
918                 omap_current_dss_features = &omap3630_dss_features;
919                 break;
920
921         case OMAPDSS_VER_OMAP4430_ES1:
922                 omap_current_dss_features = &omap4430_es1_0_dss_features;
923                 break;
924
925         case OMAPDSS_VER_OMAP4430_ES2:
926                 omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
927                 break;
928
929         case OMAPDSS_VER_OMAP4:
930                 omap_current_dss_features = &omap4_dss_features;
931                 break;
932
933         case OMAPDSS_VER_OMAP5:
934         case OMAPDSS_VER_DRA7xx:
935                 omap_current_dss_features = &omap5_dss_features;
936                 break;
937
938         case OMAPDSS_VER_AM35xx:
939                 omap_current_dss_features = &am35xx_dss_features;
940                 break;
941
942         case OMAPDSS_VER_AM43xx:
943                 omap_current_dss_features = &am43xx_dss_features;
944                 break;
945
946         default:
947                 DSSWARN("Unsupported OMAP version");
948                 break;
949         }
950 }