drivers/gpu/drm/omapdrm/dss/hdmi5.c

   1 /*
   2  * HDMI driver for OMAP5
   3  *
   4  * Copyright (C) 2014 Texas Instruments Incorporated
   5  *
   6  * Authors:
   7  *      Yong Zhi
   8  *      Mythri pk
   9  *      Archit Taneja <archit@ti.com>
  10  *      Tomi Valkeinen <tomi.valkeinen@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify it
  13  * under the terms of the GNU General Public License version 2 as published by
  14  * the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  *
  21  * You should have received a copy of the GNU General Public License along with
  22  * this program.  If not, see <http://www.gnu.org/licenses/>.
  23  */
  24
  25 #define DSS_SUBSYS_NAME "HDMI"
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/err.h>
  30 #include <linux/io.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/mutex.h>
  33 #include <linux/delay.h>
  34 #include <linux/string.h>
  35 #include <linux/platform_device.h>
  36 #include <linux/pm_runtime.h>
  37 #include <linux/clk.h>
  38 #include <linux/gpio.h>
  39 #include <linux/regulator/consumer.h>
  40 #include <linux/component.h>
  41 #include <video/omapdss.h>
  42 #include <sound/omap-hdmi-audio.h>
  43
  44 #include "hdmi5_core.h"
  45 #include "dss.h"
  46 #include "dss_features.h"
  47
  48 static struct omap_hdmi hdmi;
  49
  50 static int hdmi_runtime_get(void)
  51 {
  52         int r;
  53
  54         DSSDBG("hdmi_runtime_get\n");
  55
  56         r = pm_runtime_get_sync(&hdmi.pdev->dev);
  57         WARN_ON(r < 0);
  58         if (r < 0)
  59                 return r;
  60
  61         return 0;
  62 }
  63
  64 static void hdmi_runtime_put(void)
  65 {
  66         int r;
  67
  68         DSSDBG("hdmi_runtime_put\n");
  69
  70         r = pm_runtime_put_sync(&hdmi.pdev->dev);
  71         WARN_ON(r < 0 && r != -ENOSYS);
  72 }
  73
  74 static irqreturn_t hdmi_irq_handler(int irq, void *data)
  75 {
  76         struct hdmi_wp_data *wp = data;
  77         u32 irqstatus;
  78
  79         irqstatus = hdmi_wp_get_irqstatus(wp);
  80         hdmi_wp_set_irqstatus(wp, irqstatus);
  81
  82         if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  83                         irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  84                 u32 v;
  85                 /*
  86                  * If we get both connect and disconnect interrupts at the same
  87                  * time, turn off the PHY, clear interrupts, and restart, which
  88                  * raises connect interrupt if a cable is connected, or nothing
  89                  * if cable is not connected.
  90                  */
  91
  92                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  93
  94                 /*
  95                  * We always get bogus CONNECT & DISCONNECT interrupts when
  96                  * setting the PHY to LDOON. To ignore those, we force the RXDET
  97                  * line to 0 until the PHY power state has been changed.
  98                  */
  99                 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
 100                 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
 101                 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
 102                 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
 103
 104                 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
 105                                 HDMI_IRQ_LINK_DISCONNECT);
 106
 107                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 108
 109                 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
 110
 111         } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
 112                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
 113         } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
 114                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 115         }
 116
 117         return IRQ_HANDLED;
 118 }
 119
 120 static int hdmi_init_regulator(void)
 121 {
 122         int r;
 123         struct regulator *reg;
 124
 125         if (hdmi.vdda_reg != NULL)
 126                 return 0;
 127
 128         reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
 129         if (IS_ERR(reg)) {
 130                 DSSERR("can't get VDDA regulator\n");
 131                 return PTR_ERR(reg);
 132         }
 133
 134         if (regulator_can_change_voltage(reg)) {
 135                 r = regulator_set_voltage(reg, 1800000, 1800000);
 136                 if (r) {
 137                         devm_regulator_put(reg);
 138                         DSSWARN("can't set the regulator voltage\n");
 139                         return r;
 140                 }
 141         }
 142
 143         hdmi.vdda_reg = reg;
 144
 145         return 0;
 146 }
 147
 148 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
 149 {
 150         int r;
 151
 152         r = regulator_enable(hdmi.vdda_reg);
 153         if (r)
 154                 return r;
 155
 156         r = hdmi_runtime_get();
 157         if (r)
 158                 goto err_runtime_get;
 159
 160         /* Make selection of HDMI in DSS */
 161         dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
 162
 163         hdmi.core_enabled = true;
 164
 165         return 0;
 166
 167 err_runtime_get:
 168         regulator_disable(hdmi.vdda_reg);
 169
 170         return r;
 171 }
 172
 173 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
 174 {
 175         hdmi.core_enabled = false;
 176
 177         hdmi_runtime_put();
 178         regulator_disable(hdmi.vdda_reg);
 179 }
 180
 181 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
 182 {
 183         int r;
 184         struct omap_video_timings *p;
 185         struct omap_overlay_manager *mgr = hdmi.output.manager;
 186         struct dss_pll_clock_info hdmi_cinfo = { 0 };
 187         unsigned pc;
 188
 189         r = hdmi_power_on_core(dssdev);
 190         if (r)
 191                 return r;
 192
 193         p = &hdmi.cfg.timings;
 194
 195         DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
 196
 197         pc = p->pixelclock;
 198         if (p->double_pixel)
 199                 pc *= 2;
 200
 201         hdmi_pll_compute(&hdmi.pll, pc, &hdmi_cinfo);
 202
 203         /* disable and clear irqs */
 204         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 205         hdmi_wp_set_irqstatus(&hdmi.wp,
 206                         hdmi_wp_get_irqstatus(&hdmi.wp));
 207
 208         r = dss_pll_enable(&hdmi.pll.pll);
 209         if (r) {
 210                 DSSERR("Failed to enable PLL\n");
 211                 goto err_pll_enable;
 212         }
 213
 214         r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
 215         if (r) {
 216                 DSSERR("Failed to configure PLL\n");
 217                 goto err_pll_cfg;
 218         }
 219
 220         r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
 221                 hdmi_cinfo.clkout[0]);
 222         if (r) {
 223                 DSSDBG("Failed to start PHY\n");
 224                 goto err_phy_cfg;
 225         }
 226
 227         r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
 228         if (r)
 229                 goto err_phy_pwr;
 230
 231         hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
 232
 233         /* bypass TV gamma table */
 234         dispc_enable_gamma_table(0);
 235
 236         /* tv size */
 237         dss_mgr_set_timings(mgr, p);
 238
 239         r = dss_mgr_enable(mgr);
 240         if (r)
 241                 goto err_mgr_enable;
 242
 243         r = hdmi_wp_video_start(&hdmi.wp);
 244         if (r)
 245                 goto err_vid_enable;
 246
 247         hdmi_wp_set_irqenable(&hdmi.wp,
 248                         HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
 249
 250         return 0;
 251
 252 err_vid_enable:
 253         dss_mgr_disable(mgr);
 254 err_mgr_enable:
 255         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 256 err_phy_pwr:
 257 err_phy_cfg:
 258 err_pll_cfg:
 259         dss_pll_disable(&hdmi.pll.pll);
 260 err_pll_enable:
 261         hdmi_power_off_core(dssdev);
 262         return -EIO;
 263 }
 264
 265 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
 266 {
 267         struct omap_overlay_manager *mgr = hdmi.output.manager;
 268
 269         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 270
 271         hdmi_wp_video_stop(&hdmi.wp);
 272
 273         dss_mgr_disable(mgr);
 274
 275         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 276
 277         dss_pll_disable(&hdmi.pll.pll);
 278
 279         hdmi_power_off_core(dssdev);
 280 }
 281
 282 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
 283                                         struct omap_video_timings *timings)
 284 {
 285         struct omap_dss_device *out = &hdmi.output;
 286
 287         if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
 288                 return -EINVAL;
 289
 290         return 0;
 291 }
 292
 293 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
 294                 struct omap_video_timings *timings)
 295 {
 296         mutex_lock(&hdmi.lock);
 297
 298         hdmi.cfg.timings = *timings;
 299
 300         dispc_set_tv_pclk(timings->pixelclock);
 301
 302         mutex_unlock(&hdmi.lock);
 303 }
 304
 305 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
 306                 struct omap_video_timings *timings)
 307 {
 308         *timings = hdmi.cfg.timings;
 309 }
 310
 311 static void hdmi_dump_regs(struct seq_file *s)
 312 {
 313         mutex_lock(&hdmi.lock);
 314
 315         if (hdmi_runtime_get()) {
 316                 mutex_unlock(&hdmi.lock);
 317                 return;
 318         }
 319
 320         hdmi_wp_dump(&hdmi.wp, s);
 321         hdmi_pll_dump(&hdmi.pll, s);
 322         hdmi_phy_dump(&hdmi.phy, s);
 323         hdmi5_core_dump(&hdmi.core, s);
 324
 325         hdmi_runtime_put();
 326         mutex_unlock(&hdmi.lock);
 327 }
 328
 329 static int read_edid(u8 *buf, int len)
 330 {
 331         int r;
 332         int idlemode;
 333
 334         mutex_lock(&hdmi.lock);
 335
 336         r = hdmi_runtime_get();
 337         BUG_ON(r);
 338
 339         idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 340         /* No-idle mode */
 341         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 342
 343         r = hdmi5_read_edid(&hdmi.core,  buf, len);
 344
 345         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
 346
 347         hdmi_runtime_put();
 348         mutex_unlock(&hdmi.lock);
 349
 350         return r;
 351 }
 352
 353 static void hdmi_start_audio_stream(struct omap_hdmi *hd)
 354 {
 355         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 356         hdmi_wp_audio_enable(&hd->wp, true);
 357         hdmi_wp_audio_core_req_enable(&hd->wp, true);
 358 }
 359
 360 static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
 361 {
 362         hdmi_wp_audio_core_req_enable(&hd->wp, false);
 363         hdmi_wp_audio_enable(&hd->wp, false);
 364         REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
 365 }
 366
 367 static int hdmi_display_enable(struct omap_dss_device *dssdev)
 368 {
 369         struct omap_dss_device *out = &hdmi.output;
 370         unsigned long flags;
 371         int r = 0;
 372
 373         DSSDBG("ENTER hdmi_display_enable\n");
 374
 375         mutex_lock(&hdmi.lock);
 376
 377         if (!out->dispc_channel_connected) {
 378                 DSSERR("failed to enable display: no output/manager\n");
 379                 r = -ENODEV;
 380                 goto err0;
 381         }
 382
 383         r = hdmi_power_on_full(dssdev);
 384         if (r) {
 385                 DSSERR("failed to power on device\n");
 386                 goto err0;
 387         }
 388
 389         if (hdmi.audio_configured) {
 390                 r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
 391                                        hdmi.cfg.timings.pixelclock);
 392                 if (r) {
 393                         DSSERR("Error restoring audio configuration: %d", r);
 394                         hdmi.audio_abort_cb(&hdmi.pdev->dev);
 395                         hdmi.audio_configured = false;
 396                 }
 397         }
 398
 399         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
 400         if (hdmi.audio_configured && hdmi.audio_playing)
 401                 hdmi_start_audio_stream(&hdmi);
 402         hdmi.display_enabled = true;
 403         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
 404
 405         mutex_unlock(&hdmi.lock);
 406         return 0;
 407
 408 err0:
 409         mutex_unlock(&hdmi.lock);
 410         return r;
 411 }
 412
 413 static void hdmi_display_disable(struct omap_dss_device *dssdev)
 414 {
 415         unsigned long flags;
 416
 417         DSSDBG("Enter hdmi_display_disable\n");
 418
 419         mutex_lock(&hdmi.lock);
 420
 421         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
 422         hdmi_stop_audio_stream(&hdmi);
 423         hdmi.display_enabled = false;
 424         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
 425
 426         hdmi_power_off_full(dssdev);
 427
 428         mutex_unlock(&hdmi.lock);
 429 }
 430
 431 static int hdmi_core_enable(struct omap_dss_device *dssdev)
 432 {
 433         int r = 0;
 434
 435         DSSDBG("ENTER omapdss_hdmi_core_enable\n");
 436
 437         mutex_lock(&hdmi.lock);
 438
 439         r = hdmi_power_on_core(dssdev);
 440         if (r) {
 441                 DSSERR("failed to power on device\n");
 442                 goto err0;
 443         }
 444
 445         mutex_unlock(&hdmi.lock);
 446         return 0;
 447
 448 err0:
 449         mutex_unlock(&hdmi.lock);
 450         return r;
 451 }
 452
 453 static void hdmi_core_disable(struct omap_dss_device *dssdev)
 454 {
 455         DSSDBG("Enter omapdss_hdmi_core_disable\n");
 456
 457         mutex_lock(&hdmi.lock);
 458
 459         hdmi_power_off_core(dssdev);
 460
 461         mutex_unlock(&hdmi.lock);
 462 }
 463
 464 static int hdmi_connect(struct omap_dss_device *dssdev,
 465                 struct omap_dss_device *dst)
 466 {
 467         struct omap_overlay_manager *mgr;
 468         int r;
 469
 470         r = hdmi_init_regulator();
 471         if (r)
 472                 return r;
 473
 474         mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
 475         if (!mgr)
 476                 return -ENODEV;
 477
 478         r = dss_mgr_connect(mgr->id, dssdev);
 479         if (r)
 480                 return r;
 481
 482         r = omapdss_output_set_device(dssdev, dst);
 483         if (r) {
 484                 DSSERR("failed to connect output to new device: %s\n",
 485                                 dst->name);
 486                 dss_mgr_disconnect(mgr, dssdev);
 487                 return r;
 488         }
 489
 490         return 0;
 491 }
 492
 493 static void hdmi_disconnect(struct omap_dss_device *dssdev,
 494                 struct omap_dss_device *dst)
 495 {
 496         WARN_ON(dst != dssdev->dst);
 497
 498         if (dst != dssdev->dst)
 499                 return;
 500
 501         omapdss_output_unset_device(dssdev);
 502
 503         if (dssdev->manager)
 504                 dss_mgr_disconnect(dssdev->manager, dssdev);
 505 }
 506
 507 static int hdmi_read_edid(struct omap_dss_device *dssdev,
 508                 u8 *edid, int len)
 509 {
 510         bool need_enable;
 511         int r;
 512
 513         need_enable = hdmi.core_enabled == false;
 514
 515         if (need_enable) {
 516                 r = hdmi_core_enable(dssdev);
 517                 if (r)
 518                         return r;
 519         }
 520
 521         r = read_edid(edid, len);
 522
 523         if (need_enable)
 524                 hdmi_core_disable(dssdev);
 525
 526         return r;
 527 }
 528
 529 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
 530                 const struct hdmi_avi_infoframe *avi)
 531 {
 532         hdmi.cfg.infoframe = *avi;
 533         return 0;
 534 }
 535
 536 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
 537                 bool hdmi_mode)
 538 {
 539         hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
 540         return 0;
 541 }
 542
 543 static const struct omapdss_hdmi_ops hdmi_ops = {
 544         .connect                = hdmi_connect,
 545         .disconnect             = hdmi_disconnect,
 546
 547         .enable                 = hdmi_display_enable,
 548         .disable                = hdmi_display_disable,
 549
 550         .check_timings          = hdmi_display_check_timing,
 551         .set_timings            = hdmi_display_set_timing,
 552         .get_timings            = hdmi_display_get_timings,
 553
 554         .read_edid              = hdmi_read_edid,
 555         .set_infoframe          = hdmi_set_infoframe,
 556         .set_hdmi_mode          = hdmi_set_hdmi_mode,
 557 };
 558
 559 static void hdmi_init_output(struct platform_device *pdev)
 560 {
 561         struct omap_dss_device *out = &hdmi.output;
 562
 563         out->dev = &pdev->dev;
 564         out->id = OMAP_DSS_OUTPUT_HDMI;
 565         out->output_type = OMAP_DISPLAY_TYPE_HDMI;
 566         out->name = "hdmi.0";
 567         out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
 568         out->ops.hdmi = &hdmi_ops;
 569         out->owner = THIS_MODULE;
 570
 571         omapdss_register_output(out);
 572 }
 573
 574 static void hdmi_uninit_output(struct platform_device *pdev)
 575 {
 576         struct omap_dss_device *out = &hdmi.output;
 577
 578         omapdss_unregister_output(out);
 579 }
 580
 581 static int hdmi_probe_of(struct platform_device *pdev)
 582 {
 583         struct device_node *node = pdev->dev.of_node;
 584         struct device_node *ep;
 585         int r;
 586
 587         ep = omapdss_of_get_first_endpoint(node);
 588         if (!ep)
 589                 return 0;
 590
 591         r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
 592         if (r)
 593                 goto err;
 594
 595         of_node_put(ep);
 596         return 0;
 597
 598 err:
 599         of_node_put(ep);
 600         return r;
 601 }
 602
 603 /* Audio callbacks */
 604 static int hdmi_audio_startup(struct device *dev,
 605                               void (*abort_cb)(struct device *dev))
 606 {
 607         struct omap_hdmi *hd = dev_get_drvdata(dev);
 608         int ret = 0;
 609
 610         mutex_lock(&hd->lock);
 611
 612         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 613                 ret = -EPERM;
 614                 goto out;
 615         }
 616
 617         hd->audio_abort_cb = abort_cb;
 618
 619 out:
 620         mutex_unlock(&hd->lock);
 621
 622         return ret;
 623 }
 624
 625 static int hdmi_audio_shutdown(struct device *dev)
 626 {
 627         struct omap_hdmi *hd = dev_get_drvdata(dev);
 628
 629         mutex_lock(&hd->lock);
 630         hd->audio_abort_cb = NULL;
 631         hd->audio_configured = false;
 632         hd->audio_playing = false;
 633         mutex_unlock(&hd->lock);
 634
 635         return 0;
 636 }
 637
 638 static int hdmi_audio_start(struct device *dev)
 639 {
 640         struct omap_hdmi *hd = dev_get_drvdata(dev);
 641         unsigned long flags;
 642
 643         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 644
 645         spin_lock_irqsave(&hd->audio_playing_lock, flags);
 646
 647         if (hd->display_enabled)
 648                 hdmi_start_audio_stream(hd);
 649         hd->audio_playing = true;
 650
 651         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
 652         return 0;
 653 }
 654
 655 static void hdmi_audio_stop(struct device *dev)
 656 {
 657         struct omap_hdmi *hd = dev_get_drvdata(dev);
 658         unsigned long flags;
 659
 660         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 661
 662         spin_lock_irqsave(&hd->audio_playing_lock, flags);
 663
 664         if (hd->display_enabled)
 665                 hdmi_stop_audio_stream(hd);
 666         hd->audio_playing = false;
 667
 668         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
 669 }
 670
 671 static int hdmi_audio_config(struct device *dev,
 672                              struct omap_dss_audio *dss_audio)
 673 {
 674         struct omap_hdmi *hd = dev_get_drvdata(dev);
 675         int ret;
 676
 677         mutex_lock(&hd->lock);
 678
 679         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 680                 ret = -EPERM;
 681                 goto out;
 682         }
 683
 684         ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
 685                                  hd->cfg.timings.pixelclock);
 686
 687         if (!ret) {
 688                 hd->audio_configured = true;
 689                 hd->audio_config = *dss_audio;
 690         }
 691 out:
 692         mutex_unlock(&hd->lock);
 693
 694         return ret;
 695 }
 696
 697 static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
 698         .audio_startup = hdmi_audio_startup,
 699         .audio_shutdown = hdmi_audio_shutdown,
 700         .audio_start = hdmi_audio_start,
 701         .audio_stop = hdmi_audio_stop,
 702         .audio_config = hdmi_audio_config,
 703 };
 704
 705 static int hdmi_audio_register(struct device *dev)
 706 {
 707         struct omap_hdmi_audio_pdata pdata = {
 708                 .dev = dev,
 709                 .dss_version = omapdss_get_version(),
 710                 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
 711                 .ops = &hdmi_audio_ops,
 712         };
 713
 714         hdmi.audio_pdev = platform_device_register_data(
 715                 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
 716                 &pdata, sizeof(pdata));
 717
 718         if (IS_ERR(hdmi.audio_pdev))
 719                 return PTR_ERR(hdmi.audio_pdev);
 720
 721         hdmi_runtime_get();
 722         hdmi.wp_idlemode =
 723                 REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 724         hdmi_runtime_put();
 725
 726         return 0;
 727 }
 728
 729 /* HDMI HW IP initialisation */
 730 static int hdmi5_bind(struct device *dev, struct device *master, void *data)
 731 {
 732         struct platform_device *pdev = to_platform_device(dev);
 733         int r;
 734         int irq;
 735
 736         hdmi.pdev = pdev;
 737         dev_set_drvdata(&pdev->dev, &hdmi);
 738
 739         mutex_init(&hdmi.lock);
 740         spin_lock_init(&hdmi.audio_playing_lock);
 741
 742         if (pdev->dev.of_node) {
 743                 r = hdmi_probe_of(pdev);
 744                 if (r)
 745                         return r;
 746         }
 747
 748         r = hdmi_wp_init(pdev, &hdmi.wp);
 749         if (r)
 750                 return r;
 751
 752         r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
 753         if (r)
 754                 return r;
 755
 756         r = hdmi_phy_init(pdev, &hdmi.phy);
 757         if (r)
 758                 goto err;
 759
 760         r = hdmi5_core_init(pdev, &hdmi.core);
 761         if (r)
 762                 goto err;
 763
 764         irq = platform_get_irq(pdev, 0);
 765         if (irq < 0) {
 766                 DSSERR("platform_get_irq failed\n");
 767                 r = -ENODEV;
 768                 goto err;
 769         }
 770
 771         r = devm_request_threaded_irq(&pdev->dev, irq,
 772                         NULL, hdmi_irq_handler,
 773                         IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
 774         if (r) {
 775                 DSSERR("HDMI IRQ request failed\n");
 776                 goto err;
 777         }
 778
 779         pm_runtime_enable(&pdev->dev);
 780
 781         hdmi_init_output(pdev);
 782
 783         r = hdmi_audio_register(&pdev->dev);
 784         if (r) {
 785                 DSSERR("Registering HDMI audio failed %d\n", r);
 786                 hdmi_uninit_output(pdev);
 787                 pm_runtime_disable(&pdev->dev);
 788                 return r;
 789         }
 790
 791         dss_debugfs_create_file("hdmi", hdmi_dump_regs);
 792
 793         return 0;
 794 err:
 795         hdmi_pll_uninit(&hdmi.pll);
 796         return r;
 797 }
 798
 799 static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
 800 {
 801         struct platform_device *pdev = to_platform_device(dev);
 802
 803         if (hdmi.audio_pdev)
 804                 platform_device_unregister(hdmi.audio_pdev);
 805
 806         hdmi_uninit_output(pdev);
 807
 808         hdmi_pll_uninit(&hdmi.pll);
 809
 810         pm_runtime_disable(&pdev->dev);
 811 }
 812
 813 static const struct component_ops hdmi5_component_ops = {
 814         .bind   = hdmi5_bind,
 815         .unbind = hdmi5_unbind,
 816 };
 817
 818 static int hdmi5_probe(struct platform_device *pdev)
 819 {
 820         return component_add(&pdev->dev, &hdmi5_component_ops);
 821 }
 822
 823 static int hdmi5_remove(struct platform_device *pdev)
 824 {
 825         component_del(&pdev->dev, &hdmi5_component_ops);
 826         return 0;
 827 }
 828
 829 static int hdmi_runtime_suspend(struct device *dev)
 830 {
 831         dispc_runtime_put();
 832
 833         return 0;
 834 }
 835
 836 static int hdmi_runtime_resume(struct device *dev)
 837 {
 838         int r;
 839
 840         r = dispc_runtime_get();
 841         if (r < 0)
 842                 return r;
 843
 844         return 0;
 845 }
 846
 847 static const struct dev_pm_ops hdmi_pm_ops = {
 848         .runtime_suspend = hdmi_runtime_suspend,
 849         .runtime_resume = hdmi_runtime_resume,
 850 };
 851
 852 static const struct of_device_id hdmi_of_match[] = {
 853         { .compatible = "ti,omap5-hdmi", },
 854         { .compatible = "ti,dra7-hdmi", },
 855         {},
 856 };
 857
 858 static struct platform_driver omapdss_hdmihw_driver = {
 859         .probe          = hdmi5_probe,
 860         .remove         = hdmi5_remove,
 861         .driver         = {
 862                 .name   = "omapdss_hdmi5",
 863                 .pm     = &hdmi_pm_ops,
 864                 .of_match_table = hdmi_of_match,
 865                 .suppress_bind_attrs = true,
 866         },
 867 };
 868
 869 int __init hdmi5_init_platform_driver(void)
 870 {
 871         return platform_driver_register(&omapdss_hdmihw_driver);
 872 }
 873
 874 void hdmi5_uninit_platform_driver(void)
 875 {
 876         platform_driver_unregister(&omapdss_hdmihw_driver);
 877 }