2 * drivers/gpu/drm/omapdrm/omap_crtc.c
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <drm/drm_mode.h>
24 #include "drm_crtc_helper.h"
26 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
30 struct drm_plane *plane;
34 enum omap_channel channel;
35 struct omap_overlay_manager_info info;
38 * Temporary: eventually this will go away, but it is needed
39 * for now to keep the output's happy. (They only need
40 * mgr->id.) Eventually this will be replaced w/ something
41 * more common-panel-framework-y
43 struct omap_overlay_manager mgr;
45 struct omap_video_timings timings;
49 struct omap_drm_apply apply;
51 struct omap_drm_irq apply_irq;
52 struct omap_drm_irq error_irq;
54 /* list of in-progress apply's: */
55 struct list_head pending_applies;
57 /* list of queued apply's: */
58 struct list_head queued_applies;
60 /* for handling queued and in-progress applies: */
61 struct work_struct apply_work;
63 /* if there is a pending flip, these will be non-null: */
64 struct drm_pending_vblank_event *event;
65 struct drm_framebuffer *old_fb;
67 /* for handling page flips without caring about what
68 * the callback is called from. Possibly we should just
69 * make omap_gem always call the cb from the worker so
70 * we don't have to care about this..
72 * XXX maybe fold into apply_work??
74 struct work_struct page_flip_work;
78 * Manager-ops, callbacks from output when they need to configure
79 * the upstream part of the video pipe.
81 * Most of these we can ignore until we add support for command-mode
82 * panels.. for video-mode the crtc-helpers already do an adequate
83 * job of sequencing the setup of the video pipe in the proper order
86 /* we can probably ignore these until we support command-mode panels: */
87 static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
91 static int omap_crtc_enable(struct omap_overlay_manager *mgr)
96 static void omap_crtc_disable(struct omap_overlay_manager *mgr)
100 static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
101 const struct omap_video_timings *timings)
103 struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
104 DBG("%s", omap_crtc->name);
105 omap_crtc->timings = *timings;
106 omap_crtc->full_update = true;
109 static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
110 const struct dss_lcd_mgr_config *config)
112 struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
113 DBG("%s", omap_crtc->name);
114 dispc_mgr_set_lcd_config(omap_crtc->channel, config);
117 static int omap_crtc_register_framedone_handler(
118 struct omap_overlay_manager *mgr,
119 void (*handler)(void *), void *data)
124 static void omap_crtc_unregister_framedone_handler(
125 struct omap_overlay_manager *mgr,
126 void (*handler)(void *), void *data)
130 static const struct dss_mgr_ops mgr_ops = {
131 .start_update = omap_crtc_start_update,
132 .enable = omap_crtc_enable,
133 .disable = omap_crtc_disable,
134 .set_timings = omap_crtc_set_timings,
135 .set_lcd_config = omap_crtc_set_lcd_config,
136 .register_framedone_handler = omap_crtc_register_framedone_handler,
137 .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
144 static void omap_crtc_destroy(struct drm_crtc *crtc)
146 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
148 DBG("%s", omap_crtc->name);
150 WARN_ON(omap_crtc->apply_irq.registered);
151 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
153 omap_crtc->plane->funcs->destroy(omap_crtc->plane);
154 drm_crtc_cleanup(crtc);
159 static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
161 struct omap_drm_private *priv = crtc->dev->dev_private;
162 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
163 bool enabled = (mode == DRM_MODE_DPMS_ON);
166 DBG("%s: %d", omap_crtc->name, mode);
168 if (enabled != omap_crtc->enabled) {
169 omap_crtc->enabled = enabled;
170 omap_crtc->full_update = true;
171 omap_crtc_apply(crtc, &omap_crtc->apply);
173 /* also enable our private plane: */
174 WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
176 /* and any attached overlay planes: */
177 for (i = 0; i < priv->num_planes; i++) {
178 struct drm_plane *plane = priv->planes[i];
179 if (plane->crtc == crtc)
180 WARN_ON(omap_plane_dpms(plane, mode));
185 static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
186 const struct drm_display_mode *mode,
187 struct drm_display_mode *adjusted_mode)
192 static int omap_crtc_mode_set(struct drm_crtc *crtc,
193 struct drm_display_mode *mode,
194 struct drm_display_mode *adjusted_mode,
196 struct drm_framebuffer *old_fb)
198 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
200 mode = adjusted_mode;
202 DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
203 omap_crtc->name, mode->base.id, mode->name,
204 mode->vrefresh, mode->clock,
205 mode->hdisplay, mode->hsync_start,
206 mode->hsync_end, mode->htotal,
207 mode->vdisplay, mode->vsync_start,
208 mode->vsync_end, mode->vtotal,
209 mode->type, mode->flags);
211 copy_timings_drm_to_omap(&omap_crtc->timings, mode);
212 omap_crtc->full_update = true;
214 return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
215 0, 0, mode->hdisplay, mode->vdisplay,
217 mode->hdisplay << 16, mode->vdisplay << 16,
221 static void omap_crtc_prepare(struct drm_crtc *crtc)
223 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
224 DBG("%s", omap_crtc->name);
225 omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
228 static void omap_crtc_commit(struct drm_crtc *crtc)
230 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
231 DBG("%s", omap_crtc->name);
232 omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
235 static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
236 struct drm_framebuffer *old_fb)
238 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
239 struct drm_plane *plane = omap_crtc->plane;
240 struct drm_display_mode *mode = &crtc->mode;
242 return omap_plane_mode_set(plane, crtc, crtc->fb,
243 0, 0, mode->hdisplay, mode->vdisplay,
245 mode->hdisplay << 16, mode->vdisplay << 16,
249 static void omap_crtc_load_lut(struct drm_crtc *crtc)
253 static void vblank_cb(void *arg)
255 struct drm_crtc *crtc = arg;
256 struct drm_device *dev = crtc->dev;
257 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
260 spin_lock_irqsave(&dev->event_lock, flags);
262 /* wakeup userspace */
263 if (omap_crtc->event)
264 drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
266 omap_crtc->event = NULL;
267 omap_crtc->old_fb = NULL;
269 spin_unlock_irqrestore(&dev->event_lock, flags);
272 static void page_flip_worker(struct work_struct *work)
274 struct omap_crtc *omap_crtc =
275 container_of(work, struct omap_crtc, page_flip_work);
276 struct drm_crtc *crtc = &omap_crtc->base;
277 struct drm_display_mode *mode = &crtc->mode;
278 struct drm_gem_object *bo;
280 mutex_lock(&crtc->mutex);
281 omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
282 0, 0, mode->hdisplay, mode->vdisplay,
283 crtc->x << 16, crtc->y << 16,
284 mode->hdisplay << 16, mode->vdisplay << 16,
286 mutex_unlock(&crtc->mutex);
288 bo = omap_framebuffer_bo(crtc->fb, 0);
289 drm_gem_object_unreference_unlocked(bo);
292 static void page_flip_cb(void *arg)
294 struct drm_crtc *crtc = arg;
295 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
296 struct omap_drm_private *priv = crtc->dev->dev_private;
298 /* avoid assumptions about what ctxt we are called from: */
299 queue_work(priv->wq, &omap_crtc->page_flip_work);
302 static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
303 struct drm_framebuffer *fb,
304 struct drm_pending_vblank_event *event)
306 struct drm_device *dev = crtc->dev;
307 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
308 struct drm_gem_object *bo;
310 DBG("%d -> %d (event=%p)", crtc->fb ? crtc->fb->base.id : -1,
313 if (omap_crtc->old_fb) {
314 dev_err(dev->dev, "already a pending flip\n");
318 omap_crtc->event = event;
322 * Hold a reference temporarily until the crtc is updated
323 * and takes the reference to the bo. This avoids it
324 * getting freed from under us:
326 bo = omap_framebuffer_bo(fb, 0);
327 drm_gem_object_reference(bo);
329 omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
334 static int omap_crtc_set_property(struct drm_crtc *crtc,
335 struct drm_property *property, uint64_t val)
337 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
338 struct omap_drm_private *priv = crtc->dev->dev_private;
340 if (property == priv->rotation_prop) {
341 crtc->invert_dimensions =
342 !!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
345 return omap_plane_set_property(omap_crtc->plane, property, val);
348 static const struct drm_crtc_funcs omap_crtc_funcs = {
349 .set_config = drm_crtc_helper_set_config,
350 .destroy = omap_crtc_destroy,
351 .page_flip = omap_crtc_page_flip_locked,
352 .set_property = omap_crtc_set_property,
355 static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
356 .dpms = omap_crtc_dpms,
357 .mode_fixup = omap_crtc_mode_fixup,
358 .mode_set = omap_crtc_mode_set,
359 .prepare = omap_crtc_prepare,
360 .commit = omap_crtc_commit,
361 .mode_set_base = omap_crtc_mode_set_base,
362 .load_lut = omap_crtc_load_lut,
365 const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
367 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
368 return &omap_crtc->timings;
371 enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
373 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
374 return omap_crtc->channel;
377 static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
379 struct omap_crtc *omap_crtc =
380 container_of(irq, struct omap_crtc, error_irq);
381 struct drm_crtc *crtc = &omap_crtc->base;
382 DRM_ERROR("%s: errors: %08x\n", omap_crtc->name, irqstatus);
383 /* avoid getting in a flood, unregister the irq until next vblank */
384 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
387 static void omap_crtc_apply_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
389 struct omap_crtc *omap_crtc =
390 container_of(irq, struct omap_crtc, apply_irq);
391 struct drm_crtc *crtc = &omap_crtc->base;
393 if (!omap_crtc->error_irq.registered)
394 omap_irq_register(crtc->dev, &omap_crtc->error_irq);
396 if (!dispc_mgr_go_busy(omap_crtc->channel)) {
397 struct omap_drm_private *priv =
398 crtc->dev->dev_private;
399 DBG("%s: apply done", omap_crtc->name);
400 omap_irq_unregister(crtc->dev, &omap_crtc->apply_irq);
401 queue_work(priv->wq, &omap_crtc->apply_work);
405 static void apply_worker(struct work_struct *work)
407 struct omap_crtc *omap_crtc =
408 container_of(work, struct omap_crtc, apply_work);
409 struct drm_crtc *crtc = &omap_crtc->base;
410 struct drm_device *dev = crtc->dev;
411 struct omap_drm_apply *apply, *n;
415 * Synchronize everything on mode_config.mutex, to keep
416 * the callbacks and list modification all serialized
417 * with respect to modesetting ioctls from userspace.
419 mutex_lock(&crtc->mutex);
423 * If we are still pending a previous update, wait.. when the
424 * pending update completes, we get kicked again.
426 if (omap_crtc->apply_irq.registered)
429 /* finish up previous apply's: */
430 list_for_each_entry_safe(apply, n,
431 &omap_crtc->pending_applies, pending_node) {
432 apply->post_apply(apply);
433 list_del(&apply->pending_node);
436 need_apply = !list_empty(&omap_crtc->queued_applies);
438 /* then handle the next round of of queued apply's: */
439 list_for_each_entry_safe(apply, n,
440 &omap_crtc->queued_applies, queued_node) {
441 apply->pre_apply(apply);
442 list_del(&apply->queued_node);
443 apply->queued = false;
444 list_add_tail(&apply->pending_node,
445 &omap_crtc->pending_applies);
449 enum omap_channel channel = omap_crtc->channel;
451 DBG("%s: GO", omap_crtc->name);
453 if (dispc_mgr_is_enabled(channel)) {
454 omap_irq_register(dev, &omap_crtc->apply_irq);
455 dispc_mgr_go(channel);
457 struct omap_drm_private *priv = dev->dev_private;
458 queue_work(priv->wq, &omap_crtc->apply_work);
464 mutex_unlock(&crtc->mutex);
467 int omap_crtc_apply(struct drm_crtc *crtc,
468 struct omap_drm_apply *apply)
470 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
472 WARN_ON(!mutex_is_locked(&crtc->mutex));
474 /* no need to queue it again if it is already queued: */
478 apply->queued = true;
479 list_add_tail(&apply->queued_node, &omap_crtc->queued_applies);
482 * If there are no currently pending updates, then go ahead and
483 * kick the worker immediately, otherwise it will run again when
484 * the current update finishes.
486 if (list_empty(&omap_crtc->pending_applies)) {
487 struct omap_drm_private *priv = crtc->dev->dev_private;
488 queue_work(priv->wq, &omap_crtc->apply_work);
494 /* called only from apply */
495 static void set_enabled(struct drm_crtc *crtc, bool enable)
497 struct drm_device *dev = crtc->dev;
498 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
499 enum omap_channel channel = omap_crtc->channel;
500 struct omap_irq_wait *wait = NULL;
502 if (dispc_mgr_is_enabled(channel) == enable)
505 /* ignore sync-lost irqs during enable/disable */
506 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
508 if (dispc_mgr_get_framedone_irq(channel)) {
510 wait = omap_irq_wait_init(dev,
511 dispc_mgr_get_framedone_irq(channel), 1);
515 * When we disable digit output, we need to wait until fields
516 * are done. Otherwise the DSS is still working, and turning
517 * off the clocks prevents DSS from going to OFF mode. And when
518 * enabling, we need to wait for the extra sync losts
520 wait = omap_irq_wait_init(dev,
521 dispc_mgr_get_vsync_irq(channel), 2);
524 dispc_mgr_enable(channel, enable);
527 int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
529 dev_err(dev->dev, "%s: timeout waiting for %s\n",
530 omap_crtc->name, enable ? "enable" : "disable");
534 omap_irq_register(crtc->dev, &omap_crtc->error_irq);
537 static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
539 struct omap_crtc *omap_crtc =
540 container_of(apply, struct omap_crtc, apply);
541 struct drm_crtc *crtc = &omap_crtc->base;
542 struct drm_encoder *encoder = NULL;
544 DBG("%s: enabled=%d, full=%d", omap_crtc->name,
545 omap_crtc->enabled, omap_crtc->full_update);
547 if (omap_crtc->full_update) {
548 struct omap_drm_private *priv = crtc->dev->dev_private;
550 for (i = 0; i < priv->num_encoders; i++) {
551 if (priv->encoders[i]->crtc == crtc) {
552 encoder = priv->encoders[i];
558 if (!omap_crtc->enabled) {
559 set_enabled(&omap_crtc->base, false);
561 omap_encoder_set_enabled(encoder, false);
564 omap_encoder_set_enabled(encoder, false);
565 omap_encoder_update(encoder, &omap_crtc->mgr,
566 &omap_crtc->timings);
567 omap_encoder_set_enabled(encoder, true);
568 omap_crtc->full_update = false;
571 dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
572 dispc_mgr_set_timings(omap_crtc->channel,
573 &omap_crtc->timings);
574 set_enabled(&omap_crtc->base, true);
577 omap_crtc->full_update = false;
580 static void omap_crtc_post_apply(struct omap_drm_apply *apply)
582 /* nothing needed for post-apply */
585 static const char *channel_names[] = {
586 [OMAP_DSS_CHANNEL_LCD] = "lcd",
587 [OMAP_DSS_CHANNEL_DIGIT] = "tv",
588 [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
591 /* initialize crtc */
592 struct drm_crtc *omap_crtc_init(struct drm_device *dev,
593 struct drm_plane *plane, enum omap_channel channel, int id)
595 struct drm_crtc *crtc = NULL;
596 struct omap_crtc *omap_crtc;
597 struct omap_overlay_manager_info *info;
599 DBG("%s", channel_names[channel]);
601 omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
605 crtc = &omap_crtc->base;
607 INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
608 INIT_WORK(&omap_crtc->apply_work, apply_worker);
610 INIT_LIST_HEAD(&omap_crtc->pending_applies);
611 INIT_LIST_HEAD(&omap_crtc->queued_applies);
613 omap_crtc->apply.pre_apply = omap_crtc_pre_apply;
614 omap_crtc->apply.post_apply = omap_crtc_post_apply;
616 omap_crtc->apply_irq.irqmask = pipe2vbl(id);
617 omap_crtc->apply_irq.irq = omap_crtc_apply_irq;
619 omap_crtc->error_irq.irqmask =
620 dispc_mgr_get_sync_lost_irq(channel);
621 omap_crtc->error_irq.irq = omap_crtc_error_irq;
622 omap_irq_register(dev, &omap_crtc->error_irq);
624 omap_crtc->channel = channel;
625 omap_crtc->plane = plane;
626 omap_crtc->plane->crtc = crtc;
627 omap_crtc->name = channel_names[channel];
628 omap_crtc->pipe = id;
631 omap_crtc->mgr.id = channel;
633 dss_install_mgr_ops(&mgr_ops);
635 /* TODO: fix hard-coded setup.. add properties! */
636 info = &omap_crtc->info;
637 info->default_color = 0x00000000;
638 info->trans_key = 0x00000000;
639 info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
640 info->trans_enabled = false;
642 drm_crtc_init(dev, crtc, &omap_crtc_funcs);
643 drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
645 omap_plane_install_properties(omap_crtc->plane, &crtc->base);
651 omap_crtc_destroy(crtc);