24fb001087597fd008441d383c0d2a03808895e6
[cascardo/linux.git] / drivers / gpu / drm / radeon / radeon_cs.c
1 /*
2  * Copyright 2008 Jerome Glisse.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *    Jerome Glisse <glisse@freedesktop.org>
26  */
27 #include "drmP.h"
28 #include "radeon_drm.h"
29 #include "radeon_reg.h"
30 #include "radeon.h"
31
32 void r100_cs_dump_packet(struct radeon_cs_parser *p,
33                          struct radeon_cs_packet *pkt);
34
35 int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
36 {
37         struct drm_device *ddev = p->rdev->ddev;
38         struct radeon_cs_chunk *chunk;
39         unsigned i, j;
40         bool duplicate;
41
42         if (p->chunk_relocs_idx == -1) {
43                 return 0;
44         }
45         chunk = &p->chunks[p->chunk_relocs_idx];
46         /* FIXME: we assume that each relocs use 4 dwords */
47         p->nrelocs = chunk->length_dw / 4;
48         p->relocs_ptr = kcalloc(p->nrelocs, sizeof(void *), GFP_KERNEL);
49         if (p->relocs_ptr == NULL) {
50                 return -ENOMEM;
51         }
52         p->relocs = kcalloc(p->nrelocs, sizeof(struct radeon_cs_reloc), GFP_KERNEL);
53         if (p->relocs == NULL) {
54                 return -ENOMEM;
55         }
56         for (i = 0; i < p->nrelocs; i++) {
57                 struct drm_radeon_cs_reloc *r;
58
59                 duplicate = false;
60                 r = (struct drm_radeon_cs_reloc *)&chunk->kdata[i*4];
61                 for (j = 0; j < i; j++) {
62                         if (r->handle == p->relocs[j].handle) {
63                                 p->relocs_ptr[i] = &p->relocs[j];
64                                 duplicate = true;
65                                 break;
66                         }
67                 }
68                 if (!duplicate) {
69                         p->relocs[i].gobj = drm_gem_object_lookup(ddev,
70                                                                   p->filp,
71                                                                   r->handle);
72                         if (p->relocs[i].gobj == NULL) {
73                                 DRM_ERROR("gem object lookup failed 0x%x\n",
74                                           r->handle);
75                                 return -ENOENT;
76                         }
77                         p->relocs_ptr[i] = &p->relocs[i];
78                         p->relocs[i].robj = gem_to_radeon_bo(p->relocs[i].gobj);
79                         p->relocs[i].lobj.bo = p->relocs[i].robj;
80                         p->relocs[i].lobj.wdomain = r->write_domain;
81                         p->relocs[i].lobj.rdomain = r->read_domains;
82                         p->relocs[i].lobj.tv.bo = &p->relocs[i].robj->tbo;
83                         p->relocs[i].handle = r->handle;
84                         p->relocs[i].flags = r->flags;
85                         radeon_bo_list_add_object(&p->relocs[i].lobj,
86                                                   &p->validated);
87
88                 } else
89                         p->relocs[i].handle = 0;
90         }
91         return radeon_bo_list_validate(&p->validated);
92 }
93
94 static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority)
95 {
96         p->priority = priority;
97
98         switch (ring) {
99         default:
100                 DRM_ERROR("unknown ring id: %d\n", ring);
101                 return -EINVAL;
102         case RADEON_CS_RING_GFX:
103                 p->ring = RADEON_RING_TYPE_GFX_INDEX;
104                 break;
105         case RADEON_CS_RING_COMPUTE:
106                 if (p->rdev->family >= CHIP_TAHITI) {
107                         if (p->priority > 0)
108                                 p->ring = CAYMAN_RING_TYPE_CP1_INDEX;
109                         else
110                                 p->ring = CAYMAN_RING_TYPE_CP2_INDEX;
111                 } else
112                         p->ring = RADEON_RING_TYPE_GFX_INDEX;
113                 break;
114         }
115         return 0;
116 }
117
118 static int radeon_cs_sync_rings(struct radeon_cs_parser *p)
119 {
120         bool sync_to_ring[RADEON_NUM_RINGS] = { };
121         bool need_sync = false;
122         int i, r;
123
124         for (i = 0; i < p->nrelocs; i++) {
125                 if (!p->relocs[i].robj || !p->relocs[i].robj->tbo.sync_obj)
126                         continue;
127
128                 if (!(p->relocs[i].flags & RADEON_RELOC_DONT_SYNC)) {
129                         struct radeon_fence *fence = p->relocs[i].robj->tbo.sync_obj;
130                         if (fence->ring != p->ring && !radeon_fence_signaled(fence)) {
131                                 sync_to_ring[fence->ring] = true;
132                                 need_sync = true;
133                         }
134                 }
135         }
136
137         if (!need_sync) {
138                 return 0;
139         }
140
141         r = radeon_semaphore_create(p->rdev, &p->ib->fence->semaphore);
142         if (r) {
143                 return r;
144         }
145
146         return radeon_semaphore_sync_rings(p->rdev, p->ib->fence->semaphore,
147                                            sync_to_ring, p->ring);
148 }
149
150 int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
151 {
152         struct drm_radeon_cs *cs = data;
153         uint64_t *chunk_array_ptr;
154         unsigned size, i;
155         u32 ring = RADEON_CS_RING_GFX;
156         s32 priority = 0;
157
158         if (!cs->num_chunks) {
159                 return 0;
160         }
161         /* get chunks */
162         INIT_LIST_HEAD(&p->validated);
163         p->idx = 0;
164         p->chunk_ib_idx = -1;
165         p->chunk_relocs_idx = -1;
166         p->chunk_flags_idx = -1;
167         p->chunk_const_ib_idx = -1;
168         p->chunks_array = kcalloc(cs->num_chunks, sizeof(uint64_t), GFP_KERNEL);
169         if (p->chunks_array == NULL) {
170                 return -ENOMEM;
171         }
172         chunk_array_ptr = (uint64_t *)(unsigned long)(cs->chunks);
173         if (DRM_COPY_FROM_USER(p->chunks_array, chunk_array_ptr,
174                                sizeof(uint64_t)*cs->num_chunks)) {
175                 return -EFAULT;
176         }
177         p->cs_flags = 0;
178         p->nchunks = cs->num_chunks;
179         p->chunks = kcalloc(p->nchunks, sizeof(struct radeon_cs_chunk), GFP_KERNEL);
180         if (p->chunks == NULL) {
181                 return -ENOMEM;
182         }
183         for (i = 0; i < p->nchunks; i++) {
184                 struct drm_radeon_cs_chunk __user **chunk_ptr = NULL;
185                 struct drm_radeon_cs_chunk user_chunk;
186                 uint32_t __user *cdata;
187
188                 chunk_ptr = (void __user*)(unsigned long)p->chunks_array[i];
189                 if (DRM_COPY_FROM_USER(&user_chunk, chunk_ptr,
190                                        sizeof(struct drm_radeon_cs_chunk))) {
191                         return -EFAULT;
192                 }
193                 p->chunks[i].length_dw = user_chunk.length_dw;
194                 p->chunks[i].kdata = NULL;
195                 p->chunks[i].chunk_id = user_chunk.chunk_id;
196
197                 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) {
198                         p->chunk_relocs_idx = i;
199                 }
200                 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_IB) {
201                         p->chunk_ib_idx = i;
202                         /* zero length IB isn't useful */
203                         if (p->chunks[i].length_dw == 0)
204                                 return -EINVAL;
205                 }
206                 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_CONST_IB) {
207                         p->chunk_const_ib_idx = i;
208                         /* zero length CONST IB isn't useful */
209                         if (p->chunks[i].length_dw == 0)
210                                 return -EINVAL;
211                 }
212                 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
213                         p->chunk_flags_idx = i;
214                         /* zero length flags aren't useful */
215                         if (p->chunks[i].length_dw == 0)
216                                 return -EINVAL;
217                 }
218
219                 p->chunks[i].length_dw = user_chunk.length_dw;
220                 p->chunks[i].user_ptr = (void __user *)(unsigned long)user_chunk.chunk_data;
221
222                 cdata = (uint32_t *)(unsigned long)user_chunk.chunk_data;
223                 if ((p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) ||
224                     (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS)) {
225                         size = p->chunks[i].length_dw * sizeof(uint32_t);
226                         p->chunks[i].kdata = kmalloc(size, GFP_KERNEL);
227                         if (p->chunks[i].kdata == NULL) {
228                                 return -ENOMEM;
229                         }
230                         if (DRM_COPY_FROM_USER(p->chunks[i].kdata,
231                                                p->chunks[i].user_ptr, size)) {
232                                 return -EFAULT;
233                         }
234                         if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
235                                 p->cs_flags = p->chunks[i].kdata[0];
236                                 if (p->chunks[i].length_dw > 1)
237                                         ring = p->chunks[i].kdata[1];
238                                 if (p->chunks[i].length_dw > 2)
239                                         priority = (s32)p->chunks[i].kdata[2];
240                         }
241                 }
242         }
243
244         if ((p->cs_flags & RADEON_CS_USE_VM) &&
245             !p->rdev->vm_manager.enabled) {
246                 DRM_ERROR("VM not active on asic!\n");
247                 return -EINVAL;
248         }
249
250         /* we only support VM on SI+ */
251         if ((p->rdev->family >= CHIP_TAHITI) &&
252             ((p->cs_flags & RADEON_CS_USE_VM) == 0)) {
253                 DRM_ERROR("VM required on SI+!\n");
254                 return -EINVAL;
255         }
256
257         if (radeon_cs_get_ring(p, ring, priority))
258                 return -EINVAL;
259
260
261         /* deal with non-vm */
262         if ((p->chunk_ib_idx != -1) &&
263             ((p->cs_flags & RADEON_CS_USE_VM) == 0) &&
264             (p->chunks[p->chunk_ib_idx].chunk_id == RADEON_CHUNK_ID_IB)) {
265                 if (p->chunks[p->chunk_ib_idx].length_dw > (16 * 1024)) {
266                         DRM_ERROR("cs IB too big: %d\n",
267                                   p->chunks[p->chunk_ib_idx].length_dw);
268                         return -EINVAL;
269                 }
270                 if ((p->rdev->flags & RADEON_IS_AGP)) {
271                         p->chunks[p->chunk_ib_idx].kpage[0] = kmalloc(PAGE_SIZE, GFP_KERNEL);
272                         p->chunks[p->chunk_ib_idx].kpage[1] = kmalloc(PAGE_SIZE, GFP_KERNEL);
273                         if (p->chunks[p->chunk_ib_idx].kpage[0] == NULL ||
274                             p->chunks[p->chunk_ib_idx].kpage[1] == NULL) {
275                                 kfree(p->chunks[i].kpage[0]);
276                                 kfree(p->chunks[i].kpage[1]);
277                                 return -ENOMEM;
278                         }
279                 }
280                 p->chunks[p->chunk_ib_idx].kpage_idx[0] = -1;
281                 p->chunks[p->chunk_ib_idx].kpage_idx[1] = -1;
282                 p->chunks[p->chunk_ib_idx].last_copied_page = -1;
283                 p->chunks[p->chunk_ib_idx].last_page_index =
284                         ((p->chunks[p->chunk_ib_idx].length_dw * 4) - 1) / PAGE_SIZE;
285         }
286
287         return 0;
288 }
289
290 /**
291  * cs_parser_fini() - clean parser states
292  * @parser:     parser structure holding parsing context.
293  * @error:      error number
294  *
295  * If error is set than unvalidate buffer, otherwise just free memory
296  * used by parsing context.
297  **/
298 static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
299 {
300         unsigned i;
301
302
303         if (!error && parser->ib)
304                 ttm_eu_fence_buffer_objects(&parser->validated,
305                                             parser->ib->fence);
306         else
307                 ttm_eu_backoff_reservation(&parser->validated);
308
309         if (parser->relocs != NULL) {
310                 for (i = 0; i < parser->nrelocs; i++) {
311                         if (parser->relocs[i].gobj)
312                                 drm_gem_object_unreference_unlocked(parser->relocs[i].gobj);
313                 }
314         }
315         kfree(parser->track);
316         kfree(parser->relocs);
317         kfree(parser->relocs_ptr);
318         for (i = 0; i < parser->nchunks; i++) {
319                 kfree(parser->chunks[i].kdata);
320                 if ((parser->rdev->flags & RADEON_IS_AGP)) {
321                         kfree(parser->chunks[i].kpage[0]);
322                         kfree(parser->chunks[i].kpage[1]);
323                 }
324         }
325         kfree(parser->chunks);
326         kfree(parser->chunks_array);
327         radeon_ib_free(parser->rdev, &parser->ib);
328 }
329
330 static int radeon_cs_ib_chunk(struct radeon_device *rdev,
331                               struct radeon_cs_parser *parser)
332 {
333         struct radeon_cs_chunk *ib_chunk;
334         int r;
335
336         if (parser->chunk_ib_idx == -1)
337                 return 0;
338
339         if (parser->cs_flags & RADEON_CS_USE_VM)
340                 return 0;
341
342         ib_chunk = &parser->chunks[parser->chunk_ib_idx];
343         /* Copy the packet into the IB, the parser will read from the
344          * input memory (cached) and write to the IB (which can be
345          * uncached).
346          */
347         r =  radeon_ib_get(rdev, parser->ring, &parser->ib,
348                            ib_chunk->length_dw * 4);
349         if (r) {
350                 DRM_ERROR("Failed to get ib !\n");
351                 return r;
352         }
353         parser->ib->length_dw = ib_chunk->length_dw;
354         r = radeon_cs_parse(rdev, parser->ring, parser);
355         if (r || parser->parser_error) {
356                 DRM_ERROR("Invalid command stream !\n");
357                 return r;
358         }
359         r = radeon_cs_finish_pages(parser);
360         if (r) {
361                 DRM_ERROR("Invalid command stream !\n");
362                 return r;
363         }
364         r = radeon_cs_sync_rings(parser);
365         if (r) {
366                 DRM_ERROR("Failed to synchronize rings !\n");
367         }
368         parser->ib->vm_id = 0;
369         r = radeon_ib_schedule(rdev, parser->ib);
370         if (r) {
371                 DRM_ERROR("Failed to schedule IB !\n");
372         }
373         return 0;
374 }
375
376 static int radeon_bo_vm_update_pte(struct radeon_cs_parser *parser,
377                                    struct radeon_vm *vm)
378 {
379         struct radeon_bo_list *lobj;
380         struct radeon_bo *bo;
381         int r;
382
383         list_for_each_entry(lobj, &parser->validated, tv.head) {
384                 bo = lobj->bo;
385                 r = radeon_vm_bo_update_pte(parser->rdev, vm, bo, &bo->tbo.mem);
386                 if (r) {
387                         return r;
388                 }
389         }
390         return 0;
391 }
392
393 static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
394                                  struct radeon_cs_parser *parser)
395 {
396         struct radeon_cs_chunk *ib_chunk;
397         struct radeon_fpriv *fpriv = parser->filp->driver_priv;
398         struct radeon_vm *vm = &fpriv->vm;
399         int r;
400
401         if (parser->chunk_ib_idx == -1)
402                 return 0;
403
404         if ((parser->cs_flags & RADEON_CS_USE_VM) == 0)
405                 return 0;
406
407         if ((rdev->family >= CHIP_TAHITI) &&
408             (parser->chunk_const_ib_idx != -1)) {
409                 ib_chunk = &parser->chunks[parser->chunk_const_ib_idx];
410                 if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
411                         DRM_ERROR("cs IB CONST too big: %d\n", ib_chunk->length_dw);
412                         return -EINVAL;
413                 }
414                 r =  radeon_ib_get(rdev, parser->ring, &parser->const_ib,
415                                    ib_chunk->length_dw * 4);
416                 if (r) {
417                         DRM_ERROR("Failed to get const ib !\n");
418                         return r;
419                 }
420                 parser->const_ib->is_const_ib = true;
421                 parser->const_ib->length_dw = ib_chunk->length_dw;
422                 /* Copy the packet into the IB */
423                 if (DRM_COPY_FROM_USER(parser->const_ib->ptr, ib_chunk->user_ptr,
424                                        ib_chunk->length_dw * 4)) {
425                         return -EFAULT;
426                 }
427                 r = radeon_ring_ib_parse(rdev, parser->ring, parser->const_ib);
428                 if (r) {
429                         return r;
430                 }
431         }
432
433         ib_chunk = &parser->chunks[parser->chunk_ib_idx];
434         if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
435                 DRM_ERROR("cs IB too big: %d\n", ib_chunk->length_dw);
436                 return -EINVAL;
437         }
438         r =  radeon_ib_get(rdev, parser->ring, &parser->ib,
439                            ib_chunk->length_dw * 4);
440         if (r) {
441                 DRM_ERROR("Failed to get ib !\n");
442                 return r;
443         }
444         parser->ib->length_dw = ib_chunk->length_dw;
445         /* Copy the packet into the IB */
446         if (DRM_COPY_FROM_USER(parser->ib->ptr, ib_chunk->user_ptr,
447                                ib_chunk->length_dw * 4)) {
448                 return -EFAULT;
449         }
450         r = radeon_ring_ib_parse(rdev, parser->ring, parser->ib);
451         if (r) {
452                 return r;
453         }
454
455         mutex_lock(&vm->mutex);
456         r = radeon_vm_bind(rdev, vm);
457         if (r) {
458                 goto out;
459         }
460         r = radeon_bo_vm_update_pte(parser, vm);
461         if (r) {
462                 goto out;
463         }
464         r = radeon_cs_sync_rings(parser);
465         if (r) {
466                 DRM_ERROR("Failed to synchronize rings !\n");
467         }
468
469         if ((rdev->family >= CHIP_TAHITI) &&
470             (parser->chunk_const_ib_idx != -1)) {
471                 parser->const_ib->vm_id = vm->id;
472                 /* ib pool is bind at 0 in virtual address space to gpu_addr is the
473                  * offset inside the pool bo
474                  */
475                 parser->const_ib->gpu_addr = parser->const_ib->sa_bo.offset;
476                 r = radeon_ib_schedule(rdev, parser->const_ib);
477                 if (r)
478                         goto out;
479         }
480
481         parser->ib->vm_id = vm->id;
482         /* ib pool is bind at 0 in virtual address space to gpu_addr is the
483          * offset inside the pool bo
484          */
485         parser->ib->gpu_addr = parser->ib->sa_bo.offset;
486         parser->ib->is_const_ib = false;
487         r = radeon_ib_schedule(rdev, parser->ib);
488 out:
489         if (!r) {
490                 if (vm->fence) {
491                         radeon_fence_unref(&vm->fence);
492                 }
493                 vm->fence = radeon_fence_ref(parser->ib->fence);
494         }
495         mutex_unlock(&fpriv->vm.mutex);
496         return r;
497 }
498
499 int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
500 {
501         struct radeon_device *rdev = dev->dev_private;
502         struct radeon_cs_parser parser;
503         int r;
504
505         radeon_mutex_lock(&rdev->cs_mutex);
506         if (!rdev->accel_working) {
507                 radeon_mutex_unlock(&rdev->cs_mutex);
508                 return -EBUSY;
509         }
510         /* initialize parser */
511         memset(&parser, 0, sizeof(struct radeon_cs_parser));
512         parser.filp = filp;
513         parser.rdev = rdev;
514         parser.dev = rdev->dev;
515         parser.family = rdev->family;
516         r = radeon_cs_parser_init(&parser, data);
517         if (r) {
518                 DRM_ERROR("Failed to initialize parser !\n");
519                 radeon_cs_parser_fini(&parser, r);
520                 radeon_mutex_unlock(&rdev->cs_mutex);
521                 return r;
522         }
523         r = radeon_cs_parser_relocs(&parser);
524         if (r) {
525                 if (r != -ERESTARTSYS)
526                         DRM_ERROR("Failed to parse relocation %d!\n", r);
527                 radeon_cs_parser_fini(&parser, r);
528                 radeon_mutex_unlock(&rdev->cs_mutex);
529                 return r;
530         }
531         r = radeon_cs_ib_chunk(rdev, &parser);
532         if (r) {
533                 goto out;
534         }
535         r = radeon_cs_ib_vm_chunk(rdev, &parser);
536         if (r) {
537                 goto out;
538         }
539 out:
540         radeon_cs_parser_fini(&parser, r);
541         radeon_mutex_unlock(&rdev->cs_mutex);
542         return r;
543 }
544
545 int radeon_cs_finish_pages(struct radeon_cs_parser *p)
546 {
547         struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
548         int i;
549         int size = PAGE_SIZE;
550
551         for (i = ibc->last_copied_page + 1; i <= ibc->last_page_index; i++) {
552                 if (i == ibc->last_page_index) {
553                         size = (ibc->length_dw * 4) % PAGE_SIZE;
554                         if (size == 0)
555                                 size = PAGE_SIZE;
556                 }
557                 
558                 if (DRM_COPY_FROM_USER(p->ib->ptr + (i * (PAGE_SIZE/4)),
559                                        ibc->user_ptr + (i * PAGE_SIZE),
560                                        size))
561                         return -EFAULT;
562         }
563         return 0;
564 }
565
566 int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)
567 {
568         int new_page;
569         struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
570         int i;
571         int size = PAGE_SIZE;
572         bool copy1 = (p->rdev->flags & RADEON_IS_AGP) ? false : true;
573
574         for (i = ibc->last_copied_page + 1; i < pg_idx; i++) {
575                 if (DRM_COPY_FROM_USER(p->ib->ptr + (i * (PAGE_SIZE/4)),
576                                        ibc->user_ptr + (i * PAGE_SIZE),
577                                        PAGE_SIZE)) {
578                         p->parser_error = -EFAULT;
579                         return 0;
580                 }
581         }
582
583         if (pg_idx == ibc->last_page_index) {
584                 size = (ibc->length_dw * 4) % PAGE_SIZE;
585                 if (size == 0)
586                         size = PAGE_SIZE;
587         }
588
589         new_page = ibc->kpage_idx[0] < ibc->kpage_idx[1] ? 0 : 1;
590         if (copy1)
591                 ibc->kpage[new_page] = p->ib->ptr + (pg_idx * (PAGE_SIZE / 4));
592
593         if (DRM_COPY_FROM_USER(ibc->kpage[new_page],
594                                ibc->user_ptr + (pg_idx * PAGE_SIZE),
595                                size)) {
596                 p->parser_error = -EFAULT;
597                 return 0;
598         }
599
600         /* copy to IB for non single case */
601         if (!copy1)
602                 memcpy((void *)(p->ib->ptr+(pg_idx*(PAGE_SIZE/4))), ibc->kpage[new_page], size);
603
604         ibc->last_copied_page = pg_idx;
605         ibc->kpage_idx[new_page] = pg_idx;
606
607         return new_page;
608 }