drivers/gpu/host1x/hw/debug_hw.c

   1 /*
   2  * Copyright (C) 2010 Google, Inc.
   3  * Author: Erik Gilling <konkers@android.com>
   4  *
   5  * Copyright (C) 2011-2013 NVIDIA Corporation
   6  *
   7  * This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include "../dev.h"
  19 #include "../debug.h"
  20 #include "../cdma.h"
  21 #include "../channel.h"
  22
  23 #define HOST1X_DEBUG_MAX_PAGE_OFFSET 102400
  24
  25 enum {
  26         HOST1X_OPCODE_SETCLASS  = 0x00,
  27         HOST1X_OPCODE_INCR      = 0x01,
  28         HOST1X_OPCODE_NONINCR   = 0x02,
  29         HOST1X_OPCODE_MASK      = 0x03,
  30         HOST1X_OPCODE_IMM       = 0x04,
  31         HOST1X_OPCODE_RESTART   = 0x05,
  32         HOST1X_OPCODE_GATHER    = 0x06,
  33         HOST1X_OPCODE_EXTEND    = 0x0e,
  34 };
  35
  36 enum {
  37         HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK      = 0x00,
  38         HOST1X_OPCODE_EXTEND_RELEASE_MLOCK      = 0x01,
  39 };
  40
  41 static unsigned int show_channel_command(struct output *o, u32 val)
  42 {
  43         unsigned int mask, subop;
  44
  45         switch (val >> 28) {
  46         case HOST1X_OPCODE_SETCLASS:
  47                 mask = val & 0x3f;
  48                 if (mask) {
  49                         host1x_debug_output(o, "SETCL(class=%03x, offset=%03x, mask=%02x, [",
  50                                             val >> 6 & 0x3ff,
  51                                             val >> 16 & 0xfff, mask);
  52                         return hweight8(mask);
  53                 }
  54
  55                 host1x_debug_output(o, "SETCL(class=%03x)\n", val >> 6 & 0x3ff);
  56                 return 0;
  57
  58         case HOST1X_OPCODE_INCR:
  59                 host1x_debug_output(o, "INCR(offset=%03x, [",
  60                                     val >> 16 & 0xfff);
  61                 return val & 0xffff;
  62
  63         case HOST1X_OPCODE_NONINCR:
  64                 host1x_debug_output(o, "NONINCR(offset=%03x, [",
  65                                     val >> 16 & 0xfff);
  66                 return val & 0xffff;
  67
  68         case HOST1X_OPCODE_MASK:
  69                 mask = val & 0xffff;
  70                 host1x_debug_output(o, "MASK(offset=%03x, mask=%03x, [",
  71                                     val >> 16 & 0xfff, mask);
  72                 return hweight16(mask);
  73
  74         case HOST1X_OPCODE_IMM:
  75                 host1x_debug_output(o, "IMM(offset=%03x, data=%03x)\n",
  76                                     val >> 16 & 0xfff, val & 0xffff);
  77                 return 0;
  78
  79         case HOST1X_OPCODE_RESTART:
  80                 host1x_debug_output(o, "RESTART(offset=%08x)\n", val << 4);
  81                 return 0;
  82
  83         case HOST1X_OPCODE_GATHER:
  84                 host1x_debug_output(o, "GATHER(offset=%03x, insert=%d, type=%d, count=%04x, addr=[",
  85                                     val >> 16 & 0xfff, val >> 15 & 0x1,
  86                                     val >> 14 & 0x1, val & 0x3fff);
  87                 return 1;
  88
  89         case HOST1X_OPCODE_EXTEND:
  90                 subop = val >> 24 & 0xf;
  91                 if (subop == HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK)
  92                         host1x_debug_output(o, "ACQUIRE_MLOCK(index=%d)\n",
  93                                             val & 0xff);
  94                 else if (subop == HOST1X_OPCODE_EXTEND_RELEASE_MLOCK)
  95                         host1x_debug_output(o, "RELEASE_MLOCK(index=%d)\n",
  96                                             val & 0xff);
  97                 else
  98                         host1x_debug_output(o, "EXTEND_UNKNOWN(%08x)\n", val);
  99                 return 0;
 100
 101         default:
 102                 return 0;
 103         }
 104 }
 105
 106 static void show_gather(struct output *o, phys_addr_t phys_addr,
 107                         unsigned int words, struct host1x_cdma *cdma,
 108                         phys_addr_t pin_addr, u32 *map_addr)
 109 {
 110         /* Map dmaget cursor to corresponding mem handle */
 111         u32 offset = phys_addr - pin_addr;
 112         unsigned int data_count = 0, i;
 113
 114         /*
 115          * Sometimes we're given different hardware address to the same
 116          * page - in these cases the offset will get an invalid number and
 117          * we just have to bail out.
 118          */
 119         if (offset > HOST1X_DEBUG_MAX_PAGE_OFFSET) {
 120                 host1x_debug_output(o, "[address mismatch]\n");
 121                 return;
 122         }
 123
 124         for (i = 0; i < words; i++) {
 125                 u32 addr = phys_addr + i * 4;
 126                 u32 val = *(map_addr + offset / 4 + i);
 127
 128                 if (!data_count) {
 129                         host1x_debug_output(o, "%08x: %08x:", addr, val);
 130                         data_count = show_channel_command(o, val);
 131                 } else {
 132                         host1x_debug_output(o, "%08x%s", val,
 133                                             data_count > 0 ? ", " : "])\n");
 134                         data_count--;
 135                 }
 136         }
 137 }
 138
 139 static void show_channel_gathers(struct output *o, struct host1x_cdma *cdma)
 140 {
 141         struct host1x_job *job;
 142
 143         list_for_each_entry(job, &cdma->sync_queue, list) {
 144                 unsigned int i;
 145
 146                 host1x_debug_output(o, "\n%p: JOB, syncpt_id=%d, syncpt_val=%d, first_get=%08x, timeout=%d num_slots=%d, num_handles=%d\n",
 147                                     job, job->syncpt_id, job->syncpt_end,
 148                                     job->first_get, job->timeout,
 149                                     job->num_slots, job->num_unpins);
 150
 151                 for (i = 0; i < job->num_gathers; i++) {
 152                         struct host1x_job_gather *g = &job->gathers[i];
 153                         u32 *mapped;
 154
 155                         if (job->gather_copy_mapped)
 156                                 mapped = (u32 *)job->gather_copy_mapped;
 157                         else
 158                                 mapped = host1x_bo_mmap(g->bo);
 159
 160                         if (!mapped) {
 161                                 host1x_debug_output(o, "[could not mmap]\n");
 162                                 continue;
 163                         }
 164
 165                         host1x_debug_output(o, "    GATHER at %pad+%#x, %d words\n",
 166                                             &g->base, g->offset, g->words);
 167
 168                         show_gather(o, g->base + g->offset, g->words, cdma,
 169                                     g->base, mapped);
 170
 171                         if (!job->gather_copy_mapped)
 172                                 host1x_bo_munmap(g->bo, mapped);
 173                 }
 174         }
 175 }
 176
 177 static void host1x_debug_show_channel_cdma(struct host1x *host,
 178                                            struct host1x_channel *ch,
 179                                            struct output *o)
 180 {
 181         struct host1x_cdma *cdma = &ch->cdma;
 182         u32 dmaput, dmaget, dmactrl;
 183         u32 cbstat, cbread;
 184         u32 val, base, baseval;
 185
 186         dmaput = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAPUT);
 187         dmaget = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAGET);
 188         dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL);
 189         cbread = host1x_sync_readl(host, HOST1X_SYNC_CBREAD(ch->id));
 190         cbstat = host1x_sync_readl(host, HOST1X_SYNC_CBSTAT(ch->id));
 191
 192         host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev));
 193
 194         if (HOST1X_CHANNEL_DMACTRL_DMASTOP_V(dmactrl) ||
 195             !ch->cdma.push_buffer.mapped) {
 196                 host1x_debug_output(o, "inactive\n\n");
 197                 return;
 198         }
 199
 200         if (HOST1X_SYNC_CBSTAT_CBCLASS_V(cbstat) == HOST1X_CLASS_HOST1X &&
 201             HOST1X_SYNC_CBSTAT_CBOFFSET_V(cbstat) ==
 202                         HOST1X_UCLASS_WAIT_SYNCPT)
 203                 host1x_debug_output(o, "waiting on syncpt %d val %d\n",
 204                                     cbread >> 24, cbread & 0xffffff);
 205         else if (HOST1X_SYNC_CBSTAT_CBCLASS_V(cbstat) ==
 206                                 HOST1X_CLASS_HOST1X &&
 207                  HOST1X_SYNC_CBSTAT_CBOFFSET_V(cbstat) ==
 208                                 HOST1X_UCLASS_WAIT_SYNCPT_BASE) {
 209                 base = (cbread >> 16) & 0xff;
 210                 baseval =
 211                         host1x_sync_readl(host, HOST1X_SYNC_SYNCPT_BASE(base));
 212                 val = cbread & 0xffff;
 213                 host1x_debug_output(o, "waiting on syncpt %d val %d (base %d = %d; offset = %d)\n",
 214                                     cbread >> 24, baseval + val, base,
 215                                     baseval, val);
 216         } else
 217                 host1x_debug_output(o, "active class %02x, offset %04x, val %08x\n",
 218                                     HOST1X_SYNC_CBSTAT_CBCLASS_V(cbstat),
 219                                     HOST1X_SYNC_CBSTAT_CBOFFSET_V(cbstat),
 220                                     cbread);
 221
 222         host1x_debug_output(o, "DMAPUT %08x, DMAGET %08x, DMACTL %08x\n",
 223                             dmaput, dmaget, dmactrl);
 224         host1x_debug_output(o, "CBREAD %08x, CBSTAT %08x\n", cbread, cbstat);
 225
 226         show_channel_gathers(o, cdma);
 227         host1x_debug_output(o, "\n");
 228 }
 229
 230 static void host1x_debug_show_channel_fifo(struct host1x *host,
 231                                            struct host1x_channel *ch,
 232                                            struct output *o)
 233 {
 234         u32 val, rd_ptr, wr_ptr, start, end;
 235         unsigned int data_count = 0;
 236
 237         host1x_debug_output(o, "%u: fifo:\n", ch->id);
 238
 239         val = host1x_ch_readl(ch, HOST1X_CHANNEL_FIFOSTAT);
 240         host1x_debug_output(o, "FIFOSTAT %08x\n", val);
 241         if (HOST1X_CHANNEL_FIFOSTAT_CFEMPTY_V(val)) {
 242                 host1x_debug_output(o, "[empty]\n");
 243                 return;
 244         }
 245
 246         host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL);
 247         host1x_sync_writel(host, HOST1X_SYNC_CFPEEK_CTRL_ENA_F(1) |
 248                            HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(ch->id),
 249                            HOST1X_SYNC_CFPEEK_CTRL);
 250
 251         val = host1x_sync_readl(host, HOST1X_SYNC_CFPEEK_PTRS);
 252         rd_ptr = HOST1X_SYNC_CFPEEK_PTRS_CF_RD_PTR_V(val);
 253         wr_ptr = HOST1X_SYNC_CFPEEK_PTRS_CF_WR_PTR_V(val);
 254
 255         val = host1x_sync_readl(host, HOST1X_SYNC_CF_SETUP(ch->id));
 256         start = HOST1X_SYNC_CF_SETUP_BASE_V(val);
 257         end = HOST1X_SYNC_CF_SETUP_LIMIT_V(val);
 258
 259         do {
 260                 host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL);
 261                 host1x_sync_writel(host, HOST1X_SYNC_CFPEEK_CTRL_ENA_F(1) |
 262                                    HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(ch->id) |
 263                                    HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(rd_ptr),
 264                                    HOST1X_SYNC_CFPEEK_CTRL);
 265                 val = host1x_sync_readl(host, HOST1X_SYNC_CFPEEK_READ);
 266
 267                 if (!data_count) {
 268                         host1x_debug_output(o, "%08x:", val);
 269                         data_count = show_channel_command(o, val);
 270                 } else {
 271                         host1x_debug_output(o, "%08x%s", val,
 272                                             data_count > 0 ? ", " : "])\n");
 273                         data_count--;
 274                 }
 275
 276                 if (rd_ptr == end)
 277                         rd_ptr = start;
 278                 else
 279                         rd_ptr++;
 280         } while (rd_ptr != wr_ptr);
 281
 282         if (data_count)
 283                 host1x_debug_output(o, ", ...])\n");
 284         host1x_debug_output(o, "\n");
 285
 286         host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL);
 287 }
 288
 289 static void host1x_debug_show_mlocks(struct host1x *host, struct output *o)
 290 {
 291         unsigned int i;
 292
 293         host1x_debug_output(o, "---- mlocks ----\n");
 294
 295         for (i = 0; i < host1x_syncpt_nb_mlocks(host); i++) {
 296                 u32 owner =
 297                         host1x_sync_readl(host, HOST1X_SYNC_MLOCK_OWNER(i));
 298                 if (HOST1X_SYNC_MLOCK_OWNER_CH_OWNS_V(owner))
 299                         host1x_debug_output(o, "%u: locked by channel %u\n",
 300                                 i, HOST1X_SYNC_MLOCK_OWNER_CHID_V(owner));
 301                 else if (HOST1X_SYNC_MLOCK_OWNER_CPU_OWNS_V(owner))
 302                         host1x_debug_output(o, "%u: locked by cpu\n", i);
 303                 else
 304                         host1x_debug_output(o, "%u: unlocked\n", i);
 305         }
 306
 307         host1x_debug_output(o, "\n");
 308 }
 309
 310 static const struct host1x_debug_ops host1x_debug_ops = {
 311         .show_channel_cdma = host1x_debug_show_channel_cdma,
 312         .show_channel_fifo = host1x_debug_show_channel_fifo,
 313         .show_mlocks = host1x_debug_show_mlocks,
 314 };