hwmon: (it87) Add support for all pwm channels on IT8620E
[cascardo/linux.git] / drivers / hwmon / it87.c
1 /*
2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
3  *           monitoring.
4  *
5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
8  *  Fan Controller)
9  *
10  *  This driver supports only the Environment Controller in the IT8705F and
11  *  similar parts.  The other devices are supported by different drivers.
12  *
13  *  Supports: IT8603E  Super I/O chip w/LPC interface
14  *            IT8620E  Super I/O chip w/LPC interface
15  *            IT8623E  Super I/O chip w/LPC interface
16  *            IT8705F  Super I/O chip w/LPC interface
17  *            IT8712F  Super I/O chip w/LPC interface
18  *            IT8716F  Super I/O chip w/LPC interface
19  *            IT8718F  Super I/O chip w/LPC interface
20  *            IT8720F  Super I/O chip w/LPC interface
21  *            IT8721F  Super I/O chip w/LPC interface
22  *            IT8726F  Super I/O chip w/LPC interface
23  *            IT8728F  Super I/O chip w/LPC interface
24  *            IT8732F  Super I/O chip w/LPC interface
25  *            IT8758E  Super I/O chip w/LPC interface
26  *            IT8771E  Super I/O chip w/LPC interface
27  *            IT8772E  Super I/O chip w/LPC interface
28  *            IT8781F  Super I/O chip w/LPC interface
29  *            IT8782F  Super I/O chip w/LPC interface
30  *            IT8783E/F Super I/O chip w/LPC interface
31  *            IT8786E  Super I/O chip w/LPC interface
32  *            IT8790E  Super I/O chip w/LPC interface
33  *            Sis950   A clone of the IT8705F
34  *
35  *  Copyright (C) 2001 Chris Gauthron
36  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
37  *
38  *  This program is free software; you can redistribute it and/or modify
39  *  it under the terms of the GNU General Public License as published by
40  *  the Free Software Foundation; either version 2 of the License, or
41  *  (at your option) any later version.
42  *
43  *  This program is distributed in the hope that it will be useful,
44  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
45  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
46  *  GNU General Public License for more details.
47  *
48  *  You should have received a copy of the GNU General Public License
49  *  along with this program; if not, write to the Free Software
50  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
51  */
52
53 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
54
55 #include <linux/module.h>
56 #include <linux/init.h>
57 #include <linux/slab.h>
58 #include <linux/jiffies.h>
59 #include <linux/platform_device.h>
60 #include <linux/hwmon.h>
61 #include <linux/hwmon-sysfs.h>
62 #include <linux/hwmon-vid.h>
63 #include <linux/err.h>
64 #include <linux/mutex.h>
65 #include <linux/sysfs.h>
66 #include <linux/string.h>
67 #include <linux/dmi.h>
68 #include <linux/acpi.h>
69 #include <linux/io.h>
70
71 #define DRVNAME "it87"
72
73 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
74              it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8603,
75              it8620 };
76
77 static unsigned short force_id;
78 module_param(force_id, ushort, 0);
79 MODULE_PARM_DESC(force_id, "Override the detected device ID");
80
81 static struct platform_device *pdev;
82
83 #define REG     0x2e    /* The register to read/write */
84 #define DEV     0x07    /* Register: Logical device select */
85 #define VAL     0x2f    /* The value to read/write */
86 #define PME     0x04    /* The device with the fan registers in it */
87
88 /* The device with the IT8718F/IT8720F VID value in it */
89 #define GPIO    0x07
90
91 #define DEVID   0x20    /* Register: Device ID */
92 #define DEVREV  0x22    /* Register: Device Revision */
93
94 static inline int superio_inb(int reg)
95 {
96         outb(reg, REG);
97         return inb(VAL);
98 }
99
100 static inline void superio_outb(int reg, int val)
101 {
102         outb(reg, REG);
103         outb(val, VAL);
104 }
105
106 static int superio_inw(int reg)
107 {
108         int val;
109         outb(reg++, REG);
110         val = inb(VAL) << 8;
111         outb(reg, REG);
112         val |= inb(VAL);
113         return val;
114 }
115
116 static inline void superio_select(int ldn)
117 {
118         outb(DEV, REG);
119         outb(ldn, VAL);
120 }
121
122 static inline int superio_enter(void)
123 {
124         /*
125          * Try to reserve REG and REG + 1 for exclusive access.
126          */
127         if (!request_muxed_region(REG, 2, DRVNAME))
128                 return -EBUSY;
129
130         outb(0x87, REG);
131         outb(0x01, REG);
132         outb(0x55, REG);
133         outb(0x55, REG);
134         return 0;
135 }
136
137 static inline void superio_exit(void)
138 {
139         outb(0x02, REG);
140         outb(0x02, VAL);
141         release_region(REG, 2);
142 }
143
144 /* Logical device 4 registers */
145 #define IT8712F_DEVID 0x8712
146 #define IT8705F_DEVID 0x8705
147 #define IT8716F_DEVID 0x8716
148 #define IT8718F_DEVID 0x8718
149 #define IT8720F_DEVID 0x8720
150 #define IT8721F_DEVID 0x8721
151 #define IT8726F_DEVID 0x8726
152 #define IT8728F_DEVID 0x8728
153 #define IT8732F_DEVID 0x8732
154 #define IT8771E_DEVID 0x8771
155 #define IT8772E_DEVID 0x8772
156 #define IT8781F_DEVID 0x8781
157 #define IT8782F_DEVID 0x8782
158 #define IT8783E_DEVID 0x8783
159 #define IT8786E_DEVID 0x8786
160 #define IT8790E_DEVID 0x8790
161 #define IT8603E_DEVID 0x8603
162 #define IT8620E_DEVID 0x8620
163 #define IT8623E_DEVID 0x8623
164 #define IT87_ACT_REG  0x30
165 #define IT87_BASE_REG 0x60
166
167 /* Logical device 7 registers (IT8712F and later) */
168 #define IT87_SIO_GPIO1_REG      0x25
169 #define IT87_SIO_GPIO2_REG      0x26
170 #define IT87_SIO_GPIO3_REG      0x27
171 #define IT87_SIO_GPIO4_REG      0x28
172 #define IT87_SIO_GPIO5_REG      0x29
173 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
174 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
175 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
176 #define IT87_SIO_VID_REG        0xfc    /* VID value */
177 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
178
179 /* Update battery voltage after every reading if true */
180 static bool update_vbat;
181
182 /* Not all BIOSes properly configure the PWM registers */
183 static bool fix_pwm_polarity;
184
185 /* Many IT87 constants specified below */
186
187 /* Length of ISA address segment */
188 #define IT87_EXTENT 8
189
190 /* Length of ISA address segment for Environmental Controller */
191 #define IT87_EC_EXTENT 2
192
193 /* Offset of EC registers from ISA base address */
194 #define IT87_EC_OFFSET 5
195
196 /* Where are the ISA address/data registers relative to the EC base address */
197 #define IT87_ADDR_REG_OFFSET 0
198 #define IT87_DATA_REG_OFFSET 1
199
200 /*----- The IT87 registers -----*/
201
202 #define IT87_REG_CONFIG        0x00
203
204 #define IT87_REG_ALARM1        0x01
205 #define IT87_REG_ALARM2        0x02
206 #define IT87_REG_ALARM3        0x03
207
208 /*
209  * The IT8718F and IT8720F have the VID value in a different register, in
210  * Super-I/O configuration space.
211  */
212 #define IT87_REG_VID           0x0a
213 /*
214  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
215  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
216  * mode.
217  */
218 #define IT87_REG_FAN_DIV       0x0b
219 #define IT87_REG_FAN_16BIT     0x0c
220
221 /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
222
223 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
224 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
225 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
226 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
227 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
228
229 #define IT87_REG_FAN_MAIN_CTRL 0x13
230 #define IT87_REG_FAN_CTL       0x14
231 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
232 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
233
234 #define IT87_REG_VIN(nr)       (0x20 + (nr))
235 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
236
237 #define IT87_REG_AVCC3          0x2f
238
239 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
240 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
241 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
242 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
243
244 #define IT87_REG_VIN_ENABLE    0x50
245 #define IT87_REG_TEMP_ENABLE   0x51
246 #define IT87_REG_TEMP_EXTRA    0x55
247 #define IT87_REG_BEEP_ENABLE   0x5c
248
249 #define IT87_REG_CHIPID        0x58
250
251 #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
252 #define IT87_REG_AUTO_PWM(nr, i)  (0x65 + (nr) * 8 + (i))
253
254 struct it87_devices {
255         const char *name;
256         const char * const suffix;
257         u16 features;
258         u8 peci_mask;
259         u8 old_peci_mask;
260 };
261
262 #define FEAT_12MV_ADC           (1 << 0)
263 #define FEAT_NEWER_AUTOPWM      (1 << 1)
264 #define FEAT_OLD_AUTOPWM        (1 << 2)
265 #define FEAT_16BIT_FANS         (1 << 3)
266 #define FEAT_TEMP_OFFSET        (1 << 4)
267 #define FEAT_TEMP_PECI          (1 << 5)
268 #define FEAT_TEMP_OLD_PECI      (1 << 6)
269 #define FEAT_FAN16_CONFIG       (1 << 7)        /* Need to enable 16-bit fans */
270 #define FEAT_FIVE_FANS          (1 << 8)        /* Supports five fans */
271 #define FEAT_VID                (1 << 9)        /* Set if chip supports VID */
272 #define FEAT_IN7_INTERNAL       (1 << 10)       /* Set if in7 is internal */
273 #define FEAT_SIX_FANS           (1 << 11)       /* Supports six fans */
274 #define FEAT_10_9MV_ADC         (1 << 12)
275 #define FEAT_AVCC3              (1 << 13)       /* Chip supports in9/AVCC3 */
276 #define FEAT_SIX_PWM            (1 << 14)       /* Chip supports 6 pwm chn */
277
278 static const struct it87_devices it87_devices[] = {
279         [it87] = {
280                 .name = "it87",
281                 .suffix = "F",
282                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
283         },
284         [it8712] = {
285                 .name = "it8712",
286                 .suffix = "F",
287                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
288                                                 /* may need to overwrite */
289         },
290         [it8716] = {
291                 .name = "it8716",
292                 .suffix = "F",
293                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
294                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS,
295         },
296         [it8718] = {
297                 .name = "it8718",
298                 .suffix = "F",
299                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
300                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS,
301                 .old_peci_mask = 0x4,
302         },
303         [it8720] = {
304                 .name = "it8720",
305                 .suffix = "F",
306                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
307                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS,
308                 .old_peci_mask = 0x4,
309         },
310         [it8721] = {
311                 .name = "it8721",
312                 .suffix = "F",
313                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
314                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
315                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL,
316                 .peci_mask = 0x05,
317                 .old_peci_mask = 0x02,  /* Actually reports PCH */
318         },
319         [it8728] = {
320                 .name = "it8728",
321                 .suffix = "F",
322                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
323                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
324                   | FEAT_IN7_INTERNAL,
325                 .peci_mask = 0x07,
326         },
327         [it8732] = {
328                 .name = "it8732",
329                 .suffix = "F",
330                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
331                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
332                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
333                 .peci_mask = 0x07,
334                 .old_peci_mask = 0x02,  /* Actually reports PCH */
335         },
336         [it8771] = {
337                 .name = "it8771",
338                 .suffix = "E",
339                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
340                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
341                                 /* PECI: guesswork */
342                                 /* 12mV ADC (OHM) */
343                                 /* 16 bit fans (OHM) */
344                                 /* three fans, always 16 bit (guesswork) */
345                 .peci_mask = 0x07,
346         },
347         [it8772] = {
348                 .name = "it8772",
349                 .suffix = "E",
350                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
351                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
352                                 /* PECI (coreboot) */
353                                 /* 12mV ADC (HWSensors4, OHM) */
354                                 /* 16 bit fans (HWSensors4, OHM) */
355                                 /* three fans, always 16 bit (datasheet) */
356                 .peci_mask = 0x07,
357         },
358         [it8781] = {
359                 .name = "it8781",
360                 .suffix = "F",
361                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
362                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG,
363                 .old_peci_mask = 0x4,
364         },
365         [it8782] = {
366                 .name = "it8782",
367                 .suffix = "F",
368                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
369                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG,
370                 .old_peci_mask = 0x4,
371         },
372         [it8783] = {
373                 .name = "it8783",
374                 .suffix = "E/F",
375                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
376                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG,
377                 .old_peci_mask = 0x4,
378         },
379         [it8786] = {
380                 .name = "it8786",
381                 .suffix = "E",
382                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
383                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
384                 .peci_mask = 0x07,
385         },
386         [it8790] = {
387                 .name = "it8790",
388                 .suffix = "E",
389                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
390                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL,
391                 .peci_mask = 0x07,
392         },
393         [it8603] = {
394                 .name = "it8603",
395                 .suffix = "E",
396                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
397                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
398                   | FEAT_AVCC3,
399                 .peci_mask = 0x07,
400         },
401         [it8620] = {
402                 .name = "it8620",
403                 .suffix = "E",
404                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
405                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
406                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM,
407                 .peci_mask = 0x07,
408         },
409 };
410
411 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
412 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
413 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
414 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
415 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
416 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
417 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
418                                  ((data)->peci_mask & (1 << nr)))
419 #define has_temp_old_peci(data, nr) \
420                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
421                                  ((data)->old_peci_mask & (1 << nr)))
422 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
423 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
424                                                      FEAT_SIX_FANS))
425 #define has_vid(data)           ((data)->features & FEAT_VID)
426 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
427 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
428 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
429 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
430
431 struct it87_sio_data {
432         enum chips type;
433         /* Values read from Super-I/O config space */
434         u8 revision;
435         u8 vid_value;
436         u8 beep_pin;
437         u8 internal;    /* Internal sensors can be labeled */
438         /* Features skipped based on config or DMI */
439         u16 skip_in;
440         u8 skip_vid;
441         u8 skip_fan;
442         u8 skip_pwm;
443         u8 skip_temp;
444 };
445
446 /*
447  * For each registered chip, we need to keep some data in memory.
448  * The structure is dynamically allocated.
449  */
450 struct it87_data {
451         struct device *hwmon_dev;
452         enum chips type;
453         u16 features;
454         u8 peci_mask;
455         u8 old_peci_mask;
456
457         unsigned short addr;
458         const char *name;
459         struct mutex update_lock;
460         char valid;             /* !=0 if following fields are valid */
461         unsigned long last_updated;     /* In jiffies */
462
463         u16 in_scaled;          /* Internal voltage sensors are scaled */
464         u8 in[10][3];           /* [nr][0]=in, [1]=min, [2]=max */
465         u8 has_fan;             /* Bitfield, fans enabled */
466         u16 fan[6][2];          /* Register values, [nr][0]=fan, [1]=min */
467         u8 has_temp;            /* Bitfield, temp sensors enabled */
468         s8 temp[3][4];          /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
469         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
470         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
471         u8 fan_div[3];          /* Register encoding, shifted right */
472         u8 vid;                 /* Register encoding, combined */
473         u8 vrm;
474         u32 alarms;             /* Register encoding, combined */
475         u8 beeps;               /* Register encoding */
476         u8 fan_main_ctrl;       /* Register value */
477         u8 fan_ctl;             /* Register value */
478
479         /*
480          * The following 3 arrays correspond to the same registers up to
481          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
482          * 7, and we want to preserve settings on mode changes, so we have
483          * to track all values separately.
484          * Starting with the IT8721F, the manual PWM duty cycles are stored
485          * in separate registers (8-bit values), so the separate tracking
486          * is no longer needed, but it is still done to keep the driver
487          * simple.
488          */
489         u8 pwm_ctrl[6];         /* Register value */
490         u8 pwm_duty[6];         /* Manual PWM value set by user */
491         u8 pwm_temp_map[6];     /* PWM to temp. chan. mapping (bits 1-0) */
492
493         /* Automatic fan speed control registers */
494         u8 auto_pwm[3][4];      /* [nr][3] is hard-coded */
495         s8 auto_temp[3][5];     /* [nr][0] is point1_temp_hyst */
496 };
497
498 static int adc_lsb(const struct it87_data *data, int nr)
499 {
500         int lsb;
501
502         if (has_12mv_adc(data))
503                 lsb = 120;
504         else if (has_10_9mv_adc(data))
505                 lsb = 109;
506         else
507                 lsb = 160;
508         if (data->in_scaled & (1 << nr))
509                 lsb <<= 1;
510         return lsb;
511 }
512
513 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
514 {
515         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
516         return clamp_val(val, 0, 255);
517 }
518
519 static int in_from_reg(const struct it87_data *data, int nr, int val)
520 {
521         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
522 }
523
524 static inline u8 FAN_TO_REG(long rpm, int div)
525 {
526         if (rpm == 0)
527                 return 255;
528         rpm = clamp_val(rpm, 1, 1000000);
529         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
530 }
531
532 static inline u16 FAN16_TO_REG(long rpm)
533 {
534         if (rpm == 0)
535                 return 0xffff;
536         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
537 }
538
539 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
540                                 1350000 / ((val) * (div)))
541 /* The divider is fixed to 2 in 16-bit mode */
542 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
543                              1350000 / ((val) * 2))
544
545 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
546                                     ((val) + 500) / 1000), -128, 127))
547 #define TEMP_FROM_REG(val) ((val) * 1000)
548
549 static u8 pwm_to_reg(const struct it87_data *data, long val)
550 {
551         if (has_newer_autopwm(data))
552                 return val;
553         else
554                 return val >> 1;
555 }
556
557 static int pwm_from_reg(const struct it87_data *data, u8 reg)
558 {
559         if (has_newer_autopwm(data))
560                 return reg;
561         else
562                 return (reg & 0x7f) << 1;
563 }
564
565
566 static int DIV_TO_REG(int val)
567 {
568         int answer = 0;
569         while (answer < 7 && (val >>= 1))
570                 answer++;
571         return answer;
572 }
573 #define DIV_FROM_REG(val) (1 << (val))
574
575 /*
576  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
577  * depending on the chip type, to calculate the actual PWM frequency.
578  *
579  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
580  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
581  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
582  * sometimes just one. It is unknown if this is a datasheet error or real,
583  * so this is ignored for now.
584  */
585 static const unsigned int pwm_freq[8] = {
586         48000000,
587         24000000,
588         12000000,
589         8000000,
590         6000000,
591         3000000,
592         1500000,
593         750000,
594 };
595
596 static int it87_probe(struct platform_device *pdev);
597 static int it87_remove(struct platform_device *pdev);
598
599 static int it87_read_value(struct it87_data *data, u8 reg);
600 static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
601 static struct it87_data *it87_update_device(struct device *dev);
602 static int it87_check_pwm(struct device *dev);
603 static void it87_init_device(struct platform_device *pdev);
604
605
606 static struct platform_driver it87_driver = {
607         .driver = {
608                 .name   = DRVNAME,
609         },
610         .probe  = it87_probe,
611         .remove = it87_remove,
612 };
613
614 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
615                        char *buf)
616 {
617         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
618         int nr = sattr->nr;
619         int index = sattr->index;
620
621         struct it87_data *data = it87_update_device(dev);
622         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
623 }
624
625 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
626                       const char *buf, size_t count)
627 {
628         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
629         int nr = sattr->nr;
630         int index = sattr->index;
631
632         struct it87_data *data = dev_get_drvdata(dev);
633         unsigned long val;
634
635         if (kstrtoul(buf, 10, &val) < 0)
636                 return -EINVAL;
637
638         mutex_lock(&data->update_lock);
639         data->in[nr][index] = in_to_reg(data, nr, val);
640         it87_write_value(data,
641                          index == 1 ? IT87_REG_VIN_MIN(nr)
642                                     : IT87_REG_VIN_MAX(nr),
643                          data->in[nr][index]);
644         mutex_unlock(&data->update_lock);
645         return count;
646 }
647
648 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
649 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
650                             0, 1);
651 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
652                             0, 2);
653
654 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
655 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
656                             1, 1);
657 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
658                             1, 2);
659
660 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
661 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
662                             2, 1);
663 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
664                             2, 2);
665
666 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
667 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
668                             3, 1);
669 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
670                             3, 2);
671
672 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
673 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
674                             4, 1);
675 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
676                             4, 2);
677
678 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
679 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
680                             5, 1);
681 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
682                             5, 2);
683
684 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
685 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
686                             6, 1);
687 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
688                             6, 2);
689
690 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
691 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
692                             7, 1);
693 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
694                             7, 2);
695
696 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
697 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
698
699 /* 3 temperatures */
700 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
701                          char *buf)
702 {
703         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
704         int nr = sattr->nr;
705         int index = sattr->index;
706         struct it87_data *data = it87_update_device(dev);
707
708         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
709 }
710
711 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
712                         const char *buf, size_t count)
713 {
714         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
715         int nr = sattr->nr;
716         int index = sattr->index;
717         struct it87_data *data = dev_get_drvdata(dev);
718         long val;
719         u8 reg, regval;
720
721         if (kstrtol(buf, 10, &val) < 0)
722                 return -EINVAL;
723
724         mutex_lock(&data->update_lock);
725
726         switch (index) {
727         default:
728         case 1:
729                 reg = IT87_REG_TEMP_LOW(nr);
730                 break;
731         case 2:
732                 reg = IT87_REG_TEMP_HIGH(nr);
733                 break;
734         case 3:
735                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
736                 if (!(regval & 0x80)) {
737                         regval |= 0x80;
738                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
739                 }
740                 data->valid = 0;
741                 reg = IT87_REG_TEMP_OFFSET[nr];
742                 break;
743         }
744
745         data->temp[nr][index] = TEMP_TO_REG(val);
746         it87_write_value(data, reg, data->temp[nr][index]);
747         mutex_unlock(&data->update_lock);
748         return count;
749 }
750
751 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
752 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
753                             0, 1);
754 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
755                             0, 2);
756 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
757                             set_temp, 0, 3);
758 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
759 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
760                             1, 1);
761 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
762                             1, 2);
763 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
764                             set_temp, 1, 3);
765 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
766 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
767                             2, 1);
768 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
769                             2, 2);
770 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
771                             set_temp, 2, 3);
772
773 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
774                               char *buf)
775 {
776         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
777         int nr = sensor_attr->index;
778         struct it87_data *data = it87_update_device(dev);
779         u8 reg = data->sensor;      /* In case value is updated while used */
780         u8 extra = data->extra;
781
782         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1))
783             || (has_temp_old_peci(data, nr) && (extra & 0x80)))
784                 return sprintf(buf, "6\n");  /* Intel PECI */
785         if (reg & (1 << nr))
786                 return sprintf(buf, "3\n");  /* thermal diode */
787         if (reg & (8 << nr))
788                 return sprintf(buf, "4\n");  /* thermistor */
789         return sprintf(buf, "0\n");      /* disabled */
790 }
791
792 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
793                              const char *buf, size_t count)
794 {
795         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
796         int nr = sensor_attr->index;
797
798         struct it87_data *data = dev_get_drvdata(dev);
799         long val;
800         u8 reg, extra;
801
802         if (kstrtol(buf, 10, &val) < 0)
803                 return -EINVAL;
804
805         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
806         reg &= ~(1 << nr);
807         reg &= ~(8 << nr);
808         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
809                 reg &= 0x3f;
810         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
811         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
812                 extra &= 0x7f;
813         if (val == 2) { /* backwards compatibility */
814                 dev_warn(dev,
815                          "Sensor type 2 is deprecated, please use 4 instead\n");
816                 val = 4;
817         }
818         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
819         if (val == 3)
820                 reg |= 1 << nr;
821         else if (val == 4)
822                 reg |= 8 << nr;
823         else if (has_temp_peci(data, nr) && val == 6)
824                 reg |= (nr + 1) << 6;
825         else if (has_temp_old_peci(data, nr) && val == 6)
826                 extra |= 0x80;
827         else if (val != 0)
828                 return -EINVAL;
829
830         mutex_lock(&data->update_lock);
831         data->sensor = reg;
832         data->extra = extra;
833         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
834         if (has_temp_old_peci(data, nr))
835                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
836         data->valid = 0;        /* Force cache refresh */
837         mutex_unlock(&data->update_lock);
838         return count;
839 }
840
841 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
842                           set_temp_type, 0);
843 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
844                           set_temp_type, 1);
845 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
846                           set_temp_type, 2);
847
848 /* 3 Fans */
849
850 static int pwm_mode(const struct it87_data *data, int nr)
851 {
852         int ctrl = data->fan_main_ctrl & (1 << nr);
853
854         if (ctrl == 0 && data->type != it8603)          /* Full speed */
855                 return 0;
856         if (data->pwm_ctrl[nr] & 0x80)                  /* Automatic mode */
857                 return 2;
858         else                                            /* Manual mode */
859                 return 1;
860 }
861
862 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
863                         char *buf)
864 {
865         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
866         int nr = sattr->nr;
867         int index = sattr->index;
868         int speed;
869         struct it87_data *data = it87_update_device(dev);
870
871         speed = has_16bit_fans(data) ?
872                 FAN16_FROM_REG(data->fan[nr][index]) :
873                 FAN_FROM_REG(data->fan[nr][index],
874                              DIV_FROM_REG(data->fan_div[nr]));
875         return sprintf(buf, "%d\n", speed);
876 }
877
878 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
879                 char *buf)
880 {
881         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
882         int nr = sensor_attr->index;
883
884         struct it87_data *data = it87_update_device(dev);
885         return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
886 }
887 static ssize_t show_pwm_enable(struct device *dev,
888                 struct device_attribute *attr, char *buf)
889 {
890         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
891         int nr = sensor_attr->index;
892
893         struct it87_data *data = it87_update_device(dev);
894         return sprintf(buf, "%d\n", pwm_mode(data, nr));
895 }
896 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
897                 char *buf)
898 {
899         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
900         int nr = sensor_attr->index;
901
902         struct it87_data *data = it87_update_device(dev);
903         return sprintf(buf, "%d\n",
904                        pwm_from_reg(data, data->pwm_duty[nr]));
905 }
906 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
907                 char *buf)
908 {
909         struct it87_data *data = it87_update_device(dev);
910         int index = (data->fan_ctl >> 4) & 0x07;
911         unsigned int freq;
912
913         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
914
915         return sprintf(buf, "%u\n", freq);
916 }
917
918 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
919                        const char *buf, size_t count)
920 {
921         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
922         int nr = sattr->nr;
923         int index = sattr->index;
924
925         struct it87_data *data = dev_get_drvdata(dev);
926         long val;
927         u8 reg;
928
929         if (kstrtol(buf, 10, &val) < 0)
930                 return -EINVAL;
931
932         mutex_lock(&data->update_lock);
933
934         if (has_16bit_fans(data)) {
935                 data->fan[nr][index] = FAN16_TO_REG(val);
936                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
937                                  data->fan[nr][index] & 0xff);
938                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
939                                  data->fan[nr][index] >> 8);
940         } else {
941                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
942                 switch (nr) {
943                 case 0:
944                         data->fan_div[nr] = reg & 0x07;
945                         break;
946                 case 1:
947                         data->fan_div[nr] = (reg >> 3) & 0x07;
948                         break;
949                 case 2:
950                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
951                         break;
952                 }
953                 data->fan[nr][index] =
954                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
955                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
956                                  data->fan[nr][index]);
957         }
958
959         mutex_unlock(&data->update_lock);
960         return count;
961 }
962
963 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
964                 const char *buf, size_t count)
965 {
966         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
967         int nr = sensor_attr->index;
968
969         struct it87_data *data = dev_get_drvdata(dev);
970         unsigned long val;
971         int min;
972         u8 old;
973
974         if (kstrtoul(buf, 10, &val) < 0)
975                 return -EINVAL;
976
977         mutex_lock(&data->update_lock);
978         old = it87_read_value(data, IT87_REG_FAN_DIV);
979
980         /* Save fan min limit */
981         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
982
983         switch (nr) {
984         case 0:
985         case 1:
986                 data->fan_div[nr] = DIV_TO_REG(val);
987                 break;
988         case 2:
989                 if (val < 8)
990                         data->fan_div[nr] = 1;
991                 else
992                         data->fan_div[nr] = 3;
993         }
994         val = old & 0x80;
995         val |= (data->fan_div[0] & 0x07);
996         val |= (data->fan_div[1] & 0x07) << 3;
997         if (data->fan_div[2] == 3)
998                 val |= 0x1 << 6;
999         it87_write_value(data, IT87_REG_FAN_DIV, val);
1000
1001         /* Restore fan min limit */
1002         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1003         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1004
1005         mutex_unlock(&data->update_lock);
1006         return count;
1007 }
1008
1009 /* Returns 0 if OK, -EINVAL otherwise */
1010 static int check_trip_points(struct device *dev, int nr)
1011 {
1012         const struct it87_data *data = dev_get_drvdata(dev);
1013         int i, err = 0;
1014
1015         if (has_old_autopwm(data)) {
1016                 for (i = 0; i < 3; i++) {
1017                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1018                                 err = -EINVAL;
1019                 }
1020                 for (i = 0; i < 2; i++) {
1021                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1022                                 err = -EINVAL;
1023                 }
1024         }
1025
1026         if (err) {
1027                 dev_err(dev,
1028                         "Inconsistent trip points, not switching to automatic mode\n");
1029                 dev_err(dev, "Adjust the trip points and try again\n");
1030         }
1031         return err;
1032 }
1033
1034 static ssize_t set_pwm_enable(struct device *dev,
1035                 struct device_attribute *attr, const char *buf, size_t count)
1036 {
1037         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1038         int nr = sensor_attr->index;
1039
1040         struct it87_data *data = dev_get_drvdata(dev);
1041         long val;
1042
1043         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1044                 return -EINVAL;
1045
1046         /* Check trip points before switching to automatic mode */
1047         if (val == 2) {
1048                 if (check_trip_points(dev, nr) < 0)
1049                         return -EINVAL;
1050         }
1051
1052         /* IT8603E does not have on/off mode */
1053         if (val == 0 && data->type == it8603)
1054                 return -EINVAL;
1055
1056         mutex_lock(&data->update_lock);
1057
1058         if (val == 0) {
1059                 int tmp;
1060                 /* make sure the fan is on when in on/off mode */
1061                 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1062                 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1063                 /* set on/off mode */
1064                 data->fan_main_ctrl &= ~(1 << nr);
1065                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1066                                  data->fan_main_ctrl);
1067         } else {
1068                 if (val == 1)                           /* Manual mode */
1069                         data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1070                                              data->pwm_temp_map[nr] :
1071                                              data->pwm_duty[nr];
1072                 else                                    /* Automatic mode */
1073                         data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1074                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1075
1076                 if (data->type != it8603) {
1077                         /* set SmartGuardian mode */
1078                         data->fan_main_ctrl |= (1 << nr);
1079                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1080                                          data->fan_main_ctrl);
1081                 }
1082         }
1083
1084         mutex_unlock(&data->update_lock);
1085         return count;
1086 }
1087 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1088                 const char *buf, size_t count)
1089 {
1090         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1091         int nr = sensor_attr->index;
1092
1093         struct it87_data *data = dev_get_drvdata(dev);
1094         long val;
1095
1096         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1097                 return -EINVAL;
1098
1099         mutex_lock(&data->update_lock);
1100         if (has_newer_autopwm(data)) {
1101                 /*
1102                  * If we are in automatic mode, the PWM duty cycle register
1103                  * is read-only so we can't write the value.
1104                  */
1105                 if (data->pwm_ctrl[nr] & 0x80) {
1106                         mutex_unlock(&data->update_lock);
1107                         return -EBUSY;
1108                 }
1109                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1110                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1111                                  data->pwm_duty[nr]);
1112         } else {
1113                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1114                 /*
1115                  * If we are in manual mode, write the duty cycle immediately;
1116                  * otherwise, just store it for later use.
1117                  */
1118                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1119                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1120                         it87_write_value(data, IT87_REG_PWM[nr],
1121                                          data->pwm_ctrl[nr]);
1122                 }
1123         }
1124         mutex_unlock(&data->update_lock);
1125         return count;
1126 }
1127 static ssize_t set_pwm_freq(struct device *dev,
1128                 struct device_attribute *attr, const char *buf, size_t count)
1129 {
1130         struct it87_data *data = dev_get_drvdata(dev);
1131         unsigned long val;
1132         int i;
1133
1134         if (kstrtoul(buf, 10, &val) < 0)
1135                 return -EINVAL;
1136
1137         val = clamp_val(val, 0, 1000000);
1138         val *= has_newer_autopwm(data) ? 256 : 128;
1139
1140         /* Search for the nearest available frequency */
1141         for (i = 0; i < 7; i++) {
1142                 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
1143                         break;
1144         }
1145
1146         mutex_lock(&data->update_lock);
1147         data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1148         data->fan_ctl |= i << 4;
1149         it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1150         mutex_unlock(&data->update_lock);
1151
1152         return count;
1153 }
1154 static ssize_t show_pwm_temp_map(struct device *dev,
1155                 struct device_attribute *attr, char *buf)
1156 {
1157         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1158         int nr = sensor_attr->index;
1159
1160         struct it87_data *data = it87_update_device(dev);
1161         int map;
1162
1163         if (data->pwm_temp_map[nr] < 3)
1164                 map = 1 << data->pwm_temp_map[nr];
1165         else
1166                 map = 0;                        /* Should never happen */
1167         return sprintf(buf, "%d\n", map);
1168 }
1169 static ssize_t set_pwm_temp_map(struct device *dev,
1170                 struct device_attribute *attr, const char *buf, size_t count)
1171 {
1172         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1173         int nr = sensor_attr->index;
1174
1175         struct it87_data *data = dev_get_drvdata(dev);
1176         long val;
1177         u8 reg;
1178
1179         /*
1180          * This check can go away if we ever support automatic fan speed
1181          * control on newer chips.
1182          */
1183         if (!has_old_autopwm(data)) {
1184                 dev_notice(dev, "Mapping change disabled for safety reasons\n");
1185                 return -EINVAL;
1186         }
1187
1188         if (kstrtol(buf, 10, &val) < 0)
1189                 return -EINVAL;
1190
1191         switch (val) {
1192         case (1 << 0):
1193                 reg = 0x00;
1194                 break;
1195         case (1 << 1):
1196                 reg = 0x01;
1197                 break;
1198         case (1 << 2):
1199                 reg = 0x02;
1200                 break;
1201         default:
1202                 return -EINVAL;
1203         }
1204
1205         mutex_lock(&data->update_lock);
1206         data->pwm_temp_map[nr] = reg;
1207         /*
1208          * If we are in automatic mode, write the temp mapping immediately;
1209          * otherwise, just store it for later use.
1210          */
1211         if (data->pwm_ctrl[nr] & 0x80) {
1212                 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1213                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1214         }
1215         mutex_unlock(&data->update_lock);
1216         return count;
1217 }
1218
1219 static ssize_t show_auto_pwm(struct device *dev,
1220                 struct device_attribute *attr, char *buf)
1221 {
1222         struct it87_data *data = it87_update_device(dev);
1223         struct sensor_device_attribute_2 *sensor_attr =
1224                         to_sensor_dev_attr_2(attr);
1225         int nr = sensor_attr->nr;
1226         int point = sensor_attr->index;
1227
1228         return sprintf(buf, "%d\n",
1229                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1230 }
1231
1232 static ssize_t set_auto_pwm(struct device *dev,
1233                 struct device_attribute *attr, const char *buf, size_t count)
1234 {
1235         struct it87_data *data = dev_get_drvdata(dev);
1236         struct sensor_device_attribute_2 *sensor_attr =
1237                         to_sensor_dev_attr_2(attr);
1238         int nr = sensor_attr->nr;
1239         int point = sensor_attr->index;
1240         long val;
1241
1242         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1243                 return -EINVAL;
1244
1245         mutex_lock(&data->update_lock);
1246         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1247         it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1248                          data->auto_pwm[nr][point]);
1249         mutex_unlock(&data->update_lock);
1250         return count;
1251 }
1252
1253 static ssize_t show_auto_temp(struct device *dev,
1254                 struct device_attribute *attr, char *buf)
1255 {
1256         struct it87_data *data = it87_update_device(dev);
1257         struct sensor_device_attribute_2 *sensor_attr =
1258                         to_sensor_dev_attr_2(attr);
1259         int nr = sensor_attr->nr;
1260         int point = sensor_attr->index;
1261
1262         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1263 }
1264
1265 static ssize_t set_auto_temp(struct device *dev,
1266                 struct device_attribute *attr, const char *buf, size_t count)
1267 {
1268         struct it87_data *data = dev_get_drvdata(dev);
1269         struct sensor_device_attribute_2 *sensor_attr =
1270                         to_sensor_dev_attr_2(attr);
1271         int nr = sensor_attr->nr;
1272         int point = sensor_attr->index;
1273         long val;
1274
1275         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1276                 return -EINVAL;
1277
1278         mutex_lock(&data->update_lock);
1279         data->auto_temp[nr][point] = TEMP_TO_REG(val);
1280         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1281                          data->auto_temp[nr][point]);
1282         mutex_unlock(&data->update_lock);
1283         return count;
1284 }
1285
1286 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1287 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1288                             0, 1);
1289 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1290                           set_fan_div, 0);
1291
1292 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1293 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1294                             1, 1);
1295 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1296                           set_fan_div, 1);
1297
1298 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1299 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1300                             2, 1);
1301 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1302                           set_fan_div, 2);
1303
1304 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1305 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1306                             3, 1);
1307
1308 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1309 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1310                             4, 1);
1311
1312 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1313 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1314                             5, 1);
1315
1316 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1317                           show_pwm_enable, set_pwm_enable, 0);
1318 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1319 static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
1320 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
1321                           show_pwm_temp_map, set_pwm_temp_map, 0);
1322 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1323                             show_auto_pwm, set_auto_pwm, 0, 0);
1324 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1325                             show_auto_pwm, set_auto_pwm, 0, 1);
1326 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1327                             show_auto_pwm, set_auto_pwm, 0, 2);
1328 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1329                             show_auto_pwm, NULL, 0, 3);
1330 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1331                             show_auto_temp, set_auto_temp, 0, 1);
1332 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1333                             show_auto_temp, set_auto_temp, 0, 0);
1334 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1335                             show_auto_temp, set_auto_temp, 0, 2);
1336 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1337                             show_auto_temp, set_auto_temp, 0, 3);
1338 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1339                             show_auto_temp, set_auto_temp, 0, 4);
1340
1341 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1342                           show_pwm_enable, set_pwm_enable, 1);
1343 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1344 static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL);
1345 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
1346                           show_pwm_temp_map, set_pwm_temp_map, 1);
1347 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1348                             show_auto_pwm, set_auto_pwm, 1, 0);
1349 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1350                             show_auto_pwm, set_auto_pwm, 1, 1);
1351 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1352                             show_auto_pwm, set_auto_pwm, 1, 2);
1353 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1354                             show_auto_pwm, NULL, 1, 3);
1355 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1356                             show_auto_temp, set_auto_temp, 1, 1);
1357 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1358                             show_auto_temp, set_auto_temp, 1, 0);
1359 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1360                             show_auto_temp, set_auto_temp, 1, 2);
1361 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1362                             show_auto_temp, set_auto_temp, 1, 3);
1363 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1364                             show_auto_temp, set_auto_temp, 1, 4);
1365
1366 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1367                           show_pwm_enable, set_pwm_enable, 2);
1368 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1369 static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL);
1370 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
1371                           show_pwm_temp_map, set_pwm_temp_map, 2);
1372 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1373                             show_auto_pwm, set_auto_pwm, 2, 0);
1374 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1375                             show_auto_pwm, set_auto_pwm, 2, 1);
1376 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1377                             show_auto_pwm, set_auto_pwm, 2, 2);
1378 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1379                             show_auto_pwm, NULL, 2, 3);
1380 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1381                             show_auto_temp, set_auto_temp, 2, 1);
1382 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1383                             show_auto_temp, set_auto_temp, 2, 0);
1384 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1385                             show_auto_temp, set_auto_temp, 2, 2);
1386 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1387                             show_auto_temp, set_auto_temp, 2, 3);
1388 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1389                             show_auto_temp, set_auto_temp, 2, 4);
1390
1391 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1392                           show_pwm_enable, set_pwm_enable, 3);
1393 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1394 static DEVICE_ATTR(pwm4_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
1395 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO | S_IWUSR,
1396                           show_pwm_temp_map, set_pwm_temp_map, 3);
1397
1398 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1399                           show_pwm_enable, set_pwm_enable, 4);
1400 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1401 static DEVICE_ATTR(pwm5_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
1402 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO | S_IWUSR,
1403                           show_pwm_temp_map, set_pwm_temp_map, 4);
1404
1405 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1406                           show_pwm_enable, set_pwm_enable, 5);
1407 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1408 static DEVICE_ATTR(pwm6_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
1409 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO | S_IWUSR,
1410                           show_pwm_temp_map, set_pwm_temp_map, 5);
1411
1412 /* Alarms */
1413 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1414                 char *buf)
1415 {
1416         struct it87_data *data = it87_update_device(dev);
1417         return sprintf(buf, "%u\n", data->alarms);
1418 }
1419 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1420
1421 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1422                 char *buf)
1423 {
1424         int bitnr = to_sensor_dev_attr(attr)->index;
1425         struct it87_data *data = it87_update_device(dev);
1426         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1427 }
1428
1429 static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1430                 *attr, const char *buf, size_t count)
1431 {
1432         struct it87_data *data = dev_get_drvdata(dev);
1433         long val;
1434         int config;
1435
1436         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1437                 return -EINVAL;
1438
1439         mutex_lock(&data->update_lock);
1440         config = it87_read_value(data, IT87_REG_CONFIG);
1441         if (config < 0) {
1442                 count = config;
1443         } else {
1444                 config |= 1 << 5;
1445                 it87_write_value(data, IT87_REG_CONFIG, config);
1446                 /* Invalidate cache to force re-read */
1447                 data->valid = 0;
1448         }
1449         mutex_unlock(&data->update_lock);
1450
1451         return count;
1452 }
1453
1454 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1455 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1456 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1457 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1458 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1459 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1460 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1461 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1462 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1463 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1464 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1465 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1466 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1467 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1468 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1469 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1470 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1471 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1472                           show_alarm, clear_intrusion, 4);
1473
1474 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1475                 char *buf)
1476 {
1477         int bitnr = to_sensor_dev_attr(attr)->index;
1478         struct it87_data *data = it87_update_device(dev);
1479         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1480 }
1481 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1482                 const char *buf, size_t count)
1483 {
1484         int bitnr = to_sensor_dev_attr(attr)->index;
1485         struct it87_data *data = dev_get_drvdata(dev);
1486         long val;
1487
1488         if (kstrtol(buf, 10, &val) < 0
1489          || (val != 0 && val != 1))
1490                 return -EINVAL;
1491
1492         mutex_lock(&data->update_lock);
1493         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1494         if (val)
1495                 data->beeps |= (1 << bitnr);
1496         else
1497                 data->beeps &= ~(1 << bitnr);
1498         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1499         mutex_unlock(&data->update_lock);
1500         return count;
1501 }
1502
1503 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1504                           show_beep, set_beep, 1);
1505 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1506 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1507 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1508 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1509 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1510 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1511 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1512 /* fanX_beep writability is set later */
1513 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1514 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1515 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1516 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1517 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1518 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1519 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1520                           show_beep, set_beep, 2);
1521 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1522 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1523
1524 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1525                 char *buf)
1526 {
1527         struct it87_data *data = dev_get_drvdata(dev);
1528         return sprintf(buf, "%u\n", data->vrm);
1529 }
1530 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1531                 const char *buf, size_t count)
1532 {
1533         struct it87_data *data = dev_get_drvdata(dev);
1534         unsigned long val;
1535
1536         if (kstrtoul(buf, 10, &val) < 0)
1537                 return -EINVAL;
1538
1539         data->vrm = val;
1540
1541         return count;
1542 }
1543 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1544
1545 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1546                 char *buf)
1547 {
1548         struct it87_data *data = it87_update_device(dev);
1549         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1550 }
1551 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1552
1553 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1554                 char *buf)
1555 {
1556         static const char * const labels[] = {
1557                 "+5V",
1558                 "5VSB",
1559                 "Vbat",
1560         };
1561         static const char * const labels_it8721[] = {
1562                 "+3.3V",
1563                 "3VSB",
1564                 "Vbat",
1565         };
1566         struct it87_data *data = dev_get_drvdata(dev);
1567         int nr = to_sensor_dev_attr(attr)->index;
1568         const char *label;
1569
1570         if (has_12mv_adc(data) || has_10_9mv_adc(data))
1571                 label = labels_it8721[nr];
1572         else
1573                 label = labels[nr];
1574
1575         return sprintf(buf, "%s\n", label);
1576 }
1577 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1578 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1579 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1580 /* AVCC3 */
1581 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0);
1582
1583 static ssize_t show_name(struct device *dev, struct device_attribute
1584                          *devattr, char *buf)
1585 {
1586         struct it87_data *data = dev_get_drvdata(dev);
1587         return sprintf(buf, "%s\n", data->name);
1588 }
1589 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1590
1591 static struct attribute *it87_attributes_in[10][5] = {
1592 {
1593         &sensor_dev_attr_in0_input.dev_attr.attr,
1594         &sensor_dev_attr_in0_min.dev_attr.attr,
1595         &sensor_dev_attr_in0_max.dev_attr.attr,
1596         &sensor_dev_attr_in0_alarm.dev_attr.attr,
1597         NULL
1598 }, {
1599         &sensor_dev_attr_in1_input.dev_attr.attr,
1600         &sensor_dev_attr_in1_min.dev_attr.attr,
1601         &sensor_dev_attr_in1_max.dev_attr.attr,
1602         &sensor_dev_attr_in1_alarm.dev_attr.attr,
1603         NULL
1604 }, {
1605         &sensor_dev_attr_in2_input.dev_attr.attr,
1606         &sensor_dev_attr_in2_min.dev_attr.attr,
1607         &sensor_dev_attr_in2_max.dev_attr.attr,
1608         &sensor_dev_attr_in2_alarm.dev_attr.attr,
1609         NULL
1610 }, {
1611         &sensor_dev_attr_in3_input.dev_attr.attr,
1612         &sensor_dev_attr_in3_min.dev_attr.attr,
1613         &sensor_dev_attr_in3_max.dev_attr.attr,
1614         &sensor_dev_attr_in3_alarm.dev_attr.attr,
1615         NULL
1616 }, {
1617         &sensor_dev_attr_in4_input.dev_attr.attr,
1618         &sensor_dev_attr_in4_min.dev_attr.attr,
1619         &sensor_dev_attr_in4_max.dev_attr.attr,
1620         &sensor_dev_attr_in4_alarm.dev_attr.attr,
1621         NULL
1622 }, {
1623         &sensor_dev_attr_in5_input.dev_attr.attr,
1624         &sensor_dev_attr_in5_min.dev_attr.attr,
1625         &sensor_dev_attr_in5_max.dev_attr.attr,
1626         &sensor_dev_attr_in5_alarm.dev_attr.attr,
1627         NULL
1628 }, {
1629         &sensor_dev_attr_in6_input.dev_attr.attr,
1630         &sensor_dev_attr_in6_min.dev_attr.attr,
1631         &sensor_dev_attr_in6_max.dev_attr.attr,
1632         &sensor_dev_attr_in6_alarm.dev_attr.attr,
1633         NULL
1634 }, {
1635         &sensor_dev_attr_in7_input.dev_attr.attr,
1636         &sensor_dev_attr_in7_min.dev_attr.attr,
1637         &sensor_dev_attr_in7_max.dev_attr.attr,
1638         &sensor_dev_attr_in7_alarm.dev_attr.attr,
1639         NULL
1640 }, {
1641         &sensor_dev_attr_in8_input.dev_attr.attr,
1642         NULL
1643 }, {
1644         &sensor_dev_attr_in9_input.dev_attr.attr,
1645         NULL
1646 } };
1647
1648 static const struct attribute_group it87_group_in[10] = {
1649         { .attrs = it87_attributes_in[0] },
1650         { .attrs = it87_attributes_in[1] },
1651         { .attrs = it87_attributes_in[2] },
1652         { .attrs = it87_attributes_in[3] },
1653         { .attrs = it87_attributes_in[4] },
1654         { .attrs = it87_attributes_in[5] },
1655         { .attrs = it87_attributes_in[6] },
1656         { .attrs = it87_attributes_in[7] },
1657         { .attrs = it87_attributes_in[8] },
1658         { .attrs = it87_attributes_in[9] },
1659 };
1660
1661 static struct attribute *it87_attributes_temp[3][6] = {
1662 {
1663         &sensor_dev_attr_temp1_input.dev_attr.attr,
1664         &sensor_dev_attr_temp1_max.dev_attr.attr,
1665         &sensor_dev_attr_temp1_min.dev_attr.attr,
1666         &sensor_dev_attr_temp1_type.dev_attr.attr,
1667         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1668         NULL
1669 } , {
1670         &sensor_dev_attr_temp2_input.dev_attr.attr,
1671         &sensor_dev_attr_temp2_max.dev_attr.attr,
1672         &sensor_dev_attr_temp2_min.dev_attr.attr,
1673         &sensor_dev_attr_temp2_type.dev_attr.attr,
1674         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1675         NULL
1676 } , {
1677         &sensor_dev_attr_temp3_input.dev_attr.attr,
1678         &sensor_dev_attr_temp3_max.dev_attr.attr,
1679         &sensor_dev_attr_temp3_min.dev_attr.attr,
1680         &sensor_dev_attr_temp3_type.dev_attr.attr,
1681         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1682         NULL
1683 } };
1684
1685 static const struct attribute_group it87_group_temp[3] = {
1686         { .attrs = it87_attributes_temp[0] },
1687         { .attrs = it87_attributes_temp[1] },
1688         { .attrs = it87_attributes_temp[2] },
1689 };
1690
1691 static struct attribute *it87_attributes_temp_offset[] = {
1692         &sensor_dev_attr_temp1_offset.dev_attr.attr,
1693         &sensor_dev_attr_temp2_offset.dev_attr.attr,
1694         &sensor_dev_attr_temp3_offset.dev_attr.attr,
1695 };
1696
1697 static struct attribute *it87_attributes[] = {
1698         &dev_attr_alarms.attr,
1699         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
1700         &dev_attr_name.attr,
1701         NULL
1702 };
1703
1704 static const struct attribute_group it87_group = {
1705         .attrs = it87_attributes,
1706 };
1707
1708 static struct attribute *it87_attributes_in_beep[] = {
1709         &sensor_dev_attr_in0_beep.dev_attr.attr,
1710         &sensor_dev_attr_in1_beep.dev_attr.attr,
1711         &sensor_dev_attr_in2_beep.dev_attr.attr,
1712         &sensor_dev_attr_in3_beep.dev_attr.attr,
1713         &sensor_dev_attr_in4_beep.dev_attr.attr,
1714         &sensor_dev_attr_in5_beep.dev_attr.attr,
1715         &sensor_dev_attr_in6_beep.dev_attr.attr,
1716         &sensor_dev_attr_in7_beep.dev_attr.attr,
1717         NULL,
1718         NULL,
1719 };
1720
1721 static struct attribute *it87_attributes_temp_beep[] = {
1722         &sensor_dev_attr_temp1_beep.dev_attr.attr,
1723         &sensor_dev_attr_temp2_beep.dev_attr.attr,
1724         &sensor_dev_attr_temp3_beep.dev_attr.attr,
1725 };
1726
1727 static struct attribute *it87_attributes_fan[6][3+1] = { {
1728         &sensor_dev_attr_fan1_input.dev_attr.attr,
1729         &sensor_dev_attr_fan1_min.dev_attr.attr,
1730         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1731         NULL
1732 }, {
1733         &sensor_dev_attr_fan2_input.dev_attr.attr,
1734         &sensor_dev_attr_fan2_min.dev_attr.attr,
1735         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1736         NULL
1737 }, {
1738         &sensor_dev_attr_fan3_input.dev_attr.attr,
1739         &sensor_dev_attr_fan3_min.dev_attr.attr,
1740         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1741         NULL
1742 }, {
1743         &sensor_dev_attr_fan4_input.dev_attr.attr,
1744         &sensor_dev_attr_fan4_min.dev_attr.attr,
1745         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1746         NULL
1747 }, {
1748         &sensor_dev_attr_fan5_input.dev_attr.attr,
1749         &sensor_dev_attr_fan5_min.dev_attr.attr,
1750         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1751         NULL
1752 }, {
1753         &sensor_dev_attr_fan6_input.dev_attr.attr,
1754         &sensor_dev_attr_fan6_min.dev_attr.attr,
1755         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
1756         NULL
1757 } };
1758
1759 static const struct attribute_group it87_group_fan[6] = {
1760         { .attrs = it87_attributes_fan[0] },
1761         { .attrs = it87_attributes_fan[1] },
1762         { .attrs = it87_attributes_fan[2] },
1763         { .attrs = it87_attributes_fan[3] },
1764         { .attrs = it87_attributes_fan[4] },
1765         { .attrs = it87_attributes_fan[5] },
1766 };
1767
1768 static const struct attribute *it87_attributes_fan_div[] = {
1769         &sensor_dev_attr_fan1_div.dev_attr.attr,
1770         &sensor_dev_attr_fan2_div.dev_attr.attr,
1771         &sensor_dev_attr_fan3_div.dev_attr.attr,
1772 };
1773
1774 static struct attribute *it87_attributes_pwm[6][4+1] = { {
1775         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1776         &sensor_dev_attr_pwm1.dev_attr.attr,
1777         &dev_attr_pwm1_freq.attr,
1778         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
1779         NULL
1780 }, {
1781         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1782         &sensor_dev_attr_pwm2.dev_attr.attr,
1783         &dev_attr_pwm2_freq.attr,
1784         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
1785         NULL
1786 }, {
1787         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1788         &sensor_dev_attr_pwm3.dev_attr.attr,
1789         &dev_attr_pwm3_freq.attr,
1790         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
1791         NULL
1792 }, {
1793         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
1794         &sensor_dev_attr_pwm4.dev_attr.attr,
1795         &dev_attr_pwm4_freq.attr,
1796         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
1797         NULL
1798 }, {
1799         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
1800         &sensor_dev_attr_pwm5.dev_attr.attr,
1801         &dev_attr_pwm5_freq.attr,
1802         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
1803         NULL
1804 }, {
1805         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
1806         &sensor_dev_attr_pwm6.dev_attr.attr,
1807         &dev_attr_pwm6_freq.attr,
1808         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
1809         NULL
1810 } };
1811
1812 static const struct attribute_group it87_group_pwm[6] = {
1813         { .attrs = it87_attributes_pwm[0] },
1814         { .attrs = it87_attributes_pwm[1] },
1815         { .attrs = it87_attributes_pwm[2] },
1816         { .attrs = it87_attributes_pwm[3] },
1817         { .attrs = it87_attributes_pwm[4] },
1818         { .attrs = it87_attributes_pwm[5] },
1819 };
1820
1821 static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1822         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1823         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1824         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1825         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1826         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1827         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1828         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1829         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1830         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1831         NULL
1832 }, {
1833         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1834         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1835         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1836         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1837         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1838         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1839         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1840         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1841         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1842         NULL
1843 }, {
1844         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1845         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1846         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1847         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1848         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1849         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1850         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1851         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1852         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1853         NULL
1854 } };
1855
1856 static const struct attribute_group it87_group_autopwm[3] = {
1857         { .attrs = it87_attributes_autopwm[0] },
1858         { .attrs = it87_attributes_autopwm[1] },
1859         { .attrs = it87_attributes_autopwm[2] },
1860 };
1861
1862 static struct attribute *it87_attributes_fan_beep[] = {
1863         &sensor_dev_attr_fan1_beep.dev_attr.attr,
1864         &sensor_dev_attr_fan2_beep.dev_attr.attr,
1865         &sensor_dev_attr_fan3_beep.dev_attr.attr,
1866         &sensor_dev_attr_fan4_beep.dev_attr.attr,
1867         &sensor_dev_attr_fan5_beep.dev_attr.attr,
1868         &sensor_dev_attr_fan6_beep.dev_attr.attr,
1869 };
1870
1871 static struct attribute *it87_attributes_vid[] = {
1872         &dev_attr_vrm.attr,
1873         &dev_attr_cpu0_vid.attr,
1874         NULL
1875 };
1876
1877 static const struct attribute_group it87_group_vid = {
1878         .attrs = it87_attributes_vid,
1879 };
1880
1881 static struct attribute *it87_attributes_label[] = {
1882         &sensor_dev_attr_in3_label.dev_attr.attr,
1883         &sensor_dev_attr_in7_label.dev_attr.attr,
1884         &sensor_dev_attr_in8_label.dev_attr.attr,
1885         &sensor_dev_attr_in9_label.dev_attr.attr,
1886         NULL
1887 };
1888
1889 static const struct attribute_group it87_group_label = {
1890         .attrs = it87_attributes_label,
1891 };
1892
1893 /* SuperIO detection - will change isa_address if a chip is found */
1894 static int __init it87_find(unsigned short *address,
1895         struct it87_sio_data *sio_data)
1896 {
1897         int err;
1898         u16 chip_type;
1899         const char *board_vendor, *board_name;
1900         const struct it87_devices *config;
1901
1902         err = superio_enter();
1903         if (err)
1904                 return err;
1905
1906         err = -ENODEV;
1907         chip_type = force_id ? force_id : superio_inw(DEVID);
1908
1909         switch (chip_type) {
1910         case IT8705F_DEVID:
1911                 sio_data->type = it87;
1912                 break;
1913         case IT8712F_DEVID:
1914                 sio_data->type = it8712;
1915                 break;
1916         case IT8716F_DEVID:
1917         case IT8726F_DEVID:
1918                 sio_data->type = it8716;
1919                 break;
1920         case IT8718F_DEVID:
1921                 sio_data->type = it8718;
1922                 break;
1923         case IT8720F_DEVID:
1924                 sio_data->type = it8720;
1925                 break;
1926         case IT8721F_DEVID:
1927                 sio_data->type = it8721;
1928                 break;
1929         case IT8728F_DEVID:
1930                 sio_data->type = it8728;
1931                 break;
1932         case IT8732F_DEVID:
1933                 sio_data->type = it8732;
1934                 break;
1935         case IT8771E_DEVID:
1936                 sio_data->type = it8771;
1937                 break;
1938         case IT8772E_DEVID:
1939                 sio_data->type = it8772;
1940                 break;
1941         case IT8781F_DEVID:
1942                 sio_data->type = it8781;
1943                 break;
1944         case IT8782F_DEVID:
1945                 sio_data->type = it8782;
1946                 break;
1947         case IT8783E_DEVID:
1948                 sio_data->type = it8783;
1949                 break;
1950         case IT8786E_DEVID:
1951                 sio_data->type = it8786;
1952                 break;
1953         case IT8790E_DEVID:
1954                 sio_data->type = it8790;
1955                 break;
1956         case IT8603E_DEVID:
1957         case IT8623E_DEVID:
1958                 sio_data->type = it8603;
1959                 break;
1960         case IT8620E_DEVID:
1961                 sio_data->type = it8620;
1962                 break;
1963         case 0xffff:    /* No device at all */
1964                 goto exit;
1965         default:
1966                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
1967                 goto exit;
1968         }
1969
1970         superio_select(PME);
1971         if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
1972                 pr_info("Device not activated, skipping\n");
1973                 goto exit;
1974         }
1975
1976         *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1977         if (*address == 0) {
1978                 pr_info("Base address not set, skipping\n");
1979                 goto exit;
1980         }
1981
1982         err = 0;
1983         sio_data->revision = superio_inb(DEVREV) & 0x0f;
1984         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
1985                 it87_devices[sio_data->type].suffix,
1986                 *address, sio_data->revision);
1987
1988         config = &it87_devices[sio_data->type];
1989
1990         /* in7 (VSB or VCCH5V) is always internal on some chips */
1991         if (has_in7_internal(config))
1992                 sio_data->internal |= (1 << 1);
1993
1994         /* in8 (Vbat) is always internal */
1995         sio_data->internal |= (1 << 2);
1996
1997         /* in9 (AVCC3), always internal if supported */
1998         if (has_avcc3(config))
1999                 sio_data->internal |= (1 << 3); /* in9 is AVCC */
2000         else
2001                 sio_data->skip_in |= (1 << 9);
2002
2003         if (!has_six_pwm(config))
2004                 sio_data->skip_pwm |= (1 << 3) | (1 << 4) | (1 << 5);
2005
2006         if (!has_vid(config))
2007                 sio_data->skip_vid = 1;
2008
2009         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2010         if (sio_data->type == it87) {
2011                 /* The IT8705F has a different LD number for GPIO */
2012                 superio_select(5);
2013                 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2014         } else if (sio_data->type == it8783) {
2015                 int reg25, reg27, reg2a, reg2c, regef;
2016
2017                 superio_select(GPIO);
2018
2019                 reg25 = superio_inb(IT87_SIO_GPIO1_REG);
2020                 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
2021                 reg2a = superio_inb(IT87_SIO_PINX1_REG);
2022                 reg2c = superio_inb(IT87_SIO_PINX2_REG);
2023                 regef = superio_inb(IT87_SIO_SPI_REG);
2024
2025                 /* Check if fan3 is there or not */
2026                 if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2)))
2027                         sio_data->skip_fan |= (1 << 2);
2028                 if ((reg25 & (1 << 4))
2029                     || (!(reg2a & (1 << 1)) && (regef & (1 << 0))))
2030                         sio_data->skip_pwm |= (1 << 2);
2031
2032                 /* Check if fan2 is there or not */
2033                 if (reg27 & (1 << 7))
2034                         sio_data->skip_fan |= (1 << 1);
2035                 if (reg27 & (1 << 3))
2036                         sio_data->skip_pwm |= (1 << 1);
2037
2038                 /* VIN5 */
2039                 if ((reg27 & (1 << 0)) || (reg2c & (1 << 2)))
2040                         sio_data->skip_in |= (1 << 5); /* No VIN5 */
2041
2042                 /* VIN6 */
2043                 if (reg27 & (1 << 1))
2044                         sio_data->skip_in |= (1 << 6); /* No VIN6 */
2045
2046                 /*
2047                  * VIN7
2048                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2049                  */
2050                 if (reg27 & (1 << 2)) {
2051                         /*
2052                          * The data sheet is a bit unclear regarding the
2053                          * internal voltage divider for VCCH5V. It says
2054                          * "This bit enables and switches VIN7 (pin 91) to the
2055                          * internal voltage divider for VCCH5V".
2056                          * This is different to other chips, where the internal
2057                          * voltage divider would connect VIN7 to an internal
2058                          * voltage source. Maybe that is the case here as well.
2059                          *
2060                          * Since we don't know for sure, re-route it if that is
2061                          * not the case, and ask the user to report if the
2062                          * resulting voltage is sane.
2063                          */
2064                         if (!(reg2c & (1 << 1))) {
2065                                 reg2c |= (1 << 1);
2066                                 superio_outb(IT87_SIO_PINX2_REG, reg2c);
2067                                 pr_notice("Routing internal VCCH5V to in7.\n");
2068                         }
2069                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2070                         pr_notice("Please report if it displays a reasonable voltage.\n");
2071                 }
2072
2073                 if (reg2c & (1 << 0))
2074                         sio_data->internal |= (1 << 0);
2075                 if (reg2c & (1 << 1))
2076                         sio_data->internal |= (1 << 1);
2077
2078                 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2079         } else if (sio_data->type == it8603) {
2080                 int reg27, reg29;
2081
2082                 superio_select(GPIO);
2083
2084                 reg27 = superio_inb(IT87_SIO_GPIO3_REG);
2085
2086                 /* Check if fan3 is there or not */
2087                 if (reg27 & (1 << 6))
2088                         sio_data->skip_pwm |= (1 << 2);
2089                 if (reg27 & (1 << 7))
2090                         sio_data->skip_fan |= (1 << 2);
2091
2092                 /* Check if fan2 is there or not */
2093                 reg29 = superio_inb(IT87_SIO_GPIO5_REG);
2094                 if (reg29 & (1 << 1))
2095                         sio_data->skip_pwm |= (1 << 1);
2096                 if (reg29 & (1 << 2))
2097                         sio_data->skip_fan |= (1 << 1);
2098
2099                 sio_data->skip_in |= (1 << 5); /* No VIN5 */
2100                 sio_data->skip_in |= (1 << 6); /* No VIN6 */
2101
2102                 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2103         } else if (sio_data->type == it8620) {
2104                 int reg;
2105
2106                 superio_select(GPIO);
2107
2108                 /* Check for pwm5 */
2109                 reg = superio_inb(IT87_SIO_GPIO1_REG);
2110                 if (reg & (1 << 6))
2111                         sio_data->skip_pwm |= (1 << 4);
2112
2113                 /* Check for fan4, fan5 */
2114                 reg = superio_inb(IT87_SIO_GPIO2_REG);
2115                 if (!(reg & (1 << 5)))
2116                         sio_data->skip_fan |= (1 << 3);
2117                 if (!(reg & (1 << 4)))
2118                         sio_data->skip_fan |= (1 << 4);
2119
2120                 /* Check for pwm3, fan3 */
2121                 reg = superio_inb(IT87_SIO_GPIO3_REG);
2122                 if (reg & (1 << 6))
2123                         sio_data->skip_pwm |= (1 << 2);
2124                 if (reg & (1 << 7))
2125                         sio_data->skip_fan |= (1 << 2);
2126
2127                 /* Check for pwm4 */
2128                 reg = superio_inb(IT87_SIO_GPIO4_REG);
2129                 if (!(reg & (1 << 2)))
2130                         sio_data->skip_pwm |= (1 << 3);
2131
2132                 /* Check for pwm2, fan2 */
2133                 reg = superio_inb(IT87_SIO_GPIO5_REG);
2134                 if (reg & (1 << 1))
2135                         sio_data->skip_pwm |= (1 << 1);
2136                 if (reg & (1 << 2))
2137                         sio_data->skip_fan |= (1 << 1);
2138                 /* Check for pwm6, fan6 */
2139                 if (!(reg & (1 << 7))) {
2140                         sio_data->skip_pwm |= (1 << 5);
2141                         sio_data->skip_fan |= (1 << 5);
2142                 }
2143
2144                 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2145         } else {
2146                 int reg;
2147                 bool uart6;
2148
2149                 superio_select(GPIO);
2150
2151                 reg = superio_inb(IT87_SIO_GPIO3_REG);
2152                 if (!sio_data->skip_vid) {
2153                         /* We need at least 4 VID pins */
2154                         if (reg & 0x0f) {
2155                                 pr_info("VID is disabled (pins used for GPIO)\n");
2156                                 sio_data->skip_vid = 1;
2157                         }
2158                 }
2159
2160                 /* Check if fan3 is there or not */
2161                 if (reg & (1 << 6))
2162                         sio_data->skip_pwm |= (1 << 2);
2163                 if (reg & (1 << 7))
2164                         sio_data->skip_fan |= (1 << 2);
2165
2166                 /* Check if fan2 is there or not */
2167                 reg = superio_inb(IT87_SIO_GPIO5_REG);
2168                 if (reg & (1 << 1))
2169                         sio_data->skip_pwm |= (1 << 1);
2170                 if (reg & (1 << 2))
2171                         sio_data->skip_fan |= (1 << 1);
2172
2173                 if ((sio_data->type == it8718 || sio_data->type == it8720)
2174                  && !(sio_data->skip_vid))
2175                         sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
2176
2177                 reg = superio_inb(IT87_SIO_PINX2_REG);
2178
2179                 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
2180
2181                 /*
2182                  * The IT8720F has no VIN7 pin, so VCCH should always be
2183                  * routed internally to VIN7 with an internal divider.
2184                  * Curiously, there still is a configuration bit to control
2185                  * this, which means it can be set incorrectly. And even
2186                  * more curiously, many boards out there are improperly
2187                  * configured, even though the IT8720F datasheet claims
2188                  * that the internal routing of VCCH to VIN7 is the default
2189                  * setting. So we force the internal routing in this case.
2190                  *
2191                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2192                  * If UART6 is enabled, re-route VIN7 to the internal divider
2193                  * if that is not already the case.
2194                  */
2195                 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
2196                         reg |= (1 << 1);
2197                         superio_outb(IT87_SIO_PINX2_REG, reg);
2198                         pr_notice("Routing internal VCCH to in7\n");
2199                 }
2200                 if (reg & (1 << 0))
2201                         sio_data->internal |= (1 << 0);
2202                 if (reg & (1 << 1))
2203                         sio_data->internal |= (1 << 1);
2204
2205                 /*
2206                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2207                  * While VIN7 can be routed to the internal voltage divider,
2208                  * VIN5 and VIN6 are not available if UART6 is enabled.
2209                  *
2210                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2211                  * is the temperature source. Since we can not read the
2212                  * temperature source here, skip_temp is preliminary.
2213                  */
2214                 if (uart6) {
2215                         sio_data->skip_in |= (1 << 5) | (1 << 6);
2216                         sio_data->skip_temp |= (1 << 2);
2217                 }
2218
2219                 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2220         }
2221         if (sio_data->beep_pin)
2222                 pr_info("Beeping is supported\n");
2223
2224         /* Disable specific features based on DMI strings */
2225         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2226         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2227         if (board_vendor && board_name) {
2228                 if (strcmp(board_vendor, "nVIDIA") == 0
2229                  && strcmp(board_name, "FN68PT") == 0) {
2230                         /*
2231                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2232                          * connected to a fan, but to something else. One user
2233                          * has reported instant system power-off when changing
2234                          * the PWM2 duty cycle, so we disable it.
2235                          * I use the board name string as the trigger in case
2236                          * the same board is ever used in other systems.
2237                          */
2238                         pr_info("Disabling pwm2 due to hardware constraints\n");
2239                         sio_data->skip_pwm = (1 << 1);
2240                 }
2241         }
2242
2243 exit:
2244         superio_exit();
2245         return err;
2246 }
2247
2248 static void it87_remove_files(struct device *dev)
2249 {
2250         struct it87_data *data = platform_get_drvdata(pdev);
2251         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2252         int i;
2253
2254         sysfs_remove_group(&dev->kobj, &it87_group);
2255         for (i = 0; i < 10; i++) {
2256                 if (sio_data->skip_in & (1 << i))
2257                         continue;
2258                 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
2259                 if (it87_attributes_in_beep[i])
2260                         sysfs_remove_file(&dev->kobj,
2261                                           it87_attributes_in_beep[i]);
2262         }
2263         for (i = 0; i < 3; i++) {
2264                 if (!(data->has_temp & (1 << i)))
2265                         continue;
2266                 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
2267                 if (has_temp_offset(data))
2268                         sysfs_remove_file(&dev->kobj,
2269                                           it87_attributes_temp_offset[i]);
2270                 if (sio_data->beep_pin)
2271                         sysfs_remove_file(&dev->kobj,
2272                                           it87_attributes_temp_beep[i]);
2273         }
2274         for (i = 0; i < 6; i++) {
2275                 if (!(data->has_fan & (1 << i)))
2276                         continue;
2277                 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
2278                 if (sio_data->beep_pin)
2279                         sysfs_remove_file(&dev->kobj,
2280                                           it87_attributes_fan_beep[i]);
2281                 if (i < 3 && !has_16bit_fans(data))
2282                         sysfs_remove_file(&dev->kobj,
2283                                           it87_attributes_fan_div[i]);
2284         }
2285         for (i = 0; i < 6; i++) {
2286                 if (sio_data->skip_pwm & (1 << i))
2287                         continue;
2288                 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
2289                 if (has_old_autopwm(data))
2290                         sysfs_remove_group(&dev->kobj,
2291                                            &it87_group_autopwm[i]);
2292         }
2293         if (!sio_data->skip_vid)
2294                 sysfs_remove_group(&dev->kobj, &it87_group_vid);
2295         sysfs_remove_group(&dev->kobj, &it87_group_label);
2296 }
2297
2298 static int it87_probe(struct platform_device *pdev)
2299 {
2300         struct it87_data *data;
2301         struct resource *res;
2302         struct device *dev = &pdev->dev;
2303         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2304         int err = 0, i;
2305         int enable_pwm_interface;
2306         int fan_beep_need_rw;
2307
2308         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2309         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2310                                  DRVNAME)) {
2311                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2312                         (unsigned long)res->start,
2313                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
2314                 return -EBUSY;
2315         }
2316
2317         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2318         if (!data)
2319                 return -ENOMEM;
2320
2321         data->addr = res->start;
2322         data->type = sio_data->type;
2323         data->features = it87_devices[sio_data->type].features;
2324         data->peci_mask = it87_devices[sio_data->type].peci_mask;
2325         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
2326         data->name = it87_devices[sio_data->type].name;
2327         /*
2328          * IT8705F Datasheet 0.4.1, 3h == Version G.
2329          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2330          * These are the first revisions with 16-bit tachometer support.
2331          */
2332         switch (data->type) {
2333         case it87:
2334                 if (sio_data->revision >= 0x03) {
2335                         data->features &= ~FEAT_OLD_AUTOPWM;
2336                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
2337                 }
2338                 break;
2339         case it8712:
2340                 if (sio_data->revision >= 0x08) {
2341                         data->features &= ~FEAT_OLD_AUTOPWM;
2342                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
2343                                           FEAT_FIVE_FANS;
2344                 }
2345                 break;
2346         default:
2347                 break;
2348         }
2349
2350         /* Now, we do the remaining detection. */
2351         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
2352          || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2353                 return -ENODEV;
2354
2355         platform_set_drvdata(pdev, data);
2356
2357         mutex_init(&data->update_lock);
2358
2359         /* Check PWM configuration */
2360         enable_pwm_interface = it87_check_pwm(dev);
2361
2362         /* Starting with IT8721F, we handle scaling of internal voltages */
2363         if (has_12mv_adc(data)) {
2364                 if (sio_data->internal & (1 << 0))
2365                         data->in_scaled |= (1 << 3);    /* in3 is AVCC */
2366                 if (sio_data->internal & (1 << 1))
2367                         data->in_scaled |= (1 << 7);    /* in7 is VSB */
2368                 if (sio_data->internal & (1 << 2))
2369                         data->in_scaled |= (1 << 8);    /* in8 is Vbat */
2370                 if (sio_data->internal & (1 << 3))
2371                         data->in_scaled |= (1 << 9);    /* in9 is AVCC */
2372         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
2373                    sio_data->type == it8783) {
2374                 if (sio_data->internal & (1 << 0))
2375                         data->in_scaled |= (1 << 3);    /* in3 is VCC5V */
2376                 if (sio_data->internal & (1 << 1))
2377                         data->in_scaled |= (1 << 7);    /* in7 is VCCH5V */
2378         }
2379
2380         data->has_temp = 0x07;
2381         if (sio_data->skip_temp & (1 << 2)) {
2382                 if (sio_data->type == it8782
2383                     && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2384                         data->has_temp &= ~(1 << 2);
2385         }
2386
2387         /* Initialize the IT87 chip */
2388         it87_init_device(pdev);
2389
2390         /* Register sysfs hooks */
2391         err = sysfs_create_group(&dev->kobj, &it87_group);
2392         if (err)
2393                 return err;
2394
2395         for (i = 0; i < 10; i++) {
2396                 if (sio_data->skip_in & (1 << i))
2397                         continue;
2398                 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2399                 if (err)
2400                         goto error;
2401                 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2402                         err = sysfs_create_file(&dev->kobj,
2403                                                 it87_attributes_in_beep[i]);
2404                         if (err)
2405                                 goto error;
2406                 }
2407         }
2408
2409         for (i = 0; i < 3; i++) {
2410                 if (!(data->has_temp & (1 << i)))
2411                         continue;
2412                 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
2413                 if (err)
2414                         goto error;
2415                 if (has_temp_offset(data)) {
2416                         err = sysfs_create_file(&dev->kobj,
2417                                                 it87_attributes_temp_offset[i]);
2418                         if (err)
2419                                 goto error;
2420                 }
2421                 if (sio_data->beep_pin) {
2422                         err = sysfs_create_file(&dev->kobj,
2423                                                 it87_attributes_temp_beep[i]);
2424                         if (err)
2425                                 goto error;
2426                 }
2427         }
2428
2429         /* Do not create fan files for disabled fans */
2430         fan_beep_need_rw = 1;
2431         for (i = 0; i < 6; i++) {
2432                 if (!(data->has_fan & (1 << i)))
2433                         continue;
2434                 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
2435                 if (err)
2436                         goto error;
2437
2438                 if (i < 3 && !has_16bit_fans(data)) {
2439                         err = sysfs_create_file(&dev->kobj,
2440                                                 it87_attributes_fan_div[i]);
2441                         if (err)
2442                                 goto error;
2443                 }
2444
2445                 if (sio_data->beep_pin) {
2446                         err = sysfs_create_file(&dev->kobj,
2447                                                 it87_attributes_fan_beep[i]);
2448                         if (err)
2449                                 goto error;
2450                         if (!fan_beep_need_rw)
2451                                 continue;
2452
2453                         /*
2454                          * As we have a single beep enable bit for all fans,
2455                          * only the first enabled fan has a writable attribute
2456                          * for it.
2457                          */
2458                         if (sysfs_chmod_file(&dev->kobj,
2459                                              it87_attributes_fan_beep[i],
2460                                              S_IRUGO | S_IWUSR))
2461                                 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2462                                         i + 1);
2463                         fan_beep_need_rw = 0;
2464                 }
2465         }
2466
2467         if (enable_pwm_interface) {
2468                 for (i = 0; i < 6; i++) {
2469                         if (sio_data->skip_pwm & (1 << i))
2470                                 continue;
2471                         err = sysfs_create_group(&dev->kobj,
2472                                                  &it87_group_pwm[i]);
2473                         if (err)
2474                                 goto error;
2475
2476                         if (!has_old_autopwm(data))
2477                                 continue;
2478                         err = sysfs_create_group(&dev->kobj,
2479                                                  &it87_group_autopwm[i]);
2480                         if (err)
2481                                 goto error;
2482                 }
2483         }
2484
2485         if (!sio_data->skip_vid) {
2486                 data->vrm = vid_which_vrm();
2487                 /* VID reading from Super-I/O config space if available */
2488                 data->vid = sio_data->vid_value;
2489                 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2490                 if (err)
2491                         goto error;
2492         }
2493
2494         /* Export labels for internal sensors */
2495         for (i = 0; i < 4; i++) {
2496                 if (!(sio_data->internal & (1 << i)))
2497                         continue;
2498                 err = sysfs_create_file(&dev->kobj,
2499                                         it87_attributes_label[i]);
2500                 if (err)
2501                         goto error;
2502         }
2503
2504         data->hwmon_dev = hwmon_device_register(dev);
2505         if (IS_ERR(data->hwmon_dev)) {
2506                 err = PTR_ERR(data->hwmon_dev);
2507                 goto error;
2508         }
2509
2510         return 0;
2511
2512 error:
2513         it87_remove_files(dev);
2514         return err;
2515 }
2516
2517 static int it87_remove(struct platform_device *pdev)
2518 {
2519         struct it87_data *data = platform_get_drvdata(pdev);
2520
2521         hwmon_device_unregister(data->hwmon_dev);
2522         it87_remove_files(&pdev->dev);
2523
2524         return 0;
2525 }
2526
2527 /*
2528  * Must be called with data->update_lock held, except during initialization.
2529  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2530  * would slow down the IT87 access and should not be necessary.
2531  */
2532 static int it87_read_value(struct it87_data *data, u8 reg)
2533 {
2534         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2535         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
2536 }
2537
2538 /*
2539  * Must be called with data->update_lock held, except during initialization.
2540  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2541  * would slow down the IT87 access and should not be necessary.
2542  */
2543 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
2544 {
2545         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2546         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
2547 }
2548
2549 /* Return 1 if and only if the PWM interface is safe to use */
2550 static int it87_check_pwm(struct device *dev)
2551 {
2552         struct it87_data *data = dev_get_drvdata(dev);
2553         /*
2554          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2555          * and polarity set to active low is sign that this is the case so we
2556          * disable pwm control to protect the user.
2557          */
2558         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2559         if ((tmp & 0x87) == 0) {
2560                 if (fix_pwm_polarity) {
2561                         /*
2562                          * The user asks us to attempt a chip reconfiguration.
2563                          * This means switching to active high polarity and
2564                          * inverting all fan speed values.
2565                          */
2566                         int i;
2567                         u8 pwm[3];
2568
2569                         for (i = 0; i < 3; i++)
2570                                 pwm[i] = it87_read_value(data,
2571                                                          IT87_REG_PWM[i]);
2572
2573                         /*
2574                          * If any fan is in automatic pwm mode, the polarity
2575                          * might be correct, as suspicious as it seems, so we
2576                          * better don't change anything (but still disable the
2577                          * PWM interface).
2578                          */
2579                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2580                                 dev_info(dev,
2581                                          "Reconfiguring PWM to active high polarity\n");
2582                                 it87_write_value(data, IT87_REG_FAN_CTL,
2583                                                  tmp | 0x87);
2584                                 for (i = 0; i < 3; i++)
2585                                         it87_write_value(data,
2586                                                          IT87_REG_PWM[i],
2587                                                          0x7f & ~pwm[i]);
2588                                 return 1;
2589                         }
2590
2591                         dev_info(dev,
2592                                  "PWM configuration is too broken to be fixed\n");
2593                 }
2594
2595                 dev_info(dev,
2596                          "Detected broken BIOS defaults, disabling PWM interface\n");
2597                 return 0;
2598         } else if (fix_pwm_polarity) {
2599                 dev_info(dev,
2600                          "PWM configuration looks sane, won't touch\n");
2601         }
2602
2603         return 1;
2604 }
2605
2606 /* Called when we have found a new IT87. */
2607 static void it87_init_device(struct platform_device *pdev)
2608 {
2609         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2610         struct it87_data *data = platform_get_drvdata(pdev);
2611         int tmp, i;
2612         u8 mask;
2613
2614         /*
2615          * For each PWM channel:
2616          * - If it is in automatic mode, setting to manual mode should set
2617          *   the fan to full speed by default.
2618          * - If it is in manual mode, we need a mapping to temperature
2619          *   channels to use when later setting to automatic mode later.
2620          *   Use a 1:1 mapping by default (we are clueless.)
2621          * In both cases, the value can (and should) be changed by the user
2622          * prior to switching to a different mode.
2623          * Note that this is no longer needed for the IT8721F and later, as
2624          * these have separate registers for the temperature mapping and the
2625          * manual duty cycle.
2626          */
2627         for (i = 0; i < 3; i++) {
2628                 data->pwm_temp_map[i] = i;
2629                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2630                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2631         }
2632
2633         /*
2634          * Some chips seem to have default value 0xff for all limit
2635          * registers. For low voltage limits it makes no sense and triggers
2636          * alarms, so change to 0 instead. For high temperature limits, it
2637          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2638          * but is still confusing, so change to 127 degrees C.
2639          */
2640         for (i = 0; i < 8; i++) {
2641                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2642                 if (tmp == 0xff)
2643                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2644         }
2645         for (i = 0; i < 3; i++) {
2646                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2647                 if (tmp == 0xff)
2648                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2649         }
2650
2651         /*
2652          * Temperature channels are not forcibly enabled, as they can be
2653          * set to two different sensor types and we can't guess which one
2654          * is correct for a given system. These channels can be enabled at
2655          * run-time through the temp{1-3}_type sysfs accessors if needed.
2656          */
2657
2658         /* Check if voltage monitors are reset manually or by some reason */
2659         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2660         if ((tmp & 0xff) == 0) {
2661                 /* Enable all voltage monitors */
2662                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2663         }
2664
2665         /* Check if tachometers are reset manually or by some reason */
2666         mask = 0x70 & ~(sio_data->skip_fan << 4);
2667         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2668         if ((data->fan_main_ctrl & mask) == 0) {
2669                 /* Enable all fan tachometers */
2670                 data->fan_main_ctrl |= mask;
2671                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2672                                  data->fan_main_ctrl);
2673         }
2674         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2675
2676         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2677
2678         /* Set tachometers to 16-bit mode if needed */
2679         if (has_fan16_config(data)) {
2680                 if (~tmp & 0x07 & data->has_fan) {
2681                         dev_dbg(&pdev->dev,
2682                                 "Setting fan1-3 to 16-bit mode\n");
2683                         it87_write_value(data, IT87_REG_FAN_16BIT,
2684                                          tmp | 0x07);
2685                 }
2686         }
2687
2688         /* Check for additional fans */
2689         if (has_five_fans(data)) {
2690                 if (tmp & (1 << 4))
2691                         data->has_fan |= (1 << 3); /* fan4 enabled */
2692                 if (tmp & (1 << 5))
2693                         data->has_fan |= (1 << 4); /* fan5 enabled */
2694                 if (has_six_fans(data) && (tmp & (1 << 2)))
2695                         data->has_fan |= (1 << 5); /* fan6 enabled */
2696         }
2697
2698         /* Fan input pins may be used for alternative functions */
2699         data->has_fan &= ~sio_data->skip_fan;
2700
2701         /* Check if pwm5, pwm6 are enabled */
2702         if (has_six_pwm(data)) {
2703                 /* The following code may be IT8620E specific */
2704                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2705                 if ((tmp & 0xc0) == 0xc0)
2706                         sio_data->skip_pwm |= (1 << 4);
2707                 if (!(tmp & (1 << 3)))
2708                         sio_data->skip_pwm |= (1 << 5);
2709         }
2710
2711         /* Start monitoring */
2712         it87_write_value(data, IT87_REG_CONFIG,
2713                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2714                          | (update_vbat ? 0x41 : 0x01));
2715 }
2716
2717 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2718 {
2719         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
2720         if (has_newer_autopwm(data)) {
2721                 data->pwm_temp_map[nr] = (data->pwm_ctrl[nr] & 0x03) +
2722                         nr < 3 ? 0 : 3;
2723                 data->pwm_duty[nr] = it87_read_value(data,
2724                                                      IT87_REG_PWM_DUTY[nr]);
2725         } else {
2726                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
2727                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2728                 else                            /* Manual mode */
2729                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2730         }
2731
2732         if (has_old_autopwm(data)) {
2733                 int i;
2734
2735                 for (i = 0; i < 5 ; i++)
2736                         data->auto_temp[nr][i] = it87_read_value(data,
2737                                                 IT87_REG_AUTO_TEMP(nr, i));
2738                 for (i = 0; i < 3 ; i++)
2739                         data->auto_pwm[nr][i] = it87_read_value(data,
2740                                                 IT87_REG_AUTO_PWM(nr, i));
2741         }
2742 }
2743
2744 static struct it87_data *it87_update_device(struct device *dev)
2745 {
2746         struct it87_data *data = dev_get_drvdata(dev);
2747         int i;
2748
2749         mutex_lock(&data->update_lock);
2750
2751         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2752             || !data->valid) {
2753                 if (update_vbat) {
2754                         /*
2755                          * Cleared after each update, so reenable.  Value
2756                          * returned by this read will be previous value
2757                          */
2758                         it87_write_value(data, IT87_REG_CONFIG,
2759                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
2760                 }
2761                 for (i = 0; i <= 7; i++) {
2762                         data->in[i][0] =
2763                                 it87_read_value(data, IT87_REG_VIN(i));
2764                         data->in[i][1] =
2765                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
2766                         data->in[i][2] =
2767                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
2768                 }
2769                 /* in8 (battery) has no limit registers */
2770                 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
2771                 if (has_avcc3(data))
2772                         data->in[9][0] = it87_read_value(data, IT87_REG_AVCC3);
2773
2774                 for (i = 0; i < 6; i++) {
2775                         /* Skip disabled fans */
2776                         if (!(data->has_fan & (1 << i)))
2777                                 continue;
2778
2779                         data->fan[i][1] =
2780                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
2781                         data->fan[i][0] = it87_read_value(data,
2782                                        IT87_REG_FAN[i]);
2783                         /* Add high byte if in 16-bit mode */
2784                         if (has_16bit_fans(data)) {
2785                                 data->fan[i][0] |= it87_read_value(data,
2786                                                 IT87_REG_FANX[i]) << 8;
2787                                 data->fan[i][1] |= it87_read_value(data,
2788                                                 IT87_REG_FANX_MIN[i]) << 8;
2789                         }
2790                 }
2791                 for (i = 0; i < 3; i++) {
2792                         if (!(data->has_temp & (1 << i)))
2793                                 continue;
2794                         data->temp[i][0] =
2795                                 it87_read_value(data, IT87_REG_TEMP(i));
2796                         data->temp[i][1] =
2797                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
2798                         data->temp[i][2] =
2799                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2800                         if (has_temp_offset(data))
2801                                 data->temp[i][3] =
2802                                   it87_read_value(data,
2803                                                   IT87_REG_TEMP_OFFSET[i]);
2804                 }
2805
2806                 /* Newer chips don't have clock dividers */
2807                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
2808                         i = it87_read_value(data, IT87_REG_FAN_DIV);
2809                         data->fan_div[0] = i & 0x07;
2810                         data->fan_div[1] = (i >> 3) & 0x07;
2811                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
2812                 }
2813
2814                 data->alarms =
2815                         it87_read_value(data, IT87_REG_ALARM1) |
2816                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2817                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
2818                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2819
2820                 data->fan_main_ctrl = it87_read_value(data,
2821                                 IT87_REG_FAN_MAIN_CTRL);
2822                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
2823                 for (i = 0; i < 6; i++)
2824                         it87_update_pwm_ctrl(data, i);
2825
2826                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
2827                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
2828                 /*
2829                  * The IT8705F does not have VID capability.
2830                  * The IT8718F and later don't use IT87_REG_VID for the
2831                  * same purpose.
2832                  */
2833                 if (data->type == it8712 || data->type == it8716) {
2834                         data->vid = it87_read_value(data, IT87_REG_VID);
2835                         /*
2836                          * The older IT8712F revisions had only 5 VID pins,
2837                          * but we assume it is always safe to read 6 bits.
2838                          */
2839                         data->vid &= 0x3f;
2840                 }
2841                 data->last_updated = jiffies;
2842                 data->valid = 1;
2843         }
2844
2845         mutex_unlock(&data->update_lock);
2846
2847         return data;
2848 }
2849
2850 static int __init it87_device_add(unsigned short address,
2851                                   const struct it87_sio_data *sio_data)
2852 {
2853         struct resource res = {
2854                 .start  = address + IT87_EC_OFFSET,
2855                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
2856                 .name   = DRVNAME,
2857                 .flags  = IORESOURCE_IO,
2858         };
2859         int err;
2860
2861         err = acpi_check_resource_conflict(&res);
2862         if (err)
2863                 goto exit;
2864
2865         pdev = platform_device_alloc(DRVNAME, address);
2866         if (!pdev) {
2867                 err = -ENOMEM;
2868                 pr_err("Device allocation failed\n");
2869                 goto exit;
2870         }
2871
2872         err = platform_device_add_resources(pdev, &res, 1);
2873         if (err) {
2874                 pr_err("Device resource addition failed (%d)\n", err);
2875                 goto exit_device_put;
2876         }
2877
2878         err = platform_device_add_data(pdev, sio_data,
2879                                        sizeof(struct it87_sio_data));
2880         if (err) {
2881                 pr_err("Platform data allocation failed\n");
2882                 goto exit_device_put;
2883         }
2884
2885         err = platform_device_add(pdev);
2886         if (err) {
2887                 pr_err("Device addition failed (%d)\n", err);
2888                 goto exit_device_put;
2889         }
2890
2891         return 0;
2892
2893 exit_device_put:
2894         platform_device_put(pdev);
2895 exit:
2896         return err;
2897 }
2898
2899 static int __init sm_it87_init(void)
2900 {
2901         int err;
2902         unsigned short isa_address = 0;
2903         struct it87_sio_data sio_data;
2904
2905         memset(&sio_data, 0, sizeof(struct it87_sio_data));
2906         err = it87_find(&isa_address, &sio_data);
2907         if (err)
2908                 return err;
2909         err = platform_driver_register(&it87_driver);
2910         if (err)
2911                 return err;
2912
2913         err = it87_device_add(isa_address, &sio_data);
2914         if (err) {
2915                 platform_driver_unregister(&it87_driver);
2916                 return err;
2917         }
2918
2919         return 0;
2920 }
2921
2922 static void __exit sm_it87_exit(void)
2923 {
2924         platform_device_unregister(pdev);
2925         platform_driver_unregister(&it87_driver);
2926 }
2927
2928
2929 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
2930 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
2931 module_param(update_vbat, bool, 0);
2932 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2933 module_param(fix_pwm_polarity, bool, 0);
2934 MODULE_PARM_DESC(fix_pwm_polarity,
2935                  "Force PWM polarity to active high (DANGEROUS)");
2936 MODULE_LICENSE("GPL");
2937
2938 module_init(sm_it87_init);
2939 module_exit(sm_it87_exit);