coresight: tmc: splitting driver in ETB/ETF and ETR components
[cascardo/linux.git] / drivers / hwtracing / coresight / coresight-tmc.c
1 /* Copyright (c) 2012, The Linux Foundation. All rights reserved.
2  *
3  * Description: CoreSight Trace Memory Controller driver
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 and
7  * only version 2 as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/types.h>
18 #include <linux/device.h>
19 #include <linux/io.h>
20 #include <linux/err.h>
21 #include <linux/fs.h>
22 #include <linux/miscdevice.h>
23 #include <linux/uaccess.h>
24 #include <linux/slab.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/spinlock.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/of.h>
29 #include <linux/coresight.h>
30 #include <linux/amba/bus.h>
31
32 #include "coresight-priv.h"
33 #include "coresight-tmc.h"
34
35 void tmc_wait_for_tmcready(struct tmc_drvdata *drvdata)
36 {
37         /* Ensure formatter, unformatter and hardware fifo are empty */
38         if (coresight_timeout(drvdata->base,
39                               TMC_STS, TMC_STS_TMCREADY_BIT, 1)) {
40                 dev_err(drvdata->dev,
41                         "timeout observed when probing at offset %#x\n",
42                         TMC_STS);
43         }
44 }
45
46 void tmc_flush_and_stop(struct tmc_drvdata *drvdata)
47 {
48         u32 ffcr;
49
50         ffcr = readl_relaxed(drvdata->base + TMC_FFCR);
51         ffcr |= TMC_FFCR_STOP_ON_FLUSH;
52         writel_relaxed(ffcr, drvdata->base + TMC_FFCR);
53         ffcr |= BIT(TMC_FFCR_FLUSHMAN_BIT);
54         writel_relaxed(ffcr, drvdata->base + TMC_FFCR);
55         /* Ensure flush completes */
56         if (coresight_timeout(drvdata->base,
57                               TMC_FFCR, TMC_FFCR_FLUSHMAN_BIT, 0)) {
58                 dev_err(drvdata->dev,
59                         "timeout observed when probing at offset %#x\n",
60                         TMC_FFCR);
61         }
62
63         tmc_wait_for_tmcready(drvdata);
64 }
65
66 void tmc_enable_hw(struct tmc_drvdata *drvdata)
67 {
68         writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL);
69 }
70
71 void tmc_disable_hw(struct tmc_drvdata *drvdata)
72 {
73         writel_relaxed(0x0, drvdata->base + TMC_CTL);
74 }
75
76 static int tmc_read_prepare(struct tmc_drvdata *drvdata)
77 {
78         int ret = 0;
79         unsigned long flags;
80         enum tmc_mode mode;
81
82         spin_lock_irqsave(&drvdata->spinlock, flags);
83         if (!drvdata->enable)
84                 goto out;
85
86         switch (drvdata->config_type) {
87         case TMC_CONFIG_TYPE_ETB:
88                 tmc_etb_disable_hw(drvdata);
89                 break;
90         case TMC_CONFIG_TYPE_ETF:
91                 /* There is no point in reading a TMC in HW FIFO mode */
92                 mode = readl_relaxed(drvdata->base + TMC_MODE);
93                 if (mode != TMC_MODE_CIRCULAR_BUFFER) {
94                         ret = -EINVAL;
95                         goto err;
96                 }
97
98                 tmc_etb_disable_hw(drvdata);
99                 break;
100         case TMC_CONFIG_TYPE_ETR:
101                 tmc_etr_disable_hw(drvdata);
102                 break;
103         default:
104                 ret = -EINVAL;
105                 goto err;
106         }
107
108 out:
109         drvdata->reading = true;
110         dev_info(drvdata->dev, "TMC read start\n");
111 err:
112         spin_unlock_irqrestore(&drvdata->spinlock, flags);
113         return ret;
114 }
115
116 static void tmc_read_unprepare(struct tmc_drvdata *drvdata)
117 {
118         unsigned long flags;
119         enum tmc_mode mode;
120
121         spin_lock_irqsave(&drvdata->spinlock, flags);
122         if (!drvdata->enable)
123                 goto out;
124
125         switch (drvdata->config_type) {
126         case TMC_CONFIG_TYPE_ETB:
127                 tmc_etb_enable_hw(drvdata);
128                 break;
129         case TMC_CONFIG_TYPE_ETF:
130                 /* Make sure we don't re-enable a TMC in HW FIFO mode */
131                 mode = readl_relaxed(drvdata->base + TMC_MODE);
132                 if (mode != TMC_MODE_CIRCULAR_BUFFER)
133                         goto err;
134
135                 tmc_etb_enable_hw(drvdata);
136                 break;
137         case TMC_CONFIG_TYPE_ETR:
138                 tmc_etr_disable_hw(drvdata);
139                 break;
140         default:
141                 goto err;
142         }
143
144 out:
145         drvdata->reading = false;
146         dev_info(drvdata->dev, "TMC read end\n");
147 err:
148         spin_unlock_irqrestore(&drvdata->spinlock, flags);
149 }
150
151 static int tmc_open(struct inode *inode, struct file *file)
152 {
153         struct tmc_drvdata *drvdata = container_of(file->private_data,
154                                                    struct tmc_drvdata, miscdev);
155         int ret = 0;
156
157         if (drvdata->read_count++)
158                 goto out;
159
160         ret = tmc_read_prepare(drvdata);
161         if (ret)
162                 return ret;
163 out:
164         nonseekable_open(inode, file);
165
166         dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__);
167         return 0;
168 }
169
170 static ssize_t tmc_read(struct file *file, char __user *data, size_t len,
171                         loff_t *ppos)
172 {
173         struct tmc_drvdata *drvdata = container_of(file->private_data,
174                                                    struct tmc_drvdata, miscdev);
175         char *bufp = drvdata->buf + *ppos;
176
177         if (*ppos + len > drvdata->size)
178                 len = drvdata->size - *ppos;
179
180         if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
181                 if (bufp == (char *)(drvdata->vaddr + drvdata->size))
182                         bufp = drvdata->vaddr;
183                 else if (bufp > (char *)(drvdata->vaddr + drvdata->size))
184                         bufp -= drvdata->size;
185                 if ((bufp + len) > (char *)(drvdata->vaddr + drvdata->size))
186                         len = (char *)(drvdata->vaddr + drvdata->size) - bufp;
187         }
188
189         if (copy_to_user(data, bufp, len)) {
190                 dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__);
191                 return -EFAULT;
192         }
193
194         *ppos += len;
195
196         dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
197                 __func__, len, (int)(drvdata->size - *ppos));
198         return len;
199 }
200
201 static int tmc_release(struct inode *inode, struct file *file)
202 {
203         struct tmc_drvdata *drvdata = container_of(file->private_data,
204                                                    struct tmc_drvdata, miscdev);
205
206         if (--drvdata->read_count) {
207                 if (drvdata->read_count < 0) {
208                         dev_err(drvdata->dev, "mismatched close\n");
209                         drvdata->read_count = 0;
210                 }
211                 goto out;
212         }
213
214         tmc_read_unprepare(drvdata);
215 out:
216         dev_dbg(drvdata->dev, "%s: released\n", __func__);
217         return 0;
218 }
219
220 static const struct file_operations tmc_fops = {
221         .owner          = THIS_MODULE,
222         .open           = tmc_open,
223         .read           = tmc_read,
224         .release        = tmc_release,
225         .llseek         = no_llseek,
226 };
227
228 #define coresight_tmc_simple_func(name, offset)                 \
229         coresight_simple_func(struct tmc_drvdata, name, offset)
230
231 coresight_tmc_simple_func(rsz, TMC_RSZ);
232 coresight_tmc_simple_func(sts, TMC_STS);
233 coresight_tmc_simple_func(rrp, TMC_RRP);
234 coresight_tmc_simple_func(rwp, TMC_RWP);
235 coresight_tmc_simple_func(trg, TMC_TRG);
236 coresight_tmc_simple_func(ctl, TMC_CTL);
237 coresight_tmc_simple_func(ffsr, TMC_FFSR);
238 coresight_tmc_simple_func(ffcr, TMC_FFCR);
239 coresight_tmc_simple_func(mode, TMC_MODE);
240 coresight_tmc_simple_func(pscr, TMC_PSCR);
241 coresight_tmc_simple_func(devid, CORESIGHT_DEVID);
242
243 static struct attribute *coresight_tmc_mgmt_attrs[] = {
244         &dev_attr_rsz.attr,
245         &dev_attr_sts.attr,
246         &dev_attr_rrp.attr,
247         &dev_attr_rwp.attr,
248         &dev_attr_trg.attr,
249         &dev_attr_ctl.attr,
250         &dev_attr_ffsr.attr,
251         &dev_attr_ffcr.attr,
252         &dev_attr_mode.attr,
253         &dev_attr_pscr.attr,
254         &dev_attr_devid.attr,
255         NULL,
256 };
257
258 ssize_t trigger_cntr_show(struct device *dev,
259                           struct device_attribute *attr, char *buf)
260 {
261         struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
262         unsigned long val = drvdata->trigger_cntr;
263
264         return sprintf(buf, "%#lx\n", val);
265 }
266
267 static ssize_t trigger_cntr_store(struct device *dev,
268                              struct device_attribute *attr,
269                              const char *buf, size_t size)
270 {
271         int ret;
272         unsigned long val;
273         struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
274
275         ret = kstrtoul(buf, 16, &val);
276         if (ret)
277                 return ret;
278
279         drvdata->trigger_cntr = val;
280         return size;
281 }
282 static DEVICE_ATTR_RW(trigger_cntr);
283
284 static struct attribute *coresight_tmc_attrs[] = {
285         &dev_attr_trigger_cntr.attr,
286         NULL,
287 };
288
289 static const struct attribute_group coresight_tmc_group = {
290         .attrs = coresight_tmc_attrs,
291 };
292
293 static const struct attribute_group coresight_tmc_mgmt_group = {
294         .attrs = coresight_tmc_mgmt_attrs,
295         .name = "mgmt",
296 };
297
298 const struct attribute_group *coresight_tmc_groups[] = {
299         &coresight_tmc_group,
300         &coresight_tmc_mgmt_group,
301         NULL,
302 };
303
304 static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
305 {
306         int ret = 0;
307         u32 devid;
308         void __iomem *base;
309         struct device *dev = &adev->dev;
310         struct coresight_platform_data *pdata = NULL;
311         struct tmc_drvdata *drvdata;
312         struct resource *res = &adev->res;
313         struct coresight_desc *desc;
314         struct device_node *np = adev->dev.of_node;
315
316         if (np) {
317                 pdata = of_get_coresight_platform_data(dev, np);
318                 if (IS_ERR(pdata))
319                         return PTR_ERR(pdata);
320                 adev->dev.platform_data = pdata;
321         }
322
323         drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
324         if (!drvdata)
325                 return -ENOMEM;
326
327         drvdata->dev = &adev->dev;
328         dev_set_drvdata(dev, drvdata);
329
330         /* Validity for the resource is already checked by the AMBA core */
331         base = devm_ioremap_resource(dev, res);
332         if (IS_ERR(base))
333                 return PTR_ERR(base);
334
335         drvdata->base = base;
336
337         spin_lock_init(&drvdata->spinlock);
338
339         devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
340         drvdata->config_type = BMVAL(devid, 6, 7);
341
342         if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
343                 if (np)
344                         ret = of_property_read_u32(np,
345                                                    "arm,buffer-size",
346                                                    &drvdata->size);
347                 if (ret)
348                         drvdata->size = SZ_1M;
349         } else {
350                 drvdata->size = readl_relaxed(drvdata->base + TMC_RSZ) * 4;
351         }
352
353         pm_runtime_put(&adev->dev);
354
355         if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
356                 drvdata->vaddr = dma_alloc_coherent(dev, drvdata->size,
357                                                 &drvdata->paddr, GFP_KERNEL);
358                 if (!drvdata->vaddr)
359                         return -ENOMEM;
360
361                 memset(drvdata->vaddr, 0, drvdata->size);
362                 drvdata->buf = drvdata->vaddr;
363         } else {
364                 drvdata->buf = devm_kzalloc(dev, drvdata->size, GFP_KERNEL);
365                 if (!drvdata->buf)
366                         return -ENOMEM;
367         }
368
369         desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
370         if (!desc) {
371                 ret = -ENOMEM;
372                 goto err_devm_kzalloc;
373         }
374
375         desc->pdata = pdata;
376         desc->dev = dev;
377         desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
378         desc->groups = coresight_tmc_groups;
379
380         if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
381                 desc->type = CORESIGHT_DEV_TYPE_SINK;
382                 desc->ops = &tmc_etb_cs_ops;
383         } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
384                 desc->type = CORESIGHT_DEV_TYPE_SINK;
385                 desc->ops = &tmc_etr_cs_ops;
386         } else {
387                 desc->type = CORESIGHT_DEV_TYPE_LINKSINK;
388                 desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO;
389                 desc->ops = &tmc_etf_cs_ops;
390         }
391
392         drvdata->csdev = coresight_register(desc);
393         if (IS_ERR(drvdata->csdev)) {
394                 ret = PTR_ERR(drvdata->csdev);
395                 goto err_devm_kzalloc;
396         }
397
398         drvdata->miscdev.name = pdata->name;
399         drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
400         drvdata->miscdev.fops = &tmc_fops;
401         ret = misc_register(&drvdata->miscdev);
402         if (ret)
403                 goto err_misc_register;
404
405         return 0;
406
407 err_misc_register:
408         coresight_unregister(drvdata->csdev);
409 err_devm_kzalloc:
410         if (drvdata->config_type == TMC_CONFIG_TYPE_ETR)
411                 dma_free_coherent(dev, drvdata->size,
412                                 drvdata->vaddr, drvdata->paddr);
413         return ret;
414 }
415
416 static struct amba_id tmc_ids[] = {
417         {
418                 .id     = 0x0003b961,
419                 .mask   = 0x0003ffff,
420         },
421         { 0, 0},
422 };
423
424 static struct amba_driver tmc_driver = {
425         .drv = {
426                 .name   = "coresight-tmc",
427                 .owner  = THIS_MODULE,
428                 .suppress_bind_attrs = true,
429         },
430         .probe          = tmc_probe,
431         .id_table       = tmc_ids,
432 };
433 builtin_amba_driver(tmc_driver);