drivers/i2c/busses/i2c-designware-pcidrv.c

   1 /*
   2  * Synopsys DesignWare I2C adapter driver (master only).
   3  *
   4  * Based on the TI DAVINCI I2C adapter driver.
   5  *
   6  * Copyright (C) 2006 Texas Instruments.
   7  * Copyright (C) 2007 MontaVista Software Inc.
   8  * Copyright (C) 2009 Provigent Ltd.
   9  * Copyright (C) 2011, 2015 Intel Corporation.
  10  *
  11  * ----------------------------------------------------------------------------
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License as published by
  15  * the Free Software Foundation; either version 2 of the License, or
  16  * (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  * ----------------------------------------------------------------------------
  23  *
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/delay.h>
  29 #include <linux/i2c.h>
  30 #include <linux/errno.h>
  31 #include <linux/sched.h>
  32 #include <linux/err.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/io.h>
  35 #include <linux/slab.h>
  36 #include <linux/pci.h>
  37 #include <linux/pm_runtime.h>
  38 #include <linux/acpi.h>
  39 #include "i2c-designware-core.h"
  40
  41 #define DRIVER_NAME "i2c-designware-pci"
  42
  43 enum dw_pci_ctl_id_t {
  44         medfield,
  45         baytrail,
  46         haswell,
  47 };
  48
  49 struct dw_scl_sda_cfg {
  50         u32 ss_hcnt;
  51         u32 fs_hcnt;
  52         u32 ss_lcnt;
  53         u32 fs_lcnt;
  54         u32 sda_hold;
  55 };
  56
  57 struct dw_pci_controller {
  58         u32 bus_num;
  59         u32 bus_cfg;
  60         u32 tx_fifo_depth;
  61         u32 rx_fifo_depth;
  62         u32 clk_khz;
  63         u32 functionality;
  64         struct dw_scl_sda_cfg *scl_sda_cfg;
  65         int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
  66 };
  67
  68 #define INTEL_MID_STD_CFG  (DW_IC_CON_MASTER |                  \
  69                                 DW_IC_CON_SLAVE_DISABLE |       \
  70                                 DW_IC_CON_RESTART_EN)
  71
  72 #define DW_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C |                        \
  73                                         I2C_FUNC_SMBUS_BYTE |           \
  74                                         I2C_FUNC_SMBUS_BYTE_DATA |      \
  75                                         I2C_FUNC_SMBUS_WORD_DATA |      \
  76                                         I2C_FUNC_SMBUS_I2C_BLOCK)
  77
  78 /* BayTrail HCNT/LCNT/SDA hold time */
  79 static struct dw_scl_sda_cfg byt_config = {
  80         .ss_hcnt = 0x200,
  81         .fs_hcnt = 0x55,
  82         .ss_lcnt = 0x200,
  83         .fs_lcnt = 0x99,
  84         .sda_hold = 0x6,
  85 };
  86
  87 /* Haswell HCNT/LCNT/SDA hold time */
  88 static struct dw_scl_sda_cfg hsw_config = {
  89         .ss_hcnt = 0x01b0,
  90         .fs_hcnt = 0x48,
  91         .ss_lcnt = 0x01fb,
  92         .fs_lcnt = 0xa0,
  93         .sda_hold = 0x9,
  94 };
  95
  96 static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
  97 {
  98         switch (pdev->device) {
  99         case 0x0817:
 100                 c->bus_cfg &= ~DW_IC_CON_SPEED_MASK;
 101                 c->bus_cfg |= DW_IC_CON_SPEED_STD;
 102         case 0x0818:
 103         case 0x0819:
 104                 c->bus_num = pdev->device - 0x817 + 3;
 105                 return 0;
 106         case 0x082C:
 107         case 0x082D:
 108         case 0x082E:
 109                 c->bus_num = pdev->device - 0x82C + 0;
 110                 return 0;
 111         }
 112         return -ENODEV;
 113 }
 114
 115 static struct dw_pci_controller dw_pci_controllers[] = {
 116         [medfield] = {
 117                 .bus_num = -1,
 118                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 119                 .tx_fifo_depth = 32,
 120                 .rx_fifo_depth = 32,
 121                 .clk_khz      = 25000,
 122                 .setup = mfld_setup,
 123         },
 124         [baytrail] = {
 125                 .bus_num = -1,
 126                 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 127                 .tx_fifo_depth = 32,
 128                 .rx_fifo_depth = 32,
 129                 .functionality = I2C_FUNC_10BIT_ADDR,
 130                 .scl_sda_cfg = &byt_config,
 131         },
 132         [haswell] = {
 133                 .bus_num = -1,
 134                 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 135                 .tx_fifo_depth = 32,
 136                 .rx_fifo_depth = 32,
 137                 .functionality = I2C_FUNC_10BIT_ADDR,
 138                 .scl_sda_cfg = &hsw_config,
 139         },
 140 };
 141
 142 #ifdef CONFIG_PM
 143 static int i2c_dw_pci_suspend(struct device *dev)
 144 {
 145         struct pci_dev *pdev = to_pci_dev(dev);
 146
 147         i2c_dw_disable(pci_get_drvdata(pdev));
 148         return 0;
 149 }
 150
 151 static int i2c_dw_pci_resume(struct device *dev)
 152 {
 153         struct pci_dev *pdev = to_pci_dev(dev);
 154
 155         return i2c_dw_init(pci_get_drvdata(pdev));
 156 }
 157 #endif
 158
 159 static UNIVERSAL_DEV_PM_OPS(i2c_dw_pm_ops, i2c_dw_pci_suspend,
 160                             i2c_dw_pci_resume, NULL);
 161
 162 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
 163 {
 164         return dev->controller->clk_khz;
 165 }
 166
 167 static int i2c_dw_pci_probe(struct pci_dev *pdev,
 168                             const struct pci_device_id *id)
 169 {
 170         struct dw_i2c_dev *dev;
 171         struct i2c_adapter *adap;
 172         int r;
 173         struct  dw_pci_controller *controller;
 174         struct dw_scl_sda_cfg *cfg;
 175
 176         if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
 177                 dev_err(&pdev->dev, "%s: invalid driver data %ld\n", __func__,
 178                         id->driver_data);
 179                 return -EINVAL;
 180         }
 181
 182         controller = &dw_pci_controllers[id->driver_data];
 183
 184         r = pcim_enable_device(pdev);
 185         if (r) {
 186                 dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n",
 187                         r);
 188                 return r;
 189         }
 190
 191         r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
 192         if (r) {
 193                 dev_err(&pdev->dev, "I/O memory remapping failed\n");
 194                 return r;
 195         }
 196
 197         dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
 198         if (!dev)
 199                 return -ENOMEM;
 200
 201         dev->clk = NULL;
 202         dev->controller = controller;
 203         dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
 204         dev->base = pcim_iomap_table(pdev)[0];
 205         dev->dev = &pdev->dev;
 206         dev->irq = pdev->irq;
 207
 208         if (controller->setup) {
 209                 r = controller->setup(pdev, controller);
 210                 if (r)
 211                         return r;
 212         }
 213
 214         dev->functionality = controller->functionality |
 215                                 DW_DEFAULT_FUNCTIONALITY;
 216
 217         dev->master_cfg = controller->bus_cfg;
 218         if (controller->scl_sda_cfg) {
 219                 cfg = controller->scl_sda_cfg;
 220                 dev->ss_hcnt = cfg->ss_hcnt;
 221                 dev->fs_hcnt = cfg->fs_hcnt;
 222                 dev->ss_lcnt = cfg->ss_lcnt;
 223                 dev->fs_lcnt = cfg->fs_lcnt;
 224                 dev->sda_hold_time = cfg->sda_hold;
 225         }
 226
 227         pci_set_drvdata(pdev, dev);
 228
 229         dev->tx_fifo_depth = controller->tx_fifo_depth;
 230         dev->rx_fifo_depth = controller->rx_fifo_depth;
 231
 232         adap = &dev->adapter;
 233         adap->owner = THIS_MODULE;
 234         adap->class = 0;
 235         ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
 236         adap->nr = controller->bus_num;
 237
 238         r = i2c_dw_probe(dev);
 239         if (r)
 240                 return r;
 241
 242         pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
 243         pm_runtime_use_autosuspend(&pdev->dev);
 244         pm_runtime_put_autosuspend(&pdev->dev);
 245         pm_runtime_allow(&pdev->dev);
 246
 247         return 0;
 248 }
 249
 250 static void i2c_dw_pci_remove(struct pci_dev *pdev)
 251 {
 252         struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
 253
 254         i2c_dw_disable(dev);
 255         pm_runtime_forbid(&pdev->dev);
 256         pm_runtime_get_noresume(&pdev->dev);
 257
 258         i2c_del_adapter(&dev->adapter);
 259 }
 260
 261 /* work with hotplug and coldplug */
 262 MODULE_ALIAS("i2c_designware-pci");
 263
 264 static const struct pci_device_id i2_designware_pci_ids[] = {
 265         /* Medfield */
 266         { PCI_VDEVICE(INTEL, 0x0817), medfield },
 267         { PCI_VDEVICE(INTEL, 0x0818), medfield },
 268         { PCI_VDEVICE(INTEL, 0x0819), medfield },
 269         { PCI_VDEVICE(INTEL, 0x082C), medfield },
 270         { PCI_VDEVICE(INTEL, 0x082D), medfield },
 271         { PCI_VDEVICE(INTEL, 0x082E), medfield },
 272         /* Baytrail */
 273         { PCI_VDEVICE(INTEL, 0x0F41), baytrail },
 274         { PCI_VDEVICE(INTEL, 0x0F42), baytrail },
 275         { PCI_VDEVICE(INTEL, 0x0F43), baytrail },
 276         { PCI_VDEVICE(INTEL, 0x0F44), baytrail },
 277         { PCI_VDEVICE(INTEL, 0x0F45), baytrail },
 278         { PCI_VDEVICE(INTEL, 0x0F46), baytrail },
 279         { PCI_VDEVICE(INTEL, 0x0F47), baytrail },
 280         /* Haswell */
 281         { PCI_VDEVICE(INTEL, 0x9c61), haswell },
 282         { PCI_VDEVICE(INTEL, 0x9c62), haswell },
 283         /* Braswell / Cherrytrail */
 284         { PCI_VDEVICE(INTEL, 0x22C1), baytrail },
 285         { PCI_VDEVICE(INTEL, 0x22C2), baytrail },
 286         { PCI_VDEVICE(INTEL, 0x22C3), baytrail },
 287         { PCI_VDEVICE(INTEL, 0x22C4), baytrail },
 288         { PCI_VDEVICE(INTEL, 0x22C5), baytrail },
 289         { PCI_VDEVICE(INTEL, 0x22C6), baytrail },
 290         { PCI_VDEVICE(INTEL, 0x22C7), baytrail },
 291         { 0,}
 292 };
 293 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
 294
 295 static struct pci_driver dw_i2c_driver = {
 296         .name           = DRIVER_NAME,
 297         .id_table       = i2_designware_pci_ids,
 298         .probe          = i2c_dw_pci_probe,
 299         .remove         = i2c_dw_pci_remove,
 300         .driver         = {
 301                 .pm     = &i2c_dw_pm_ops,
 302         },
 303 };
 304
 305 module_pci_driver(dw_i2c_driver);
 306
 307 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
 308 MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
 309 MODULE_LICENSE("GPL");