drivers/i2c/busses/i2c-i801.c

   1 /*
   2     Copyright (c) 1998 - 2002  Frodo Looijaard <frodol@dds.nl>,
   3     Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
   4     <mdsxyz123@yahoo.com>
   5     Copyright (C) 2007 - 2012  Jean Delvare <khali@linux-fr.org>
   6     Copyright (C) 2010         Intel Corporation,
   7                                David Woodhouse <dwmw2@infradead.org>
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License as published by
  11     the Free Software Foundation; either version 2 of the License, or
  12     (at your option) any later version.
  13
  14     This program is distributed in the hope that it will be useful,
  15     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17     GNU General Public License for more details.
  18
  19     You should have received a copy of the GNU General Public License
  20     along with this program; if not, write to the Free Software
  21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 */
  23
  24 /*
  25   Supports the following Intel I/O Controller Hubs (ICH):
  26
  27                                   I/O                     Block   I2C
  28                                   region  SMBus   Block   proc.   block
  29   Chip name             PCI ID    size    PEC     buffer  call    read
  30   ----------------------------------------------------------------------
  31   82801AA  (ICH)        0x2413     16      no      no      no      no
  32   82801AB  (ICH0)       0x2423     16      no      no      no      no
  33   82801BA  (ICH2)       0x2443     16      no      no      no      no
  34   82801CA  (ICH3)       0x2483     32     soft     no      no      no
  35   82801DB  (ICH4)       0x24c3     32     hard     yes     no      no
  36   82801E   (ICH5)       0x24d3     32     hard     yes     yes     yes
  37   6300ESB               0x25a4     32     hard     yes     yes     yes
  38   82801F   (ICH6)       0x266a     32     hard     yes     yes     yes
  39   6310ESB/6320ESB       0x269b     32     hard     yes     yes     yes
  40   82801G   (ICH7)       0x27da     32     hard     yes     yes     yes
  41   82801H   (ICH8)       0x283e     32     hard     yes     yes     yes
  42   82801I   (ICH9)       0x2930     32     hard     yes     yes     yes
  43   EP80579 (Tolapai)     0x5032     32     hard     yes     yes     yes
  44   ICH10                 0x3a30     32     hard     yes     yes     yes
  45   ICH10                 0x3a60     32     hard     yes     yes     yes
  46   5/3400 Series (PCH)   0x3b30     32     hard     yes     yes     yes
  47   6 Series (PCH)        0x1c22     32     hard     yes     yes     yes
  48   Patsburg (PCH)        0x1d22     32     hard     yes     yes     yes
  49   Patsburg (PCH) IDF    0x1d70     32     hard     yes     yes     yes
  50   Patsburg (PCH) IDF    0x1d71     32     hard     yes     yes     yes
  51   Patsburg (PCH) IDF    0x1d72     32     hard     yes     yes     yes
  52   DH89xxCC (PCH)        0x2330     32     hard     yes     yes     yes
  53   Panther Point (PCH)   0x1e22     32     hard     yes     yes     yes
  54   Lynx Point (PCH)      0x8c22     32     hard     yes     yes     yes
  55   Lynx Point-LP (PCH)   0x9c22     32     hard     yes     yes     yes
  56   Avoton (SOC)          0x1f3c     32     hard     yes     yes     yes
  57   Wellsburg (PCH)       0x8d22     32     hard     yes     yes     yes
  58   Wellsburg (PCH) MS    0x8d7d     32     hard     yes     yes     yes
  59   Wellsburg (PCH) MS    0x8d7e     32     hard     yes     yes     yes
  60   Wellsburg (PCH) MS    0x8d7f     32     hard     yes     yes     yes
  61   Coleto Creek (PCH)    0x23b0     32     hard     yes     yes     yes
  62
  63   Features supported by this driver:
  64   Software PEC                     no
  65   Hardware PEC                     yes
  66   Block buffer                     yes
  67   Block process call transaction   no
  68   I2C block read transaction       yes  (doesn't use the block buffer)
  69   Slave mode                       no
  70   Interrupt processing             yes
  71
  72   See the file Documentation/i2c/busses/i2c-i801 for details.
  73 */
  74
  75 #include <linux/interrupt.h>
  76 #include <linux/module.h>
  77 #include <linux/pci.h>
  78 #include <linux/kernel.h>
  79 #include <linux/stddef.h>
  80 #include <linux/delay.h>
  81 #include <linux/ioport.h>
  82 #include <linux/init.h>
  83 #include <linux/i2c.h>
  84 #include <linux/acpi.h>
  85 #include <linux/io.h>
  86 #include <linux/dmi.h>
  87 #include <linux/slab.h>
  88 #include <linux/wait.h>
  89 #include <linux/err.h>
  90 #include <linux/of_i2c.h>
  91
  92 #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \
  93                 defined CONFIG_DMI
  94 #include <linux/gpio.h>
  95 #include <linux/i2c-mux-gpio.h>
  96 #include <linux/platform_device.h>
  97 #endif
  98
  99 /* I801 SMBus address offsets */
 100 #define SMBHSTSTS(p)    (0 + (p)->smba)
 101 #define SMBHSTCNT(p)    (2 + (p)->smba)
 102 #define SMBHSTCMD(p)    (3 + (p)->smba)
 103 #define SMBHSTADD(p)    (4 + (p)->smba)
 104 #define SMBHSTDAT0(p)   (5 + (p)->smba)
 105 #define SMBHSTDAT1(p)   (6 + (p)->smba)
 106 #define SMBBLKDAT(p)    (7 + (p)->smba)
 107 #define SMBPEC(p)       (8 + (p)->smba)         /* ICH3 and later */
 108 #define SMBAUXSTS(p)    (12 + (p)->smba)        /* ICH4 and later */
 109 #define SMBAUXCTL(p)    (13 + (p)->smba)        /* ICH4 and later */
 110
 111 /* PCI Address Constants */
 112 #define SMBBAR          4
 113 #define SMBPCISTS       0x006
 114 #define SMBHSTCFG       0x040
 115
 116 /* Host status bits for SMBPCISTS */
 117 #define SMBPCISTS_INTS          0x08
 118
 119 /* Host configuration bits for SMBHSTCFG */
 120 #define SMBHSTCFG_HST_EN        1
 121 #define SMBHSTCFG_SMB_SMI_EN    2
 122 #define SMBHSTCFG_I2C_EN        4
 123
 124 /* Auxiliary control register bits, ICH4+ only */
 125 #define SMBAUXCTL_CRC           1
 126 #define SMBAUXCTL_E32B          2
 127
 128 /* Other settings */
 129 #define MAX_RETRIES             400
 130
 131 /* I801 command constants */
 132 #define I801_QUICK              0x00
 133 #define I801_BYTE               0x04
 134 #define I801_BYTE_DATA          0x08
 135 #define I801_WORD_DATA          0x0C
 136 #define I801_PROC_CALL          0x10    /* unimplemented */
 137 #define I801_BLOCK_DATA         0x14
 138 #define I801_I2C_BLOCK_DATA     0x18    /* ICH5 and later */
 139
 140 /* I801 Host Control register bits */
 141 #define SMBHSTCNT_INTREN        0x01
 142 #define SMBHSTCNT_KILL          0x02
 143 #define SMBHSTCNT_LAST_BYTE     0x20
 144 #define SMBHSTCNT_START         0x40
 145 #define SMBHSTCNT_PEC_EN        0x80    /* ICH3 and later */
 146
 147 /* I801 Hosts Status register bits */
 148 #define SMBHSTSTS_BYTE_DONE     0x80
 149 #define SMBHSTSTS_INUSE_STS     0x40
 150 #define SMBHSTSTS_SMBALERT_STS  0x20
 151 #define SMBHSTSTS_FAILED        0x10
 152 #define SMBHSTSTS_BUS_ERR       0x08
 153 #define SMBHSTSTS_DEV_ERR       0x04
 154 #define SMBHSTSTS_INTR          0x02
 155 #define SMBHSTSTS_HOST_BUSY     0x01
 156
 157 #define STATUS_ERROR_FLAGS      (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \
 158                                  SMBHSTSTS_DEV_ERR)
 159
 160 #define STATUS_FLAGS            (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \
 161                                  STATUS_ERROR_FLAGS)
 162
 163 /* Older devices have their ID defined in <linux/pci_ids.h> */
 164 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS   0x1c22
 165 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS      0x1d22
 166 /* Patsburg also has three 'Integrated Device Function' SMBus controllers */
 167 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
 168 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
 169 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
 170 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS  0x1e22
 171 #define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS        0x1f3c
 172 #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS      0x2330
 173 #define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS   0x23b0
 174 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
 175 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS     0x8c22
 176 #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS     0x8d22
 177 #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0 0x8d7d
 178 #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1 0x8d7e
 179 #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2 0x8d7f
 180 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS  0x9c22
 181
 182 struct i801_mux_config {
 183         char *gpio_chip;
 184         unsigned values[3];
 185         int n_values;
 186         unsigned classes[3];
 187         unsigned gpios[2];              /* Relative to gpio_chip->base */
 188         int n_gpios;
 189 };
 190
 191 struct i801_priv {
 192         struct i2c_adapter adapter;
 193         unsigned long smba;
 194         unsigned char original_hstcfg;
 195         struct pci_dev *pci_dev;
 196         unsigned int features;
 197
 198         /* isr processing */
 199         wait_queue_head_t waitq;
 200         u8 status;
 201
 202         /* Command state used by isr for byte-by-byte block transactions */
 203         u8 cmd;
 204         bool is_read;
 205         int count;
 206         int len;
 207         u8 *data;
 208
 209 #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \
 210                 defined CONFIG_DMI
 211         const struct i801_mux_config *mux_drvdata;
 212         struct platform_device *mux_pdev;
 213 #endif
 214 };
 215
 216 static struct pci_driver i801_driver;
 217
 218 #define FEATURE_SMBUS_PEC       (1 << 0)
 219 #define FEATURE_BLOCK_BUFFER    (1 << 1)
 220 #define FEATURE_BLOCK_PROC      (1 << 2)
 221 #define FEATURE_I2C_BLOCK_READ  (1 << 3)
 222 #define FEATURE_IRQ             (1 << 4)
 223 /* Not really a feature, but it's convenient to handle it as such */
 224 #define FEATURE_IDF             (1 << 15)
 225
 226 static const char *i801_feature_names[] = {
 227         "SMBus PEC",
 228         "Block buffer",
 229         "Block process call",
 230         "I2C block read",
 231         "Interrupt",
 232 };
 233
 234 static unsigned int disable_features;
 235 module_param(disable_features, uint, S_IRUGO | S_IWUSR);
 236 MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n"
 237         "\t\t  0x01  disable SMBus PEC\n"
 238         "\t\t  0x02  disable the block buffer\n"
 239         "\t\t  0x08  disable the I2C block read functionality\n"
 240         "\t\t  0x10  don't use interrupts ");
 241
 242 /* Make sure the SMBus host is ready to start transmitting.
 243    Return 0 if it is, -EBUSY if it is not. */
 244 static int i801_check_pre(struct i801_priv *priv)
 245 {
 246         int status;
 247
 248         status = inb_p(SMBHSTSTS(priv));
 249         if (status & SMBHSTSTS_HOST_BUSY) {
 250                 dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
 251                 return -EBUSY;
 252         }
 253
 254         status &= STATUS_FLAGS;
 255         if (status) {
 256                 dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
 257                         status);
 258                 outb_p(status, SMBHSTSTS(priv));
 259                 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
 260                 if (status) {
 261                         dev_err(&priv->pci_dev->dev,
 262                                 "Failed clearing status flags (%02x)\n",
 263                                 status);
 264                         return -EBUSY;
 265                 }
 266         }
 267
 268         return 0;
 269 }
 270
 271 /*
 272  * Convert the status register to an error code, and clear it.
 273  * Note that status only contains the bits we want to clear, not the
 274  * actual register value.
 275  */
 276 static int i801_check_post(struct i801_priv *priv, int status)
 277 {
 278         int result = 0;
 279
 280         /*
 281          * If the SMBus is still busy, we give up
 282          * Note: This timeout condition only happens when using polling
 283          * transactions.  For interrupt operation, NAK/timeout is indicated by
 284          * DEV_ERR.
 285          */
 286         if (unlikely(status < 0)) {
 287                 dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
 288                 /* try to stop the current command */
 289                 dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
 290                 outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL,
 291                        SMBHSTCNT(priv));
 292                 usleep_range(1000, 2000);
 293                 outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL),
 294                        SMBHSTCNT(priv));
 295
 296                 /* Check if it worked */
 297                 status = inb_p(SMBHSTSTS(priv));
 298                 if ((status & SMBHSTSTS_HOST_BUSY) ||
 299                     !(status & SMBHSTSTS_FAILED))
 300                         dev_err(&priv->pci_dev->dev,
 301                                 "Failed terminating the transaction\n");
 302                 outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
 303                 return -ETIMEDOUT;
 304         }
 305
 306         if (status & SMBHSTSTS_FAILED) {
 307                 result = -EIO;
 308                 dev_err(&priv->pci_dev->dev, "Transaction failed\n");
 309         }
 310         if (status & SMBHSTSTS_DEV_ERR) {
 311                 result = -ENXIO;
 312                 dev_dbg(&priv->pci_dev->dev, "No response\n");
 313         }
 314         if (status & SMBHSTSTS_BUS_ERR) {
 315                 result = -EAGAIN;
 316                 dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
 317         }
 318
 319         /* Clear status flags except BYTE_DONE, to be cleared by caller */
 320         outb_p(status, SMBHSTSTS(priv));
 321
 322         return result;
 323 }
 324
 325 /* Wait for BUSY being cleared and either INTR or an error flag being set */
 326 static int i801_wait_intr(struct i801_priv *priv)
 327 {
 328         int timeout = 0;
 329         int status;
 330
 331         /* We will always wait for a fraction of a second! */
 332         do {
 333                 usleep_range(250, 500);
 334                 status = inb_p(SMBHSTSTS(priv));
 335         } while (((status & SMBHSTSTS_HOST_BUSY) ||
 336                   !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) &&
 337                  (timeout++ < MAX_RETRIES));
 338
 339         if (timeout > MAX_RETRIES) {
 340                 dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n");
 341                 return -ETIMEDOUT;
 342         }
 343         return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR);
 344 }
 345
 346 /* Wait for either BYTE_DONE or an error flag being set */
 347 static int i801_wait_byte_done(struct i801_priv *priv)
 348 {
 349         int timeout = 0;
 350         int status;
 351
 352         /* We will always wait for a fraction of a second! */
 353         do {
 354                 usleep_range(250, 500);
 355                 status = inb_p(SMBHSTSTS(priv));
 356         } while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) &&
 357                  (timeout++ < MAX_RETRIES));
 358
 359         if (timeout > MAX_RETRIES) {
 360                 dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n");
 361                 return -ETIMEDOUT;
 362         }
 363         return status & STATUS_ERROR_FLAGS;
 364 }
 365
 366 static int i801_transaction(struct i801_priv *priv, int xact)
 367 {
 368         int status;
 369         int result;
 370
 371         result = i801_check_pre(priv);
 372         if (result < 0)
 373                 return result;
 374
 375         if (priv->features & FEATURE_IRQ) {
 376                 outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START,
 377                        SMBHSTCNT(priv));
 378                 wait_event(priv->waitq, (status = priv->status));
 379                 priv->status = 0;
 380                 return i801_check_post(priv, status);
 381         }
 382
 383         /* the current contents of SMBHSTCNT can be overwritten, since PEC,
 384          * SMBSCMD are passed in xact */
 385         outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
 386
 387         status = i801_wait_intr(priv);
 388         return i801_check_post(priv, status);
 389 }
 390
 391 static int i801_block_transaction_by_block(struct i801_priv *priv,
 392                                            union i2c_smbus_data *data,
 393                                            char read_write, int hwpec)
 394 {
 395         int i, len;
 396         int status;
 397
 398         inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
 399
 400         /* Use 32-byte buffer to process this transaction */
 401         if (read_write == I2C_SMBUS_WRITE) {
 402                 len = data->block[0];
 403                 outb_p(len, SMBHSTDAT0(priv));
 404                 for (i = 0; i < len; i++)
 405                         outb_p(data->block[i+1], SMBBLKDAT(priv));
 406         }
 407
 408         status = i801_transaction(priv, I801_BLOCK_DATA |
 409                                   (hwpec ? SMBHSTCNT_PEC_EN : 0));
 410         if (status)
 411                 return status;
 412
 413         if (read_write == I2C_SMBUS_READ) {
 414                 len = inb_p(SMBHSTDAT0(priv));
 415                 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
 416                         return -EPROTO;
 417
 418                 data->block[0] = len;
 419                 for (i = 0; i < len; i++)
 420                         data->block[i + 1] = inb_p(SMBBLKDAT(priv));
 421         }
 422         return 0;
 423 }
 424
 425 static void i801_isr_byte_done(struct i801_priv *priv)
 426 {
 427         if (priv->is_read) {
 428                 /* For SMBus block reads, length is received with first byte */
 429                 if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) &&
 430                     (priv->count == 0)) {
 431                         priv->len = inb_p(SMBHSTDAT0(priv));
 432                         if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) {
 433                                 dev_err(&priv->pci_dev->dev,
 434                                         "Illegal SMBus block read size %d\n",
 435                                         priv->len);
 436                                 /* FIXME: Recover */
 437                                 priv->len = I2C_SMBUS_BLOCK_MAX;
 438                         } else {
 439                                 dev_dbg(&priv->pci_dev->dev,
 440                                         "SMBus block read size is %d\n",
 441                                         priv->len);
 442                         }
 443                         priv->data[-1] = priv->len;
 444                 }
 445
 446                 /* Read next byte */
 447                 if (priv->count < priv->len)
 448                         priv->data[priv->count++] = inb(SMBBLKDAT(priv));
 449                 else
 450                         dev_dbg(&priv->pci_dev->dev,
 451                                 "Discarding extra byte on block read\n");
 452
 453                 /* Set LAST_BYTE for last byte of read transaction */
 454                 if (priv->count == priv->len - 1)
 455                         outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE,
 456                                SMBHSTCNT(priv));
 457         } else if (priv->count < priv->len - 1) {
 458                 /* Write next byte, except for IRQ after last byte */
 459                 outb_p(priv->data[++priv->count], SMBBLKDAT(priv));
 460         }
 461
 462         /* Clear BYTE_DONE to continue with next byte */
 463         outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
 464 }
 465
 466 /*
 467  * There are two kinds of interrupts:
 468  *
 469  * 1) i801 signals transaction completion with one of these interrupts:
 470  *      INTR - Success
 471  *      DEV_ERR - Invalid command, NAK or communication timeout
 472  *      BUS_ERR - SMI# transaction collision
 473  *      FAILED - transaction was canceled due to a KILL request
 474  *    When any of these occur, update ->status and wake up the waitq.
 475  *    ->status must be cleared before kicking off the next transaction.
 476  *
 477  * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt
 478  *    occurs for each byte of a byte-by-byte to prepare the next byte.
 479  */
 480 static irqreturn_t i801_isr(int irq, void *dev_id)
 481 {
 482         struct i801_priv *priv = dev_id;
 483         u16 pcists;
 484         u8 status;
 485
 486         /* Confirm this is our interrupt */
 487         pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
 488         if (!(pcists & SMBPCISTS_INTS))
 489                 return IRQ_NONE;
 490
 491         status = inb_p(SMBHSTSTS(priv));
 492         if (status != 0x42)
 493                 dev_dbg(&priv->pci_dev->dev, "irq: status = %02x\n", status);
 494
 495         if (status & SMBHSTSTS_BYTE_DONE)
 496                 i801_isr_byte_done(priv);
 497
 498         /*
 499          * Clear irq sources and report transaction result.
 500          * ->status must be cleared before the next transaction is started.
 501          */
 502         status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS;
 503         if (status) {
 504                 outb_p(status, SMBHSTSTS(priv));
 505                 priv->status |= status;
 506                 wake_up(&priv->waitq);
 507         }
 508
 509         return IRQ_HANDLED;
 510 }
 511
 512 /*
 513  * For "byte-by-byte" block transactions:
 514  *   I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1
 515  *   I2C read uses cmd=I801_I2C_BLOCK_DATA
 516  */
 517 static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
 518                                                union i2c_smbus_data *data,
 519                                                char read_write, int command,
 520                                                int hwpec)
 521 {
 522         int i, len;
 523         int smbcmd;
 524         int status;
 525         int result;
 526
 527         result = i801_check_pre(priv);
 528         if (result < 0)
 529                 return result;
 530
 531         len = data->block[0];
 532
 533         if (read_write == I2C_SMBUS_WRITE) {
 534                 outb_p(len, SMBHSTDAT0(priv));
 535                 outb_p(data->block[1], SMBBLKDAT(priv));
 536         }
 537
 538         if (command == I2C_SMBUS_I2C_BLOCK_DATA &&
 539             read_write == I2C_SMBUS_READ)
 540                 smbcmd = I801_I2C_BLOCK_DATA;
 541         else
 542                 smbcmd = I801_BLOCK_DATA;
 543
 544         if (priv->features & FEATURE_IRQ) {
 545                 priv->is_read = (read_write == I2C_SMBUS_READ);
 546                 if (len == 1 && priv->is_read)
 547                         smbcmd |= SMBHSTCNT_LAST_BYTE;
 548                 priv->cmd = smbcmd | SMBHSTCNT_INTREN;
 549                 priv->len = len;
 550                 priv->count = 0;
 551                 priv->data = &data->block[1];
 552
 553                 outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv));
 554                 wait_event(priv->waitq, (status = priv->status));
 555                 priv->status = 0;
 556                 return i801_check_post(priv, status);
 557         }
 558
 559         for (i = 1; i <= len; i++) {
 560                 if (i == len && read_write == I2C_SMBUS_READ)
 561                         smbcmd |= SMBHSTCNT_LAST_BYTE;
 562                 outb_p(smbcmd, SMBHSTCNT(priv));
 563
 564                 if (i == 1)
 565                         outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
 566                                SMBHSTCNT(priv));
 567
 568                 status = i801_wait_byte_done(priv);
 569                 if (status)
 570                         goto exit;
 571
 572                 if (i == 1 && read_write == I2C_SMBUS_READ
 573                  && command != I2C_SMBUS_I2C_BLOCK_DATA) {
 574                         len = inb_p(SMBHSTDAT0(priv));
 575                         if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
 576                                 dev_err(&priv->pci_dev->dev,
 577                                         "Illegal SMBus block read size %d\n",
 578                                         len);
 579                                 /* Recover */
 580                                 while (inb_p(SMBHSTSTS(priv)) &
 581                                        SMBHSTSTS_HOST_BUSY)
 582                                         outb_p(SMBHSTSTS_BYTE_DONE,
 583                                                SMBHSTSTS(priv));
 584                                 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
 585                                 return -EPROTO;
 586                         }
 587                         data->block[0] = len;
 588                 }
 589
 590                 /* Retrieve/store value in SMBBLKDAT */
 591                 if (read_write == I2C_SMBUS_READ)
 592                         data->block[i] = inb_p(SMBBLKDAT(priv));
 593                 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
 594                         outb_p(data->block[i+1], SMBBLKDAT(priv));
 595
 596                 /* signals SMBBLKDAT ready */
 597                 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
 598         }
 599
 600         status = i801_wait_intr(priv);
 601 exit:
 602         return i801_check_post(priv, status);
 603 }
 604
 605 static int i801_set_block_buffer_mode(struct i801_priv *priv)
 606 {
 607         outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
 608         if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
 609                 return -EIO;
 610         return 0;
 611 }
 612
 613 /* Block transaction function */
 614 static int i801_block_transaction(struct i801_priv *priv,
 615                                   union i2c_smbus_data *data, char read_write,
 616                                   int command, int hwpec)
 617 {
 618         int result = 0;
 619         unsigned char hostc;
 620
 621         if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
 622                 if (read_write == I2C_SMBUS_WRITE) {
 623                         /* set I2C_EN bit in configuration register */
 624                         pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
 625                         pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
 626                                               hostc | SMBHSTCFG_I2C_EN);
 627                 } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
 628                         dev_err(&priv->pci_dev->dev,
 629                                 "I2C block read is unsupported!\n");
 630                         return -EOPNOTSUPP;
 631                 }
 632         }
 633
 634         if (read_write == I2C_SMBUS_WRITE
 635          || command == I2C_SMBUS_I2C_BLOCK_DATA) {
 636                 if (data->block[0] < 1)
 637                         data->block[0] = 1;
 638                 if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
 639                         data->block[0] = I2C_SMBUS_BLOCK_MAX;
 640         } else {
 641                 data->block[0] = 32;    /* max for SMBus block reads */
 642         }
 643
 644         /* Experience has shown that the block buffer can only be used for
 645            SMBus (not I2C) block transactions, even though the datasheet
 646            doesn't mention this limitation. */
 647         if ((priv->features & FEATURE_BLOCK_BUFFER)
 648          && command != I2C_SMBUS_I2C_BLOCK_DATA
 649          && i801_set_block_buffer_mode(priv) == 0)
 650                 result = i801_block_transaction_by_block(priv, data,
 651                                                          read_write, hwpec);
 652         else
 653                 result = i801_block_transaction_byte_by_byte(priv, data,
 654                                                              read_write,
 655                                                              command, hwpec);
 656
 657         if (command == I2C_SMBUS_I2C_BLOCK_DATA
 658          && read_write == I2C_SMBUS_WRITE) {
 659                 /* restore saved configuration register value */
 660                 pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
 661         }
 662         return result;
 663 }
 664
 665 /* Return negative errno on error. */
 666 static s32 i801_access(struct i2c_adapter *adap, u16 addr,
 667                        unsigned short flags, char read_write, u8 command,
 668                        int size, union i2c_smbus_data *data)
 669 {
 670         int hwpec;
 671         int block = 0;
 672         int ret, xact = 0;
 673         struct i801_priv *priv = i2c_get_adapdata(adap);
 674
 675         hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
 676                 && size != I2C_SMBUS_QUICK
 677                 && size != I2C_SMBUS_I2C_BLOCK_DATA;
 678
 679         switch (size) {
 680         case I2C_SMBUS_QUICK:
 681                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 682                        SMBHSTADD(priv));
 683                 xact = I801_QUICK;
 684                 break;
 685         case I2C_SMBUS_BYTE:
 686                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 687                        SMBHSTADD(priv));
 688                 if (read_write == I2C_SMBUS_WRITE)
 689                         outb_p(command, SMBHSTCMD(priv));
 690                 xact = I801_BYTE;
 691                 break;
 692         case I2C_SMBUS_BYTE_DATA:
 693                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 694                        SMBHSTADD(priv));
 695                 outb_p(command, SMBHSTCMD(priv));
 696                 if (read_write == I2C_SMBUS_WRITE)
 697                         outb_p(data->byte, SMBHSTDAT0(priv));
 698                 xact = I801_BYTE_DATA;
 699                 break;
 700         case I2C_SMBUS_WORD_DATA:
 701                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 702                        SMBHSTADD(priv));
 703                 outb_p(command, SMBHSTCMD(priv));
 704                 if (read_write == I2C_SMBUS_WRITE) {
 705                         outb_p(data->word & 0xff, SMBHSTDAT0(priv));
 706                         outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
 707                 }
 708                 xact = I801_WORD_DATA;
 709                 break;
 710         case I2C_SMBUS_BLOCK_DATA:
 711                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 712                        SMBHSTADD(priv));
 713                 outb_p(command, SMBHSTCMD(priv));
 714                 block = 1;
 715                 break;
 716         case I2C_SMBUS_I2C_BLOCK_DATA:
 717                 /* NB: page 240 of ICH5 datasheet shows that the R/#W
 718                  * bit should be cleared here, even when reading */
 719                 outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
 720                 if (read_write == I2C_SMBUS_READ) {
 721                         /* NB: page 240 of ICH5 datasheet also shows
 722                          * that DATA1 is the cmd field when reading */
 723                         outb_p(command, SMBHSTDAT1(priv));
 724                 } else
 725                         outb_p(command, SMBHSTCMD(priv));
 726                 block = 1;
 727                 break;
 728         default:
 729                 dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
 730                         size);
 731                 return -EOPNOTSUPP;
 732         }
 733
 734         if (hwpec)      /* enable/disable hardware PEC */
 735                 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
 736         else
 737                 outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
 738                        SMBAUXCTL(priv));
 739
 740         if (block)
 741                 ret = i801_block_transaction(priv, data, read_write, size,
 742                                              hwpec);
 743         else
 744                 ret = i801_transaction(priv, xact);
 745
 746         /* Some BIOSes don't like it when PEC is enabled at reboot or resume
 747            time, so we forcibly disable it after every transaction. Turn off
 748            E32B for the same reason. */
 749         if (hwpec || block)
 750                 outb_p(inb_p(SMBAUXCTL(priv)) &
 751                        ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
 752
 753         if (block)
 754                 return ret;
 755         if (ret)
 756                 return ret;
 757         if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
 758                 return 0;
 759
 760         switch (xact & 0x7f) {
 761         case I801_BYTE: /* Result put in SMBHSTDAT0 */
 762         case I801_BYTE_DATA:
 763                 data->byte = inb_p(SMBHSTDAT0(priv));
 764                 break;
 765         case I801_WORD_DATA:
 766                 data->word = inb_p(SMBHSTDAT0(priv)) +
 767                              (inb_p(SMBHSTDAT1(priv)) << 8);
 768                 break;
 769         }
 770         return 0;
 771 }
 772
 773
 774 static u32 i801_func(struct i2c_adapter *adapter)
 775 {
 776         struct i801_priv *priv = i2c_get_adapdata(adapter);
 777
 778         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 779                I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 780                I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
 781                ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
 782                ((priv->features & FEATURE_I2C_BLOCK_READ) ?
 783                 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
 784 }
 785
 786 static const struct i2c_algorithm smbus_algorithm = {
 787         .smbus_xfer     = i801_access,
 788         .functionality  = i801_func,
 789 };
 790
 791 static DEFINE_PCI_DEVICE_TABLE(i801_ids) = {
 792         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
 793         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
 794         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
 795         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) },
 796         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) },
 797         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) },
 798         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) },
 799         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) },
 800         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
 801         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
 802         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
 803         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
 804         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
 805         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
 806         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
 807         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
 808         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
 809         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
 810         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
 811         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
 812         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
 813         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) },
 814         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
 815         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },
 816         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) },
 817         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) },
 818         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) },
 819         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) },
 820         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
 821         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
 822         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) },
 823         { 0, }
 824 };
 825
 826 MODULE_DEVICE_TABLE(pci, i801_ids);
 827
 828 #if defined CONFIG_X86 && defined CONFIG_DMI
 829 static unsigned char apanel_addr;
 830
 831 /* Scan the system ROM for the signature "FJKEYINF" */
 832 static __init const void __iomem *bios_signature(const void __iomem *bios)
 833 {
 834         ssize_t offset;
 835         const unsigned char signature[] = "FJKEYINF";
 836
 837         for (offset = 0; offset < 0x10000; offset += 0x10) {
 838                 if (check_signature(bios + offset, signature,
 839                                     sizeof(signature)-1))
 840                         return bios + offset;
 841         }
 842         return NULL;
 843 }
 844
 845 static void __init input_apanel_init(void)
 846 {
 847         void __iomem *bios;
 848         const void __iomem *p;
 849
 850         bios = ioremap(0xF0000, 0x10000); /* Can't fail */
 851         p = bios_signature(bios);
 852         if (p) {
 853                 /* just use the first address */
 854                 apanel_addr = readb(p + 8 + 3) >> 1;
 855         }
 856         iounmap(bios);
 857 }
 858
 859 struct dmi_onboard_device_info {
 860         const char *name;
 861         u8 type;
 862         unsigned short i2c_addr;
 863         const char *i2c_type;
 864 };
 865
 866 static const struct dmi_onboard_device_info dmi_devices[] = {
 867         { "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" },
 868         { "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" },
 869         { "Hades",  DMI_DEV_TYPE_OTHER, 0x73, "fschds" },
 870 };
 871
 872 static void dmi_check_onboard_device(u8 type, const char *name,
 873                                      struct i2c_adapter *adap)
 874 {
 875         int i;
 876         struct i2c_board_info info;
 877
 878         for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) {
 879                 /* & ~0x80, ignore enabled/disabled bit */
 880                 if ((type & ~0x80) != dmi_devices[i].type)
 881                         continue;
 882                 if (strcasecmp(name, dmi_devices[i].name))
 883                         continue;
 884
 885                 memset(&info, 0, sizeof(struct i2c_board_info));
 886                 info.addr = dmi_devices[i].i2c_addr;
 887                 strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE);
 888                 i2c_new_device(adap, &info);
 889                 break;
 890         }
 891 }
 892
 893 /* We use our own function to check for onboard devices instead of
 894    dmi_find_device() as some buggy BIOS's have the devices we are interested
 895    in marked as disabled */
 896 static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap)
 897 {
 898         int i, count;
 899
 900         if (dm->type != 10)
 901                 return;
 902
 903         count = (dm->length - sizeof(struct dmi_header)) / 2;
 904         for (i = 0; i < count; i++) {
 905                 const u8 *d = (char *)(dm + 1) + (i * 2);
 906                 const char *name = ((char *) dm) + dm->length;
 907                 u8 type = d[0];
 908                 u8 s = d[1];
 909
 910                 if (!s)
 911                         continue;
 912                 s--;
 913                 while (s > 0 && name[0]) {
 914                         name += strlen(name) + 1;
 915                         s--;
 916                 }
 917                 if (name[0] == 0) /* Bogus string reference */
 918                         continue;
 919
 920                 dmi_check_onboard_device(type, name, adap);
 921         }
 922 }
 923
 924 /* Register optional slaves */
 925 static void i801_probe_optional_slaves(struct i801_priv *priv)
 926 {
 927         /* Only register slaves on main SMBus channel */
 928         if (priv->features & FEATURE_IDF)
 929                 return;
 930
 931         if (apanel_addr) {
 932                 struct i2c_board_info info;
 933
 934                 memset(&info, 0, sizeof(struct i2c_board_info));
 935                 info.addr = apanel_addr;
 936                 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
 937                 i2c_new_device(&priv->adapter, &info);
 938         }
 939
 940         if (dmi_name_in_vendors("FUJITSU"))
 941                 dmi_walk(dmi_check_onboard_devices, &priv->adapter);
 942 }
 943 #else
 944 static void __init input_apanel_init(void) {}
 945 static void i801_probe_optional_slaves(struct i801_priv *priv) {}
 946 #endif  /* CONFIG_X86 && CONFIG_DMI */
 947
 948 #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \
 949                 defined CONFIG_DMI
 950 static struct i801_mux_config i801_mux_config_asus_z8_d12 = {
 951         .gpio_chip = "gpio_ich",
 952         .values = { 0x02, 0x03 },
 953         .n_values = 2,
 954         .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD },
 955         .gpios = { 52, 53 },
 956         .n_gpios = 2,
 957 };
 958
 959 static struct i801_mux_config i801_mux_config_asus_z8_d18 = {
 960         .gpio_chip = "gpio_ich",
 961         .values = { 0x02, 0x03, 0x01 },
 962         .n_values = 3,
 963         .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD, I2C_CLASS_SPD },
 964         .gpios = { 52, 53 },
 965         .n_gpios = 2,
 966 };
 967
 968 static const struct dmi_system_id mux_dmi_table[] = {
 969         {
 970                 .matches = {
 971                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 972                         DMI_MATCH(DMI_BOARD_NAME, "Z8NA-D6(C)"),
 973                 },
 974                 .driver_data = &i801_mux_config_asus_z8_d12,
 975         },
 976         {
 977                 .matches = {
 978                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 979                         DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)E-D12(X)"),
 980                 },
 981                 .driver_data = &i801_mux_config_asus_z8_d12,
 982         },
 983         {
 984                 .matches = {
 985                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 986                         DMI_MATCH(DMI_BOARD_NAME, "Z8NH-D12"),
 987                 },
 988                 .driver_data = &i801_mux_config_asus_z8_d12,
 989         },
 990         {
 991                 .matches = {
 992                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 993                         DMI_MATCH(DMI_BOARD_NAME, "Z8PH-D12/IFB"),
 994                 },
 995                 .driver_data = &i801_mux_config_asus_z8_d12,
 996         },
 997         {
 998                 .matches = {
 999                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1000                         DMI_MATCH(DMI_BOARD_NAME, "Z8NR-D12"),
1001                 },
1002                 .driver_data = &i801_mux_config_asus_z8_d12,
1003         },
1004         {
1005                 .matches = {
1006                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1007                         DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)H-D12"),
1008                 },
1009                 .driver_data = &i801_mux_config_asus_z8_d12,
1010         },
1011         {
1012                 .matches = {
1013                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1014                         DMI_MATCH(DMI_BOARD_NAME, "Z8PG-D18"),
1015                 },
1016                 .driver_data = &i801_mux_config_asus_z8_d18,
1017         },
1018         {
1019                 .matches = {
1020                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1021                         DMI_MATCH(DMI_BOARD_NAME, "Z8PE-D18"),
1022                 },
1023                 .driver_data = &i801_mux_config_asus_z8_d18,
1024         },
1025         {
1026                 .matches = {
1027                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1028                         DMI_MATCH(DMI_BOARD_NAME, "Z8PS-D12"),
1029                 },
1030                 .driver_data = &i801_mux_config_asus_z8_d12,
1031         },
1032         { }
1033 };
1034
1035 /* Setup multiplexing if needed */
1036 static int i801_add_mux(struct i801_priv *priv)
1037 {
1038         struct device *dev = &priv->adapter.dev;
1039         const struct i801_mux_config *mux_config;
1040         struct i2c_mux_gpio_platform_data gpio_data;
1041         int err;
1042
1043         if (!priv->mux_drvdata)
1044                 return 0;
1045         mux_config = priv->mux_drvdata;
1046
1047         /* Prepare the platform data */
1048         memset(&gpio_data, 0, sizeof(struct i2c_mux_gpio_platform_data));
1049         gpio_data.parent = priv->adapter.nr;
1050         gpio_data.values = mux_config->values;
1051         gpio_data.n_values = mux_config->n_values;
1052         gpio_data.classes = mux_config->classes;
1053         gpio_data.gpio_chip = mux_config->gpio_chip;
1054         gpio_data.gpios = mux_config->gpios;
1055         gpio_data.n_gpios = mux_config->n_gpios;
1056         gpio_data.idle = I2C_MUX_GPIO_NO_IDLE;
1057
1058         /* Register the mux device */
1059         priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio",
1060                                 PLATFORM_DEVID_AUTO, &gpio_data,
1061                                 sizeof(struct i2c_mux_gpio_platform_data));
1062         if (IS_ERR(priv->mux_pdev)) {
1063                 err = PTR_ERR(priv->mux_pdev);
1064                 priv->mux_pdev = NULL;
1065                 dev_err(dev, "Failed to register i2c-mux-gpio device\n");
1066                 return err;
1067         }
1068
1069         return 0;
1070 }
1071
1072 static void i801_del_mux(struct i801_priv *priv)
1073 {
1074         if (priv->mux_pdev)
1075                 platform_device_unregister(priv->mux_pdev);
1076 }
1077
1078 static unsigned int i801_get_adapter_class(struct i801_priv *priv)
1079 {
1080         const struct dmi_system_id *id;
1081         const struct i801_mux_config *mux_config;
1082         unsigned int class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
1083         int i;
1084
1085         id = dmi_first_match(mux_dmi_table);
1086         if (id) {
1087                 /* Remove branch classes from trunk */
1088                 mux_config = id->driver_data;
1089                 for (i = 0; i < mux_config->n_values; i++)
1090                         class &= ~mux_config->classes[i];
1091
1092                 /* Remember for later */
1093                 priv->mux_drvdata = mux_config;
1094         }
1095
1096         return class;
1097 }
1098 #else
1099 static inline int i801_add_mux(struct i801_priv *priv) { return 0; }
1100 static inline void i801_del_mux(struct i801_priv *priv) { }
1101
1102 static inline unsigned int i801_get_adapter_class(struct i801_priv *priv)
1103 {
1104         return I2C_CLASS_HWMON | I2C_CLASS_SPD;
1105 }
1106 #endif
1107
1108 static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
1109 {
1110         unsigned char temp;
1111         int err, i;
1112         struct i801_priv *priv;
1113
1114         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1115         if (!priv)
1116                 return -ENOMEM;
1117
1118         i2c_set_adapdata(&priv->adapter, priv);
1119         priv->adapter.owner = THIS_MODULE;
1120         priv->adapter.class = i801_get_adapter_class(priv);
1121         priv->adapter.algo = &smbus_algorithm;
1122
1123         priv->pci_dev = dev;
1124         switch (dev->device) {
1125         case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
1126         case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
1127         case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
1128         case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0:
1129         case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1:
1130         case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2:
1131                 priv->features |= FEATURE_IDF;
1132                 /* fall through */
1133         default:
1134                 priv->features |= FEATURE_I2C_BLOCK_READ;
1135                 priv->features |= FEATURE_IRQ;
1136                 /* fall through */
1137         case PCI_DEVICE_ID_INTEL_82801DB_3:
1138                 priv->features |= FEATURE_SMBUS_PEC;
1139                 priv->features |= FEATURE_BLOCK_BUFFER;
1140                 /* fall through */
1141         case PCI_DEVICE_ID_INTEL_82801CA_3:
1142         case PCI_DEVICE_ID_INTEL_82801BA_2:
1143         case PCI_DEVICE_ID_INTEL_82801AB_3:
1144         case PCI_DEVICE_ID_INTEL_82801AA_3:
1145                 break;
1146         }
1147
1148         /* Disable features on user request */
1149         for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
1150                 if (priv->features & disable_features & (1 << i))
1151                         dev_notice(&dev->dev, "%s disabled by user\n",
1152                                    i801_feature_names[i]);
1153         }
1154         priv->features &= ~disable_features;
1155
1156         err = pci_enable_device(dev);
1157         if (err) {
1158                 dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
1159                         err);
1160                 goto exit;
1161         }
1162
1163         /* Determine the address of the SMBus area */
1164         priv->smba = pci_resource_start(dev, SMBBAR);
1165         if (!priv->smba) {
1166                 dev_err(&dev->dev, "SMBus base address uninitialized, "
1167                         "upgrade BIOS\n");
1168                 err = -ENODEV;
1169                 goto exit;
1170         }
1171
1172         err = acpi_check_resource_conflict(&dev->resource[SMBBAR]);
1173         if (err) {
1174                 err = -ENODEV;
1175                 goto exit;
1176         }
1177
1178         err = pci_request_region(dev, SMBBAR, i801_driver.name);
1179         if (err) {
1180                 dev_err(&dev->dev, "Failed to request SMBus region "
1181                         "0x%lx-0x%Lx\n", priv->smba,
1182                         (unsigned long long)pci_resource_end(dev, SMBBAR));
1183                 goto exit;
1184         }
1185
1186         pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp);
1187         priv->original_hstcfg = temp;
1188         temp &= ~SMBHSTCFG_I2C_EN;      /* SMBus timing */
1189         if (!(temp & SMBHSTCFG_HST_EN)) {
1190                 dev_info(&dev->dev, "Enabling SMBus device\n");
1191                 temp |= SMBHSTCFG_HST_EN;
1192         }
1193         pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp);
1194
1195         if (temp & SMBHSTCFG_SMB_SMI_EN) {
1196                 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
1197                 /* Disable SMBus interrupt feature if SMBus using SMI# */
1198                 priv->features &= ~FEATURE_IRQ;
1199         }
1200
1201         /* Clear special mode bits */
1202         if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
1203                 outb_p(inb_p(SMBAUXCTL(priv)) &
1204                        ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
1205
1206         if (priv->features & FEATURE_IRQ) {
1207                 init_waitqueue_head(&priv->waitq);
1208
1209                 err = request_irq(dev->irq, i801_isr, IRQF_SHARED,
1210                                   i801_driver.name, priv);
1211                 if (err) {
1212                         dev_err(&dev->dev, "Failed to allocate irq %d: %d\n",
1213                                 dev->irq, err);
1214                         goto exit_release;
1215                 }
1216                 dev_info(&dev->dev, "SMBus using PCI Interrupt\n");
1217         }
1218
1219         /* set up the sysfs linkage to our parent device */
1220         priv->adapter.dev.parent = &dev->dev;
1221
1222         /* Retry up to 3 times on lost arbitration */
1223         priv->adapter.retries = 3;
1224
1225         snprintf(priv->adapter.name, sizeof(priv->adapter.name),
1226                 "SMBus I801 adapter at %04lx", priv->smba);
1227         err = i2c_add_adapter(&priv->adapter);
1228         if (err) {
1229                 dev_err(&dev->dev, "Failed to add SMBus adapter\n");
1230                 goto exit_free_irq;
1231         }
1232
1233         of_i2c_register_devices(&priv->adapter);
1234         i801_probe_optional_slaves(priv);
1235         /* We ignore errors - multiplexing is optional */
1236         i801_add_mux(priv);
1237
1238         pci_set_drvdata(dev, priv);
1239
1240         return 0;
1241
1242 exit_free_irq:
1243         if (priv->features & FEATURE_IRQ)
1244                 free_irq(dev->irq, priv);
1245 exit_release:
1246         pci_release_region(dev, SMBBAR);
1247 exit:
1248         kfree(priv);
1249         return err;
1250 }
1251
1252 static void i801_remove(struct pci_dev *dev)
1253 {
1254         struct i801_priv *priv = pci_get_drvdata(dev);
1255
1256         i801_del_mux(priv);
1257         i2c_del_adapter(&priv->adapter);
1258         pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
1259
1260         if (priv->features & FEATURE_IRQ)
1261                 free_irq(dev->irq, priv);
1262         pci_release_region(dev, SMBBAR);
1263
1264         kfree(priv);
1265         /*
1266          * do not call pci_disable_device(dev) since it can cause hard hangs on
1267          * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
1268          */
1269 }
1270
1271 #ifdef CONFIG_PM
1272 static int i801_suspend(struct pci_dev *dev, pm_message_t mesg)
1273 {
1274         struct i801_priv *priv = pci_get_drvdata(dev);
1275
1276         pci_save_state(dev);
1277         pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
1278         pci_set_power_state(dev, pci_choose_state(dev, mesg));
1279         return 0;
1280 }
1281
1282 static int i801_resume(struct pci_dev *dev)
1283 {
1284         pci_set_power_state(dev, PCI_D0);
1285         pci_restore_state(dev);
1286         return pci_enable_device(dev);
1287 }
1288 #else
1289 #define i801_suspend NULL
1290 #define i801_resume NULL
1291 #endif
1292
1293 static struct pci_driver i801_driver = {
1294         .name           = "i801_smbus",
1295         .id_table       = i801_ids,
1296         .probe          = i801_probe,
1297         .remove         = i801_remove,
1298         .suspend        = i801_suspend,
1299         .resume         = i801_resume,
1300 };
1301
1302 static int __init i2c_i801_init(void)
1303 {
1304         if (dmi_name_in_vendors("FUJITSU"))
1305                 input_apanel_init();
1306         return pci_register_driver(&i801_driver);
1307 }
1308
1309 static void __exit i2c_i801_exit(void)
1310 {
1311         pci_unregister_driver(&i801_driver);
1312 }
1313
1314 MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, "
1315               "Jean Delvare <khali@linux-fr.org>");
1316 MODULE_DESCRIPTION("I801 SMBus driver");
1317 MODULE_LICENSE("GPL");
1318
1319 module_init(i2c_i801_init);
1320 module_exit(i2c_i801_exit);