1a60d70936052a2569da8b1c56be7a3aae2e183e
[cascardo/linux.git] / drivers / ide / pci / cmd640.c
1 /*
2  *  Copyright (C) 1995-1996  Linus Torvalds & authors (see below)
3  */
4
5 /*
6  *  Original authors:   abramov@cecmow.enet.dec.com (Igor Abramov)
7  *                      mlord@pobox.com (Mark Lord)
8  *
9  *  See linux/MAINTAINERS for address of current maintainer.
10  *
11  *  This file provides support for the advanced features and bugs
12  *  of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
13  *
14  *  These chips are basically fucked by design, and getting this driver
15  *  to work on every motherboard design that uses this screwed chip seems
16  *  bloody well impossible.  However, we're still trying.
17  *
18  *  Version 0.97 worked for everybody.
19  *
20  *  User feedback is essential.  Many thanks to the beta test team:
21  *
22  *  A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
23  *  bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
24  *  chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
25  *  derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
26  *  flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
27  *  j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
28  *  kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
29  *  peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
30  *  s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
31  *  steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
32  *  liug@mama.indstate.edu, and others.
33  *
34  *  Version 0.01        Initial version, hacked out of ide.c,
35  *                      and #include'd rather than compiled separately.
36  *                      This will get cleaned up in a subsequent release.
37  *
38  *  Version 0.02        Fixes for vlb initialization code, enable prefetch
39  *                      for versions 'B' and 'C' of chip by default,
40  *                      some code cleanup.
41  *
42  *  Version 0.03        Added reset of secondary interface,
43  *                      and black list for devices which are not compatible
44  *                      with prefetch mode. Separate function for setting
45  *                      prefetch is added, possibly it will be called some
46  *                      day from ioctl processing code.
47  *
48  *  Version 0.04        Now configs/compiles separate from ide.c
49  *
50  *  Version 0.05        Major rewrite of interface timing code.
51  *                      Added new function cmd640_set_mode to set PIO mode
52  *                      from ioctl call. New drives added to black list.
53  *
54  *  Version 0.06        More code cleanup. Prefetch is enabled only for
55  *                      detected hard drives, not included in prefetch
56  *                      black list.
57  *
58  *  Version 0.07        Changed to more conservative drive tuning policy.
59  *                      Unknown drives, which report PIO < 4 are set to
60  *                      (reported_PIO - 1) if it is supported, or to PIO0.
61  *                      List of known drives extended by info provided by
62  *                      CMD at their ftp site.
63  *
64  *  Version 0.08        Added autotune/noautotune support.
65  *
66  *  Version 0.09        Try to be smarter about 2nd port enabling.
67  *  Version 0.10        Be nice and don't reset 2nd port.
68  *  Version 0.11        Try to handle more weird situations.
69  *
70  *  Version 0.12        Lots of bug fixes from Laszlo Peter
71  *                      irq unmasking disabled for reliability.
72  *                      try to be even smarter about the second port.
73  *                      tidy up source code formatting.
74  *  Version 0.13        permit irq unmasking again.
75  *  Version 0.90        massive code cleanup, some bugs fixed.
76  *                      defaults all drives to PIO mode0, prefetch off.
77  *                      autotune is OFF by default, with compile time flag.
78  *                      prefetch can be turned OFF/ON using "hdparm -p8/-p9"
79  *                       (requires hdparm-3.1 or newer)
80  *  Version 0.91        first release to linux-kernel list.
81  *  Version 0.92        move initial reg dump to separate callable function
82  *                      change "readahead" to "prefetch" to avoid confusion
83  *  Version 0.95        respect original BIOS timings unless autotuning.
84  *                      tons of code cleanup and rearrangement.
85  *                      added CONFIG_BLK_DEV_CMD640_ENHANCED option
86  *                      prevent use of unmask when prefetch is on
87  *  Version 0.96        prevent use of io_32bit when prefetch is off
88  *  Version 0.97        fix VLB secondary interface for sjd@slip.net
89  *                      other minor tune-ups:  0.96 was very good.
90  *  Version 0.98        ignore PCI version when disabled by BIOS
91  *  Version 0.99        display setup/active/recovery clocks with PIO mode
92  *  Version 1.00        Mmm.. cannot depend on PCMD_ENA in all systems
93  *  Version 1.01        slow/fast devsel can be selected with "hdparm -p6/-p7"
94  *                       ("fast" is necessary for 32bit I/O in some systems)
95  *  Version 1.02        fix bug that resulted in slow "setup times"
96  *                       (patch courtesy of Zoltan Hidvegi)
97  */
98
99 #define CMD640_PREFETCH_MASKS 1
100
101 /*#define CMD640_DUMP_REGS */
102
103 #include <linux/types.h>
104 #include <linux/kernel.h>
105 #include <linux/delay.h>
106 #include <linux/hdreg.h>
107 #include <linux/ide.h>
108 #include <linux/init.h>
109
110 #include <asm/io.h>
111
112 #define DRV_NAME "cmd640"
113
114 /*
115  * This flag is set in ide.c by the parameter:  ide0=cmd640_vlb
116  */
117 int cmd640_vlb;
118
119 /*
120  * CMD640 specific registers definition.
121  */
122
123 #define VID             0x00
124 #define DID             0x02
125 #define PCMD            0x04
126 #define   PCMD_ENA      0x01
127 #define PSTTS           0x06
128 #define REVID           0x08
129 #define PROGIF          0x09
130 #define SUBCL           0x0a
131 #define BASCL           0x0b
132 #define BaseA0          0x10
133 #define BaseA1          0x14
134 #define BaseA2          0x18
135 #define BaseA3          0x1c
136 #define INTLINE         0x3c
137 #define INPINE          0x3d
138
139 #define CFR             0x50
140 #define   CFR_DEVREV            0x03
141 #define   CFR_IDE01INTR         0x04
142 #define   CFR_DEVID             0x18
143 #define   CFR_AT_VESA_078h      0x20
144 #define   CFR_DSA1              0x40
145 #define   CFR_DSA0              0x80
146
147 #define CNTRL           0x51
148 #define   CNTRL_DIS_RA0         0x40
149 #define   CNTRL_DIS_RA1         0x80
150 #define   CNTRL_ENA_2ND         0x08
151
152 #define CMDTIM          0x52
153 #define ARTTIM0         0x53
154 #define DRWTIM0         0x54
155 #define ARTTIM1         0x55
156 #define DRWTIM1         0x56
157 #define ARTTIM23        0x57
158 #define   ARTTIM23_DIS_RA2      0x04
159 #define   ARTTIM23_DIS_RA3      0x08
160 #define DRWTIM23        0x58
161 #define BRST            0x59
162
163 /*
164  * Registers and masks for easy access by drive index:
165  */
166 static u8 prefetch_regs[4]  = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
167 static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
168
169 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
170
171 static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
172 static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23};
173
174 /*
175  * Current cmd640 timing values for each drive.
176  * The defaults for each are the slowest possible timings.
177  */
178 static u8 setup_counts[4]    = {4, 4, 4, 4};     /* Address setup count (in clocks) */
179 static u8 active_counts[4]   = {16, 16, 16, 16}; /* Active count   (encoded) */
180 static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
181
182 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
183
184 static DEFINE_SPINLOCK(cmd640_lock);
185
186 /*
187  * These are initialized to point at the devices we control
188  */
189 static ide_hwif_t  *cmd_hwif0, *cmd_hwif1;
190
191 /*
192  * Interface to access cmd640x registers
193  */
194 static unsigned int cmd640_key;
195 static void (*__put_cmd640_reg)(u16 reg, u8 val);
196 static u8 (*__get_cmd640_reg)(u16 reg);
197
198 /*
199  * This is read from the CFR reg, and is used in several places.
200  */
201 static unsigned int cmd640_chip_version;
202
203 /*
204  * The CMD640x chip does not support DWORD config write cycles, but some
205  * of the BIOSes use them to implement the config services.
206  * Therefore, we must use direct IO instead.
207  */
208
209 /* PCI method 1 access */
210
211 static void put_cmd640_reg_pci1(u16 reg, u8 val)
212 {
213         outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
214         outb_p(val, (reg & 3) | 0xcfc);
215 }
216
217 static u8 get_cmd640_reg_pci1(u16 reg)
218 {
219         outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
220         return inb_p((reg & 3) | 0xcfc);
221 }
222
223 /* PCI method 2 access (from CMD datasheet) */
224
225 static void put_cmd640_reg_pci2(u16 reg, u8 val)
226 {
227         outb_p(0x10, 0xcf8);
228         outb_p(val, cmd640_key + reg);
229         outb_p(0, 0xcf8);
230 }
231
232 static u8 get_cmd640_reg_pci2(u16 reg)
233 {
234         u8 b;
235
236         outb_p(0x10, 0xcf8);
237         b = inb_p(cmd640_key + reg);
238         outb_p(0, 0xcf8);
239         return b;
240 }
241
242 /* VLB access */
243
244 static void put_cmd640_reg_vlb(u16 reg, u8 val)
245 {
246         outb_p(reg, cmd640_key);
247         outb_p(val, cmd640_key + 4);
248 }
249
250 static u8 get_cmd640_reg_vlb(u16 reg)
251 {
252         outb_p(reg, cmd640_key);
253         return inb_p(cmd640_key + 4);
254 }
255
256 static u8 get_cmd640_reg(u16 reg)
257 {
258         unsigned long flags;
259         u8 b;
260
261         spin_lock_irqsave(&cmd640_lock, flags);
262         b = __get_cmd640_reg(reg);
263         spin_unlock_irqrestore(&cmd640_lock, flags);
264         return b;
265 }
266
267 static void put_cmd640_reg(u16 reg, u8 val)
268 {
269         unsigned long flags;
270
271         spin_lock_irqsave(&cmd640_lock, flags);
272         __put_cmd640_reg(reg, val);
273         spin_unlock_irqrestore(&cmd640_lock, flags);
274 }
275
276 static int __init match_pci_cmd640_device(void)
277 {
278         const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06};
279         unsigned int i;
280         for (i = 0; i < 4; i++) {
281                 if (get_cmd640_reg(i) != ven_dev[i])
282                         return 0;
283         }
284 #ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
285         if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {
286                 printk("ide: cmd640 on PCI disabled by BIOS\n");
287                 return 0;
288         }
289 #endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
290         return 1; /* success */
291 }
292
293 /*
294  * Probe for CMD640x -- pci method 1
295  */
296 static int __init probe_for_cmd640_pci1(void)
297 {
298         __get_cmd640_reg = get_cmd640_reg_pci1;
299         __put_cmd640_reg = put_cmd640_reg_pci1;
300         for (cmd640_key = 0x80000000;
301              cmd640_key <= 0x8000f800;
302              cmd640_key += 0x800) {
303                 if (match_pci_cmd640_device())
304                         return 1; /* success */
305         }
306         return 0;
307 }
308
309 /*
310  * Probe for CMD640x -- pci method 2
311  */
312 static int __init probe_for_cmd640_pci2(void)
313 {
314         __get_cmd640_reg = get_cmd640_reg_pci2;
315         __put_cmd640_reg = put_cmd640_reg_pci2;
316         for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {
317                 if (match_pci_cmd640_device())
318                         return 1; /* success */
319         }
320         return 0;
321 }
322
323 /*
324  * Probe for CMD640x -- vlb
325  */
326 static int __init probe_for_cmd640_vlb(void)
327 {
328         u8 b;
329
330         __get_cmd640_reg = get_cmd640_reg_vlb;
331         __put_cmd640_reg = put_cmd640_reg_vlb;
332         cmd640_key = 0x178;
333         b = get_cmd640_reg(CFR);
334         if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) {
335                 cmd640_key = 0x78;
336                 b = get_cmd640_reg(CFR);
337                 if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h))
338                         return 0;
339         }
340         return 1; /* success */
341 }
342
343 /*
344  *  Returns 1 if an IDE interface/drive exists at 0x170,
345  *  Returns 0 otherwise.
346  */
347 static int __init secondary_port_responding(void)
348 {
349         unsigned long flags;
350
351         spin_lock_irqsave(&cmd640_lock, flags);
352
353         outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET);        /* select drive0 */
354         udelay(100);
355         if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x0a) {
356                 outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */
357                 udelay(100);
358                 if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) {
359                         spin_unlock_irqrestore(&cmd640_lock, flags);
360                         return 0; /* nothing responded */
361                 }
362         }
363         spin_unlock_irqrestore(&cmd640_lock, flags);
364         return 1; /* success */
365 }
366
367 #ifdef CMD640_DUMP_REGS
368 /*
369  * Dump out all cmd640 registers.  May be called from ide.c
370  */
371 static void cmd640_dump_regs(void)
372 {
373         unsigned int reg = cmd640_vlb ? 0x50 : 0x00;
374
375         /* Dump current state of chip registers */
376         printk("ide: cmd640 internal register dump:");
377         for (; reg <= 0x59; reg++) {
378                 if (!(reg & 0x0f))
379                         printk("\n%04x:", reg);
380                 printk(" %02x", get_cmd640_reg(reg));
381         }
382         printk("\n");
383 }
384 #endif
385
386 /*
387  * Check whether prefetch is on for a drive,
388  * and initialize the unmask flags for safe operation.
389  */
390 static void __init check_prefetch(ide_drive_t *drive, unsigned int index)
391 {
392         u8 b = get_cmd640_reg(prefetch_regs[index]);
393
394         if (b & prefetch_masks[index]) {        /* is prefetch off? */
395                 drive->no_unmask = 0;
396                 drive->no_io_32bit = 1;
397                 drive->io_32bit = 0;
398         } else {
399 #if CMD640_PREFETCH_MASKS
400                 drive->no_unmask = 1;
401                 drive->unmask = 0;
402 #endif
403                 drive->no_io_32bit = 0;
404         }
405 }
406
407 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
408
409 /*
410  * Sets prefetch mode for a drive.
411  */
412 static void set_prefetch_mode(ide_drive_t *drive, unsigned int index, int mode)
413 {
414         unsigned long flags;
415         int reg = prefetch_regs[index];
416         u8 b;
417
418         spin_lock_irqsave(&cmd640_lock, flags);
419         b = __get_cmd640_reg(reg);
420         if (mode) {     /* want prefetch on? */
421 #if CMD640_PREFETCH_MASKS
422                 drive->no_unmask = 1;
423                 drive->unmask = 0;
424 #endif
425                 drive->no_io_32bit = 0;
426                 b &= ~prefetch_masks[index];    /* enable prefetch */
427         } else {
428                 drive->no_unmask = 0;
429                 drive->no_io_32bit = 1;
430                 drive->io_32bit = 0;
431                 b |= prefetch_masks[index];     /* disable prefetch */
432         }
433         __put_cmd640_reg(reg, b);
434         spin_unlock_irqrestore(&cmd640_lock, flags);
435 }
436
437 /*
438  * Dump out current drive clocks settings
439  */
440 static void display_clocks(unsigned int index)
441 {
442         u8 active_count, recovery_count;
443
444         active_count = active_counts[index];
445         if (active_count == 1)
446                 ++active_count;
447         recovery_count = recovery_counts[index];
448         if (active_count > 3 && recovery_count == 1)
449                 ++recovery_count;
450         if (cmd640_chip_version > 1)
451                 recovery_count += 1;  /* cmd640b uses (count + 1)*/
452         printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count);
453 }
454
455 /*
456  * Pack active and recovery counts into single byte representation
457  * used by controller
458  */
459 static inline u8 pack_nibbles(u8 upper, u8 lower)
460 {
461         return ((upper & 0x0f) << 4) | (lower & 0x0f);
462 }
463
464 /*
465  * This routine retrieves the initial drive timings from the chipset.
466  */
467 static void __init retrieve_drive_counts(unsigned int index)
468 {
469         u8 b;
470
471         /*
472          * Get the internal setup timing, and convert to clock count
473          */
474         b = get_cmd640_reg(arttim_regs[index]) & ~0x3f;
475         switch (b) {
476         case 0x00: b = 4; break;
477         case 0x80: b = 3; break;
478         case 0x40: b = 2; break;
479         default:   b = 5; break;
480         }
481         setup_counts[index] = b;
482
483         /*
484          * Get the active/recovery counts
485          */
486         b = get_cmd640_reg(drwtim_regs[index]);
487         active_counts[index]   = (b >> 4)   ? (b >> 4)   : 0x10;
488         recovery_counts[index] = (b & 0x0f) ? (b & 0x0f) : 0x10;
489 }
490
491
492 /*
493  * This routine writes the prepared setup/active/recovery counts
494  * for a drive into the cmd640 chipset registers to active them.
495  */
496 static void program_drive_counts(ide_drive_t *drive, unsigned int index)
497 {
498         unsigned long flags;
499         u8 setup_count    = setup_counts[index];
500         u8 active_count   = active_counts[index];
501         u8 recovery_count = recovery_counts[index];
502
503         /*
504          * Set up address setup count and drive read/write timing registers.
505          * Primary interface has individual count/timing registers for
506          * each drive.  Secondary interface has one common set of registers,
507          * so we merge the timings, using the slowest value for each timing.
508          */
509         if (index > 1) {
510                 ide_hwif_t *hwif = drive->hwif;
511                 ide_drive_t *peer = &hwif->drives[!drive->select.b.unit];
512                 unsigned int mate = index ^ 1;
513
514                 if (peer->present) {
515                         if (setup_count < setup_counts[mate])
516                                 setup_count = setup_counts[mate];
517                         if (active_count < active_counts[mate])
518                                 active_count = active_counts[mate];
519                         if (recovery_count < recovery_counts[mate])
520                                 recovery_count = recovery_counts[mate];
521                 }
522         }
523
524         /*
525          * Convert setup_count to internal chipset representation
526          */
527         switch (setup_count) {
528         case 4:  setup_count = 0x00; break;
529         case 3:  setup_count = 0x80; break;
530         case 1:
531         case 2:  setup_count = 0x40; break;
532         default: setup_count = 0xc0; /* case 5 */
533         }
534
535         /*
536          * Now that everything is ready, program the new timings
537          */
538         spin_lock_irqsave(&cmd640_lock, flags);
539         /*
540          * Program the address_setup clocks into ARTTIM reg,
541          * and then the active/recovery counts into the DRWTIM reg
542          * (this converts counts of 16 into counts of zero -- okay).
543          */
544         setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f;
545         __put_cmd640_reg(arttim_regs[index], setup_count);
546         __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
547         spin_unlock_irqrestore(&cmd640_lock, flags);
548 }
549
550 /*
551  * Set a specific pio_mode for a drive
552  */
553 static void cmd640_set_mode(ide_drive_t *drive, unsigned int index,
554                             u8 pio_mode, unsigned int cycle_time)
555 {
556         int setup_time, active_time, recovery_time, clock_time;
557         u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
558         int bus_speed = system_bus_clock();
559
560         if (pio_mode > 5)
561                 pio_mode = 5;
562         setup_time  = ide_pio_timings[pio_mode].setup_time;
563         active_time = ide_pio_timings[pio_mode].active_time;
564         recovery_time = cycle_time - (setup_time + active_time);
565         clock_time = 1000 / bus_speed;
566         cycle_count = DIV_ROUND_UP(cycle_time, clock_time);
567
568         setup_count = DIV_ROUND_UP(setup_time, clock_time);
569
570         active_count = DIV_ROUND_UP(active_time, clock_time);
571         if (active_count < 2)
572                 active_count = 2; /* minimum allowed by cmd640 */
573
574         recovery_count = DIV_ROUND_UP(recovery_time, clock_time);
575         recovery_count2 = cycle_count - (setup_count + active_count);
576         if (recovery_count2 > recovery_count)
577                 recovery_count = recovery_count2;
578         if (recovery_count < 2)
579                 recovery_count = 2; /* minimum allowed by cmd640 */
580         if (recovery_count > 17) {
581                 active_count += recovery_count - 17;
582                 recovery_count = 17;
583         }
584         if (active_count > 16)
585                 active_count = 16; /* maximum allowed by cmd640 */
586         if (cmd640_chip_version > 1)
587                 recovery_count -= 1;  /* cmd640b uses (count + 1)*/
588         if (recovery_count > 16)
589                 recovery_count = 16; /* maximum allowed by cmd640 */
590
591         setup_counts[index]    = setup_count;
592         active_counts[index]   = active_count;
593         recovery_counts[index] = recovery_count;
594
595         /*
596          * In a perfect world, we might set the drive pio mode here
597          * (using WIN_SETFEATURE) before continuing.
598          *
599          * But we do not, because:
600          *      1) this is the wrong place to do it (proper is do_special() in ide.c)
601          *      2) in practice this is rarely, if ever, necessary
602          */
603         program_drive_counts(drive, index);
604 }
605
606 static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
607 {
608         unsigned int index = 0, cycle_time;
609         u8 b;
610
611         switch (pio) {
612         case 6: /* set fast-devsel off */
613         case 7: /* set fast-devsel on */
614                 b = get_cmd640_reg(CNTRL) & ~0x27;
615                 if (pio & 1)
616                         b |= 0x27;
617                 put_cmd640_reg(CNTRL, b);
618                 printk("%s: %sabled cmd640 fast host timing (devsel)\n",
619                         drive->name, (pio & 1) ? "en" : "dis");
620                 return;
621         case 8: /* set prefetch off */
622         case 9: /* set prefetch on */
623                 set_prefetch_mode(drive, index, pio & 1);
624                 printk("%s: %sabled cmd640 prefetch\n",
625                         drive->name, (pio & 1) ? "en" : "dis");
626                 return;
627         }
628
629         cycle_time = ide_pio_cycle_time(drive, pio);
630         cmd640_set_mode(drive, index, pio, cycle_time);
631
632         printk("%s: selected cmd640 PIO mode%d (%dns)",
633                 drive->name, pio, cycle_time);
634
635         display_clocks(index);
636 }
637
638 static const struct ide_port_ops cmd640_port_ops = {
639         .set_pio_mode           = cmd640_set_pio_mode,
640 };
641 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
642
643 static int pci_conf1(void)
644 {
645         unsigned long flags;
646         u32 tmp;
647
648         spin_lock_irqsave(&cmd640_lock, flags);
649         outb(0x01, 0xCFB);
650         tmp = inl(0xCF8);
651         outl(0x80000000, 0xCF8);
652         if (inl(0xCF8) == 0x80000000) {
653                 outl(tmp, 0xCF8);
654                 spin_unlock_irqrestore(&cmd640_lock, flags);
655                 return 1;
656         }
657         outl(tmp, 0xCF8);
658         spin_unlock_irqrestore(&cmd640_lock, flags);
659         return 0;
660 }
661
662 static int pci_conf2(void)
663 {
664         unsigned long flags;
665
666         spin_lock_irqsave(&cmd640_lock, flags);
667         outb(0x00, 0xCFB);
668         outb(0x00, 0xCF8);
669         outb(0x00, 0xCFA);
670         if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
671                 spin_unlock_irqrestore(&cmd640_lock, flags);
672                 return 1;
673         }
674         spin_unlock_irqrestore(&cmd640_lock, flags);
675         return 0;
676 }
677
678 static const struct ide_port_info cmd640_port_info __initdata = {
679         .chipset                = ide_cmd640,
680         .host_flags             = IDE_HFLAG_SERIALIZE |
681                                   IDE_HFLAG_NO_DMA |
682                                   IDE_HFLAG_NO_AUTOTUNE |
683                                   IDE_HFLAG_ABUSE_PREFETCH |
684                                   IDE_HFLAG_ABUSE_FAST_DEVSEL,
685 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
686         .port_ops               = &cmd640_port_ops,
687         .pio_mask               = ATA_PIO5,
688 #endif
689 };
690
691 static int cmd640x_init_one(unsigned long base, unsigned long ctl)
692 {
693         if (!request_region(base, 8, DRV_NAME)) {
694                 printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n",
695                                 DRV_NAME, base, base + 7);
696                 return -EBUSY;
697         }
698
699         if (!request_region(ctl, 1, DRV_NAME)) {
700                 printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n",
701                                 DRV_NAME, ctl);
702                 release_region(base, 8);
703                 return -EBUSY;
704         }
705
706         return 0;
707 }
708
709 /*
710  * Probe for a cmd640 chipset, and initialize it if found.
711  */
712 static int __init cmd640x_init(void)
713 {
714 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
715         int second_port_toggled = 0;
716 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
717         int second_port_cmd640 = 0, rc;
718         const char *bus_type, *port2;
719         unsigned int index;
720         u8 b, cfr;
721         u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
722         hw_regs_t hw[2];
723
724         if (cmd640_vlb && probe_for_cmd640_vlb()) {
725                 bus_type = "VLB";
726         } else {
727                 cmd640_vlb = 0;
728                 /* Find out what kind of PCI probing is supported otherwise
729                    Justin Gibbs will sulk.. */
730                 if (pci_conf1() && probe_for_cmd640_pci1())
731                         bus_type = "PCI (type1)";
732                 else if (pci_conf2() && probe_for_cmd640_pci2())
733                         bus_type = "PCI (type2)";
734                 else
735                         return 0;
736         }
737         /*
738          * Undocumented magic (there is no 0x5b reg in specs)
739          */
740         put_cmd640_reg(0x5b, 0xbd);
741         if (get_cmd640_reg(0x5b) != 0xbd) {
742                 printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");
743                 return 0;
744         }
745         put_cmd640_reg(0x5b, 0);
746
747 #ifdef CMD640_DUMP_REGS
748         cmd640_dump_regs();
749 #endif
750
751         /*
752          * Documented magic begins here
753          */
754         cfr = get_cmd640_reg(CFR);
755         cmd640_chip_version = cfr & CFR_DEVREV;
756         if (cmd640_chip_version == 0) {
757                 printk("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
758                 return 0;
759         }
760
761         rc = cmd640x_init_one(0x1f0, 0x3f6);
762         if (rc)
763                 return rc;
764
765         rc = cmd640x_init_one(0x170, 0x376);
766         if (rc) {
767                 release_region(0x3f6, 1);
768                 release_region(0x1f0, 8);
769                 return rc;
770         }
771
772         memset(&hw, 0, sizeof(hw));
773
774         ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
775         hw[0].irq = 14;
776
777         ide_std_init_ports(&hw[1], 0x170, 0x376);
778         hw[1].irq = 15;
779
780         printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x"
781                          "\n", 'a' + cmd640_chip_version - 1, bus_type, cfr);
782
783         cmd_hwif0 = ide_find_port();
784
785         /*
786          * Initialize data for primary port
787          */
788         if (cmd_hwif0) {
789                 ide_init_port_hw(cmd_hwif0, &hw[0]);
790                 cmd_hwif0->mmio = 1;
791                 idx[0] = cmd_hwif0->index;
792         }
793
794         /*
795          * Ensure compatibility by always using the slowest timings
796          * for access to the drive's command register block,
797          * and reset the prefetch burstsize to default (512 bytes).
798          *
799          * Maybe we need a way to NOT do these on *some* systems?
800          */
801         put_cmd640_reg(CMDTIM, 0);
802         put_cmd640_reg(BRST, 0x40);
803
804         cmd_hwif1 = ide_find_port();
805
806         /*
807          * Try to enable the secondary interface, if not already enabled
808          */
809         if (cmd_hwif1 &&
810             cmd_hwif1->drives[0].noprobe && cmd_hwif1->drives[1].noprobe) {
811                 port2 = "not probed";
812         } else {
813                 b = get_cmd640_reg(CNTRL);
814                 if (secondary_port_responding()) {
815                         if ((b & CNTRL_ENA_2ND)) {
816                                 second_port_cmd640 = 1;
817                                 port2 = "okay";
818                         } else if (cmd640_vlb) {
819                                 second_port_cmd640 = 1;
820                                 port2 = "alive";
821                         } else
822                                 port2 = "not cmd640";
823                 } else {
824                         put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */
825                         if (secondary_port_responding()) {
826                                 second_port_cmd640 = 1;
827 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
828                                 second_port_toggled = 1;
829 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
830                                 port2 = "enabled";
831                         } else {
832                                 put_cmd640_reg(CNTRL, b); /* restore original setting */
833                                 port2 = "not responding";
834                         }
835                 }
836         }
837
838         /*
839          * Initialize data for secondary cmd640 port, if enabled
840          */
841         if (second_port_cmd640 && cmd_hwif1) {
842                 ide_init_port_hw(cmd_hwif1, &hw[1]);
843                 cmd_hwif1->mmio = 1;
844                 idx[1] = cmd_hwif1->index;
845         }
846         printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n",
847                          second_port_cmd640 ? "" : "not ", port2);
848
849         /*
850          * Establish initial timings/prefetch for all drives.
851          * Do not unnecessarily disturb any prior BIOS setup of these.
852          */
853         for (index = 0; index < (2 + (second_port_cmd640 << 1)); index++) {
854                 ide_drive_t *drive;
855
856                 if (index > 1) {
857                         if (cmd_hwif1 == NULL)
858                                 continue;
859                         drive = &cmd_hwif1->drives[index & 1];
860                 } else  {
861                         if (cmd_hwif0 == NULL)
862                                 continue;
863                         drive = &cmd_hwif0->drives[index & 1];
864                 }
865
866 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
867                 if (drive->autotune || ((index > 1) && second_port_toggled)) {
868                         /*
869                          * Reset timing to the slowest speed and turn off
870                          * prefetch.  This way, the drive identify code has
871                          * a better chance.
872                          */
873                         setup_counts    [index] = 4;    /* max possible */
874                         active_counts   [index] = 16;   /* max possible */
875                         recovery_counts [index] = 16;   /* max possible */
876                         program_drive_counts(drive, index);
877                         set_prefetch_mode(drive, index, 0);
878                         printk("cmd640: drive%d timings/prefetch cleared\n", index);
879                 } else {
880                         /*
881                          * Record timings/prefetch without changing them.
882                          * This preserves any prior BIOS setup.
883                          */
884                         retrieve_drive_counts (index);
885                         check_prefetch(drive, index);
886                         printk("cmd640: drive%d timings/prefetch(%s) preserved",
887                                 index, drive->no_io_32bit ? "off" : "on");
888                         display_clocks(index);
889                 }
890 #else
891                 /*
892                  * Set the drive unmask flags to match the prefetch setting
893                  */
894                 check_prefetch(drive, index);
895                 printk("cmd640: drive%d timings/prefetch(%s) preserved\n",
896                         index, drive->no_io_32bit ? "off" : "on");
897 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
898         }
899
900 #ifdef CMD640_DUMP_REGS
901         cmd640_dump_regs();
902 #endif
903
904         ide_device_add(idx, &cmd640_port_info);
905
906         return 1;
907 }
908
909 module_param_named(probe_vlb, cmd640_vlb, bool, 0);
910 MODULE_PARM_DESC(probe_vlb, "probe for VLB version of CMD640 chipset");
911
912 module_init(cmd640x_init);
913
914 MODULE_LICENSE("GPL");