drivers/iio/adc/ti-ads1015.c

   1 /*
   2  * ADS1015 - Texas Instruments Analog-to-Digital Converter
   3  *
   4  * Copyright (c) 2016, Intel Corporation.
   5  *
   6  * This file is subject to the terms and conditions of version 2 of
   7  * the GNU General Public License.  See the file COPYING in the main
   8  * directory of this archive for more details.
   9  *
  10  * IIO driver for ADS1015 ADC 7-bit I2C slave address:
  11  *      * 0x48 - ADDR connected to Ground
  12  *      * 0x49 - ADDR connected to Vdd
  13  *      * 0x4A - ADDR connected to SDA
  14  *      * 0x4B - ADDR connected to SCL
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/init.h>
  19 #include <linux/i2c.h>
  20 #include <linux/regmap.h>
  21 #include <linux/pm_runtime.h>
  22 #include <linux/mutex.h>
  23 #include <linux/delay.h>
  24
  25 #include <linux/i2c/ads1015.h>
  26
  27 #include <linux/iio/iio.h>
  28 #include <linux/iio/types.h>
  29 #include <linux/iio/sysfs.h>
  30 #include <linux/iio/buffer.h>
  31 #include <linux/iio/triggered_buffer.h>
  32 #include <linux/iio/trigger_consumer.h>
  33
  34 #define ADS1015_DRV_NAME "ads1015"
  35
  36 #define ADS1015_CONV_REG        0x00
  37 #define ADS1015_CFG_REG         0x01
  38
  39 #define ADS1015_CFG_DR_SHIFT    5
  40 #define ADS1015_CFG_MOD_SHIFT   8
  41 #define ADS1015_CFG_PGA_SHIFT   9
  42 #define ADS1015_CFG_MUX_SHIFT   12
  43
  44 #define ADS1015_CFG_DR_MASK     GENMASK(7, 5)
  45 #define ADS1015_CFG_MOD_MASK    BIT(8)
  46 #define ADS1015_CFG_PGA_MASK    GENMASK(11, 9)
  47 #define ADS1015_CFG_MUX_MASK    GENMASK(14, 12)
  48
  49 /* device operating modes */
  50 #define ADS1015_CONTINUOUS      0
  51 #define ADS1015_SINGLESHOT      1
  52
  53 #define ADS1015_SLEEP_DELAY_MS          2000
  54 #define ADS1015_DEFAULT_PGA             2
  55 #define ADS1015_DEFAULT_DATA_RATE       4
  56 #define ADS1015_DEFAULT_CHAN            0
  57
  58 enum {
  59         ADS1015,
  60         ADS1115,
  61 };
  62
  63 enum ads1015_channels {
  64         ADS1015_AIN0_AIN1 = 0,
  65         ADS1015_AIN0_AIN3,
  66         ADS1015_AIN1_AIN3,
  67         ADS1015_AIN2_AIN3,
  68         ADS1015_AIN0,
  69         ADS1015_AIN1,
  70         ADS1015_AIN2,
  71         ADS1015_AIN3,
  72         ADS1015_TIMESTAMP,
  73 };
  74
  75 static const unsigned int ads1015_data_rate[] = {
  76         128, 250, 490, 920, 1600, 2400, 3300, 3300
  77 };
  78
  79 static const unsigned int ads1115_data_rate[] = {
  80         8, 16, 32, 64, 128, 250, 475, 860
  81 };
  82
  83 static const struct {
  84         int scale;
  85         int uscale;
  86 } ads1015_scale[] = {
  87         {3, 0},
  88         {2, 0},
  89         {1, 0},
  90         {0, 500000},
  91         {0, 250000},
  92         {0, 125000},
  93         {0, 125000},
  94         {0, 125000},
  95 };
  96
  97 #define ADS1015_V_CHAN(_chan, _addr) {                          \
  98         .type = IIO_VOLTAGE,                                    \
  99         .indexed = 1,                                           \
 100         .address = _addr,                                       \
 101         .channel = _chan,                                       \
 102         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 103                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 104                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 105         .scan_index = _addr,                                    \
 106         .scan_type = {                                          \
 107                 .sign = 's',                                    \
 108                 .realbits = 12,                                 \
 109                 .storagebits = 16,                              \
 110                 .shift = 4,                                     \
 111                 .endianness = IIO_CPU,                          \
 112         },                                                      \
 113         .datasheet_name = "AIN"#_chan,                          \
 114 }
 115
 116 #define ADS1015_V_DIFF_CHAN(_chan, _chan2, _addr) {             \
 117         .type = IIO_VOLTAGE,                                    \
 118         .differential = 1,                                      \
 119         .indexed = 1,                                           \
 120         .address = _addr,                                       \
 121         .channel = _chan,                                       \
 122         .channel2 = _chan2,                                     \
 123         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 124                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 125                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 126         .scan_index = _addr,                                    \
 127         .scan_type = {                                          \
 128                 .sign = 's',                                    \
 129                 .realbits = 12,                                 \
 130                 .storagebits = 16,                              \
 131                 .shift = 4,                                     \
 132                 .endianness = IIO_CPU,                          \
 133         },                                                      \
 134         .datasheet_name = "AIN"#_chan"-AIN"#_chan2,             \
 135 }
 136
 137 #define ADS1115_V_CHAN(_chan, _addr) {                          \
 138         .type = IIO_VOLTAGE,                                    \
 139         .indexed = 1,                                           \
 140         .address = _addr,                                       \
 141         .channel = _chan,                                       \
 142         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 143                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 144                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 145         .scan_index = _addr,                                    \
 146         .scan_type = {                                          \
 147                 .sign = 's',                                    \
 148                 .realbits = 16,                                 \
 149                 .storagebits = 16,                              \
 150                 .endianness = IIO_CPU,                          \
 151         },                                                      \
 152         .datasheet_name = "AIN"#_chan,                          \
 153 }
 154
 155 #define ADS1115_V_DIFF_CHAN(_chan, _chan2, _addr) {             \
 156         .type = IIO_VOLTAGE,                                    \
 157         .differential = 1,                                      \
 158         .indexed = 1,                                           \
 159         .address = _addr,                                       \
 160         .channel = _chan,                                       \
 161         .channel2 = _chan2,                                     \
 162         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 163                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 164                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 165         .scan_index = _addr,                                    \
 166         .scan_type = {                                          \
 167                 .sign = 's',                                    \
 168                 .realbits = 16,                                 \
 169                 .storagebits = 16,                              \
 170                 .endianness = IIO_CPU,                          \
 171         },                                                      \
 172         .datasheet_name = "AIN"#_chan"-AIN"#_chan2,             \
 173 }
 174
 175 struct ads1015_data {
 176         struct regmap *regmap;
 177         /*
 178          * Protects ADC ops, e.g: concurrent sysfs/buffered
 179          * data reads, configuration updates
 180          */
 181         struct mutex lock;
 182         struct ads1015_channel_data channel_data[ADS1015_CHANNELS];
 183
 184         unsigned int *data_rate;
 185 };
 186
 187 static bool ads1015_is_writeable_reg(struct device *dev, unsigned int reg)
 188 {
 189         return (reg == ADS1015_CFG_REG);
 190 }
 191
 192 static const struct regmap_config ads1015_regmap_config = {
 193         .reg_bits = 8,
 194         .val_bits = 16,
 195         .max_register = ADS1015_CFG_REG,
 196         .writeable_reg = ads1015_is_writeable_reg,
 197 };
 198
 199 static const struct iio_chan_spec ads1015_channels[] = {
 200         ADS1015_V_DIFF_CHAN(0, 1, ADS1015_AIN0_AIN1),
 201         ADS1015_V_DIFF_CHAN(0, 3, ADS1015_AIN0_AIN3),
 202         ADS1015_V_DIFF_CHAN(1, 3, ADS1015_AIN1_AIN3),
 203         ADS1015_V_DIFF_CHAN(2, 3, ADS1015_AIN2_AIN3),
 204         ADS1015_V_CHAN(0, ADS1015_AIN0),
 205         ADS1015_V_CHAN(1, ADS1015_AIN1),
 206         ADS1015_V_CHAN(2, ADS1015_AIN2),
 207         ADS1015_V_CHAN(3, ADS1015_AIN3),
 208         IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
 209 };
 210
 211 static const struct iio_chan_spec ads1115_channels[] = {
 212         ADS1115_V_DIFF_CHAN(0, 1, ADS1015_AIN0_AIN1),
 213         ADS1115_V_DIFF_CHAN(0, 3, ADS1015_AIN0_AIN3),
 214         ADS1115_V_DIFF_CHAN(1, 3, ADS1015_AIN1_AIN3),
 215         ADS1115_V_DIFF_CHAN(2, 3, ADS1015_AIN2_AIN3),
 216         ADS1115_V_CHAN(0, ADS1015_AIN0),
 217         ADS1115_V_CHAN(1, ADS1015_AIN1),
 218         ADS1115_V_CHAN(2, ADS1015_AIN2),
 219         ADS1115_V_CHAN(3, ADS1015_AIN3),
 220         IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
 221 };
 222
 223 static int ads1015_set_power_state(struct ads1015_data *data, bool on)
 224 {
 225         int ret;
 226         struct device *dev = regmap_get_device(data->regmap);
 227
 228         if (on) {
 229                 ret = pm_runtime_get_sync(dev);
 230                 if (ret < 0)
 231                         pm_runtime_put_noidle(dev);
 232         } else {
 233                 pm_runtime_mark_last_busy(dev);
 234                 ret = pm_runtime_put_autosuspend(dev);
 235         }
 236
 237         return ret;
 238 }
 239
 240 static
 241 int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
 242 {
 243         int ret, pga, dr, conv_time;
 244         bool change;
 245
 246         if (chan < 0 || chan >= ADS1015_CHANNELS)
 247                 return -EINVAL;
 248
 249         pga = data->channel_data[chan].pga;
 250         dr = data->channel_data[chan].data_rate;
 251
 252         ret = regmap_update_bits_check(data->regmap, ADS1015_CFG_REG,
 253                                        ADS1015_CFG_MUX_MASK |
 254                                        ADS1015_CFG_PGA_MASK,
 255                                        chan << ADS1015_CFG_MUX_SHIFT |
 256                                        pga << ADS1015_CFG_PGA_SHIFT,
 257                                        &change);
 258         if (ret < 0)
 259                 return ret;
 260
 261         if (change) {
 262                 conv_time = DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr]);
 263                 usleep_range(conv_time, conv_time + 1);
 264         }
 265
 266         return regmap_read(data->regmap, ADS1015_CONV_REG, val);
 267 }
 268
 269 static irqreturn_t ads1015_trigger_handler(int irq, void *p)
 270 {
 271         struct iio_poll_func *pf = p;
 272         struct iio_dev *indio_dev = pf->indio_dev;
 273         struct ads1015_data *data = iio_priv(indio_dev);
 274         s16 buf[8]; /* 1x s16 ADC val + 3x s16 padding +  4x s16 timestamp */
 275         int chan, ret, res;
 276
 277         memset(buf, 0, sizeof(buf));
 278
 279         mutex_lock(&data->lock);
 280         chan = find_first_bit(indio_dev->active_scan_mask,
 281                               indio_dev->masklength);
 282         ret = ads1015_get_adc_result(data, chan, &res);
 283         if (ret < 0) {
 284                 mutex_unlock(&data->lock);
 285                 goto err;
 286         }
 287
 288         buf[0] = res;
 289         mutex_unlock(&data->lock);
 290
 291         iio_push_to_buffers_with_timestamp(indio_dev, buf, iio_get_time_ns());
 292
 293 err:
 294         iio_trigger_notify_done(indio_dev->trig);
 295
 296         return IRQ_HANDLED;
 297 }
 298
 299 static int ads1015_set_scale(struct ads1015_data *data, int chan,
 300                              int scale, int uscale)
 301 {
 302         int i, ret, rindex = -1;
 303
 304         for (i = 0; i < ARRAY_SIZE(ads1015_scale); i++)
 305                 if (ads1015_scale[i].scale == scale &&
 306                     ads1015_scale[i].uscale == uscale) {
 307                         rindex = i;
 308                         break;
 309                 }
 310         if (rindex < 0)
 311                 return -EINVAL;
 312
 313         ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 314                                  ADS1015_CFG_PGA_MASK,
 315                                  rindex << ADS1015_CFG_PGA_SHIFT);
 316         if (ret < 0)
 317                 return ret;
 318
 319         data->channel_data[chan].pga = rindex;
 320
 321         return 0;
 322 }
 323
 324 static int ads1015_set_data_rate(struct ads1015_data *data, int chan, int rate)
 325 {
 326         int i, ret, rindex = -1;
 327
 328         for (i = 0; i < ARRAY_SIZE(ads1015_data_rate); i++)
 329                 if (data->data_rate[i] == rate) {
 330                         rindex = i;
 331                         break;
 332                 }
 333         if (rindex < 0)
 334                 return -EINVAL;
 335
 336         ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 337                                  ADS1015_CFG_DR_MASK,
 338                                  rindex << ADS1015_CFG_DR_SHIFT);
 339         if (ret < 0)
 340                 return ret;
 341
 342         data->channel_data[chan].data_rate = rindex;
 343
 344         return 0;
 345 }
 346
 347 static int ads1015_read_raw(struct iio_dev *indio_dev,
 348                             struct iio_chan_spec const *chan, int *val,
 349                             int *val2, long mask)
 350 {
 351         int ret, idx;
 352         struct ads1015_data *data = iio_priv(indio_dev);
 353
 354         mutex_lock(&indio_dev->mlock);
 355         mutex_lock(&data->lock);
 356         switch (mask) {
 357         case IIO_CHAN_INFO_RAW: {
 358                 int shift = chan->scan_type.shift;
 359
 360                 if (iio_buffer_enabled(indio_dev)) {
 361                         ret = -EBUSY;
 362                         break;
 363                 }
 364
 365                 ret = ads1015_set_power_state(data, true);
 366                 if (ret < 0)
 367                         break;
 368
 369                 ret = ads1015_get_adc_result(data, chan->address, val);
 370                 if (ret < 0) {
 371                         ads1015_set_power_state(data, false);
 372                         break;
 373                 }
 374
 375                 *val = sign_extend32(*val >> shift, 15 - shift);
 376
 377                 ret = ads1015_set_power_state(data, false);
 378                 if (ret < 0)
 379                         break;
 380
 381                 ret = IIO_VAL_INT;
 382                 break;
 383         }
 384         case IIO_CHAN_INFO_SCALE:
 385                 idx = data->channel_data[chan->address].pga;
 386                 *val = ads1015_scale[idx].scale;
 387                 *val2 = ads1015_scale[idx].uscale;
 388                 ret = IIO_VAL_INT_PLUS_MICRO;
 389                 break;
 390         case IIO_CHAN_INFO_SAMP_FREQ:
 391                 idx = data->channel_data[chan->address].data_rate;
 392                 *val = data->data_rate[idx];
 393                 ret = IIO_VAL_INT;
 394                 break;
 395         default:
 396                 ret = -EINVAL;
 397                 break;
 398         }
 399         mutex_unlock(&data->lock);
 400         mutex_unlock(&indio_dev->mlock);
 401
 402         return ret;
 403 }
 404
 405 static int ads1015_write_raw(struct iio_dev *indio_dev,
 406                              struct iio_chan_spec const *chan, int val,
 407                              int val2, long mask)
 408 {
 409         struct ads1015_data *data = iio_priv(indio_dev);
 410         int ret;
 411
 412         mutex_lock(&data->lock);
 413         switch (mask) {
 414         case IIO_CHAN_INFO_SCALE:
 415                 ret = ads1015_set_scale(data, chan->address, val, val2);
 416                 break;
 417         case IIO_CHAN_INFO_SAMP_FREQ:
 418                 ret = ads1015_set_data_rate(data, chan->address, val);
 419                 break;
 420         default:
 421                 ret = -EINVAL;
 422                 break;
 423         }
 424         mutex_unlock(&data->lock);
 425
 426         return ret;
 427 }
 428
 429 static int ads1015_buffer_preenable(struct iio_dev *indio_dev)
 430 {
 431         return ads1015_set_power_state(iio_priv(indio_dev), true);
 432 }
 433
 434 static int ads1015_buffer_postdisable(struct iio_dev *indio_dev)
 435 {
 436         return ads1015_set_power_state(iio_priv(indio_dev), false);
 437 }
 438
 439 static const struct iio_buffer_setup_ops ads1015_buffer_setup_ops = {
 440         .preenable      = ads1015_buffer_preenable,
 441         .postenable     = iio_triggered_buffer_postenable,
 442         .predisable     = iio_triggered_buffer_predisable,
 443         .postdisable    = ads1015_buffer_postdisable,
 444         .validate_scan_mask = &iio_validate_scan_mask_onehot,
 445 };
 446
 447 static IIO_CONST_ATTR(scale_available, "3 2 1 0.5 0.25 0.125");
 448
 449 static IIO_CONST_ATTR_NAMED(ads1015_sampling_frequency_available,
 450         sampling_frequency_available, "128 250 490 920 1600 2400 3300");
 451 static IIO_CONST_ATTR_NAMED(ads1115_sampling_frequency_available,
 452         sampling_frequency_available, "8 16 32 64 128 250 475 860");
 453
 454 static struct attribute *ads1015_attributes[] = {
 455         &iio_const_attr_scale_available.dev_attr.attr,
 456         &iio_const_attr_ads1015_sampling_frequency_available.dev_attr.attr,
 457         NULL,
 458 };
 459
 460 static const struct attribute_group ads1015_attribute_group = {
 461         .attrs = ads1015_attributes,
 462 };
 463
 464 static struct attribute *ads1115_attributes[] = {
 465         &iio_const_attr_scale_available.dev_attr.attr,
 466         &iio_const_attr_ads1115_sampling_frequency_available.dev_attr.attr,
 467         NULL,
 468 };
 469
 470 static const struct attribute_group ads1115_attribute_group = {
 471         .attrs = ads1115_attributes,
 472 };
 473
 474 static struct iio_info ads1015_info = {
 475         .driver_module  = THIS_MODULE,
 476         .read_raw       = ads1015_read_raw,
 477         .write_raw      = ads1015_write_raw,
 478         .attrs          = &ads1015_attribute_group,
 479 };
 480
 481 static struct iio_info ads1115_info = {
 482         .driver_module  = THIS_MODULE,
 483         .read_raw       = ads1015_read_raw,
 484         .write_raw      = ads1015_write_raw,
 485         .attrs          = &ads1115_attribute_group,
 486 };
 487
 488 #ifdef CONFIG_OF
 489 static int ads1015_get_channels_config_of(struct i2c_client *client)
 490 {
 491         struct ads1015_data *data = i2c_get_clientdata(client);
 492         struct device_node *node;
 493
 494         if (!client->dev.of_node ||
 495             !of_get_next_child(client->dev.of_node, NULL))
 496                 return -EINVAL;
 497
 498         for_each_child_of_node(client->dev.of_node, node) {
 499                 u32 pval;
 500                 unsigned int channel;
 501                 unsigned int pga = ADS1015_DEFAULT_PGA;
 502                 unsigned int data_rate = ADS1015_DEFAULT_DATA_RATE;
 503
 504                 if (of_property_read_u32(node, "reg", &pval)) {
 505                         dev_err(&client->dev, "invalid reg on %s\n",
 506                                 node->full_name);
 507                         continue;
 508                 }
 509
 510                 channel = pval;
 511                 if (channel >= ADS1015_CHANNELS) {
 512                         dev_err(&client->dev,
 513                                 "invalid channel index %d on %s\n",
 514                                 channel, node->full_name);
 515                         continue;
 516                 }
 517
 518                 if (!of_property_read_u32(node, "ti,gain", &pval)) {
 519                         pga = pval;
 520                         if (pga > 6) {
 521                                 dev_err(&client->dev, "invalid gain on %s\n",
 522                                         node->full_name);
 523                                 return -EINVAL;
 524                         }
 525                 }
 526
 527                 if (!of_property_read_u32(node, "ti,datarate", &pval)) {
 528                         data_rate = pval;
 529                         if (data_rate > 7) {
 530                                 dev_err(&client->dev,
 531                                         "invalid data_rate on %s\n",
 532                                         node->full_name);
 533                                 return -EINVAL;
 534                         }
 535                 }
 536
 537                 data->channel_data[channel].pga = pga;
 538                 data->channel_data[channel].data_rate = data_rate;
 539         }
 540
 541         return 0;
 542 }
 543 #endif
 544
 545 static void ads1015_get_channels_config(struct i2c_client *client)
 546 {
 547         unsigned int k;
 548
 549         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 550         struct ads1015_data *data = iio_priv(indio_dev);
 551         struct ads1015_platform_data *pdata = dev_get_platdata(&client->dev);
 552
 553         /* prefer platform data */
 554         if (pdata) {
 555                 memcpy(data->channel_data, pdata->channel_data,
 556                        sizeof(data->channel_data));
 557                 return;
 558         }
 559
 560 #ifdef CONFIG_OF
 561         if (!ads1015_get_channels_config_of(client))
 562                 return;
 563 #endif
 564         /* fallback on default configuration */
 565         for (k = 0; k < ADS1015_CHANNELS; ++k) {
 566                 data->channel_data[k].pga = ADS1015_DEFAULT_PGA;
 567                 data->channel_data[k].data_rate = ADS1015_DEFAULT_DATA_RATE;
 568         }
 569 }
 570
 571 static int ads1015_probe(struct i2c_client *client,
 572                          const struct i2c_device_id *id)
 573 {
 574         struct iio_dev *indio_dev;
 575         struct ads1015_data *data;
 576         int ret;
 577
 578         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
 579         if (!indio_dev)
 580                 return -ENOMEM;
 581
 582         data = iio_priv(indio_dev);
 583         i2c_set_clientdata(client, indio_dev);
 584
 585         mutex_init(&data->lock);
 586
 587         indio_dev->dev.parent = &client->dev;
 588         indio_dev->name = ADS1015_DRV_NAME;
 589         indio_dev->modes = INDIO_DIRECT_MODE;
 590
 591         switch (id->driver_data) {
 592         case ADS1015:
 593                 indio_dev->channels = ads1015_channels;
 594                 indio_dev->num_channels = ARRAY_SIZE(ads1015_channels);
 595                 indio_dev->info = &ads1015_info;
 596                 data->data_rate = (unsigned int *) &ads1015_data_rate;
 597                 break;
 598         case ADS1115:
 599                 indio_dev->channels = ads1115_channels;
 600                 indio_dev->num_channels = ARRAY_SIZE(ads1115_channels);
 601                 indio_dev->info = &ads1115_info;
 602                 data->data_rate = (unsigned int *) &ads1115_data_rate;
 603                 break;
 604         }
 605
 606         /* we need to keep this ABI the same as used by hwmon ADS1015 driver */
 607         ads1015_get_channels_config(client);
 608
 609         data->regmap = devm_regmap_init_i2c(client, &ads1015_regmap_config);
 610         if (IS_ERR(data->regmap)) {
 611                 dev_err(&client->dev, "Failed to allocate register map\n");
 612                 return PTR_ERR(data->regmap);
 613         }
 614
 615         ret = iio_triggered_buffer_setup(indio_dev, NULL,
 616                                          ads1015_trigger_handler,
 617                                          &ads1015_buffer_setup_ops);
 618         if (ret < 0) {
 619                 dev_err(&client->dev, "iio triggered buffer setup failed\n");
 620                 return ret;
 621         }
 622         ret = pm_runtime_set_active(&client->dev);
 623         if (ret)
 624                 goto err_buffer_cleanup;
 625         pm_runtime_set_autosuspend_delay(&client->dev, ADS1015_SLEEP_DELAY_MS);
 626         pm_runtime_use_autosuspend(&client->dev);
 627         pm_runtime_enable(&client->dev);
 628
 629         ret = iio_device_register(indio_dev);
 630         if (ret < 0) {
 631                 dev_err(&client->dev, "Failed to register IIO device\n");
 632                 goto err_buffer_cleanup;
 633         }
 634
 635         return 0;
 636
 637 err_buffer_cleanup:
 638         iio_triggered_buffer_cleanup(indio_dev);
 639
 640         return ret;
 641 }
 642
 643 static int ads1015_remove(struct i2c_client *client)
 644 {
 645         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 646         struct ads1015_data *data = iio_priv(indio_dev);
 647
 648         iio_device_unregister(indio_dev);
 649
 650         pm_runtime_disable(&client->dev);
 651         pm_runtime_set_suspended(&client->dev);
 652         pm_runtime_put_noidle(&client->dev);
 653
 654         iio_triggered_buffer_cleanup(indio_dev);
 655
 656         /* power down single shot mode */
 657         return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 658                                   ADS1015_CFG_MOD_MASK,
 659                                   ADS1015_SINGLESHOT << ADS1015_CFG_MOD_SHIFT);
 660 }
 661
 662 #ifdef CONFIG_PM
 663 static int ads1015_runtime_suspend(struct device *dev)
 664 {
 665         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
 666         struct ads1015_data *data = iio_priv(indio_dev);
 667
 668         return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 669                                   ADS1015_CFG_MOD_MASK,
 670                                   ADS1015_SINGLESHOT << ADS1015_CFG_MOD_SHIFT);
 671 }
 672
 673 static int ads1015_runtime_resume(struct device *dev)
 674 {
 675         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
 676         struct ads1015_data *data = iio_priv(indio_dev);
 677
 678         return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 679                                   ADS1015_CFG_MOD_MASK,
 680                                   ADS1015_CONTINUOUS << ADS1015_CFG_MOD_SHIFT);
 681 }
 682 #endif
 683
 684 static const struct dev_pm_ops ads1015_pm_ops = {
 685         SET_RUNTIME_PM_OPS(ads1015_runtime_suspend,
 686                            ads1015_runtime_resume, NULL)
 687 };
 688
 689 static const struct i2c_device_id ads1015_id[] = {
 690         {"ads1015", ADS1015},
 691         {"ads1115", ADS1115},
 692         {}
 693 };
 694 MODULE_DEVICE_TABLE(i2c, ads1015_id);
 695
 696 static struct i2c_driver ads1015_driver = {
 697         .driver = {
 698                 .name = ADS1015_DRV_NAME,
 699                 .pm = &ads1015_pm_ops,
 700         },
 701         .probe          = ads1015_probe,
 702         .remove         = ads1015_remove,
 703         .id_table       = ads1015_id,
 704 };
 705
 706 module_i2c_driver(ads1015_driver);
 707
 708 MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
 709 MODULE_DESCRIPTION("Texas Instruments ADS1015 ADC driver");
 710 MODULE_LICENSE("GPL v2");