drivers/infiniband/hw/hns/hns_roce_hem.h

   1 /*
   2  * Copyright (c) 2016 Hisilicon Limited.
   3  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #ifndef _HNS_ROCE_HEM_H
  35 #define _HNS_ROCE_HEM_H
  36
  37 enum {
  38         /* MAP HEM(Hardware Entry Memory) */
  39         HEM_TYPE_QPC = 0,
  40         HEM_TYPE_MTPT,
  41         HEM_TYPE_CQC,
  42         HEM_TYPE_SRQC,
  43
  44          /* UNMAP HEM */
  45         HEM_TYPE_MTT,
  46         HEM_TYPE_IRRL,
  47 };
  48
  49 #define HNS_ROCE_HEM_CHUNK_LEN  \
  50          ((256 - sizeof(struct list_head) - 2 * sizeof(int)) /   \
  51          (sizeof(struct scatterlist)))
  52
  53 enum {
  54          HNS_ROCE_HEM_PAGE_SHIFT = 12,
  55          HNS_ROCE_HEM_PAGE_SIZE  = 1 << HNS_ROCE_HEM_PAGE_SHIFT,
  56 };
  57
  58 struct hns_roce_hem_chunk {
  59         struct list_head         list;
  60         int                      npages;
  61         int                      nsg;
  62         struct scatterlist       mem[HNS_ROCE_HEM_CHUNK_LEN];
  63 };
  64
  65 struct hns_roce_hem {
  66         struct list_head         chunk_list;
  67         int                      refcount;
  68 };
  69
  70 struct hns_roce_hem_iter {
  71         struct hns_roce_hem              *hem;
  72         struct hns_roce_hem_chunk        *chunk;
  73         int                              page_idx;
  74 };
  75
  76 void hns_roce_free_hem(struct hns_roce_dev *hr_dev, struct hns_roce_hem *hem);
  77 int hns_roce_table_get(struct hns_roce_dev *hr_dev,
  78                        struct hns_roce_hem_table *table, unsigned long obj);
  79 void hns_roce_table_put(struct hns_roce_dev *hr_dev,
  80                         struct hns_roce_hem_table *table, unsigned long obj);
  81 void *hns_roce_table_find(struct hns_roce_hem_table *table, unsigned long obj,
  82                           dma_addr_t *dma_handle);
  83 int hns_roce_table_get_range(struct hns_roce_dev *hr_dev,
  84                              struct hns_roce_hem_table *table,
  85                              unsigned long start, unsigned long end);
  86 void hns_roce_table_put_range(struct hns_roce_dev *hr_dev,
  87                               struct hns_roce_hem_table *table,
  88                               unsigned long start, unsigned long end);
  89 int hns_roce_init_hem_table(struct hns_roce_dev *hr_dev,
  90                             struct hns_roce_hem_table *table, u32 type,
  91                             unsigned long obj_size, unsigned long nobj,
  92                             int use_lowmem);
  93 void hns_roce_cleanup_hem_table(struct hns_roce_dev *hr_dev,
  94                                 struct hns_roce_hem_table *table);
  95 void hns_roce_cleanup_hem(struct hns_roce_dev *hr_dev);
  96
  97 static inline void hns_roce_hem_first(struct hns_roce_hem *hem,
  98                                       struct hns_roce_hem_iter *iter)
  99 {
 100         iter->hem = hem;
 101         iter->chunk = list_empty(&hem->chunk_list) ? NULL :
 102                                  list_entry(hem->chunk_list.next,
 103                                             struct hns_roce_hem_chunk, list);
 104          iter->page_idx = 0;
 105 }
 106
 107 static inline int hns_roce_hem_last(struct hns_roce_hem_iter *iter)
 108 {
 109         return !iter->chunk;
 110 }
 111
 112 static inline void hns_roce_hem_next(struct hns_roce_hem_iter *iter)
 113 {
 114         if (++iter->page_idx >= iter->chunk->nsg) {
 115                 if (iter->chunk->list.next == &iter->hem->chunk_list) {
 116                         iter->chunk = NULL;
 117                         return;
 118                 }
 119
 120                 iter->chunk = list_entry(iter->chunk->list.next,
 121                                          struct hns_roce_hem_chunk, list);
 122                 iter->page_idx = 0;
 123         }
 124 }
 125
 126 static inline dma_addr_t hns_roce_hem_addr(struct hns_roce_hem_iter *iter)
 127 {
 128         return sg_dma_address(&iter->chunk->mem[iter->page_idx]);
 129 }
 130
 131 #endif /*_HNS_ROCE_HEM_H*/