d8886d051d4bc33765269f810eab95c809a1fc76
[cascardo/linux.git] / drivers / infiniband / hw / mlx4 / mad.c
1 /*
2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include <rdma/ib_mad.h>
34 #include <rdma/ib_smi.h>
35 #include <rdma/ib_sa.h>
36 #include <rdma/ib_cache.h>
37
38 #include <linux/random.h>
39 #include <linux/mlx4/cmd.h>
40 #include <linux/gfp.h>
41 #include <rdma/ib_pma.h>
42
43 #include <linux/mlx4/driver.h>
44 #include "mlx4_ib.h"
45
46 enum {
47         MLX4_IB_VENDOR_CLASS1 = 0x9,
48         MLX4_IB_VENDOR_CLASS2 = 0xa
49 };
50
51 #define MLX4_TUN_SEND_WRID_SHIFT 34
52 #define MLX4_TUN_QPN_SHIFT 32
53 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
54 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
55
56 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
57 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
58
59  /* Port mgmt change event handling */
60
61 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
62 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
63 #define NUM_IDX_IN_PKEY_TBL_BLK 32
64 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
65 #define GUID_TBL_BLK_NUM_ENTRIES 8
66 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
67
68 struct mlx4_mad_rcv_buf {
69         struct ib_grh grh;
70         u8 payload[256];
71 } __packed;
72
73 struct mlx4_mad_snd_buf {
74         u8 payload[256];
75 } __packed;
76
77 struct mlx4_tunnel_mad {
78         struct ib_grh grh;
79         struct mlx4_ib_tunnel_header hdr;
80         struct ib_mad mad;
81 } __packed;
82
83 struct mlx4_rcv_tunnel_mad {
84         struct mlx4_rcv_tunnel_hdr hdr;
85         struct ib_grh grh;
86         struct ib_mad mad;
87 } __packed;
88
89 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
90 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
91 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
92                                 int block, u32 change_bitmap);
93
94 __be64 mlx4_ib_gen_node_guid(void)
95 {
96 #define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
97         return cpu_to_be64(NODE_GUID_HI | prandom_u32());
98 }
99
100 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
101 {
102         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
103                 cpu_to_be64(0xff00000000000000LL);
104 }
105
106 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
107                  int port, const struct ib_wc *in_wc,
108                  const struct ib_grh *in_grh,
109                  const void *in_mad, void *response_mad)
110 {
111         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
112         void *inbox;
113         int err;
114         u32 in_modifier = port;
115         u8 op_modifier = 0;
116
117         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
118         if (IS_ERR(inmailbox))
119                 return PTR_ERR(inmailbox);
120         inbox = inmailbox->buf;
121
122         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
123         if (IS_ERR(outmailbox)) {
124                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
125                 return PTR_ERR(outmailbox);
126         }
127
128         memcpy(inbox, in_mad, 256);
129
130         /*
131          * Key check traps can't be generated unless we have in_wc to
132          * tell us where to send the trap.
133          */
134         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
135                 op_modifier |= 0x1;
136         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
137                 op_modifier |= 0x2;
138         if (mlx4_is_mfunc(dev->dev) &&
139             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
140                 op_modifier |= 0x8;
141
142         if (in_wc) {
143                 struct {
144                         __be32          my_qpn;
145                         u32             reserved1;
146                         __be32          rqpn;
147                         u8              sl;
148                         u8              g_path;
149                         u16             reserved2[2];
150                         __be16          pkey;
151                         u32             reserved3[11];
152                         u8              grh[40];
153                 } *ext_info;
154
155                 memset(inbox + 256, 0, 256);
156                 ext_info = inbox + 256;
157
158                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
159                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
160                 ext_info->sl     = in_wc->sl << 4;
161                 ext_info->g_path = in_wc->dlid_path_bits |
162                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
163                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
164
165                 if (in_grh)
166                         memcpy(ext_info->grh, in_grh, 40);
167
168                 op_modifier |= 0x4;
169
170                 in_modifier |= in_wc->slid << 16;
171         }
172
173         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
174                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
175                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
176                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
177
178         if (!err)
179                 memcpy(response_mad, outmailbox->buf, 256);
180
181         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
182         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
183
184         return err;
185 }
186
187 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
188 {
189         struct ib_ah *new_ah;
190         struct ib_ah_attr ah_attr;
191         unsigned long flags;
192
193         if (!dev->send_agent[port_num - 1][0])
194                 return;
195
196         memset(&ah_attr, 0, sizeof ah_attr);
197         ah_attr.dlid     = lid;
198         ah_attr.sl       = sl;
199         ah_attr.port_num = port_num;
200
201         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
202                               &ah_attr);
203         if (IS_ERR(new_ah))
204                 return;
205
206         spin_lock_irqsave(&dev->sm_lock, flags);
207         if (dev->sm_ah[port_num - 1])
208                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
209         dev->sm_ah[port_num - 1] = new_ah;
210         spin_unlock_irqrestore(&dev->sm_lock, flags);
211 }
212
213 /*
214  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
215  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
216  */
217 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
218                       u16 prev_lid)
219 {
220         struct ib_port_info *pinfo;
221         u16 lid;
222         __be16 *base;
223         u32 bn, pkey_change_bitmap;
224         int i;
225
226
227         struct mlx4_ib_dev *dev = to_mdev(ibdev);
228         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
229              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
230             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
231                 switch (mad->mad_hdr.attr_id) {
232                 case IB_SMP_ATTR_PORT_INFO:
233                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
234                         lid = be16_to_cpu(pinfo->lid);
235
236                         update_sm_ah(dev, port_num,
237                                      be16_to_cpu(pinfo->sm_lid),
238                                      pinfo->neighbormtu_mastersmsl & 0xf);
239
240                         if (pinfo->clientrereg_resv_subnetto & 0x80)
241                                 handle_client_rereg_event(dev, port_num);
242
243                         if (prev_lid != lid)
244                                 handle_lid_change_event(dev, port_num);
245                         break;
246
247                 case IB_SMP_ATTR_PKEY_TABLE:
248                         if (!mlx4_is_mfunc(dev->dev)) {
249                                 mlx4_ib_dispatch_event(dev, port_num,
250                                                        IB_EVENT_PKEY_CHANGE);
251                                 break;
252                         }
253
254                         /* at this point, we are running in the master.
255                          * Slaves do not receive SMPs.
256                          */
257                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
258                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
259                         pkey_change_bitmap = 0;
260                         for (i = 0; i < 32; i++) {
261                                 pr_debug("PKEY[%d] = x%x\n",
262                                          i + bn*32, be16_to_cpu(base[i]));
263                                 if (be16_to_cpu(base[i]) !=
264                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
265                                         pkey_change_bitmap |= (1 << i);
266                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
267                                                 be16_to_cpu(base[i]);
268                                 }
269                         }
270                         pr_debug("PKEY Change event: port=%d, "
271                                  "block=0x%x, change_bitmap=0x%x\n",
272                                  port_num, bn, pkey_change_bitmap);
273
274                         if (pkey_change_bitmap) {
275                                 mlx4_ib_dispatch_event(dev, port_num,
276                                                        IB_EVENT_PKEY_CHANGE);
277                                 if (!dev->sriov.is_going_down)
278                                         __propagate_pkey_ev(dev, port_num, bn,
279                                                             pkey_change_bitmap);
280                         }
281                         break;
282
283                 case IB_SMP_ATTR_GUID_INFO:
284                         /* paravirtualized master's guid is guid 0 -- does not change */
285                         if (!mlx4_is_master(dev->dev))
286                                 mlx4_ib_dispatch_event(dev, port_num,
287                                                        IB_EVENT_GID_CHANGE);
288                         /*if master, notify relevant slaves*/
289                         if (mlx4_is_master(dev->dev) &&
290                             !dev->sriov.is_going_down) {
291                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
292                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
293                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
294                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
295                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
296                         }
297                         break;
298
299                 default:
300                         break;
301                 }
302 }
303
304 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
305                                 int block, u32 change_bitmap)
306 {
307         int i, ix, slave, err;
308         int have_event = 0;
309
310         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
311                 if (slave == mlx4_master_func_num(dev->dev))
312                         continue;
313                 if (!mlx4_is_slave_active(dev->dev, slave))
314                         continue;
315
316                 have_event = 0;
317                 for (i = 0; i < 32; i++) {
318                         if (!(change_bitmap & (1 << i)))
319                                 continue;
320                         for (ix = 0;
321                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
322                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
323                                     [ix] == i + 32 * block) {
324                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
325                                         pr_debug("propagate_pkey_ev: slave %d,"
326                                                  " port %d, ix %d (%d)\n",
327                                                  slave, port_num, ix, err);
328                                         have_event = 1;
329                                         break;
330                                 }
331                         }
332                         if (have_event)
333                                 break;
334                 }
335         }
336 }
337
338 static void node_desc_override(struct ib_device *dev,
339                                struct ib_mad *mad)
340 {
341         unsigned long flags;
342
343         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
344              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
345             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
346             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
347                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
348                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc,
349                        IB_DEVICE_NODE_DESC_MAX);
350                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
351         }
352 }
353
354 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
355 {
356         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
357         struct ib_mad_send_buf *send_buf;
358         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
359         int ret;
360         unsigned long flags;
361
362         if (agent) {
363                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
364                                               IB_MGMT_MAD_DATA, GFP_ATOMIC,
365                                               IB_MGMT_BASE_VERSION);
366                 if (IS_ERR(send_buf))
367                         return;
368                 /*
369                  * We rely here on the fact that MLX QPs don't use the
370                  * address handle after the send is posted (this is
371                  * wrong following the IB spec strictly, but we know
372                  * it's OK for our devices).
373                  */
374                 spin_lock_irqsave(&dev->sm_lock, flags);
375                 memcpy(send_buf->mad, mad, sizeof *mad);
376                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
377                         ret = ib_post_send_mad(send_buf, NULL);
378                 else
379                         ret = -EINVAL;
380                 spin_unlock_irqrestore(&dev->sm_lock, flags);
381
382                 if (ret)
383                         ib_free_send_mad(send_buf);
384         }
385 }
386
387 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
388                                                              struct ib_sa_mad *sa_mad)
389 {
390         int ret = 0;
391
392         /* dispatch to different sa handlers */
393         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
394         case IB_SA_ATTR_MC_MEMBER_REC:
395                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
396                 break;
397         default:
398                 break;
399         }
400         return ret;
401 }
402
403 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
404 {
405         struct mlx4_ib_dev *dev = to_mdev(ibdev);
406         int i;
407
408         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
409                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
410                         return i;
411         }
412         return -1;
413 }
414
415
416 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
417                                    u8 port, u16 pkey, u16 *ix)
418 {
419         int i, ret;
420         u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
421         u16 slot_pkey;
422
423         if (slave == mlx4_master_func_num(dev->dev))
424                 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
425
426         unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
427
428         for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
429                 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
430                         continue;
431
432                 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
433
434                 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
435                 if (ret)
436                         continue;
437                 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
438                         if (slot_pkey & 0x8000) {
439                                 *ix = (u16) pkey_ix;
440                                 return 0;
441                         } else {
442                                 /* take first partial pkey index found */
443                                 if (partial_ix == 0xFF)
444                                         partial_ix = pkey_ix;
445                         }
446                 }
447         }
448
449         if (partial_ix < 0xFF) {
450                 *ix = (u16) partial_ix;
451                 return 0;
452         }
453
454         return -EINVAL;
455 }
456
457 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
458                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
459                           struct ib_grh *grh, struct ib_mad *mad)
460 {
461         struct ib_sge list;
462         struct ib_ud_wr wr;
463         struct ib_send_wr *bad_wr;
464         struct mlx4_ib_demux_pv_ctx *tun_ctx;
465         struct mlx4_ib_demux_pv_qp *tun_qp;
466         struct mlx4_rcv_tunnel_mad *tun_mad;
467         struct ib_ah_attr attr;
468         struct ib_ah *ah;
469         struct ib_qp *src_qp = NULL;
470         unsigned tun_tx_ix = 0;
471         int dqpn;
472         int ret = 0;
473         u16 tun_pkey_ix;
474         u16 cached_pkey;
475         u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
476
477         if (dest_qpt > IB_QPT_GSI)
478                 return -EINVAL;
479
480         tun_ctx = dev->sriov.demux[port-1].tun[slave];
481
482         /* check if proxy qp created */
483         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
484                 return -EAGAIN;
485
486         if (!dest_qpt)
487                 tun_qp = &tun_ctx->qp[0];
488         else
489                 tun_qp = &tun_ctx->qp[1];
490
491         /* compute P_Key index to put in tunnel header for slave */
492         if (dest_qpt) {
493                 u16 pkey_ix;
494                 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
495                 if (ret)
496                         return -EINVAL;
497
498                 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
499                 if (ret)
500                         return -EINVAL;
501                 tun_pkey_ix = pkey_ix;
502         } else
503                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
504
505         dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
506
507         /* get tunnel tx data buf for slave */
508         src_qp = tun_qp->qp;
509
510         /* create ah. Just need an empty one with the port num for the post send.
511          * The driver will set the force loopback bit in post_send */
512         memset(&attr, 0, sizeof attr);
513         attr.port_num = port;
514         if (is_eth) {
515                 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
516                 attr.ah_flags = IB_AH_GRH;
517         }
518         ah = ib_create_ah(tun_ctx->pd, &attr);
519         if (IS_ERR(ah))
520                 return -ENOMEM;
521
522         /* allocate tunnel tx buf after pass failure returns */
523         spin_lock(&tun_qp->tx_lock);
524         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
525             (MLX4_NUM_TUNNEL_BUFS - 1))
526                 ret = -EAGAIN;
527         else
528                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
529         spin_unlock(&tun_qp->tx_lock);
530         if (ret)
531                 goto end;
532
533         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
534         if (tun_qp->tx_ring[tun_tx_ix].ah)
535                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
536         tun_qp->tx_ring[tun_tx_ix].ah = ah;
537         ib_dma_sync_single_for_cpu(&dev->ib_dev,
538                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
539                                    sizeof (struct mlx4_rcv_tunnel_mad),
540                                    DMA_TO_DEVICE);
541
542         /* copy over to tunnel buffer */
543         if (grh)
544                 memcpy(&tun_mad->grh, grh, sizeof *grh);
545         memcpy(&tun_mad->mad, mad, sizeof *mad);
546
547         /* adjust tunnel data */
548         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
549         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
550         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
551
552         if (is_eth) {
553                 u16 vlan = 0;
554                 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
555                                                 NULL)) {
556                         /* VST mode */
557                         if (vlan != wc->vlan_id)
558                                 /* Packet vlan is not the VST-assigned vlan.
559                                  * Drop the packet.
560                                  */
561                                 goto out;
562                          else
563                                 /* Remove the vlan tag before forwarding
564                                  * the packet to the VF.
565                                  */
566                                 vlan = 0xffff;
567                 } else {
568                         vlan = wc->vlan_id;
569                 }
570
571                 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
572                 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
573                 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
574         } else {
575                 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
576                 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
577         }
578
579         ib_dma_sync_single_for_device(&dev->ib_dev,
580                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
581                                       sizeof (struct mlx4_rcv_tunnel_mad),
582                                       DMA_TO_DEVICE);
583
584         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
585         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
586         list.lkey = tun_ctx->pd->local_dma_lkey;
587
588         wr.ah = ah;
589         wr.port_num = port;
590         wr.remote_qkey = IB_QP_SET_QKEY;
591         wr.remote_qpn = dqpn;
592         wr.wr.next = NULL;
593         wr.wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
594         wr.wr.sg_list = &list;
595         wr.wr.num_sge = 1;
596         wr.wr.opcode = IB_WR_SEND;
597         wr.wr.send_flags = IB_SEND_SIGNALED;
598
599         ret = ib_post_send(src_qp, &wr.wr, &bad_wr);
600         if (!ret)
601                 return 0;
602  out:
603         spin_lock(&tun_qp->tx_lock);
604         tun_qp->tx_ix_tail++;
605         spin_unlock(&tun_qp->tx_lock);
606         tun_qp->tx_ring[tun_tx_ix].ah = NULL;
607 end:
608         ib_destroy_ah(ah);
609         return ret;
610 }
611
612 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
613                         struct ib_wc *wc, struct ib_grh *grh,
614                         struct ib_mad *mad)
615 {
616         struct mlx4_ib_dev *dev = to_mdev(ibdev);
617         int err, other_port;
618         int slave = -1;
619         u8 *slave_id;
620         int is_eth = 0;
621
622         if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
623                 is_eth = 0;
624         else
625                 is_eth = 1;
626
627         if (is_eth) {
628                 if (!(wc->wc_flags & IB_WC_GRH)) {
629                         mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
630                         return -EINVAL;
631                 }
632                 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
633                         mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
634                         return -EINVAL;
635                 }
636                 err = mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave);
637                 if (err && mlx4_is_mf_bonded(dev->dev)) {
638                         other_port = (port == 1) ? 2 : 1;
639                         err = mlx4_get_slave_from_roce_gid(dev->dev, other_port, grh->dgid.raw, &slave);
640                         if (!err) {
641                                 port = other_port;
642                                 pr_debug("resolved slave %d from gid %pI6 wire port %d other %d\n",
643                                          slave, grh->dgid.raw, port, other_port);
644                         }
645                 }
646                 if (err) {
647                         mlx4_ib_warn(ibdev, "failed matching grh\n");
648                         return -ENOENT;
649                 }
650                 if (slave >= dev->dev->caps.sqp_demux) {
651                         mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
652                                      slave, dev->dev->caps.sqp_demux);
653                         return -ENOENT;
654                 }
655
656                 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
657                         return 0;
658
659                 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
660                 if (err)
661                         pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
662                                  slave, err);
663                 return 0;
664         }
665
666         /* Initially assume that this mad is for us */
667         slave = mlx4_master_func_num(dev->dev);
668
669         /* See if the slave id is encoded in a response mad */
670         if (mad->mad_hdr.method & 0x80) {
671                 slave_id = (u8 *) &mad->mad_hdr.tid;
672                 slave = *slave_id;
673                 if (slave != 255) /*255 indicates the dom0*/
674                         *slave_id = 0; /* remap tid */
675         }
676
677         /* If a grh is present, we demux according to it */
678         if (wc->wc_flags & IB_WC_GRH) {
679                 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
680                 if (slave < 0) {
681                         mlx4_ib_warn(ibdev, "failed matching grh\n");
682                         return -ENOENT;
683                 }
684         }
685         /* Class-specific handling */
686         switch (mad->mad_hdr.mgmt_class) {
687         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
688         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
689                 /* 255 indicates the dom0 */
690                 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
691                         if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
692                                 return -EPERM;
693                         /* for a VF. drop unsolicited MADs */
694                         if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
695                                 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
696                                              slave, mad->mad_hdr.mgmt_class,
697                                              mad->mad_hdr.method);
698                                 return -EINVAL;
699                         }
700                 }
701                 break;
702         case IB_MGMT_CLASS_SUBN_ADM:
703                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
704                                              (struct ib_sa_mad *) mad))
705                         return 0;
706                 break;
707         case IB_MGMT_CLASS_CM:
708                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
709                         return 0;
710                 break;
711         case IB_MGMT_CLASS_DEVICE_MGMT:
712                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
713                         return 0;
714                 break;
715         default:
716                 /* Drop unsupported classes for slaves in tunnel mode */
717                 if (slave != mlx4_master_func_num(dev->dev)) {
718                         pr_debug("dropping unsupported ingress mad from class:%d "
719                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
720                         return 0;
721                 }
722         }
723         /*make sure that no slave==255 was not handled yet.*/
724         if (slave >= dev->dev->caps.sqp_demux) {
725                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
726                              slave, dev->dev->caps.sqp_demux);
727                 return -ENOENT;
728         }
729
730         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
731         if (err)
732                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
733                          slave, err);
734         return 0;
735 }
736
737 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
738                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
739                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
740 {
741         u16 slid, prev_lid = 0;
742         int err;
743         struct ib_port_attr pattr;
744
745         if (in_wc && in_wc->qp->qp_num) {
746                 pr_debug("received MAD: slid:%d sqpn:%d "
747                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
748                         in_wc->slid, in_wc->src_qp,
749                         in_wc->dlid_path_bits,
750                         in_wc->qp->qp_num,
751                         in_wc->wc_flags,
752                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
753                         be16_to_cpu(in_mad->mad_hdr.attr_id));
754                 if (in_wc->wc_flags & IB_WC_GRH) {
755                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
756                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
757                                  be64_to_cpu(in_grh->sgid.global.interface_id));
758                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
759                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
760                                  be64_to_cpu(in_grh->dgid.global.interface_id));
761                 }
762         }
763
764         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
765
766         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
767                 forward_trap(to_mdev(ibdev), port_num, in_mad);
768                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
769         }
770
771         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
772             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
773                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
774                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
775                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
776                         return IB_MAD_RESULT_SUCCESS;
777
778                 /*
779                  * Don't process SMInfo queries -- the SMA can't handle them.
780                  */
781                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
782                         return IB_MAD_RESULT_SUCCESS;
783         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
784                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
785                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
786                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
787                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
788                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
789                         return IB_MAD_RESULT_SUCCESS;
790         } else
791                 return IB_MAD_RESULT_SUCCESS;
792
793         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
794              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
795             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
796             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
797             !ib_query_port(ibdev, port_num, &pattr))
798                 prev_lid = pattr.lid;
799
800         err = mlx4_MAD_IFC(to_mdev(ibdev),
801                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
802                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
803                            MLX4_MAD_IFC_NET_VIEW,
804                            port_num, in_wc, in_grh, in_mad, out_mad);
805         if (err)
806                 return IB_MAD_RESULT_FAILURE;
807
808         if (!out_mad->mad_hdr.status) {
809                 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
810                         smp_snoop(ibdev, port_num, in_mad, prev_lid);
811                 /* slaves get node desc from FW */
812                 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
813                         node_desc_override(ibdev, out_mad);
814         }
815
816         /* set return bit in status of directed route responses */
817         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
818                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
819
820         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
821                 /* no response for trap repress */
822                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
823
824         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
825 }
826
827 static void edit_counter(struct mlx4_counter *cnt, void *counters,
828                          __be16 attr_id)
829 {
830         switch (attr_id) {
831         case IB_PMA_PORT_COUNTERS:
832         {
833                 struct ib_pma_portcounters *pma_cnt =
834                         (struct ib_pma_portcounters *)counters;
835
836                 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
837                                      (be64_to_cpu(cnt->tx_bytes) >> 2));
838                 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
839                                      (be64_to_cpu(cnt->rx_bytes) >> 2));
840                 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
841                                      be64_to_cpu(cnt->tx_frames));
842                 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
843                                      be64_to_cpu(cnt->rx_frames));
844                 break;
845         }
846         case IB_PMA_PORT_COUNTERS_EXT:
847         {
848                 struct ib_pma_portcounters_ext *pma_cnt_ext =
849                         (struct ib_pma_portcounters_ext *)counters;
850
851                 pma_cnt_ext->port_xmit_data =
852                         cpu_to_be64(be64_to_cpu(cnt->tx_bytes) >> 2);
853                 pma_cnt_ext->port_rcv_data =
854                         cpu_to_be64(be64_to_cpu(cnt->rx_bytes) >> 2);
855                 pma_cnt_ext->port_xmit_packets = cnt->tx_frames;
856                 pma_cnt_ext->port_rcv_packets = cnt->rx_frames;
857                 break;
858         }
859         }
860 }
861
862 static int iboe_process_mad_port_info(void *out_mad)
863 {
864         struct ib_class_port_info cpi = {};
865
866         cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
867         memcpy(out_mad, &cpi, sizeof(cpi));
868         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
869 }
870
871 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
872                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
873                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
874 {
875         struct mlx4_counter counter_stats;
876         struct mlx4_ib_dev *dev = to_mdev(ibdev);
877         struct counter_index *tmp_counter;
878         int err = IB_MAD_RESULT_FAILURE, stats_avail = 0;
879
880         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
881                 return -EINVAL;
882
883         if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)
884                 return iboe_process_mad_port_info((void *)(out_mad->data + 40));
885
886         memset(&counter_stats, 0, sizeof(counter_stats));
887         mutex_lock(&dev->counters_table[port_num - 1].mutex);
888         list_for_each_entry(tmp_counter,
889                             &dev->counters_table[port_num - 1].counters_list,
890                             list) {
891                 err = mlx4_get_counter_stats(dev->dev,
892                                              tmp_counter->index,
893                                              &counter_stats, 0);
894                 if (err) {
895                         err = IB_MAD_RESULT_FAILURE;
896                         stats_avail = 0;
897                         break;
898                 }
899                 stats_avail = 1;
900         }
901         mutex_unlock(&dev->counters_table[port_num - 1].mutex);
902         if (stats_avail) {
903                 memset(out_mad->data, 0, sizeof out_mad->data);
904                 switch (counter_stats.counter_mode & 0xf) {
905                 case 0:
906                         edit_counter(&counter_stats,
907                                      (void *)(out_mad->data + 40),
908                                      in_mad->mad_hdr.attr_id);
909                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
910                         break;
911                 default:
912                         err = IB_MAD_RESULT_FAILURE;
913                 }
914         }
915
916         return err;
917 }
918
919 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
920                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
921                         const struct ib_mad_hdr *in, size_t in_mad_size,
922                         struct ib_mad_hdr *out, size_t *out_mad_size,
923                         u16 *out_mad_pkey_index)
924 {
925         struct mlx4_ib_dev *dev = to_mdev(ibdev);
926         const struct ib_mad *in_mad = (const struct ib_mad *)in;
927         struct ib_mad *out_mad = (struct ib_mad *)out;
928         enum rdma_link_layer link = rdma_port_get_link_layer(ibdev, port_num);
929
930         if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
931                          *out_mad_size != sizeof(*out_mad)))
932                 return IB_MAD_RESULT_FAILURE;
933
934         /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
935          * queries, should be called only by VFs and for that specific purpose
936          */
937         if (link == IB_LINK_LAYER_INFINIBAND) {
938                 if (mlx4_is_slave(dev->dev) &&
939                     (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
940                      (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS ||
941                       in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT ||
942                       in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)))
943                         return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
944                                                 in_grh, in_mad, out_mad);
945
946                 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
947                                       in_grh, in_mad, out_mad);
948         }
949
950         if (link == IB_LINK_LAYER_ETHERNET)
951                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
952                                         in_grh, in_mad, out_mad);
953
954         return -EINVAL;
955 }
956
957 static void send_handler(struct ib_mad_agent *agent,
958                          struct ib_mad_send_wc *mad_send_wc)
959 {
960         if (mad_send_wc->send_buf->context[0])
961                 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
962         ib_free_send_mad(mad_send_wc->send_buf);
963 }
964
965 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
966 {
967         struct ib_mad_agent *agent;
968         int p, q;
969         int ret;
970         enum rdma_link_layer ll;
971
972         for (p = 0; p < dev->num_ports; ++p) {
973                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
974                 for (q = 0; q <= 1; ++q) {
975                         if (ll == IB_LINK_LAYER_INFINIBAND) {
976                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
977                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
978                                                               NULL, 0, send_handler,
979                                                               NULL, NULL, 0);
980                                 if (IS_ERR(agent)) {
981                                         ret = PTR_ERR(agent);
982                                         goto err;
983                                 }
984                                 dev->send_agent[p][q] = agent;
985                         } else
986                                 dev->send_agent[p][q] = NULL;
987                 }
988         }
989
990         return 0;
991
992 err:
993         for (p = 0; p < dev->num_ports; ++p)
994                 for (q = 0; q <= 1; ++q)
995                         if (dev->send_agent[p][q])
996                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
997
998         return ret;
999 }
1000
1001 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
1002 {
1003         struct ib_mad_agent *agent;
1004         int p, q;
1005
1006         for (p = 0; p < dev->num_ports; ++p) {
1007                 for (q = 0; q <= 1; ++q) {
1008                         agent = dev->send_agent[p][q];
1009                         if (agent) {
1010                                 dev->send_agent[p][q] = NULL;
1011                                 ib_unregister_mad_agent(agent);
1012                         }
1013                 }
1014
1015                 if (dev->sm_ah[p])
1016                         ib_destroy_ah(dev->sm_ah[p]);
1017         }
1018 }
1019
1020 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
1021 {
1022         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
1023
1024         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1025                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1026                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
1027 }
1028
1029 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
1030 {
1031         /* re-configure the alias-guid and mcg's */
1032         if (mlx4_is_master(dev->dev)) {
1033                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
1034
1035                 if (!dev->sriov.is_going_down) {
1036                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
1037                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1038                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
1039                 }
1040         }
1041         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
1042 }
1043
1044 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
1045                               struct mlx4_eqe *eqe)
1046 {
1047         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
1048                             GET_MASK_FROM_EQE(eqe));
1049 }
1050
1051 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
1052                                       u32 guid_tbl_blk_num, u32 change_bitmap)
1053 {
1054         struct ib_smp *in_mad  = NULL;
1055         struct ib_smp *out_mad  = NULL;
1056         u16 i;
1057
1058         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
1059                 return;
1060
1061         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
1062         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1063         if (!in_mad || !out_mad) {
1064                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
1065                 goto out;
1066         }
1067
1068         guid_tbl_blk_num  *= 4;
1069
1070         for (i = 0; i < 4; i++) {
1071                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1072                         continue;
1073                 memset(in_mad, 0, sizeof *in_mad);
1074                 memset(out_mad, 0, sizeof *out_mad);
1075
1076                 in_mad->base_version  = 1;
1077                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1078                 in_mad->class_version = 1;
1079                 in_mad->method        = IB_MGMT_METHOD_GET;
1080                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
1081                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
1082
1083                 if (mlx4_MAD_IFC(dev,
1084                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1085                                  port_num, NULL, NULL, in_mad, out_mad)) {
1086                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1087                         goto out;
1088                 }
1089
1090                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1091                                                     port_num,
1092                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
1093                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1094                                                      port_num,
1095                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
1096         }
1097
1098 out:
1099         kfree(in_mad);
1100         kfree(out_mad);
1101         return;
1102 }
1103
1104 void handle_port_mgmt_change_event(struct work_struct *work)
1105 {
1106         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1107         struct mlx4_ib_dev *dev = ew->ib_dev;
1108         struct mlx4_eqe *eqe = &(ew->ib_eqe);
1109         u8 port = eqe->event.port_mgmt_change.port;
1110         u32 changed_attr;
1111         u32 tbl_block;
1112         u32 change_bitmap;
1113
1114         switch (eqe->subtype) {
1115         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1116                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1117
1118                 /* Update the SM ah - This should be done before handling
1119                    the other changed attributes so that MADs can be sent to the SM */
1120                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1121                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1122                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1123                         update_sm_ah(dev, port, lid, sl);
1124                 }
1125
1126                 /* Check if it is a lid change event */
1127                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1128                         handle_lid_change_event(dev, port);
1129
1130                 /* Generate GUID changed event */
1131                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1132                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1133                         /*if master, notify all slaves*/
1134                         if (mlx4_is_master(dev->dev))
1135                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1136                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1137                 }
1138
1139                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1140                         handle_client_rereg_event(dev, port);
1141                 break;
1142
1143         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1144                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1145                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1146                         propagate_pkey_ev(dev, port, eqe);
1147                 break;
1148         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1149                 /* paravirtualized master's guid is guid 0 -- does not change */
1150                 if (!mlx4_is_master(dev->dev))
1151                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1152                 /*if master, notify relevant slaves*/
1153                 else if (!dev->sriov.is_going_down) {
1154                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1155                         change_bitmap = GET_MASK_FROM_EQE(eqe);
1156                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1157                 }
1158                 break;
1159         default:
1160                 pr_warn("Unsupported subtype 0x%x for "
1161                         "Port Management Change event\n", eqe->subtype);
1162         }
1163
1164         kfree(ew);
1165 }
1166
1167 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1168                             enum ib_event_type type)
1169 {
1170         struct ib_event event;
1171
1172         event.device            = &dev->ib_dev;
1173         event.element.port_num  = port_num;
1174         event.event             = type;
1175
1176         ib_dispatch_event(&event);
1177 }
1178
1179 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1180 {
1181         unsigned long flags;
1182         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1183         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1184         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1185         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1186                 queue_work(ctx->wq, &ctx->work);
1187         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1188 }
1189
1190 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1191                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1192                                   int index)
1193 {
1194         struct ib_sge sg_list;
1195         struct ib_recv_wr recv_wr, *bad_recv_wr;
1196         int size;
1197
1198         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1199                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1200
1201         sg_list.addr = tun_qp->ring[index].map;
1202         sg_list.length = size;
1203         sg_list.lkey = ctx->pd->local_dma_lkey;
1204
1205         recv_wr.next = NULL;
1206         recv_wr.sg_list = &sg_list;
1207         recv_wr.num_sge = 1;
1208         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1209                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1210         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1211                                       size, DMA_FROM_DEVICE);
1212         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1213 }
1214
1215 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1216                 int slave, struct ib_sa_mad *sa_mad)
1217 {
1218         int ret = 0;
1219
1220         /* dispatch to different sa handlers */
1221         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1222         case IB_SA_ATTR_MC_MEMBER_REC:
1223                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1224                 break;
1225         default:
1226                 break;
1227         }
1228         return ret;
1229 }
1230
1231 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1232 {
1233         int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1234
1235         return (qpn >= proxy_start && qpn <= proxy_start + 1);
1236 }
1237
1238
1239 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1240                          enum ib_qp_type dest_qpt, u16 pkey_index,
1241                          u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1242                          u8 *s_mac, u16 vlan_id, struct ib_mad *mad)
1243 {
1244         struct ib_sge list;
1245         struct ib_ud_wr wr;
1246         struct ib_send_wr *bad_wr;
1247         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1248         struct mlx4_ib_demux_pv_qp *sqp;
1249         struct mlx4_mad_snd_buf *sqp_mad;
1250         struct ib_ah *ah;
1251         struct ib_qp *send_qp = NULL;
1252         unsigned wire_tx_ix = 0;
1253         int ret = 0;
1254         u16 wire_pkey_ix;
1255         int src_qpnum;
1256         u8 sgid_index;
1257
1258
1259         sqp_ctx = dev->sriov.sqps[port-1];
1260
1261         /* check if proxy qp created */
1262         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1263                 return -EAGAIN;
1264
1265         if (dest_qpt == IB_QPT_SMI) {
1266                 src_qpnum = 0;
1267                 sqp = &sqp_ctx->qp[0];
1268                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1269         } else {
1270                 src_qpnum = 1;
1271                 sqp = &sqp_ctx->qp[1];
1272                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1273         }
1274
1275         send_qp = sqp->qp;
1276
1277         /* create ah */
1278         sgid_index = attr->grh.sgid_index;
1279         attr->grh.sgid_index = 0;
1280         ah = ib_create_ah(sqp_ctx->pd, attr);
1281         if (IS_ERR(ah))
1282                 return -ENOMEM;
1283         attr->grh.sgid_index = sgid_index;
1284         to_mah(ah)->av.ib.gid_index = sgid_index;
1285         /* get rid of force-loopback bit */
1286         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1287         spin_lock(&sqp->tx_lock);
1288         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1289             (MLX4_NUM_TUNNEL_BUFS - 1))
1290                 ret = -EAGAIN;
1291         else
1292                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1293         spin_unlock(&sqp->tx_lock);
1294         if (ret)
1295                 goto out;
1296
1297         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1298         if (sqp->tx_ring[wire_tx_ix].ah)
1299                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1300         sqp->tx_ring[wire_tx_ix].ah = ah;
1301         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1302                                    sqp->tx_ring[wire_tx_ix].buf.map,
1303                                    sizeof (struct mlx4_mad_snd_buf),
1304                                    DMA_TO_DEVICE);
1305
1306         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1307
1308         ib_dma_sync_single_for_device(&dev->ib_dev,
1309                                       sqp->tx_ring[wire_tx_ix].buf.map,
1310                                       sizeof (struct mlx4_mad_snd_buf),
1311                                       DMA_TO_DEVICE);
1312
1313         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1314         list.length = sizeof (struct mlx4_mad_snd_buf);
1315         list.lkey = sqp_ctx->pd->local_dma_lkey;
1316
1317         wr.ah = ah;
1318         wr.port_num = port;
1319         wr.pkey_index = wire_pkey_ix;
1320         wr.remote_qkey = qkey;
1321         wr.remote_qpn = remote_qpn;
1322         wr.wr.next = NULL;
1323         wr.wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1324         wr.wr.sg_list = &list;
1325         wr.wr.num_sge = 1;
1326         wr.wr.opcode = IB_WR_SEND;
1327         wr.wr.send_flags = IB_SEND_SIGNALED;
1328         if (s_mac)
1329                 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1330         if (vlan_id < 0x1000)
1331                 vlan_id |= (attr->sl & 7) << 13;
1332         to_mah(ah)->av.eth.vlan = cpu_to_be16(vlan_id);
1333
1334
1335         ret = ib_post_send(send_qp, &wr.wr, &bad_wr);
1336         if (!ret)
1337                 return 0;
1338
1339         spin_lock(&sqp->tx_lock);
1340         sqp->tx_ix_tail++;
1341         spin_unlock(&sqp->tx_lock);
1342         sqp->tx_ring[wire_tx_ix].ah = NULL;
1343 out:
1344         ib_destroy_ah(ah);
1345         return ret;
1346 }
1347
1348 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1349 {
1350         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1351                 return slave;
1352         return mlx4_get_base_gid_ix(dev->dev, slave, port);
1353 }
1354
1355 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1356                                     struct ib_ah_attr *ah_attr)
1357 {
1358         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1359                 ah_attr->grh.sgid_index = slave;
1360         else
1361                 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1362 }
1363
1364 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1365 {
1366         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1367         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1368         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1369         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1370         struct mlx4_ib_ah ah;
1371         struct ib_ah_attr ah_attr;
1372         u8 *slave_id;
1373         int slave;
1374         int port;
1375         u16 vlan_id;
1376
1377         /* Get slave that sent this packet */
1378         if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1379             wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1380             (wc->src_qp & 0x1) != ctx->port - 1 ||
1381             wc->src_qp & 0x4) {
1382                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1383                 return;
1384         }
1385         slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1386         if (slave != ctx->slave) {
1387                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1388                              "belongs to another slave\n", wc->src_qp);
1389                 return;
1390         }
1391
1392         /* Map transaction ID */
1393         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1394                                    sizeof (struct mlx4_tunnel_mad),
1395                                    DMA_FROM_DEVICE);
1396         switch (tunnel->mad.mad_hdr.method) {
1397         case IB_MGMT_METHOD_SET:
1398         case IB_MGMT_METHOD_GET:
1399         case IB_MGMT_METHOD_REPORT:
1400         case IB_SA_METHOD_GET_TABLE:
1401         case IB_SA_METHOD_DELETE:
1402         case IB_SA_METHOD_GET_MULTI:
1403         case IB_SA_METHOD_GET_TRACE_TBL:
1404                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1405                 if (*slave_id) {
1406                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1407                                      "class:%d slave:%d\n", *slave_id,
1408                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1409                         return;
1410                 } else
1411                         *slave_id = slave;
1412         default:
1413                 /* nothing */;
1414         }
1415
1416         /* Class-specific handling */
1417         switch (tunnel->mad.mad_hdr.mgmt_class) {
1418         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1419         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1420                 if (slave != mlx4_master_func_num(dev->dev) &&
1421                     !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1422                         return;
1423                 break;
1424         case IB_MGMT_CLASS_SUBN_ADM:
1425                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1426                               (struct ib_sa_mad *) &tunnel->mad))
1427                         return;
1428                 break;
1429         case IB_MGMT_CLASS_CM:
1430                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1431                               (struct ib_mad *) &tunnel->mad))
1432                         return;
1433                 break;
1434         case IB_MGMT_CLASS_DEVICE_MGMT:
1435                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1436                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1437                         return;
1438                 break;
1439         default:
1440                 /* Drop unsupported classes for slaves in tunnel mode */
1441                 if (slave != mlx4_master_func_num(dev->dev)) {
1442                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1443                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1444                         return;
1445                 }
1446         }
1447
1448         /* We are using standard ib_core services to send the mad, so generate a
1449          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1450         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1451         ah.ibah.device = ctx->ib_dev;
1452
1453         port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1454         port = mlx4_slave_convert_port(dev->dev, slave, port);
1455         if (port < 0)
1456                 return;
1457         ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1458
1459         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1460         if (ah_attr.ah_flags & IB_AH_GRH)
1461                 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1462
1463         memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1464         vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1465         /* if slave have default vlan use it */
1466         mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1467                                     &vlan_id, &ah_attr.sl);
1468
1469         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1470                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1471                              IB_QPT_SMI : IB_QPT_GSI,
1472                              be16_to_cpu(tunnel->hdr.pkey_index),
1473                              be32_to_cpu(tunnel->hdr.remote_qpn),
1474                              be32_to_cpu(tunnel->hdr.qkey),
1475                              &ah_attr, wc->smac, vlan_id, &tunnel->mad);
1476 }
1477
1478 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1479                                  enum ib_qp_type qp_type, int is_tun)
1480 {
1481         int i;
1482         struct mlx4_ib_demux_pv_qp *tun_qp;
1483         int rx_buf_size, tx_buf_size;
1484
1485         if (qp_type > IB_QPT_GSI)
1486                 return -EINVAL;
1487
1488         tun_qp = &ctx->qp[qp_type];
1489
1490         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1491                                GFP_KERNEL);
1492         if (!tun_qp->ring)
1493                 return -ENOMEM;
1494
1495         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1496                                   sizeof (struct mlx4_ib_tun_tx_buf),
1497                                   GFP_KERNEL);
1498         if (!tun_qp->tx_ring) {
1499                 kfree(tun_qp->ring);
1500                 tun_qp->ring = NULL;
1501                 return -ENOMEM;
1502         }
1503
1504         if (is_tun) {
1505                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1506                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1507         } else {
1508                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1509                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1510         }
1511
1512         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1513                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1514                 if (!tun_qp->ring[i].addr)
1515                         goto err;
1516                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1517                                                         tun_qp->ring[i].addr,
1518                                                         rx_buf_size,
1519                                                         DMA_FROM_DEVICE);
1520                 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1521                         kfree(tun_qp->ring[i].addr);
1522                         goto err;
1523                 }
1524         }
1525
1526         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1527                 tun_qp->tx_ring[i].buf.addr =
1528                         kmalloc(tx_buf_size, GFP_KERNEL);
1529                 if (!tun_qp->tx_ring[i].buf.addr)
1530                         goto tx_err;
1531                 tun_qp->tx_ring[i].buf.map =
1532                         ib_dma_map_single(ctx->ib_dev,
1533                                           tun_qp->tx_ring[i].buf.addr,
1534                                           tx_buf_size,
1535                                           DMA_TO_DEVICE);
1536                 if (ib_dma_mapping_error(ctx->ib_dev,
1537                                          tun_qp->tx_ring[i].buf.map)) {
1538                         kfree(tun_qp->tx_ring[i].buf.addr);
1539                         goto tx_err;
1540                 }
1541                 tun_qp->tx_ring[i].ah = NULL;
1542         }
1543         spin_lock_init(&tun_qp->tx_lock);
1544         tun_qp->tx_ix_head = 0;
1545         tun_qp->tx_ix_tail = 0;
1546         tun_qp->proxy_qpt = qp_type;
1547
1548         return 0;
1549
1550 tx_err:
1551         while (i > 0) {
1552                 --i;
1553                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1554                                     tx_buf_size, DMA_TO_DEVICE);
1555                 kfree(tun_qp->tx_ring[i].buf.addr);
1556         }
1557         kfree(tun_qp->tx_ring);
1558         tun_qp->tx_ring = NULL;
1559         i = MLX4_NUM_TUNNEL_BUFS;
1560 err:
1561         while (i > 0) {
1562                 --i;
1563                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1564                                     rx_buf_size, DMA_FROM_DEVICE);
1565                 kfree(tun_qp->ring[i].addr);
1566         }
1567         kfree(tun_qp->ring);
1568         tun_qp->ring = NULL;
1569         return -ENOMEM;
1570 }
1571
1572 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1573                                      enum ib_qp_type qp_type, int is_tun)
1574 {
1575         int i;
1576         struct mlx4_ib_demux_pv_qp *tun_qp;
1577         int rx_buf_size, tx_buf_size;
1578
1579         if (qp_type > IB_QPT_GSI)
1580                 return;
1581
1582         tun_qp = &ctx->qp[qp_type];
1583         if (is_tun) {
1584                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1585                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1586         } else {
1587                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1588                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1589         }
1590
1591
1592         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1593                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1594                                     rx_buf_size, DMA_FROM_DEVICE);
1595                 kfree(tun_qp->ring[i].addr);
1596         }
1597
1598         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1599                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1600                                     tx_buf_size, DMA_TO_DEVICE);
1601                 kfree(tun_qp->tx_ring[i].buf.addr);
1602                 if (tun_qp->tx_ring[i].ah)
1603                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1604         }
1605         kfree(tun_qp->tx_ring);
1606         kfree(tun_qp->ring);
1607 }
1608
1609 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1610 {
1611         struct mlx4_ib_demux_pv_ctx *ctx;
1612         struct mlx4_ib_demux_pv_qp *tun_qp;
1613         struct ib_wc wc;
1614         int ret;
1615         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1616         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1617
1618         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1619                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1620                 if (wc.status == IB_WC_SUCCESS) {
1621                         switch (wc.opcode) {
1622                         case IB_WC_RECV:
1623                                 mlx4_ib_multiplex_mad(ctx, &wc);
1624                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1625                                                              wc.wr_id &
1626                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1627                                 if (ret)
1628                                         pr_err("Failed reposting tunnel "
1629                                                "buf:%lld\n", wc.wr_id);
1630                                 break;
1631                         case IB_WC_SEND:
1632                                 pr_debug("received tunnel send completion:"
1633                                          "wrid=0x%llx, status=0x%x\n",
1634                                          wc.wr_id, wc.status);
1635                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1636                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1637                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1638                                         = NULL;
1639                                 spin_lock(&tun_qp->tx_lock);
1640                                 tun_qp->tx_ix_tail++;
1641                                 spin_unlock(&tun_qp->tx_lock);
1642
1643                                 break;
1644                         default:
1645                                 break;
1646                         }
1647                 } else  {
1648                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1649                                  " status = %d, wrid = 0x%llx\n",
1650                                  ctx->slave, wc.status, wc.wr_id);
1651                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1652                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1653                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1654                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1655                                         = NULL;
1656                                 spin_lock(&tun_qp->tx_lock);
1657                                 tun_qp->tx_ix_tail++;
1658                                 spin_unlock(&tun_qp->tx_lock);
1659                         }
1660                 }
1661         }
1662 }
1663
1664 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1665 {
1666         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1667
1668         /* It's worse than that! He's dead, Jim! */
1669         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1670                event->event, sqp->port);
1671 }
1672
1673 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1674                             enum ib_qp_type qp_type, int create_tun)
1675 {
1676         int i, ret;
1677         struct mlx4_ib_demux_pv_qp *tun_qp;
1678         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1679         struct ib_qp_attr attr;
1680         int qp_attr_mask_INIT;
1681
1682         if (qp_type > IB_QPT_GSI)
1683                 return -EINVAL;
1684
1685         tun_qp = &ctx->qp[qp_type];
1686
1687         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1688         qp_init_attr.init_attr.send_cq = ctx->cq;
1689         qp_init_attr.init_attr.recv_cq = ctx->cq;
1690         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1691         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1692         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1693         qp_init_attr.init_attr.cap.max_send_sge = 1;
1694         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1695         if (create_tun) {
1696                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1697                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1698                 qp_init_attr.port = ctx->port;
1699                 qp_init_attr.slave = ctx->slave;
1700                 qp_init_attr.proxy_qp_type = qp_type;
1701                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1702                            IB_QP_QKEY | IB_QP_PORT;
1703         } else {
1704                 qp_init_attr.init_attr.qp_type = qp_type;
1705                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1706                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1707         }
1708         qp_init_attr.init_attr.port_num = ctx->port;
1709         qp_init_attr.init_attr.qp_context = ctx;
1710         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1711         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1712         if (IS_ERR(tun_qp->qp)) {
1713                 ret = PTR_ERR(tun_qp->qp);
1714                 tun_qp->qp = NULL;
1715                 pr_err("Couldn't create %s QP (%d)\n",
1716                        create_tun ? "tunnel" : "special", ret);
1717                 return ret;
1718         }
1719
1720         memset(&attr, 0, sizeof attr);
1721         attr.qp_state = IB_QPS_INIT;
1722         ret = 0;
1723         if (create_tun)
1724                 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1725                                               ctx->port, IB_DEFAULT_PKEY_FULL,
1726                                               &attr.pkey_index);
1727         if (ret || !create_tun)
1728                 attr.pkey_index =
1729                         to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1730         attr.qkey = IB_QP1_QKEY;
1731         attr.port_num = ctx->port;
1732         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1733         if (ret) {
1734                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1735                        create_tun ? "tunnel" : "special", ret);
1736                 goto err_qp;
1737         }
1738         attr.qp_state = IB_QPS_RTR;
1739         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1740         if (ret) {
1741                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1742                        create_tun ? "tunnel" : "special", ret);
1743                 goto err_qp;
1744         }
1745         attr.qp_state = IB_QPS_RTS;
1746         attr.sq_psn = 0;
1747         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1748         if (ret) {
1749                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1750                        create_tun ? "tunnel" : "special", ret);
1751                 goto err_qp;
1752         }
1753
1754         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1755                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1756                 if (ret) {
1757                         pr_err(" mlx4_ib_post_pv_buf error"
1758                                " (err = %d, i = %d)\n", ret, i);
1759                         goto err_qp;
1760                 }
1761         }
1762         return 0;
1763
1764 err_qp:
1765         ib_destroy_qp(tun_qp->qp);
1766         tun_qp->qp = NULL;
1767         return ret;
1768 }
1769
1770 /*
1771  * IB MAD completion callback for real SQPs
1772  */
1773 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1774 {
1775         struct mlx4_ib_demux_pv_ctx *ctx;
1776         struct mlx4_ib_demux_pv_qp *sqp;
1777         struct ib_wc wc;
1778         struct ib_grh *grh;
1779         struct ib_mad *mad;
1780
1781         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1782         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1783
1784         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1785                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1786                 if (wc.status == IB_WC_SUCCESS) {
1787                         switch (wc.opcode) {
1788                         case IB_WC_SEND:
1789                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1790                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1791                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1792                                         = NULL;
1793                                 spin_lock(&sqp->tx_lock);
1794                                 sqp->tx_ix_tail++;
1795                                 spin_unlock(&sqp->tx_lock);
1796                                 break;
1797                         case IB_WC_RECV:
1798                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1799                                                 (sqp->ring[wc.wr_id &
1800                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1801                                 grh = &(((struct mlx4_mad_rcv_buf *)
1802                                                 (sqp->ring[wc.wr_id &
1803                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1804                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1805                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1806                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1807                                         pr_err("Failed reposting SQP "
1808                                                "buf:%lld\n", wc.wr_id);
1809                                 break;
1810                         default:
1811                                 BUG_ON(1);
1812                                 break;
1813                         }
1814                 } else  {
1815                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1816                                  " status = %d, wrid = 0x%llx\n",
1817                                  ctx->slave, wc.status, wc.wr_id);
1818                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1819                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1820                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1821                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1822                                         = NULL;
1823                                 spin_lock(&sqp->tx_lock);
1824                                 sqp->tx_ix_tail++;
1825                                 spin_unlock(&sqp->tx_lock);
1826                         }
1827                 }
1828         }
1829 }
1830
1831 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1832                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1833 {
1834         struct mlx4_ib_demux_pv_ctx *ctx;
1835
1836         *ret_ctx = NULL;
1837         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1838         if (!ctx) {
1839                 pr_err("failed allocating pv resource context "
1840                        "for port %d, slave %d\n", port, slave);
1841                 return -ENOMEM;
1842         }
1843
1844         ctx->ib_dev = &dev->ib_dev;
1845         ctx->port = port;
1846         ctx->slave = slave;
1847         *ret_ctx = ctx;
1848         return 0;
1849 }
1850
1851 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1852 {
1853         if (dev->sriov.demux[port - 1].tun[slave]) {
1854                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1855                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1856         }
1857 }
1858
1859 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1860                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1861 {
1862         int ret, cq_size;
1863         struct ib_cq_init_attr cq_attr = {};
1864
1865         if (ctx->state != DEMUX_PV_STATE_DOWN)
1866                 return -EEXIST;
1867
1868         ctx->state = DEMUX_PV_STATE_STARTING;
1869         /* have QP0 only if link layer is IB */
1870         if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1871             IB_LINK_LAYER_INFINIBAND)
1872                 ctx->has_smi = 1;
1873
1874         if (ctx->has_smi) {
1875                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1876                 if (ret) {
1877                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1878                         goto err_out;
1879                 }
1880         }
1881
1882         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1883         if (ret) {
1884                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1885                 goto err_out_qp0;
1886         }
1887
1888         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1889         if (ctx->has_smi)
1890                 cq_size *= 2;
1891
1892         cq_attr.cqe = cq_size;
1893         ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1894                                NULL, ctx, &cq_attr);
1895         if (IS_ERR(ctx->cq)) {
1896                 ret = PTR_ERR(ctx->cq);
1897                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1898                 goto err_buf;
1899         }
1900
1901         ctx->pd = ib_alloc_pd(ctx->ib_dev, 0);
1902         if (IS_ERR(ctx->pd)) {
1903                 ret = PTR_ERR(ctx->pd);
1904                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1905                 goto err_cq;
1906         }
1907
1908         if (ctx->has_smi) {
1909                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1910                 if (ret) {
1911                         pr_err("Couldn't create %s QP0 (%d)\n",
1912                                create_tun ? "tunnel for" : "",  ret);
1913                         goto err_pd;
1914                 }
1915         }
1916
1917         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1918         if (ret) {
1919                 pr_err("Couldn't create %s QP1 (%d)\n",
1920                        create_tun ? "tunnel for" : "",  ret);
1921                 goto err_qp0;
1922         }
1923
1924         if (create_tun)
1925                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1926         else
1927                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1928
1929         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1930
1931         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1932         if (ret) {
1933                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1934                 goto err_wq;
1935         }
1936         ctx->state = DEMUX_PV_STATE_ACTIVE;
1937         return 0;
1938
1939 err_wq:
1940         ctx->wq = NULL;
1941         ib_destroy_qp(ctx->qp[1].qp);
1942         ctx->qp[1].qp = NULL;
1943
1944
1945 err_qp0:
1946         if (ctx->has_smi)
1947                 ib_destroy_qp(ctx->qp[0].qp);
1948         ctx->qp[0].qp = NULL;
1949
1950 err_pd:
1951         ib_dealloc_pd(ctx->pd);
1952         ctx->pd = NULL;
1953
1954 err_cq:
1955         ib_destroy_cq(ctx->cq);
1956         ctx->cq = NULL;
1957
1958 err_buf:
1959         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1960
1961 err_out_qp0:
1962         if (ctx->has_smi)
1963                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1964 err_out:
1965         ctx->state = DEMUX_PV_STATE_DOWN;
1966         return ret;
1967 }
1968
1969 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1970                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1971 {
1972         if (!ctx)
1973                 return;
1974         if (ctx->state > DEMUX_PV_STATE_DOWN) {
1975                 ctx->state = DEMUX_PV_STATE_DOWNING;
1976                 if (flush)
1977                         flush_workqueue(ctx->wq);
1978                 if (ctx->has_smi) {
1979                         ib_destroy_qp(ctx->qp[0].qp);
1980                         ctx->qp[0].qp = NULL;
1981                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1982                 }
1983                 ib_destroy_qp(ctx->qp[1].qp);
1984                 ctx->qp[1].qp = NULL;
1985                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1986                 ib_dealloc_pd(ctx->pd);
1987                 ctx->pd = NULL;
1988                 ib_destroy_cq(ctx->cq);
1989                 ctx->cq = NULL;
1990                 ctx->state = DEMUX_PV_STATE_DOWN;
1991         }
1992 }
1993
1994 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1995                                   int port, int do_init)
1996 {
1997         int ret = 0;
1998
1999         if (!do_init) {
2000                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
2001                 /* for master, destroy real sqp resources */
2002                 if (slave == mlx4_master_func_num(dev->dev))
2003                         destroy_pv_resources(dev, slave, port,
2004                                              dev->sriov.sqps[port - 1], 1);
2005                 /* destroy the tunnel qp resources */
2006                 destroy_pv_resources(dev, slave, port,
2007                                      dev->sriov.demux[port - 1].tun[slave], 1);
2008                 return 0;
2009         }
2010
2011         /* create the tunnel qp resources */
2012         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
2013                                   dev->sriov.demux[port - 1].tun[slave]);
2014
2015         /* for master, create the real sqp resources */
2016         if (!ret && slave == mlx4_master_func_num(dev->dev))
2017                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
2018                                           dev->sriov.sqps[port - 1]);
2019         return ret;
2020 }
2021
2022 void mlx4_ib_tunnels_update_work(struct work_struct *work)
2023 {
2024         struct mlx4_ib_demux_work *dmxw;
2025
2026         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
2027         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
2028                                dmxw->do_init);
2029         kfree(dmxw);
2030         return;
2031 }
2032
2033 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
2034                                        struct mlx4_ib_demux_ctx *ctx,
2035                                        int port)
2036 {
2037         char name[12];
2038         int ret = 0;
2039         int i;
2040
2041         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
2042                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
2043         if (!ctx->tun)
2044                 return -ENOMEM;
2045
2046         ctx->dev = dev;
2047         ctx->port = port;
2048         ctx->ib_dev = &dev->ib_dev;
2049
2050         for (i = 0;
2051              i < min(dev->dev->caps.sqp_demux,
2052              (u16)(dev->dev->persist->num_vfs + 1));
2053              i++) {
2054                 struct mlx4_active_ports actv_ports =
2055                         mlx4_get_active_ports(dev->dev, i);
2056
2057                 if (!test_bit(port - 1, actv_ports.ports))
2058                         continue;
2059
2060                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
2061                 if (ret) {
2062                         ret = -ENOMEM;
2063                         goto err_mcg;
2064                 }
2065         }
2066
2067         ret = mlx4_ib_mcg_port_init(ctx);
2068         if (ret) {
2069                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2070                 goto err_mcg;
2071         }
2072
2073         snprintf(name, sizeof name, "mlx4_ibt%d", port);
2074         ctx->wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2075         if (!ctx->wq) {
2076                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2077                 ret = -ENOMEM;
2078                 goto err_wq;
2079         }
2080
2081         snprintf(name, sizeof name, "mlx4_ibud%d", port);
2082         ctx->ud_wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2083         if (!ctx->ud_wq) {
2084                 pr_err("Failed to create up/down WQ for port %d\n", port);
2085                 ret = -ENOMEM;
2086                 goto err_udwq;
2087         }
2088
2089         return 0;
2090
2091 err_udwq:
2092         destroy_workqueue(ctx->wq);
2093         ctx->wq = NULL;
2094
2095 err_wq:
2096         mlx4_ib_mcg_port_cleanup(ctx, 1);
2097 err_mcg:
2098         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2099                 free_pv_object(dev, i, port);
2100         kfree(ctx->tun);
2101         ctx->tun = NULL;
2102         return ret;
2103 }
2104
2105 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2106 {
2107         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2108                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2109                 flush_workqueue(sqp_ctx->wq);
2110                 if (sqp_ctx->has_smi) {
2111                         ib_destroy_qp(sqp_ctx->qp[0].qp);
2112                         sqp_ctx->qp[0].qp = NULL;
2113                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2114                 }
2115                 ib_destroy_qp(sqp_ctx->qp[1].qp);
2116                 sqp_ctx->qp[1].qp = NULL;
2117                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2118                 ib_dealloc_pd(sqp_ctx->pd);
2119                 sqp_ctx->pd = NULL;
2120                 ib_destroy_cq(sqp_ctx->cq);
2121                 sqp_ctx->cq = NULL;
2122                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2123         }
2124 }
2125
2126 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2127 {
2128         int i;
2129         if (ctx) {
2130                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2131                 mlx4_ib_mcg_port_cleanup(ctx, 1);
2132                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2133                         if (!ctx->tun[i])
2134                                 continue;
2135                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2136                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2137                 }
2138                 flush_workqueue(ctx->wq);
2139                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2140                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2141                         free_pv_object(dev, i, ctx->port);
2142                 }
2143                 kfree(ctx->tun);
2144                 destroy_workqueue(ctx->ud_wq);
2145                 destroy_workqueue(ctx->wq);
2146         }
2147 }
2148
2149 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2150 {
2151         int i;
2152
2153         if (!mlx4_is_master(dev->dev))
2154                 return;
2155         /* initialize or tear down tunnel QPs for the master */
2156         for (i = 0; i < dev->dev->caps.num_ports; i++)
2157                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2158         return;
2159 }
2160
2161 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2162 {
2163         int i = 0;
2164         int err;
2165
2166         if (!mlx4_is_mfunc(dev->dev))
2167                 return 0;
2168
2169         dev->sriov.is_going_down = 0;
2170         spin_lock_init(&dev->sriov.going_down_lock);
2171         mlx4_ib_cm_paravirt_init(dev);
2172
2173         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2174
2175         if (mlx4_is_slave(dev->dev)) {
2176                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2177                 return 0;
2178         }
2179
2180         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2181                 if (i == mlx4_master_func_num(dev->dev))
2182                         mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2183                 else
2184                         mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2185         }
2186
2187         err = mlx4_ib_init_alias_guid_service(dev);
2188         if (err) {
2189                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2190                 goto paravirt_err;
2191         }
2192         err = mlx4_ib_device_register_sysfs(dev);
2193         if (err) {
2194                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2195                 goto sysfs_err;
2196         }
2197
2198         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2199                      dev->dev->caps.sqp_demux);
2200         for (i = 0; i < dev->num_ports; i++) {
2201                 union ib_gid gid;
2202                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2203                 if (err)
2204                         goto demux_err;
2205                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2206                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2207                                       &dev->sriov.sqps[i]);
2208                 if (err)
2209                         goto demux_err;
2210                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2211                 if (err)
2212                         goto free_pv;
2213         }
2214         mlx4_ib_master_tunnels(dev, 1);
2215         return 0;
2216
2217 free_pv:
2218         free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2219 demux_err:
2220         while (--i >= 0) {
2221                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2222                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2223         }
2224         mlx4_ib_device_unregister_sysfs(dev);
2225
2226 sysfs_err:
2227         mlx4_ib_destroy_alias_guid_service(dev);
2228
2229 paravirt_err:
2230         mlx4_ib_cm_paravirt_clean(dev, -1);
2231
2232         return err;
2233 }
2234
2235 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2236 {
2237         int i;
2238         unsigned long flags;
2239
2240         if (!mlx4_is_mfunc(dev->dev))
2241                 return;
2242
2243         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2244         dev->sriov.is_going_down = 1;
2245         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2246         if (mlx4_is_master(dev->dev)) {
2247                 for (i = 0; i < dev->num_ports; i++) {
2248                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2249                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2250                         kfree(dev->sriov.sqps[i]);
2251                         dev->sriov.sqps[i] = NULL;
2252                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2253                 }
2254
2255                 mlx4_ib_cm_paravirt_clean(dev, -1);
2256                 mlx4_ib_destroy_alias_guid_service(dev);
2257                 mlx4_ib_device_unregister_sysfs(dev);
2258         }
2259 }