drivers/infiniband/hw/mlx4/mad.c

   1 /*
   2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <rdma/ib_mad.h>
  34 #include <rdma/ib_smi.h>
  35 #include <rdma/ib_sa.h>
  36 #include <rdma/ib_cache.h>
  37
  38 #include <linux/mlx4/cmd.h>
  39 #include <linux/gfp.h>
  40 #include <rdma/ib_pma.h>
  41
  42 #include "mlx4_ib.h"
  43
  44 enum {
  45         MLX4_IB_VENDOR_CLASS1 = 0x9,
  46         MLX4_IB_VENDOR_CLASS2 = 0xa
  47 };
  48
  49 #define MLX4_TUN_SEND_WRID_SHIFT 34
  50 #define MLX4_TUN_QPN_SHIFT 32
  51 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
  52 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
  53
  54 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
  55 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
  56
  57  /* Port mgmt change event handling */
  58
  59 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
  60 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
  61 #define NUM_IDX_IN_PKEY_TBL_BLK 32
  62 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
  63 #define GUID_TBL_BLK_NUM_ENTRIES 8
  64 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
  65
  66 struct mlx4_mad_rcv_buf {
  67         struct ib_grh grh;
  68         u8 payload[256];
  69 } __packed;
  70
  71 struct mlx4_mad_snd_buf {
  72         u8 payload[256];
  73 } __packed;
  74
  75 struct mlx4_tunnel_mad {
  76         struct ib_grh grh;
  77         struct mlx4_ib_tunnel_header hdr;
  78         struct ib_mad mad;
  79 } __packed;
  80
  81 struct mlx4_rcv_tunnel_mad {
  82         struct mlx4_rcv_tunnel_hdr hdr;
  83         struct ib_grh grh;
  84         struct ib_mad mad;
  85 } __packed;
  86
  87 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
  88 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
  89 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
  90                                 int block, u32 change_bitmap);
  91
  92 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
  93 {
  94         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
  95                 cpu_to_be64(0xff00000000000000LL);
  96 }
  97
  98 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
  99                  int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
 100                  void *in_mad, void *response_mad)
 101 {
 102         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
 103         void *inbox;
 104         int err;
 105         u32 in_modifier = port;
 106         u8 op_modifier = 0;
 107
 108         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 109         if (IS_ERR(inmailbox))
 110                 return PTR_ERR(inmailbox);
 111         inbox = inmailbox->buf;
 112
 113         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 114         if (IS_ERR(outmailbox)) {
 115                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 116                 return PTR_ERR(outmailbox);
 117         }
 118
 119         memcpy(inbox, in_mad, 256);
 120
 121         /*
 122          * Key check traps can't be generated unless we have in_wc to
 123          * tell us where to send the trap.
 124          */
 125         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
 126                 op_modifier |= 0x1;
 127         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
 128                 op_modifier |= 0x2;
 129         if (mlx4_is_mfunc(dev->dev) &&
 130             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
 131                 op_modifier |= 0x8;
 132
 133         if (in_wc) {
 134                 struct {
 135                         __be32          my_qpn;
 136                         u32             reserved1;
 137                         __be32          rqpn;
 138                         u8              sl;
 139                         u8              g_path;
 140                         u16             reserved2[2];
 141                         __be16          pkey;
 142                         u32             reserved3[11];
 143                         u8              grh[40];
 144                 } *ext_info;
 145
 146                 memset(inbox + 256, 0, 256);
 147                 ext_info = inbox + 256;
 148
 149                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
 150                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
 151                 ext_info->sl     = in_wc->sl << 4;
 152                 ext_info->g_path = in_wc->dlid_path_bits |
 153                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
 154                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
 155
 156                 if (in_grh)
 157                         memcpy(ext_info->grh, in_grh, 40);
 158
 159                 op_modifier |= 0x4;
 160
 161                 in_modifier |= in_wc->slid << 16;
 162         }
 163
 164         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
 165                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
 166                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
 167                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
 168
 169         if (!err)
 170                 memcpy(response_mad, outmailbox->buf, 256);
 171
 172         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 173         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
 174
 175         return err;
 176 }
 177
 178 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
 179 {
 180         struct ib_ah *new_ah;
 181         struct ib_ah_attr ah_attr;
 182         unsigned long flags;
 183
 184         if (!dev->send_agent[port_num - 1][0])
 185                 return;
 186
 187         memset(&ah_attr, 0, sizeof ah_attr);
 188         ah_attr.dlid     = lid;
 189         ah_attr.sl       = sl;
 190         ah_attr.port_num = port_num;
 191
 192         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
 193                               &ah_attr);
 194         if (IS_ERR(new_ah))
 195                 return;
 196
 197         spin_lock_irqsave(&dev->sm_lock, flags);
 198         if (dev->sm_ah[port_num - 1])
 199                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
 200         dev->sm_ah[port_num - 1] = new_ah;
 201         spin_unlock_irqrestore(&dev->sm_lock, flags);
 202 }
 203
 204 /*
 205  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
 206  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
 207  */
 208 static void smp_snoop(struct ib_device *ibdev, u8 port_num, struct ib_mad *mad,
 209                       u16 prev_lid)
 210 {
 211         struct ib_port_info *pinfo;
 212         u16 lid;
 213         __be16 *base;
 214         u32 bn, pkey_change_bitmap;
 215         int i;
 216
 217
 218         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 219         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 220              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 221             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
 222                 switch (mad->mad_hdr.attr_id) {
 223                 case IB_SMP_ATTR_PORT_INFO:
 224                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
 225                         lid = be16_to_cpu(pinfo->lid);
 226
 227                         update_sm_ah(dev, port_num,
 228                                      be16_to_cpu(pinfo->sm_lid),
 229                                      pinfo->neighbormtu_mastersmsl & 0xf);
 230
 231                         if (pinfo->clientrereg_resv_subnetto & 0x80)
 232                                 handle_client_rereg_event(dev, port_num);
 233
 234                         if (prev_lid != lid)
 235                                 handle_lid_change_event(dev, port_num);
 236                         break;
 237
 238                 case IB_SMP_ATTR_PKEY_TABLE:
 239                         if (!mlx4_is_mfunc(dev->dev)) {
 240                                 mlx4_ib_dispatch_event(dev, port_num,
 241                                                        IB_EVENT_PKEY_CHANGE);
 242                                 break;
 243                         }
 244
 245                         /* at this point, we are running in the master.
 246                          * Slaves do not receive SMPs.
 247                          */
 248                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
 249                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
 250                         pkey_change_bitmap = 0;
 251                         for (i = 0; i < 32; i++) {
 252                                 pr_debug("PKEY[%d] = x%x\n",
 253                                          i + bn*32, be16_to_cpu(base[i]));
 254                                 if (be16_to_cpu(base[i]) !=
 255                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
 256                                         pkey_change_bitmap |= (1 << i);
 257                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
 258                                                 be16_to_cpu(base[i]);
 259                                 }
 260                         }
 261                         pr_debug("PKEY Change event: port=%d, "
 262                                  "block=0x%x, change_bitmap=0x%x\n",
 263                                  port_num, bn, pkey_change_bitmap);
 264
 265                         if (pkey_change_bitmap) {
 266                                 mlx4_ib_dispatch_event(dev, port_num,
 267                                                        IB_EVENT_PKEY_CHANGE);
 268                                 if (!dev->sriov.is_going_down)
 269                                         __propagate_pkey_ev(dev, port_num, bn,
 270                                                             pkey_change_bitmap);
 271                         }
 272                         break;
 273
 274                 case IB_SMP_ATTR_GUID_INFO:
 275                         /* paravirtualized master's guid is guid 0 -- does not change */
 276                         if (!mlx4_is_master(dev->dev))
 277                                 mlx4_ib_dispatch_event(dev, port_num,
 278                                                        IB_EVENT_GID_CHANGE);
 279                         /*if master, notify relevant slaves*/
 280                         if (mlx4_is_master(dev->dev) &&
 281                             !dev->sriov.is_going_down) {
 282                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
 283                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
 284                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
 285                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
 286                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
 287                         }
 288                         break;
 289
 290                 default:
 291                         break;
 292                 }
 293 }
 294
 295 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 296                                 int block, u32 change_bitmap)
 297 {
 298         int i, ix, slave, err;
 299         int have_event = 0;
 300
 301         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
 302                 if (slave == mlx4_master_func_num(dev->dev))
 303                         continue;
 304                 if (!mlx4_is_slave_active(dev->dev, slave))
 305                         continue;
 306
 307                 have_event = 0;
 308                 for (i = 0; i < 32; i++) {
 309                         if (!(change_bitmap & (1 << i)))
 310                                 continue;
 311                         for (ix = 0;
 312                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
 313                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
 314                                     [ix] == i + 32 * block) {
 315                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
 316                                         pr_debug("propagate_pkey_ev: slave %d,"
 317                                                  " port %d, ix %d (%d)\n",
 318                                                  slave, port_num, ix, err);
 319                                         have_event = 1;
 320                                         break;
 321                                 }
 322                         }
 323                         if (have_event)
 324                                 break;
 325                 }
 326         }
 327 }
 328
 329 static void node_desc_override(struct ib_device *dev,
 330                                struct ib_mad *mad)
 331 {
 332         unsigned long flags;
 333
 334         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 335              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 336             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
 337             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
 338                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
 339                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
 340                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
 341         }
 342 }
 343
 344 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, struct ib_mad *mad)
 345 {
 346         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
 347         struct ib_mad_send_buf *send_buf;
 348         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
 349         int ret;
 350         unsigned long flags;
 351
 352         if (agent) {
 353                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
 354                                               IB_MGMT_MAD_DATA, GFP_ATOMIC);
 355                 if (IS_ERR(send_buf))
 356                         return;
 357                 /*
 358                  * We rely here on the fact that MLX QPs don't use the
 359                  * address handle after the send is posted (this is
 360                  * wrong following the IB spec strictly, but we know
 361                  * it's OK for our devices).
 362                  */
 363                 spin_lock_irqsave(&dev->sm_lock, flags);
 364                 memcpy(send_buf->mad, mad, sizeof *mad);
 365                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
 366                         ret = ib_post_send_mad(send_buf, NULL);
 367                 else
 368                         ret = -EINVAL;
 369                 spin_unlock_irqrestore(&dev->sm_lock, flags);
 370
 371                 if (ret)
 372                         ib_free_send_mad(send_buf);
 373         }
 374 }
 375
 376 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
 377                                                              struct ib_sa_mad *sa_mad)
 378 {
 379         int ret = 0;
 380
 381         /* dispatch to different sa handlers */
 382         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
 383         case IB_SA_ATTR_MC_MEMBER_REC:
 384                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
 385                 break;
 386         default:
 387                 break;
 388         }
 389         return ret;
 390 }
 391
 392 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
 393 {
 394         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 395         int i;
 396
 397         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
 398                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
 399                         return i;
 400         }
 401         return -1;
 402 }
 403
 404
 405 static int get_pkey_phys_indices(struct mlx4_ib_dev *ibdev, u8 port, u8 ph_pkey_ix,
 406                                  u8 *full_pk_ix, u8 *partial_pk_ix,
 407                                  int *is_full_member)
 408 {
 409         u16 search_pkey;
 410         int fm;
 411         int err = 0;
 412         u16 pk;
 413
 414         err = ib_get_cached_pkey(&ibdev->ib_dev, port, ph_pkey_ix, &search_pkey);
 415         if (err)
 416                 return err;
 417
 418         fm = (search_pkey & 0x8000) ? 1 : 0;
 419         if (fm) {
 420                 *full_pk_ix = ph_pkey_ix;
 421                 search_pkey &= 0x7FFF;
 422         } else {
 423                 *partial_pk_ix = ph_pkey_ix;
 424                 search_pkey |= 0x8000;
 425         }
 426
 427         if (ib_find_exact_cached_pkey(&ibdev->ib_dev, port, search_pkey, &pk))
 428                 pk = 0xFFFF;
 429
 430         if (fm)
 431                 *partial_pk_ix = (pk & 0xFF);
 432         else
 433                 *full_pk_ix = (pk & 0xFF);
 434
 435         *is_full_member = fm;
 436         return err;
 437 }
 438
 439 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
 440                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
 441                           struct ib_grh *grh, struct ib_mad *mad)
 442 {
 443         struct ib_sge list;
 444         struct ib_send_wr wr, *bad_wr;
 445         struct mlx4_ib_demux_pv_ctx *tun_ctx;
 446         struct mlx4_ib_demux_pv_qp *tun_qp;
 447         struct mlx4_rcv_tunnel_mad *tun_mad;
 448         struct ib_ah_attr attr;
 449         struct ib_ah *ah;
 450         struct ib_qp *src_qp = NULL;
 451         unsigned tun_tx_ix = 0;
 452         int dqpn;
 453         int ret = 0;
 454         int i;
 455         int is_full_member = 0;
 456         u16 tun_pkey_ix;
 457         u8 ph_pkey_ix, full_pk_ix = 0, partial_pk_ix = 0;
 458
 459         if (dest_qpt > IB_QPT_GSI)
 460                 return -EINVAL;
 461
 462         tun_ctx = dev->sriov.demux[port-1].tun[slave];
 463
 464         /* check if proxy qp created */
 465         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
 466                 return -EAGAIN;
 467
 468         /* QP0 forwarding only for Dom0 */
 469         if (!dest_qpt && (mlx4_master_func_num(dev->dev) != slave))
 470                 return -EINVAL;
 471
 472         if (!dest_qpt)
 473                 tun_qp = &tun_ctx->qp[0];
 474         else
 475                 tun_qp = &tun_ctx->qp[1];
 476
 477         /* compute pkey index for slave */
 478         /* get physical pkey -- virtualized Dom0 pkey to phys*/
 479         if (dest_qpt) {
 480                 ph_pkey_ix =
 481                         dev->pkeys.virt2phys_pkey[mlx4_master_func_num(dev->dev)][port - 1][wc->pkey_index];
 482
 483                 /* now, translate this to the slave pkey index */
 484                 ret = get_pkey_phys_indices(dev, port, ph_pkey_ix, &full_pk_ix,
 485                                             &partial_pk_ix, &is_full_member);
 486                 if (ret)
 487                         return -EINVAL;
 488
 489                 for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
 490                         if ((dev->pkeys.virt2phys_pkey[slave][port - 1][i] == full_pk_ix) ||
 491                             (is_full_member &&
 492                              (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == partial_pk_ix)))
 493                                 break;
 494                 }
 495                 if (i == dev->dev->caps.pkey_table_len[port])
 496                         return -EINVAL;
 497                 tun_pkey_ix = i;
 498         } else
 499                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
 500
 501         dqpn = dev->dev->caps.sqp_start + 8 * slave + port + (dest_qpt * 2) - 1;
 502
 503         /* get tunnel tx data buf for slave */
 504         src_qp = tun_qp->qp;
 505
 506         /* create ah. Just need an empty one with the port num for the post send.
 507          * The driver will set the force loopback bit in post_send */
 508         memset(&attr, 0, sizeof attr);
 509         attr.port_num = port;
 510         ah = ib_create_ah(tun_ctx->pd, &attr);
 511         if (IS_ERR(ah))
 512                 return -ENOMEM;
 513
 514         /* allocate tunnel tx buf after pass failure returns */
 515         spin_lock(&tun_qp->tx_lock);
 516         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
 517             (MLX4_NUM_TUNNEL_BUFS - 1))
 518                 ret = -EAGAIN;
 519         else
 520                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
 521         spin_unlock(&tun_qp->tx_lock);
 522         if (ret)
 523                 goto out;
 524
 525         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
 526         if (tun_qp->tx_ring[tun_tx_ix].ah)
 527                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
 528         tun_qp->tx_ring[tun_tx_ix].ah = ah;
 529         ib_dma_sync_single_for_cpu(&dev->ib_dev,
 530                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
 531                                    sizeof (struct mlx4_rcv_tunnel_mad),
 532                                    DMA_TO_DEVICE);
 533
 534         /* copy over to tunnel buffer */
 535         if (grh)
 536                 memcpy(&tun_mad->grh, grh, sizeof *grh);
 537         memcpy(&tun_mad->mad, mad, sizeof *mad);
 538
 539         /* adjust tunnel data */
 540         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
 541         tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
 542         tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
 543         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
 544         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
 545
 546         ib_dma_sync_single_for_device(&dev->ib_dev,
 547                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
 548                                       sizeof (struct mlx4_rcv_tunnel_mad),
 549                                       DMA_TO_DEVICE);
 550
 551         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
 552         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
 553         list.lkey = tun_ctx->mr->lkey;
 554
 555         wr.wr.ud.ah = ah;
 556         wr.wr.ud.port_num = port;
 557         wr.wr.ud.remote_qkey = IB_QP_SET_QKEY;
 558         wr.wr.ud.remote_qpn = dqpn;
 559         wr.next = NULL;
 560         wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
 561         wr.sg_list = &list;
 562         wr.num_sge = 1;
 563         wr.opcode = IB_WR_SEND;
 564         wr.send_flags = IB_SEND_SIGNALED;
 565
 566         ret = ib_post_send(src_qp, &wr, &bad_wr);
 567 out:
 568         if (ret)
 569                 ib_destroy_ah(ah);
 570         return ret;
 571 }
 572
 573 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
 574                         struct ib_wc *wc, struct ib_grh *grh,
 575                         struct ib_mad *mad)
 576 {
 577         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 578         int err;
 579         int slave;
 580         u8 *slave_id;
 581
 582         /* Initially assume that this mad is for us */
 583         slave = mlx4_master_func_num(dev->dev);
 584
 585         /* See if the slave id is encoded in a response mad */
 586         if (mad->mad_hdr.method & 0x80) {
 587                 slave_id = (u8 *) &mad->mad_hdr.tid;
 588                 slave = *slave_id;
 589                 if (slave != 255) /*255 indicates the dom0*/
 590                         *slave_id = 0; /* remap tid */
 591         }
 592
 593         /* If a grh is present, we demux according to it */
 594         if (wc->wc_flags & IB_WC_GRH) {
 595                 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
 596                 if (slave < 0) {
 597                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 598                         return -ENOENT;
 599                 }
 600         }
 601         /* Class-specific handling */
 602         switch (mad->mad_hdr.mgmt_class) {
 603         case IB_MGMT_CLASS_SUBN_ADM:
 604                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
 605                                              (struct ib_sa_mad *) mad))
 606                         return 0;
 607                 break;
 608         case IB_MGMT_CLASS_CM:
 609                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
 610                         return 0;
 611                 break;
 612         case IB_MGMT_CLASS_DEVICE_MGMT:
 613                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
 614                         return 0;
 615                 break;
 616         default:
 617                 /* Drop unsupported classes for slaves in tunnel mode */
 618                 if (slave != mlx4_master_func_num(dev->dev)) {
 619                         pr_debug("dropping unsupported ingress mad from class:%d "
 620                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
 621                         return 0;
 622                 }
 623         }
 624         /*make sure that no slave==255 was not handled yet.*/
 625         if (slave >= dev->dev->caps.sqp_demux) {
 626                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 627                              slave, dev->dev->caps.sqp_demux);
 628                 return -ENOENT;
 629         }
 630
 631         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 632         if (err)
 633                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 634                          slave, err);
 635         return 0;
 636 }
 637
 638 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 639                         struct ib_wc *in_wc, struct ib_grh *in_grh,
 640                         struct ib_mad *in_mad, struct ib_mad *out_mad)
 641 {
 642         u16 slid, prev_lid = 0;
 643         int err;
 644         struct ib_port_attr pattr;
 645
 646         if (in_wc && in_wc->qp->qp_num) {
 647                 pr_debug("received MAD: slid:%d sqpn:%d "
 648                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
 649                         in_wc->slid, in_wc->src_qp,
 650                         in_wc->dlid_path_bits,
 651                         in_wc->qp->qp_num,
 652                         in_wc->wc_flags,
 653                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
 654                         be16_to_cpu(in_mad->mad_hdr.attr_id));
 655                 if (in_wc->wc_flags & IB_WC_GRH) {
 656                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
 657                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
 658                                  be64_to_cpu(in_grh->sgid.global.interface_id));
 659                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
 660                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
 661                                  be64_to_cpu(in_grh->dgid.global.interface_id));
 662                 }
 663         }
 664
 665         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
 666
 667         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
 668                 forward_trap(to_mdev(ibdev), port_num, in_mad);
 669                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 670         }
 671
 672         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 673             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
 674                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
 675                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
 676                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
 677                         return IB_MAD_RESULT_SUCCESS;
 678
 679                 /*
 680                  * Don't process SMInfo queries -- the SMA can't handle them.
 681                  */
 682                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
 683                         return IB_MAD_RESULT_SUCCESS;
 684         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
 685                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
 686                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
 687                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
 688                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
 689                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
 690                         return IB_MAD_RESULT_SUCCESS;
 691         } else
 692                 return IB_MAD_RESULT_SUCCESS;
 693
 694         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 695              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 696             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
 697             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
 698             !ib_query_port(ibdev, port_num, &pattr))
 699                 prev_lid = pattr.lid;
 700
 701         err = mlx4_MAD_IFC(to_mdev(ibdev),
 702                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
 703                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
 704                            MLX4_MAD_IFC_NET_VIEW,
 705                            port_num, in_wc, in_grh, in_mad, out_mad);
 706         if (err)
 707                 return IB_MAD_RESULT_FAILURE;
 708
 709         if (!out_mad->mad_hdr.status) {
 710                 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
 711                         smp_snoop(ibdev, port_num, in_mad, prev_lid);
 712                 node_desc_override(ibdev, out_mad);
 713         }
 714
 715         /* set return bit in status of directed route responses */
 716         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
 717                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
 718
 719         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
 720                 /* no response for trap repress */
 721                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 722
 723         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 724 }
 725
 726 static void edit_counter(struct mlx4_counter *cnt,
 727                                         struct ib_pma_portcounters *pma_cnt)
 728 {
 729         pma_cnt->port_xmit_data = cpu_to_be32((be64_to_cpu(cnt->tx_bytes)>>2));
 730         pma_cnt->port_rcv_data  = cpu_to_be32((be64_to_cpu(cnt->rx_bytes)>>2));
 731         pma_cnt->port_xmit_packets = cpu_to_be32(be64_to_cpu(cnt->tx_frames));
 732         pma_cnt->port_rcv_packets  = cpu_to_be32(be64_to_cpu(cnt->rx_frames));
 733 }
 734
 735 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 736                         struct ib_wc *in_wc, struct ib_grh *in_grh,
 737                         struct ib_mad *in_mad, struct ib_mad *out_mad)
 738 {
 739         struct mlx4_cmd_mailbox *mailbox;
 740         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 741         int err;
 742         u32 inmod = dev->counters[port_num - 1] & 0xffff;
 743         u8 mode;
 744
 745         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
 746                 return -EINVAL;
 747
 748         mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 749         if (IS_ERR(mailbox))
 750                 return IB_MAD_RESULT_FAILURE;
 751
 752         err = mlx4_cmd_box(dev->dev, 0, mailbox->dma, inmod, 0,
 753                            MLX4_CMD_QUERY_IF_STAT, MLX4_CMD_TIME_CLASS_C,
 754                            MLX4_CMD_WRAPPED);
 755         if (err)
 756                 err = IB_MAD_RESULT_FAILURE;
 757         else {
 758                 memset(out_mad->data, 0, sizeof out_mad->data);
 759                 mode = ((struct mlx4_counter *)mailbox->buf)->counter_mode;
 760                 switch (mode & 0xf) {
 761                 case 0:
 762                         edit_counter(mailbox->buf,
 763                                                 (void *)(out_mad->data + 40));
 764                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 765                         break;
 766                 default:
 767                         err = IB_MAD_RESULT_FAILURE;
 768                 }
 769         }
 770
 771         mlx4_free_cmd_mailbox(dev->dev, mailbox);
 772
 773         return err;
 774 }
 775
 776 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 777                         struct ib_wc *in_wc, struct ib_grh *in_grh,
 778                         struct ib_mad *in_mad, struct ib_mad *out_mad)
 779 {
 780         switch (rdma_port_get_link_layer(ibdev, port_num)) {
 781         case IB_LINK_LAYER_INFINIBAND:
 782                 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
 783                                       in_grh, in_mad, out_mad);
 784         case IB_LINK_LAYER_ETHERNET:
 785                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 786                                           in_grh, in_mad, out_mad);
 787         default:
 788                 return -EINVAL;
 789         }
 790 }
 791
 792 static void send_handler(struct ib_mad_agent *agent,
 793                          struct ib_mad_send_wc *mad_send_wc)
 794 {
 795         ib_free_send_mad(mad_send_wc->send_buf);
 796 }
 797
 798 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
 799 {
 800         struct ib_mad_agent *agent;
 801         int p, q;
 802         int ret;
 803         enum rdma_link_layer ll;
 804
 805         for (p = 0; p < dev->num_ports; ++p) {
 806                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
 807                 for (q = 0; q <= 1; ++q) {
 808                         if (ll == IB_LINK_LAYER_INFINIBAND) {
 809                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
 810                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
 811                                                               NULL, 0, send_handler,
 812                                                               NULL, NULL);
 813                                 if (IS_ERR(agent)) {
 814                                         ret = PTR_ERR(agent);
 815                                         goto err;
 816                                 }
 817                                 dev->send_agent[p][q] = agent;
 818                         } else
 819                                 dev->send_agent[p][q] = NULL;
 820                 }
 821         }
 822
 823         return 0;
 824
 825 err:
 826         for (p = 0; p < dev->num_ports; ++p)
 827                 for (q = 0; q <= 1; ++q)
 828                         if (dev->send_agent[p][q])
 829                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
 830
 831         return ret;
 832 }
 833
 834 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
 835 {
 836         struct ib_mad_agent *agent;
 837         int p, q;
 838
 839         for (p = 0; p < dev->num_ports; ++p) {
 840                 for (q = 0; q <= 1; ++q) {
 841                         agent = dev->send_agent[p][q];
 842                         if (agent) {
 843                                 dev->send_agent[p][q] = NULL;
 844                                 ib_unregister_mad_agent(agent);
 845                         }
 846                 }
 847
 848                 if (dev->sm_ah[p])
 849                         ib_destroy_ah(dev->sm_ah[p]);
 850         }
 851 }
 852
 853 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
 854 {
 855         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
 856
 857         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
 858                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 859                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
 860 }
 861
 862 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
 863 {
 864         /* re-configure the alias-guid and mcg's */
 865         if (mlx4_is_master(dev->dev)) {
 866                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
 867
 868                 if (!dev->sriov.is_going_down) {
 869                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
 870                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 871                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
 872                 }
 873         }
 874         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
 875 }
 876
 877 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 878                               struct mlx4_eqe *eqe)
 879 {
 880         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
 881                             GET_MASK_FROM_EQE(eqe));
 882 }
 883
 884 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
 885                                       u32 guid_tbl_blk_num, u32 change_bitmap)
 886 {
 887         struct ib_smp *in_mad  = NULL;
 888         struct ib_smp *out_mad  = NULL;
 889         u16 i;
 890
 891         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
 892                 return;
 893
 894         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
 895         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
 896         if (!in_mad || !out_mad) {
 897                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
 898                 goto out;
 899         }
 900
 901         guid_tbl_blk_num  *= 4;
 902
 903         for (i = 0; i < 4; i++) {
 904                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
 905                         continue;
 906                 memset(in_mad, 0, sizeof *in_mad);
 907                 memset(out_mad, 0, sizeof *out_mad);
 908
 909                 in_mad->base_version  = 1;
 910                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
 911                 in_mad->class_version = 1;
 912                 in_mad->method        = IB_MGMT_METHOD_GET;
 913                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
 914                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
 915
 916                 if (mlx4_MAD_IFC(dev,
 917                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
 918                                  port_num, NULL, NULL, in_mad, out_mad)) {
 919                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
 920                         goto out;
 921                 }
 922
 923                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
 924                                                     port_num,
 925                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
 926                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
 927                                                      port_num,
 928                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
 929         }
 930
 931 out:
 932         kfree(in_mad);
 933         kfree(out_mad);
 934         return;
 935 }
 936
 937 void handle_port_mgmt_change_event(struct work_struct *work)
 938 {
 939         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
 940         struct mlx4_ib_dev *dev = ew->ib_dev;
 941         struct mlx4_eqe *eqe = &(ew->ib_eqe);
 942         u8 port = eqe->event.port_mgmt_change.port;
 943         u32 changed_attr;
 944         u32 tbl_block;
 945         u32 change_bitmap;
 946
 947         switch (eqe->subtype) {
 948         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
 949                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
 950
 951                 /* Update the SM ah - This should be done before handling
 952                    the other changed attributes so that MADs can be sent to the SM */
 953                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
 954                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
 955                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
 956                         update_sm_ah(dev, port, lid, sl);
 957                 }
 958
 959                 /* Check if it is a lid change event */
 960                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
 961                         handle_lid_change_event(dev, port);
 962
 963                 /* Generate GUID changed event */
 964                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
 965                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
 966                         /*if master, notify all slaves*/
 967                         if (mlx4_is_master(dev->dev))
 968                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
 969                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
 970                 }
 971
 972                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
 973                         handle_client_rereg_event(dev, port);
 974                 break;
 975
 976         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
 977                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
 978                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
 979                         propagate_pkey_ev(dev, port, eqe);
 980                 break;
 981         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
 982                 /* paravirtualized master's guid is guid 0 -- does not change */
 983                 if (!mlx4_is_master(dev->dev))
 984                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
 985                 /*if master, notify relevant slaves*/
 986                 else if (!dev->sriov.is_going_down) {
 987                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
 988                         change_bitmap = GET_MASK_FROM_EQE(eqe);
 989                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
 990                 }
 991                 break;
 992         default:
 993                 pr_warn("Unsupported subtype 0x%x for "
 994                         "Port Management Change event\n", eqe->subtype);
 995         }
 996
 997         kfree(ew);
 998 }
 999
1000 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1001                             enum ib_event_type type)
1002 {
1003         struct ib_event event;
1004
1005         event.device            = &dev->ib_dev;
1006         event.element.port_num  = port_num;
1007         event.event             = type;
1008
1009         ib_dispatch_event(&event);
1010 }
1011
1012 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1013 {
1014         unsigned long flags;
1015         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1016         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1017         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1018         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1019                 queue_work(ctx->wq, &ctx->work);
1020         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1021 }
1022
1023 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1024                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1025                                   int index)
1026 {
1027         struct ib_sge sg_list;
1028         struct ib_recv_wr recv_wr, *bad_recv_wr;
1029         int size;
1030
1031         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1032                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1033
1034         sg_list.addr = tun_qp->ring[index].map;
1035         sg_list.length = size;
1036         sg_list.lkey = ctx->mr->lkey;
1037
1038         recv_wr.next = NULL;
1039         recv_wr.sg_list = &sg_list;
1040         recv_wr.num_sge = 1;
1041         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1042                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1043         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1044                                       size, DMA_FROM_DEVICE);
1045         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1046 }
1047
1048 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1049                 int slave, struct ib_sa_mad *sa_mad)
1050 {
1051         int ret = 0;
1052
1053         /* dispatch to different sa handlers */
1054         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1055         case IB_SA_ATTR_MC_MEMBER_REC:
1056                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1057                 break;
1058         default:
1059                 break;
1060         }
1061         return ret;
1062 }
1063
1064 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1065 {
1066         int slave_start = dev->dev->caps.sqp_start + 8 * slave;
1067
1068         return (qpn >= slave_start && qpn <= slave_start + 1);
1069 }
1070
1071
1072 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1073                          enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
1074                          u32 qkey, struct ib_ah_attr *attr, struct ib_mad *mad)
1075 {
1076         struct ib_sge list;
1077         struct ib_send_wr wr, *bad_wr;
1078         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1079         struct mlx4_ib_demux_pv_qp *sqp;
1080         struct mlx4_mad_snd_buf *sqp_mad;
1081         struct ib_ah *ah;
1082         struct ib_qp *send_qp = NULL;
1083         unsigned wire_tx_ix = 0;
1084         int ret = 0;
1085         u16 wire_pkey_ix;
1086         int src_qpnum;
1087         u8 sgid_index;
1088
1089
1090         sqp_ctx = dev->sriov.sqps[port-1];
1091
1092         /* check if proxy qp created */
1093         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1094                 return -EAGAIN;
1095
1096         /* QP0 forwarding only for Dom0 */
1097         if (dest_qpt == IB_QPT_SMI && (mlx4_master_func_num(dev->dev) != slave))
1098                 return -EINVAL;
1099
1100         if (dest_qpt == IB_QPT_SMI) {
1101                 src_qpnum = 0;
1102                 sqp = &sqp_ctx->qp[0];
1103                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1104         } else {
1105                 src_qpnum = 1;
1106                 sqp = &sqp_ctx->qp[1];
1107                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1108         }
1109
1110         send_qp = sqp->qp;
1111
1112         /* create ah */
1113         sgid_index = attr->grh.sgid_index;
1114         attr->grh.sgid_index = 0;
1115         ah = ib_create_ah(sqp_ctx->pd, attr);
1116         if (IS_ERR(ah))
1117                 return -ENOMEM;
1118         attr->grh.sgid_index = sgid_index;
1119         to_mah(ah)->av.ib.gid_index = sgid_index;
1120         /* get rid of force-loopback bit */
1121         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1122         spin_lock(&sqp->tx_lock);
1123         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1124             (MLX4_NUM_TUNNEL_BUFS - 1))
1125                 ret = -EAGAIN;
1126         else
1127                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1128         spin_unlock(&sqp->tx_lock);
1129         if (ret)
1130                 goto out;
1131
1132         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1133         if (sqp->tx_ring[wire_tx_ix].ah)
1134                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1135         sqp->tx_ring[wire_tx_ix].ah = ah;
1136         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1137                                    sqp->tx_ring[wire_tx_ix].buf.map,
1138                                    sizeof (struct mlx4_mad_snd_buf),
1139                                    DMA_TO_DEVICE);
1140
1141         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1142
1143         ib_dma_sync_single_for_device(&dev->ib_dev,
1144                                       sqp->tx_ring[wire_tx_ix].buf.map,
1145                                       sizeof (struct mlx4_mad_snd_buf),
1146                                       DMA_TO_DEVICE);
1147
1148         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1149         list.length = sizeof (struct mlx4_mad_snd_buf);
1150         list.lkey = sqp_ctx->mr->lkey;
1151
1152         wr.wr.ud.ah = ah;
1153         wr.wr.ud.port_num = port;
1154         wr.wr.ud.pkey_index = wire_pkey_ix;
1155         wr.wr.ud.remote_qkey = qkey;
1156         wr.wr.ud.remote_qpn = remote_qpn;
1157         wr.next = NULL;
1158         wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1159         wr.sg_list = &list;
1160         wr.num_sge = 1;
1161         wr.opcode = IB_WR_SEND;
1162         wr.send_flags = IB_SEND_SIGNALED;
1163
1164         ret = ib_post_send(send_qp, &wr, &bad_wr);
1165 out:
1166         if (ret)
1167                 ib_destroy_ah(ah);
1168         return ret;
1169 }
1170
1171 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1172 {
1173         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1174         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1175         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1176         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1177         struct mlx4_ib_ah ah;
1178         struct ib_ah_attr ah_attr;
1179         u8 *slave_id;
1180         int slave;
1181
1182         /* Get slave that sent this packet */
1183         if (wc->src_qp < dev->dev->caps.sqp_start ||
1184             wc->src_qp >= dev->dev->caps.base_tunnel_sqpn ||
1185             (wc->src_qp & 0x1) != ctx->port - 1 ||
1186             wc->src_qp & 0x4) {
1187                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1188                 return;
1189         }
1190         slave = ((wc->src_qp & ~0x7) - dev->dev->caps.sqp_start) / 8;
1191         if (slave != ctx->slave) {
1192                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1193                              "belongs to another slave\n", wc->src_qp);
1194                 return;
1195         }
1196         if (slave != mlx4_master_func_num(dev->dev) && !(wc->src_qp & 0x2)) {
1197                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1198                              "non-master trying to send QP0 packets\n", wc->src_qp);
1199                 return;
1200         }
1201
1202         /* Map transaction ID */
1203         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1204                                    sizeof (struct mlx4_tunnel_mad),
1205                                    DMA_FROM_DEVICE);
1206         switch (tunnel->mad.mad_hdr.method) {
1207         case IB_MGMT_METHOD_SET:
1208         case IB_MGMT_METHOD_GET:
1209         case IB_MGMT_METHOD_REPORT:
1210         case IB_SA_METHOD_GET_TABLE:
1211         case IB_SA_METHOD_DELETE:
1212         case IB_SA_METHOD_GET_MULTI:
1213         case IB_SA_METHOD_GET_TRACE_TBL:
1214                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1215                 if (*slave_id) {
1216                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1217                                      "class:%d slave:%d\n", *slave_id,
1218                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1219                         return;
1220                 } else
1221                         *slave_id = slave;
1222         default:
1223                 /* nothing */;
1224         }
1225
1226         /* Class-specific handling */
1227         switch (tunnel->mad.mad_hdr.mgmt_class) {
1228         case IB_MGMT_CLASS_SUBN_ADM:
1229                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1230                               (struct ib_sa_mad *) &tunnel->mad))
1231                         return;
1232                 break;
1233         case IB_MGMT_CLASS_CM:
1234                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1235                               (struct ib_mad *) &tunnel->mad))
1236                         return;
1237                 break;
1238         case IB_MGMT_CLASS_DEVICE_MGMT:
1239                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1240                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1241                         return;
1242                 break;
1243         default:
1244                 /* Drop unsupported classes for slaves in tunnel mode */
1245                 if (slave != mlx4_master_func_num(dev->dev)) {
1246                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1247                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1248                         return;
1249                 }
1250         }
1251
1252         /* We are using standard ib_core services to send the mad, so generate a
1253          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1254         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1255         ah.ibah.device = ctx->ib_dev;
1256         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1257         if ((ah_attr.ah_flags & IB_AH_GRH) &&
1258             (ah_attr.grh.sgid_index != slave)) {
1259                 mlx4_ib_warn(ctx->ib_dev, "slave:%d accessed invalid sgid_index:%d\n",
1260                              slave, ah_attr.grh.sgid_index);
1261                 return;
1262         }
1263
1264         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1265                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1266                              IB_QPT_SMI : IB_QPT_GSI,
1267                              be16_to_cpu(tunnel->hdr.pkey_index),
1268                              be32_to_cpu(tunnel->hdr.remote_qpn),
1269                              be32_to_cpu(tunnel->hdr.qkey),
1270                              &ah_attr, &tunnel->mad);
1271 }
1272
1273 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1274                                  enum ib_qp_type qp_type, int is_tun)
1275 {
1276         int i;
1277         struct mlx4_ib_demux_pv_qp *tun_qp;
1278         int rx_buf_size, tx_buf_size;
1279
1280         if (qp_type > IB_QPT_GSI)
1281                 return -EINVAL;
1282
1283         tun_qp = &ctx->qp[qp_type];
1284
1285         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1286                                GFP_KERNEL);
1287         if (!tun_qp->ring)
1288                 return -ENOMEM;
1289
1290         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1291                                   sizeof (struct mlx4_ib_tun_tx_buf),
1292                                   GFP_KERNEL);
1293         if (!tun_qp->tx_ring) {
1294                 kfree(tun_qp->ring);
1295                 tun_qp->ring = NULL;
1296                 return -ENOMEM;
1297         }
1298
1299         if (is_tun) {
1300                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1301                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1302         } else {
1303                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1304                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1305         }
1306
1307         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1308                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1309                 if (!tun_qp->ring[i].addr)
1310                         goto err;
1311                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1312                                                         tun_qp->ring[i].addr,
1313                                                         rx_buf_size,
1314                                                         DMA_FROM_DEVICE);
1315         }
1316
1317         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1318                 tun_qp->tx_ring[i].buf.addr =
1319                         kmalloc(tx_buf_size, GFP_KERNEL);
1320                 if (!tun_qp->tx_ring[i].buf.addr)
1321                         goto tx_err;
1322                 tun_qp->tx_ring[i].buf.map =
1323                         ib_dma_map_single(ctx->ib_dev,
1324                                           tun_qp->tx_ring[i].buf.addr,
1325                                           tx_buf_size,
1326                                           DMA_TO_DEVICE);
1327                 tun_qp->tx_ring[i].ah = NULL;
1328         }
1329         spin_lock_init(&tun_qp->tx_lock);
1330         tun_qp->tx_ix_head = 0;
1331         tun_qp->tx_ix_tail = 0;
1332         tun_qp->proxy_qpt = qp_type;
1333
1334         return 0;
1335
1336 tx_err:
1337         while (i > 0) {
1338                 --i;
1339                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1340                                     tx_buf_size, DMA_TO_DEVICE);
1341                 kfree(tun_qp->tx_ring[i].buf.addr);
1342         }
1343         kfree(tun_qp->tx_ring);
1344         tun_qp->tx_ring = NULL;
1345         i = MLX4_NUM_TUNNEL_BUFS;
1346 err:
1347         while (i > 0) {
1348                 --i;
1349                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1350                                     rx_buf_size, DMA_FROM_DEVICE);
1351                 kfree(tun_qp->ring[i].addr);
1352         }
1353         kfree(tun_qp->ring);
1354         tun_qp->ring = NULL;
1355         return -ENOMEM;
1356 }
1357
1358 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1359                                      enum ib_qp_type qp_type, int is_tun)
1360 {
1361         int i;
1362         struct mlx4_ib_demux_pv_qp *tun_qp;
1363         int rx_buf_size, tx_buf_size;
1364
1365         if (qp_type > IB_QPT_GSI)
1366                 return;
1367
1368         tun_qp = &ctx->qp[qp_type];
1369         if (is_tun) {
1370                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1371                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1372         } else {
1373                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1374                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1375         }
1376
1377
1378         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1379                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1380                                     rx_buf_size, DMA_FROM_DEVICE);
1381                 kfree(tun_qp->ring[i].addr);
1382         }
1383
1384         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1385                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1386                                     tx_buf_size, DMA_TO_DEVICE);
1387                 kfree(tun_qp->tx_ring[i].buf.addr);
1388                 if (tun_qp->tx_ring[i].ah)
1389                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1390         }
1391         kfree(tun_qp->tx_ring);
1392         kfree(tun_qp->ring);
1393 }
1394
1395 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1396 {
1397         struct mlx4_ib_demux_pv_ctx *ctx;
1398         struct mlx4_ib_demux_pv_qp *tun_qp;
1399         struct ib_wc wc;
1400         int ret;
1401         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1402         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1403
1404         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1405                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1406                 if (wc.status == IB_WC_SUCCESS) {
1407                         switch (wc.opcode) {
1408                         case IB_WC_RECV:
1409                                 mlx4_ib_multiplex_mad(ctx, &wc);
1410                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1411                                                              wc.wr_id &
1412                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1413                                 if (ret)
1414                                         pr_err("Failed reposting tunnel "
1415                                                "buf:%lld\n", wc.wr_id);
1416                                 break;
1417                         case IB_WC_SEND:
1418                                 pr_debug("received tunnel send completion:"
1419                                          "wrid=0x%llx, status=0x%x\n",
1420                                          wc.wr_id, wc.status);
1421                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1422                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1423                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1424                                         = NULL;
1425                                 spin_lock(&tun_qp->tx_lock);
1426                                 tun_qp->tx_ix_tail++;
1427                                 spin_unlock(&tun_qp->tx_lock);
1428
1429                                 break;
1430                         default:
1431                                 break;
1432                         }
1433                 } else  {
1434                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1435                                  " status = %d, wrid = 0x%llx\n",
1436                                  ctx->slave, wc.status, wc.wr_id);
1437                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1438                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1439                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1440                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1441                                         = NULL;
1442                                 spin_lock(&tun_qp->tx_lock);
1443                                 tun_qp->tx_ix_tail++;
1444                                 spin_unlock(&tun_qp->tx_lock);
1445                         }
1446                 }
1447         }
1448 }
1449
1450 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1451 {
1452         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1453
1454         /* It's worse than that! He's dead, Jim! */
1455         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1456                event->event, sqp->port);
1457 }
1458
1459 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1460                             enum ib_qp_type qp_type, int create_tun)
1461 {
1462         int i, ret;
1463         struct mlx4_ib_demux_pv_qp *tun_qp;
1464         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1465         struct ib_qp_attr attr;
1466         int qp_attr_mask_INIT;
1467
1468         if (qp_type > IB_QPT_GSI)
1469                 return -EINVAL;
1470
1471         tun_qp = &ctx->qp[qp_type];
1472
1473         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1474         qp_init_attr.init_attr.send_cq = ctx->cq;
1475         qp_init_attr.init_attr.recv_cq = ctx->cq;
1476         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1477         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1478         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1479         qp_init_attr.init_attr.cap.max_send_sge = 1;
1480         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1481         if (create_tun) {
1482                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1483                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1484                 qp_init_attr.port = ctx->port;
1485                 qp_init_attr.slave = ctx->slave;
1486                 qp_init_attr.proxy_qp_type = qp_type;
1487                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1488                            IB_QP_QKEY | IB_QP_PORT;
1489         } else {
1490                 qp_init_attr.init_attr.qp_type = qp_type;
1491                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1492                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1493         }
1494         qp_init_attr.init_attr.port_num = ctx->port;
1495         qp_init_attr.init_attr.qp_context = ctx;
1496         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1497         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1498         if (IS_ERR(tun_qp->qp)) {
1499                 ret = PTR_ERR(tun_qp->qp);
1500                 tun_qp->qp = NULL;
1501                 pr_err("Couldn't create %s QP (%d)\n",
1502                        create_tun ? "tunnel" : "special", ret);
1503                 return ret;
1504         }
1505
1506         memset(&attr, 0, sizeof attr);
1507         attr.qp_state = IB_QPS_INIT;
1508         attr.pkey_index =
1509                 to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1510         attr.qkey = IB_QP1_QKEY;
1511         attr.port_num = ctx->port;
1512         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1513         if (ret) {
1514                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1515                        create_tun ? "tunnel" : "special", ret);
1516                 goto err_qp;
1517         }
1518         attr.qp_state = IB_QPS_RTR;
1519         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1520         if (ret) {
1521                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1522                        create_tun ? "tunnel" : "special", ret);
1523                 goto err_qp;
1524         }
1525         attr.qp_state = IB_QPS_RTS;
1526         attr.sq_psn = 0;
1527         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1528         if (ret) {
1529                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1530                        create_tun ? "tunnel" : "special", ret);
1531                 goto err_qp;
1532         }
1533
1534         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1535                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1536                 if (ret) {
1537                         pr_err(" mlx4_ib_post_pv_buf error"
1538                                " (err = %d, i = %d)\n", ret, i);
1539                         goto err_qp;
1540                 }
1541         }
1542         return 0;
1543
1544 err_qp:
1545         ib_destroy_qp(tun_qp->qp);
1546         tun_qp->qp = NULL;
1547         return ret;
1548 }
1549
1550 /*
1551  * IB MAD completion callback for real SQPs
1552  */
1553 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1554 {
1555         struct mlx4_ib_demux_pv_ctx *ctx;
1556         struct mlx4_ib_demux_pv_qp *sqp;
1557         struct ib_wc wc;
1558         struct ib_grh *grh;
1559         struct ib_mad *mad;
1560
1561         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1562         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1563
1564         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1565                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1566                 if (wc.status == IB_WC_SUCCESS) {
1567                         switch (wc.opcode) {
1568                         case IB_WC_SEND:
1569                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1570                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1571                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1572                                         = NULL;
1573                                 spin_lock(&sqp->tx_lock);
1574                                 sqp->tx_ix_tail++;
1575                                 spin_unlock(&sqp->tx_lock);
1576                                 break;
1577                         case IB_WC_RECV:
1578                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1579                                                 (sqp->ring[wc.wr_id &
1580                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1581                                 grh = &(((struct mlx4_mad_rcv_buf *)
1582                                                 (sqp->ring[wc.wr_id &
1583                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1584                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1585                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1586                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1587                                         pr_err("Failed reposting SQP "
1588                                                "buf:%lld\n", wc.wr_id);
1589                                 break;
1590                         default:
1591                                 BUG_ON(1);
1592                                 break;
1593                         }
1594                 } else  {
1595                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1596                                  " status = %d, wrid = 0x%llx\n",
1597                                  ctx->slave, wc.status, wc.wr_id);
1598                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1599                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1600                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1601                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1602                                         = NULL;
1603                                 spin_lock(&sqp->tx_lock);
1604                                 sqp->tx_ix_tail++;
1605                                 spin_unlock(&sqp->tx_lock);
1606                         }
1607                 }
1608         }
1609 }
1610
1611 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1612                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1613 {
1614         struct mlx4_ib_demux_pv_ctx *ctx;
1615
1616         *ret_ctx = NULL;
1617         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1618         if (!ctx) {
1619                 pr_err("failed allocating pv resource context "
1620                        "for port %d, slave %d\n", port, slave);
1621                 return -ENOMEM;
1622         }
1623
1624         ctx->ib_dev = &dev->ib_dev;
1625         ctx->port = port;
1626         ctx->slave = slave;
1627         *ret_ctx = ctx;
1628         return 0;
1629 }
1630
1631 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1632 {
1633         if (dev->sriov.demux[port - 1].tun[slave]) {
1634                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1635                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1636         }
1637 }
1638
1639 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1640                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1641 {
1642         int ret, cq_size;
1643
1644         ctx->state = DEMUX_PV_STATE_STARTING;
1645         /* have QP0 only on port owner, and only if link layer is IB */
1646         if (ctx->slave == mlx4_master_func_num(to_mdev(ctx->ib_dev)->dev) &&
1647             rdma_port_get_link_layer(ibdev, ctx->port) == IB_LINK_LAYER_INFINIBAND)
1648                 ctx->has_smi = 1;
1649
1650         if (ctx->has_smi) {
1651                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1652                 if (ret) {
1653                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1654                         goto err_out;
1655                 }
1656         }
1657
1658         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1659         if (ret) {
1660                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1661                 goto err_out_qp0;
1662         }
1663
1664         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1665         if (ctx->has_smi)
1666                 cq_size *= 2;
1667
1668         ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1669                                NULL, ctx, cq_size, 0);
1670         if (IS_ERR(ctx->cq)) {
1671                 ret = PTR_ERR(ctx->cq);
1672                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1673                 goto err_buf;
1674         }
1675
1676         ctx->pd = ib_alloc_pd(ctx->ib_dev);
1677         if (IS_ERR(ctx->pd)) {
1678                 ret = PTR_ERR(ctx->pd);
1679                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1680                 goto err_cq;
1681         }
1682
1683         ctx->mr = ib_get_dma_mr(ctx->pd, IB_ACCESS_LOCAL_WRITE);
1684         if (IS_ERR(ctx->mr)) {
1685                 ret = PTR_ERR(ctx->mr);
1686                 pr_err("Couldn't get tunnel DMA MR (%d)\n", ret);
1687                 goto err_pd;
1688         }
1689
1690         if (ctx->has_smi) {
1691                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1692                 if (ret) {
1693                         pr_err("Couldn't create %s QP0 (%d)\n",
1694                                create_tun ? "tunnel for" : "",  ret);
1695                         goto err_mr;
1696                 }
1697         }
1698
1699         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1700         if (ret) {
1701                 pr_err("Couldn't create %s QP1 (%d)\n",
1702                        create_tun ? "tunnel for" : "",  ret);
1703                 goto err_qp0;
1704         }
1705
1706         if (create_tun)
1707                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1708         else
1709                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1710
1711         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1712
1713         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1714         if (ret) {
1715                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1716                 goto err_wq;
1717         }
1718         ctx->state = DEMUX_PV_STATE_ACTIVE;
1719         return 0;
1720
1721 err_wq:
1722         ctx->wq = NULL;
1723         ib_destroy_qp(ctx->qp[1].qp);
1724         ctx->qp[1].qp = NULL;
1725
1726
1727 err_qp0:
1728         if (ctx->has_smi)
1729                 ib_destroy_qp(ctx->qp[0].qp);
1730         ctx->qp[0].qp = NULL;
1731
1732 err_mr:
1733         ib_dereg_mr(ctx->mr);
1734         ctx->mr = NULL;
1735
1736 err_pd:
1737         ib_dealloc_pd(ctx->pd);
1738         ctx->pd = NULL;
1739
1740 err_cq:
1741         ib_destroy_cq(ctx->cq);
1742         ctx->cq = NULL;
1743
1744 err_buf:
1745         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1746
1747 err_out_qp0:
1748         if (ctx->has_smi)
1749                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1750 err_out:
1751         ctx->state = DEMUX_PV_STATE_DOWN;
1752         return ret;
1753 }
1754
1755 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1756                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1757 {
1758         if (!ctx)
1759                 return;
1760         if (ctx->state > DEMUX_PV_STATE_DOWN) {
1761                 ctx->state = DEMUX_PV_STATE_DOWNING;
1762                 if (flush)
1763                         flush_workqueue(ctx->wq);
1764                 if (ctx->has_smi) {
1765                         ib_destroy_qp(ctx->qp[0].qp);
1766                         ctx->qp[0].qp = NULL;
1767                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1768                 }
1769                 ib_destroy_qp(ctx->qp[1].qp);
1770                 ctx->qp[1].qp = NULL;
1771                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1772                 ib_dereg_mr(ctx->mr);
1773                 ctx->mr = NULL;
1774                 ib_dealloc_pd(ctx->pd);
1775                 ctx->pd = NULL;
1776                 ib_destroy_cq(ctx->cq);
1777                 ctx->cq = NULL;
1778                 ctx->state = DEMUX_PV_STATE_DOWN;
1779         }
1780 }
1781
1782 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1783                                   int port, int do_init)
1784 {
1785         int ret = 0;
1786
1787         if (!do_init) {
1788                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
1789                 /* for master, destroy real sqp resources */
1790                 if (slave == mlx4_master_func_num(dev->dev))
1791                         destroy_pv_resources(dev, slave, port,
1792                                              dev->sriov.sqps[port - 1], 1);
1793                 /* destroy the tunnel qp resources */
1794                 destroy_pv_resources(dev, slave, port,
1795                                      dev->sriov.demux[port - 1].tun[slave], 1);
1796                 return 0;
1797         }
1798
1799         /* create the tunnel qp resources */
1800         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
1801                                   dev->sriov.demux[port - 1].tun[slave]);
1802
1803         /* for master, create the real sqp resources */
1804         if (!ret && slave == mlx4_master_func_num(dev->dev))
1805                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
1806                                           dev->sriov.sqps[port - 1]);
1807         return ret;
1808 }
1809
1810 void mlx4_ib_tunnels_update_work(struct work_struct *work)
1811 {
1812         struct mlx4_ib_demux_work *dmxw;
1813
1814         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
1815         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
1816                                dmxw->do_init);
1817         kfree(dmxw);
1818         return;
1819 }
1820
1821 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
1822                                        struct mlx4_ib_demux_ctx *ctx,
1823                                        int port)
1824 {
1825         char name[12];
1826         int ret = 0;
1827         int i;
1828
1829         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
1830                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
1831         if (!ctx->tun)
1832                 return -ENOMEM;
1833
1834         ctx->dev = dev;
1835         ctx->port = port;
1836         ctx->ib_dev = &dev->ib_dev;
1837
1838         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
1839                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
1840                 if (ret) {
1841                         ret = -ENOMEM;
1842                         goto err_mcg;
1843                 }
1844         }
1845
1846         ret = mlx4_ib_mcg_port_init(ctx);
1847         if (ret) {
1848                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
1849                 goto err_mcg;
1850         }
1851
1852         snprintf(name, sizeof name, "mlx4_ibt%d", port);
1853         ctx->wq = create_singlethread_workqueue(name);
1854         if (!ctx->wq) {
1855                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
1856                 ret = -ENOMEM;
1857                 goto err_wq;
1858         }
1859
1860         snprintf(name, sizeof name, "mlx4_ibud%d", port);
1861         ctx->ud_wq = create_singlethread_workqueue(name);
1862         if (!ctx->ud_wq) {
1863                 pr_err("Failed to create up/down WQ for port %d\n", port);
1864                 ret = -ENOMEM;
1865                 goto err_udwq;
1866         }
1867
1868         return 0;
1869
1870 err_udwq:
1871         destroy_workqueue(ctx->wq);
1872         ctx->wq = NULL;
1873
1874 err_wq:
1875         mlx4_ib_mcg_port_cleanup(ctx, 1);
1876 err_mcg:
1877         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
1878                 free_pv_object(dev, i, port);
1879         kfree(ctx->tun);
1880         ctx->tun = NULL;
1881         return ret;
1882 }
1883
1884 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
1885 {
1886         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
1887                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
1888                 flush_workqueue(sqp_ctx->wq);
1889                 if (sqp_ctx->has_smi) {
1890                         ib_destroy_qp(sqp_ctx->qp[0].qp);
1891                         sqp_ctx->qp[0].qp = NULL;
1892                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
1893                 }
1894                 ib_destroy_qp(sqp_ctx->qp[1].qp);
1895                 sqp_ctx->qp[1].qp = NULL;
1896                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
1897                 ib_dereg_mr(sqp_ctx->mr);
1898                 sqp_ctx->mr = NULL;
1899                 ib_dealloc_pd(sqp_ctx->pd);
1900                 sqp_ctx->pd = NULL;
1901                 ib_destroy_cq(sqp_ctx->cq);
1902                 sqp_ctx->cq = NULL;
1903                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
1904         }
1905 }
1906
1907 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
1908 {
1909         int i;
1910         if (ctx) {
1911                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1912                 mlx4_ib_mcg_port_cleanup(ctx, 1);
1913                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
1914                         if (!ctx->tun[i])
1915                                 continue;
1916                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
1917                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
1918                 }
1919                 flush_workqueue(ctx->wq);
1920                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
1921                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
1922                         free_pv_object(dev, i, ctx->port);
1923                 }
1924                 kfree(ctx->tun);
1925                 destroy_workqueue(ctx->ud_wq);
1926                 destroy_workqueue(ctx->wq);
1927         }
1928 }
1929
1930 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
1931 {
1932         int i;
1933
1934         if (!mlx4_is_master(dev->dev))
1935                 return;
1936         /* initialize or tear down tunnel QPs for the master */
1937         for (i = 0; i < dev->dev->caps.num_ports; i++)
1938                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
1939         return;
1940 }
1941
1942 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
1943 {
1944         int i = 0;
1945         int err;
1946
1947         if (!mlx4_is_mfunc(dev->dev))
1948                 return 0;
1949
1950         dev->sriov.is_going_down = 0;
1951         spin_lock_init(&dev->sriov.going_down_lock);
1952         mlx4_ib_cm_paravirt_init(dev);
1953
1954         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
1955
1956         if (mlx4_is_slave(dev->dev)) {
1957                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
1958                 return 0;
1959         }
1960
1961         err = mlx4_ib_init_alias_guid_service(dev);
1962         if (err) {
1963                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
1964                 goto paravirt_err;
1965         }
1966         err = mlx4_ib_device_register_sysfs(dev);
1967         if (err) {
1968                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
1969                 goto sysfs_err;
1970         }
1971
1972         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
1973                      dev->dev->caps.sqp_demux);
1974         for (i = 0; i < dev->num_ports; i++) {
1975                 union ib_gid gid;
1976                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
1977                 if (err)
1978                         goto demux_err;
1979                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
1980                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
1981                                       &dev->sriov.sqps[i]);
1982                 if (err)
1983                         goto demux_err;
1984                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
1985                 if (err)
1986                         goto demux_err;
1987         }
1988         mlx4_ib_master_tunnels(dev, 1);
1989         return 0;
1990
1991 demux_err:
1992         while (i > 0) {
1993                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
1994                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
1995                 --i;
1996         }
1997         mlx4_ib_device_unregister_sysfs(dev);
1998
1999 sysfs_err:
2000         mlx4_ib_destroy_alias_guid_service(dev);
2001
2002 paravirt_err:
2003         mlx4_ib_cm_paravirt_clean(dev, -1);
2004
2005         return err;
2006 }
2007
2008 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2009 {
2010         int i;
2011         unsigned long flags;
2012
2013         if (!mlx4_is_mfunc(dev->dev))
2014                 return;
2015
2016         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2017         dev->sriov.is_going_down = 1;
2018         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2019         if (mlx4_is_master(dev->dev)) {
2020                 for (i = 0; i < dev->num_ports; i++) {
2021                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2022                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2023                         kfree(dev->sriov.sqps[i]);
2024                         dev->sriov.sqps[i] = NULL;
2025                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2026                 }
2027
2028                 mlx4_ib_cm_paravirt_clean(dev, -1);
2029                 mlx4_ib_destroy_alias_guid_service(dev);
2030                 mlx4_ib_device_unregister_sysfs(dev);
2031         }
2032 }