drivers/media/dvb-frontends/si2165.c

   1 /*
   2  *  Driver for Silicon Labs Si2161 DVB-T and Si2165 DVB-C/-T Demodulator
   3  *
   4  *  Copyright (C) 2013-2014 Matthias Schwarzott <zzam@gentoo.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  References:
  17  *  http://www.silabs.com/Support%20Documents/TechnicalDocs/Si2165-short.pdf
  18  */
  19
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/init.h>
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/firmware.h>
  28
  29 #include "dvb_frontend.h"
  30 #include "dvb_math.h"
  31 #include "si2165_priv.h"
  32 #include "si2165.h"
  33
  34 /*
  35  * Hauppauge WinTV-HVR-930C-HD B130 / PCTV QuatroStick 521e 1113xx
  36  * uses 16 MHz xtal
  37  *
  38  * Hauppauge WinTV-HVR-930C-HD B131 / PCTV QuatroStick 522e 1114xx
  39  * uses 24 MHz clock provided by tuner
  40  */
  41
  42 struct si2165_state {
  43         struct i2c_adapter *i2c;
  44
  45         struct dvb_frontend fe;
  46
  47         struct si2165_config config;
  48
  49         u8 chip_revcode;
  50         u8 chip_type;
  51
  52         /* calculated by xtal and div settings */
  53         u32 fvco_hz;
  54         u32 sys_clk;
  55         u32 adc_clk;
  56
  57         bool has_dvbc;
  58         bool has_dvbt;
  59         bool firmware_loaded;
  60 };
  61
  62 #define DEBUG_OTHER     0x01
  63 #define DEBUG_I2C_WRITE 0x02
  64 #define DEBUG_I2C_READ  0x04
  65 #define DEBUG_REG_READ  0x08
  66 #define DEBUG_REG_WRITE 0x10
  67 #define DEBUG_FW_LOAD   0x20
  68
  69 static int debug = 0x00;
  70
  71 #define dprintk(args...) \
  72         do { \
  73                 if (debug & DEBUG_OTHER) \
  74                         printk(KERN_DEBUG "si2165: " args); \
  75         } while (0)
  76
  77 #define deb_i2c_write(args...) \
  78         do { \
  79                 if (debug & DEBUG_I2C_WRITE) \
  80                         printk(KERN_DEBUG "si2165: i2c write: " args); \
  81         } while (0)
  82
  83 #define deb_i2c_read(args...) \
  84         do { \
  85                 if (debug & DEBUG_I2C_READ) \
  86                         printk(KERN_DEBUG "si2165: i2c read: " args); \
  87         } while (0)
  88
  89 #define deb_readreg(args...) \
  90         do { \
  91                 if (debug & DEBUG_REG_READ) \
  92                         printk(KERN_DEBUG "si2165: reg read: " args); \
  93         } while (0)
  94
  95 #define deb_writereg(args...) \
  96         do { \
  97                 if (debug & DEBUG_REG_WRITE) \
  98                         printk(KERN_DEBUG "si2165: reg write: " args); \
  99         } while (0)
 100
 101 #define deb_fw_load(args...) \
 102         do { \
 103                 if (debug & DEBUG_FW_LOAD) \
 104                         printk(KERN_DEBUG "si2165: fw load: " args); \
 105         } while (0)
 106
 107 static int si2165_write(struct si2165_state *state, const u16 reg,
 108                        const u8 *src, const int count)
 109 {
 110         int ret;
 111         struct i2c_msg msg;
 112         u8 buf[2 + 4]; /* write a maximum of 4 bytes of data */
 113
 114         if (count + 2 > sizeof(buf)) {
 115                 dev_warn(&state->i2c->dev,
 116                           "%s: i2c wr reg=%04x: count=%d is too big!\n",
 117                           KBUILD_MODNAME, reg, count);
 118                 return -EINVAL;
 119         }
 120         buf[0] = reg >> 8;
 121         buf[1] = reg & 0xff;
 122         memcpy(buf + 2, src, count);
 123
 124         msg.addr = state->config.i2c_addr;
 125         msg.flags = 0;
 126         msg.buf = buf;
 127         msg.len = count + 2;
 128
 129         if (debug & DEBUG_I2C_WRITE)
 130                 deb_i2c_write("reg: 0x%04x, data: %*ph\n", reg, count, src);
 131
 132         ret = i2c_transfer(state->i2c, &msg, 1);
 133
 134         if (ret != 1) {
 135                 dev_err(&state->i2c->dev, "%s: ret == %d\n", __func__, ret);
 136                 if (ret < 0)
 137                         return ret;
 138                 else
 139                         return -EREMOTEIO;
 140         }
 141
 142         return 0;
 143 }
 144
 145 static int si2165_read(struct si2165_state *state,
 146                        const u16 reg, u8 *val, const int count)
 147 {
 148         int ret;
 149         u8 reg_buf[] = { reg >> 8, reg & 0xff };
 150         struct i2c_msg msg[] = {
 151                 { .addr = state->config.i2c_addr,
 152                   .flags = 0, .buf = reg_buf, .len = 2 },
 153                 { .addr = state->config.i2c_addr,
 154                   .flags = I2C_M_RD, .buf = val, .len = count },
 155         };
 156
 157         ret = i2c_transfer(state->i2c, msg, 2);
 158
 159         if (ret != 2) {
 160                 dev_err(&state->i2c->dev, "%s: error (addr %02x reg %04x error (ret == %i)\n",
 161                         __func__, state->config.i2c_addr, reg, ret);
 162                 if (ret < 0)
 163                         return ret;
 164                 else
 165                         return -EREMOTEIO;
 166         }
 167
 168         if (debug & DEBUG_I2C_READ)
 169                 deb_i2c_read("reg: 0x%04x, data: %*ph\n", reg, count, val);
 170
 171         return 0;
 172 }
 173
 174 static int si2165_readreg8(struct si2165_state *state,
 175                        const u16 reg, u8 *val)
 176 {
 177         int ret;
 178
 179         ret = si2165_read(state, reg, val, 1);
 180         deb_readreg("R(0x%04x)=0x%02x\n", reg, *val);
 181         return ret;
 182 }
 183
 184 static int si2165_readreg16(struct si2165_state *state,
 185                        const u16 reg, u16 *val)
 186 {
 187         u8 buf[2];
 188
 189         int ret = si2165_read(state, reg, buf, 2);
 190         *val = buf[0] | buf[1] << 8;
 191         deb_readreg("R(0x%04x)=0x%04x\n", reg, *val);
 192         return ret;
 193 }
 194
 195 static int si2165_writereg8(struct si2165_state *state, const u16 reg, u8 val)
 196 {
 197         return si2165_write(state, reg, &val, 1);
 198 }
 199
 200 static int si2165_writereg16(struct si2165_state *state, const u16 reg, u16 val)
 201 {
 202         u8 buf[2] = { val & 0xff, (val >> 8) & 0xff };
 203
 204         return si2165_write(state, reg, buf, 2);
 205 }
 206
 207 static int si2165_writereg24(struct si2165_state *state, const u16 reg, u32 val)
 208 {
 209         u8 buf[3] = { val & 0xff, (val >> 8) & 0xff, (val >> 16) & 0xff };
 210
 211         return si2165_write(state, reg, buf, 3);
 212 }
 213
 214 static int si2165_writereg32(struct si2165_state *state, const u16 reg, u32 val)
 215 {
 216         u8 buf[4] = {
 217                 val & 0xff,
 218                 (val >> 8) & 0xff,
 219                 (val >> 16) & 0xff,
 220                 (val >> 24) & 0xff
 221         };
 222         return si2165_write(state, reg, buf, 4);
 223 }
 224
 225 static int si2165_writereg_mask8(struct si2165_state *state, const u16 reg,
 226                                  u8 val, u8 mask)
 227 {
 228         int ret;
 229         u8 tmp;
 230
 231         if (mask != 0xff) {
 232                 ret = si2165_readreg8(state, reg, &tmp);
 233                 if (ret < 0)
 234                         goto err;
 235
 236                 val &= mask;
 237                 tmp &= ~mask;
 238                 val |= tmp;
 239         }
 240
 241         ret = si2165_writereg8(state, reg, val);
 242 err:
 243         return ret;
 244 }
 245
 246 static int si2165_get_tune_settings(struct dvb_frontend *fe,
 247                                     struct dvb_frontend_tune_settings *s)
 248 {
 249         s->min_delay_ms = 1000;
 250         return 0;
 251 }
 252
 253 static int si2165_init_pll(struct si2165_state *state)
 254 {
 255         u32 ref_freq_Hz = state->config.ref_freq_Hz;
 256         u8 divr = 1; /* 1..7 */
 257         u8 divp = 1; /* only 1 or 4 */
 258         u8 divn = 56; /* 1..63 */
 259         u8 divm = 8;
 260         u8 divl = 12;
 261         u8 buf[4];
 262
 263         /*
 264          * hardcoded values can be deleted if calculation is verified
 265          * or it yields the same values as the windows driver
 266          */
 267         switch (ref_freq_Hz) {
 268         case 16000000u:
 269                 divn = 56;
 270                 break;
 271         case 24000000u:
 272                 divr = 2;
 273                 divp = 4;
 274                 divn = 19;
 275                 break;
 276         default:
 277                 /* ref_freq / divr must be between 4 and 16 MHz */
 278                 if (ref_freq_Hz > 16000000u)
 279                         divr = 2;
 280
 281                 /*
 282                  * now select divn and divp such that
 283                  * fvco is in 1624..1824 MHz
 284                  */
 285                 if (1624000000u * divr > ref_freq_Hz * 2u * 63u)
 286                         divp = 4;
 287
 288                 /* is this already correct regarding rounding? */
 289                 divn = 1624000000u * divr / (ref_freq_Hz * 2u * divp);
 290                 break;
 291         }
 292
 293         /* adc_clk and sys_clk depend on xtal and pll settings */
 294         state->fvco_hz = ref_freq_Hz / divr
 295                         * 2u * divn * divp;
 296         state->adc_clk = state->fvco_hz / (divm * 4u);
 297         state->sys_clk = state->fvco_hz / (divl * 2u);
 298
 299         /* write pll registers 0x00a0..0x00a3 at once */
 300         buf[0] = divl;
 301         buf[1] = divm;
 302         buf[2] = (divn & 0x3f) | ((divp == 1) ? 0x40 : 0x00) | 0x80;
 303         buf[3] = divr;
 304         return si2165_write(state, 0x00a0, buf, 4);
 305 }
 306
 307 static int si2165_adjust_pll_divl(struct si2165_state *state, u8 divl)
 308 {
 309         state->sys_clk = state->fvco_hz / (divl * 2u);
 310         return si2165_writereg8(state, 0x00a0, divl); /* pll_divl */
 311 }
 312
 313 static u32 si2165_get_fe_clk(struct si2165_state *state)
 314 {
 315         /* assume Oversampling mode Ovr4 is used */
 316         return state->adc_clk;
 317 }
 318
 319 static int si2165_wait_init_done(struct si2165_state *state)
 320 {
 321         int ret = -EINVAL;
 322         u8 val = 0;
 323         int i;
 324
 325         for (i = 0; i < 3; ++i) {
 326                 si2165_readreg8(state, 0x0054, &val);
 327                 if (val == 0x01)
 328                         return 0;
 329                 usleep_range(1000, 50000);
 330         }
 331         dev_err(&state->i2c->dev, "%s: init_done was not set\n",
 332                 KBUILD_MODNAME);
 333         return ret;
 334 }
 335
 336 static int si2165_upload_firmware_block(struct si2165_state *state,
 337         const u8 *data, u32 len, u32 *poffset, u32 block_count)
 338 {
 339         int ret;
 340         u8 buf_ctrl[4] = { 0x00, 0x00, 0x00, 0xc0 };
 341         u8 wordcount;
 342         u32 cur_block = 0;
 343         u32 offset = poffset ? *poffset : 0;
 344
 345         if (len < 4)
 346                 return -EINVAL;
 347         if (len % 4 != 0)
 348                 return -EINVAL;
 349
 350         deb_fw_load(
 351                 "si2165_upload_firmware_block called with len=0x%x offset=0x%x blockcount=0x%x\n",
 352                                 len, offset, block_count);
 353         while (offset+12 <= len && cur_block < block_count) {
 354                 deb_fw_load(
 355                         "si2165_upload_firmware_block in while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
 356                                         len, offset, cur_block, block_count);
 357                 wordcount = data[offset];
 358                 if (wordcount < 1 || data[offset+1] ||
 359                     data[offset+2] || data[offset+3]) {
 360                         dev_warn(&state->i2c->dev,
 361                                  "%s: bad fw data[0..3] = %*ph\n",
 362                                 KBUILD_MODNAME, 4, data);
 363                         return -EINVAL;
 364                 }
 365
 366                 if (offset + 8 + wordcount * 4 > len) {
 367                         dev_warn(&state->i2c->dev,
 368                                  "%s: len is too small for block len=%d, wordcount=%d\n",
 369                                 KBUILD_MODNAME, len, wordcount);
 370                         return -EINVAL;
 371                 }
 372
 373                 buf_ctrl[0] = wordcount - 1;
 374
 375                 ret = si2165_write(state, 0x0364, buf_ctrl, 4);
 376                 if (ret < 0)
 377                         goto error;
 378                 ret = si2165_write(state, 0x0368, data+offset+4, 4);
 379                 if (ret < 0)
 380                         goto error;
 381
 382                 offset += 8;
 383
 384                 while (wordcount > 0) {
 385                         ret = si2165_write(state, 0x36c, data+offset, 4);
 386                         if (ret < 0)
 387                                 goto error;
 388                         wordcount--;
 389                         offset += 4;
 390                 }
 391                 cur_block++;
 392         }
 393
 394         deb_fw_load(
 395                 "si2165_upload_firmware_block after while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
 396                                 len, offset, cur_block, block_count);
 397
 398         if (poffset)
 399                 *poffset = offset;
 400
 401         deb_fw_load("si2165_upload_firmware_block returned offset=0x%x\n",
 402                                 offset);
 403
 404         return 0;
 405 error:
 406         return ret;
 407 }
 408
 409 static int si2165_upload_firmware(struct si2165_state *state)
 410 {
 411         /* int ret; */
 412         u8 val[3];
 413         u16 val16;
 414         int ret;
 415
 416         const struct firmware *fw = NULL;
 417         u8 *fw_file;
 418         const u8 *data;
 419         u32 len;
 420         u32 offset;
 421         u8 patch_version;
 422         u8 block_count;
 423         u16 crc_expected;
 424
 425         switch (state->chip_revcode) {
 426         case 0x03: /* revision D */
 427                 fw_file = SI2165_FIRMWARE_REV_D;
 428                 break;
 429         default:
 430                 dev_info(&state->i2c->dev, "%s: no firmware file for revision=%d\n",
 431                         KBUILD_MODNAME, state->chip_revcode);
 432                 return 0;
 433         }
 434
 435         /* request the firmware, this will block and timeout */
 436         ret = request_firmware(&fw, fw_file, state->i2c->dev.parent);
 437         if (ret) {
 438                 dev_warn(&state->i2c->dev, "%s: firmware file '%s' not found\n",
 439                                 KBUILD_MODNAME, fw_file);
 440                 goto error;
 441         }
 442
 443         data = fw->data;
 444         len = fw->size;
 445
 446         dev_info(&state->i2c->dev, "%s: downloading firmware from file '%s' size=%d\n",
 447                         KBUILD_MODNAME, fw_file, len);
 448
 449         if (len % 4 != 0) {
 450                 dev_warn(&state->i2c->dev, "%s: firmware size is not multiple of 4\n",
 451                                 KBUILD_MODNAME);
 452                 ret = -EINVAL;
 453                 goto error;
 454         }
 455
 456         /* check header (8 bytes) */
 457         if (len < 8) {
 458                 dev_warn(&state->i2c->dev, "%s: firmware header is missing\n",
 459                                 KBUILD_MODNAME);
 460                 ret = -EINVAL;
 461                 goto error;
 462         }
 463
 464         if (data[0] != 1 || data[1] != 0) {
 465                 dev_warn(&state->i2c->dev, "%s: firmware file version is wrong\n",
 466                                 KBUILD_MODNAME);
 467                 ret = -EINVAL;
 468                 goto error;
 469         }
 470
 471         patch_version = data[2];
 472         block_count = data[4];
 473         crc_expected = data[7] << 8 | data[6];
 474
 475         /* start uploading fw */
 476         /* boot/wdog status */
 477         ret = si2165_writereg8(state, 0x0341, 0x00);
 478         if (ret < 0)
 479                 goto error;
 480         /* reset */
 481         ret = si2165_writereg8(state, 0x00c0, 0x00);
 482         if (ret < 0)
 483                 goto error;
 484         /* boot/wdog status */
 485         ret = si2165_readreg8(state, 0x0341, val);
 486         if (ret < 0)
 487                 goto error;
 488
 489         /* enable reset on error */
 490         ret = si2165_readreg8(state, 0x035c, val);
 491         if (ret < 0)
 492                 goto error;
 493         ret = si2165_readreg8(state, 0x035c, val);
 494         if (ret < 0)
 495                 goto error;
 496         ret = si2165_writereg8(state, 0x035c, 0x02);
 497         if (ret < 0)
 498                 goto error;
 499
 500         /* start right after the header */
 501         offset = 8;
 502
 503         dev_info(&state->i2c->dev, "%s: si2165_upload_firmware extracted patch_version=0x%02x, block_count=0x%02x, crc_expected=0x%04x\n",
 504                 KBUILD_MODNAME, patch_version, block_count, crc_expected);
 505
 506         ret = si2165_upload_firmware_block(state, data, len, &offset, 1);
 507         if (ret < 0)
 508                 goto error;
 509
 510         ret = si2165_writereg8(state, 0x0344, patch_version);
 511         if (ret < 0)
 512                 goto error;
 513
 514         /* reset crc */
 515         ret = si2165_writereg8(state, 0x0379, 0x01);
 516         if (ret)
 517                 goto error;
 518
 519         ret = si2165_upload_firmware_block(state, data, len,
 520                                            &offset, block_count);
 521         if (ret < 0) {
 522                 dev_err(&state->i2c->dev,
 523                         "%s: firmare could not be uploaded\n",
 524                         KBUILD_MODNAME);
 525                 goto error;
 526         }
 527
 528         /* read crc */
 529         ret = si2165_readreg16(state, 0x037a, &val16);
 530         if (ret)
 531                 goto error;
 532
 533         if (val16 != crc_expected) {
 534                 dev_err(&state->i2c->dev,
 535                         "%s: firmware crc mismatch %04x != %04x\n",
 536                         KBUILD_MODNAME, val16, crc_expected);
 537                 ret = -EINVAL;
 538                 goto error;
 539         }
 540
 541         ret = si2165_upload_firmware_block(state, data, len, &offset, 5);
 542         if (ret)
 543                 goto error;
 544
 545         if (len != offset) {
 546                 dev_err(&state->i2c->dev,
 547                         "%s: firmare len mismatch %04x != %04x\n",
 548                         KBUILD_MODNAME, len, offset);
 549                 ret = -EINVAL;
 550                 goto error;
 551         }
 552
 553         /* reset watchdog error register */
 554         ret = si2165_writereg_mask8(state, 0x0341, 0x02, 0x02);
 555         if (ret < 0)
 556                 goto error;
 557
 558         /* enable reset on error */
 559         ret = si2165_writereg_mask8(state, 0x035c, 0x01, 0x01);
 560         if (ret < 0)
 561                 goto error;
 562
 563         dev_info(&state->i2c->dev, "%s: fw load finished\n", KBUILD_MODNAME);
 564
 565         ret = 0;
 566         state->firmware_loaded = true;
 567 error:
 568         if (fw) {
 569                 release_firmware(fw);
 570                 fw = NULL;
 571         }
 572
 573         return ret;
 574 }
 575
 576 static int si2165_init(struct dvb_frontend *fe)
 577 {
 578         int ret = 0;
 579         struct si2165_state *state = fe->demodulator_priv;
 580         u8 val;
 581         u8 patch_version = 0x00;
 582
 583         dprintk("%s: called\n", __func__);
 584
 585         /* powerup */
 586         ret = si2165_writereg8(state, 0x0000, state->config.chip_mode);
 587         if (ret < 0)
 588                 goto error;
 589         /* dsp_clock_enable */
 590         ret = si2165_writereg8(state, 0x0104, 0x01);
 591         if (ret < 0)
 592                 goto error;
 593         ret = si2165_readreg8(state, 0x0000, &val); /* verify chip_mode */
 594         if (ret < 0)
 595                 goto error;
 596         if (val != state->config.chip_mode) {
 597                 dev_err(&state->i2c->dev, "%s: could not set chip_mode\n",
 598                         KBUILD_MODNAME);
 599                 return -EINVAL;
 600         }
 601
 602         /* agc */
 603         ret = si2165_writereg8(state, 0x018b, 0x00);
 604         if (ret < 0)
 605                 goto error;
 606         ret = si2165_writereg8(state, 0x0190, 0x01);
 607         if (ret < 0)
 608                 goto error;
 609         ret = si2165_writereg8(state, 0x0170, 0x00);
 610         if (ret < 0)
 611                 goto error;
 612         ret = si2165_writereg8(state, 0x0171, 0x07);
 613         if (ret < 0)
 614                 goto error;
 615         /* rssi pad */
 616         ret = si2165_writereg8(state, 0x0646, 0x00);
 617         if (ret < 0)
 618                 goto error;
 619         ret = si2165_writereg8(state, 0x0641, 0x00);
 620         if (ret < 0)
 621                 goto error;
 622
 623         ret = si2165_init_pll(state);
 624         if (ret < 0)
 625                 goto error;
 626
 627         /* enable chip_init */
 628         ret = si2165_writereg8(state, 0x0050, 0x01);
 629         if (ret < 0)
 630                 goto error;
 631         /* set start_init */
 632         ret = si2165_writereg8(state, 0x0096, 0x01);
 633         if (ret < 0)
 634                 goto error;
 635         ret = si2165_wait_init_done(state);
 636         if (ret < 0)
 637                 goto error;
 638
 639         /* disable chip_init */
 640         ret = si2165_writereg8(state, 0x0050, 0x00);
 641         if (ret < 0)
 642                 goto error;
 643
 644         /* ber_pkt */
 645         ret = si2165_writereg16(state, 0x0470, 0x7530);
 646         if (ret < 0)
 647                 goto error;
 648
 649         ret = si2165_readreg8(state, 0x0344, &patch_version);
 650         if (ret < 0)
 651                 goto error;
 652
 653         ret = si2165_writereg8(state, 0x00cb, 0x00);
 654         if (ret < 0)
 655                 goto error;
 656
 657         /* dsp_addr_jump */
 658         ret = si2165_writereg32(state, 0x0348, 0xf4000000);
 659         if (ret < 0)
 660                 goto error;
 661         /* boot/wdog status */
 662         ret = si2165_readreg8(state, 0x0341, &val);
 663         if (ret < 0)
 664                 goto error;
 665
 666         if (patch_version == 0x00) {
 667                 ret = si2165_upload_firmware(state);
 668                 if (ret < 0)
 669                         goto error;
 670         }
 671
 672         /* write adc values after each reset*/
 673         ret = si2165_writereg8(state, 0x012a, 0x46);
 674         if (ret < 0)
 675                 goto error;
 676         ret = si2165_writereg8(state, 0x012c, 0x00);
 677         if (ret < 0)
 678                 goto error;
 679         ret = si2165_writereg8(state, 0x012e, 0x0a);
 680         if (ret < 0)
 681                 goto error;
 682         ret = si2165_writereg8(state, 0x012f, 0xff);
 683         if (ret < 0)
 684                 goto error;
 685         ret = si2165_writereg8(state, 0x0123, 0x70);
 686         if (ret < 0)
 687                 goto error;
 688
 689         return 0;
 690 error:
 691         return ret;
 692 }
 693
 694 static int si2165_sleep(struct dvb_frontend *fe)
 695 {
 696         int ret;
 697         struct si2165_state *state = fe->demodulator_priv;
 698
 699         /* dsp clock disable */
 700         ret = si2165_writereg8(state, 0x0104, 0x00);
 701         if (ret < 0)
 702                 return ret;
 703         /* chip mode */
 704         ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF);
 705         if (ret < 0)
 706                 return ret;
 707         return 0;
 708 }
 709
 710 static int si2165_read_status(struct dvb_frontend *fe, enum fe_status *status)
 711 {
 712         int ret;
 713         u8 fec_lock = 0;
 714         struct si2165_state *state = fe->demodulator_priv;
 715
 716         if (!state->has_dvbt)
 717                 return -EINVAL;
 718
 719         /* check fec_lock */
 720         ret = si2165_readreg8(state, 0x4e0, &fec_lock);
 721         if (ret < 0)
 722                 return ret;
 723         *status = 0;
 724         if (fec_lock & 0x01) {
 725                 *status |= FE_HAS_SIGNAL;
 726                 *status |= FE_HAS_CARRIER;
 727                 *status |= FE_HAS_VITERBI;
 728                 *status |= FE_HAS_SYNC;
 729                 *status |= FE_HAS_LOCK;
 730         }
 731
 732         return 0;
 733 }
 734
 735 static int si2165_set_oversamp(struct si2165_state *state, u32 dvb_rate)
 736 {
 737         u64 oversamp;
 738         u32 reg_value;
 739
 740         oversamp = si2165_get_fe_clk(state);
 741         oversamp <<= 23;
 742         do_div(oversamp, dvb_rate);
 743         reg_value = oversamp & 0x3fffffff;
 744
 745         /* oversamp, usbdump contained 0x03100000; */
 746         return si2165_writereg32(state, 0x00e4, reg_value);
 747 }
 748
 749 static int si2165_set_if_freq_shift(struct si2165_state *state, u32 IF)
 750 {
 751         u64 if_freq_shift;
 752         s32 reg_value = 0;
 753         u32 fe_clk = si2165_get_fe_clk(state);
 754
 755         if_freq_shift = IF;
 756         if_freq_shift <<= 29;
 757
 758         do_div(if_freq_shift, fe_clk);
 759         reg_value = (s32)if_freq_shift;
 760
 761         if (state->config.inversion)
 762                 reg_value = -reg_value;
 763
 764         reg_value = reg_value & 0x1fffffff;
 765
 766         /* if_freq_shift, usbdump contained 0x023ee08f; */
 767         return si2165_writereg32(state, 0x00e8, reg_value);
 768 }
 769
 770 static int si2165_set_parameters(struct dvb_frontend *fe)
 771 {
 772         int ret;
 773         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 774         struct si2165_state *state = fe->demodulator_priv;
 775         u8 val[3];
 776         u32 IF;
 777         u32 dvb_rate = 0;
 778         u16 bw10k;
 779
 780         dprintk("%s: called\n", __func__);
 781
 782         if (!fe->ops.tuner_ops.get_if_frequency) {
 783                 dev_err(&state->i2c->dev,
 784                         "%s: Error: get_if_frequency() not defined at tuner. Can't work without it!\n",
 785                         KBUILD_MODNAME);
 786                 return -EINVAL;
 787         }
 788
 789         if (!state->has_dvbt)
 790                 return -EINVAL;
 791
 792         if (p->bandwidth_hz > 0) {
 793                 dvb_rate = p->bandwidth_hz * 8 / 7;
 794                 bw10k = p->bandwidth_hz / 10000;
 795         } else {
 796                 dvb_rate = 8 * 8 / 7;
 797                 bw10k = 800;
 798         }
 799
 800         /* standard = DVB-T */
 801         ret = si2165_writereg8(state, 0x00ec, 0x01);
 802         if (ret < 0)
 803                 return ret;
 804         ret = si2165_adjust_pll_divl(state, 12);
 805         if (ret < 0)
 806                 return ret;
 807
 808         fe->ops.tuner_ops.get_if_frequency(fe, &IF);
 809         ret = si2165_set_if_freq_shift(state, IF);
 810         if (ret < 0)
 811                 return ret;
 812         ret = si2165_writereg8(state, 0x08f8, 0x00);
 813         if (ret < 0)
 814                 return ret;
 815         /* ts output config */
 816         ret = si2165_writereg8(state, 0x04e4, 0x20);
 817         if (ret < 0)
 818                 return ret;
 819         ret = si2165_writereg16(state, 0x04ef, 0x00fe);
 820         if (ret < 0)
 821                 return ret;
 822         ret = si2165_writereg24(state, 0x04f4, 0x555555);
 823         if (ret < 0)
 824                 return ret;
 825         ret = si2165_writereg8(state, 0x04e5, 0x01);
 826         if (ret < 0)
 827                 return ret;
 828         /* bandwidth in 10KHz steps */
 829         ret = si2165_writereg16(state, 0x0308, bw10k);
 830         if (ret < 0)
 831                 return ret;
 832         ret = si2165_set_oversamp(state, dvb_rate);
 833         if (ret < 0)
 834                 return ret;
 835         /* impulsive_noise_remover */
 836         ret = si2165_writereg8(state, 0x031c, 0x01);
 837         if (ret < 0)
 838                 return ret;
 839         ret = si2165_writereg8(state, 0x00cb, 0x00);
 840         if (ret < 0)
 841                 return ret;
 842         /* agc2 */
 843         ret = si2165_writereg8(state, 0x016e, 0x41);
 844         if (ret < 0)
 845                 return ret;
 846         ret = si2165_writereg8(state, 0x016c, 0x0e);
 847         if (ret < 0)
 848                 return ret;
 849         ret = si2165_writereg8(state, 0x016d, 0x10);
 850         if (ret < 0)
 851                 return ret;
 852         /* agc */
 853         ret = si2165_writereg8(state, 0x015b, 0x03);
 854         if (ret < 0)
 855                 return ret;
 856         ret = si2165_writereg8(state, 0x0150, 0x78);
 857         if (ret < 0)
 858                 return ret;
 859         /* agc */
 860         ret = si2165_writereg8(state, 0x01a0, 0x78);
 861         if (ret < 0)
 862                 return ret;
 863         ret = si2165_writereg8(state, 0x01c8, 0x68);
 864         if (ret < 0)
 865                 return ret;
 866         /* freq_sync_range */
 867         ret = si2165_writereg16(state, 0x030c, 0x0064);
 868         if (ret < 0)
 869                 return ret;
 870         /* gp_reg0 */
 871         ret = si2165_readreg8(state, 0x0387, val);
 872         if (ret < 0)
 873                 return ret;
 874         ret = si2165_writereg8(state, 0x0387, 0x00);
 875         if (ret < 0)
 876                 return ret;
 877         /* dsp_addr_jump */
 878         ret = si2165_writereg32(state, 0x0348, 0xf4000000);
 879         if (ret < 0)
 880                 return ret;
 881
 882         if (fe->ops.tuner_ops.set_params)
 883                 fe->ops.tuner_ops.set_params(fe);
 884
 885         /* recalc if_freq_shift if IF might has changed */
 886         fe->ops.tuner_ops.get_if_frequency(fe, &IF);
 887         ret = si2165_set_if_freq_shift(state, IF);
 888         if (ret < 0)
 889                 return ret;
 890
 891         /* boot/wdog status */
 892         ret = si2165_readreg8(state, 0x0341, val);
 893         if (ret < 0)
 894                 return ret;
 895         ret = si2165_writereg8(state, 0x0341, 0x00);
 896         if (ret < 0)
 897                 return ret;
 898         /* reset all */
 899         ret = si2165_writereg8(state, 0x00c0, 0x00);
 900         if (ret < 0)
 901                 return ret;
 902         /* gp_reg0 */
 903         ret = si2165_writereg32(state, 0x0384, 0x00000000);
 904         if (ret < 0)
 905                 return ret;
 906         /* start_synchro */
 907         ret = si2165_writereg8(state, 0x02e0, 0x01);
 908         if (ret < 0)
 909                 return ret;
 910         /* boot/wdog status */
 911         ret = si2165_readreg8(state, 0x0341, val);
 912         if (ret < 0)
 913                 return ret;
 914
 915         return 0;
 916 }
 917
 918 static void si2165_release(struct dvb_frontend *fe)
 919 {
 920         struct si2165_state *state = fe->demodulator_priv;
 921
 922         dprintk("%s: called\n", __func__);
 923         kfree(state);
 924 }
 925
 926 static struct dvb_frontend_ops si2165_ops = {
 927         .info = {
 928                 .name = "Silicon Labs ",
 929                 .caps = FE_CAN_FEC_1_2 |
 930                         FE_CAN_FEC_2_3 |
 931                         FE_CAN_FEC_3_4 |
 932                         FE_CAN_FEC_5_6 |
 933                         FE_CAN_FEC_7_8 |
 934                         FE_CAN_FEC_AUTO |
 935                         FE_CAN_QPSK |
 936                         FE_CAN_QAM_16 |
 937                         FE_CAN_QAM_32 |
 938                         FE_CAN_QAM_64 |
 939                         FE_CAN_QAM_128 |
 940                         FE_CAN_QAM_256 |
 941                         FE_CAN_QAM_AUTO |
 942                         FE_CAN_TRANSMISSION_MODE_AUTO |
 943                         FE_CAN_GUARD_INTERVAL_AUTO |
 944                         FE_CAN_HIERARCHY_AUTO |
 945                         FE_CAN_MUTE_TS |
 946                         FE_CAN_TRANSMISSION_MODE_AUTO |
 947                         FE_CAN_RECOVER
 948         },
 949
 950         .get_tune_settings = si2165_get_tune_settings,
 951
 952         .init = si2165_init,
 953         .sleep = si2165_sleep,
 954
 955         .set_frontend      = si2165_set_parameters,
 956         .read_status       = si2165_read_status,
 957
 958         .release = si2165_release,
 959 };
 960
 961 struct dvb_frontend *si2165_attach(const struct si2165_config *config,
 962                                    struct i2c_adapter *i2c)
 963 {
 964         struct si2165_state *state = NULL;
 965         int n;
 966         int io_ret;
 967         u8 val;
 968         char rev_char;
 969         const char *chip_name;
 970
 971         if (config == NULL || i2c == NULL)
 972                 goto error;
 973
 974         /* allocate memory for the internal state */
 975         state = kzalloc(sizeof(struct si2165_state), GFP_KERNEL);
 976         if (state == NULL)
 977                 goto error;
 978
 979         /* setup the state */
 980         state->i2c = i2c;
 981         state->config = *config;
 982
 983         if (state->config.ref_freq_Hz < 4000000
 984             || state->config.ref_freq_Hz > 27000000) {
 985                 dev_err(&state->i2c->dev, "%s: ref_freq of %d Hz not supported by this driver\n",
 986                          KBUILD_MODNAME, state->config.ref_freq_Hz);
 987                 goto error;
 988         }
 989
 990         /* create dvb_frontend */
 991         memcpy(&state->fe.ops, &si2165_ops,
 992                 sizeof(struct dvb_frontend_ops));
 993         state->fe.demodulator_priv = state;
 994
 995         /* powerup */
 996         io_ret = si2165_writereg8(state, 0x0000, state->config.chip_mode);
 997         if (io_ret < 0)
 998                 goto error;
 999
1000         io_ret = si2165_readreg8(state, 0x0000, &val);
1001         if (io_ret < 0)
1002                 goto error;
1003         if (val != state->config.chip_mode)
1004                 goto error;
1005
1006         io_ret = si2165_readreg8(state, 0x0023, &state->chip_revcode);
1007         if (io_ret < 0)
1008                 goto error;
1009
1010         io_ret = si2165_readreg8(state, 0x0118, &state->chip_type);
1011         if (io_ret < 0)
1012                 goto error;
1013
1014         /* powerdown */
1015         io_ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF);
1016         if (io_ret < 0)
1017                 goto error;
1018
1019         if (state->chip_revcode < 26)
1020                 rev_char = 'A' + state->chip_revcode;
1021         else
1022                 rev_char = '?';
1023
1024         switch (state->chip_type) {
1025         case 0x06:
1026                 chip_name = "Si2161";
1027                 state->has_dvbt = true;
1028                 break;
1029         case 0x07:
1030                 chip_name = "Si2165";
1031                 state->has_dvbt = true;
1032                 state->has_dvbc = true;
1033                 break;
1034         default:
1035                 dev_err(&state->i2c->dev, "%s: Unsupported Silicon Labs chip (type %d, rev %d)\n",
1036                         KBUILD_MODNAME, state->chip_type, state->chip_revcode);
1037                 goto error;
1038         }
1039
1040         dev_info(&state->i2c->dev,
1041                 "%s: Detected Silicon Labs %s-%c (type %d, rev %d)\n",
1042                 KBUILD_MODNAME, chip_name, rev_char, state->chip_type,
1043                 state->chip_revcode);
1044
1045         strlcat(state->fe.ops.info.name, chip_name,
1046                         sizeof(state->fe.ops.info.name));
1047
1048         n = 0;
1049         if (state->has_dvbt) {
1050                 state->fe.ops.delsys[n++] = SYS_DVBT;
1051                 strlcat(state->fe.ops.info.name, " DVB-T",
1052                         sizeof(state->fe.ops.info.name));
1053         }
1054         if (state->has_dvbc)
1055                 dev_warn(&state->i2c->dev, "%s: DVB-C is not yet supported.\n",
1056                        KBUILD_MODNAME);
1057
1058         return &state->fe;
1059
1060 error:
1061         kfree(state);
1062         return NULL;
1063 }
1064 EXPORT_SYMBOL(si2165_attach);
1065
1066 module_param(debug, int, 0644);
1067 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1068
1069 MODULE_DESCRIPTION("Silicon Labs Si2165 DVB-C/-T Demodulator driver");
1070 MODULE_AUTHOR("Matthias Schwarzott <zzam@gentoo.org>");
1071 MODULE_LICENSE("GPL");
1072 MODULE_FIRMWARE(SI2165_FIRMWARE_REV_D);