drivers/media/pci/cx88/cx88-video.c

   1 /*
   2  *
   3  * device driver for Conexant 2388x based TV cards
   4  * video4linux video interface
   5  *
   6  * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
   7  *
   8  * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
   9  *      - Multituner support
  10  *      - video_ioctl2 conversion
  11  *      - PAL/M fixes
  12  *
  13  *  This program is free software; you can redistribute it and/or modify
  14  *  it under the terms of the GNU General Public License as published by
  15  *  the Free Software Foundation; either version 2 of the License, or
  16  *  (at your option) any later version.
  17  *
  18  *  This program is distributed in the hope that it will be useful,
  19  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  *  GNU General Public License for more details.
  22  *
  23  *  You should have received a copy of the GNU General Public License
  24  *  along with this program; if not, write to the Free Software
  25  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26  */
  27
  28 #include <linux/init.h>
  29 #include <linux/list.h>
  30 #include <linux/module.h>
  31 #include <linux/kmod.h>
  32 #include <linux/kernel.h>
  33 #include <linux/slab.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/delay.h>
  37 #include <linux/kthread.h>
  38 #include <asm/div64.h>
  39
  40 #include "cx88.h"
  41 #include <media/v4l2-common.h>
  42 #include <media/v4l2-ioctl.h>
  43 #include <media/v4l2-event.h>
  44 #include <media/i2c/wm8775.h>
  45
  46 MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  47 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  48 MODULE_LICENSE("GPL");
  49 MODULE_VERSION(CX88_VERSION);
  50
  51 /* ------------------------------------------------------------------ */
  52
  53 static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  54 static unsigned int vbi_nr[]   = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  55 static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  56
  57 module_param_array(video_nr, int, NULL, 0444);
  58 module_param_array(vbi_nr,   int, NULL, 0444);
  59 module_param_array(radio_nr, int, NULL, 0444);
  60
  61 MODULE_PARM_DESC(video_nr,"video device numbers");
  62 MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
  63 MODULE_PARM_DESC(radio_nr,"radio device numbers");
  64
  65 static unsigned int video_debug;
  66 module_param(video_debug,int,0644);
  67 MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
  68
  69 static unsigned int irq_debug;
  70 module_param(irq_debug,int,0644);
  71 MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
  72
  73 #define dprintk(level,fmt, arg...)      if (video_debug >= level) \
  74         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  75
  76 /* ------------------------------------------------------------------- */
  77 /* static data                                                         */
  78
  79 static const struct cx8800_fmt formats[] = {
  80         {
  81                 .name     = "8 bpp, gray",
  82                 .fourcc   = V4L2_PIX_FMT_GREY,
  83                 .cxformat = ColorFormatY8,
  84                 .depth    = 8,
  85                 .flags    = FORMAT_FLAGS_PACKED,
  86         },{
  87                 .name     = "15 bpp RGB, le",
  88                 .fourcc   = V4L2_PIX_FMT_RGB555,
  89                 .cxformat = ColorFormatRGB15,
  90                 .depth    = 16,
  91                 .flags    = FORMAT_FLAGS_PACKED,
  92         },{
  93                 .name     = "15 bpp RGB, be",
  94                 .fourcc   = V4L2_PIX_FMT_RGB555X,
  95                 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  96                 .depth    = 16,
  97                 .flags    = FORMAT_FLAGS_PACKED,
  98         },{
  99                 .name     = "16 bpp RGB, le",
 100                 .fourcc   = V4L2_PIX_FMT_RGB565,
 101                 .cxformat = ColorFormatRGB16,
 102                 .depth    = 16,
 103                 .flags    = FORMAT_FLAGS_PACKED,
 104         },{
 105                 .name     = "16 bpp RGB, be",
 106                 .fourcc   = V4L2_PIX_FMT_RGB565X,
 107                 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
 108                 .depth    = 16,
 109                 .flags    = FORMAT_FLAGS_PACKED,
 110         },{
 111                 .name     = "24 bpp RGB, le",
 112                 .fourcc   = V4L2_PIX_FMT_BGR24,
 113                 .cxformat = ColorFormatRGB24,
 114                 .depth    = 24,
 115                 .flags    = FORMAT_FLAGS_PACKED,
 116         },{
 117                 .name     = "32 bpp RGB, le",
 118                 .fourcc   = V4L2_PIX_FMT_BGR32,
 119                 .cxformat = ColorFormatRGB32,
 120                 .depth    = 32,
 121                 .flags    = FORMAT_FLAGS_PACKED,
 122         },{
 123                 .name     = "32 bpp RGB, be",
 124                 .fourcc   = V4L2_PIX_FMT_RGB32,
 125                 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
 126                 .depth    = 32,
 127                 .flags    = FORMAT_FLAGS_PACKED,
 128         },{
 129                 .name     = "4:2:2, packed, YUYV",
 130                 .fourcc   = V4L2_PIX_FMT_YUYV,
 131                 .cxformat = ColorFormatYUY2,
 132                 .depth    = 16,
 133                 .flags    = FORMAT_FLAGS_PACKED,
 134         },{
 135                 .name     = "4:2:2, packed, UYVY",
 136                 .fourcc   = V4L2_PIX_FMT_UYVY,
 137                 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
 138                 .depth    = 16,
 139                 .flags    = FORMAT_FLAGS_PACKED,
 140         },
 141 };
 142
 143 static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
 144 {
 145         unsigned int i;
 146
 147         for (i = 0; i < ARRAY_SIZE(formats); i++)
 148                 if (formats[i].fourcc == fourcc)
 149                         return formats+i;
 150         return NULL;
 151 }
 152
 153 /* ------------------------------------------------------------------- */
 154
 155 struct cx88_ctrl {
 156         /* control information */
 157         u32 id;
 158         s32 minimum;
 159         s32 maximum;
 160         u32 step;
 161         s32 default_value;
 162
 163         /* control register information */
 164         u32 off;
 165         u32 reg;
 166         u32 sreg;
 167         u32 mask;
 168         u32 shift;
 169 };
 170
 171 static const struct cx88_ctrl cx8800_vid_ctls[] = {
 172         /* --- video --- */
 173         {
 174                 .id            = V4L2_CID_BRIGHTNESS,
 175                 .minimum       = 0x00,
 176                 .maximum       = 0xff,
 177                 .step          = 1,
 178                 .default_value = 0x7f,
 179                 .off           = 128,
 180                 .reg           = MO_CONTR_BRIGHT,
 181                 .mask          = 0x00ff,
 182                 .shift         = 0,
 183         },{
 184                 .id            = V4L2_CID_CONTRAST,
 185                 .minimum       = 0,
 186                 .maximum       = 0xff,
 187                 .step          = 1,
 188                 .default_value = 0x3f,
 189                 .off           = 0,
 190                 .reg           = MO_CONTR_BRIGHT,
 191                 .mask          = 0xff00,
 192                 .shift         = 8,
 193         },{
 194                 .id            = V4L2_CID_HUE,
 195                 .minimum       = 0,
 196                 .maximum       = 0xff,
 197                 .step          = 1,
 198                 .default_value = 0x7f,
 199                 .off           = 128,
 200                 .reg           = MO_HUE,
 201                 .mask          = 0x00ff,
 202                 .shift         = 0,
 203         },{
 204                 /* strictly, this only describes only U saturation.
 205                  * V saturation is handled specially through code.
 206                  */
 207                 .id            = V4L2_CID_SATURATION,
 208                 .minimum       = 0,
 209                 .maximum       = 0xff,
 210                 .step          = 1,
 211                 .default_value = 0x7f,
 212                 .off           = 0,
 213                 .reg           = MO_UV_SATURATION,
 214                 .mask          = 0x00ff,
 215                 .shift         = 0,
 216         }, {
 217                 .id            = V4L2_CID_SHARPNESS,
 218                 .minimum       = 0,
 219                 .maximum       = 4,
 220                 .step          = 1,
 221                 .default_value = 0x0,
 222                 .off           = 0,
 223                 /* NOTE: the value is converted and written to both even
 224                    and odd registers in the code */
 225                 .reg           = MO_FILTER_ODD,
 226                 .mask          = 7 << 7,
 227                 .shift         = 7,
 228         }, {
 229                 .id            = V4L2_CID_CHROMA_AGC,
 230                 .minimum       = 0,
 231                 .maximum       = 1,
 232                 .default_value = 0x1,
 233                 .reg           = MO_INPUT_FORMAT,
 234                 .mask          = 1 << 10,
 235                 .shift         = 10,
 236         }, {
 237                 .id            = V4L2_CID_COLOR_KILLER,
 238                 .minimum       = 0,
 239                 .maximum       = 1,
 240                 .default_value = 0x1,
 241                 .reg           = MO_INPUT_FORMAT,
 242                 .mask          = 1 << 9,
 243                 .shift         = 9,
 244         }, {
 245                 .id            = V4L2_CID_BAND_STOP_FILTER,
 246                 .minimum       = 0,
 247                 .maximum       = 1,
 248                 .step          = 1,
 249                 .default_value = 0x0,
 250                 .off           = 0,
 251                 .reg           = MO_HTOTAL,
 252                 .mask          = 3 << 11,
 253                 .shift         = 11,
 254         }
 255 };
 256
 257 static const struct cx88_ctrl cx8800_aud_ctls[] = {
 258         {
 259                 /* --- audio --- */
 260                 .id            = V4L2_CID_AUDIO_MUTE,
 261                 .minimum       = 0,
 262                 .maximum       = 1,
 263                 .default_value = 1,
 264                 .reg           = AUD_VOL_CTL,
 265                 .sreg          = SHADOW_AUD_VOL_CTL,
 266                 .mask          = (1 << 6),
 267                 .shift         = 6,
 268         },{
 269                 .id            = V4L2_CID_AUDIO_VOLUME,
 270                 .minimum       = 0,
 271                 .maximum       = 0x3f,
 272                 .step          = 1,
 273                 .default_value = 0x3f,
 274                 .reg           = AUD_VOL_CTL,
 275                 .sreg          = SHADOW_AUD_VOL_CTL,
 276                 .mask          = 0x3f,
 277                 .shift         = 0,
 278         },{
 279                 .id            = V4L2_CID_AUDIO_BALANCE,
 280                 .minimum       = 0,
 281                 .maximum       = 0x7f,
 282                 .step          = 1,
 283                 .default_value = 0x40,
 284                 .reg           = AUD_BAL_CTL,
 285                 .sreg          = SHADOW_AUD_BAL_CTL,
 286                 .mask          = 0x7f,
 287                 .shift         = 0,
 288         }
 289 };
 290
 291 enum {
 292         CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
 293         CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
 294 };
 295
 296 /* ------------------------------------------------------------------ */
 297
 298 int cx88_video_mux(struct cx88_core *core, unsigned int input)
 299 {
 300         /* struct cx88_core *core = dev->core; */
 301
 302         dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
 303                 input, INPUT(input).vmux,
 304                 INPUT(input).gpio0,INPUT(input).gpio1,
 305                 INPUT(input).gpio2,INPUT(input).gpio3);
 306         core->input = input;
 307         cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
 308         cx_write(MO_GP3_IO, INPUT(input).gpio3);
 309         cx_write(MO_GP0_IO, INPUT(input).gpio0);
 310         cx_write(MO_GP1_IO, INPUT(input).gpio1);
 311         cx_write(MO_GP2_IO, INPUT(input).gpio2);
 312
 313         switch (INPUT(input).type) {
 314         case CX88_VMUX_SVIDEO:
 315                 cx_set(MO_AFECFG_IO,    0x00000001);
 316                 cx_set(MO_INPUT_FORMAT, 0x00010010);
 317                 cx_set(MO_FILTER_EVEN,  0x00002020);
 318                 cx_set(MO_FILTER_ODD,   0x00002020);
 319                 break;
 320         default:
 321                 cx_clear(MO_AFECFG_IO,    0x00000001);
 322                 cx_clear(MO_INPUT_FORMAT, 0x00010010);
 323                 cx_clear(MO_FILTER_EVEN,  0x00002020);
 324                 cx_clear(MO_FILTER_ODD,   0x00002020);
 325                 break;
 326         }
 327
 328         /* if there are audioroutes defined, we have an external
 329            ADC to deal with audio */
 330         if (INPUT(input).audioroute) {
 331                 /* The wm8775 module has the "2" route hardwired into
 332                    the initialization. Some boards may use different
 333                    routes for different inputs. HVR-1300 surely does */
 334                 if (core->sd_wm8775) {
 335                         call_all(core, audio, s_routing,
 336                                  INPUT(input).audioroute, 0, 0);
 337                 }
 338                 /* cx2388's C-ADC is connected to the tuner only.
 339                    When used with S-Video, that ADC is busy dealing with
 340                    chroma, so an external must be used for baseband audio */
 341                 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
 342                     INPUT(input).type != CX88_VMUX_CABLE) {
 343                         /* "I2S ADC mode" */
 344                         core->tvaudio = WW_I2SADC;
 345                         cx88_set_tvaudio(core);
 346                 } else {
 347                         /* Normal mode */
 348                         cx_write(AUD_I2SCNTL, 0x0);
 349                         cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
 350                 }
 351         }
 352
 353         return 0;
 354 }
 355 EXPORT_SYMBOL(cx88_video_mux);
 356
 357 /* ------------------------------------------------------------------ */
 358
 359 static int start_video_dma(struct cx8800_dev    *dev,
 360                            struct cx88_dmaqueue *q,
 361                            struct cx88_buffer   *buf)
 362 {
 363         struct cx88_core *core = dev->core;
 364
 365         /* setup fifo + format */
 366         cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
 367                                 buf->bpl, buf->risc.dma);
 368         cx88_set_scale(core, core->width, core->height, core->field);
 369         cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma);
 370
 371         /* reset counter */
 372         cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
 373         q->count = 0;
 374
 375         /* enable irqs */
 376         cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
 377
 378         /* Enables corresponding bits at PCI_INT_STAT:
 379                 bits 0 to 4: video, audio, transport stream, VIP, Host
 380                 bit 7: timer
 381                 bits 8 and 9: DMA complete for: SRC, DST
 382                 bits 10 and 11: BERR signal asserted for RISC: RD, WR
 383                 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
 384          */
 385         cx_set(MO_VID_INTMSK, 0x0f0011);
 386
 387         /* enable capture */
 388         cx_set(VID_CAPTURE_CONTROL,0x06);
 389
 390         /* start dma */
 391         cx_set(MO_DEV_CNTRL2, (1<<5));
 392         cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
 393
 394         return 0;
 395 }
 396
 397 #ifdef CONFIG_PM
 398 static int stop_video_dma(struct cx8800_dev    *dev)
 399 {
 400         struct cx88_core *core = dev->core;
 401
 402         /* stop dma */
 403         cx_clear(MO_VID_DMACNTRL, 0x11);
 404
 405         /* disable capture */
 406         cx_clear(VID_CAPTURE_CONTROL,0x06);
 407
 408         /* disable irqs */
 409         cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
 410         cx_clear(MO_VID_INTMSK, 0x0f0011);
 411         return 0;
 412 }
 413
 414 static int restart_video_queue(struct cx8800_dev    *dev,
 415                                struct cx88_dmaqueue *q)
 416 {
 417         struct cx88_core *core = dev->core;
 418         struct cx88_buffer *buf;
 419
 420         if (!list_empty(&q->active)) {
 421                 buf = list_entry(q->active.next, struct cx88_buffer, list);
 422                 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
 423                         buf, buf->vb.vb2_buf.index);
 424                 start_video_dma(dev, q, buf);
 425         }
 426         return 0;
 427 }
 428 #endif
 429
 430 /* ------------------------------------------------------------------ */
 431
 432 static int queue_setup(struct vb2_queue *q,
 433                            unsigned int *num_buffers, unsigned int *num_planes,
 434                            unsigned int sizes[], struct device *alloc_devs[])
 435 {
 436         struct cx8800_dev *dev = q->drv_priv;
 437         struct cx88_core *core = dev->core;
 438
 439         *num_planes = 1;
 440         sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3;
 441         return 0;
 442 }
 443
 444 static int buffer_prepare(struct vb2_buffer *vb)
 445 {
 446         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 447         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 448         struct cx88_core *core = dev->core;
 449         struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
 450         struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
 451
 452         buf->bpl = core->width * dev->fmt->depth >> 3;
 453
 454         if (vb2_plane_size(vb, 0) < core->height * buf->bpl)
 455                 return -EINVAL;
 456         vb2_set_plane_payload(vb, 0, core->height * buf->bpl);
 457
 458         switch (core->field) {
 459         case V4L2_FIELD_TOP:
 460                 cx88_risc_buffer(dev->pci, &buf->risc,
 461                                  sgt->sgl, 0, UNSET,
 462                                  buf->bpl, 0, core->height);
 463                 break;
 464         case V4L2_FIELD_BOTTOM:
 465                 cx88_risc_buffer(dev->pci, &buf->risc,
 466                                  sgt->sgl, UNSET, 0,
 467                                  buf->bpl, 0, core->height);
 468                 break;
 469         case V4L2_FIELD_SEQ_TB:
 470                 cx88_risc_buffer(dev->pci, &buf->risc,
 471                                  sgt->sgl,
 472                                  0, buf->bpl * (core->height >> 1),
 473                                  buf->bpl, 0,
 474                                  core->height >> 1);
 475                 break;
 476         case V4L2_FIELD_SEQ_BT:
 477                 cx88_risc_buffer(dev->pci, &buf->risc,
 478                                  sgt->sgl,
 479                                  buf->bpl * (core->height >> 1), 0,
 480                                  buf->bpl, 0,
 481                                  core->height >> 1);
 482                 break;
 483         case V4L2_FIELD_INTERLACED:
 484         default:
 485                 cx88_risc_buffer(dev->pci, &buf->risc,
 486                                  sgt->sgl, 0, buf->bpl,
 487                                  buf->bpl, buf->bpl,
 488                                  core->height >> 1);
 489                 break;
 490         }
 491         dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
 492                 buf, buf->vb.vb2_buf.index,
 493                 core->width, core->height, dev->fmt->depth, dev->fmt->name,
 494                 (unsigned long)buf->risc.dma);
 495         return 0;
 496 }
 497
 498 static void buffer_finish(struct vb2_buffer *vb)
 499 {
 500         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 501         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 502         struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
 503         struct cx88_riscmem *risc = &buf->risc;
 504
 505         if (risc->cpu)
 506                 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
 507         memset(risc, 0, sizeof(*risc));
 508 }
 509
 510 static void buffer_queue(struct vb2_buffer *vb)
 511 {
 512         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 513         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 514         struct cx88_buffer    *buf = container_of(vbuf, struct cx88_buffer, vb);
 515         struct cx88_buffer    *prev;
 516         struct cx88_core      *core = dev->core;
 517         struct cx88_dmaqueue  *q    = &dev->vidq;
 518
 519         /* add jump to start */
 520         buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
 521         buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
 522         buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
 523
 524         if (list_empty(&q->active)) {
 525                 list_add_tail(&buf->list, &q->active);
 526                 dprintk(2,"[%p/%d] buffer_queue - first active\n",
 527                         buf, buf->vb.vb2_buf.index);
 528
 529         } else {
 530                 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
 531                 prev = list_entry(q->active.prev, struct cx88_buffer, list);
 532                 list_add_tail(&buf->list, &q->active);
 533                 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
 534                 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
 535                         buf, buf->vb.vb2_buf.index);
 536         }
 537 }
 538
 539 static int start_streaming(struct vb2_queue *q, unsigned int count)
 540 {
 541         struct cx8800_dev *dev = q->drv_priv;
 542         struct cx88_dmaqueue *dmaq = &dev->vidq;
 543         struct cx88_buffer *buf = list_entry(dmaq->active.next,
 544                         struct cx88_buffer, list);
 545
 546         start_video_dma(dev, dmaq, buf);
 547         return 0;
 548 }
 549
 550 static void stop_streaming(struct vb2_queue *q)
 551 {
 552         struct cx8800_dev *dev = q->drv_priv;
 553         struct cx88_core *core = dev->core;
 554         struct cx88_dmaqueue *dmaq = &dev->vidq;
 555         unsigned long flags;
 556
 557         cx_clear(MO_VID_DMACNTRL, 0x11);
 558         cx_clear(VID_CAPTURE_CONTROL, 0x06);
 559         spin_lock_irqsave(&dev->slock, flags);
 560         while (!list_empty(&dmaq->active)) {
 561                 struct cx88_buffer *buf = list_entry(dmaq->active.next,
 562                         struct cx88_buffer, list);
 563
 564                 list_del(&buf->list);
 565                 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
 566         }
 567         spin_unlock_irqrestore(&dev->slock, flags);
 568 }
 569
 570 static struct vb2_ops cx8800_video_qops = {
 571         .queue_setup    = queue_setup,
 572         .buf_prepare  = buffer_prepare,
 573         .buf_finish = buffer_finish,
 574         .buf_queue    = buffer_queue,
 575         .wait_prepare = vb2_ops_wait_prepare,
 576         .wait_finish = vb2_ops_wait_finish,
 577         .start_streaming = start_streaming,
 578         .stop_streaming = stop_streaming,
 579 };
 580
 581 /* ------------------------------------------------------------------ */
 582
 583 static int radio_open(struct file *file)
 584 {
 585         struct cx8800_dev *dev = video_drvdata(file);
 586         struct cx88_core *core = dev->core;
 587         int ret = v4l2_fh_open(file);
 588
 589         if (ret)
 590                 return ret;
 591
 592         cx_write(MO_GP3_IO, core->board.radio.gpio3);
 593         cx_write(MO_GP0_IO, core->board.radio.gpio0);
 594         cx_write(MO_GP1_IO, core->board.radio.gpio1);
 595         cx_write(MO_GP2_IO, core->board.radio.gpio2);
 596         if (core->board.radio.audioroute) {
 597                 if (core->sd_wm8775) {
 598                         call_all(core, audio, s_routing,
 599                                         core->board.radio.audioroute, 0, 0);
 600                 }
 601                 /* "I2S ADC mode" */
 602                 core->tvaudio = WW_I2SADC;
 603                 cx88_set_tvaudio(core);
 604         } else {
 605                 /* FM Mode */
 606                 core->tvaudio = WW_FM;
 607                 cx88_set_tvaudio(core);
 608                 cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1);
 609         }
 610         call_all(core, tuner, s_radio);
 611         return 0;
 612 }
 613
 614 /* ------------------------------------------------------------------ */
 615 /* VIDEO CTRL IOCTLS                                                  */
 616
 617 static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
 618 {
 619         struct cx88_core *core =
 620                 container_of(ctrl->handler, struct cx88_core, video_hdl);
 621         const struct cx88_ctrl *cc = ctrl->priv;
 622         u32 value, mask;
 623
 624         mask = cc->mask;
 625         switch (ctrl->id) {
 626         case V4L2_CID_SATURATION:
 627                 /* special v_sat handling */
 628
 629                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 630
 631                 if (core->tvnorm & V4L2_STD_SECAM) {
 632                         /* For SECAM, both U and V sat should be equal */
 633                         value = value << 8 | value;
 634                 } else {
 635                         /* Keeps U Saturation proportional to V Sat */
 636                         value = (value * 0x5a) / 0x7f << 8 | value;
 637                 }
 638                 mask = 0xffff;
 639                 break;
 640         case V4L2_CID_SHARPNESS:
 641                 /* 0b000, 0b100, 0b101, 0b110, or 0b111 */
 642                 value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
 643                 /* needs to be set for both fields */
 644                 cx_andor(MO_FILTER_EVEN, mask, value);
 645                 break;
 646         case V4L2_CID_CHROMA_AGC:
 647                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 648                 break;
 649         default:
 650                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 651                 break;
 652         }
 653         dprintk(1, "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
 654                                 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
 655                                 mask, cc->sreg ? " [shadowed]" : "");
 656         if (cc->sreg)
 657                 cx_sandor(cc->sreg, cc->reg, mask, value);
 658         else
 659                 cx_andor(cc->reg, mask, value);
 660         return 0;
 661 }
 662
 663 static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
 664 {
 665         struct cx88_core *core =
 666                 container_of(ctrl->handler, struct cx88_core, audio_hdl);
 667         const struct cx88_ctrl *cc = ctrl->priv;
 668         u32 value,mask;
 669
 670         /* Pass changes onto any WM8775 */
 671         if (core->sd_wm8775) {
 672                 switch (ctrl->id) {
 673                 case V4L2_CID_AUDIO_MUTE:
 674                         wm8775_s_ctrl(core, ctrl->id, ctrl->val);
 675                         break;
 676                 case V4L2_CID_AUDIO_VOLUME:
 677                         wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
 678                                                 (0x90 + ctrl->val) << 8 : 0);
 679                         break;
 680                 case V4L2_CID_AUDIO_BALANCE:
 681                         wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
 682                         break;
 683                 default:
 684                         break;
 685                 }
 686         }
 687
 688         mask = cc->mask;
 689         switch (ctrl->id) {
 690         case V4L2_CID_AUDIO_BALANCE:
 691                 value = (ctrl->val < 0x40) ? (0x7f - ctrl->val) : (ctrl->val - 0x40);
 692                 break;
 693         case V4L2_CID_AUDIO_VOLUME:
 694                 value = 0x3f - (ctrl->val & 0x3f);
 695                 break;
 696         default:
 697                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 698                 break;
 699         }
 700         dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
 701                                 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
 702                                 mask, cc->sreg ? " [shadowed]" : "");
 703         if (cc->sreg)
 704                 cx_sandor(cc->sreg, cc->reg, mask, value);
 705         else
 706                 cx_andor(cc->reg, mask, value);
 707         return 0;
 708 }
 709
 710 /* ------------------------------------------------------------------ */
 711 /* VIDEO IOCTLS                                                       */
 712
 713 static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
 714                                         struct v4l2_format *f)
 715 {
 716         struct cx8800_dev *dev = video_drvdata(file);
 717         struct cx88_core *core = dev->core;
 718
 719         f->fmt.pix.width        = core->width;
 720         f->fmt.pix.height       = core->height;
 721         f->fmt.pix.field        = core->field;
 722         f->fmt.pix.pixelformat  = dev->fmt->fourcc;
 723         f->fmt.pix.bytesperline =
 724                 (f->fmt.pix.width * dev->fmt->depth) >> 3;
 725         f->fmt.pix.sizeimage =
 726                 f->fmt.pix.height * f->fmt.pix.bytesperline;
 727         f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
 728         return 0;
 729 }
 730
 731 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 732                         struct v4l2_format *f)
 733 {
 734         struct cx8800_dev *dev = video_drvdata(file);
 735         struct cx88_core *core = dev->core;
 736         const struct cx8800_fmt *fmt;
 737         enum v4l2_field   field;
 738         unsigned int      maxw, maxh;
 739
 740         fmt = format_by_fourcc(f->fmt.pix.pixelformat);
 741         if (NULL == fmt)
 742                 return -EINVAL;
 743
 744         maxw = norm_maxw(core->tvnorm);
 745         maxh = norm_maxh(core->tvnorm);
 746
 747         field = f->fmt.pix.field;
 748
 749         switch (field) {
 750         case V4L2_FIELD_TOP:
 751         case V4L2_FIELD_BOTTOM:
 752         case V4L2_FIELD_INTERLACED:
 753         case V4L2_FIELD_SEQ_BT:
 754         case V4L2_FIELD_SEQ_TB:
 755                 break;
 756         default:
 757                 field = (f->fmt.pix.height > maxh / 2)
 758                         ? V4L2_FIELD_INTERLACED
 759                         : V4L2_FIELD_BOTTOM;
 760                 break;
 761         }
 762         if (V4L2_FIELD_HAS_T_OR_B(field))
 763                 maxh /= 2;
 764
 765         v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
 766                               &f->fmt.pix.height, 32, maxh, 0, 0);
 767         f->fmt.pix.field = field;
 768         f->fmt.pix.bytesperline =
 769                 (f->fmt.pix.width * fmt->depth) >> 3;
 770         f->fmt.pix.sizeimage =
 771                 f->fmt.pix.height * f->fmt.pix.bytesperline;
 772         f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
 773
 774         return 0;
 775 }
 776
 777 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 778                                         struct v4l2_format *f)
 779 {
 780         struct cx8800_dev *dev = video_drvdata(file);
 781         struct cx88_core *core = dev->core;
 782         int err = vidioc_try_fmt_vid_cap (file,priv,f);
 783
 784         if (0 != err)
 785                 return err;
 786         if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq))
 787                 return -EBUSY;
 788         if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq))
 789                 return -EBUSY;
 790         dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
 791         core->width = f->fmt.pix.width;
 792         core->height = f->fmt.pix.height;
 793         core->field = f->fmt.pix.field;
 794         return 0;
 795 }
 796
 797 void cx88_querycap(struct file *file, struct cx88_core *core,
 798                 struct v4l2_capability *cap)
 799 {
 800         struct video_device *vdev = video_devdata(file);
 801
 802         strlcpy(cap->card, core->board.name, sizeof(cap->card));
 803         cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
 804         if (UNSET != core->board.tuner_type)
 805                 cap->device_caps |= V4L2_CAP_TUNER;
 806         switch (vdev->vfl_type) {
 807         case VFL_TYPE_RADIO:
 808                 cap->device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
 809                 break;
 810         case VFL_TYPE_GRABBER:
 811                 cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE;
 812                 break;
 813         case VFL_TYPE_VBI:
 814                 cap->device_caps |= V4L2_CAP_VBI_CAPTURE;
 815                 break;
 816         }
 817         cap->capabilities = cap->device_caps | V4L2_CAP_VIDEO_CAPTURE |
 818                 V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS;
 819         if (core->board.radio.type == CX88_RADIO)
 820                 cap->capabilities |= V4L2_CAP_RADIO;
 821 }
 822 EXPORT_SYMBOL(cx88_querycap);
 823
 824 static int vidioc_querycap(struct file *file, void  *priv,
 825                                         struct v4l2_capability *cap)
 826 {
 827         struct cx8800_dev *dev = video_drvdata(file);
 828         struct cx88_core *core = dev->core;
 829
 830         strcpy(cap->driver, "cx8800");
 831         sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
 832         cx88_querycap(file, core, cap);
 833         return 0;
 834 }
 835
 836 static int vidioc_enum_fmt_vid_cap (struct file *file, void  *priv,
 837                                         struct v4l2_fmtdesc *f)
 838 {
 839         if (unlikely(f->index >= ARRAY_SIZE(formats)))
 840                 return -EINVAL;
 841
 842         strlcpy(f->description,formats[f->index].name,sizeof(f->description));
 843         f->pixelformat = formats[f->index].fourcc;
 844
 845         return 0;
 846 }
 847
 848 static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
 849 {
 850         struct cx8800_dev *dev = video_drvdata(file);
 851         struct cx88_core *core = dev->core;
 852
 853         *tvnorm = core->tvnorm;
 854         return 0;
 855 }
 856
 857 static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
 858 {
 859         struct cx8800_dev *dev = video_drvdata(file);
 860         struct cx88_core *core = dev->core;
 861
 862         return cx88_set_tvnorm(core, tvnorms);
 863 }
 864
 865 /* only one input in this sample driver */
 866 int cx88_enum_input (struct cx88_core  *core,struct v4l2_input *i)
 867 {
 868         static const char * const iname[] = {
 869                 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
 870                 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
 871                 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
 872                 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
 873                 [ CX88_VMUX_SVIDEO     ] = "S-Video",
 874                 [ CX88_VMUX_TELEVISION ] = "Television",
 875                 [ CX88_VMUX_CABLE      ] = "Cable TV",
 876                 [ CX88_VMUX_DVB        ] = "DVB",
 877                 [ CX88_VMUX_DEBUG      ] = "for debug only",
 878         };
 879         unsigned int n = i->index;
 880
 881         if (n >= 4)
 882                 return -EINVAL;
 883         if (0 == INPUT(n).type)
 884                 return -EINVAL;
 885         i->type  = V4L2_INPUT_TYPE_CAMERA;
 886         strcpy(i->name,iname[INPUT(n).type]);
 887         if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
 888             (CX88_VMUX_CABLE      == INPUT(n).type)) {
 889                 i->type = V4L2_INPUT_TYPE_TUNER;
 890         }
 891         i->std = CX88_NORMS;
 892         return 0;
 893 }
 894 EXPORT_SYMBOL(cx88_enum_input);
 895
 896 static int vidioc_enum_input (struct file *file, void *priv,
 897                                 struct v4l2_input *i)
 898 {
 899         struct cx8800_dev *dev = video_drvdata(file);
 900         struct cx88_core *core = dev->core;
 901         return cx88_enum_input (core,i);
 902 }
 903
 904 static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
 905 {
 906         struct cx8800_dev *dev = video_drvdata(file);
 907         struct cx88_core *core = dev->core;
 908
 909         *i = core->input;
 910         return 0;
 911 }
 912
 913 static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
 914 {
 915         struct cx8800_dev *dev = video_drvdata(file);
 916         struct cx88_core *core = dev->core;
 917
 918         if (i >= 4)
 919                 return -EINVAL;
 920         if (0 == INPUT(i).type)
 921                 return -EINVAL;
 922
 923         cx88_newstation(core);
 924         cx88_video_mux(core,i);
 925         return 0;
 926 }
 927
 928 static int vidioc_g_tuner (struct file *file, void *priv,
 929                                 struct v4l2_tuner *t)
 930 {
 931         struct cx8800_dev *dev = video_drvdata(file);
 932         struct cx88_core *core = dev->core;
 933         u32 reg;
 934
 935         if (unlikely(UNSET == core->board.tuner_type))
 936                 return -EINVAL;
 937         if (0 != t->index)
 938                 return -EINVAL;
 939
 940         strcpy(t->name, "Television");
 941         t->capability = V4L2_TUNER_CAP_NORM;
 942         t->rangehigh  = 0xffffffffUL;
 943         call_all(core, tuner, g_tuner, t);
 944
 945         cx88_get_stereo(core ,t);
 946         reg = cx_read(MO_DEVICE_STATUS);
 947         t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
 948         return 0;
 949 }
 950
 951 static int vidioc_s_tuner (struct file *file, void *priv,
 952                                 const struct v4l2_tuner *t)
 953 {
 954         struct cx8800_dev *dev = video_drvdata(file);
 955         struct cx88_core *core = dev->core;
 956
 957         if (UNSET == core->board.tuner_type)
 958                 return -EINVAL;
 959         if (0 != t->index)
 960                 return -EINVAL;
 961
 962         cx88_set_stereo(core, t->audmode, 1);
 963         return 0;
 964 }
 965
 966 static int vidioc_g_frequency (struct file *file, void *priv,
 967                                 struct v4l2_frequency *f)
 968 {
 969         struct cx8800_dev *dev = video_drvdata(file);
 970         struct cx88_core *core = dev->core;
 971
 972         if (unlikely(UNSET == core->board.tuner_type))
 973                 return -EINVAL;
 974         if (f->tuner)
 975                 return -EINVAL;
 976
 977         f->frequency = core->freq;
 978
 979         call_all(core, tuner, g_frequency, f);
 980
 981         return 0;
 982 }
 983
 984 int cx88_set_freq (struct cx88_core  *core,
 985                                 const struct v4l2_frequency *f)
 986 {
 987         struct v4l2_frequency new_freq = *f;
 988
 989         if (unlikely(UNSET == core->board.tuner_type))
 990                 return -EINVAL;
 991         if (unlikely(f->tuner != 0))
 992                 return -EINVAL;
 993
 994         cx88_newstation(core);
 995         call_all(core, tuner, s_frequency, f);
 996         call_all(core, tuner, g_frequency, &new_freq);
 997         core->freq = new_freq.frequency;
 998
 999         /* When changing channels it is required to reset TVAUDIO */
1000         msleep (10);
1001         cx88_set_tvaudio(core);
1002
1003         return 0;
1004 }
1005 EXPORT_SYMBOL(cx88_set_freq);
1006
1007 static int vidioc_s_frequency (struct file *file, void *priv,
1008                                 const struct v4l2_frequency *f)
1009 {
1010         struct cx8800_dev *dev = video_drvdata(file);
1011         struct cx88_core *core = dev->core;
1012
1013         return cx88_set_freq(core, f);
1014 }
1015
1016 #ifdef CONFIG_VIDEO_ADV_DEBUG
1017 static int vidioc_g_register (struct file *file, void *fh,
1018                                 struct v4l2_dbg_register *reg)
1019 {
1020         struct cx8800_dev *dev = video_drvdata(file);
1021         struct cx88_core *core = dev->core;
1022
1023         /* cx2388x has a 24-bit register space */
1024         reg->val = cx_read(reg->reg & 0xfffffc);
1025         reg->size = 4;
1026         return 0;
1027 }
1028
1029 static int vidioc_s_register (struct file *file, void *fh,
1030                                 const struct v4l2_dbg_register *reg)
1031 {
1032         struct cx8800_dev *dev = video_drvdata(file);
1033         struct cx88_core *core = dev->core;
1034
1035         cx_write(reg->reg & 0xfffffc, reg->val);
1036         return 0;
1037 }
1038 #endif
1039
1040 /* ----------------------------------------------------------- */
1041 /* RADIO ESPECIFIC IOCTLS                                      */
1042 /* ----------------------------------------------------------- */
1043
1044 static int radio_g_tuner (struct file *file, void *priv,
1045                                 struct v4l2_tuner *t)
1046 {
1047         struct cx8800_dev *dev = video_drvdata(file);
1048         struct cx88_core *core = dev->core;
1049
1050         if (unlikely(t->index > 0))
1051                 return -EINVAL;
1052
1053         strcpy(t->name, "Radio");
1054
1055         call_all(core, tuner, g_tuner, t);
1056         return 0;
1057 }
1058
1059 static int radio_s_tuner (struct file *file, void *priv,
1060                                 const struct v4l2_tuner *t)
1061 {
1062         struct cx8800_dev *dev = video_drvdata(file);
1063         struct cx88_core *core = dev->core;
1064
1065         if (0 != t->index)
1066                 return -EINVAL;
1067
1068         call_all(core, tuner, s_tuner, t);
1069         return 0;
1070 }
1071
1072 /* ----------------------------------------------------------- */
1073
1074 static const char *cx88_vid_irqs[32] = {
1075         "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1076         "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1077         "y_oflow",  "u_oflow",  "v_oflow",  "vbi_oflow",
1078         "y_sync",   "u_sync",   "v_sync",   "vbi_sync",
1079         "opc_err",  "par_err",  "rip_err",  "pci_abort",
1080 };
1081
1082 static void cx8800_vid_irq(struct cx8800_dev *dev)
1083 {
1084         struct cx88_core *core = dev->core;
1085         u32 status, mask, count;
1086
1087         status = cx_read(MO_VID_INTSTAT);
1088         mask   = cx_read(MO_VID_INTMSK);
1089         if (0 == (status & mask))
1090                 return;
1091         cx_write(MO_VID_INTSTAT, status);
1092         if (irq_debug  ||  (status & mask & ~0xff))
1093                 cx88_print_irqbits(core->name, "irq vid",
1094                                    cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1095                                    status, mask);
1096
1097         /* risc op code error */
1098         if (status & (1 << 16)) {
1099                 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1100                 cx_clear(MO_VID_DMACNTRL, 0x11);
1101                 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1102                 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1103         }
1104
1105         /* risc1 y */
1106         if (status & 0x01) {
1107                 spin_lock(&dev->slock);
1108                 count = cx_read(MO_VIDY_GPCNT);
1109                 cx88_wakeup(core, &dev->vidq, count);
1110                 spin_unlock(&dev->slock);
1111         }
1112
1113         /* risc1 vbi */
1114         if (status & 0x08) {
1115                 spin_lock(&dev->slock);
1116                 count = cx_read(MO_VBI_GPCNT);
1117                 cx88_wakeup(core, &dev->vbiq, count);
1118                 spin_unlock(&dev->slock);
1119         }
1120 }
1121
1122 static irqreturn_t cx8800_irq(int irq, void *dev_id)
1123 {
1124         struct cx8800_dev *dev = dev_id;
1125         struct cx88_core *core = dev->core;
1126         u32 status;
1127         int loop, handled = 0;
1128
1129         for (loop = 0; loop < 10; loop++) {
1130                 status = cx_read(MO_PCI_INTSTAT) &
1131                         (core->pci_irqmask | PCI_INT_VIDINT);
1132                 if (0 == status)
1133                         goto out;
1134                 cx_write(MO_PCI_INTSTAT, status);
1135                 handled = 1;
1136
1137                 if (status & core->pci_irqmask)
1138                         cx88_core_irq(core,status);
1139                 if (status & PCI_INT_VIDINT)
1140                         cx8800_vid_irq(dev);
1141         }
1142         if (10 == loop) {
1143                 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1144                        core->name);
1145                 cx_write(MO_PCI_INTMSK,0);
1146         }
1147
1148  out:
1149         return IRQ_RETVAL(handled);
1150 }
1151
1152 /* ----------------------------------------------------------- */
1153 /* exported stuff                                              */
1154
1155 static const struct v4l2_file_operations video_fops =
1156 {
1157         .owner         = THIS_MODULE,
1158         .open          = v4l2_fh_open,
1159         .release       = vb2_fop_release,
1160         .read          = vb2_fop_read,
1161         .poll          = vb2_fop_poll,
1162         .mmap          = vb2_fop_mmap,
1163         .unlocked_ioctl = video_ioctl2,
1164 };
1165
1166 static const struct v4l2_ioctl_ops video_ioctl_ops = {
1167         .vidioc_querycap      = vidioc_querycap,
1168         .vidioc_enum_fmt_vid_cap  = vidioc_enum_fmt_vid_cap,
1169         .vidioc_g_fmt_vid_cap     = vidioc_g_fmt_vid_cap,
1170         .vidioc_try_fmt_vid_cap   = vidioc_try_fmt_vid_cap,
1171         .vidioc_s_fmt_vid_cap     = vidioc_s_fmt_vid_cap,
1172         .vidioc_reqbufs       = vb2_ioctl_reqbufs,
1173         .vidioc_querybuf      = vb2_ioctl_querybuf,
1174         .vidioc_qbuf          = vb2_ioctl_qbuf,
1175         .vidioc_dqbuf         = vb2_ioctl_dqbuf,
1176         .vidioc_g_std         = vidioc_g_std,
1177         .vidioc_s_std         = vidioc_s_std,
1178         .vidioc_enum_input    = vidioc_enum_input,
1179         .vidioc_g_input       = vidioc_g_input,
1180         .vidioc_s_input       = vidioc_s_input,
1181         .vidioc_streamon      = vb2_ioctl_streamon,
1182         .vidioc_streamoff     = vb2_ioctl_streamoff,
1183         .vidioc_g_tuner       = vidioc_g_tuner,
1184         .vidioc_s_tuner       = vidioc_s_tuner,
1185         .vidioc_g_frequency   = vidioc_g_frequency,
1186         .vidioc_s_frequency   = vidioc_s_frequency,
1187         .vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1188         .vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1189 #ifdef CONFIG_VIDEO_ADV_DEBUG
1190         .vidioc_g_register    = vidioc_g_register,
1191         .vidioc_s_register    = vidioc_s_register,
1192 #endif
1193 };
1194
1195 static const struct video_device cx8800_video_template = {
1196         .name                 = "cx8800-video",
1197         .fops                 = &video_fops,
1198         .ioctl_ops            = &video_ioctl_ops,
1199         .tvnorms              = CX88_NORMS,
1200 };
1201
1202 static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
1203         .vidioc_querycap      = vidioc_querycap,
1204         .vidioc_g_fmt_vbi_cap     = cx8800_vbi_fmt,
1205         .vidioc_try_fmt_vbi_cap   = cx8800_vbi_fmt,
1206         .vidioc_s_fmt_vbi_cap     = cx8800_vbi_fmt,
1207         .vidioc_reqbufs       = vb2_ioctl_reqbufs,
1208         .vidioc_querybuf      = vb2_ioctl_querybuf,
1209         .vidioc_qbuf          = vb2_ioctl_qbuf,
1210         .vidioc_dqbuf         = vb2_ioctl_dqbuf,
1211         .vidioc_g_std         = vidioc_g_std,
1212         .vidioc_s_std         = vidioc_s_std,
1213         .vidioc_enum_input    = vidioc_enum_input,
1214         .vidioc_g_input       = vidioc_g_input,
1215         .vidioc_s_input       = vidioc_s_input,
1216         .vidioc_streamon      = vb2_ioctl_streamon,
1217         .vidioc_streamoff     = vb2_ioctl_streamoff,
1218         .vidioc_g_tuner       = vidioc_g_tuner,
1219         .vidioc_s_tuner       = vidioc_s_tuner,
1220         .vidioc_g_frequency   = vidioc_g_frequency,
1221         .vidioc_s_frequency   = vidioc_s_frequency,
1222 #ifdef CONFIG_VIDEO_ADV_DEBUG
1223         .vidioc_g_register    = vidioc_g_register,
1224         .vidioc_s_register    = vidioc_s_register,
1225 #endif
1226 };
1227
1228 static const struct video_device cx8800_vbi_template = {
1229         .name                 = "cx8800-vbi",
1230         .fops                 = &video_fops,
1231         .ioctl_ops            = &vbi_ioctl_ops,
1232         .tvnorms              = CX88_NORMS,
1233 };
1234
1235 static const struct v4l2_file_operations radio_fops =
1236 {
1237         .owner         = THIS_MODULE,
1238         .open          = radio_open,
1239         .poll          = v4l2_ctrl_poll,
1240         .release       = v4l2_fh_release,
1241         .unlocked_ioctl = video_ioctl2,
1242 };
1243
1244 static const struct v4l2_ioctl_ops radio_ioctl_ops = {
1245         .vidioc_querycap      = vidioc_querycap,
1246         .vidioc_g_tuner       = radio_g_tuner,
1247         .vidioc_s_tuner       = radio_s_tuner,
1248         .vidioc_g_frequency   = vidioc_g_frequency,
1249         .vidioc_s_frequency   = vidioc_s_frequency,
1250         .vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1251         .vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1252 #ifdef CONFIG_VIDEO_ADV_DEBUG
1253         .vidioc_g_register    = vidioc_g_register,
1254         .vidioc_s_register    = vidioc_s_register,
1255 #endif
1256 };
1257
1258 static const struct video_device cx8800_radio_template = {
1259         .name                 = "cx8800-radio",
1260         .fops                 = &radio_fops,
1261         .ioctl_ops            = &radio_ioctl_ops,
1262 };
1263
1264 static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
1265         .s_ctrl = cx8800_s_vid_ctrl,
1266 };
1267
1268 static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
1269         .s_ctrl = cx8800_s_aud_ctrl,
1270 };
1271
1272 /* ----------------------------------------------------------- */
1273
1274 static void cx8800_unregister_video(struct cx8800_dev *dev)
1275 {
1276         video_unregister_device(&dev->radio_dev);
1277         video_unregister_device(&dev->vbi_dev);
1278         video_unregister_device(&dev->video_dev);
1279 }
1280
1281 static int cx8800_initdev(struct pci_dev *pci_dev,
1282                           const struct pci_device_id *pci_id)
1283 {
1284         struct cx8800_dev *dev;
1285         struct cx88_core *core;
1286         struct vb2_queue *q;
1287         int err;
1288         int i;
1289
1290         dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1291         if (NULL == dev)
1292                 return -ENOMEM;
1293
1294         /* pci init */
1295         dev->pci = pci_dev;
1296         if (pci_enable_device(pci_dev)) {
1297                 err = -EIO;
1298                 goto fail_free;
1299         }
1300         core = cx88_core_get(dev->pci);
1301         if (NULL == core) {
1302                 err = -EINVAL;
1303                 goto fail_free;
1304         }
1305         dev->core = core;
1306
1307         /* print pci info */
1308         dev->pci_rev = pci_dev->revision;
1309         pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER,  &dev->pci_lat);
1310         printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
1311                "latency: %d, mmio: 0x%llx\n", core->name,
1312                pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1313                dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1314
1315         pci_set_master(pci_dev);
1316         err = pci_set_dma_mask(pci_dev,DMA_BIT_MASK(32));
1317         if (err) {
1318                 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1319                 goto fail_core;
1320         }
1321
1322         /* initialize driver struct */
1323         spin_lock_init(&dev->slock);
1324
1325         /* init video dma queues */
1326         INIT_LIST_HEAD(&dev->vidq.active);
1327
1328         /* init vbi dma queues */
1329         INIT_LIST_HEAD(&dev->vbiq.active);
1330
1331         /* get irq */
1332         err = request_irq(pci_dev->irq, cx8800_irq,
1333                           IRQF_SHARED, core->name, dev);
1334         if (err < 0) {
1335                 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1336                        core->name,pci_dev->irq);
1337                 goto fail_core;
1338         }
1339         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1340
1341         for (i = 0; i < CX8800_AUD_CTLS; i++) {
1342                 const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
1343                 struct v4l2_ctrl *vc;
1344
1345                 vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
1346                         cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
1347                 if (vc == NULL) {
1348                         err = core->audio_hdl.error;
1349                         goto fail_core;
1350                 }
1351                 vc->priv = (void *)cc;
1352         }
1353
1354         for (i = 0; i < CX8800_VID_CTLS; i++) {
1355                 const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
1356                 struct v4l2_ctrl *vc;
1357
1358                 vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
1359                         cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
1360                 if (vc == NULL) {
1361                         err = core->video_hdl.error;
1362                         goto fail_core;
1363                 }
1364                 vc->priv = (void *)cc;
1365                 if (vc->id == V4L2_CID_CHROMA_AGC)
1366                         core->chroma_agc = vc;
1367         }
1368         v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL);
1369
1370         /* load and configure helper modules */
1371
1372         if (core->board.audio_chip == CX88_AUDIO_WM8775) {
1373                 struct i2c_board_info wm8775_info = {
1374                         .type = "wm8775",
1375                         .addr = 0x36 >> 1,
1376                         .platform_data = &core->wm8775_data,
1377                 };
1378                 struct v4l2_subdev *sd;
1379
1380                 if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1381                         core->wm8775_data.is_nova_s = true;
1382                 else
1383                         core->wm8775_data.is_nova_s = false;
1384
1385                 sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1386                                 &wm8775_info, NULL);
1387                 if (sd != NULL) {
1388                         core->sd_wm8775 = sd;
1389                         sd->grp_id = WM8775_GID;
1390                 }
1391         }
1392
1393         if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) {
1394                 /* This probes for a tda9874 as is used on some
1395                    Pixelview Ultra boards. */
1396                 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1397                                 "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
1398         }
1399
1400         switch (core->boardnr) {
1401         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1402         case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1403                 static const struct i2c_board_info rtc_info = {
1404                         I2C_BOARD_INFO("isl1208", 0x6f)
1405                 };
1406
1407                 request_module("rtc-isl1208");
1408                 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1409         }
1410                 /* break intentionally omitted */
1411         case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1412                 request_module("ir-kbd-i2c");
1413         }
1414
1415         /* Sets device info at pci_dev */
1416         pci_set_drvdata(pci_dev, dev);
1417
1418         dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
1419
1420         /* Maintain a reference so cx88-blackbird can query the 8800 device. */
1421         core->v4ldev = dev;
1422
1423         /* initial device configuration */
1424         mutex_lock(&core->lock);
1425         cx88_set_tvnorm(core, core->tvnorm);
1426         v4l2_ctrl_handler_setup(&core->video_hdl);
1427         v4l2_ctrl_handler_setup(&core->audio_hdl);
1428         cx88_video_mux(core, 0);
1429
1430         q = &dev->vb2_vidq;
1431         q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1432         q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1433         q->gfp_flags = GFP_DMA32;
1434         q->min_buffers_needed = 2;
1435         q->drv_priv = dev;
1436         q->buf_struct_size = sizeof(struct cx88_buffer);
1437         q->ops = &cx8800_video_qops;
1438         q->mem_ops = &vb2_dma_sg_memops;
1439         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1440         q->lock = &core->lock;
1441         q->dev = &dev->pci->dev;
1442
1443         err = vb2_queue_init(q);
1444         if (err < 0)
1445                 goto fail_unreg;
1446
1447         q = &dev->vb2_vbiq;
1448         q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1449         q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1450         q->gfp_flags = GFP_DMA32;
1451         q->min_buffers_needed = 2;
1452         q->drv_priv = dev;
1453         q->buf_struct_size = sizeof(struct cx88_buffer);
1454         q->ops = &cx8800_vbi_qops;
1455         q->mem_ops = &vb2_dma_sg_memops;
1456         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1457         q->lock = &core->lock;
1458         q->dev = &dev->pci->dev;
1459
1460         err = vb2_queue_init(q);
1461         if (err < 0)
1462                 goto fail_unreg;
1463
1464         /* register v4l devices */
1465         cx88_vdev_init(core, dev->pci, &dev->video_dev,
1466                        &cx8800_video_template, "video");
1467         video_set_drvdata(&dev->video_dev, dev);
1468         dev->video_dev.ctrl_handler = &core->video_hdl;
1469         dev->video_dev.queue = &dev->vb2_vidq;
1470         err = video_register_device(&dev->video_dev, VFL_TYPE_GRABBER,
1471                                     video_nr[core->nr]);
1472         if (err < 0) {
1473                 printk(KERN_ERR "%s/0: can't register video device\n",
1474                        core->name);
1475                 goto fail_unreg;
1476         }
1477         printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
1478                core->name, video_device_node_name(&dev->video_dev));
1479
1480         cx88_vdev_init(core, dev->pci, &dev->vbi_dev,
1481                        &cx8800_vbi_template, "vbi");
1482         video_set_drvdata(&dev->vbi_dev, dev);
1483         dev->vbi_dev.queue = &dev->vb2_vbiq;
1484         err = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
1485                                     vbi_nr[core->nr]);
1486         if (err < 0) {
1487                 printk(KERN_ERR "%s/0: can't register vbi device\n",
1488                        core->name);
1489                 goto fail_unreg;
1490         }
1491         printk(KERN_INFO "%s/0: registered device %s\n",
1492                core->name, video_device_node_name(&dev->vbi_dev));
1493
1494         if (core->board.radio.type == CX88_RADIO) {
1495                 cx88_vdev_init(core, dev->pci, &dev->radio_dev,
1496                                &cx8800_radio_template, "radio");
1497                 video_set_drvdata(&dev->radio_dev, dev);
1498                 dev->radio_dev.ctrl_handler = &core->audio_hdl;
1499                 err = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
1500                                             radio_nr[core->nr]);
1501                 if (err < 0) {
1502                         printk(KERN_ERR "%s/0: can't register radio device\n",
1503                                core->name);
1504                         goto fail_unreg;
1505                 }
1506                 printk(KERN_INFO "%s/0: registered device %s\n",
1507                        core->name, video_device_node_name(&dev->radio_dev));
1508         }
1509
1510         /* start tvaudio thread */
1511         if (core->board.tuner_type != UNSET) {
1512                 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
1513                 if (IS_ERR(core->kthread)) {
1514                         err = PTR_ERR(core->kthread);
1515                         printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1516                                core->name, err);
1517                 }
1518         }
1519         mutex_unlock(&core->lock);
1520
1521         return 0;
1522
1523 fail_unreg:
1524         cx8800_unregister_video(dev);
1525         free_irq(pci_dev->irq, dev);
1526         mutex_unlock(&core->lock);
1527 fail_core:
1528         core->v4ldev = NULL;
1529         cx88_core_put(core,dev->pci);
1530 fail_free:
1531         kfree(dev);
1532         return err;
1533 }
1534
1535 static void cx8800_finidev(struct pci_dev *pci_dev)
1536 {
1537         struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1538         struct cx88_core *core = dev->core;
1539
1540         /* stop thread */
1541         if (core->kthread) {
1542                 kthread_stop(core->kthread);
1543                 core->kthread = NULL;
1544         }
1545
1546         if (core->ir)
1547                 cx88_ir_stop(core);
1548
1549         cx88_shutdown(core); /* FIXME */
1550
1551         /* unregister stuff */
1552
1553         free_irq(pci_dev->irq, dev);
1554         cx8800_unregister_video(dev);
1555         pci_disable_device(pci_dev);
1556
1557         core->v4ldev = NULL;
1558
1559         /* free memory */
1560         cx88_core_put(core,dev->pci);
1561         kfree(dev);
1562 }
1563
1564 #ifdef CONFIG_PM
1565 static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1566 {
1567         struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1568         struct cx88_core *core = dev->core;
1569         unsigned long flags;
1570
1571         /* stop video+vbi capture */
1572         spin_lock_irqsave(&dev->slock, flags);
1573         if (!list_empty(&dev->vidq.active)) {
1574                 printk("%s/0: suspend video\n", core->name);
1575                 stop_video_dma(dev);
1576         }
1577         if (!list_empty(&dev->vbiq.active)) {
1578                 printk("%s/0: suspend vbi\n", core->name);
1579                 cx8800_stop_vbi_dma(dev);
1580         }
1581         spin_unlock_irqrestore(&dev->slock, flags);
1582
1583         if (core->ir)
1584                 cx88_ir_stop(core);
1585         /* FIXME -- shutdown device */
1586         cx88_shutdown(core);
1587
1588         pci_save_state(pci_dev);
1589         if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
1590                 pci_disable_device(pci_dev);
1591                 dev->state.disabled = 1;
1592         }
1593         return 0;
1594 }
1595
1596 static int cx8800_resume(struct pci_dev *pci_dev)
1597 {
1598         struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1599         struct cx88_core *core = dev->core;
1600         unsigned long flags;
1601         int err;
1602
1603         if (dev->state.disabled) {
1604                 err=pci_enable_device(pci_dev);
1605                 if (err) {
1606                         printk(KERN_ERR "%s/0: can't enable device\n",
1607                                core->name);
1608                         return err;
1609                 }
1610
1611                 dev->state.disabled = 0;
1612         }
1613         err= pci_set_power_state(pci_dev, PCI_D0);
1614         if (err) {
1615                 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
1616                 pci_disable_device(pci_dev);
1617                 dev->state.disabled = 1;
1618
1619                 return err;
1620         }
1621         pci_restore_state(pci_dev);
1622
1623         /* FIXME: re-initialize hardware */
1624         cx88_reset(core);
1625         if (core->ir)
1626                 cx88_ir_start(core);
1627
1628         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1629
1630         /* restart video+vbi capture */
1631         spin_lock_irqsave(&dev->slock, flags);
1632         if (!list_empty(&dev->vidq.active)) {
1633                 printk("%s/0: resume video\n", core->name);
1634                 restart_video_queue(dev,&dev->vidq);
1635         }
1636         if (!list_empty(&dev->vbiq.active)) {
1637                 printk("%s/0: resume vbi\n", core->name);
1638                 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1639         }
1640         spin_unlock_irqrestore(&dev->slock, flags);
1641
1642         return 0;
1643 }
1644 #endif
1645
1646 /* ----------------------------------------------------------- */
1647
1648 static const struct pci_device_id cx8800_pci_tbl[] = {
1649         {
1650                 .vendor       = 0x14f1,
1651                 .device       = 0x8800,
1652                 .subvendor    = PCI_ANY_ID,
1653                 .subdevice    = PCI_ANY_ID,
1654         },{
1655                 /* --- end of list --- */
1656         }
1657 };
1658 MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
1659
1660 static struct pci_driver cx8800_pci_driver = {
1661         .name     = "cx8800",
1662         .id_table = cx8800_pci_tbl,
1663         .probe    = cx8800_initdev,
1664         .remove   = cx8800_finidev,
1665 #ifdef CONFIG_PM
1666         .suspend  = cx8800_suspend,
1667         .resume   = cx8800_resume,
1668 #endif
1669 };
1670
1671 module_pci_driver(cx8800_pci_driver);