Merge branch 'docs-next' of git://git.lwn.net/linux into devel/docs-next
[cascardo/linux.git] / drivers / media / platform / s5p-mfc / s5p_mfc_pm.c
1 /*
2  * linux/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
3  *
4  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5  *              http://www.samsung.com/
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  */
12
13 #include <linux/clk.h>
14 #include <linux/err.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include "s5p_mfc_common.h"
18 #include "s5p_mfc_debug.h"
19 #include "s5p_mfc_pm.h"
20
21 #define MFC_GATE_CLK_NAME       "mfc"
22 #define MFC_SCLK_NAME           "sclk_mfc"
23 #define MFC_SCLK_RATE           (200 * 1000000)
24
25 #define CLK_DEBUG
26
27 static struct s5p_mfc_pm *pm;
28 static struct s5p_mfc_dev *p_dev;
29
30 #ifdef CLK_DEBUG
31 static atomic_t clk_ref;
32 #endif
33
34 int s5p_mfc_init_pm(struct s5p_mfc_dev *dev)
35 {
36         int ret = 0;
37
38         pm = &dev->pm;
39         p_dev = dev;
40         pm->clock_gate = clk_get(&dev->plat_dev->dev, MFC_GATE_CLK_NAME);
41         if (IS_ERR(pm->clock_gate)) {
42                 mfc_err("Failed to get clock-gating control\n");
43                 ret = PTR_ERR(pm->clock_gate);
44                 goto err_g_ip_clk;
45         }
46
47         ret = clk_prepare(pm->clock_gate);
48         if (ret) {
49                 mfc_err("Failed to prepare clock-gating control\n");
50                 goto err_p_ip_clk;
51         }
52
53         if (dev->variant->version != MFC_VERSION_V6) {
54                 pm->clock = clk_get(&dev->plat_dev->dev, MFC_SCLK_NAME);
55                 if (IS_ERR(pm->clock)) {
56                         mfc_info("Failed to get MFC special clock control\n");
57                         pm->clock = NULL;
58                 } else {
59                         clk_set_rate(pm->clock, MFC_SCLK_RATE);
60                         ret = clk_prepare_enable(pm->clock);
61                         if (ret) {
62                                 mfc_err("Failed to enable MFC special clock\n");
63                                 goto err_s_clk;
64                         }
65                 }
66         }
67
68         atomic_set(&pm->power, 0);
69 #ifdef CONFIG_PM
70         pm->device = &dev->plat_dev->dev;
71         pm_runtime_enable(pm->device);
72 #endif
73 #ifdef CLK_DEBUG
74         atomic_set(&clk_ref, 0);
75 #endif
76         return 0;
77
78 err_s_clk:
79         clk_put(pm->clock);
80 err_p_ip_clk:
81         clk_put(pm->clock_gate);
82 err_g_ip_clk:
83         return ret;
84 }
85
86 void s5p_mfc_final_pm(struct s5p_mfc_dev *dev)
87 {
88         if (dev->variant->version != MFC_VERSION_V6 &&
89             pm->clock) {
90                 clk_disable_unprepare(pm->clock);
91                 clk_put(pm->clock);
92         }
93         clk_unprepare(pm->clock_gate);
94         clk_put(pm->clock_gate);
95 #ifdef CONFIG_PM
96         pm_runtime_disable(pm->device);
97 #endif
98 }
99
100 int s5p_mfc_clock_on(void)
101 {
102         int ret;
103 #ifdef CLK_DEBUG
104         atomic_inc(&clk_ref);
105         mfc_debug(3, "+ %d\n", atomic_read(&clk_ref));
106 #endif
107         ret = clk_enable(pm->clock_gate);
108         return ret;
109 }
110
111 void s5p_mfc_clock_off(void)
112 {
113 #ifdef CLK_DEBUG
114         atomic_dec(&clk_ref);
115         mfc_debug(3, "- %d\n", atomic_read(&clk_ref));
116 #endif
117         clk_disable(pm->clock_gate);
118 }
119
120 int s5p_mfc_power_on(void)
121 {
122 #ifdef CONFIG_PM
123         return pm_runtime_get_sync(pm->device);
124 #else
125         atomic_set(&pm->power, 1);
126         return 0;
127 #endif
128 }
129
130 int s5p_mfc_power_off(void)
131 {
132 #ifdef CONFIG_PM
133         return pm_runtime_put_sync(pm->device);
134 #else
135         atomic_set(&pm->power, 0);
136         return 0;
137 #endif
138 }
139
140