2 * Copyright (C) ST-Ericsson SA 2010
4 * License Terms: GNU General Public License, version 2
5 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
11 #include <linux/device.h>
12 #include <linux/mfd/core.h>
13 #include <linux/mfd/stmpe.h>
14 #include <linux/printk.h>
15 #include <linux/types.h>
17 extern const struct dev_pm_ops stmpe_dev_pm_ops;
19 #ifdef STMPE_DUMP_BYTES
20 static inline void stmpe_dump_bytes(const char *str, const void *buf,
23 print_hex_dump_bytes(str, DUMP_PREFIX_OFFSET, buf, len);
26 static inline void stmpe_dump_bytes(const char *str, const void *buf,
33 * struct stmpe_variant_block - information about block
34 * @cell: base mfd cell
35 * @irq: interrupt number to be added to each IORESOURCE_IRQ
37 * @block: block id; used for identification with platform data and for
38 * enable and altfunc callbacks
40 struct stmpe_variant_block {
41 struct mfd_cell *cell;
43 enum stmpe_block block;
47 * struct stmpe_variant_info - variant-specific information
49 * @id_val: content of CHIPID register
50 * @id_mask: bits valid in CHIPID register for comparison with id_val
51 * @num_gpios: number of GPIOS
52 * @af_bits: number of bits used to specify the alternate function
53 * @regs: variant specific registers.
54 * @blocks: list of blocks present on this device
55 * @num_blocks: number of blocks present on this device
56 * @num_irqs: number of internal IRQs available on this device
57 * @enable: callback to enable the specified blocks.
58 * Called with the I/O lock held.
59 * @get_altfunc: callback to get the alternate function number for the
61 * @enable_autosleep: callback to configure autosleep with specified timeout
63 struct stmpe_variant_info {
70 struct stmpe_variant_block *blocks;
73 int (*enable)(struct stmpe *stmpe, unsigned int blocks, bool enable);
74 int (*get_altfunc)(struct stmpe *stmpe, enum stmpe_block block);
75 int (*enable_autosleep)(struct stmpe *stmpe, int autosleep_timeout);
79 * struct stmpe_client_info - i2c or spi specific routines/info
80 * @data: client specific data
81 * @read_byte: read single byte
82 * @write_byte: write single byte
83 * @read_block: read block or multiple bytes
84 * @write_block: write block or multiple bytes
85 * @init: client init routine, called during probe
87 struct stmpe_client_info {
92 int (*read_byte)(struct stmpe *stmpe, u8 reg);
93 int (*write_byte)(struct stmpe *stmpe, u8 reg, u8 val);
94 int (*read_block)(struct stmpe *stmpe, u8 reg, u8 len, u8 *values);
95 int (*write_block)(struct stmpe *stmpe, u8 reg, u8 len,
97 void (*init)(struct stmpe *stmpe);
100 int stmpe_probe(struct stmpe_client_info *ci, int partnum);
101 int stmpe_remove(struct stmpe *stmpe);
103 #define STMPE_ICR_LSB_HIGH (1 << 2)
104 #define STMPE_ICR_LSB_EDGE (1 << 1)
105 #define STMPE_ICR_LSB_GIM (1 << 0)
111 #define STMPE811_IRQ_TOUCH_DET 0
112 #define STMPE811_IRQ_FIFO_TH 1
113 #define STMPE811_IRQ_FIFO_OFLOW 2
114 #define STMPE811_IRQ_FIFO_FULL 3
115 #define STMPE811_IRQ_FIFO_EMPTY 4
116 #define STMPE811_IRQ_TEMP_SENS 5
117 #define STMPE811_IRQ_ADC 6
118 #define STMPE811_IRQ_GPIOC 7
119 #define STMPE811_NR_INTERNAL_IRQS 8
121 #define STMPE811_REG_CHIP_ID 0x00
122 #define STMPE811_REG_SYS_CTRL2 0x04
123 #define STMPE811_REG_INT_CTRL 0x09
124 #define STMPE811_REG_INT_EN 0x0A
125 #define STMPE811_REG_INT_STA 0x0B
126 #define STMPE811_REG_GPIO_INT_EN 0x0C
127 #define STMPE811_REG_GPIO_INT_STA 0x0D
128 #define STMPE811_REG_GPIO_SET_PIN 0x10
129 #define STMPE811_REG_GPIO_CLR_PIN 0x11
130 #define STMPE811_REG_GPIO_MP_STA 0x12
131 #define STMPE811_REG_GPIO_DIR 0x13
132 #define STMPE811_REG_GPIO_ED 0x14
133 #define STMPE811_REG_GPIO_RE 0x15
134 #define STMPE811_REG_GPIO_FE 0x16
135 #define STMPE811_REG_GPIO_AF 0x17
137 #define STMPE811_SYS_CTRL2_ADC_OFF (1 << 0)
138 #define STMPE811_SYS_CTRL2_TSC_OFF (1 << 1)
139 #define STMPE811_SYS_CTRL2_GPIO_OFF (1 << 2)
140 #define STMPE811_SYS_CTRL2_TS_OFF (1 << 3)
146 #define STMPE1601_IRQ_GPIOC 8
147 #define STMPE1601_IRQ_PWM3 7
148 #define STMPE1601_IRQ_PWM2 6
149 #define STMPE1601_IRQ_PWM1 5
150 #define STMPE1601_IRQ_PWM0 4
151 #define STMPE1601_IRQ_KEYPAD_OVER 2
152 #define STMPE1601_IRQ_KEYPAD 1
153 #define STMPE1601_IRQ_WAKEUP 0
154 #define STMPE1601_NR_INTERNAL_IRQS 9
156 #define STMPE1601_REG_SYS_CTRL 0x02
157 #define STMPE1601_REG_SYS_CTRL2 0x03
158 #define STMPE1601_REG_ICR_LSB 0x11
159 #define STMPE1601_REG_IER_LSB 0x13
160 #define STMPE1601_REG_ISR_MSB 0x14
161 #define STMPE1601_REG_CHIP_ID 0x80
162 #define STMPE1601_REG_INT_EN_GPIO_MASK_LSB 0x17
163 #define STMPE1601_REG_INT_STA_GPIO_MSB 0x18
164 #define STMPE1601_REG_GPIO_MP_LSB 0x87
165 #define STMPE1601_REG_GPIO_SET_LSB 0x83
166 #define STMPE1601_REG_GPIO_CLR_LSB 0x85
167 #define STMPE1601_REG_GPIO_SET_DIR_LSB 0x89
168 #define STMPE1601_REG_GPIO_ED_MSB 0x8A
169 #define STMPE1601_REG_GPIO_RE_LSB 0x8D
170 #define STMPE1601_REG_GPIO_FE_LSB 0x8F
171 #define STMPE1601_REG_GPIO_AF_U_MSB 0x92
173 #define STMPE1601_SYS_CTRL_ENABLE_GPIO (1 << 3)
174 #define STMPE1601_SYS_CTRL_ENABLE_KPC (1 << 1)
175 #define STMPE1601_SYSCON_ENABLE_SPWM (1 << 0)
177 /* The 1601/2403 share the same masks */
178 #define STMPE1601_AUTOSLEEP_TIMEOUT_MASK (0x7)
179 #define STPME1601_AUTOSLEEP_ENABLE (1 << 3)
185 #define STMPE24XX_IRQ_GPIOC 8
186 #define STMPE24XX_IRQ_PWM2 7
187 #define STMPE24XX_IRQ_PWM1 6
188 #define STMPE24XX_IRQ_PWM0 5
189 #define STMPE24XX_IRQ_ROT_OVER 4
190 #define STMPE24XX_IRQ_ROT 3
191 #define STMPE24XX_IRQ_KEYPAD_OVER 2
192 #define STMPE24XX_IRQ_KEYPAD 1
193 #define STMPE24XX_IRQ_WAKEUP 0
194 #define STMPE24XX_NR_INTERNAL_IRQS 9
196 #define STMPE24XX_REG_SYS_CTRL 0x02
197 #define STMPE24XX_REG_ICR_LSB 0x11
198 #define STMPE24XX_REG_IER_LSB 0x13
199 #define STMPE24XX_REG_ISR_MSB 0x14
200 #define STMPE24XX_REG_CHIP_ID 0x80
201 #define STMPE24XX_REG_IEGPIOR_LSB 0x18
202 #define STMPE24XX_REG_ISGPIOR_MSB 0x19
203 #define STMPE24XX_REG_GPMR_LSB 0xA5
204 #define STMPE24XX_REG_GPSR_LSB 0x85
205 #define STMPE24XX_REG_GPCR_LSB 0x88
206 #define STMPE24XX_REG_GPDR_LSB 0x8B
207 #define STMPE24XX_REG_GPEDR_MSB 0x8C
208 #define STMPE24XX_REG_GPRER_LSB 0x91
209 #define STMPE24XX_REG_GPFER_LSB 0x94
210 #define STMPE24XX_REG_GPAFR_U_MSB 0x9B
212 #define STMPE24XX_SYS_CTRL_ENABLE_GPIO (1 << 3)
213 #define STMPE24XX_SYSCON_ENABLE_PWM (1 << 2)
214 #define STMPE24XX_SYS_CTRL_ENABLE_KPC (1 << 1)
215 #define STMPE24XX_SYSCON_ENABLE_ROT (1 << 0)