3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2003-2012, Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/kernel.h>
19 #include <linux/device.h>
21 #include <linux/errno.h>
22 #include <linux/types.h>
23 #include <linux/fcntl.h>
24 #include <linux/pci.h>
25 #include <linux/poll.h>
26 #include <linux/ioctl.h>
27 #include <linux/cdev.h>
28 #include <linux/sched.h>
29 #include <linux/uuid.h>
30 #include <linux/compat.h>
31 #include <linux/jiffies.h>
32 #include <linux/interrupt.h>
34 #include <linux/pm_domain.h>
35 #include <linux/pm_runtime.h>
37 #include <linux/mei.h>
41 #include "hw-me-regs.h"
44 /* mei_pci_tbl - PCI Device ID Table */
45 static const struct pci_device_id mei_me_pci_tbl[] = {
46 {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)},
47 {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)},
48 {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)},
49 {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)},
50 {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)},
51 {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)},
52 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)},
53 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)},
54 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)},
55 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)},
56 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)},
58 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)},
59 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)},
60 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)},
61 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)},
62 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)},
63 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)},
64 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)},
65 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)},
66 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)},
67 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)},
68 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)},
69 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)},
70 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)},
72 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)},
73 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)},
74 {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)},
75 {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)},
76 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
77 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
78 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
79 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)},
80 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)},
81 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)},
82 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)},
83 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)},
84 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)},
86 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
87 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
88 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_cfg)},
89 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_cfg)},
91 /* required last entry */
95 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
98 static inline void mei_me_set_pm_domain(struct mei_device *dev);
99 static inline void mei_me_unset_pm_domain(struct mei_device *dev);
101 static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
102 static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
103 #endif /* CONFIG_PM */
106 * mei_me_quirk_probe - probe for devices that doesn't valid ME interface
108 * @pdev: PCI device structure
109 * @cfg: per generation config
111 * Return: true if ME Interface is valid, false otherwise
113 static bool mei_me_quirk_probe(struct pci_dev *pdev,
114 const struct mei_cfg *cfg)
116 if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
117 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
125 * mei_me_probe - Device Initialization Routine
127 * @pdev: PCI device structure
128 * @ent: entry in kcs_pci_tbl
130 * Return: 0 on success, <0 on failure.
132 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
134 const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data);
135 struct mei_device *dev;
136 struct mei_me_hw *hw;
137 unsigned int irqflags;
141 if (!mei_me_quirk_probe(pdev, cfg))
145 err = pci_enable_device(pdev);
147 dev_err(&pdev->dev, "failed to enable pci device.\n");
150 /* set PCI host mastering */
151 pci_set_master(pdev);
152 /* pci request regions for mei driver */
153 err = pci_request_regions(pdev, KBUILD_MODNAME);
155 dev_err(&pdev->dev, "failed to get pci regions.\n");
159 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
160 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
162 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
164 err = dma_set_coherent_mask(&pdev->dev,
168 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
169 goto release_regions;
173 /* allocates and initializes the mei dev structure */
174 dev = mei_me_dev_init(pdev, cfg);
177 goto release_regions;
180 /* mapping IO device memory */
181 hw->mem_addr = pci_iomap(pdev, 0, 0);
183 dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
187 pci_enable_msi(pdev);
189 /* request and enable interrupt */
190 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
192 err = request_threaded_irq(pdev->irq,
193 mei_me_irq_quick_handler,
194 mei_me_irq_thread_handler,
195 irqflags, KBUILD_MODNAME, dev);
197 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
202 if (mei_start(dev)) {
203 dev_err(&pdev->dev, "init hw failure.\n");
208 pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
209 pm_runtime_use_autosuspend(&pdev->dev);
211 err = mei_register(dev, &pdev->dev);
215 pci_set_drvdata(pdev, dev);
217 schedule_delayed_work(&dev->timer_work, HZ);
220 * For not wake-able HW runtime pm framework
221 * can't be used on pci device level.
222 * Use domain runtime pm callbacks instead.
224 if (!pci_dev_run_wake(pdev))
225 mei_me_set_pm_domain(dev);
227 if (mei_pg_is_enabled(dev))
228 pm_runtime_put_noidle(&pdev->dev);
230 dev_dbg(&pdev->dev, "initialization successful.\n");
235 mei_cancel_work(dev);
236 mei_disable_interrupts(dev);
237 free_irq(pdev->irq, dev);
239 pci_disable_msi(pdev);
240 pci_iounmap(pdev, hw->mem_addr);
244 pci_release_regions(pdev);
246 pci_disable_device(pdev);
248 dev_err(&pdev->dev, "initialization failed.\n");
253 * mei_me_remove - Device Removal Routine
255 * @pdev: PCI device structure
257 * mei_remove is called by the PCI subsystem to alert the driver
258 * that it should release a PCI device.
260 static void mei_me_remove(struct pci_dev *pdev)
262 struct mei_device *dev;
263 struct mei_me_hw *hw;
265 dev = pci_get_drvdata(pdev);
269 if (mei_pg_is_enabled(dev))
270 pm_runtime_get_noresume(&pdev->dev);
275 dev_dbg(&pdev->dev, "stop\n");
278 if (!pci_dev_run_wake(pdev))
279 mei_me_unset_pm_domain(dev);
281 /* disable interrupts */
282 mei_disable_interrupts(dev);
284 free_irq(pdev->irq, dev);
285 pci_disable_msi(pdev);
288 pci_iounmap(pdev, hw->mem_addr);
294 pci_release_regions(pdev);
295 pci_disable_device(pdev);
299 #ifdef CONFIG_PM_SLEEP
300 static int mei_me_pci_suspend(struct device *device)
302 struct pci_dev *pdev = to_pci_dev(device);
303 struct mei_device *dev = pci_get_drvdata(pdev);
308 dev_dbg(&pdev->dev, "suspend\n");
312 mei_disable_interrupts(dev);
314 free_irq(pdev->irq, dev);
315 pci_disable_msi(pdev);
320 static int mei_me_pci_resume(struct device *device)
322 struct pci_dev *pdev = to_pci_dev(device);
323 struct mei_device *dev;
324 unsigned int irqflags;
327 dev = pci_get_drvdata(pdev);
331 pci_enable_msi(pdev);
333 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
335 /* request and enable interrupt */
336 err = request_threaded_irq(pdev->irq,
337 mei_me_irq_quick_handler,
338 mei_me_irq_thread_handler,
339 irqflags, KBUILD_MODNAME, dev);
342 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
347 err = mei_restart(dev);
351 /* Start timer if stopped in suspend */
352 schedule_delayed_work(&dev->timer_work, HZ);
356 #endif /* CONFIG_PM_SLEEP */
359 static int mei_me_pm_runtime_idle(struct device *device)
361 struct pci_dev *pdev = to_pci_dev(device);
362 struct mei_device *dev;
364 dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
366 dev = pci_get_drvdata(pdev);
369 if (mei_write_is_idle(dev))
370 pm_runtime_autosuspend(device);
375 static int mei_me_pm_runtime_suspend(struct device *device)
377 struct pci_dev *pdev = to_pci_dev(device);
378 struct mei_device *dev;
381 dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
383 dev = pci_get_drvdata(pdev);
387 mutex_lock(&dev->device_lock);
389 if (mei_write_is_idle(dev))
390 ret = mei_me_pg_enter_sync(dev);
394 mutex_unlock(&dev->device_lock);
396 dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
401 static int mei_me_pm_runtime_resume(struct device *device)
403 struct pci_dev *pdev = to_pci_dev(device);
404 struct mei_device *dev;
407 dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
409 dev = pci_get_drvdata(pdev);
413 mutex_lock(&dev->device_lock);
415 ret = mei_me_pg_exit_sync(dev);
417 mutex_unlock(&dev->device_lock);
419 dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
425 * mei_me_set_pm_domain - fill and set pm domain structure for device
429 static inline void mei_me_set_pm_domain(struct mei_device *dev)
431 struct pci_dev *pdev = to_pci_dev(dev->dev);
433 if (pdev->dev.bus && pdev->dev.bus->pm) {
434 dev->pg_domain.ops = *pdev->dev.bus->pm;
436 dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
437 dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
438 dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
440 dev_pm_domain_set(&pdev->dev, &dev->pg_domain);
445 * mei_me_unset_pm_domain - clean pm domain structure for device
449 static inline void mei_me_unset_pm_domain(struct mei_device *dev)
451 /* stop using pm callbacks if any */
452 dev_pm_domain_set(dev->dev, NULL);
455 static const struct dev_pm_ops mei_me_pm_ops = {
456 SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
459 mei_me_pm_runtime_suspend,
460 mei_me_pm_runtime_resume,
461 mei_me_pm_runtime_idle)
464 #define MEI_ME_PM_OPS (&mei_me_pm_ops)
466 #define MEI_ME_PM_OPS NULL
467 #endif /* CONFIG_PM */
469 * PCI driver structure
471 static struct pci_driver mei_me_driver = {
472 .name = KBUILD_MODNAME,
473 .id_table = mei_me_pci_tbl,
474 .probe = mei_me_probe,
475 .remove = mei_me_remove,
476 .shutdown = mei_me_remove,
477 .driver.pm = MEI_ME_PM_OPS,
480 module_pci_driver(mei_me_driver);
482 MODULE_AUTHOR("Intel Corporation");
483 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
484 MODULE_LICENSE("GPL v2");