4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5 * Copyright (C) 2015-16 Renesas Electronics Corporation
6 * Copyright (C) 2009 Magnus Damm
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Based on "Compaq ASIC3 support":
14 * Copyright 2001 Compaq Computer Corporation.
15 * Copyright 2004-2005 Phil Blundell
16 * Copyright 2007-2008 OpenedHand Ltd.
18 * Authors: Phil Blundell <pb@handhelds.org>,
19 * Samuel Ortiz <sameo@openedhand.com>
23 #include <linux/kernel.h>
24 #include <linux/clk.h>
25 #include <linux/slab.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of_device.h>
29 #include <linux/platform_device.h>
30 #include <linux/mmc/host.h>
31 #include <linux/mfd/tmio.h>
32 #include <linux/sh_dma.h>
33 #include <linux/delay.h>
34 #include <linux/pinctrl/consumer.h>
35 #include <linux/pinctrl/pinctrl-state.h>
36 #include <linux/regulator/consumer.h>
42 #define host_to_priv(host) container_of((host)->pdata, struct sh_mobile_sdhi, mmc_data)
44 struct sh_mobile_sdhi_of_data {
45 unsigned long tmio_flags;
46 unsigned long capabilities;
47 unsigned long capabilities2;
48 enum dma_slave_buswidth dma_buswidth;
49 dma_addr_t dma_rx_offset;
53 static const struct sh_mobile_sdhi_of_data of_default_cfg = {
54 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
57 static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = {
58 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
60 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
63 static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = {
64 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
65 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_FAST_CLK_CHG,
66 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
67 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
68 .dma_rx_offset = 0x2000,
71 static const struct sh_mobile_sdhi_of_data of_rcar_gen3_compatible = {
72 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
73 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_FAST_CLK_CHG,
74 .capabilities = MMC_CAP_SD_HIGHSPEED,
78 static const struct of_device_id sh_mobile_sdhi_of_match[] = {
79 { .compatible = "renesas,sdhi-shmobile" },
80 { .compatible = "renesas,sdhi-sh7372" },
81 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
82 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
83 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
84 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
85 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
86 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
87 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
88 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
89 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
90 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
91 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
94 MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);
96 struct sh_mobile_sdhi {
98 struct tmio_mmc_data mmc_data;
99 struct tmio_mmc_dma dma_priv;
100 struct pinctrl *pinctrl;
101 struct pinctrl_state *pins_default, *pins_uhs;
104 static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
110 * sh_mobile_sdhi_of_data :: dma_buswidth
112 switch (sd_ctrl_read16(host, CTL_VERSION)) {
114 val = (width == 32) ? 0x0001 : 0x0000;
117 val = (width == 32) ? 0x0000 : 0x0001;
119 case 0xCC10: /* Gen3, SD only */
120 case 0xCD10: /* Gen3, SD + MMC */
123 else if (width == 32)
133 sd_ctrl_write16(host, EXT_ACC, val);
136 static int sh_mobile_sdhi_clk_enable(struct tmio_mmc_host *host)
138 struct mmc_host *mmc = host->mmc;
139 struct sh_mobile_sdhi *priv = host_to_priv(host);
140 int ret = clk_prepare_enable(priv->clk);
145 * The clock driver may not know what maximum frequency
146 * actually works, so it should be set with the max-frequency
147 * property which will already have been read to f_max. If it
148 * was missing, assume the current frequency is the maximum.
151 mmc->f_max = clk_get_rate(priv->clk);
154 * Minimum frequency is the minimum input clock frequency
155 * divided by our maximum divider.
157 mmc->f_min = max(clk_round_rate(priv->clk, 1) / 512, 1L);
159 /* enable 16bit data access on SDBUF as default */
160 sh_mobile_sdhi_sdbuf_width(host, 16);
165 static unsigned int sh_mobile_sdhi_clk_update(struct tmio_mmc_host *host,
166 unsigned int new_clock)
168 struct sh_mobile_sdhi *priv = host_to_priv(host);
169 unsigned int freq, best_freq, diff_min, diff;
176 * We want the bus clock to be as close as possible to, but no
177 * greater than, new_clock. As we can divide by 1 << i for
178 * any i in [0, 9] we want the input clock to be as close as
179 * possible, but no greater than, new_clock << i.
181 for (i = min(9, ilog2(UINT_MAX / new_clock)); i >= 0; i--) {
182 freq = clk_round_rate(priv->clk, new_clock << i);
183 if (freq > (new_clock << i)) {
184 /* Too fast; look for a slightly slower option */
185 freq = clk_round_rate(priv->clk,
186 (new_clock << i) / 4 * 3);
187 if (freq > (new_clock << i))
191 diff = new_clock - (freq >> i);
192 if (diff <= diff_min) {
198 clk_set_rate(priv->clk, best_freq);
203 static void sh_mobile_sdhi_clk_disable(struct tmio_mmc_host *host)
205 struct sh_mobile_sdhi *priv = host_to_priv(host);
207 clk_disable_unprepare(priv->clk);
210 static int sh_mobile_sdhi_start_signal_voltage_switch(struct mmc_host *mmc,
213 struct tmio_mmc_host *host = mmc_priv(mmc);
214 struct sh_mobile_sdhi *priv = host_to_priv(host);
215 struct pinctrl_state *pin_state;
218 switch (ios->signal_voltage) {
219 case MMC_SIGNAL_VOLTAGE_330:
220 pin_state = priv->pins_default;
222 case MMC_SIGNAL_VOLTAGE_180:
223 pin_state = priv->pins_uhs;
230 * If anything is missing, assume signal voltage is fixed at
231 * 3.3V and succeed/fail accordingly.
233 if (IS_ERR(priv->pinctrl) || IS_ERR(pin_state))
234 return ios->signal_voltage ==
235 MMC_SIGNAL_VOLTAGE_330 ? 0 : -EINVAL;
237 ret = mmc_regulator_set_vqmmc(host->mmc, ios);
241 return pinctrl_select_state(priv->pinctrl, pin_state);
244 static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
248 while (--timeout && !(sd_ctrl_read16(host, CTL_STATUS2) & (1 << 13)))
252 dev_warn(&host->pdev->dev, "timeout waiting for SD bus idle\n");
259 static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
264 case CTL_STOP_INTERNAL_ACTION:
265 case CTL_XFER_BLK_COUNT:
266 case CTL_SD_CARD_CLK_CTL:
267 case CTL_SD_XFER_LEN:
268 case CTL_SD_MEM_CARD_OPT:
269 case CTL_TRANSACTION_CTL:
272 return sh_mobile_sdhi_wait_idle(host);
278 static int sh_mobile_sdhi_multi_io_quirk(struct mmc_card *card,
279 unsigned int direction, int blk_size)
282 * In Renesas controllers, when performing a
283 * multiple block read of one or two blocks,
284 * depending on the timing with which the
285 * response register is read, the response
286 * value may not be read properly.
287 * Use single block read for this HW bug
289 if ((direction == MMC_DATA_READ) &&
296 static void sh_mobile_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
298 sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0);
300 /* enable 32bit access if DMA mode if possibile */
301 sh_mobile_sdhi_sdbuf_width(host, enable ? 32 : 16);
304 static int sh_mobile_sdhi_probe(struct platform_device *pdev)
306 const struct of_device_id *of_id =
307 of_match_device(sh_mobile_sdhi_of_match, &pdev->dev);
308 struct sh_mobile_sdhi *priv;
309 struct tmio_mmc_data *mmc_data;
310 struct tmio_mmc_data *mmd = pdev->dev.platform_data;
311 struct tmio_mmc_host *host;
312 struct resource *res;
314 struct tmio_mmc_dma *dma_priv;
316 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
320 priv = devm_kzalloc(&pdev->dev, sizeof(struct sh_mobile_sdhi), GFP_KERNEL);
324 mmc_data = &priv->mmc_data;
325 dma_priv = &priv->dma_priv;
327 priv->clk = devm_clk_get(&pdev->dev, NULL);
328 if (IS_ERR(priv->clk)) {
329 ret = PTR_ERR(priv->clk);
330 dev_err(&pdev->dev, "cannot get clock: %d\n", ret);
334 priv->pinctrl = devm_pinctrl_get(&pdev->dev);
335 if (!IS_ERR(priv->pinctrl)) {
336 priv->pins_default = pinctrl_lookup_state(priv->pinctrl,
337 PINCTRL_STATE_DEFAULT);
338 priv->pins_uhs = pinctrl_lookup_state(priv->pinctrl,
342 host = tmio_mmc_host_alloc(pdev);
348 if (of_id && of_id->data) {
349 const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
351 mmc_data->flags |= of_data->tmio_flags;
352 mmc_data->capabilities |= of_data->capabilities;
353 mmc_data->capabilities2 |= of_data->capabilities2;
354 mmc_data->dma_rx_offset = of_data->dma_rx_offset;
355 dma_priv->dma_buswidth = of_data->dma_buswidth;
356 host->bus_shift = of_data->bus_shift;
359 host->dma = dma_priv;
360 host->write16_hook = sh_mobile_sdhi_write16_hook;
361 host->clk_enable = sh_mobile_sdhi_clk_enable;
362 host->clk_update = sh_mobile_sdhi_clk_update;
363 host->clk_disable = sh_mobile_sdhi_clk_disable;
364 host->multi_io_quirk = sh_mobile_sdhi_multi_io_quirk;
365 host->start_signal_voltage_switch = sh_mobile_sdhi_start_signal_voltage_switch;
367 /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
368 if (!host->bus_shift && resource_size(res) > 0x100) /* old way to determine the shift */
374 dma_priv->filter = shdma_chan_filter;
375 dma_priv->enable = sh_mobile_sdhi_enable_dma;
377 mmc_data->alignment_shift = 1; /* 2-byte alignment */
378 mmc_data->capabilities |= MMC_CAP_MMC_HIGHSPEED;
381 * All SDHI blocks support 2-byte and larger block sizes in 4-bit
384 mmc_data->flags |= TMIO_MMC_BLKSZ_2BYTES;
387 * All SDHI blocks support SDIO IRQ signalling.
389 mmc_data->flags |= TMIO_MMC_SDIO_IRQ;
392 * All SDHI have CMD12 controll bit
394 mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
397 * All SDHI need SDIO_INFO1 reserved bit
399 mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
401 ret = tmio_mmc_host_probe(host, mmc_data);
406 irq = platform_get_irq(pdev, i);
410 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0,
411 dev_name(&pdev->dev), host);
416 /* There must be at least one IRQ source */
422 dev_info(&pdev->dev, "%s base at 0x%08lx max clock rate %u MHz\n",
423 mmc_hostname(host->mmc), (unsigned long)
424 (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start),
425 host->mmc->f_max / 1000000);
430 tmio_mmc_host_remove(host);
432 tmio_mmc_host_free(host);
437 static int sh_mobile_sdhi_remove(struct platform_device *pdev)
439 struct mmc_host *mmc = platform_get_drvdata(pdev);
440 struct tmio_mmc_host *host = mmc_priv(mmc);
442 tmio_mmc_host_remove(host);
447 static const struct dev_pm_ops tmio_mmc_dev_pm_ops = {
448 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
449 pm_runtime_force_resume)
450 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
451 tmio_mmc_host_runtime_resume,
455 static struct platform_driver sh_mobile_sdhi_driver = {
457 .name = "sh_mobile_sdhi",
458 .pm = &tmio_mmc_dev_pm_ops,
459 .of_match_table = sh_mobile_sdhi_of_match,
461 .probe = sh_mobile_sdhi_probe,
462 .remove = sh_mobile_sdhi_remove,
465 module_platform_driver(sh_mobile_sdhi_driver);
467 MODULE_DESCRIPTION("SuperH Mobile SDHI driver");
468 MODULE_AUTHOR("Magnus Damm");
469 MODULE_LICENSE("GPL v2");
470 MODULE_ALIAS("platform:sh_mobile_sdhi");