drivers/mmc/host/sh_mobile_sdhi.c

   1 /*
   2  * SuperH Mobile SDHI
   3  *
   4  * Copyright (C) 2016 Sang Engineering, Wolfram Sang
   5  * Copyright (C) 2015-16 Renesas Electronics Corporation
   6  * Copyright (C) 2009 Magnus Damm
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Based on "Compaq ASIC3 support":
  13  *
  14  * Copyright 2001 Compaq Computer Corporation.
  15  * Copyright 2004-2005 Phil Blundell
  16  * Copyright 2007-2008 OpenedHand Ltd.
  17  *
  18  * Authors: Phil Blundell <pb@handhelds.org>,
  19  *          Samuel Ortiz <sameo@openedhand.com>
  20  *
  21  */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/clk.h>
  25 #include <linux/slab.h>
  26 #include <linux/mod_devicetable.h>
  27 #include <linux/module.h>
  28 #include <linux/of_device.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/mmc/host.h>
  31 #include <linux/mfd/tmio.h>
  32 #include <linux/sh_dma.h>
  33 #include <linux/delay.h>
  34 #include <linux/pinctrl/consumer.h>
  35 #include <linux/pinctrl/pinctrl-state.h>
  36 #include <linux/regulator/consumer.h>
  37
  38 #include "tmio_mmc.h"
  39
  40 #define EXT_ACC           0xe4
  41
  42 #define host_to_priv(host) container_of((host)->pdata, struct sh_mobile_sdhi, mmc_data)
  43
  44 struct sh_mobile_sdhi_of_data {
  45         unsigned long tmio_flags;
  46         unsigned long capabilities;
  47         unsigned long capabilities2;
  48         enum dma_slave_buswidth dma_buswidth;
  49         dma_addr_t dma_rx_offset;
  50         unsigned bus_shift;
  51 };
  52
  53 static const struct sh_mobile_sdhi_of_data of_default_cfg = {
  54         .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  55 };
  56
  57 static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = {
  58         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
  59                           TMIO_MMC_CLK_ACTUAL,
  60         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
  61 };
  62
  63 static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = {
  64         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
  65                           TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
  66         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
  67         .dma_buswidth   = DMA_SLAVE_BUSWIDTH_4_BYTES,
  68         .dma_rx_offset  = 0x2000,
  69 };
  70
  71 static const struct sh_mobile_sdhi_of_data of_rcar_gen3_compatible = {
  72         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
  73                           TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
  74         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
  75         .bus_shift      = 2,
  76 };
  77
  78 static const struct of_device_id sh_mobile_sdhi_of_match[] = {
  79         { .compatible = "renesas,sdhi-shmobile" },
  80         { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
  81         { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
  82         { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
  83         { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
  84         { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
  85         { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
  86         { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
  87         { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
  88         { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
  89         { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
  90         { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
  91         {},
  92 };
  93 MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);
  94
  95 struct sh_mobile_sdhi {
  96         struct clk *clk;
  97         struct tmio_mmc_data mmc_data;
  98         struct tmio_mmc_dma dma_priv;
  99         struct pinctrl *pinctrl;
 100         struct pinctrl_state *pins_default, *pins_uhs;
 101 };
 102
 103 static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
 104 {
 105         u32 val;
 106
 107         /*
 108          * see also
 109          *      sh_mobile_sdhi_of_data :: dma_buswidth
 110          */
 111         switch (sd_ctrl_read16(host, CTL_VERSION)) {
 112         case 0x490C:
 113                 val = (width == 32) ? 0x0001 : 0x0000;
 114                 break;
 115         case 0xCB0D:
 116                 val = (width == 32) ? 0x0000 : 0x0001;
 117                 break;
 118         case 0xCC10: /* Gen3, SD only */
 119         case 0xCD10: /* Gen3, SD + MMC */
 120                 if (width == 64)
 121                         val = 0x0000;
 122                 else if (width == 32)
 123                         val = 0x0101;
 124                 else
 125                         val = 0x0001;
 126                 break;
 127         default:
 128                 /* nothing to do */
 129                 return;
 130         }
 131
 132         sd_ctrl_write16(host, EXT_ACC, val);
 133 }
 134
 135 static int sh_mobile_sdhi_clk_enable(struct tmio_mmc_host *host)
 136 {
 137         struct mmc_host *mmc = host->mmc;
 138         struct sh_mobile_sdhi *priv = host_to_priv(host);
 139         int ret = clk_prepare_enable(priv->clk);
 140         if (ret < 0)
 141                 return ret;
 142
 143         /*
 144          * The clock driver may not know what maximum frequency
 145          * actually works, so it should be set with the max-frequency
 146          * property which will already have been read to f_max.  If it
 147          * was missing, assume the current frequency is the maximum.
 148          */
 149         if (!mmc->f_max)
 150                 mmc->f_max = clk_get_rate(priv->clk);
 151
 152         /*
 153          * Minimum frequency is the minimum input clock frequency
 154          * divided by our maximum divider.
 155          */
 156         mmc->f_min = max(clk_round_rate(priv->clk, 1) / 512, 1L);
 157
 158         /* enable 16bit data access on SDBUF as default */
 159         sh_mobile_sdhi_sdbuf_width(host, 16);
 160
 161         return 0;
 162 }
 163
 164 static unsigned int sh_mobile_sdhi_clk_update(struct tmio_mmc_host *host,
 165                                               unsigned int new_clock)
 166 {
 167         struct sh_mobile_sdhi *priv = host_to_priv(host);
 168         unsigned int freq, diff, best_freq = 0, diff_min = ~0;
 169         int i, ret;
 170
 171         /* tested only on RCar Gen2+ currently; may work for others */
 172         if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
 173                 return clk_get_rate(priv->clk);
 174
 175         /*
 176          * We want the bus clock to be as close as possible to, but no
 177          * greater than, new_clock.  As we can divide by 1 << i for
 178          * any i in [0, 9] we want the input clock to be as close as
 179          * possible, but no greater than, new_clock << i.
 180          */
 181         for (i = min(9, ilog2(UINT_MAX / new_clock)); i >= 0; i--) {
 182                 freq = clk_round_rate(priv->clk, new_clock << i);
 183                 if (freq > (new_clock << i)) {
 184                         /* Too fast; look for a slightly slower option */
 185                         freq = clk_round_rate(priv->clk,
 186                                               (new_clock << i) / 4 * 3);
 187                         if (freq > (new_clock << i))
 188                                 continue;
 189                 }
 190
 191                 diff = new_clock - (freq >> i);
 192                 if (diff <= diff_min) {
 193                         best_freq = freq;
 194                         diff_min = diff;
 195                 }
 196         }
 197
 198         ret = clk_set_rate(priv->clk, best_freq);
 199
 200         return ret == 0 ? best_freq : clk_get_rate(priv->clk);
 201 }
 202
 203 static void sh_mobile_sdhi_clk_disable(struct tmio_mmc_host *host)
 204 {
 205         struct sh_mobile_sdhi *priv = host_to_priv(host);
 206
 207         clk_disable_unprepare(priv->clk);
 208 }
 209
 210 static int sh_mobile_sdhi_start_signal_voltage_switch(struct mmc_host *mmc,
 211                                                       struct mmc_ios *ios)
 212 {
 213         struct tmio_mmc_host *host = mmc_priv(mmc);
 214         struct sh_mobile_sdhi *priv = host_to_priv(host);
 215         struct pinctrl_state *pin_state;
 216         int ret;
 217
 218         switch (ios->signal_voltage) {
 219         case MMC_SIGNAL_VOLTAGE_330:
 220                 pin_state = priv->pins_default;
 221                 break;
 222         case MMC_SIGNAL_VOLTAGE_180:
 223                 pin_state = priv->pins_uhs;
 224                 break;
 225         default:
 226                 return -EINVAL;
 227         }
 228
 229         /*
 230          * If anything is missing, assume signal voltage is fixed at
 231          * 3.3V and succeed/fail accordingly.
 232          */
 233         if (IS_ERR(priv->pinctrl) || IS_ERR(pin_state))
 234                 return ios->signal_voltage ==
 235                         MMC_SIGNAL_VOLTAGE_330 ? 0 : -EINVAL;
 236
 237         ret = mmc_regulator_set_vqmmc(host->mmc, ios);
 238         if (ret)
 239                 return ret;
 240
 241         return pinctrl_select_state(priv->pinctrl, pin_state);
 242 }
 243
 244 static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
 245 {
 246         int timeout = 1000;
 247
 248         while (--timeout && !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS)
 249                               & TMIO_STAT_SCLKDIVEN))
 250                 udelay(1);
 251
 252         if (!timeout) {
 253                 dev_warn(&host->pdev->dev, "timeout waiting for SD bus idle\n");
 254                 return -EBUSY;
 255         }
 256
 257         return 0;
 258 }
 259
 260 static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
 261 {
 262         switch (addr)
 263         {
 264         case CTL_SD_CMD:
 265         case CTL_STOP_INTERNAL_ACTION:
 266         case CTL_XFER_BLK_COUNT:
 267         case CTL_SD_CARD_CLK_CTL:
 268         case CTL_SD_XFER_LEN:
 269         case CTL_SD_MEM_CARD_OPT:
 270         case CTL_TRANSACTION_CTL:
 271         case CTL_DMA_ENABLE:
 272         case EXT_ACC:
 273                 return sh_mobile_sdhi_wait_idle(host);
 274         }
 275
 276         return 0;
 277 }
 278
 279 static int sh_mobile_sdhi_multi_io_quirk(struct mmc_card *card,
 280                                          unsigned int direction, int blk_size)
 281 {
 282         /*
 283          * In Renesas controllers, when performing a
 284          * multiple block read of one or two blocks,
 285          * depending on the timing with which the
 286          * response register is read, the response
 287          * value may not be read properly.
 288          * Use single block read for this HW bug
 289          */
 290         if ((direction == MMC_DATA_READ) &&
 291             blk_size == 2)
 292                 return 1;
 293
 294         return blk_size;
 295 }
 296
 297 static void sh_mobile_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
 298 {
 299         sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0);
 300
 301         /* enable 32bit access if DMA mode if possibile */
 302         sh_mobile_sdhi_sdbuf_width(host, enable ? 32 : 16);
 303 }
 304
 305 static int sh_mobile_sdhi_probe(struct platform_device *pdev)
 306 {
 307         const struct of_device_id *of_id =
 308                 of_match_device(sh_mobile_sdhi_of_match, &pdev->dev);
 309         struct sh_mobile_sdhi *priv;
 310         struct tmio_mmc_data *mmc_data;
 311         struct tmio_mmc_data *mmd = pdev->dev.platform_data;
 312         struct tmio_mmc_host *host;
 313         struct resource *res;
 314         int irq, ret, i = 0;
 315         struct tmio_mmc_dma *dma_priv;
 316
 317         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 318         if (!res)
 319                 return -EINVAL;
 320
 321         priv = devm_kzalloc(&pdev->dev, sizeof(struct sh_mobile_sdhi), GFP_KERNEL);
 322         if (!priv)
 323                 return -ENOMEM;
 324
 325         mmc_data = &priv->mmc_data;
 326         dma_priv = &priv->dma_priv;
 327
 328         priv->clk = devm_clk_get(&pdev->dev, NULL);
 329         if (IS_ERR(priv->clk)) {
 330                 ret = PTR_ERR(priv->clk);
 331                 dev_err(&pdev->dev, "cannot get clock: %d\n", ret);
 332                 goto eprobe;
 333         }
 334
 335         priv->pinctrl = devm_pinctrl_get(&pdev->dev);
 336         if (!IS_ERR(priv->pinctrl)) {
 337                 priv->pins_default = pinctrl_lookup_state(priv->pinctrl,
 338                                                 PINCTRL_STATE_DEFAULT);
 339                 priv->pins_uhs = pinctrl_lookup_state(priv->pinctrl,
 340                                                 "state_uhs");
 341         }
 342
 343         host = tmio_mmc_host_alloc(pdev);
 344         if (!host) {
 345                 ret = -ENOMEM;
 346                 goto eprobe;
 347         }
 348
 349         if (of_id && of_id->data) {
 350                 const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
 351
 352                 mmc_data->flags |= of_data->tmio_flags;
 353                 mmc_data->capabilities |= of_data->capabilities;
 354                 mmc_data->capabilities2 |= of_data->capabilities2;
 355                 mmc_data->dma_rx_offset = of_data->dma_rx_offset;
 356                 dma_priv->dma_buswidth = of_data->dma_buswidth;
 357                 host->bus_shift = of_data->bus_shift;
 358         }
 359
 360         host->dma               = dma_priv;
 361         host->write16_hook      = sh_mobile_sdhi_write16_hook;
 362         host->clk_enable        = sh_mobile_sdhi_clk_enable;
 363         host->clk_update        = sh_mobile_sdhi_clk_update;
 364         host->clk_disable       = sh_mobile_sdhi_clk_disable;
 365         host->multi_io_quirk    = sh_mobile_sdhi_multi_io_quirk;
 366         host->start_signal_voltage_switch = sh_mobile_sdhi_start_signal_voltage_switch;
 367
 368         /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
 369         if (!host->bus_shift && resource_size(res) > 0x100) /* old way to determine the shift */
 370                 host->bus_shift = 1;
 371
 372         if (mmd)
 373                 *mmc_data = *mmd;
 374
 375         dma_priv->filter = shdma_chan_filter;
 376         dma_priv->enable = sh_mobile_sdhi_enable_dma;
 377
 378         mmc_data->alignment_shift = 1; /* 2-byte alignment */
 379         mmc_data->capabilities |= MMC_CAP_MMC_HIGHSPEED;
 380
 381         /*
 382          * All SDHI blocks support 2-byte and larger block sizes in 4-bit
 383          * bus width mode.
 384          */
 385         mmc_data->flags |= TMIO_MMC_BLKSZ_2BYTES;
 386
 387         /*
 388          * All SDHI blocks support SDIO IRQ signalling.
 389          */
 390         mmc_data->flags |= TMIO_MMC_SDIO_IRQ;
 391
 392         /*
 393          * All SDHI have CMD12 controll bit
 394          */
 395         mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
 396
 397         /*
 398          * All SDHI need SDIO_INFO1 reserved bit
 399          */
 400         mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
 401
 402         ret = tmio_mmc_host_probe(host, mmc_data);
 403         if (ret < 0)
 404                 goto efree;
 405
 406         while (1) {
 407                 irq = platform_get_irq(pdev, i);
 408                 if (irq < 0)
 409                         break;
 410                 i++;
 411                 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0,
 412                                   dev_name(&pdev->dev), host);
 413                 if (ret)
 414                         goto eirq;
 415         }
 416
 417         /* There must be at least one IRQ source */
 418         if (!i) {
 419                 ret = irq;
 420                 goto eirq;
 421         }
 422
 423         dev_info(&pdev->dev, "%s base at 0x%08lx max clock rate %u MHz\n",
 424                  mmc_hostname(host->mmc), (unsigned long)
 425                  (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start),
 426                  host->mmc->f_max / 1000000);
 427
 428         return ret;
 429
 430 eirq:
 431         tmio_mmc_host_remove(host);
 432 efree:
 433         tmio_mmc_host_free(host);
 434 eprobe:
 435         return ret;
 436 }
 437
 438 static int sh_mobile_sdhi_remove(struct platform_device *pdev)
 439 {
 440         struct mmc_host *mmc = platform_get_drvdata(pdev);
 441         struct tmio_mmc_host *host = mmc_priv(mmc);
 442
 443         tmio_mmc_host_remove(host);
 444
 445         return 0;
 446 }
 447
 448 static const struct dev_pm_ops tmio_mmc_dev_pm_ops = {
 449         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
 450                         pm_runtime_force_resume)
 451         SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
 452                         tmio_mmc_host_runtime_resume,
 453                         NULL)
 454 };
 455
 456 static struct platform_driver sh_mobile_sdhi_driver = {
 457         .driver         = {
 458                 .name   = "sh_mobile_sdhi",
 459                 .pm     = &tmio_mmc_dev_pm_ops,
 460                 .of_match_table = sh_mobile_sdhi_of_match,
 461         },
 462         .probe          = sh_mobile_sdhi_probe,
 463         .remove         = sh_mobile_sdhi_remove,
 464 };
 465
 466 module_platform_driver(sh_mobile_sdhi_driver);
 467
 468 MODULE_DESCRIPTION("SuperH Mobile SDHI driver");
 469 MODULE_AUTHOR("Magnus Damm");
 470 MODULE_LICENSE("GPL v2");
 471 MODULE_ALIAS("platform:sh_mobile_sdhi");