1 /*****************************************************************************
2 * Copyright 2004 - 2009 Broadcom Corporation. All rights reserved.
4 * Unless you and Broadcom execute a separate written software license
5 * agreement governing use of this software, this software is licensed to you
6 * under the terms of the GNU General Public License version 2, available at
7 * http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
9 * Notwithstanding the above, under no circumstances may you combine this
10 * software in any way with any other Broadcom software provided under a
11 * license other than the GPL, without Broadcom's express prior written
13 *****************************************************************************/
15 /* ---- Include Files ---------------------------------------------------- */
16 #include <linux/module.h>
17 #include <linux/types.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/slab.h>
21 #include <linux/string.h>
22 #include <linux/ioport.h>
23 #include <linux/device.h>
24 #include <linux/delay.h>
25 #include <linux/err.h>
27 #include <linux/platform_device.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/nand.h>
30 #include <linux/mtd/nand_ecc.h>
31 #include <linux/mtd/partitions.h>
33 #include <asm/mach-types.h>
34 #include <asm/system.h>
36 #include <mach/reg_nand.h>
37 #include <mach/reg_umi.h>
39 #include "nand_bcm_umi.h"
41 #include <mach/memory_settings.h>
45 #include <linux/dma-mapping.h>
46 #include <linux/completion.h>
48 /* ---- External Variable Declarations ----------------------------------- */
49 /* ---- External Function Prototypes ------------------------------------- */
50 /* ---- Public Variables ------------------------------------------------- */
51 /* ---- Private Constants and Types -------------------------------------- */
52 static const __devinitconst char gBanner[] = KERN_INFO \
53 "BCM UMI MTD NAND Driver: 1.00\n";
55 const char *part_probes[] = { "cmdlinepart", NULL };
58 static uint8_t scan_ff_pattern[] = { 0xff };
60 static struct nand_bbt_descr largepage_bbt = {
64 .pattern = scan_ff_pattern
69 ** Preallocate a buffer to avoid having to do this every dma operation.
70 ** This is the size of the preallocated coherent DMA buffer.
73 #define DMA_MIN_BUFLEN 512
74 #define DMA_MAX_BUFLEN PAGE_SIZE
75 #define USE_DIRECT_IO(len) (((len) < DMA_MIN_BUFLEN) || \
76 ((len) > DMA_MAX_BUFLEN))
79 * The current NAND data space goes from 0x80001900 to 0x80001FFF,
80 * which is only 0x700 = 1792 bytes long. This is too small for 2K, 4K page
81 * size NAND flash. Need to break the DMA down to multiple 1Ks.
83 * Need to make sure REG_NAND_DATA_PADDR + DMA_MAX_LEN < 0x80002000
85 #define DMA_MAX_LEN 1024
88 #define DMA_MIN_BUFLEN 0
89 #define DMA_MAX_BUFLEN 0
90 #define USE_DIRECT_IO(len) 1
92 /* ---- Private Function Prototypes -------------------------------------- */
93 static void bcm_umi_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len);
94 static void bcm_umi_nand_write_buf(struct mtd_info *mtd, const u_char * buf,
97 /* ---- Private Variables ------------------------------------------------ */
98 static struct mtd_info *board_mtd;
99 static void __iomem *bcm_umi_io_base;
100 static void *virtPtr;
101 static dma_addr_t physPtr;
102 static struct completion nand_comp;
104 /* ---- Private Functions ------------------------------------------------ */
106 #include "bcm_umi_bch.c"
108 #include "bcm_umi_hamming.c"
113 /* Handler called when the DMA finishes. */
114 static void nand_dma_handler(DMA_Device_t dev, int reason, void *userData)
116 complete(&nand_comp);
119 static int nand_dma_init(void)
123 rc = dma_set_device_handler(DMA_DEVICE_NAND_MEM_TO_MEM,
124 nand_dma_handler, NULL);
126 printk(KERN_ERR "dma_set_device_handler failed: %d\n", rc);
131 dma_alloc_coherent(NULL, DMA_MAX_BUFLEN, &physPtr, GFP_KERNEL);
132 if (virtPtr == NULL) {
133 printk(KERN_ERR "NAND - Failed to allocate memory for DMA buffer\n");
140 static void nand_dma_term(void)
143 dma_free_coherent(NULL, DMA_MAX_BUFLEN, virtPtr, physPtr);
146 static void nand_dma_read(void *buf, int len)
154 panic("nand_dma_read: virtPtr == NULL\n");
156 if ((void *)physPtr == NULL)
157 panic("nand_dma_read: physPtr == NULL\n");
159 hndl = dma_request_channel(DMA_DEVICE_NAND_MEM_TO_MEM);
162 "nand_dma_read: unable to allocate dma channel: %d\n",
167 while (len_left > 0) {
168 if (len_left > DMA_MAX_LEN) {
169 tmp_len = DMA_MAX_LEN;
170 len_left -= DMA_MAX_LEN;
176 init_completion(&nand_comp);
177 dma_transfer_mem_to_mem(hndl, REG_NAND_DATA_PADDR,
178 physPtr + offset, tmp_len);
179 wait_for_completion(&nand_comp);
184 dma_free_channel(hndl);
187 memcpy(buf, virtPtr, len);
190 static void nand_dma_write(const void *buf, int len)
198 panic("nand_dma_write: buf == NULL\n");
201 panic("nand_dma_write: virtPtr == NULL\n");
203 if ((void *)physPtr == NULL)
204 panic("nand_dma_write: physPtr == NULL\n");
206 memcpy(virtPtr, buf, len);
209 hndl = dma_request_channel(DMA_DEVICE_NAND_MEM_TO_MEM);
212 "nand_dma_write: unable to allocate dma channel: %d\n",
217 while (len_left > 0) {
218 if (len_left > DMA_MAX_LEN) {
219 tmp_len = DMA_MAX_LEN;
220 len_left -= DMA_MAX_LEN;
226 init_completion(&nand_comp);
227 dma_transfer_mem_to_mem(hndl, physPtr + offset,
228 REG_NAND_DATA_PADDR, tmp_len);
229 wait_for_completion(&nand_comp);
234 dma_free_channel(hndl);
239 static int nand_dev_ready(struct mtd_info *mtd)
241 return nand_bcm_umi_dev_ready();
244 /****************************************************************************
246 * bcm_umi_nand_inithw
248 * This routine does the necessary hardware (board-specific)
249 * initializations. This includes setting up the timings, etc.
251 ***************************************************************************/
252 int bcm_umi_nand_inithw(void)
254 /* Configure nand timing parameters */
255 REG_UMI_NAND_TCR &= ~0x7ffff;
256 REG_UMI_NAND_TCR |= HW_CFG_NAND_TCR;
258 #if !defined(CONFIG_MTD_NAND_BCM_UMI_HWCS)
259 /* enable software control of CS */
260 REG_UMI_NAND_TCR |= REG_UMI_NAND_TCR_CS_SWCTRL;
263 /* keep NAND chip select asserted */
264 REG_UMI_NAND_RCSR |= REG_UMI_NAND_RCSR_CS_ASSERTED;
266 REG_UMI_NAND_TCR &= ~REG_UMI_NAND_TCR_WORD16;
267 /* enable writes to flash */
268 REG_UMI_MMD_ICR |= REG_UMI_MMD_ICR_FLASH_WP;
270 writel(NAND_CMD_RESET, bcm_umi_io_base + REG_NAND_CMD_OFFSET);
271 nand_bcm_umi_wait_till_ready();
274 nand_bcm_umi_bch_config_ecc(NAND_ECC_NUM_BYTES);
280 /* Used to turn latch the proper register for access. */
281 static void bcm_umi_nand_hwcontrol(struct mtd_info *mtd, int cmd,
284 /* send command to hardware */
285 struct nand_chip *chip = mtd->priv;
286 if (ctrl & NAND_CTRL_CHANGE) {
287 if (ctrl & NAND_CLE) {
288 chip->IO_ADDR_W = bcm_umi_io_base + REG_NAND_CMD_OFFSET;
291 if (ctrl & NAND_ALE) {
293 bcm_umi_io_base + REG_NAND_ADDR_OFFSET;
296 chip->IO_ADDR_W = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
300 /* Send command to chip directly */
301 if (cmd != NAND_CMD_NONE)
302 writeb(cmd, chip->IO_ADDR_W);
305 static void bcm_umi_nand_write_buf(struct mtd_info *mtd, const u_char * buf,
308 if (USE_DIRECT_IO(len)) {
309 /* Do it the old way if the buffer is small or too large.
310 * Probably quicker than starting and checking dma. */
312 struct nand_chip *this = mtd->priv;
314 for (i = 0; i < len; i++)
315 writeb(buf[i], this->IO_ADDR_W);
319 nand_dma_write(buf, len);
323 static void bcm_umi_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len)
325 if (USE_DIRECT_IO(len)) {
327 struct nand_chip *this = mtd->priv;
329 for (i = 0; i < len; i++)
330 buf[i] = readb(this->IO_ADDR_R);
334 nand_dma_read(buf, len);
338 static uint8_t readbackbuf[NAND_MAX_PAGESIZE];
339 static int bcm_umi_nand_verify_buf(struct mtd_info *mtd, const u_char * buf,
343 * Try to readback page with ECC correction. This is necessary
344 * for MLC parts which may have permanently stuck bits.
346 struct nand_chip *chip = mtd->priv;
347 int ret = chip->ecc.read_page(mtd, chip, readbackbuf, 0);
351 if (memcmp(readbackbuf, buf, len) == 0)
359 static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
361 struct nand_chip *this;
367 /* Allocate memory for MTD device structure and private data */
369 kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip),
373 "Unable to allocate NAND MTD device structure.\n");
377 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
382 /* map physical address */
383 bcm_umi_io_base = ioremap(r->start, r->end - r->start + 1);
385 if (!bcm_umi_io_base) {
386 printk(KERN_ERR "ioremap to access BCM UMI NAND chip failed\n");
391 /* Get pointer to private data */
392 this = (struct nand_chip *)(&board_mtd[1]);
394 /* Initialize structures */
395 memset((char *)board_mtd, 0, sizeof(struct mtd_info));
396 memset((char *)this, 0, sizeof(struct nand_chip));
398 /* Link the private data with the MTD structure */
399 board_mtd->priv = this;
401 /* Initialize the NAND hardware. */
402 if (bcm_umi_nand_inithw() < 0) {
403 printk(KERN_ERR "BCM UMI NAND chip could not be initialized\n");
404 iounmap(bcm_umi_io_base);
409 /* Set address of NAND IO lines */
410 this->IO_ADDR_W = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
411 this->IO_ADDR_R = bcm_umi_io_base + REG_NAND_DATA8_OFFSET;
413 /* Set command delay time, see datasheet for correct value */
414 this->chip_delay = 0;
415 /* Assign the device ready function, if available */
416 this->dev_ready = nand_dev_ready;
419 this->write_buf = bcm_umi_nand_write_buf;
420 this->read_buf = bcm_umi_nand_read_buf;
421 this->verify_buf = bcm_umi_nand_verify_buf;
423 this->cmd_ctrl = bcm_umi_nand_hwcontrol;
424 this->ecc.mode = NAND_ECC_HW;
425 this->ecc.size = 512;
426 this->ecc.bytes = NAND_ECC_NUM_BYTES;
428 this->ecc.read_page = bcm_umi_bch_read_page_hwecc;
429 this->ecc.write_page = bcm_umi_bch_write_page_hwecc;
431 this->ecc.correct = nand_correct_data512;
432 this->ecc.calculate = bcm_umi_hamming_get_hw_ecc;
433 this->ecc.hwctl = bcm_umi_hamming_enable_hwecc;
437 err = nand_dma_init();
442 /* Figure out the size of the device that we have.
443 * We need to do this to figure out which ECC
444 * layout we'll be using.
447 err = nand_scan_ident(board_mtd, 1, NULL);
449 printk(KERN_ERR "nand_scan failed: %d\n", err);
450 iounmap(bcm_umi_io_base);
455 /* Now that we know the nand size, we can setup the ECC layout */
457 switch (board_mtd->writesize) { /* writesize is the pagesize */
459 this->ecc.layout = &nand_hw_eccoob_4096;
462 this->ecc.layout = &nand_hw_eccoob_2048;
465 this->ecc.layout = &nand_hw_eccoob_512;
469 printk(KERN_ERR "NAND - Unrecognized pagesize: %d\n",
470 board_mtd->writesize);
476 if (board_mtd->writesize > 512) {
477 if (this->options & NAND_USE_FLASH_BBT)
478 largepage_bbt.options = NAND_BBT_SCAN2NDPAGE;
479 this->badblock_pattern = &largepage_bbt;
483 /* Now finish off the scan, now that ecc.layout has been initialized. */
485 err = nand_scan_tail(board_mtd);
487 printk(KERN_ERR "nand_scan failed: %d\n", err);
488 iounmap(bcm_umi_io_base);
493 /* Register the partitions */
496 struct mtd_partition *partition_info;
498 board_mtd->name = "bcm_umi-nand";
500 parse_mtd_partitions(board_mtd, part_probes,
503 if (nr_partitions <= 0) {
504 printk(KERN_ERR "BCM UMI NAND: Too few partitions - %d\n",
506 iounmap(bcm_umi_io_base);
510 mtd_device_register(board_mtd, partition_info, nr_partitions);
517 static int bcm_umi_nand_remove(struct platform_device *pdev)
523 /* Release resources, unregister device */
524 nand_release(board_mtd);
526 /* unmap physical address */
527 iounmap(bcm_umi_io_base);
529 /* Free the MTD device structure */
536 static int bcm_umi_nand_suspend(struct platform_device *pdev,
539 printk(KERN_ERR "MTD NAND suspend is being called\n");
543 static int bcm_umi_nand_resume(struct platform_device *pdev)
545 printk(KERN_ERR "MTD NAND resume is being called\n");
549 #define bcm_umi_nand_suspend NULL
550 #define bcm_umi_nand_resume NULL
553 static struct platform_driver nand_driver = {
556 .owner = THIS_MODULE,
558 .probe = bcm_umi_nand_probe,
559 .remove = bcm_umi_nand_remove,
560 .suspend = bcm_umi_nand_suspend,
561 .resume = bcm_umi_nand_resume,
564 static int __init nand_init(void)
566 return platform_driver_register(&nand_driver);
569 static void __exit nand_exit(void)
571 platform_driver_unregister(&nand_driver);
574 module_init(nand_init);
575 module_exit(nand_exit);
577 MODULE_LICENSE("GPL");
578 MODULE_AUTHOR("Broadcom");
579 MODULE_DESCRIPTION("BCM UMI MTD NAND driver");