drivers/net/dsa/mv88e6131.c

   1 /*
   2  * net/dsa/mv88e6131.c - Marvell 88e6095/6095f/6131 switch chip support
   3  * Copyright (c) 2008-2009 Marvell Semiconductor
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  */
  10
  11 #include <linux/delay.h>
  12 #include <linux/jiffies.h>
  13 #include <linux/list.h>
  14 #include <linux/module.h>
  15 #include <linux/netdevice.h>
  16 #include <linux/phy.h>
  17 #include <net/dsa.h>
  18 #include "mv88e6xxx.h"
  19
  20 static const struct mv88e6xxx_info mv88e6131_table[] = {
  21         {
  22                 .prod_num = PORT_SWITCH_ID_PROD_NUM_6095,
  23                 .name = "Marvell 88E6095/88E6095F",
  24         }, {
  25                 .prod_num = PORT_SWITCH_ID_PROD_NUM_6085,
  26                 .name = "Marvell 88E6085",
  27         }, {
  28                 .prod_num = PORT_SWITCH_ID_PROD_NUM_6131,
  29                 .name = "Marvell 88E6131",
  30         }, {
  31                 .prod_num = PORT_SWITCH_ID_PROD_NUM_6185,
  32                 .name = "Marvell 88E6185",
  33         }
  34 };
  35
  36 static const char *mv88e6131_drv_probe(struct device *dsa_dev,
  37                                        struct device *host_dev, int sw_addr,
  38                                        void **priv)
  39 {
  40         return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv,
  41                                    mv88e6131_table,
  42                                    ARRAY_SIZE(mv88e6131_table));
  43 }
  44
  45 static int mv88e6131_setup_global(struct dsa_switch *ds)
  46 {
  47         u32 upstream_port = dsa_upstream_port(ds);
  48         int ret;
  49         u32 reg;
  50
  51         ret = mv88e6xxx_setup_global(ds);
  52         if (ret)
  53                 return ret;
  54
  55         /* Enable the PHY polling unit, don't discard packets with
  56          * excessive collisions, use a weighted fair queueing scheme
  57          * to arbitrate between packet queues, set the maximum frame
  58          * size to 1632, and mask all interrupt sources.
  59          */
  60         ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL,
  61                                   GLOBAL_CONTROL_PPU_ENABLE |
  62                                   GLOBAL_CONTROL_MAX_FRAME_1632);
  63         if (ret)
  64                 return ret;
  65
  66         /* Set the VLAN ethertype to 0x8100. */
  67         ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CORE_TAG_TYPE, 0x8100);
  68         if (ret)
  69                 return ret;
  70
  71         /* Disable ARP mirroring, and configure the upstream port as
  72          * the port to which ingress and egress monitor frames are to
  73          * be sent.
  74          */
  75         reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
  76                 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
  77                 GLOBAL_MONITOR_CONTROL_ARP_DISABLED;
  78         ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
  79         if (ret)
  80                 return ret;
  81
  82         /* Disable cascade port functionality unless this device
  83          * is used in a cascade configuration, and set the switch's
  84          * DSA device number.
  85          */
  86         if (ds->dst->pd->nr_chips > 1)
  87                 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL_2,
  88                                           GLOBAL_CONTROL_2_MULTIPLE_CASCADE |
  89                                           (ds->index & 0x1f));
  90         else
  91                 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL_2,
  92                                           GLOBAL_CONTROL_2_NO_CASCADE |
  93                                           (ds->index & 0x1f));
  94         if (ret)
  95                 return ret;
  96
  97         /* Force the priority of IGMP/MLD snoop frames and ARP frames
  98          * to the highest setting.
  99          */
 100         return mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_PRIO_OVERRIDE,
 101                                    GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP |
 102                                    7 << GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT |
 103                                    GLOBAL2_PRIO_OVERRIDE_FORCE_ARP |
 104                                    7 << GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT);
 105 }
 106
 107 static int mv88e6131_setup(struct dsa_switch *ds)
 108 {
 109         struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
 110         int ret;
 111
 112         ret = mv88e6xxx_setup_common(ds);
 113         if (ret < 0)
 114                 return ret;
 115
 116         mv88e6xxx_ppu_state_init(ds);
 117
 118         switch (ps->id) {
 119         case PORT_SWITCH_ID_6085:
 120         case PORT_SWITCH_ID_6185:
 121                 ps->num_ports = 10;
 122                 break;
 123         case PORT_SWITCH_ID_6095:
 124                 ps->num_ports = 11;
 125                 break;
 126         case PORT_SWITCH_ID_6131:
 127                 ps->num_ports = 8;
 128                 break;
 129         default:
 130                 return -ENODEV;
 131         }
 132
 133         ret = mv88e6xxx_switch_reset(ds, false);
 134         if (ret < 0)
 135                 return ret;
 136
 137         ret = mv88e6131_setup_global(ds);
 138         if (ret < 0)
 139                 return ret;
 140
 141         return mv88e6xxx_setup_ports(ds);
 142 }
 143
 144 static int mv88e6131_port_to_phy_addr(struct dsa_switch *ds, int port)
 145 {
 146         struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
 147
 148         if (port >= 0 && port < ps->num_ports)
 149                 return port;
 150
 151         return -EINVAL;
 152 }
 153
 154 static int
 155 mv88e6131_phy_read(struct dsa_switch *ds, int port, int regnum)
 156 {
 157         int addr = mv88e6131_port_to_phy_addr(ds, port);
 158
 159         if (addr < 0)
 160                 return addr;
 161
 162         return mv88e6xxx_phy_read_ppu(ds, addr, regnum);
 163 }
 164
 165 static int
 166 mv88e6131_phy_write(struct dsa_switch *ds,
 167                               int port, int regnum, u16 val)
 168 {
 169         int addr = mv88e6131_port_to_phy_addr(ds, port);
 170
 171         if (addr < 0)
 172                 return addr;
 173
 174         return mv88e6xxx_phy_write_ppu(ds, addr, regnum, val);
 175 }
 176
 177 struct dsa_switch_driver mv88e6131_switch_driver = {
 178         .tag_protocol           = DSA_TAG_PROTO_DSA,
 179         .probe                  = mv88e6131_drv_probe,
 180         .setup                  = mv88e6131_setup,
 181         .set_addr               = mv88e6xxx_set_addr_direct,
 182         .phy_read               = mv88e6131_phy_read,
 183         .phy_write              = mv88e6131_phy_write,
 184         .get_strings            = mv88e6xxx_get_strings,
 185         .get_ethtool_stats      = mv88e6xxx_get_ethtool_stats,
 186         .get_sset_count         = mv88e6xxx_get_sset_count,
 187         .adjust_link            = mv88e6xxx_adjust_link,
 188         .port_bridge_join       = mv88e6xxx_port_bridge_join,
 189         .port_bridge_leave      = mv88e6xxx_port_bridge_leave,
 190         .port_vlan_filtering    = mv88e6xxx_port_vlan_filtering,
 191         .port_vlan_prepare      = mv88e6xxx_port_vlan_prepare,
 192         .port_vlan_add          = mv88e6xxx_port_vlan_add,
 193         .port_vlan_del          = mv88e6xxx_port_vlan_del,
 194         .port_vlan_dump         = mv88e6xxx_port_vlan_dump,
 195         .port_fdb_prepare       = mv88e6xxx_port_fdb_prepare,
 196         .port_fdb_add           = mv88e6xxx_port_fdb_add,
 197         .port_fdb_del           = mv88e6xxx_port_fdb_del,
 198         .port_fdb_dump          = mv88e6xxx_port_fdb_dump,
 199 };
 200
 201 MODULE_ALIAS("platform:mv88e6085");
 202 MODULE_ALIAS("platform:mv88e6095");
 203 MODULE_ALIAS("platform:mv88e6095f");
 204 MODULE_ALIAS("platform:mv88e6131");