1 /* net/dsa/mv88e6171.c - Marvell 88e6171 switch chip support
2 * Copyright (c) 2008-2009 Marvell Semiconductor
3 * Copyright (c) 2014 Claudio Leite <leitec@staticky.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
11 #include <linux/delay.h>
12 #include <linux/jiffies.h>
13 #include <linux/list.h>
14 #include <linux/module.h>
15 #include <linux/netdevice.h>
16 #include <linux/phy.h>
18 #include "mv88e6xxx.h"
20 static const struct mv88e6xxx_switch_id mv88e6171_table[] = {
21 { PORT_SWITCH_ID_6171, "Marvell 88E6171" },
22 { PORT_SWITCH_ID_6175, "Marvell 88E6175" },
23 { PORT_SWITCH_ID_6350, "Marvell 88E6350" },
24 { PORT_SWITCH_ID_6351, "Marvell 88E6351" },
27 static char *mv88e6171_probe(struct device *dsa_dev, struct device *host_dev,
28 int sw_addr, void **priv)
30 struct mv88e6xxx_priv_state *ps;
33 name = mv88e6xxx_lookup_name(host_dev, sw_addr, mv88e6171_table,
34 ARRAY_SIZE(mv88e6171_table));
36 ps = devm_kzalloc(dsa_dev, sizeof(*ps), GFP_KERNEL);
44 static int mv88e6171_setup_global(struct dsa_switch *ds)
46 u32 upstream_port = dsa_upstream_port(ds);
50 ret = mv88e6xxx_setup_global(ds);
54 /* Discard packets with excessive collisions, mask all
55 * interrupt sources, enable PPU.
57 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
58 GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);
60 /* Configure the upstream port, and configure the upstream
61 * port as the port to which ingress and egress monitor frames
64 reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
65 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
66 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT |
67 upstream_port << GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT;
68 REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
70 /* Disable remote management for now, and set the switch's
73 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds->index & 0x1f);
78 static int mv88e6171_setup(struct dsa_switch *ds)
80 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
85 ret = mv88e6xxx_setup_common(ds);
91 ret = mv88e6xxx_switch_reset(ds, true);
95 ret = mv88e6171_setup_global(ds);
99 return mv88e6xxx_setup_ports(ds);
102 struct dsa_switch_driver mv88e6171_switch_driver = {
103 .tag_protocol = DSA_TAG_PROTO_EDSA,
104 .probe = mv88e6171_probe,
105 .setup = mv88e6171_setup,
106 .set_addr = mv88e6xxx_set_addr_indirect,
107 .phy_read = mv88e6xxx_phy_read_indirect,
108 .phy_write = mv88e6xxx_phy_write_indirect,
109 .get_strings = mv88e6xxx_get_strings,
110 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
111 .get_sset_count = mv88e6xxx_get_sset_count,
112 .adjust_link = mv88e6xxx_adjust_link,
113 #ifdef CONFIG_NET_DSA_HWMON
114 .get_temp = mv88e6xxx_get_temp,
116 .get_regs_len = mv88e6xxx_get_regs_len,
117 .get_regs = mv88e6xxx_get_regs,
118 .port_bridge_join = mv88e6xxx_port_bridge_join,
119 .port_bridge_leave = mv88e6xxx_port_bridge_leave,
120 .port_stp_state_set = mv88e6xxx_port_stp_state_set,
121 .port_vlan_filtering = mv88e6xxx_port_vlan_filtering,
122 .port_vlan_prepare = mv88e6xxx_port_vlan_prepare,
123 .port_vlan_add = mv88e6xxx_port_vlan_add,
124 .port_vlan_del = mv88e6xxx_port_vlan_del,
125 .port_vlan_dump = mv88e6xxx_port_vlan_dump,
126 .port_fdb_prepare = mv88e6xxx_port_fdb_prepare,
127 .port_fdb_add = mv88e6xxx_port_fdb_add,
128 .port_fdb_del = mv88e6xxx_port_fdb_del,
129 .port_fdb_dump = mv88e6xxx_port_fdb_dump,
132 MODULE_ALIAS("platform:mv88e6171");
133 MODULE_ALIAS("platform:mv88e6175");
134 MODULE_ALIAS("platform:mv88e6350");
135 MODULE_ALIAS("platform:mv88e6351");