2 * Broadcom BCM7xxx System Port Ethernet MAC driver
4 * Copyright (C) 2014 Broadcom Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
21 #include <linux/of_net.h>
22 #include <linux/of_mdio.h>
23 #include <linux/phy.h>
24 #include <linux/phy_fixed.h>
28 #include "bcmsysport.h"
30 /* I/O accessors register helpers */
31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
34 u32 reg = __raw_readl(priv->base + offset + off); \
37 static inline void name##_writel(struct bcm_sysport_priv *priv, \
40 __raw_writel(val, priv->base + offset + off); \
43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
55 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
57 #define BCM_SYSPORT_INTR_L2(which) \
58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
61 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
62 priv->irq##which##_mask &= ~(mask); \
64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
67 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
68 priv->irq##which##_mask |= (mask); \
71 BCM_SYSPORT_INTR_L2(0)
72 BCM_SYSPORT_INTR_L2(1)
74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
75 * nanoseconds), so keep the check for 64-bits explicit here to save
76 * one register write per-packet on 32-bits platforms.
78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
83 __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
84 d + DESC_ADDR_HI_STATUS_LEN);
86 __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
90 struct dma_desc *desc,
93 /* Ports are latched, so write upper address first */
94 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
95 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
98 /* Ethtool operations */
99 static int bcm_sysport_set_settings(struct net_device *dev,
100 struct ethtool_cmd *cmd)
102 struct bcm_sysport_priv *priv = netdev_priv(dev);
104 if (!netif_running(dev))
107 return phy_ethtool_sset(priv->phydev, cmd);
110 static int bcm_sysport_get_settings(struct net_device *dev,
111 struct ethtool_cmd *cmd)
113 struct bcm_sysport_priv *priv = netdev_priv(dev);
115 if (!netif_running(dev))
118 return phy_ethtool_gset(priv->phydev, cmd);
121 static int bcm_sysport_set_rx_csum(struct net_device *dev,
122 netdev_features_t wanted)
124 struct bcm_sysport_priv *priv = netdev_priv(dev);
127 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
128 reg = rxchk_readl(priv, RXCHK_CONTROL);
134 /* If UniMAC forwards CRC, we need to skip over it to get
135 * a valid CHK bit to be set in the per-packet status word
137 if (priv->rx_chk_en && priv->crc_fwd)
138 reg |= RXCHK_SKIP_FCS;
140 reg &= ~RXCHK_SKIP_FCS;
142 /* If Broadcom tags are enabled (e.g: using a switch), make
143 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
144 * tag after the Ethernet MAC Source Address.
146 if (netdev_uses_dsa(dev))
147 reg |= RXCHK_BRCM_TAG_EN;
149 reg &= ~RXCHK_BRCM_TAG_EN;
151 rxchk_writel(priv, reg, RXCHK_CONTROL);
156 static int bcm_sysport_set_tx_csum(struct net_device *dev,
157 netdev_features_t wanted)
159 struct bcm_sysport_priv *priv = netdev_priv(dev);
162 /* Hardware transmit checksum requires us to enable the Transmit status
163 * block prepended to the packet contents
165 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
166 reg = tdma_readl(priv, TDMA_CONTROL);
171 tdma_writel(priv, reg, TDMA_CONTROL);
176 static int bcm_sysport_set_features(struct net_device *dev,
177 netdev_features_t features)
179 netdev_features_t changed = features ^ dev->features;
180 netdev_features_t wanted = dev->wanted_features;
183 if (changed & NETIF_F_RXCSUM)
184 ret = bcm_sysport_set_rx_csum(dev, wanted);
185 if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
186 ret = bcm_sysport_set_tx_csum(dev, wanted);
191 /* Hardware counters must be kept in sync because the order/offset
192 * is important here (order in structure declaration = order in hardware)
194 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
196 STAT_NETDEV(rx_packets),
197 STAT_NETDEV(tx_packets),
198 STAT_NETDEV(rx_bytes),
199 STAT_NETDEV(tx_bytes),
200 STAT_NETDEV(rx_errors),
201 STAT_NETDEV(tx_errors),
202 STAT_NETDEV(rx_dropped),
203 STAT_NETDEV(tx_dropped),
204 STAT_NETDEV(multicast),
205 /* UniMAC RSV counters */
206 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
207 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
208 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
209 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
210 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
211 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
212 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
213 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
214 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
215 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
216 STAT_MIB_RX("rx_pkts", mib.rx.pkt),
217 STAT_MIB_RX("rx_bytes", mib.rx.bytes),
218 STAT_MIB_RX("rx_multicast", mib.rx.mca),
219 STAT_MIB_RX("rx_broadcast", mib.rx.bca),
220 STAT_MIB_RX("rx_fcs", mib.rx.fcs),
221 STAT_MIB_RX("rx_control", mib.rx.cf),
222 STAT_MIB_RX("rx_pause", mib.rx.pf),
223 STAT_MIB_RX("rx_unknown", mib.rx.uo),
224 STAT_MIB_RX("rx_align", mib.rx.aln),
225 STAT_MIB_RX("rx_outrange", mib.rx.flr),
226 STAT_MIB_RX("rx_code", mib.rx.cde),
227 STAT_MIB_RX("rx_carrier", mib.rx.fcr),
228 STAT_MIB_RX("rx_oversize", mib.rx.ovr),
229 STAT_MIB_RX("rx_jabber", mib.rx.jbr),
230 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
231 STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
232 STAT_MIB_RX("rx_unicast", mib.rx.uc),
233 STAT_MIB_RX("rx_ppp", mib.rx.ppp),
234 STAT_MIB_RX("rx_crc", mib.rx.rcrc),
235 /* UniMAC TSV counters */
236 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
237 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
238 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
239 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
240 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
241 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
242 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
243 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
244 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
245 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
246 STAT_MIB_TX("tx_pkts", mib.tx.pkts),
247 STAT_MIB_TX("tx_multicast", mib.tx.mca),
248 STAT_MIB_TX("tx_broadcast", mib.tx.bca),
249 STAT_MIB_TX("tx_pause", mib.tx.pf),
250 STAT_MIB_TX("tx_control", mib.tx.cf),
251 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
252 STAT_MIB_TX("tx_oversize", mib.tx.ovr),
253 STAT_MIB_TX("tx_defer", mib.tx.drf),
254 STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
255 STAT_MIB_TX("tx_single_col", mib.tx.scl),
256 STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
257 STAT_MIB_TX("tx_late_col", mib.tx.lcl),
258 STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
259 STAT_MIB_TX("tx_frags", mib.tx.frg),
260 STAT_MIB_TX("tx_total_col", mib.tx.ncl),
261 STAT_MIB_TX("tx_jabber", mib.tx.jbr),
262 STAT_MIB_TX("tx_bytes", mib.tx.bytes),
263 STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
264 STAT_MIB_TX("tx_unicast", mib.tx.uc),
265 /* UniMAC RUNT counters */
266 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
267 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
268 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
269 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
270 /* RXCHK misc statistics */
271 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
272 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
273 RXCHK_OTHER_DISC_CNTR),
274 /* RBUF misc statistics */
275 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
276 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
279 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
281 static void bcm_sysport_get_drvinfo(struct net_device *dev,
282 struct ethtool_drvinfo *info)
284 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
285 strlcpy(info->version, "0.1", sizeof(info->version));
286 strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
287 info->n_stats = BCM_SYSPORT_STATS_LEN;
290 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
292 struct bcm_sysport_priv *priv = netdev_priv(dev);
294 return priv->msg_enable;
297 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
299 struct bcm_sysport_priv *priv = netdev_priv(dev);
301 priv->msg_enable = enable;
304 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
306 switch (string_set) {
308 return BCM_SYSPORT_STATS_LEN;
314 static void bcm_sysport_get_strings(struct net_device *dev,
315 u32 stringset, u8 *data)
321 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
322 memcpy(data + i * ETH_GSTRING_LEN,
323 bcm_sysport_gstrings_stats[i].stat_string,
332 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
336 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
337 const struct bcm_sysport_stats *s;
342 s = &bcm_sysport_gstrings_stats[i];
344 case BCM_SYSPORT_STAT_NETDEV:
346 case BCM_SYSPORT_STAT_MIB_RX:
347 case BCM_SYSPORT_STAT_MIB_TX:
348 case BCM_SYSPORT_STAT_RUNT:
349 if (s->type != BCM_SYSPORT_STAT_MIB_RX)
350 offset = UMAC_MIB_STAT_OFFSET;
351 val = umac_readl(priv, UMAC_MIB_START + j + offset);
353 case BCM_SYSPORT_STAT_RXCHK:
354 val = rxchk_readl(priv, s->reg_offset);
356 rxchk_writel(priv, 0, s->reg_offset);
358 case BCM_SYSPORT_STAT_RBUF:
359 val = rbuf_readl(priv, s->reg_offset);
361 rbuf_writel(priv, 0, s->reg_offset);
366 p = (char *)priv + s->stat_offset;
370 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
373 static void bcm_sysport_get_stats(struct net_device *dev,
374 struct ethtool_stats *stats, u64 *data)
376 struct bcm_sysport_priv *priv = netdev_priv(dev);
379 if (netif_running(dev))
380 bcm_sysport_update_mib_counters(priv);
382 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
383 const struct bcm_sysport_stats *s;
386 s = &bcm_sysport_gstrings_stats[i];
387 if (s->type == BCM_SYSPORT_STAT_NETDEV)
388 p = (char *)&dev->stats;
396 static void bcm_sysport_get_wol(struct net_device *dev,
397 struct ethtool_wolinfo *wol)
399 struct bcm_sysport_priv *priv = netdev_priv(dev);
402 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
403 wol->wolopts = priv->wolopts;
405 if (!(priv->wolopts & WAKE_MAGICSECURE))
408 /* Return the programmed SecureOn password */
409 reg = umac_readl(priv, UMAC_PSW_MS);
410 put_unaligned_be16(reg, &wol->sopass[0]);
411 reg = umac_readl(priv, UMAC_PSW_LS);
412 put_unaligned_be32(reg, &wol->sopass[2]);
415 static int bcm_sysport_set_wol(struct net_device *dev,
416 struct ethtool_wolinfo *wol)
418 struct bcm_sysport_priv *priv = netdev_priv(dev);
419 struct device *kdev = &priv->pdev->dev;
420 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
422 if (!device_can_wakeup(kdev))
425 if (wol->wolopts & ~supported)
428 /* Program the SecureOn password */
429 if (wol->wolopts & WAKE_MAGICSECURE) {
430 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
432 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
436 /* Flag the device and relevant IRQ as wakeup capable */
438 device_set_wakeup_enable(kdev, 1);
439 enable_irq_wake(priv->wol_irq);
440 priv->wol_irq_disabled = 0;
442 device_set_wakeup_enable(kdev, 0);
443 /* Avoid unbalanced disable_irq_wake calls */
444 if (!priv->wol_irq_disabled)
445 disable_irq_wake(priv->wol_irq);
446 priv->wol_irq_disabled = 1;
449 priv->wolopts = wol->wolopts;
454 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
456 dev_kfree_skb_any(cb->skb);
458 dma_unmap_addr_set(cb, dma_addr, 0);
461 static int bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
462 struct bcm_sysport_cb *cb)
464 struct device *kdev = &priv->pdev->dev;
465 struct net_device *ndev = priv->netdev;
469 cb->skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
471 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
475 mapping = dma_map_single(kdev, cb->skb->data,
476 RX_BUF_LENGTH, DMA_FROM_DEVICE);
477 ret = dma_mapping_error(kdev, mapping);
479 bcm_sysport_free_cb(cb);
480 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
484 dma_unmap_addr_set(cb, dma_addr, mapping);
485 dma_desc_set_addr(priv, priv->rx_bd_assign_ptr, mapping);
487 priv->rx_bd_assign_index++;
488 priv->rx_bd_assign_index &= (priv->num_rx_bds - 1);
489 priv->rx_bd_assign_ptr = priv->rx_bds +
490 (priv->rx_bd_assign_index * DESC_SIZE);
492 netif_dbg(priv, rx_status, ndev, "RX refill\n");
497 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
499 struct bcm_sysport_cb *cb;
503 for (i = 0; i < priv->num_rx_bds; i++) {
504 cb = &priv->rx_cbs[priv->rx_bd_assign_index];
508 ret = bcm_sysport_rx_refill(priv, cb);
516 /* Poll the hardware for up to budget packets to process */
517 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
520 struct device *kdev = &priv->pdev->dev;
521 struct net_device *ndev = priv->netdev;
522 unsigned int processed = 0, to_process;
523 struct bcm_sysport_cb *cb;
525 unsigned int p_index;
529 /* Determine how much we should process since last call */
530 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
531 p_index &= RDMA_PROD_INDEX_MASK;
533 if (p_index < priv->rx_c_index)
534 to_process = (RDMA_CONS_INDEX_MASK + 1) -
535 priv->rx_c_index + p_index;
537 to_process = p_index - priv->rx_c_index;
539 netif_dbg(priv, rx_status, ndev,
540 "p_index=%d rx_c_index=%d to_process=%d\n",
541 p_index, priv->rx_c_index, to_process);
543 while ((processed < to_process) && (processed < budget)) {
544 cb = &priv->rx_cbs[priv->rx_read_ptr];
550 if (priv->rx_read_ptr == priv->num_rx_bds)
551 priv->rx_read_ptr = 0;
553 /* We do not have a backing SKB, so we do not a corresponding
554 * DMA mapping for this incoming packet since
555 * bcm_sysport_rx_refill always either has both skb and mapping
558 if (unlikely(!skb)) {
559 netif_err(priv, rx_err, ndev, "out of memory!\n");
560 ndev->stats.rx_dropped++;
561 ndev->stats.rx_errors++;
565 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
566 RX_BUF_LENGTH, DMA_FROM_DEVICE);
568 /* Extract the Receive Status Block prepended */
569 rsb = (struct bcm_rsb *)skb->data;
570 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
571 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
574 netif_dbg(priv, rx_status, ndev,
575 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
576 p_index, priv->rx_c_index, priv->rx_read_ptr,
579 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
580 netif_err(priv, rx_status, ndev, "fragmented packet!\n");
581 ndev->stats.rx_dropped++;
582 ndev->stats.rx_errors++;
583 bcm_sysport_free_cb(cb);
587 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
588 netif_err(priv, rx_err, ndev, "error packet\n");
589 if (status & RX_STATUS_OVFLOW)
590 ndev->stats.rx_over_errors++;
591 ndev->stats.rx_dropped++;
592 ndev->stats.rx_errors++;
593 bcm_sysport_free_cb(cb);
599 /* Hardware validated our checksum */
600 if (likely(status & DESC_L4_CSUM))
601 skb->ip_summed = CHECKSUM_UNNECESSARY;
603 /* Hardware pre-pends packets with 2bytes before Ethernet
604 * header plus we have the Receive Status Block, strip off all
605 * of this from the SKB.
607 skb_pull(skb, sizeof(*rsb) + 2);
608 len -= (sizeof(*rsb) + 2);
610 /* UniMAC may forward CRC */
612 skb_trim(skb, len - ETH_FCS_LEN);
616 skb->protocol = eth_type_trans(skb, ndev);
617 ndev->stats.rx_packets++;
618 ndev->stats.rx_bytes += len;
620 napi_gro_receive(&priv->napi, skb);
622 bcm_sysport_rx_refill(priv, cb);
628 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
629 struct bcm_sysport_cb *cb,
630 unsigned int *bytes_compl,
631 unsigned int *pkts_compl)
633 struct device *kdev = &priv->pdev->dev;
634 struct net_device *ndev = priv->netdev;
637 ndev->stats.tx_bytes += cb->skb->len;
638 *bytes_compl += cb->skb->len;
639 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
640 dma_unmap_len(cb, dma_len),
642 ndev->stats.tx_packets++;
644 bcm_sysport_free_cb(cb);
646 } else if (dma_unmap_addr(cb, dma_addr)) {
647 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
648 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
649 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
650 dma_unmap_addr_set(cb, dma_addr, 0);
654 /* Reclaim queued SKBs for transmission completion, lockless version */
655 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
656 struct bcm_sysport_tx_ring *ring)
658 struct net_device *ndev = priv->netdev;
659 unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
660 unsigned int pkts_compl = 0, bytes_compl = 0;
661 struct bcm_sysport_cb *cb;
662 struct netdev_queue *txq;
665 txq = netdev_get_tx_queue(ndev, ring->index);
667 /* Compute how many descriptors have been processed since last call */
668 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
669 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
670 ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
672 last_c_index = ring->c_index;
673 num_tx_cbs = ring->size;
675 c_index &= (num_tx_cbs - 1);
677 if (c_index >= last_c_index)
678 last_tx_cn = c_index - last_c_index;
680 last_tx_cn = num_tx_cbs - last_c_index + c_index;
682 netif_dbg(priv, tx_done, ndev,
683 "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
684 ring->index, c_index, last_tx_cn, last_c_index);
686 while (last_tx_cn-- > 0) {
687 cb = ring->cbs + last_c_index;
688 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
692 last_c_index &= (num_tx_cbs - 1);
695 ring->c_index = c_index;
697 if (netif_tx_queue_stopped(txq) && pkts_compl)
698 netif_tx_wake_queue(txq);
700 netif_dbg(priv, tx_done, ndev,
701 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
702 ring->index, ring->c_index, pkts_compl, bytes_compl);
707 /* Locked version of the per-ring TX reclaim routine */
708 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
709 struct bcm_sysport_tx_ring *ring)
711 unsigned int released;
714 spin_lock_irqsave(&ring->lock, flags);
715 released = __bcm_sysport_tx_reclaim(priv, ring);
716 spin_unlock_irqrestore(&ring->lock, flags);
721 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
723 struct bcm_sysport_tx_ring *ring =
724 container_of(napi, struct bcm_sysport_tx_ring, napi);
725 unsigned int work_done = 0;
727 work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
729 if (work_done == 0) {
731 /* re-enable TX interrupt */
732 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
738 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
742 for (q = 0; q < priv->netdev->num_tx_queues; q++)
743 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
746 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
748 struct bcm_sysport_priv *priv =
749 container_of(napi, struct bcm_sysport_priv, napi);
750 unsigned int work_done = 0;
752 work_done = bcm_sysport_desc_rx(priv, budget);
754 priv->rx_c_index += work_done;
755 priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
756 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
758 if (work_done < budget) {
760 /* re-enable RX interrupts */
761 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
767 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
771 /* Stop monitoring MPD interrupt */
772 intrl2_0_mask_set(priv, INTRL2_0_MPD);
774 /* Clear the MagicPacket detection logic */
775 reg = umac_readl(priv, UMAC_MPD_CTRL);
777 umac_writel(priv, reg, UMAC_MPD_CTRL);
779 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
782 /* RX and misc interrupt routine */
783 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
785 struct net_device *dev = dev_id;
786 struct bcm_sysport_priv *priv = netdev_priv(dev);
788 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
789 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
790 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
792 if (unlikely(priv->irq0_stat == 0)) {
793 netdev_warn(priv->netdev, "spurious RX interrupt\n");
797 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
798 if (likely(napi_schedule_prep(&priv->napi))) {
799 /* disable RX interrupts */
800 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
801 __napi_schedule(&priv->napi);
805 /* TX ring is full, perform a full reclaim since we do not know
806 * which one would trigger this interrupt
808 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
809 bcm_sysport_tx_reclaim_all(priv);
811 if (priv->irq0_stat & INTRL2_0_MPD) {
812 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
813 bcm_sysport_resume_from_wol(priv);
819 /* TX interrupt service routine */
820 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
822 struct net_device *dev = dev_id;
823 struct bcm_sysport_priv *priv = netdev_priv(dev);
824 struct bcm_sysport_tx_ring *txr;
827 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
828 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
829 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
831 if (unlikely(priv->irq1_stat == 0)) {
832 netdev_warn(priv->netdev, "spurious TX interrupt\n");
836 for (ring = 0; ring < dev->num_tx_queues; ring++) {
837 if (!(priv->irq1_stat & BIT(ring)))
840 txr = &priv->tx_rings[ring];
842 if (likely(napi_schedule_prep(&txr->napi))) {
843 intrl2_1_mask_set(priv, BIT(ring));
844 __napi_schedule(&txr->napi);
851 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
853 struct bcm_sysport_priv *priv = dev_id;
855 pm_wakeup_event(&priv->pdev->dev, 0);
860 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
861 struct net_device *dev)
863 struct sk_buff *nskb;
870 /* Re-allocate SKB if needed */
871 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
872 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
875 dev->stats.tx_errors++;
876 dev->stats.tx_dropped++;
882 tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
883 /* Zero-out TSB by default */
884 memset(tsb, 0, sizeof(*tsb));
886 if (skb->ip_summed == CHECKSUM_PARTIAL) {
887 ip_ver = htons(skb->protocol);
890 ip_proto = ip_hdr(skb)->protocol;
893 ip_proto = ipv6_hdr(skb)->nexthdr;
899 /* Get the checksum offset and the L4 (transport) offset */
900 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
901 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
902 csum_info |= (csum_start << L4_PTR_SHIFT);
904 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
905 csum_info |= L4_LENGTH_VALID;
906 if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
912 tsb->l4_ptr_dest_map = csum_info;
918 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
919 struct net_device *dev)
921 struct bcm_sysport_priv *priv = netdev_priv(dev);
922 struct device *kdev = &priv->pdev->dev;
923 struct bcm_sysport_tx_ring *ring;
924 struct bcm_sysport_cb *cb;
925 struct netdev_queue *txq;
926 struct dma_desc *desc;
927 unsigned int skb_len;
934 queue = skb_get_queue_mapping(skb);
935 txq = netdev_get_tx_queue(dev, queue);
936 ring = &priv->tx_rings[queue];
938 /* lock against tx reclaim in BH context and TX ring full interrupt */
939 spin_lock_irqsave(&ring->lock, flags);
940 if (unlikely(ring->desc_count == 0)) {
941 netif_tx_stop_queue(txq);
942 netdev_err(dev, "queue %d awake and ring full!\n", queue);
943 ret = NETDEV_TX_BUSY;
947 /* Insert TSB and checksum infos */
949 skb = bcm_sysport_insert_tsb(skb, dev);
956 /* The Ethernet switch we are interfaced with needs packets to be at
957 * least 64 bytes (including FCS) otherwise they will be discarded when
958 * they enter the switch port logic. When Broadcom tags are enabled, we
959 * need to make sure that packets are at least 68 bytes
960 * (including FCS and tag) because the length verification is done after
961 * the Broadcom tag is stripped off the ingress packet.
963 if (skb_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
968 skb_len = skb->len < ETH_ZLEN + ENET_BRCM_TAG_LEN ?
969 ETH_ZLEN + ENET_BRCM_TAG_LEN : skb->len;
971 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
972 if (dma_mapping_error(kdev, mapping)) {
973 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
979 /* Remember the SKB for future freeing */
980 cb = &ring->cbs[ring->curr_desc];
982 dma_unmap_addr_set(cb, dma_addr, mapping);
983 dma_unmap_len_set(cb, dma_len, skb_len);
985 /* Fetch a descriptor entry from our pool */
986 desc = ring->desc_cpu;
988 desc->addr_lo = lower_32_bits(mapping);
989 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
990 len_status |= (skb_len << DESC_LEN_SHIFT);
991 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
993 if (skb->ip_summed == CHECKSUM_PARTIAL)
994 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
997 if (ring->curr_desc == ring->size)
1001 /* Ensure write completion of the descriptor status/length
1002 * in DRAM before the System Port WRITE_PORT register latches
1006 desc->addr_status_len = len_status;
1009 /* Write this descriptor address to the RING write port */
1010 tdma_port_write_desc_addr(priv, desc, ring->index);
1012 /* Check ring space and update SW control flow */
1013 if (ring->desc_count == 0)
1014 netif_tx_stop_queue(txq);
1016 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1017 ring->index, ring->desc_count, ring->curr_desc);
1021 spin_unlock_irqrestore(&ring->lock, flags);
1025 static void bcm_sysport_tx_timeout(struct net_device *dev)
1027 netdev_warn(dev, "transmit timeout!\n");
1029 dev->trans_start = jiffies;
1030 dev->stats.tx_errors++;
1032 netif_tx_wake_all_queues(dev);
1035 /* phylib adjust link callback */
1036 static void bcm_sysport_adj_link(struct net_device *dev)
1038 struct bcm_sysport_priv *priv = netdev_priv(dev);
1039 struct phy_device *phydev = priv->phydev;
1040 unsigned int changed = 0;
1041 u32 cmd_bits = 0, reg;
1043 if (priv->old_link != phydev->link) {
1045 priv->old_link = phydev->link;
1048 if (priv->old_duplex != phydev->duplex) {
1050 priv->old_duplex = phydev->duplex;
1053 switch (phydev->speed) {
1055 cmd_bits = CMD_SPEED_2500;
1058 cmd_bits = CMD_SPEED_1000;
1061 cmd_bits = CMD_SPEED_100;
1064 cmd_bits = CMD_SPEED_10;
1069 cmd_bits <<= CMD_SPEED_SHIFT;
1071 if (phydev->duplex == DUPLEX_HALF)
1072 cmd_bits |= CMD_HD_EN;
1074 if (priv->old_pause != phydev->pause) {
1076 priv->old_pause = phydev->pause;
1080 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1086 reg = umac_readl(priv, UMAC_CMD);
1087 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1088 CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1089 CMD_TX_PAUSE_IGNORE);
1091 umac_writel(priv, reg, UMAC_CMD);
1094 phy_print_status(priv->phydev);
1097 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1100 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1101 struct device *kdev = &priv->pdev->dev;
1106 /* Simple descriptors partitioning for now */
1109 /* We just need one DMA descriptor which is DMA-able, since writing to
1110 * the port will allocate a new descriptor in its internal linked-list
1112 p = dma_zalloc_coherent(kdev, 1, &ring->desc_dma, GFP_KERNEL);
1114 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1118 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1120 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1124 /* Initialize SW view of the ring */
1125 spin_lock_init(&ring->lock);
1127 netif_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1128 ring->index = index;
1130 ring->alloc_size = ring->size;
1132 ring->desc_count = ring->size;
1133 ring->curr_desc = 0;
1135 /* Initialize HW ring */
1136 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1137 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1138 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1139 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1140 tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1141 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1143 /* Program the number of descriptors as MAX_THRESHOLD and half of
1144 * its size for the hysteresis trigger
1146 tdma_writel(priv, ring->size |
1147 1 << RING_HYST_THRESH_SHIFT,
1148 TDMA_DESC_RING_MAX_HYST(index));
1150 /* Enable the ring queue in the arbiter */
1151 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1152 reg |= (1 << index);
1153 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1155 napi_enable(&ring->napi);
1157 netif_dbg(priv, hw, priv->netdev,
1158 "TDMA cfg, size=%d, desc_cpu=%p\n",
1159 ring->size, ring->desc_cpu);
1164 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1167 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1168 struct device *kdev = &priv->pdev->dev;
1171 /* Caller should stop the TDMA engine */
1172 reg = tdma_readl(priv, TDMA_STATUS);
1173 if (!(reg & TDMA_DISABLED))
1174 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1176 napi_disable(&ring->napi);
1177 netif_napi_del(&ring->napi);
1179 bcm_sysport_tx_reclaim(priv, ring);
1184 if (ring->desc_dma) {
1185 dma_free_coherent(kdev, 1, ring->desc_cpu, ring->desc_dma);
1189 ring->alloc_size = 0;
1191 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1195 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1196 unsigned int enable)
1198 unsigned int timeout = 1000;
1201 reg = rdma_readl(priv, RDMA_CONTROL);
1206 rdma_writel(priv, reg, RDMA_CONTROL);
1208 /* Poll for RMDA disabling completion */
1210 reg = rdma_readl(priv, RDMA_STATUS);
1211 if (!!(reg & RDMA_DISABLED) == !enable)
1213 usleep_range(1000, 2000);
1214 } while (timeout-- > 0);
1216 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1222 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1223 unsigned int enable)
1225 unsigned int timeout = 1000;
1228 reg = tdma_readl(priv, TDMA_CONTROL);
1233 tdma_writel(priv, reg, TDMA_CONTROL);
1235 /* Poll for TMDA disabling completion */
1237 reg = tdma_readl(priv, TDMA_STATUS);
1238 if (!!(reg & TDMA_DISABLED) == !enable)
1241 usleep_range(1000, 2000);
1242 } while (timeout-- > 0);
1244 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1249 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1254 /* Initialize SW view of the RX ring */
1255 priv->num_rx_bds = NUM_RX_DESC;
1256 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1257 priv->rx_bd_assign_ptr = priv->rx_bds;
1258 priv->rx_bd_assign_index = 0;
1259 priv->rx_c_index = 0;
1260 priv->rx_read_ptr = 0;
1261 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1263 if (!priv->rx_cbs) {
1264 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1268 ret = bcm_sysport_alloc_rx_bufs(priv);
1270 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1274 /* Initialize HW, ensure RDMA is disabled */
1275 reg = rdma_readl(priv, RDMA_STATUS);
1276 if (!(reg & RDMA_DISABLED))
1277 rdma_enable_set(priv, 0);
1279 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1280 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1281 rdma_writel(priv, 0, RDMA_PROD_INDEX);
1282 rdma_writel(priv, 0, RDMA_CONS_INDEX);
1283 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1284 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1285 /* Operate the queue in ring mode */
1286 rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1287 rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1288 rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1289 rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1291 rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1293 netif_dbg(priv, hw, priv->netdev,
1294 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1295 priv->num_rx_bds, priv->rx_bds);
1300 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1302 struct bcm_sysport_cb *cb;
1306 /* Caller should ensure RDMA is disabled */
1307 reg = rdma_readl(priv, RDMA_STATUS);
1308 if (!(reg & RDMA_DISABLED))
1309 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1311 for (i = 0; i < priv->num_rx_bds; i++) {
1312 cb = &priv->rx_cbs[i];
1313 if (dma_unmap_addr(cb, dma_addr))
1314 dma_unmap_single(&priv->pdev->dev,
1315 dma_unmap_addr(cb, dma_addr),
1316 RX_BUF_LENGTH, DMA_FROM_DEVICE);
1317 bcm_sysport_free_cb(cb);
1320 kfree(priv->rx_cbs);
1321 priv->rx_cbs = NULL;
1323 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1326 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1328 struct bcm_sysport_priv *priv = netdev_priv(dev);
1331 reg = umac_readl(priv, UMAC_CMD);
1332 if (dev->flags & IFF_PROMISC)
1335 reg &= ~CMD_PROMISC;
1336 umac_writel(priv, reg, UMAC_CMD);
1338 /* No support for ALLMULTI */
1339 if (dev->flags & IFF_ALLMULTI)
1343 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1344 u32 mask, unsigned int enable)
1348 reg = umac_readl(priv, UMAC_CMD);
1353 umac_writel(priv, reg, UMAC_CMD);
1355 /* UniMAC stops on a packet boundary, wait for a full-sized packet
1356 * to be processed (1 msec).
1359 usleep_range(1000, 2000);
1362 static inline void umac_reset(struct bcm_sysport_priv *priv)
1366 reg = umac_readl(priv, UMAC_CMD);
1367 reg |= CMD_SW_RESET;
1368 umac_writel(priv, reg, UMAC_CMD);
1370 reg = umac_readl(priv, UMAC_CMD);
1371 reg &= ~CMD_SW_RESET;
1372 umac_writel(priv, reg, UMAC_CMD);
1375 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1376 unsigned char *addr)
1378 umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1379 (addr[2] << 8) | addr[3], UMAC_MAC0);
1380 umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1383 static void topctrl_flush(struct bcm_sysport_priv *priv)
1385 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1386 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1388 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1389 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1392 static void bcm_sysport_netif_start(struct net_device *dev)
1394 struct bcm_sysport_priv *priv = netdev_priv(dev);
1397 napi_enable(&priv->napi);
1399 phy_start(priv->phydev);
1401 /* Enable TX interrupts for the 32 TXQs */
1402 intrl2_1_mask_clear(priv, 0xffffffff);
1404 /* Last call before we start the real business */
1405 netif_tx_start_all_queues(dev);
1408 static void rbuf_init(struct bcm_sysport_priv *priv)
1412 reg = rbuf_readl(priv, RBUF_CONTROL);
1413 reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1414 rbuf_writel(priv, reg, RBUF_CONTROL);
1417 static int bcm_sysport_open(struct net_device *dev)
1419 struct bcm_sysport_priv *priv = netdev_priv(dev);
1426 /* Flush TX and RX FIFOs at TOPCTRL level */
1427 topctrl_flush(priv);
1429 /* Disable the UniMAC RX/TX */
1430 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1432 /* Enable RBUF 2bytes alignment and Receive Status Block */
1435 /* Set maximum frame length */
1436 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1438 /* Set MAC address */
1439 umac_set_hw_addr(priv, dev->dev_addr);
1441 /* Read CRC forward */
1442 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1444 priv->phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1445 0, priv->phy_interface);
1446 if (!priv->phydev) {
1447 netdev_err(dev, "could not attach to PHY\n");
1451 /* Reset house keeping link status */
1452 priv->old_duplex = -1;
1453 priv->old_link = -1;
1454 priv->old_pause = -1;
1456 /* mask all interrupts and request them */
1457 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1458 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1459 intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1460 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1461 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1462 intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1464 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1466 netdev_err(dev, "failed to request RX interrupt\n");
1467 goto out_phy_disconnect;
1470 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1472 netdev_err(dev, "failed to request TX interrupt\n");
1476 /* Initialize both hardware and software ring */
1477 for (i = 0; i < dev->num_tx_queues; i++) {
1478 ret = bcm_sysport_init_tx_ring(priv, i);
1480 netdev_err(dev, "failed to initialize TX ring %d\n",
1482 goto out_free_tx_ring;
1486 /* Initialize linked-list */
1487 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1489 /* Initialize RX ring */
1490 ret = bcm_sysport_init_rx_ring(priv);
1492 netdev_err(dev, "failed to initialize RX ring\n");
1493 goto out_free_rx_ring;
1497 ret = rdma_enable_set(priv, 1);
1499 goto out_free_rx_ring;
1501 /* Enable RX interrupt and TX ring full interrupt */
1502 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1505 ret = tdma_enable_set(priv, 1);
1507 goto out_clear_rx_int;
1509 /* Turn on UniMAC TX/RX */
1510 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1512 bcm_sysport_netif_start(dev);
1517 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1519 bcm_sysport_fini_rx_ring(priv);
1521 for (i = 0; i < dev->num_tx_queues; i++)
1522 bcm_sysport_fini_tx_ring(priv, i);
1523 free_irq(priv->irq1, dev);
1525 free_irq(priv->irq0, dev);
1527 phy_disconnect(priv->phydev);
1531 static void bcm_sysport_netif_stop(struct net_device *dev)
1533 struct bcm_sysport_priv *priv = netdev_priv(dev);
1535 /* stop all software from updating hardware */
1536 netif_tx_stop_all_queues(dev);
1537 napi_disable(&priv->napi);
1538 phy_stop(priv->phydev);
1540 /* mask all interrupts */
1541 intrl2_0_mask_set(priv, 0xffffffff);
1542 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1543 intrl2_1_mask_set(priv, 0xffffffff);
1544 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1547 static int bcm_sysport_stop(struct net_device *dev)
1549 struct bcm_sysport_priv *priv = netdev_priv(dev);
1553 bcm_sysport_netif_stop(dev);
1555 /* Disable UniMAC RX */
1556 umac_enable_set(priv, CMD_RX_EN, 0);
1558 ret = tdma_enable_set(priv, 0);
1560 netdev_err(dev, "timeout disabling RDMA\n");
1564 /* Wait for a maximum packet size to be drained */
1565 usleep_range(2000, 3000);
1567 ret = rdma_enable_set(priv, 0);
1569 netdev_err(dev, "timeout disabling TDMA\n");
1573 /* Disable UniMAC TX */
1574 umac_enable_set(priv, CMD_TX_EN, 0);
1576 /* Free RX/TX rings SW structures */
1577 for (i = 0; i < dev->num_tx_queues; i++)
1578 bcm_sysport_fini_tx_ring(priv, i);
1579 bcm_sysport_fini_rx_ring(priv);
1581 free_irq(priv->irq0, dev);
1582 free_irq(priv->irq1, dev);
1584 /* Disconnect from PHY */
1585 phy_disconnect(priv->phydev);
1590 static struct ethtool_ops bcm_sysport_ethtool_ops = {
1591 .get_settings = bcm_sysport_get_settings,
1592 .set_settings = bcm_sysport_set_settings,
1593 .get_drvinfo = bcm_sysport_get_drvinfo,
1594 .get_msglevel = bcm_sysport_get_msglvl,
1595 .set_msglevel = bcm_sysport_set_msglvl,
1596 .get_link = ethtool_op_get_link,
1597 .get_strings = bcm_sysport_get_strings,
1598 .get_ethtool_stats = bcm_sysport_get_stats,
1599 .get_sset_count = bcm_sysport_get_sset_count,
1600 .get_wol = bcm_sysport_get_wol,
1601 .set_wol = bcm_sysport_set_wol,
1604 static const struct net_device_ops bcm_sysport_netdev_ops = {
1605 .ndo_start_xmit = bcm_sysport_xmit,
1606 .ndo_tx_timeout = bcm_sysport_tx_timeout,
1607 .ndo_open = bcm_sysport_open,
1608 .ndo_stop = bcm_sysport_stop,
1609 .ndo_set_features = bcm_sysport_set_features,
1610 .ndo_set_rx_mode = bcm_sysport_set_rx_mode,
1613 #define REV_FMT "v%2x.%02x"
1615 static int bcm_sysport_probe(struct platform_device *pdev)
1617 struct bcm_sysport_priv *priv;
1618 struct device_node *dn;
1619 struct net_device *dev;
1620 const void *macaddr;
1625 dn = pdev->dev.of_node;
1626 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1628 /* Read the Transmit/Receive Queue properties */
1629 if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1630 txq = TDMA_NUM_RINGS;
1631 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1634 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1638 /* Initialize private members */
1639 priv = netdev_priv(dev);
1641 priv->irq0 = platform_get_irq(pdev, 0);
1642 priv->irq1 = platform_get_irq(pdev, 1);
1643 priv->wol_irq = platform_get_irq(pdev, 2);
1644 if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1645 dev_err(&pdev->dev, "invalid interrupts\n");
1650 priv->base = devm_ioremap_resource(&pdev->dev, r);
1651 if (IS_ERR(priv->base)) {
1652 ret = PTR_ERR(priv->base);
1659 priv->phy_interface = of_get_phy_mode(dn);
1660 /* Default to GMII interface mode */
1661 if (priv->phy_interface < 0)
1662 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1664 /* In the case of a fixed PHY, the DT node associated
1665 * to the PHY is the Ethernet MAC DT node.
1667 if (of_phy_is_fixed_link(dn)) {
1668 ret = of_phy_register_fixed_link(dn);
1670 dev_err(&pdev->dev, "failed to register fixed PHY\n");
1677 /* Initialize netdevice members */
1678 macaddr = of_get_mac_address(dn);
1679 if (!macaddr || !is_valid_ether_addr(macaddr)) {
1680 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1681 random_ether_addr(dev->dev_addr);
1683 ether_addr_copy(dev->dev_addr, macaddr);
1686 SET_NETDEV_DEV(dev, &pdev->dev);
1687 dev_set_drvdata(&pdev->dev, dev);
1688 dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1689 dev->netdev_ops = &bcm_sysport_netdev_ops;
1690 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1692 /* HW supported features, none enabled by default */
1693 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1694 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1696 /* Request the WOL interrupt and advertise suspend if available */
1697 priv->wol_irq_disabled = 1;
1698 ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1699 bcm_sysport_wol_isr, 0, dev->name, priv);
1701 device_set_wakeup_capable(&pdev->dev, 1);
1703 /* Set the needed headroom once and for all */
1704 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1705 dev->needed_headroom += sizeof(struct bcm_tsb);
1707 /* libphy will adjust the link state accordingly */
1708 netif_carrier_off(dev);
1710 ret = register_netdev(dev);
1712 dev_err(&pdev->dev, "failed to register net_device\n");
1716 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1717 dev_info(&pdev->dev,
1718 "Broadcom SYSTEMPORT" REV_FMT
1719 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1720 (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1721 priv->base, priv->irq0, priv->irq1, txq, rxq);
1729 static int bcm_sysport_remove(struct platform_device *pdev)
1731 struct net_device *dev = dev_get_drvdata(&pdev->dev);
1733 /* Not much to do, ndo_close has been called
1734 * and we use managed allocations
1736 unregister_netdev(dev);
1738 dev_set_drvdata(&pdev->dev, NULL);
1743 #ifdef CONFIG_PM_SLEEP
1744 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1746 struct net_device *ndev = priv->netdev;
1747 unsigned int timeout = 1000;
1750 /* Password has already been programmed */
1751 reg = umac_readl(priv, UMAC_MPD_CTRL);
1754 if (priv->wolopts & WAKE_MAGICSECURE)
1756 umac_writel(priv, reg, UMAC_MPD_CTRL);
1758 /* Make sure RBUF entered WoL mode as result */
1760 reg = rbuf_readl(priv, RBUF_STATUS);
1761 if (reg & RBUF_WOL_MODE)
1765 } while (timeout-- > 0);
1767 /* Do not leave the UniMAC RBUF matching only MPD packets */
1769 reg = umac_readl(priv, UMAC_MPD_CTRL);
1771 umac_writel(priv, reg, UMAC_MPD_CTRL);
1772 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1776 /* UniMAC receive needs to be turned on */
1777 umac_enable_set(priv, CMD_RX_EN, 1);
1779 /* Enable the interrupt wake-up source */
1780 intrl2_0_mask_clear(priv, INTRL2_0_MPD);
1782 netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1787 static int bcm_sysport_suspend(struct device *d)
1789 struct net_device *dev = dev_get_drvdata(d);
1790 struct bcm_sysport_priv *priv = netdev_priv(dev);
1795 if (!netif_running(dev))
1798 bcm_sysport_netif_stop(dev);
1800 phy_suspend(priv->phydev);
1802 netif_device_detach(dev);
1804 /* Disable UniMAC RX */
1805 umac_enable_set(priv, CMD_RX_EN, 0);
1807 ret = rdma_enable_set(priv, 0);
1809 netdev_err(dev, "RDMA timeout!\n");
1813 /* Disable RXCHK if enabled */
1814 if (priv->rx_chk_en) {
1815 reg = rxchk_readl(priv, RXCHK_CONTROL);
1817 rxchk_writel(priv, reg, RXCHK_CONTROL);
1822 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1824 ret = tdma_enable_set(priv, 0);
1826 netdev_err(dev, "TDMA timeout!\n");
1830 /* Wait for a packet boundary */
1831 usleep_range(2000, 3000);
1833 umac_enable_set(priv, CMD_TX_EN, 0);
1835 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1837 /* Free RX/TX rings SW structures */
1838 for (i = 0; i < dev->num_tx_queues; i++)
1839 bcm_sysport_fini_tx_ring(priv, i);
1840 bcm_sysport_fini_rx_ring(priv);
1842 /* Get prepared for Wake-on-LAN */
1843 if (device_may_wakeup(d) && priv->wolopts)
1844 ret = bcm_sysport_suspend_to_wol(priv);
1849 static int bcm_sysport_resume(struct device *d)
1851 struct net_device *dev = dev_get_drvdata(d);
1852 struct bcm_sysport_priv *priv = netdev_priv(dev);
1857 if (!netif_running(dev))
1860 /* We may have been suspended and never received a WOL event that
1861 * would turn off MPD detection, take care of that now
1863 bcm_sysport_resume_from_wol(priv);
1865 /* Initialize both hardware and software ring */
1866 for (i = 0; i < dev->num_tx_queues; i++) {
1867 ret = bcm_sysport_init_tx_ring(priv, i);
1869 netdev_err(dev, "failed to initialize TX ring %d\n",
1871 goto out_free_tx_rings;
1875 /* Initialize linked-list */
1876 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1878 /* Initialize RX ring */
1879 ret = bcm_sysport_init_rx_ring(priv);
1881 netdev_err(dev, "failed to initialize RX ring\n");
1882 goto out_free_rx_ring;
1885 netif_device_attach(dev);
1887 /* Enable RX interrupt and TX ring full interrupt */
1888 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1890 /* RX pipe enable */
1891 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1893 ret = rdma_enable_set(priv, 1);
1895 netdev_err(dev, "failed to enable RDMA\n");
1896 goto out_free_rx_ring;
1900 if (priv->rx_chk_en) {
1901 reg = rxchk_readl(priv, RXCHK_CONTROL);
1903 rxchk_writel(priv, reg, RXCHK_CONTROL);
1908 /* Set maximum frame length */
1909 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1911 /* Set MAC address */
1912 umac_set_hw_addr(priv, dev->dev_addr);
1914 umac_enable_set(priv, CMD_RX_EN, 1);
1916 /* TX pipe enable */
1917 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1919 umac_enable_set(priv, CMD_TX_EN, 1);
1921 ret = tdma_enable_set(priv, 1);
1923 netdev_err(dev, "TDMA timeout!\n");
1924 goto out_free_rx_ring;
1927 phy_resume(priv->phydev);
1929 bcm_sysport_netif_start(dev);
1934 bcm_sysport_fini_rx_ring(priv);
1936 for (i = 0; i < dev->num_tx_queues; i++)
1937 bcm_sysport_fini_tx_ring(priv, i);
1942 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
1943 bcm_sysport_suspend, bcm_sysport_resume);
1945 static const struct of_device_id bcm_sysport_of_match[] = {
1946 { .compatible = "brcm,systemport-v1.00" },
1947 { .compatible = "brcm,systemport" },
1951 static struct platform_driver bcm_sysport_driver = {
1952 .probe = bcm_sysport_probe,
1953 .remove = bcm_sysport_remove,
1955 .name = "brcm-systemport",
1956 .owner = THIS_MODULE,
1957 .of_match_table = bcm_sysport_of_match,
1958 .pm = &bcm_sysport_pm_ops,
1961 module_platform_driver(bcm_sysport_driver);
1963 MODULE_AUTHOR("Broadcom Corporation");
1964 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
1965 MODULE_ALIAS("platform:brcm-systemport");
1966 MODULE_LICENSE("GPL");