drivers/net/ethernet/brocade/bna/bna_tx_rx.c

   1 /*
   2  * Linux network driver for QLogic BR-series Converged Network Adapter.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License (GPL) Version 2 as
   6  * published by the Free Software Foundation
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12   */
  13 /*
  14  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
  15  * Copyright (c) 2014-2015 QLogic Corporation
  16  * All rights reserved
  17  * www.qlogic.com
  18  */
  19 #include "bna.h"
  20 #include "bfi.h"
  21
  22 /* IB */
  23 static void
  24 bna_ib_coalescing_timeo_set(struct bna_ib *ib, u8 coalescing_timeo)
  25 {
  26         ib->coalescing_timeo = coalescing_timeo;
  27         ib->door_bell.doorbell_ack = BNA_DOORBELL_IB_INT_ACK(
  28                                 (u32)ib->coalescing_timeo, 0);
  29 }
  30
  31 /* RXF */
  32
  33 #define bna_rxf_vlan_cfg_soft_reset(rxf)                                \
  34 do {                                                                    \
  35         (rxf)->vlan_pending_bitmask = (u8)BFI_VLAN_BMASK_ALL;           \
  36         (rxf)->vlan_strip_pending = true;                               \
  37 } while (0)
  38
  39 #define bna_rxf_rss_cfg_soft_reset(rxf)                                 \
  40 do {                                                                    \
  41         if ((rxf)->rss_status == BNA_STATUS_T_ENABLED)                  \
  42                 (rxf)->rss_pending = (BNA_RSS_F_RIT_PENDING |           \
  43                                 BNA_RSS_F_CFG_PENDING |                 \
  44                                 BNA_RSS_F_STATUS_PENDING);              \
  45 } while (0)
  46
  47 static int bna_rxf_cfg_apply(struct bna_rxf *rxf);
  48 static void bna_rxf_cfg_reset(struct bna_rxf *rxf);
  49 static int bna_rxf_ucast_cfg_apply(struct bna_rxf *rxf);
  50 static int bna_rxf_promisc_cfg_apply(struct bna_rxf *rxf);
  51 static int bna_rxf_allmulti_cfg_apply(struct bna_rxf *rxf);
  52 static int bna_rxf_vlan_strip_cfg_apply(struct bna_rxf *rxf);
  53 static int bna_rxf_ucast_cfg_reset(struct bna_rxf *rxf,
  54                                         enum bna_cleanup_type cleanup);
  55 static int bna_rxf_promisc_cfg_reset(struct bna_rxf *rxf,
  56                                         enum bna_cleanup_type cleanup);
  57 static int bna_rxf_allmulti_cfg_reset(struct bna_rxf *rxf,
  58                                         enum bna_cleanup_type cleanup);
  59
  60 bfa_fsm_state_decl(bna_rxf, stopped, struct bna_rxf,
  61                         enum bna_rxf_event);
  62 bfa_fsm_state_decl(bna_rxf, cfg_wait, struct bna_rxf,
  63                         enum bna_rxf_event);
  64 bfa_fsm_state_decl(bna_rxf, started, struct bna_rxf,
  65                         enum bna_rxf_event);
  66 bfa_fsm_state_decl(bna_rxf, last_resp_wait, struct bna_rxf,
  67                         enum bna_rxf_event);
  68
  69 static void
  70 bna_rxf_sm_stopped_entry(struct bna_rxf *rxf)
  71 {
  72         call_rxf_stop_cbfn(rxf);
  73 }
  74
  75 static void
  76 bna_rxf_sm_stopped(struct bna_rxf *rxf, enum bna_rxf_event event)
  77 {
  78         switch (event) {
  79         case RXF_E_START:
  80                 bfa_fsm_set_state(rxf, bna_rxf_sm_cfg_wait);
  81                 break;
  82
  83         case RXF_E_STOP:
  84                 call_rxf_stop_cbfn(rxf);
  85                 break;
  86
  87         case RXF_E_FAIL:
  88                 /* No-op */
  89                 break;
  90
  91         case RXF_E_CONFIG:
  92                 call_rxf_cam_fltr_cbfn(rxf);
  93                 break;
  94
  95         default:
  96                 bfa_sm_fault(event);
  97         }
  98 }
  99
 100 static void
 101 bna_rxf_sm_cfg_wait_entry(struct bna_rxf *rxf)
 102 {
 103         if (!bna_rxf_cfg_apply(rxf)) {
 104                 /* No more pending config updates */
 105                 bfa_fsm_set_state(rxf, bna_rxf_sm_started);
 106         }
 107 }
 108
 109 static void
 110 bna_rxf_sm_cfg_wait(struct bna_rxf *rxf, enum bna_rxf_event event)
 111 {
 112         switch (event) {
 113         case RXF_E_STOP:
 114                 bfa_fsm_set_state(rxf, bna_rxf_sm_last_resp_wait);
 115                 break;
 116
 117         case RXF_E_FAIL:
 118                 bna_rxf_cfg_reset(rxf);
 119                 call_rxf_start_cbfn(rxf);
 120                 call_rxf_cam_fltr_cbfn(rxf);
 121                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 122                 break;
 123
 124         case RXF_E_CONFIG:
 125                 /* No-op */
 126                 break;
 127
 128         case RXF_E_FW_RESP:
 129                 if (!bna_rxf_cfg_apply(rxf)) {
 130                         /* No more pending config updates */
 131                         bfa_fsm_set_state(rxf, bna_rxf_sm_started);
 132                 }
 133                 break;
 134
 135         default:
 136                 bfa_sm_fault(event);
 137         }
 138 }
 139
 140 static void
 141 bna_rxf_sm_started_entry(struct bna_rxf *rxf)
 142 {
 143         call_rxf_start_cbfn(rxf);
 144         call_rxf_cam_fltr_cbfn(rxf);
 145 }
 146
 147 static void
 148 bna_rxf_sm_started(struct bna_rxf *rxf, enum bna_rxf_event event)
 149 {
 150         switch (event) {
 151         case RXF_E_STOP:
 152         case RXF_E_FAIL:
 153                 bna_rxf_cfg_reset(rxf);
 154                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 155                 break;
 156
 157         case RXF_E_CONFIG:
 158                 bfa_fsm_set_state(rxf, bna_rxf_sm_cfg_wait);
 159                 break;
 160
 161         default:
 162                 bfa_sm_fault(event);
 163         }
 164 }
 165
 166 static void
 167 bna_rxf_sm_last_resp_wait_entry(struct bna_rxf *rxf)
 168 {
 169 }
 170
 171 static void
 172 bna_rxf_sm_last_resp_wait(struct bna_rxf *rxf, enum bna_rxf_event event)
 173 {
 174         switch (event) {
 175         case RXF_E_FAIL:
 176         case RXF_E_FW_RESP:
 177                 bna_rxf_cfg_reset(rxf);
 178                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 179                 break;
 180
 181         default:
 182                 bfa_sm_fault(event);
 183         }
 184 }
 185
 186 static void
 187 bna_bfi_ucast_req(struct bna_rxf *rxf, struct bna_mac *mac,
 188                 enum bfi_enet_h2i_msgs req_type)
 189 {
 190         struct bfi_enet_ucast_req *req = &rxf->bfi_enet_cmd.ucast_req;
 191
 192         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET, req_type, 0, rxf->rx->rid);
 193         req->mh.num_entries = htons(
 194         bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_ucast_req)));
 195         ether_addr_copy(req->mac_addr, mac->addr);
 196         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 197                 sizeof(struct bfi_enet_ucast_req), &req->mh);
 198         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 199 }
 200
 201 static void
 202 bna_bfi_mcast_add_req(struct bna_rxf *rxf, struct bna_mac *mac)
 203 {
 204         struct bfi_enet_mcast_add_req *req =
 205                 &rxf->bfi_enet_cmd.mcast_add_req;
 206
 207         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET, BFI_ENET_H2I_MAC_MCAST_ADD_REQ,
 208                 0, rxf->rx->rid);
 209         req->mh.num_entries = htons(
 210         bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_mcast_add_req)));
 211         ether_addr_copy(req->mac_addr, mac->addr);
 212         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 213                 sizeof(struct bfi_enet_mcast_add_req), &req->mh);
 214         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 215 }
 216
 217 static void
 218 bna_bfi_mcast_del_req(struct bna_rxf *rxf, u16 handle)
 219 {
 220         struct bfi_enet_mcast_del_req *req =
 221                 &rxf->bfi_enet_cmd.mcast_del_req;
 222
 223         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET, BFI_ENET_H2I_MAC_MCAST_DEL_REQ,
 224                 0, rxf->rx->rid);
 225         req->mh.num_entries = htons(
 226         bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_mcast_del_req)));
 227         req->handle = htons(handle);
 228         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 229                 sizeof(struct bfi_enet_mcast_del_req), &req->mh);
 230         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 231 }
 232
 233 static void
 234 bna_bfi_mcast_filter_req(struct bna_rxf *rxf, enum bna_status status)
 235 {
 236         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 237
 238         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 239                 BFI_ENET_H2I_MAC_MCAST_FILTER_REQ, 0, rxf->rx->rid);
 240         req->mh.num_entries = htons(
 241                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 242         req->enable = status;
 243         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 244                 sizeof(struct bfi_enet_enable_req), &req->mh);
 245         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 246 }
 247
 248 static void
 249 bna_bfi_rx_promisc_req(struct bna_rxf *rxf, enum bna_status status)
 250 {
 251         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 252
 253         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 254                 BFI_ENET_H2I_RX_PROMISCUOUS_REQ, 0, rxf->rx->rid);
 255         req->mh.num_entries = htons(
 256                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 257         req->enable = status;
 258         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 259                 sizeof(struct bfi_enet_enable_req), &req->mh);
 260         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 261 }
 262
 263 static void
 264 bna_bfi_rx_vlan_filter_set(struct bna_rxf *rxf, u8 block_idx)
 265 {
 266         struct bfi_enet_rx_vlan_req *req = &rxf->bfi_enet_cmd.vlan_req;
 267         int i;
 268         int j;
 269
 270         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 271                 BFI_ENET_H2I_RX_VLAN_SET_REQ, 0, rxf->rx->rid);
 272         req->mh.num_entries = htons(
 273                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rx_vlan_req)));
 274         req->block_idx = block_idx;
 275         for (i = 0; i < (BFI_ENET_VLAN_BLOCK_SIZE / 32); i++) {
 276                 j = (block_idx * (BFI_ENET_VLAN_BLOCK_SIZE / 32)) + i;
 277                 if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED)
 278                         req->bit_mask[i] =
 279                                 htonl(rxf->vlan_filter_table[j]);
 280                 else
 281                         req->bit_mask[i] = 0xFFFFFFFF;
 282         }
 283         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 284                 sizeof(struct bfi_enet_rx_vlan_req), &req->mh);
 285         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 286 }
 287
 288 static void
 289 bna_bfi_vlan_strip_enable(struct bna_rxf *rxf)
 290 {
 291         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 292
 293         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 294                 BFI_ENET_H2I_RX_VLAN_STRIP_ENABLE_REQ, 0, rxf->rx->rid);
 295         req->mh.num_entries = htons(
 296                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 297         req->enable = rxf->vlan_strip_status;
 298         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 299                 sizeof(struct bfi_enet_enable_req), &req->mh);
 300         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 301 }
 302
 303 static void
 304 bna_bfi_rit_cfg(struct bna_rxf *rxf)
 305 {
 306         struct bfi_enet_rit_req *req = &rxf->bfi_enet_cmd.rit_req;
 307
 308         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 309                 BFI_ENET_H2I_RIT_CFG_REQ, 0, rxf->rx->rid);
 310         req->mh.num_entries = htons(
 311                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rit_req)));
 312         req->size = htons(rxf->rit_size);
 313         memcpy(&req->table[0], rxf->rit, rxf->rit_size);
 314         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 315                 sizeof(struct bfi_enet_rit_req), &req->mh);
 316         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 317 }
 318
 319 static void
 320 bna_bfi_rss_cfg(struct bna_rxf *rxf)
 321 {
 322         struct bfi_enet_rss_cfg_req *req = &rxf->bfi_enet_cmd.rss_req;
 323         int i;
 324
 325         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 326                 BFI_ENET_H2I_RSS_CFG_REQ, 0, rxf->rx->rid);
 327         req->mh.num_entries = htons(
 328                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rss_cfg_req)));
 329         req->cfg.type = rxf->rss_cfg.hash_type;
 330         req->cfg.mask = rxf->rss_cfg.hash_mask;
 331         for (i = 0; i < BFI_ENET_RSS_KEY_LEN; i++)
 332                 req->cfg.key[i] =
 333                         htonl(rxf->rss_cfg.toeplitz_hash_key[i]);
 334         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 335                 sizeof(struct bfi_enet_rss_cfg_req), &req->mh);
 336         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 337 }
 338
 339 static void
 340 bna_bfi_rss_enable(struct bna_rxf *rxf)
 341 {
 342         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 343
 344         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 345                 BFI_ENET_H2I_RSS_ENABLE_REQ, 0, rxf->rx->rid);
 346         req->mh.num_entries = htons(
 347                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 348         req->enable = rxf->rss_status;
 349         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 350                 sizeof(struct bfi_enet_enable_req), &req->mh);
 351         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 352 }
 353
 354 /* This function gets the multicast MAC that has already been added to CAM */
 355 static struct bna_mac *
 356 bna_rxf_mcmac_get(struct bna_rxf *rxf, u8 *mac_addr)
 357 {
 358         struct bna_mac *mac;
 359         struct list_head *qe;
 360
 361         list_for_each(qe, &rxf->mcast_active_q) {
 362                 mac = (struct bna_mac *)qe;
 363                 if (ether_addr_equal(mac->addr, mac_addr))
 364                         return mac;
 365         }
 366
 367         list_for_each(qe, &rxf->mcast_pending_del_q) {
 368                 mac = (struct bna_mac *)qe;
 369                 if (ether_addr_equal(mac->addr, mac_addr))
 370                         return mac;
 371         }
 372
 373         return NULL;
 374 }
 375
 376 static struct bna_mcam_handle *
 377 bna_rxf_mchandle_get(struct bna_rxf *rxf, int handle)
 378 {
 379         struct bna_mcam_handle *mchandle;
 380         struct list_head *qe;
 381
 382         list_for_each(qe, &rxf->mcast_handle_q) {
 383                 mchandle = (struct bna_mcam_handle *)qe;
 384                 if (mchandle->handle == handle)
 385                         return mchandle;
 386         }
 387
 388         return NULL;
 389 }
 390
 391 static void
 392 bna_rxf_mchandle_attach(struct bna_rxf *rxf, u8 *mac_addr, int handle)
 393 {
 394         struct bna_mac *mcmac;
 395         struct bna_mcam_handle *mchandle;
 396
 397         mcmac = bna_rxf_mcmac_get(rxf, mac_addr);
 398         mchandle = bna_rxf_mchandle_get(rxf, handle);
 399         if (mchandle == NULL) {
 400                 mchandle = bna_mcam_mod_handle_get(&rxf->rx->bna->mcam_mod);
 401                 mchandle->handle = handle;
 402                 mchandle->refcnt = 0;
 403                 list_add_tail(&mchandle->qe, &rxf->mcast_handle_q);
 404         }
 405         mchandle->refcnt++;
 406         mcmac->handle = mchandle;
 407 }
 408
 409 static int
 410 bna_rxf_mcast_del(struct bna_rxf *rxf, struct bna_mac *mac,
 411                 enum bna_cleanup_type cleanup)
 412 {
 413         struct bna_mcam_handle *mchandle;
 414         int ret = 0;
 415
 416         mchandle = mac->handle;
 417         if (mchandle == NULL)
 418                 return ret;
 419
 420         mchandle->refcnt--;
 421         if (mchandle->refcnt == 0) {
 422                 if (cleanup == BNA_HARD_CLEANUP) {
 423                         bna_bfi_mcast_del_req(rxf, mchandle->handle);
 424                         ret = 1;
 425                 }
 426                 list_del(&mchandle->qe);
 427                 bfa_q_qe_init(&mchandle->qe);
 428                 bna_mcam_mod_handle_put(&rxf->rx->bna->mcam_mod, mchandle);
 429         }
 430         mac->handle = NULL;
 431
 432         return ret;
 433 }
 434
 435 static int
 436 bna_rxf_mcast_cfg_apply(struct bna_rxf *rxf)
 437 {
 438         struct bna_mac *mac = NULL;
 439         struct list_head *qe;
 440         int ret;
 441
 442         /* First delete multicast entries to maintain the count */
 443         while (!list_empty(&rxf->mcast_pending_del_q)) {
 444                 bfa_q_deq(&rxf->mcast_pending_del_q, &qe);
 445                 bfa_q_qe_init(qe);
 446                 mac = (struct bna_mac *)qe;
 447                 ret = bna_rxf_mcast_del(rxf, mac, BNA_HARD_CLEANUP);
 448                 bna_cam_mod_mac_put(bna_mcam_mod_del_q(rxf->rx->bna), mac);
 449                 if (ret)
 450                         return ret;
 451         }
 452
 453         /* Add multicast entries */
 454         if (!list_empty(&rxf->mcast_pending_add_q)) {
 455                 bfa_q_deq(&rxf->mcast_pending_add_q, &qe);
 456                 bfa_q_qe_init(qe);
 457                 mac = (struct bna_mac *)qe;
 458                 list_add_tail(&mac->qe, &rxf->mcast_active_q);
 459                 bna_bfi_mcast_add_req(rxf, mac);
 460                 return 1;
 461         }
 462
 463         return 0;
 464 }
 465
 466 static int
 467 bna_rxf_vlan_cfg_apply(struct bna_rxf *rxf)
 468 {
 469         u8 vlan_pending_bitmask;
 470         int block_idx = 0;
 471
 472         if (rxf->vlan_pending_bitmask) {
 473                 vlan_pending_bitmask = rxf->vlan_pending_bitmask;
 474                 while (!(vlan_pending_bitmask & 0x1)) {
 475                         block_idx++;
 476                         vlan_pending_bitmask >>= 1;
 477                 }
 478                 rxf->vlan_pending_bitmask &= ~BIT(block_idx);
 479                 bna_bfi_rx_vlan_filter_set(rxf, block_idx);
 480                 return 1;
 481         }
 482
 483         return 0;
 484 }
 485
 486 static int
 487 bna_rxf_mcast_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
 488 {
 489         struct list_head *qe;
 490         struct bna_mac *mac;
 491         int ret;
 492
 493         /* Throw away delete pending mcast entries */
 494         while (!list_empty(&rxf->mcast_pending_del_q)) {
 495                 bfa_q_deq(&rxf->mcast_pending_del_q, &qe);
 496                 bfa_q_qe_init(qe);
 497                 mac = (struct bna_mac *)qe;
 498                 ret = bna_rxf_mcast_del(rxf, mac, cleanup);
 499                 bna_cam_mod_mac_put(bna_mcam_mod_del_q(rxf->rx->bna), mac);
 500                 if (ret)
 501                         return ret;
 502         }
 503
 504         /* Move active mcast entries to pending_add_q */
 505         while (!list_empty(&rxf->mcast_active_q)) {
 506                 bfa_q_deq(&rxf->mcast_active_q, &qe);
 507                 bfa_q_qe_init(qe);
 508                 list_add_tail(qe, &rxf->mcast_pending_add_q);
 509                 mac = (struct bna_mac *)qe;
 510                 if (bna_rxf_mcast_del(rxf, mac, cleanup))
 511                         return 1;
 512         }
 513
 514         return 0;
 515 }
 516
 517 static int
 518 bna_rxf_rss_cfg_apply(struct bna_rxf *rxf)
 519 {
 520         if (rxf->rss_pending) {
 521                 if (rxf->rss_pending & BNA_RSS_F_RIT_PENDING) {
 522                         rxf->rss_pending &= ~BNA_RSS_F_RIT_PENDING;
 523                         bna_bfi_rit_cfg(rxf);
 524                         return 1;
 525                 }
 526
 527                 if (rxf->rss_pending & BNA_RSS_F_CFG_PENDING) {
 528                         rxf->rss_pending &= ~BNA_RSS_F_CFG_PENDING;
 529                         bna_bfi_rss_cfg(rxf);
 530                         return 1;
 531                 }
 532
 533                 if (rxf->rss_pending & BNA_RSS_F_STATUS_PENDING) {
 534                         rxf->rss_pending &= ~BNA_RSS_F_STATUS_PENDING;
 535                         bna_bfi_rss_enable(rxf);
 536                         return 1;
 537                 }
 538         }
 539
 540         return 0;
 541 }
 542
 543 static int
 544 bna_rxf_cfg_apply(struct bna_rxf *rxf)
 545 {
 546         if (bna_rxf_ucast_cfg_apply(rxf))
 547                 return 1;
 548
 549         if (bna_rxf_mcast_cfg_apply(rxf))
 550                 return 1;
 551
 552         if (bna_rxf_promisc_cfg_apply(rxf))
 553                 return 1;
 554
 555         if (bna_rxf_allmulti_cfg_apply(rxf))
 556                 return 1;
 557
 558         if (bna_rxf_vlan_cfg_apply(rxf))
 559                 return 1;
 560
 561         if (bna_rxf_vlan_strip_cfg_apply(rxf))
 562                 return 1;
 563
 564         if (bna_rxf_rss_cfg_apply(rxf))
 565                 return 1;
 566
 567         return 0;
 568 }
 569
 570 static void
 571 bna_rxf_cfg_reset(struct bna_rxf *rxf)
 572 {
 573         bna_rxf_ucast_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 574         bna_rxf_mcast_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 575         bna_rxf_promisc_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 576         bna_rxf_allmulti_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 577         bna_rxf_vlan_cfg_soft_reset(rxf);
 578         bna_rxf_rss_cfg_soft_reset(rxf);
 579 }
 580
 581 static void
 582 bna_rit_init(struct bna_rxf *rxf, int rit_size)
 583 {
 584         struct bna_rx *rx = rxf->rx;
 585         struct bna_rxp *rxp;
 586         struct list_head *qe;
 587         int offset = 0;
 588
 589         rxf->rit_size = rit_size;
 590         list_for_each(qe, &rx->rxp_q) {
 591                 rxp = (struct bna_rxp *)qe;
 592                 rxf->rit[offset] = rxp->cq.ccb->id;
 593                 offset++;
 594         }
 595
 596 }
 597
 598 void
 599 bna_bfi_rxf_cfg_rsp(struct bna_rxf *rxf, struct bfi_msgq_mhdr *msghdr)
 600 {
 601         bfa_fsm_send_event(rxf, RXF_E_FW_RESP);
 602 }
 603
 604 void
 605 bna_bfi_rxf_ucast_set_rsp(struct bna_rxf *rxf,
 606                         struct bfi_msgq_mhdr *msghdr)
 607 {
 608         struct bfi_enet_rsp *rsp =
 609                 container_of(msghdr, struct bfi_enet_rsp, mh);
 610
 611         if (rsp->error) {
 612                 /* Clear ucast from cache */
 613                 rxf->ucast_active_set = 0;
 614         }
 615
 616         bfa_fsm_send_event(rxf, RXF_E_FW_RESP);
 617 }
 618
 619 void
 620 bna_bfi_rxf_mcast_add_rsp(struct bna_rxf *rxf,
 621                         struct bfi_msgq_mhdr *msghdr)
 622 {
 623         struct bfi_enet_mcast_add_req *req =
 624                 &rxf->bfi_enet_cmd.mcast_add_req;
 625         struct bfi_enet_mcast_add_rsp *rsp =
 626                 container_of(msghdr, struct bfi_enet_mcast_add_rsp, mh);
 627
 628         bna_rxf_mchandle_attach(rxf, (u8 *)&req->mac_addr,
 629                 ntohs(rsp->handle));
 630         bfa_fsm_send_event(rxf, RXF_E_FW_RESP);
 631 }
 632
 633 static void
 634 bna_rxf_init(struct bna_rxf *rxf,
 635                 struct bna_rx *rx,
 636                 struct bna_rx_config *q_config,
 637                 struct bna_res_info *res_info)
 638 {
 639         rxf->rx = rx;
 640
 641         INIT_LIST_HEAD(&rxf->ucast_pending_add_q);
 642         INIT_LIST_HEAD(&rxf->ucast_pending_del_q);
 643         rxf->ucast_pending_set = 0;
 644         rxf->ucast_active_set = 0;
 645         INIT_LIST_HEAD(&rxf->ucast_active_q);
 646         rxf->ucast_pending_mac = NULL;
 647
 648         INIT_LIST_HEAD(&rxf->mcast_pending_add_q);
 649         INIT_LIST_HEAD(&rxf->mcast_pending_del_q);
 650         INIT_LIST_HEAD(&rxf->mcast_active_q);
 651         INIT_LIST_HEAD(&rxf->mcast_handle_q);
 652
 653         rxf->rit = (u8 *)
 654                 res_info[BNA_RX_RES_MEM_T_RIT].res_u.mem_info.mdl[0].kva;
 655         bna_rit_init(rxf, q_config->num_paths);
 656
 657         rxf->rss_status = q_config->rss_status;
 658         if (rxf->rss_status == BNA_STATUS_T_ENABLED) {
 659                 rxf->rss_cfg = q_config->rss_config;
 660                 rxf->rss_pending |= BNA_RSS_F_CFG_PENDING;
 661                 rxf->rss_pending |= BNA_RSS_F_RIT_PENDING;
 662                 rxf->rss_pending |= BNA_RSS_F_STATUS_PENDING;
 663         }
 664
 665         rxf->vlan_filter_status = BNA_STATUS_T_DISABLED;
 666         memset(rxf->vlan_filter_table, 0,
 667                         (sizeof(u32) * (BFI_ENET_VLAN_ID_MAX / 32)));
 668         rxf->vlan_filter_table[0] |= 1; /* for pure priority tagged frames */
 669         rxf->vlan_pending_bitmask = (u8)BFI_VLAN_BMASK_ALL;
 670
 671         rxf->vlan_strip_status = q_config->vlan_strip_status;
 672
 673         bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 674 }
 675
 676 static void
 677 bna_rxf_uninit(struct bna_rxf *rxf)
 678 {
 679         struct bna_mac *mac;
 680
 681         rxf->ucast_pending_set = 0;
 682         rxf->ucast_active_set = 0;
 683
 684         while (!list_empty(&rxf->ucast_pending_add_q)) {
 685                 bfa_q_deq(&rxf->ucast_pending_add_q, &mac);
 686                 bfa_q_qe_init(&mac->qe);
 687                 bna_cam_mod_mac_put(bna_ucam_mod_free_q(rxf->rx->bna), mac);
 688         }
 689
 690         if (rxf->ucast_pending_mac) {
 691                 bfa_q_qe_init(&rxf->ucast_pending_mac->qe);
 692                 bna_cam_mod_mac_put(bna_ucam_mod_free_q(rxf->rx->bna),
 693                                     rxf->ucast_pending_mac);
 694                 rxf->ucast_pending_mac = NULL;
 695         }
 696
 697         while (!list_empty(&rxf->mcast_pending_add_q)) {
 698                 bfa_q_deq(&rxf->mcast_pending_add_q, &mac);
 699                 bfa_q_qe_init(&mac->qe);
 700                 bna_cam_mod_mac_put(bna_mcam_mod_free_q(rxf->rx->bna), mac);
 701         }
 702
 703         rxf->rxmode_pending = 0;
 704         rxf->rxmode_pending_bitmask = 0;
 705         if (rxf->rx->bna->promisc_rid == rxf->rx->rid)
 706                 rxf->rx->bna->promisc_rid = BFI_INVALID_RID;
 707         if (rxf->rx->bna->default_mode_rid == rxf->rx->rid)
 708                 rxf->rx->bna->default_mode_rid = BFI_INVALID_RID;
 709
 710         rxf->rss_pending = 0;
 711         rxf->vlan_strip_pending = false;
 712
 713         rxf->rx = NULL;
 714 }
 715
 716 static void
 717 bna_rx_cb_rxf_started(struct bna_rx *rx)
 718 {
 719         bfa_fsm_send_event(rx, RX_E_RXF_STARTED);
 720 }
 721
 722 static void
 723 bna_rxf_start(struct bna_rxf *rxf)
 724 {
 725         rxf->start_cbfn = bna_rx_cb_rxf_started;
 726         rxf->start_cbarg = rxf->rx;
 727         bfa_fsm_send_event(rxf, RXF_E_START);
 728 }
 729
 730 static void
 731 bna_rx_cb_rxf_stopped(struct bna_rx *rx)
 732 {
 733         bfa_fsm_send_event(rx, RX_E_RXF_STOPPED);
 734 }
 735
 736 static void
 737 bna_rxf_stop(struct bna_rxf *rxf)
 738 {
 739         rxf->stop_cbfn = bna_rx_cb_rxf_stopped;
 740         rxf->stop_cbarg = rxf->rx;
 741         bfa_fsm_send_event(rxf, RXF_E_STOP);
 742 }
 743
 744 static void
 745 bna_rxf_fail(struct bna_rxf *rxf)
 746 {
 747         bfa_fsm_send_event(rxf, RXF_E_FAIL);
 748 }
 749
 750 enum bna_cb_status
 751 bna_rx_ucast_set(struct bna_rx *rx, u8 *ucmac)
 752 {
 753         struct bna_rxf *rxf = &rx->rxf;
 754
 755         if (rxf->ucast_pending_mac == NULL) {
 756                 rxf->ucast_pending_mac =
 757                         bna_cam_mod_mac_get(bna_ucam_mod_free_q(rxf->rx->bna));
 758                 if (rxf->ucast_pending_mac == NULL)
 759                         return BNA_CB_UCAST_CAM_FULL;
 760                 bfa_q_qe_init(&rxf->ucast_pending_mac->qe);
 761         }
 762
 763         ether_addr_copy(rxf->ucast_pending_mac->addr, ucmac);
 764         rxf->ucast_pending_set = 1;
 765         rxf->cam_fltr_cbfn = NULL;
 766         rxf->cam_fltr_cbarg = rx->bna->bnad;
 767
 768         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 769
 770         return BNA_CB_SUCCESS;
 771 }
 772
 773 enum bna_cb_status
 774 bna_rx_mcast_add(struct bna_rx *rx, u8 *addr,
 775                  void (*cbfn)(struct bnad *, struct bna_rx *))
 776 {
 777         struct bna_rxf *rxf = &rx->rxf;
 778         struct bna_mac *mac;
 779
 780         /* Check if already added or pending addition */
 781         if (bna_mac_find(&rxf->mcast_active_q, addr) ||
 782                 bna_mac_find(&rxf->mcast_pending_add_q, addr)) {
 783                 if (cbfn)
 784                         cbfn(rx->bna->bnad, rx);
 785                 return BNA_CB_SUCCESS;
 786         }
 787
 788         mac = bna_cam_mod_mac_get(bna_mcam_mod_free_q(rxf->rx->bna));
 789         if (mac == NULL)
 790                 return BNA_CB_MCAST_LIST_FULL;
 791         bfa_q_qe_init(&mac->qe);
 792         ether_addr_copy(mac->addr, addr);
 793         list_add_tail(&mac->qe, &rxf->mcast_pending_add_q);
 794
 795         rxf->cam_fltr_cbfn = cbfn;
 796         rxf->cam_fltr_cbarg = rx->bna->bnad;
 797
 798         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 799
 800         return BNA_CB_SUCCESS;
 801 }
 802
 803 enum bna_cb_status
 804 bna_rx_ucast_listset(struct bna_rx *rx, int count, u8 *uclist)
 805 {
 806         struct bna_ucam_mod *ucam_mod = &rx->bna->ucam_mod;
 807         struct bna_rxf *rxf = &rx->rxf;
 808         struct list_head list_head;
 809         struct list_head *qe;
 810         u8 *mcaddr;
 811         struct bna_mac *mac, *del_mac;
 812         int i;
 813
 814         /* Purge the pending_add_q */
 815         while (!list_empty(&rxf->ucast_pending_add_q)) {
 816                 bfa_q_deq(&rxf->ucast_pending_add_q, &qe);
 817                 bfa_q_qe_init(qe);
 818                 mac = (struct bna_mac *)qe;
 819                 bna_cam_mod_mac_put(&ucam_mod->free_q, mac);
 820         }
 821
 822         /* Schedule active_q entries for deletion */
 823         while (!list_empty(&rxf->ucast_active_q)) {
 824                 bfa_q_deq(&rxf->ucast_active_q, &qe);
 825                 mac = (struct bna_mac *)qe;
 826                 bfa_q_qe_init(&mac->qe);
 827
 828                 del_mac = bna_cam_mod_mac_get(&ucam_mod->del_q);
 829                 memcpy(del_mac, mac, sizeof(*del_mac));
 830                 list_add_tail(&del_mac->qe, &rxf->ucast_pending_del_q);
 831                 bna_cam_mod_mac_put(&ucam_mod->free_q, mac);
 832         }
 833
 834         /* Allocate nodes */
 835         INIT_LIST_HEAD(&list_head);
 836         for (i = 0, mcaddr = uclist; i < count; i++) {
 837                 mac = bna_cam_mod_mac_get(&ucam_mod->free_q);
 838                 if (mac == NULL)
 839                         goto err_return;
 840                 bfa_q_qe_init(&mac->qe);
 841                 ether_addr_copy(mac->addr, mcaddr);
 842                 list_add_tail(&mac->qe, &list_head);
 843                 mcaddr += ETH_ALEN;
 844         }
 845
 846         /* Add the new entries */
 847         while (!list_empty(&list_head)) {
 848                 bfa_q_deq(&list_head, &qe);
 849                 mac = (struct bna_mac *)qe;
 850                 bfa_q_qe_init(&mac->qe);
 851                 list_add_tail(&mac->qe, &rxf->ucast_pending_add_q);
 852         }
 853
 854         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 855
 856         return BNA_CB_SUCCESS;
 857
 858 err_return:
 859         while (!list_empty(&list_head)) {
 860                 bfa_q_deq(&list_head, &qe);
 861                 mac = (struct bna_mac *)qe;
 862                 bfa_q_qe_init(&mac->qe);
 863                 bna_cam_mod_mac_put(&ucam_mod->free_q, mac);
 864         }
 865
 866         return BNA_CB_UCAST_CAM_FULL;
 867 }
 868
 869 enum bna_cb_status
 870 bna_rx_mcast_listset(struct bna_rx *rx, int count, u8 *mclist)
 871 {
 872         struct bna_mcam_mod *mcam_mod = &rx->bna->mcam_mod;
 873         struct bna_rxf *rxf = &rx->rxf;
 874         struct list_head list_head;
 875         struct list_head *qe;
 876         u8 *mcaddr;
 877         struct bna_mac *mac, *del_mac;
 878         int i;
 879
 880         /* Purge the pending_add_q */
 881         while (!list_empty(&rxf->mcast_pending_add_q)) {
 882                 bfa_q_deq(&rxf->mcast_pending_add_q, &qe);
 883                 bfa_q_qe_init(qe);
 884                 mac = (struct bna_mac *)qe;
 885                 bna_cam_mod_mac_put(&mcam_mod->free_q, mac);
 886         }
 887
 888         /* Schedule active_q entries for deletion */
 889         while (!list_empty(&rxf->mcast_active_q)) {
 890                 bfa_q_deq(&rxf->mcast_active_q, &qe);
 891                 mac = (struct bna_mac *)qe;
 892                 bfa_q_qe_init(&mac->qe);
 893
 894                 del_mac = bna_cam_mod_mac_get(&mcam_mod->del_q);
 895
 896                 memcpy(del_mac, mac, sizeof(*del_mac));
 897                 list_add_tail(&del_mac->qe, &rxf->mcast_pending_del_q);
 898                 mac->handle = NULL;
 899                 bna_cam_mod_mac_put(&mcam_mod->free_q, mac);
 900         }
 901
 902         /* Allocate nodes */
 903         INIT_LIST_HEAD(&list_head);
 904         for (i = 0, mcaddr = mclist; i < count; i++) {
 905                 mac = bna_cam_mod_mac_get(&mcam_mod->free_q);
 906                 if (mac == NULL)
 907                         goto err_return;
 908                 bfa_q_qe_init(&mac->qe);
 909                 ether_addr_copy(mac->addr, mcaddr);
 910                 list_add_tail(&mac->qe, &list_head);
 911
 912                 mcaddr += ETH_ALEN;
 913         }
 914
 915         /* Add the new entries */
 916         while (!list_empty(&list_head)) {
 917                 bfa_q_deq(&list_head, &qe);
 918                 mac = (struct bna_mac *)qe;
 919                 bfa_q_qe_init(&mac->qe);
 920                 list_add_tail(&mac->qe, &rxf->mcast_pending_add_q);
 921         }
 922
 923         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 924
 925         return BNA_CB_SUCCESS;
 926
 927 err_return:
 928         while (!list_empty(&list_head)) {
 929                 bfa_q_deq(&list_head, &qe);
 930                 mac = (struct bna_mac *)qe;
 931                 bfa_q_qe_init(&mac->qe);
 932                 bna_cam_mod_mac_put(&mcam_mod->free_q, mac);
 933         }
 934
 935         return BNA_CB_MCAST_LIST_FULL;
 936 }
 937
 938 void
 939 bna_rx_mcast_delall(struct bna_rx *rx)
 940 {
 941         struct bna_rxf *rxf = &rx->rxf;
 942         struct list_head *qe;
 943         struct bna_mac *mac, *del_mac;
 944         int need_hw_config = 0;
 945
 946         /* Purge all entries from pending_add_q */
 947         while (!list_empty(&rxf->mcast_pending_add_q)) {
 948                 bfa_q_deq(&rxf->mcast_pending_add_q, &qe);
 949                 mac = (struct bna_mac *)qe;
 950                 bfa_q_qe_init(&mac->qe);
 951                 bna_cam_mod_mac_put(bna_mcam_mod_free_q(rxf->rx->bna), mac);
 952         }
 953
 954         /* Schedule all entries in active_q for deletion */
 955         while (!list_empty(&rxf->mcast_active_q)) {
 956                 bfa_q_deq(&rxf->mcast_active_q, &qe);
 957                 mac = (struct bna_mac *)qe;
 958                 bfa_q_qe_init(&mac->qe);
 959
 960                 del_mac = bna_cam_mod_mac_get(bna_mcam_mod_del_q(rxf->rx->bna));
 961
 962                 memcpy(del_mac, mac, sizeof(*del_mac));
 963                 list_add_tail(&del_mac->qe, &rxf->mcast_pending_del_q);
 964                 mac->handle = NULL;
 965                 bna_cam_mod_mac_put(bna_mcam_mod_free_q(rxf->rx->bna), mac);
 966                 need_hw_config = 1;
 967         }
 968
 969         if (need_hw_config)
 970                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 971 }
 972
 973 void
 974 bna_rx_vlan_add(struct bna_rx *rx, int vlan_id)
 975 {
 976         struct bna_rxf *rxf = &rx->rxf;
 977         int index = (vlan_id >> BFI_VLAN_WORD_SHIFT);
 978         int bit = BIT((vlan_id & BFI_VLAN_WORD_MASK));
 979         int group_id = (vlan_id >> BFI_VLAN_BLOCK_SHIFT);
 980
 981         rxf->vlan_filter_table[index] |= bit;
 982         if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED) {
 983                 rxf->vlan_pending_bitmask |= BIT(group_id);
 984                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 985         }
 986 }
 987
 988 void
 989 bna_rx_vlan_del(struct bna_rx *rx, int vlan_id)
 990 {
 991         struct bna_rxf *rxf = &rx->rxf;
 992         int index = (vlan_id >> BFI_VLAN_WORD_SHIFT);
 993         int bit = BIT((vlan_id & BFI_VLAN_WORD_MASK));
 994         int group_id = (vlan_id >> BFI_VLAN_BLOCK_SHIFT);
 995
 996         rxf->vlan_filter_table[index] &= ~bit;
 997         if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED) {
 998                 rxf->vlan_pending_bitmask |= BIT(group_id);
 999                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
1000         }
1001 }
1002
1003 static int
1004 bna_rxf_ucast_cfg_apply(struct bna_rxf *rxf)
1005 {
1006         struct bna_mac *mac = NULL;
1007         struct list_head *qe;
1008
1009         /* Delete MAC addresses previousely added */
1010         if (!list_empty(&rxf->ucast_pending_del_q)) {
1011                 bfa_q_deq(&rxf->ucast_pending_del_q, &qe);
1012                 bfa_q_qe_init(qe);
1013                 mac = (struct bna_mac *)qe;
1014                 bna_bfi_ucast_req(rxf, mac, BFI_ENET_H2I_MAC_UCAST_DEL_REQ);
1015                 bna_cam_mod_mac_put(bna_ucam_mod_del_q(rxf->rx->bna), mac);
1016                 return 1;
1017         }
1018
1019         /* Set default unicast MAC */
1020         if (rxf->ucast_pending_set) {
1021                 rxf->ucast_pending_set = 0;
1022                 ether_addr_copy(rxf->ucast_active_mac.addr,
1023                                 rxf->ucast_pending_mac->addr);
1024                 rxf->ucast_active_set = 1;
1025                 bna_bfi_ucast_req(rxf, &rxf->ucast_active_mac,
1026                         BFI_ENET_H2I_MAC_UCAST_SET_REQ);
1027                 return 1;
1028         }
1029
1030         /* Add additional MAC entries */
1031         if (!list_empty(&rxf->ucast_pending_add_q)) {
1032                 bfa_q_deq(&rxf->ucast_pending_add_q, &qe);
1033                 bfa_q_qe_init(qe);
1034                 mac = (struct bna_mac *)qe;
1035                 list_add_tail(&mac->qe, &rxf->ucast_active_q);
1036                 bna_bfi_ucast_req(rxf, mac, BFI_ENET_H2I_MAC_UCAST_ADD_REQ);
1037                 return 1;
1038         }
1039
1040         return 0;
1041 }
1042
1043 static int
1044 bna_rxf_ucast_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
1045 {
1046         struct list_head *qe;
1047         struct bna_mac *mac;
1048
1049         /* Throw away delete pending ucast entries */
1050         while (!list_empty(&rxf->ucast_pending_del_q)) {
1051                 bfa_q_deq(&rxf->ucast_pending_del_q, &qe);
1052                 bfa_q_qe_init(qe);
1053                 mac = (struct bna_mac *)qe;
1054                 if (cleanup == BNA_SOFT_CLEANUP)
1055                         bna_cam_mod_mac_put(bna_ucam_mod_del_q(rxf->rx->bna),
1056                                             mac);
1057                 else {
1058                         bna_bfi_ucast_req(rxf, mac,
1059                                 BFI_ENET_H2I_MAC_UCAST_DEL_REQ);
1060                         bna_cam_mod_mac_put(bna_ucam_mod_del_q(rxf->rx->bna),
1061                                             mac);
1062                         return 1;
1063                 }
1064         }
1065
1066         /* Move active ucast entries to pending_add_q */
1067         while (!list_empty(&rxf->ucast_active_q)) {
1068                 bfa_q_deq(&rxf->ucast_active_q, &qe);
1069                 bfa_q_qe_init(qe);
1070                 list_add_tail(qe, &rxf->ucast_pending_add_q);
1071                 if (cleanup == BNA_HARD_CLEANUP) {
1072                         mac = (struct bna_mac *)qe;
1073                         bna_bfi_ucast_req(rxf, mac,
1074                                 BFI_ENET_H2I_MAC_UCAST_DEL_REQ);
1075                         return 1;
1076                 }
1077         }
1078
1079         if (rxf->ucast_active_set) {
1080                 rxf->ucast_pending_set = 1;
1081                 rxf->ucast_active_set = 0;
1082                 if (cleanup == BNA_HARD_CLEANUP) {
1083                         bna_bfi_ucast_req(rxf, &rxf->ucast_active_mac,
1084                                 BFI_ENET_H2I_MAC_UCAST_CLR_REQ);
1085                         return 1;
1086                 }
1087         }
1088
1089         return 0;
1090 }
1091
1092 static int
1093 bna_rxf_promisc_cfg_apply(struct bna_rxf *rxf)
1094 {
1095         struct bna *bna = rxf->rx->bna;
1096
1097         /* Enable/disable promiscuous mode */
1098         if (is_promisc_enable(rxf->rxmode_pending,
1099                                 rxf->rxmode_pending_bitmask)) {
1100                 /* move promisc configuration from pending -> active */
1101                 promisc_inactive(rxf->rxmode_pending,
1102                                 rxf->rxmode_pending_bitmask);
1103                 rxf->rxmode_active |= BNA_RXMODE_PROMISC;
1104                 bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_ENABLED);
1105                 return 1;
1106         } else if (is_promisc_disable(rxf->rxmode_pending,
1107                                 rxf->rxmode_pending_bitmask)) {
1108                 /* move promisc configuration from pending -> active */
1109                 promisc_inactive(rxf->rxmode_pending,
1110                                 rxf->rxmode_pending_bitmask);
1111                 rxf->rxmode_active &= ~BNA_RXMODE_PROMISC;
1112                 bna->promisc_rid = BFI_INVALID_RID;
1113                 bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_DISABLED);
1114                 return 1;
1115         }
1116
1117         return 0;
1118 }
1119
1120 static int
1121 bna_rxf_promisc_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
1122 {
1123         struct bna *bna = rxf->rx->bna;
1124
1125         /* Clear pending promisc mode disable */
1126         if (is_promisc_disable(rxf->rxmode_pending,
1127                                 rxf->rxmode_pending_bitmask)) {
1128                 promisc_inactive(rxf->rxmode_pending,
1129                                 rxf->rxmode_pending_bitmask);
1130                 rxf->rxmode_active &= ~BNA_RXMODE_PROMISC;
1131                 bna->promisc_rid = BFI_INVALID_RID;
1132                 if (cleanup == BNA_HARD_CLEANUP) {
1133                         bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_DISABLED);
1134                         return 1;
1135                 }
1136         }
1137
1138         /* Move promisc mode config from active -> pending */
1139         if (rxf->rxmode_active & BNA_RXMODE_PROMISC) {
1140                 promisc_enable(rxf->rxmode_pending,
1141                                 rxf->rxmode_pending_bitmask);
1142                 rxf->rxmode_active &= ~BNA_RXMODE_PROMISC;
1143                 if (cleanup == BNA_HARD_CLEANUP) {
1144                         bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_DISABLED);
1145                         return 1;
1146                 }
1147         }
1148
1149         return 0;
1150 }
1151
1152 static int
1153 bna_rxf_allmulti_cfg_apply(struct bna_rxf *rxf)
1154 {
1155         /* Enable/disable allmulti mode */
1156         if (is_allmulti_enable(rxf->rxmode_pending,
1157                                 rxf->rxmode_pending_bitmask)) {
1158                 /* move allmulti configuration from pending -> active */
1159                 allmulti_inactive(rxf->rxmode_pending,
1160                                 rxf->rxmode_pending_bitmask);
1161                 rxf->rxmode_active |= BNA_RXMODE_ALLMULTI;
1162                 bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_DISABLED);
1163                 return 1;
1164         } else if (is_allmulti_disable(rxf->rxmode_pending,
1165                                         rxf->rxmode_pending_bitmask)) {
1166                 /* move allmulti configuration from pending -> active */
1167                 allmulti_inactive(rxf->rxmode_pending,
1168                                 rxf->rxmode_pending_bitmask);
1169                 rxf->rxmode_active &= ~BNA_RXMODE_ALLMULTI;
1170                 bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_ENABLED);
1171                 return 1;
1172         }
1173
1174         return 0;
1175 }
1176
1177 static int
1178 bna_rxf_allmulti_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
1179 {
1180         /* Clear pending allmulti mode disable */
1181         if (is_allmulti_disable(rxf->rxmode_pending,
1182                                 rxf->rxmode_pending_bitmask)) {
1183                 allmulti_inactive(rxf->rxmode_pending,
1184                                 rxf->rxmode_pending_bitmask);
1185                 rxf->rxmode_active &= ~BNA_RXMODE_ALLMULTI;
1186                 if (cleanup == BNA_HARD_CLEANUP) {
1187                         bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_ENABLED);
1188                         return 1;
1189                 }
1190         }
1191
1192         /* Move allmulti mode config from active -> pending */
1193         if (rxf->rxmode_active & BNA_RXMODE_ALLMULTI) {
1194                 allmulti_enable(rxf->rxmode_pending,
1195                                 rxf->rxmode_pending_bitmask);
1196                 rxf->rxmode_active &= ~BNA_RXMODE_ALLMULTI;
1197                 if (cleanup == BNA_HARD_CLEANUP) {
1198                         bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_ENABLED);
1199                         return 1;
1200                 }
1201         }
1202
1203         return 0;
1204 }
1205
1206 static int
1207 bna_rxf_promisc_enable(struct bna_rxf *rxf)
1208 {
1209         struct bna *bna = rxf->rx->bna;
1210         int ret = 0;
1211
1212         if (is_promisc_enable(rxf->rxmode_pending,
1213                                 rxf->rxmode_pending_bitmask) ||
1214                 (rxf->rxmode_active & BNA_RXMODE_PROMISC)) {
1215                 /* Do nothing if pending enable or already enabled */
1216         } else if (is_promisc_disable(rxf->rxmode_pending,
1217                                         rxf->rxmode_pending_bitmask)) {
1218                 /* Turn off pending disable command */
1219                 promisc_inactive(rxf->rxmode_pending,
1220                         rxf->rxmode_pending_bitmask);
1221         } else {
1222                 /* Schedule enable */
1223                 promisc_enable(rxf->rxmode_pending,
1224                                 rxf->rxmode_pending_bitmask);
1225                 bna->promisc_rid = rxf->rx->rid;
1226                 ret = 1;
1227         }
1228
1229         return ret;
1230 }
1231
1232 static int
1233 bna_rxf_promisc_disable(struct bna_rxf *rxf)
1234 {
1235         struct bna *bna = rxf->rx->bna;
1236         int ret = 0;
1237
1238         if (is_promisc_disable(rxf->rxmode_pending,
1239                                 rxf->rxmode_pending_bitmask) ||
1240                 (!(rxf->rxmode_active & BNA_RXMODE_PROMISC))) {
1241                 /* Do nothing if pending disable or already disabled */
1242         } else if (is_promisc_enable(rxf->rxmode_pending,
1243                                         rxf->rxmode_pending_bitmask)) {
1244                 /* Turn off pending enable command */
1245                 promisc_inactive(rxf->rxmode_pending,
1246                                 rxf->rxmode_pending_bitmask);
1247                 bna->promisc_rid = BFI_INVALID_RID;
1248         } else if (rxf->rxmode_active & BNA_RXMODE_PROMISC) {
1249                 /* Schedule disable */
1250                 promisc_disable(rxf->rxmode_pending,
1251                                 rxf->rxmode_pending_bitmask);
1252                 ret = 1;
1253         }
1254
1255         return ret;
1256 }
1257
1258 static int
1259 bna_rxf_allmulti_enable(struct bna_rxf *rxf)
1260 {
1261         int ret = 0;
1262
1263         if (is_allmulti_enable(rxf->rxmode_pending,
1264                         rxf->rxmode_pending_bitmask) ||
1265                         (rxf->rxmode_active & BNA_RXMODE_ALLMULTI)) {
1266                 /* Do nothing if pending enable or already enabled */
1267         } else if (is_allmulti_disable(rxf->rxmode_pending,
1268                                         rxf->rxmode_pending_bitmask)) {
1269                 /* Turn off pending disable command */
1270                 allmulti_inactive(rxf->rxmode_pending,
1271                         rxf->rxmode_pending_bitmask);
1272         } else {
1273                 /* Schedule enable */
1274                 allmulti_enable(rxf->rxmode_pending,
1275                                 rxf->rxmode_pending_bitmask);
1276                 ret = 1;
1277         }
1278
1279         return ret;
1280 }
1281
1282 static int
1283 bna_rxf_allmulti_disable(struct bna_rxf *rxf)
1284 {
1285         int ret = 0;
1286
1287         if (is_allmulti_disable(rxf->rxmode_pending,
1288                                 rxf->rxmode_pending_bitmask) ||
1289                 (!(rxf->rxmode_active & BNA_RXMODE_ALLMULTI))) {
1290                 /* Do nothing if pending disable or already disabled */
1291         } else if (is_allmulti_enable(rxf->rxmode_pending,
1292                                         rxf->rxmode_pending_bitmask)) {
1293                 /* Turn off pending enable command */
1294                 allmulti_inactive(rxf->rxmode_pending,
1295                                 rxf->rxmode_pending_bitmask);
1296         } else if (rxf->rxmode_active & BNA_RXMODE_ALLMULTI) {
1297                 /* Schedule disable */
1298                 allmulti_disable(rxf->rxmode_pending,
1299                                 rxf->rxmode_pending_bitmask);
1300                 ret = 1;
1301         }
1302
1303         return ret;
1304 }
1305
1306 static int
1307 bna_rxf_vlan_strip_cfg_apply(struct bna_rxf *rxf)
1308 {
1309         if (rxf->vlan_strip_pending) {
1310                         rxf->vlan_strip_pending = false;
1311                         bna_bfi_vlan_strip_enable(rxf);
1312                         return 1;
1313         }
1314
1315         return 0;
1316 }
1317
1318 /* RX */
1319
1320 #define BNA_GET_RXQS(qcfg)      (((qcfg)->rxp_type == BNA_RXP_SINGLE) ? \
1321         (qcfg)->num_paths : ((qcfg)->num_paths * 2))
1322
1323 #define SIZE_TO_PAGES(size)     (((size) >> PAGE_SHIFT) + ((((size) &\
1324         (PAGE_SIZE - 1)) + (PAGE_SIZE - 1)) >> PAGE_SHIFT))
1325
1326 #define call_rx_stop_cbfn(rx)                                           \
1327 do {                                                                \
1328         if ((rx)->stop_cbfn) {                                          \
1329                 void (*cbfn)(void *, struct bna_rx *);    \
1330                 void *cbarg;                                        \
1331                 cbfn = (rx)->stop_cbfn;                          \
1332                 cbarg = (rx)->stop_cbarg;                              \
1333                 (rx)->stop_cbfn = NULL;                                 \
1334                 (rx)->stop_cbarg = NULL;                                \
1335                 cbfn(cbarg, rx);                                        \
1336         }                                                              \
1337 } while (0)
1338
1339 #define call_rx_stall_cbfn(rx)                                          \
1340 do {                                                                    \
1341         if ((rx)->rx_stall_cbfn)                                        \
1342                 (rx)->rx_stall_cbfn((rx)->bna->bnad, (rx));             \
1343 } while (0)
1344
1345 #define bfi_enet_datapath_q_init(bfi_q, bna_qpt)                        \
1346 do {                                                                    \
1347         struct bna_dma_addr cur_q_addr =                                \
1348                 *((struct bna_dma_addr *)((bna_qpt)->kv_qpt_ptr));      \
1349         (bfi_q)->pg_tbl.a32.addr_lo = (bna_qpt)->hw_qpt_ptr.lsb;        \
1350         (bfi_q)->pg_tbl.a32.addr_hi = (bna_qpt)->hw_qpt_ptr.msb;        \
1351         (bfi_q)->first_entry.a32.addr_lo = cur_q_addr.lsb;              \
1352         (bfi_q)->first_entry.a32.addr_hi = cur_q_addr.msb;              \
1353         (bfi_q)->pages = htons((u16)(bna_qpt)->page_count);     \
1354         (bfi_q)->page_sz = htons((u16)(bna_qpt)->page_size);\
1355 } while (0)
1356
1357 static void bna_bfi_rx_enet_start(struct bna_rx *rx);
1358 static void bna_rx_enet_stop(struct bna_rx *rx);
1359 static void bna_rx_mod_cb_rx_stopped(void *arg, struct bna_rx *rx);
1360
1361 bfa_fsm_state_decl(bna_rx, stopped,
1362         struct bna_rx, enum bna_rx_event);
1363 bfa_fsm_state_decl(bna_rx, start_wait,
1364         struct bna_rx, enum bna_rx_event);
1365 bfa_fsm_state_decl(bna_rx, start_stop_wait,
1366         struct bna_rx, enum bna_rx_event);
1367 bfa_fsm_state_decl(bna_rx, rxf_start_wait,
1368         struct bna_rx, enum bna_rx_event);
1369 bfa_fsm_state_decl(bna_rx, started,
1370         struct bna_rx, enum bna_rx_event);
1371 bfa_fsm_state_decl(bna_rx, rxf_stop_wait,
1372         struct bna_rx, enum bna_rx_event);
1373 bfa_fsm_state_decl(bna_rx, stop_wait,
1374         struct bna_rx, enum bna_rx_event);
1375 bfa_fsm_state_decl(bna_rx, cleanup_wait,
1376         struct bna_rx, enum bna_rx_event);
1377 bfa_fsm_state_decl(bna_rx, failed,
1378         struct bna_rx, enum bna_rx_event);
1379 bfa_fsm_state_decl(bna_rx, quiesce_wait,
1380         struct bna_rx, enum bna_rx_event);
1381
1382 static void bna_rx_sm_stopped_entry(struct bna_rx *rx)
1383 {
1384         call_rx_stop_cbfn(rx);
1385 }
1386
1387 static void bna_rx_sm_stopped(struct bna_rx *rx,
1388                                 enum bna_rx_event event)
1389 {
1390         switch (event) {
1391         case RX_E_START:
1392                 bfa_fsm_set_state(rx, bna_rx_sm_start_wait);
1393                 break;
1394
1395         case RX_E_STOP:
1396                 call_rx_stop_cbfn(rx);
1397                 break;
1398
1399         case RX_E_FAIL:
1400                 /* no-op */
1401                 break;
1402
1403         default:
1404                 bfa_sm_fault(event);
1405                 break;
1406         }
1407 }
1408
1409 static void bna_rx_sm_start_wait_entry(struct bna_rx *rx)
1410 {
1411         bna_bfi_rx_enet_start(rx);
1412 }
1413
1414 static void
1415 bna_rx_sm_stop_wait_entry(struct bna_rx *rx)
1416 {
1417 }
1418
1419 static void
1420 bna_rx_sm_stop_wait(struct bna_rx *rx, enum bna_rx_event event)
1421 {
1422         switch (event) {
1423         case RX_E_FAIL:
1424         case RX_E_STOPPED:
1425                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1426                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1427                 break;
1428
1429         case RX_E_STARTED:
1430                 bna_rx_enet_stop(rx);
1431                 break;
1432
1433         default:
1434                 bfa_sm_fault(event);
1435                 break;
1436         }
1437 }
1438
1439 static void bna_rx_sm_start_wait(struct bna_rx *rx,
1440                                 enum bna_rx_event event)
1441 {
1442         switch (event) {
1443         case RX_E_STOP:
1444                 bfa_fsm_set_state(rx, bna_rx_sm_start_stop_wait);
1445                 break;
1446
1447         case RX_E_FAIL:
1448                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1449                 break;
1450
1451         case RX_E_STARTED:
1452                 bfa_fsm_set_state(rx, bna_rx_sm_rxf_start_wait);
1453                 break;
1454
1455         default:
1456                 bfa_sm_fault(event);
1457                 break;
1458         }
1459 }
1460
1461 static void bna_rx_sm_rxf_start_wait_entry(struct bna_rx *rx)
1462 {
1463         rx->rx_post_cbfn(rx->bna->bnad, rx);
1464         bna_rxf_start(&rx->rxf);
1465 }
1466
1467 static void
1468 bna_rx_sm_rxf_stop_wait_entry(struct bna_rx *rx)
1469 {
1470 }
1471
1472 static void
1473 bna_rx_sm_rxf_stop_wait(struct bna_rx *rx, enum bna_rx_event event)
1474 {
1475         switch (event) {
1476         case RX_E_FAIL:
1477                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1478                 bna_rxf_fail(&rx->rxf);
1479                 call_rx_stall_cbfn(rx);
1480                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1481                 break;
1482
1483         case RX_E_RXF_STARTED:
1484                 bna_rxf_stop(&rx->rxf);
1485                 break;
1486
1487         case RX_E_RXF_STOPPED:
1488                 bfa_fsm_set_state(rx, bna_rx_sm_stop_wait);
1489                 call_rx_stall_cbfn(rx);
1490                 bna_rx_enet_stop(rx);
1491                 break;
1492
1493         default:
1494                 bfa_sm_fault(event);
1495                 break;
1496         }
1497
1498 }
1499
1500 static void
1501 bna_rx_sm_start_stop_wait_entry(struct bna_rx *rx)
1502 {
1503 }
1504
1505 static void
1506 bna_rx_sm_start_stop_wait(struct bna_rx *rx, enum bna_rx_event event)
1507 {
1508         switch (event) {
1509         case RX_E_FAIL:
1510         case RX_E_STOPPED:
1511                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1512                 break;
1513
1514         case RX_E_STARTED:
1515                 bna_rx_enet_stop(rx);
1516                 break;
1517
1518         default:
1519                 bfa_sm_fault(event);
1520         }
1521 }
1522
1523 static void
1524 bna_rx_sm_started_entry(struct bna_rx *rx)
1525 {
1526         struct bna_rxp *rxp;
1527         struct list_head *qe_rxp;
1528         int is_regular = (rx->type == BNA_RX_T_REGULAR);
1529
1530         /* Start IB */
1531         list_for_each(qe_rxp, &rx->rxp_q) {
1532                 rxp = (struct bna_rxp *)qe_rxp;
1533                 bna_ib_start(rx->bna, &rxp->cq.ib, is_regular);
1534         }
1535
1536         bna_ethport_cb_rx_started(&rx->bna->ethport);
1537 }
1538
1539 static void
1540 bna_rx_sm_started(struct bna_rx *rx, enum bna_rx_event event)
1541 {
1542         switch (event) {
1543         case RX_E_STOP:
1544                 bfa_fsm_set_state(rx, bna_rx_sm_rxf_stop_wait);
1545                 bna_ethport_cb_rx_stopped(&rx->bna->ethport);
1546                 bna_rxf_stop(&rx->rxf);
1547                 break;
1548
1549         case RX_E_FAIL:
1550                 bfa_fsm_set_state(rx, bna_rx_sm_failed);
1551                 bna_ethport_cb_rx_stopped(&rx->bna->ethport);
1552                 bna_rxf_fail(&rx->rxf);
1553                 call_rx_stall_cbfn(rx);
1554                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1555                 break;
1556
1557         default:
1558                 bfa_sm_fault(event);
1559                 break;
1560         }
1561 }
1562
1563 static void bna_rx_sm_rxf_start_wait(struct bna_rx *rx,
1564                                 enum bna_rx_event event)
1565 {
1566         switch (event) {
1567         case RX_E_STOP:
1568                 bfa_fsm_set_state(rx, bna_rx_sm_rxf_stop_wait);
1569                 break;
1570
1571         case RX_E_FAIL:
1572                 bfa_fsm_set_state(rx, bna_rx_sm_failed);
1573                 bna_rxf_fail(&rx->rxf);
1574                 call_rx_stall_cbfn(rx);
1575                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1576                 break;
1577
1578         case RX_E_RXF_STARTED:
1579                 bfa_fsm_set_state(rx, bna_rx_sm_started);
1580                 break;
1581
1582         default:
1583                 bfa_sm_fault(event);
1584                 break;
1585         }
1586 }
1587
1588 static void
1589 bna_rx_sm_cleanup_wait_entry(struct bna_rx *rx)
1590 {
1591 }
1592
1593 static void
1594 bna_rx_sm_cleanup_wait(struct bna_rx *rx, enum bna_rx_event event)
1595 {
1596         switch (event) {
1597         case RX_E_FAIL:
1598         case RX_E_RXF_STOPPED:
1599                 /* No-op */
1600                 break;
1601
1602         case RX_E_CLEANUP_DONE:
1603                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1604                 break;
1605
1606         default:
1607                 bfa_sm_fault(event);
1608                 break;
1609         }
1610 }
1611
1612 static void
1613 bna_rx_sm_failed_entry(struct bna_rx *rx)
1614 {
1615 }
1616
1617 static void
1618 bna_rx_sm_failed(struct bna_rx *rx, enum bna_rx_event event)
1619 {
1620         switch (event) {
1621         case RX_E_START:
1622                 bfa_fsm_set_state(rx, bna_rx_sm_quiesce_wait);
1623                 break;
1624
1625         case RX_E_STOP:
1626                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1627                 break;
1628
1629         case RX_E_FAIL:
1630         case RX_E_RXF_STARTED:
1631         case RX_E_RXF_STOPPED:
1632                 /* No-op */
1633                 break;
1634
1635         case RX_E_CLEANUP_DONE:
1636                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1637                 break;
1638
1639         default:
1640                 bfa_sm_fault(event);
1641                 break;
1642 }       }
1643
1644 static void
1645 bna_rx_sm_quiesce_wait_entry(struct bna_rx *rx)
1646 {
1647 }
1648
1649 static void
1650 bna_rx_sm_quiesce_wait(struct bna_rx *rx, enum bna_rx_event event)
1651 {
1652         switch (event) {
1653         case RX_E_STOP:
1654                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1655                 break;
1656
1657         case RX_E_FAIL:
1658                 bfa_fsm_set_state(rx, bna_rx_sm_failed);
1659                 break;
1660
1661         case RX_E_CLEANUP_DONE:
1662                 bfa_fsm_set_state(rx, bna_rx_sm_start_wait);
1663                 break;
1664
1665         default:
1666                 bfa_sm_fault(event);
1667                 break;
1668         }
1669 }
1670
1671 static void
1672 bna_bfi_rx_enet_start(struct bna_rx *rx)
1673 {
1674         struct bfi_enet_rx_cfg_req *cfg_req = &rx->bfi_enet_cmd.cfg_req;
1675         struct bna_rxp *rxp = NULL;
1676         struct bna_rxq *q0 = NULL, *q1 = NULL;
1677         struct list_head *rxp_qe;
1678         int i;
1679
1680         bfi_msgq_mhdr_set(cfg_req->mh, BFI_MC_ENET,
1681                 BFI_ENET_H2I_RX_CFG_SET_REQ, 0, rx->rid);
1682         cfg_req->mh.num_entries = htons(
1683                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rx_cfg_req)));
1684
1685         cfg_req->rx_cfg.frame_size = bna_enet_mtu_get(&rx->bna->enet);
1686         cfg_req->num_queue_sets = rx->num_paths;
1687         for (i = 0, rxp_qe = bfa_q_first(&rx->rxp_q);
1688                 i < rx->num_paths;
1689                 i++, rxp_qe = bfa_q_next(rxp_qe)) {
1690                 rxp = (struct bna_rxp *)rxp_qe;
1691
1692                 GET_RXQS(rxp, q0, q1);
1693                 switch (rxp->type) {
1694                 case BNA_RXP_SLR:
1695                 case BNA_RXP_HDS:
1696                         /* Small RxQ */
1697                         bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].qs.q,
1698                                                 &q1->qpt);
1699                         cfg_req->q_cfg[i].qs.rx_buffer_size =
1700                                 htons((u16)q1->buffer_size);
1701                         /* Fall through */
1702
1703                 case BNA_RXP_SINGLE:
1704                         /* Large/Single RxQ */
1705                         bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].ql.q,
1706                                                 &q0->qpt);
1707                         if (q0->multi_buffer)
1708                                 /* multi-buffer is enabled by allocating
1709                                  * a new rx with new set of resources.
1710                                  * q0->buffer_size should be initialized to
1711                                  * fragment size.
1712                                  */
1713                                 cfg_req->rx_cfg.multi_buffer =
1714                                         BNA_STATUS_T_ENABLED;
1715                         else
1716                                 q0->buffer_size =
1717                                         bna_enet_mtu_get(&rx->bna->enet);
1718                         cfg_req->q_cfg[i].ql.rx_buffer_size =
1719                                 htons((u16)q0->buffer_size);
1720                         break;
1721
1722                 default:
1723                         BUG_ON(1);
1724                 }
1725
1726                 bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].cq.q,
1727                                         &rxp->cq.qpt);
1728
1729                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_lo =
1730                         rxp->cq.ib.ib_seg_host_addr.lsb;
1731                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_hi =
1732                         rxp->cq.ib.ib_seg_host_addr.msb;
1733                 cfg_req->q_cfg[i].ib.intr.msix_index =
1734                         htons((u16)rxp->cq.ib.intr_vector);
1735         }
1736
1737         cfg_req->ib_cfg.int_pkt_dma = BNA_STATUS_T_DISABLED;
1738         cfg_req->ib_cfg.int_enabled = BNA_STATUS_T_ENABLED;
1739         cfg_req->ib_cfg.int_pkt_enabled = BNA_STATUS_T_DISABLED;
1740         cfg_req->ib_cfg.continuous_coalescing = BNA_STATUS_T_DISABLED;
1741         cfg_req->ib_cfg.msix = (rxp->cq.ib.intr_type == BNA_INTR_T_MSIX)
1742                                 ? BNA_STATUS_T_ENABLED :
1743                                 BNA_STATUS_T_DISABLED;
1744         cfg_req->ib_cfg.coalescing_timeout =
1745                         htonl((u32)rxp->cq.ib.coalescing_timeo);
1746         cfg_req->ib_cfg.inter_pkt_timeout =
1747                         htonl((u32)rxp->cq.ib.interpkt_timeo);
1748         cfg_req->ib_cfg.inter_pkt_count = (u8)rxp->cq.ib.interpkt_count;
1749
1750         switch (rxp->type) {
1751         case BNA_RXP_SLR:
1752                 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_LARGE_SMALL;
1753                 break;
1754
1755         case BNA_RXP_HDS:
1756                 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_HDS;
1757                 cfg_req->rx_cfg.hds.type = rx->hds_cfg.hdr_type;
1758                 cfg_req->rx_cfg.hds.force_offset = rx->hds_cfg.forced_offset;
1759                 cfg_req->rx_cfg.hds.max_header_size = rx->hds_cfg.forced_offset;
1760                 break;
1761
1762         case BNA_RXP_SINGLE:
1763                 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_SINGLE;
1764                 break;
1765
1766         default:
1767                 BUG_ON(1);
1768         }
1769         cfg_req->rx_cfg.strip_vlan = rx->rxf.vlan_strip_status;
1770
1771         bfa_msgq_cmd_set(&rx->msgq_cmd, NULL, NULL,
1772                 sizeof(struct bfi_enet_rx_cfg_req), &cfg_req->mh);
1773         bfa_msgq_cmd_post(&rx->bna->msgq, &rx->msgq_cmd);
1774 }
1775
1776 static void
1777 bna_bfi_rx_enet_stop(struct bna_rx *rx)
1778 {
1779         struct bfi_enet_req *req = &rx->bfi_enet_cmd.req;
1780
1781         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
1782                 BFI_ENET_H2I_RX_CFG_CLR_REQ, 0, rx->rid);
1783         req->mh.num_entries = htons(
1784                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_req)));
1785         bfa_msgq_cmd_set(&rx->msgq_cmd, NULL, NULL, sizeof(struct bfi_enet_req),
1786                 &req->mh);
1787         bfa_msgq_cmd_post(&rx->bna->msgq, &rx->msgq_cmd);
1788 }
1789
1790 static void
1791 bna_rx_enet_stop(struct bna_rx *rx)
1792 {
1793         struct bna_rxp *rxp;
1794         struct list_head                 *qe_rxp;
1795
1796         /* Stop IB */
1797         list_for_each(qe_rxp, &rx->rxp_q) {
1798                 rxp = (struct bna_rxp *)qe_rxp;
1799                 bna_ib_stop(rx->bna, &rxp->cq.ib);
1800         }
1801
1802         bna_bfi_rx_enet_stop(rx);
1803 }
1804
1805 static int
1806 bna_rx_res_check(struct bna_rx_mod *rx_mod, struct bna_rx_config *rx_cfg)
1807 {
1808         if ((rx_mod->rx_free_count == 0) ||
1809                 (rx_mod->rxp_free_count == 0) ||
1810                 (rx_mod->rxq_free_count == 0))
1811                 return 0;
1812
1813         if (rx_cfg->rxp_type == BNA_RXP_SINGLE) {
1814                 if ((rx_mod->rxp_free_count < rx_cfg->num_paths) ||
1815                         (rx_mod->rxq_free_count < rx_cfg->num_paths))
1816                                 return 0;
1817         } else {
1818                 if ((rx_mod->rxp_free_count < rx_cfg->num_paths) ||
1819                         (rx_mod->rxq_free_count < (2 * rx_cfg->num_paths)))
1820                         return 0;
1821         }
1822
1823         return 1;
1824 }
1825
1826 static struct bna_rxq *
1827 bna_rxq_get(struct bna_rx_mod *rx_mod)
1828 {
1829         struct bna_rxq *rxq = NULL;
1830         struct list_head        *qe = NULL;
1831
1832         bfa_q_deq(&rx_mod->rxq_free_q, &qe);
1833         rx_mod->rxq_free_count--;
1834         rxq = (struct bna_rxq *)qe;
1835         bfa_q_qe_init(&rxq->qe);
1836
1837         return rxq;
1838 }
1839
1840 static void
1841 bna_rxq_put(struct bna_rx_mod *rx_mod, struct bna_rxq *rxq)
1842 {
1843         bfa_q_qe_init(&rxq->qe);
1844         list_add_tail(&rxq->qe, &rx_mod->rxq_free_q);
1845         rx_mod->rxq_free_count++;
1846 }
1847
1848 static struct bna_rxp *
1849 bna_rxp_get(struct bna_rx_mod *rx_mod)
1850 {
1851         struct list_head        *qe = NULL;
1852         struct bna_rxp *rxp = NULL;
1853
1854         bfa_q_deq(&rx_mod->rxp_free_q, &qe);
1855         rx_mod->rxp_free_count--;
1856         rxp = (struct bna_rxp *)qe;
1857         bfa_q_qe_init(&rxp->qe);
1858
1859         return rxp;
1860 }
1861
1862 static void
1863 bna_rxp_put(struct bna_rx_mod *rx_mod, struct bna_rxp *rxp)
1864 {
1865         bfa_q_qe_init(&rxp->qe);
1866         list_add_tail(&rxp->qe, &rx_mod->rxp_free_q);
1867         rx_mod->rxp_free_count++;
1868 }
1869
1870 static struct bna_rx *
1871 bna_rx_get(struct bna_rx_mod *rx_mod, enum bna_rx_type type)
1872 {
1873         struct list_head        *qe = NULL;
1874         struct bna_rx *rx = NULL;
1875
1876         if (type == BNA_RX_T_REGULAR) {
1877                 bfa_q_deq(&rx_mod->rx_free_q, &qe);
1878         } else
1879                 bfa_q_deq_tail(&rx_mod->rx_free_q, &qe);
1880
1881         rx_mod->rx_free_count--;
1882         rx = (struct bna_rx *)qe;
1883         bfa_q_qe_init(&rx->qe);
1884         list_add_tail(&rx->qe, &rx_mod->rx_active_q);
1885         rx->type = type;
1886
1887         return rx;
1888 }
1889
1890 static void
1891 bna_rx_put(struct bna_rx_mod *rx_mod, struct bna_rx *rx)
1892 {
1893         struct list_head *prev_qe = NULL;
1894         struct list_head *qe;
1895
1896         bfa_q_qe_init(&rx->qe);
1897
1898         list_for_each(qe, &rx_mod->rx_free_q) {
1899                 if (((struct bna_rx *)qe)->rid < rx->rid)
1900                         prev_qe = qe;
1901                 else
1902                         break;
1903         }
1904
1905         if (prev_qe == NULL) {
1906                 /* This is the first entry */
1907                 bfa_q_enq_head(&rx_mod->rx_free_q, &rx->qe);
1908         } else if (bfa_q_next(prev_qe) == &rx_mod->rx_free_q) {
1909                 /* This is the last entry */
1910                 list_add_tail(&rx->qe, &rx_mod->rx_free_q);
1911         } else {
1912                 /* Somewhere in the middle */
1913                 bfa_q_next(&rx->qe) = bfa_q_next(prev_qe);
1914                 bfa_q_prev(&rx->qe) = prev_qe;
1915                 bfa_q_next(prev_qe) = &rx->qe;
1916                 bfa_q_prev(bfa_q_next(&rx->qe)) = &rx->qe;
1917         }
1918
1919         rx_mod->rx_free_count++;
1920 }
1921
1922 static void
1923 bna_rxp_add_rxqs(struct bna_rxp *rxp, struct bna_rxq *q0,
1924                 struct bna_rxq *q1)
1925 {
1926         switch (rxp->type) {
1927         case BNA_RXP_SINGLE:
1928                 rxp->rxq.single.only = q0;
1929                 rxp->rxq.single.reserved = NULL;
1930                 break;
1931         case BNA_RXP_SLR:
1932                 rxp->rxq.slr.large = q0;
1933                 rxp->rxq.slr.small = q1;
1934                 break;
1935         case BNA_RXP_HDS:
1936                 rxp->rxq.hds.data = q0;
1937                 rxp->rxq.hds.hdr = q1;
1938                 break;
1939         default:
1940                 break;
1941         }
1942 }
1943
1944 static void
1945 bna_rxq_qpt_setup(struct bna_rxq *rxq,
1946                 struct bna_rxp *rxp,
1947                 u32 page_count,
1948                 u32 page_size,
1949                 struct bna_mem_descr *qpt_mem,
1950                 struct bna_mem_descr *swqpt_mem,
1951                 struct bna_mem_descr *page_mem)
1952 {
1953         u8 *kva;
1954         u64 dma;
1955         struct bna_dma_addr bna_dma;
1956         int     i;
1957
1958         rxq->qpt.hw_qpt_ptr.lsb = qpt_mem->dma.lsb;
1959         rxq->qpt.hw_qpt_ptr.msb = qpt_mem->dma.msb;
1960         rxq->qpt.kv_qpt_ptr = qpt_mem->kva;
1961         rxq->qpt.page_count = page_count;
1962         rxq->qpt.page_size = page_size;
1963
1964         rxq->rcb->sw_qpt = (void **) swqpt_mem->kva;
1965         rxq->rcb->sw_q = page_mem->kva;
1966
1967         kva = page_mem->kva;
1968         BNA_GET_DMA_ADDR(&page_mem->dma, dma);
1969
1970         for (i = 0; i < rxq->qpt.page_count; i++) {
1971                 rxq->rcb->sw_qpt[i] = kva;
1972                 kva += PAGE_SIZE;
1973
1974                 BNA_SET_DMA_ADDR(dma, &bna_dma);
1975                 ((struct bna_dma_addr *)rxq->qpt.kv_qpt_ptr)[i].lsb =
1976                         bna_dma.lsb;
1977                 ((struct bna_dma_addr *)rxq->qpt.kv_qpt_ptr)[i].msb =
1978                         bna_dma.msb;
1979                 dma += PAGE_SIZE;
1980         }
1981 }
1982
1983 static void
1984 bna_rxp_cqpt_setup(struct bna_rxp *rxp,
1985                 u32 page_count,
1986                 u32 page_size,
1987                 struct bna_mem_descr *qpt_mem,
1988                 struct bna_mem_descr *swqpt_mem,
1989                 struct bna_mem_descr *page_mem)
1990 {
1991         u8 *kva;
1992         u64 dma;
1993         struct bna_dma_addr bna_dma;
1994         int     i;
1995
1996         rxp->cq.qpt.hw_qpt_ptr.lsb = qpt_mem->dma.lsb;
1997         rxp->cq.qpt.hw_qpt_ptr.msb = qpt_mem->dma.msb;
1998         rxp->cq.qpt.kv_qpt_ptr = qpt_mem->kva;
1999         rxp->cq.qpt.page_count = page_count;
2000         rxp->cq.qpt.page_size = page_size;
2001
2002         rxp->cq.ccb->sw_qpt = (void **) swqpt_mem->kva;
2003         rxp->cq.ccb->sw_q = page_mem->kva;
2004
2005         kva = page_mem->kva;
2006         BNA_GET_DMA_ADDR(&page_mem->dma, dma);
2007
2008         for (i = 0; i < rxp->cq.qpt.page_count; i++) {
2009                 rxp->cq.ccb->sw_qpt[i] = kva;
2010                 kva += PAGE_SIZE;
2011
2012                 BNA_SET_DMA_ADDR(dma, &bna_dma);
2013                 ((struct bna_dma_addr *)rxp->cq.qpt.kv_qpt_ptr)[i].lsb =
2014                         bna_dma.lsb;
2015                 ((struct bna_dma_addr *)rxp->cq.qpt.kv_qpt_ptr)[i].msb =
2016                         bna_dma.msb;
2017                 dma += PAGE_SIZE;
2018         }
2019 }
2020
2021 static void
2022 bna_rx_mod_cb_rx_stopped(void *arg, struct bna_rx *rx)
2023 {
2024         struct bna_rx_mod *rx_mod = (struct bna_rx_mod *)arg;
2025
2026         bfa_wc_down(&rx_mod->rx_stop_wc);
2027 }
2028
2029 static void
2030 bna_rx_mod_cb_rx_stopped_all(void *arg)
2031 {
2032         struct bna_rx_mod *rx_mod = (struct bna_rx_mod *)arg;
2033
2034         if (rx_mod->stop_cbfn)
2035                 rx_mod->stop_cbfn(&rx_mod->bna->enet);
2036         rx_mod->stop_cbfn = NULL;
2037 }
2038
2039 static void
2040 bna_rx_start(struct bna_rx *rx)
2041 {
2042         rx->rx_flags |= BNA_RX_F_ENET_STARTED;
2043         if (rx->rx_flags & BNA_RX_F_ENABLED)
2044                 bfa_fsm_send_event(rx, RX_E_START);
2045 }
2046
2047 static void
2048 bna_rx_stop(struct bna_rx *rx)
2049 {
2050         rx->rx_flags &= ~BNA_RX_F_ENET_STARTED;
2051         if (rx->fsm == (bfa_fsm_t) bna_rx_sm_stopped)
2052                 bna_rx_mod_cb_rx_stopped(&rx->bna->rx_mod, rx);
2053         else {
2054                 rx->stop_cbfn = bna_rx_mod_cb_rx_stopped;
2055                 rx->stop_cbarg = &rx->bna->rx_mod;
2056                 bfa_fsm_send_event(rx, RX_E_STOP);
2057         }
2058 }
2059
2060 static void
2061 bna_rx_fail(struct bna_rx *rx)
2062 {
2063         /* Indicate Enet is not enabled, and failed */
2064         rx->rx_flags &= ~BNA_RX_F_ENET_STARTED;
2065         bfa_fsm_send_event(rx, RX_E_FAIL);
2066 }
2067
2068 void
2069 bna_rx_mod_start(struct bna_rx_mod *rx_mod, enum bna_rx_type type)
2070 {
2071         struct bna_rx *rx;
2072         struct list_head *qe;
2073
2074         rx_mod->flags |= BNA_RX_MOD_F_ENET_STARTED;
2075         if (type == BNA_RX_T_LOOPBACK)
2076                 rx_mod->flags |= BNA_RX_MOD_F_ENET_LOOPBACK;
2077
2078         list_for_each(qe, &rx_mod->rx_active_q) {
2079                 rx = (struct bna_rx *)qe;
2080                 if (rx->type == type)
2081                         bna_rx_start(rx);
2082         }
2083 }
2084
2085 void
2086 bna_rx_mod_stop(struct bna_rx_mod *rx_mod, enum bna_rx_type type)
2087 {
2088         struct bna_rx *rx;
2089         struct list_head *qe;
2090
2091         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_STARTED;
2092         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_LOOPBACK;
2093
2094         rx_mod->stop_cbfn = bna_enet_cb_rx_stopped;
2095
2096         bfa_wc_init(&rx_mod->rx_stop_wc, bna_rx_mod_cb_rx_stopped_all, rx_mod);
2097
2098         list_for_each(qe, &rx_mod->rx_active_q) {
2099                 rx = (struct bna_rx *)qe;
2100                 if (rx->type == type) {
2101                         bfa_wc_up(&rx_mod->rx_stop_wc);
2102                         bna_rx_stop(rx);
2103                 }
2104         }
2105
2106         bfa_wc_wait(&rx_mod->rx_stop_wc);
2107 }
2108
2109 void
2110 bna_rx_mod_fail(struct bna_rx_mod *rx_mod)
2111 {
2112         struct bna_rx *rx;
2113         struct list_head *qe;
2114
2115         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_STARTED;
2116         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_LOOPBACK;
2117
2118         list_for_each(qe, &rx_mod->rx_active_q) {
2119                 rx = (struct bna_rx *)qe;
2120                 bna_rx_fail(rx);
2121         }
2122 }
2123
2124 void bna_rx_mod_init(struct bna_rx_mod *rx_mod, struct bna *bna,
2125                         struct bna_res_info *res_info)
2126 {
2127         int     index;
2128         struct bna_rx *rx_ptr;
2129         struct bna_rxp *rxp_ptr;
2130         struct bna_rxq *rxq_ptr;
2131
2132         rx_mod->bna = bna;
2133         rx_mod->flags = 0;
2134
2135         rx_mod->rx = (struct bna_rx *)
2136                 res_info[BNA_MOD_RES_MEM_T_RX_ARRAY].res_u.mem_info.mdl[0].kva;
2137         rx_mod->rxp = (struct bna_rxp *)
2138                 res_info[BNA_MOD_RES_MEM_T_RXP_ARRAY].res_u.mem_info.mdl[0].kva;
2139         rx_mod->rxq = (struct bna_rxq *)
2140                 res_info[BNA_MOD_RES_MEM_T_RXQ_ARRAY].res_u.mem_info.mdl[0].kva;
2141
2142         /* Initialize the queues */
2143         INIT_LIST_HEAD(&rx_mod->rx_free_q);
2144         rx_mod->rx_free_count = 0;
2145         INIT_LIST_HEAD(&rx_mod->rxq_free_q);
2146         rx_mod->rxq_free_count = 0;
2147         INIT_LIST_HEAD(&rx_mod->rxp_free_q);
2148         rx_mod->rxp_free_count = 0;
2149         INIT_LIST_HEAD(&rx_mod->rx_active_q);
2150
2151         /* Build RX queues */
2152         for (index = 0; index < bna->ioceth.attr.num_rxp; index++) {
2153                 rx_ptr = &rx_mod->rx[index];
2154
2155                 bfa_q_qe_init(&rx_ptr->qe);
2156                 INIT_LIST_HEAD(&rx_ptr->rxp_q);
2157                 rx_ptr->bna = NULL;
2158                 rx_ptr->rid = index;
2159                 rx_ptr->stop_cbfn = NULL;
2160                 rx_ptr->stop_cbarg = NULL;
2161
2162                 list_add_tail(&rx_ptr->qe, &rx_mod->rx_free_q);
2163                 rx_mod->rx_free_count++;
2164         }
2165
2166         /* build RX-path queue */
2167         for (index = 0; index < bna->ioceth.attr.num_rxp; index++) {
2168                 rxp_ptr = &rx_mod->rxp[index];
2169                 bfa_q_qe_init(&rxp_ptr->qe);
2170                 list_add_tail(&rxp_ptr->qe, &rx_mod->rxp_free_q);
2171                 rx_mod->rxp_free_count++;
2172         }
2173
2174         /* build RXQ queue */
2175         for (index = 0; index < (bna->ioceth.attr.num_rxp * 2); index++) {
2176                 rxq_ptr = &rx_mod->rxq[index];
2177                 bfa_q_qe_init(&rxq_ptr->qe);
2178                 list_add_tail(&rxq_ptr->qe, &rx_mod->rxq_free_q);
2179                 rx_mod->rxq_free_count++;
2180         }
2181 }
2182
2183 void
2184 bna_rx_mod_uninit(struct bna_rx_mod *rx_mod)
2185 {
2186         struct list_head                *qe;
2187         int i;
2188
2189         i = 0;
2190         list_for_each(qe, &rx_mod->rx_free_q)
2191                 i++;
2192
2193         i = 0;
2194         list_for_each(qe, &rx_mod->rxp_free_q)
2195                 i++;
2196
2197         i = 0;
2198         list_for_each(qe, &rx_mod->rxq_free_q)
2199                 i++;
2200
2201         rx_mod->bna = NULL;
2202 }
2203
2204 void
2205 bna_bfi_rx_enet_start_rsp(struct bna_rx *rx, struct bfi_msgq_mhdr *msghdr)
2206 {
2207         struct bfi_enet_rx_cfg_rsp *cfg_rsp = &rx->bfi_enet_cmd.cfg_rsp;
2208         struct bna_rxp *rxp = NULL;
2209         struct bna_rxq *q0 = NULL, *q1 = NULL;
2210         struct list_head *rxp_qe;
2211         int i;
2212
2213         bfa_msgq_rsp_copy(&rx->bna->msgq, (u8 *)cfg_rsp,
2214                 sizeof(struct bfi_enet_rx_cfg_rsp));
2215
2216         rx->hw_id = cfg_rsp->hw_id;
2217
2218         for (i = 0, rxp_qe = bfa_q_first(&rx->rxp_q);
2219                 i < rx->num_paths;
2220                 i++, rxp_qe = bfa_q_next(rxp_qe)) {
2221                 rxp = (struct bna_rxp *)rxp_qe;
2222                 GET_RXQS(rxp, q0, q1);
2223
2224                 /* Setup doorbells */
2225                 rxp->cq.ccb->i_dbell->doorbell_addr =
2226                         rx->bna->pcidev.pci_bar_kva
2227                         + ntohl(cfg_rsp->q_handles[i].i_dbell);
2228                 rxp->hw_id = cfg_rsp->q_handles[i].hw_cqid;
2229                 q0->rcb->q_dbell =
2230                         rx->bna->pcidev.pci_bar_kva
2231                         + ntohl(cfg_rsp->q_handles[i].ql_dbell);
2232                 q0->hw_id = cfg_rsp->q_handles[i].hw_lqid;
2233                 if (q1) {
2234                         q1->rcb->q_dbell =
2235                         rx->bna->pcidev.pci_bar_kva
2236                         + ntohl(cfg_rsp->q_handles[i].qs_dbell);
2237                         q1->hw_id = cfg_rsp->q_handles[i].hw_sqid;
2238                 }
2239
2240                 /* Initialize producer/consumer indexes */
2241                 (*rxp->cq.ccb->hw_producer_index) = 0;
2242                 rxp->cq.ccb->producer_index = 0;
2243                 q0->rcb->producer_index = q0->rcb->consumer_index = 0;
2244                 if (q1)
2245                         q1->rcb->producer_index = q1->rcb->consumer_index = 0;
2246         }
2247
2248         bfa_fsm_send_event(rx, RX_E_STARTED);
2249 }
2250
2251 void
2252 bna_bfi_rx_enet_stop_rsp(struct bna_rx *rx, struct bfi_msgq_mhdr *msghdr)
2253 {
2254         bfa_fsm_send_event(rx, RX_E_STOPPED);
2255 }
2256
2257 void
2258 bna_rx_res_req(struct bna_rx_config *q_cfg, struct bna_res_info *res_info)
2259 {
2260         u32 cq_size, hq_size, dq_size;
2261         u32 cpage_count, hpage_count, dpage_count;
2262         struct bna_mem_info *mem_info;
2263         u32 cq_depth;
2264         u32 hq_depth;
2265         u32 dq_depth;
2266
2267         dq_depth = q_cfg->q0_depth;
2268         hq_depth = ((q_cfg->rxp_type == BNA_RXP_SINGLE) ? 0 : q_cfg->q1_depth);
2269         cq_depth = roundup_pow_of_two(dq_depth + hq_depth);
2270
2271         cq_size = cq_depth * BFI_CQ_WI_SIZE;
2272         cq_size = ALIGN(cq_size, PAGE_SIZE);
2273         cpage_count = SIZE_TO_PAGES(cq_size);
2274
2275         dq_depth = roundup_pow_of_two(dq_depth);
2276         dq_size = dq_depth * BFI_RXQ_WI_SIZE;
2277         dq_size = ALIGN(dq_size, PAGE_SIZE);
2278         dpage_count = SIZE_TO_PAGES(dq_size);
2279
2280         if (BNA_RXP_SINGLE != q_cfg->rxp_type) {
2281                 hq_depth = roundup_pow_of_two(hq_depth);
2282                 hq_size = hq_depth * BFI_RXQ_WI_SIZE;
2283                 hq_size = ALIGN(hq_size, PAGE_SIZE);
2284                 hpage_count = SIZE_TO_PAGES(hq_size);
2285         } else
2286                 hpage_count = 0;
2287
2288         res_info[BNA_RX_RES_MEM_T_CCB].res_type = BNA_RES_T_MEM;
2289         mem_info = &res_info[BNA_RX_RES_MEM_T_CCB].res_u.mem_info;
2290         mem_info->mem_type = BNA_MEM_T_KVA;
2291         mem_info->len = sizeof(struct bna_ccb);
2292         mem_info->num = q_cfg->num_paths;
2293
2294         res_info[BNA_RX_RES_MEM_T_RCB].res_type = BNA_RES_T_MEM;
2295         mem_info = &res_info[BNA_RX_RES_MEM_T_RCB].res_u.mem_info;
2296         mem_info->mem_type = BNA_MEM_T_KVA;
2297         mem_info->len = sizeof(struct bna_rcb);
2298         mem_info->num = BNA_GET_RXQS(q_cfg);
2299
2300         res_info[BNA_RX_RES_MEM_T_CQPT].res_type = BNA_RES_T_MEM;
2301         mem_info = &res_info[BNA_RX_RES_MEM_T_CQPT].res_u.mem_info;
2302         mem_info->mem_type = BNA_MEM_T_DMA;
2303         mem_info->len = cpage_count * sizeof(struct bna_dma_addr);
2304         mem_info->num = q_cfg->num_paths;
2305
2306         res_info[BNA_RX_RES_MEM_T_CSWQPT].res_type = BNA_RES_T_MEM;
2307         mem_info = &res_info[BNA_RX_RES_MEM_T_CSWQPT].res_u.mem_info;
2308         mem_info->mem_type = BNA_MEM_T_KVA;
2309         mem_info->len = cpage_count * sizeof(void *);
2310         mem_info->num = q_cfg->num_paths;
2311
2312         res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_type = BNA_RES_T_MEM;
2313         mem_info = &res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_u.mem_info;
2314         mem_info->mem_type = BNA_MEM_T_DMA;
2315         mem_info->len = PAGE_SIZE * cpage_count;
2316         mem_info->num = q_cfg->num_paths;
2317
2318         res_info[BNA_RX_RES_MEM_T_DQPT].res_type = BNA_RES_T_MEM;
2319         mem_info = &res_info[BNA_RX_RES_MEM_T_DQPT].res_u.mem_info;
2320         mem_info->mem_type = BNA_MEM_T_DMA;
2321         mem_info->len = dpage_count * sizeof(struct bna_dma_addr);
2322         mem_info->num = q_cfg->num_paths;
2323
2324         res_info[BNA_RX_RES_MEM_T_DSWQPT].res_type = BNA_RES_T_MEM;
2325         mem_info = &res_info[BNA_RX_RES_MEM_T_DSWQPT].res_u.mem_info;
2326         mem_info->mem_type = BNA_MEM_T_KVA;
2327         mem_info->len = dpage_count * sizeof(void *);
2328         mem_info->num = q_cfg->num_paths;
2329
2330         res_info[BNA_RX_RES_MEM_T_DPAGE].res_type = BNA_RES_T_MEM;
2331         mem_info = &res_info[BNA_RX_RES_MEM_T_DPAGE].res_u.mem_info;
2332         mem_info->mem_type = BNA_MEM_T_DMA;
2333         mem_info->len = PAGE_SIZE * dpage_count;
2334         mem_info->num = q_cfg->num_paths;
2335
2336         res_info[BNA_RX_RES_MEM_T_HQPT].res_type = BNA_RES_T_MEM;
2337         mem_info = &res_info[BNA_RX_RES_MEM_T_HQPT].res_u.mem_info;
2338         mem_info->mem_type = BNA_MEM_T_DMA;
2339         mem_info->len = hpage_count * sizeof(struct bna_dma_addr);
2340         mem_info->num = (hpage_count ? q_cfg->num_paths : 0);
2341
2342         res_info[BNA_RX_RES_MEM_T_HSWQPT].res_type = BNA_RES_T_MEM;
2343         mem_info = &res_info[BNA_RX_RES_MEM_T_HSWQPT].res_u.mem_info;
2344         mem_info->mem_type = BNA_MEM_T_KVA;
2345         mem_info->len = hpage_count * sizeof(void *);
2346         mem_info->num = (hpage_count ? q_cfg->num_paths : 0);
2347
2348         res_info[BNA_RX_RES_MEM_T_HPAGE].res_type = BNA_RES_T_MEM;
2349         mem_info = &res_info[BNA_RX_RES_MEM_T_HPAGE].res_u.mem_info;
2350         mem_info->mem_type = BNA_MEM_T_DMA;
2351         mem_info->len = PAGE_SIZE * hpage_count;
2352         mem_info->num = (hpage_count ? q_cfg->num_paths : 0);
2353
2354         res_info[BNA_RX_RES_MEM_T_IBIDX].res_type = BNA_RES_T_MEM;
2355         mem_info = &res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info;
2356         mem_info->mem_type = BNA_MEM_T_DMA;
2357         mem_info->len = BFI_IBIDX_SIZE;
2358         mem_info->num = q_cfg->num_paths;
2359
2360         res_info[BNA_RX_RES_MEM_T_RIT].res_type = BNA_RES_T_MEM;
2361         mem_info = &res_info[BNA_RX_RES_MEM_T_RIT].res_u.mem_info;
2362         mem_info->mem_type = BNA_MEM_T_KVA;
2363         mem_info->len = BFI_ENET_RSS_RIT_MAX;
2364         mem_info->num = 1;
2365
2366         res_info[BNA_RX_RES_T_INTR].res_type = BNA_RES_T_INTR;
2367         res_info[BNA_RX_RES_T_INTR].res_u.intr_info.intr_type = BNA_INTR_T_MSIX;
2368         res_info[BNA_RX_RES_T_INTR].res_u.intr_info.num = q_cfg->num_paths;
2369 }
2370
2371 struct bna_rx *
2372 bna_rx_create(struct bna *bna, struct bnad *bnad,
2373                 struct bna_rx_config *rx_cfg,
2374                 const struct bna_rx_event_cbfn *rx_cbfn,
2375                 struct bna_res_info *res_info,
2376                 void *priv)
2377 {
2378         struct bna_rx_mod *rx_mod = &bna->rx_mod;
2379         struct bna_rx *rx;
2380         struct bna_rxp *rxp;
2381         struct bna_rxq *q0;
2382         struct bna_rxq *q1;
2383         struct bna_intr_info *intr_info;
2384         struct bna_mem_descr *hqunmap_mem;
2385         struct bna_mem_descr *dqunmap_mem;
2386         struct bna_mem_descr *ccb_mem;
2387         struct bna_mem_descr *rcb_mem;
2388         struct bna_mem_descr *cqpt_mem;
2389         struct bna_mem_descr *cswqpt_mem;
2390         struct bna_mem_descr *cpage_mem;
2391         struct bna_mem_descr *hqpt_mem;
2392         struct bna_mem_descr *dqpt_mem;
2393         struct bna_mem_descr *hsqpt_mem;
2394         struct bna_mem_descr *dsqpt_mem;
2395         struct bna_mem_descr *hpage_mem;
2396         struct bna_mem_descr *dpage_mem;
2397         u32 dpage_count, hpage_count;
2398         u32 hq_idx, dq_idx, rcb_idx;
2399         u32 cq_depth, i;
2400         u32 page_count;
2401
2402         if (!bna_rx_res_check(rx_mod, rx_cfg))
2403                 return NULL;
2404
2405         intr_info = &res_info[BNA_RX_RES_T_INTR].res_u.intr_info;
2406         ccb_mem = &res_info[BNA_RX_RES_MEM_T_CCB].res_u.mem_info.mdl[0];
2407         rcb_mem = &res_info[BNA_RX_RES_MEM_T_RCB].res_u.mem_info.mdl[0];
2408         dqunmap_mem = &res_info[BNA_RX_RES_MEM_T_UNMAPDQ].res_u.mem_info.mdl[0];
2409         hqunmap_mem = &res_info[BNA_RX_RES_MEM_T_UNMAPHQ].res_u.mem_info.mdl[0];
2410         cqpt_mem = &res_info[BNA_RX_RES_MEM_T_CQPT].res_u.mem_info.mdl[0];
2411         cswqpt_mem = &res_info[BNA_RX_RES_MEM_T_CSWQPT].res_u.mem_info.mdl[0];
2412         cpage_mem = &res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_u.mem_info.mdl[0];
2413         hqpt_mem = &res_info[BNA_RX_RES_MEM_T_HQPT].res_u.mem_info.mdl[0];
2414         dqpt_mem = &res_info[BNA_RX_RES_MEM_T_DQPT].res_u.mem_info.mdl[0];
2415         hsqpt_mem = &res_info[BNA_RX_RES_MEM_T_HSWQPT].res_u.mem_info.mdl[0];
2416         dsqpt_mem = &res_info[BNA_RX_RES_MEM_T_DSWQPT].res_u.mem_info.mdl[0];
2417         hpage_mem = &res_info[BNA_RX_RES_MEM_T_HPAGE].res_u.mem_info.mdl[0];
2418         dpage_mem = &res_info[BNA_RX_RES_MEM_T_DPAGE].res_u.mem_info.mdl[0];
2419
2420         page_count = res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_u.mem_info.len /
2421                         PAGE_SIZE;
2422
2423         dpage_count = res_info[BNA_RX_RES_MEM_T_DPAGE].res_u.mem_info.len /
2424                         PAGE_SIZE;
2425
2426         hpage_count = res_info[BNA_RX_RES_MEM_T_HPAGE].res_u.mem_info.len /
2427                         PAGE_SIZE;
2428
2429         rx = bna_rx_get(rx_mod, rx_cfg->rx_type);
2430         rx->bna = bna;
2431         rx->rx_flags = 0;
2432         INIT_LIST_HEAD(&rx->rxp_q);
2433         rx->stop_cbfn = NULL;
2434         rx->stop_cbarg = NULL;
2435         rx->priv = priv;
2436
2437         rx->rcb_setup_cbfn = rx_cbfn->rcb_setup_cbfn;
2438         rx->rcb_destroy_cbfn = rx_cbfn->rcb_destroy_cbfn;
2439         rx->ccb_setup_cbfn = rx_cbfn->ccb_setup_cbfn;
2440         rx->ccb_destroy_cbfn = rx_cbfn->ccb_destroy_cbfn;
2441         rx->rx_stall_cbfn = rx_cbfn->rx_stall_cbfn;
2442         /* Following callbacks are mandatory */
2443         rx->rx_cleanup_cbfn = rx_cbfn->rx_cleanup_cbfn;
2444         rx->rx_post_cbfn = rx_cbfn->rx_post_cbfn;
2445
2446         if (rx->bna->rx_mod.flags & BNA_RX_MOD_F_ENET_STARTED) {
2447                 switch (rx->type) {
2448                 case BNA_RX_T_REGULAR:
2449                         if (!(rx->bna->rx_mod.flags &
2450                                 BNA_RX_MOD_F_ENET_LOOPBACK))
2451                                 rx->rx_flags |= BNA_RX_F_ENET_STARTED;
2452                         break;
2453                 case BNA_RX_T_LOOPBACK:
2454                         if (rx->bna->rx_mod.flags & BNA_RX_MOD_F_ENET_LOOPBACK)
2455                                 rx->rx_flags |= BNA_RX_F_ENET_STARTED;
2456                         break;
2457                 }
2458         }
2459
2460         rx->num_paths = rx_cfg->num_paths;
2461         for (i = 0, hq_idx = 0, dq_idx = 0, rcb_idx = 0;
2462                         i < rx->num_paths; i++) {
2463                 rxp = bna_rxp_get(rx_mod);
2464                 list_add_tail(&rxp->qe, &rx->rxp_q);
2465                 rxp->type = rx_cfg->rxp_type;
2466                 rxp->rx = rx;
2467                 rxp->cq.rx = rx;
2468
2469                 q0 = bna_rxq_get(rx_mod);
2470                 if (BNA_RXP_SINGLE == rx_cfg->rxp_type)
2471                         q1 = NULL;
2472                 else
2473                         q1 = bna_rxq_get(rx_mod);
2474
2475                 if (1 == intr_info->num)
2476                         rxp->vector = intr_info->idl[0].vector;
2477                 else
2478                         rxp->vector = intr_info->idl[i].vector;
2479
2480                 /* Setup IB */
2481
2482                 rxp->cq.ib.ib_seg_host_addr.lsb =
2483                 res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.lsb;
2484                 rxp->cq.ib.ib_seg_host_addr.msb =
2485                 res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.msb;
2486                 rxp->cq.ib.ib_seg_host_addr_kva =
2487                 res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].kva;
2488                 rxp->cq.ib.intr_type = intr_info->intr_type;
2489                 if (intr_info->intr_type == BNA_INTR_T_MSIX)
2490                         rxp->cq.ib.intr_vector = rxp->vector;
2491                 else
2492                         rxp->cq.ib.intr_vector = BIT(rxp->vector);
2493                 rxp->cq.ib.coalescing_timeo = rx_cfg->coalescing_timeo;
2494                 rxp->cq.ib.interpkt_count = BFI_RX_INTERPKT_COUNT;
2495                 rxp->cq.ib.interpkt_timeo = BFI_RX_INTERPKT_TIMEO;
2496
2497                 bna_rxp_add_rxqs(rxp, q0, q1);
2498
2499                 /* Setup large Q */
2500
2501                 q0->rx = rx;
2502                 q0->rxp = rxp;
2503
2504                 q0->rcb = (struct bna_rcb *) rcb_mem[rcb_idx].kva;
2505                 q0->rcb->unmap_q = (void *)dqunmap_mem[dq_idx].kva;
2506                 rcb_idx++; dq_idx++;
2507                 q0->rcb->q_depth = rx_cfg->q0_depth;
2508                 q0->q_depth = rx_cfg->q0_depth;
2509                 q0->multi_buffer = rx_cfg->q0_multi_buf;
2510                 q0->buffer_size = rx_cfg->q0_buf_size;
2511                 q0->num_vecs = rx_cfg->q0_num_vecs;
2512                 q0->rcb->rxq = q0;
2513                 q0->rcb->bnad = bna->bnad;
2514                 q0->rcb->id = 0;
2515                 q0->rx_packets = q0->rx_bytes = 0;
2516                 q0->rx_packets_with_error = q0->rxbuf_alloc_failed = 0;
2517
2518                 bna_rxq_qpt_setup(q0, rxp, dpage_count, PAGE_SIZE,
2519                         &dqpt_mem[i], &dsqpt_mem[i], &dpage_mem[i]);
2520
2521                 if (rx->rcb_setup_cbfn)
2522                         rx->rcb_setup_cbfn(bnad, q0->rcb);
2523
2524                 /* Setup small Q */
2525
2526                 if (q1) {
2527                         q1->rx = rx;
2528                         q1->rxp = rxp;
2529
2530                         q1->rcb = (struct bna_rcb *) rcb_mem[rcb_idx].kva;
2531                         q1->rcb->unmap_q = (void *)hqunmap_mem[hq_idx].kva;
2532                         rcb_idx++; hq_idx++;
2533                         q1->rcb->q_depth = rx_cfg->q1_depth;
2534                         q1->q_depth = rx_cfg->q1_depth;
2535                         q1->multi_buffer = BNA_STATUS_T_DISABLED;
2536                         q1->num_vecs = 1;
2537                         q1->rcb->rxq = q1;
2538                         q1->rcb->bnad = bna->bnad;
2539                         q1->rcb->id = 1;
2540                         q1->buffer_size = (rx_cfg->rxp_type == BNA_RXP_HDS) ?
2541                                         rx_cfg->hds_config.forced_offset
2542                                         : rx_cfg->q1_buf_size;
2543                         q1->rx_packets = q1->rx_bytes = 0;
2544                         q1->rx_packets_with_error = q1->rxbuf_alloc_failed = 0;
2545
2546                         bna_rxq_qpt_setup(q1, rxp, hpage_count, PAGE_SIZE,
2547                                 &hqpt_mem[i], &hsqpt_mem[i],
2548                                 &hpage_mem[i]);
2549
2550                         if (rx->rcb_setup_cbfn)
2551                                 rx->rcb_setup_cbfn(bnad, q1->rcb);
2552                 }
2553
2554                 /* Setup CQ */
2555
2556                 rxp->cq.ccb = (struct bna_ccb *) ccb_mem[i].kva;
2557                 cq_depth = rx_cfg->q0_depth +
2558                         ((rx_cfg->rxp_type == BNA_RXP_SINGLE) ?
2559                          0 : rx_cfg->q1_depth);
2560                 /* if multi-buffer is enabled sum of q0_depth
2561                  * and q1_depth need not be a power of 2
2562                  */
2563                 cq_depth = roundup_pow_of_two(cq_depth);
2564                 rxp->cq.ccb->q_depth = cq_depth;
2565                 rxp->cq.ccb->cq = &rxp->cq;
2566                 rxp->cq.ccb->rcb[0] = q0->rcb;
2567                 q0->rcb->ccb = rxp->cq.ccb;
2568                 if (q1) {
2569                         rxp->cq.ccb->rcb[1] = q1->rcb;
2570                         q1->rcb->ccb = rxp->cq.ccb;
2571                 }
2572                 rxp->cq.ccb->hw_producer_index =
2573                         (u32 *)rxp->cq.ib.ib_seg_host_addr_kva;
2574                 rxp->cq.ccb->i_dbell = &rxp->cq.ib.door_bell;
2575                 rxp->cq.ccb->intr_type = rxp->cq.ib.intr_type;
2576                 rxp->cq.ccb->intr_vector = rxp->cq.ib.intr_vector;
2577                 rxp->cq.ccb->rx_coalescing_timeo =
2578                         rxp->cq.ib.coalescing_timeo;
2579                 rxp->cq.ccb->pkt_rate.small_pkt_cnt = 0;
2580                 rxp->cq.ccb->pkt_rate.large_pkt_cnt = 0;
2581                 rxp->cq.ccb->bnad = bna->bnad;
2582                 rxp->cq.ccb->id = i;
2583
2584                 bna_rxp_cqpt_setup(rxp, page_count, PAGE_SIZE,
2585                         &cqpt_mem[i], &cswqpt_mem[i], &cpage_mem[i]);
2586
2587                 if (rx->ccb_setup_cbfn)
2588                         rx->ccb_setup_cbfn(bnad, rxp->cq.ccb);
2589         }
2590
2591         rx->hds_cfg = rx_cfg->hds_config;
2592
2593         bna_rxf_init(&rx->rxf, rx, rx_cfg, res_info);
2594
2595         bfa_fsm_set_state(rx, bna_rx_sm_stopped);
2596
2597         rx_mod->rid_mask |= BIT(rx->rid);
2598
2599         return rx;
2600 }
2601
2602 void
2603 bna_rx_destroy(struct bna_rx *rx)
2604 {
2605         struct bna_rx_mod *rx_mod = &rx->bna->rx_mod;
2606         struct bna_rxq *q0 = NULL;
2607         struct bna_rxq *q1 = NULL;
2608         struct bna_rxp *rxp;
2609         struct list_head *qe;
2610
2611         bna_rxf_uninit(&rx->rxf);
2612
2613         while (!list_empty(&rx->rxp_q)) {
2614                 bfa_q_deq(&rx->rxp_q, &rxp);
2615                 GET_RXQS(rxp, q0, q1);
2616                 if (rx->rcb_destroy_cbfn)
2617                         rx->rcb_destroy_cbfn(rx->bna->bnad, q0->rcb);
2618                 q0->rcb = NULL;
2619                 q0->rxp = NULL;
2620                 q0->rx = NULL;
2621                 bna_rxq_put(rx_mod, q0);
2622
2623                 if (q1) {
2624                         if (rx->rcb_destroy_cbfn)
2625                                 rx->rcb_destroy_cbfn(rx->bna->bnad, q1->rcb);
2626                         q1->rcb = NULL;
2627                         q1->rxp = NULL;
2628                         q1->rx = NULL;
2629                         bna_rxq_put(rx_mod, q1);
2630                 }
2631                 rxp->rxq.slr.large = NULL;
2632                 rxp->rxq.slr.small = NULL;
2633
2634                 if (rx->ccb_destroy_cbfn)
2635                         rx->ccb_destroy_cbfn(rx->bna->bnad, rxp->cq.ccb);
2636                 rxp->cq.ccb = NULL;
2637                 rxp->rx = NULL;
2638                 bna_rxp_put(rx_mod, rxp);
2639         }
2640
2641         list_for_each(qe, &rx_mod->rx_active_q) {
2642                 if (qe == &rx->qe) {
2643                         list_del(&rx->qe);
2644                         bfa_q_qe_init(&rx->qe);
2645                         break;
2646                 }
2647         }
2648
2649         rx_mod->rid_mask &= ~BIT(rx->rid);
2650
2651         rx->bna = NULL;
2652         rx->priv = NULL;
2653         bna_rx_put(rx_mod, rx);
2654 }
2655
2656 void
2657 bna_rx_enable(struct bna_rx *rx)
2658 {
2659         if (rx->fsm != (bfa_sm_t)bna_rx_sm_stopped)
2660                 return;
2661
2662         rx->rx_flags |= BNA_RX_F_ENABLED;
2663         if (rx->rx_flags & BNA_RX_F_ENET_STARTED)
2664                 bfa_fsm_send_event(rx, RX_E_START);
2665 }
2666
2667 void
2668 bna_rx_disable(struct bna_rx *rx, enum bna_cleanup_type type,
2669                 void (*cbfn)(void *, struct bna_rx *))
2670 {
2671         if (type == BNA_SOFT_CLEANUP) {
2672                 /* h/w should not be accessed. Treat we're stopped */
2673                 (*cbfn)(rx->bna->bnad, rx);
2674         } else {
2675                 rx->stop_cbfn = cbfn;
2676                 rx->stop_cbarg = rx->bna->bnad;
2677
2678                 rx->rx_flags &= ~BNA_RX_F_ENABLED;
2679
2680                 bfa_fsm_send_event(rx, RX_E_STOP);
2681         }
2682 }
2683
2684 void
2685 bna_rx_cleanup_complete(struct bna_rx *rx)
2686 {
2687         bfa_fsm_send_event(rx, RX_E_CLEANUP_DONE);
2688 }
2689
2690 void
2691 bna_rx_vlan_strip_enable(struct bna_rx *rx)
2692 {
2693         struct bna_rxf *rxf = &rx->rxf;
2694
2695         if (rxf->vlan_strip_status == BNA_STATUS_T_DISABLED) {
2696                 rxf->vlan_strip_status = BNA_STATUS_T_ENABLED;
2697                 rxf->vlan_strip_pending = true;
2698                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
2699         }
2700 }
2701
2702 void
2703 bna_rx_vlan_strip_disable(struct bna_rx *rx)
2704 {
2705         struct bna_rxf *rxf = &rx->rxf;
2706
2707         if (rxf->vlan_strip_status != BNA_STATUS_T_DISABLED) {
2708                 rxf->vlan_strip_status = BNA_STATUS_T_DISABLED;
2709                 rxf->vlan_strip_pending = true;
2710                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
2711         }
2712 }
2713
2714 enum bna_cb_status
2715 bna_rx_mode_set(struct bna_rx *rx, enum bna_rxmode new_mode,
2716                 enum bna_rxmode bitmask)
2717 {
2718         struct bna_rxf *rxf = &rx->rxf;
2719         int need_hw_config = 0;
2720
2721         /* Error checks */
2722
2723         if (is_promisc_enable(new_mode, bitmask)) {
2724                 /* If promisc mode is already enabled elsewhere in the system */
2725                 if ((rx->bna->promisc_rid != BFI_INVALID_RID) &&
2726                         (rx->bna->promisc_rid != rxf->rx->rid))
2727                         goto err_return;
2728
2729                 /* If default mode is already enabled in the system */
2730                 if (rx->bna->default_mode_rid != BFI_INVALID_RID)
2731                         goto err_return;
2732
2733                 /* Trying to enable promiscuous and default mode together */
2734                 if (is_default_enable(new_mode, bitmask))
2735                         goto err_return;
2736         }
2737
2738         if (is_default_enable(new_mode, bitmask)) {
2739                 /* If default mode is already enabled elsewhere in the system */
2740                 if ((rx->bna->default_mode_rid != BFI_INVALID_RID) &&
2741                         (rx->bna->default_mode_rid != rxf->rx->rid)) {
2742                                 goto err_return;
2743                 }
2744
2745                 /* If promiscuous mode is already enabled in the system */
2746                 if (rx->bna->promisc_rid != BFI_INVALID_RID)
2747                         goto err_return;
2748         }
2749
2750         /* Process the commands */
2751
2752         if (is_promisc_enable(new_mode, bitmask)) {
2753                 if (bna_rxf_promisc_enable(rxf))
2754                         need_hw_config = 1;
2755         } else if (is_promisc_disable(new_mode, bitmask)) {
2756                 if (bna_rxf_promisc_disable(rxf))
2757                         need_hw_config = 1;
2758         }
2759
2760         if (is_allmulti_enable(new_mode, bitmask)) {
2761                 if (bna_rxf_allmulti_enable(rxf))
2762                         need_hw_config = 1;
2763         } else if (is_allmulti_disable(new_mode, bitmask)) {
2764                 if (bna_rxf_allmulti_disable(rxf))
2765                         need_hw_config = 1;
2766         }
2767
2768         /* Trigger h/w if needed */
2769
2770         if (need_hw_config) {
2771                 rxf->cam_fltr_cbfn = NULL;
2772                 rxf->cam_fltr_cbarg = rx->bna->bnad;
2773                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
2774         }
2775
2776         return BNA_CB_SUCCESS;
2777
2778 err_return:
2779         return BNA_CB_FAIL;
2780 }
2781
2782 void
2783 bna_rx_vlanfilter_enable(struct bna_rx *rx)
2784 {
2785         struct bna_rxf *rxf = &rx->rxf;
2786
2787         if (rxf->vlan_filter_status == BNA_STATUS_T_DISABLED) {
2788                 rxf->vlan_filter_status = BNA_STATUS_T_ENABLED;
2789                 rxf->vlan_pending_bitmask = (u8)BFI_VLAN_BMASK_ALL;
2790                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
2791         }
2792 }
2793
2794 void
2795 bna_rx_coalescing_timeo_set(struct bna_rx *rx, int coalescing_timeo)
2796 {
2797         struct bna_rxp *rxp;
2798         struct list_head *qe;
2799
2800         list_for_each(qe, &rx->rxp_q) {
2801                 rxp = (struct bna_rxp *)qe;
2802                 rxp->cq.ccb->rx_coalescing_timeo = coalescing_timeo;
2803                 bna_ib_coalescing_timeo_set(&rxp->cq.ib, coalescing_timeo);
2804         }
2805 }
2806
2807 void
2808 bna_rx_dim_reconfig(struct bna *bna, const u32 vector[][BNA_BIAS_T_MAX])
2809 {
2810         int i, j;
2811
2812         for (i = 0; i < BNA_LOAD_T_MAX; i++)
2813                 for (j = 0; j < BNA_BIAS_T_MAX; j++)
2814                         bna->rx_mod.dim_vector[i][j] = vector[i][j];
2815 }
2816
2817 void
2818 bna_rx_dim_update(struct bna_ccb *ccb)
2819 {
2820         struct bna *bna = ccb->cq->rx->bna;
2821         u32 load, bias;
2822         u32 pkt_rt, small_rt, large_rt;
2823         u8 coalescing_timeo;
2824
2825         if ((ccb->pkt_rate.small_pkt_cnt == 0) &&
2826                 (ccb->pkt_rate.large_pkt_cnt == 0))
2827                 return;
2828
2829         /* Arrive at preconfigured coalescing timeo value based on pkt rate */
2830
2831         small_rt = ccb->pkt_rate.small_pkt_cnt;
2832         large_rt = ccb->pkt_rate.large_pkt_cnt;
2833
2834         pkt_rt = small_rt + large_rt;
2835
2836         if (pkt_rt < BNA_PKT_RATE_10K)
2837                 load = BNA_LOAD_T_LOW_4;
2838         else if (pkt_rt < BNA_PKT_RATE_20K)
2839                 load = BNA_LOAD_T_LOW_3;
2840         else if (pkt_rt < BNA_PKT_RATE_30K)
2841                 load = BNA_LOAD_T_LOW_2;
2842         else if (pkt_rt < BNA_PKT_RATE_40K)
2843                 load = BNA_LOAD_T_LOW_1;
2844         else if (pkt_rt < BNA_PKT_RATE_50K)
2845                 load = BNA_LOAD_T_HIGH_1;
2846         else if (pkt_rt < BNA_PKT_RATE_60K)
2847                 load = BNA_LOAD_T_HIGH_2;
2848         else if (pkt_rt < BNA_PKT_RATE_80K)
2849                 load = BNA_LOAD_T_HIGH_3;
2850         else
2851                 load = BNA_LOAD_T_HIGH_4;
2852
2853         if (small_rt > (large_rt << 1))
2854                 bias = 0;
2855         else
2856                 bias = 1;
2857
2858         ccb->pkt_rate.small_pkt_cnt = 0;
2859         ccb->pkt_rate.large_pkt_cnt = 0;
2860
2861         coalescing_timeo = bna->rx_mod.dim_vector[load][bias];
2862         ccb->rx_coalescing_timeo = coalescing_timeo;
2863
2864         /* Set it to IB */
2865         bna_ib_coalescing_timeo_set(&ccb->cq->ib, coalescing_timeo);
2866 }
2867
2868 const u32 bna_napi_dim_vector[BNA_LOAD_T_MAX][BNA_BIAS_T_MAX] = {
2869         {12, 12},
2870         {6, 10},
2871         {5, 10},
2872         {4, 8},
2873         {3, 6},
2874         {3, 6},
2875         {2, 4},
2876         {1, 2},
2877 };
2878
2879 /* TX */
2880
2881 #define call_tx_stop_cbfn(tx)                                           \
2882 do {                                                                    \
2883         if ((tx)->stop_cbfn) {                                          \
2884                 void (*cbfn)(void *, struct bna_tx *);          \
2885                 void *cbarg;                                            \
2886                 cbfn = (tx)->stop_cbfn;                                 \
2887                 cbarg = (tx)->stop_cbarg;                               \
2888                 (tx)->stop_cbfn = NULL;                                 \
2889                 (tx)->stop_cbarg = NULL;                                \
2890                 cbfn(cbarg, (tx));                                      \
2891         }                                                               \
2892 } while (0)
2893
2894 static void bna_tx_mod_cb_tx_stopped(void *tx_mod, struct bna_tx *tx);
2895 static void bna_bfi_tx_enet_start(struct bna_tx *tx);
2896 static void bna_tx_enet_stop(struct bna_tx *tx);
2897
2898 enum bna_tx_event {
2899         TX_E_START                      = 1,
2900         TX_E_STOP                       = 2,
2901         TX_E_FAIL                       = 3,
2902         TX_E_STARTED                    = 4,
2903         TX_E_STOPPED                    = 5,
2904         TX_E_PRIO_CHANGE                = 6,
2905         TX_E_CLEANUP_DONE               = 7,
2906         TX_E_BW_UPDATE                  = 8,
2907 };
2908
2909 bfa_fsm_state_decl(bna_tx, stopped, struct bna_tx, enum bna_tx_event);
2910 bfa_fsm_state_decl(bna_tx, start_wait, struct bna_tx, enum bna_tx_event);
2911 bfa_fsm_state_decl(bna_tx, started, struct bna_tx, enum bna_tx_event);
2912 bfa_fsm_state_decl(bna_tx, stop_wait, struct bna_tx, enum bna_tx_event);
2913 bfa_fsm_state_decl(bna_tx, cleanup_wait, struct bna_tx,
2914                         enum bna_tx_event);
2915 bfa_fsm_state_decl(bna_tx, prio_stop_wait, struct bna_tx,
2916                         enum bna_tx_event);
2917 bfa_fsm_state_decl(bna_tx, prio_cleanup_wait, struct bna_tx,
2918                         enum bna_tx_event);
2919 bfa_fsm_state_decl(bna_tx, failed, struct bna_tx, enum bna_tx_event);
2920 bfa_fsm_state_decl(bna_tx, quiesce_wait, struct bna_tx,
2921                         enum bna_tx_event);
2922
2923 static void
2924 bna_tx_sm_stopped_entry(struct bna_tx *tx)
2925 {
2926         call_tx_stop_cbfn(tx);
2927 }
2928
2929 static void
2930 bna_tx_sm_stopped(struct bna_tx *tx, enum bna_tx_event event)
2931 {
2932         switch (event) {
2933         case TX_E_START:
2934                 bfa_fsm_set_state(tx, bna_tx_sm_start_wait);
2935                 break;
2936
2937         case TX_E_STOP:
2938                 call_tx_stop_cbfn(tx);
2939                 break;
2940
2941         case TX_E_FAIL:
2942                 /* No-op */
2943                 break;
2944
2945         case TX_E_PRIO_CHANGE:
2946                 break;
2947
2948         case TX_E_BW_UPDATE:
2949                 /* No-op */
2950                 break;
2951
2952         default:
2953                 bfa_sm_fault(event);
2954         }
2955 }
2956
2957 static void
2958 bna_tx_sm_start_wait_entry(struct bna_tx *tx)
2959 {
2960         bna_bfi_tx_enet_start(tx);
2961 }
2962
2963 static void
2964 bna_tx_sm_start_wait(struct bna_tx *tx, enum bna_tx_event event)
2965 {
2966         switch (event) {
2967         case TX_E_STOP:
2968                 tx->flags &= ~(BNA_TX_F_PRIO_CHANGED | BNA_TX_F_BW_UPDATED);
2969                 bfa_fsm_set_state(tx, bna_tx_sm_stop_wait);
2970                 break;
2971
2972         case TX_E_FAIL:
2973                 tx->flags &= ~(BNA_TX_F_PRIO_CHANGED | BNA_TX_F_BW_UPDATED);
2974                 bfa_fsm_set_state(tx, bna_tx_sm_stopped);
2975                 break;
2976
2977         case TX_E_STARTED:
2978                 if (tx->flags & (BNA_TX_F_PRIO_CHANGED | BNA_TX_F_BW_UPDATED)) {
2979                         tx->flags &= ~(BNA_TX_F_PRIO_CHANGED |
2980                                 BNA_TX_F_BW_UPDATED);
2981                         bfa_fsm_set_state(tx, bna_tx_sm_prio_stop_wait);
2982                 } else
2983                         bfa_fsm_set_state(tx, bna_tx_sm_started);
2984                 break;
2985
2986         case TX_E_PRIO_CHANGE:
2987                 tx->flags |=  BNA_TX_F_PRIO_CHANGED;
2988                 break;
2989
2990         case TX_E_BW_UPDATE:
2991                 tx->flags |= BNA_TX_F_BW_UPDATED;
2992                 break;
2993
2994         default:
2995                 bfa_sm_fault(event);
2996         }
2997 }
2998
2999 static void
3000 bna_tx_sm_started_entry(struct bna_tx *tx)
3001 {
3002         struct bna_txq *txq;
3003         struct list_head                 *qe;
3004         int is_regular = (tx->type == BNA_TX_T_REGULAR);
3005
3006         list_for_each(qe, &tx->txq_q) {
3007                 txq = (struct bna_txq *)qe;
3008                 txq->tcb->priority = txq->priority;
3009                 /* Start IB */
3010                 bna_ib_start(tx->bna, &txq->ib, is_regular);
3011         }
3012         tx->tx_resume_cbfn(tx->bna->bnad, tx);
3013 }
3014
3015 static void
3016 bna_tx_sm_started(struct bna_tx *tx, enum bna_tx_event event)
3017 {
3018         switch (event) {
3019         case TX_E_STOP:
3020                 bfa_fsm_set_state(tx, bna_tx_sm_stop_wait);
3021                 tx->tx_stall_cbfn(tx->bna->bnad, tx);
3022                 bna_tx_enet_stop(tx);
3023                 break;
3024
3025         case TX_E_FAIL:
3026                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3027                 tx->tx_stall_cbfn(tx->bna->bnad, tx);
3028                 tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
3029                 break;
3030
3031         case TX_E_PRIO_CHANGE:
3032         case TX_E_BW_UPDATE:
3033                 bfa_fsm_set_state(tx, bna_tx_sm_prio_stop_wait);
3034                 break;
3035
3036         default:
3037                 bfa_sm_fault(event);
3038         }
3039 }
3040
3041 static void
3042 bna_tx_sm_stop_wait_entry(struct bna_tx *tx)
3043 {
3044 }
3045
3046 static void
3047 bna_tx_sm_stop_wait(struct bna_tx *tx, enum bna_tx_event event)
3048 {
3049         switch (event) {
3050         case TX_E_FAIL:
3051         case TX_E_STOPPED:
3052                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3053                 tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
3054                 break;
3055
3056         case TX_E_STARTED:
3057                 /**
3058                  * We are here due to start_wait -> stop_wait transition on
3059                  * TX_E_STOP event
3060                  */
3061                 bna_tx_enet_stop(tx);
3062                 break;
3063
3064         case TX_E_PRIO_CHANGE:
3065         case TX_E_BW_UPDATE:
3066                 /* No-op */
3067                 break;
3068
3069         default:
3070                 bfa_sm_fault(event);
3071         }
3072 }
3073
3074 static void
3075 bna_tx_sm_cleanup_wait_entry(struct bna_tx *tx)
3076 {
3077 }
3078
3079 static void
3080 bna_tx_sm_cleanup_wait(struct bna_tx *tx, enum bna_tx_event event)
3081 {
3082         switch (event) {
3083         case TX_E_FAIL:
3084         case TX_E_PRIO_CHANGE:
3085         case TX_E_BW_UPDATE:
3086                 /* No-op */
3087                 break;
3088
3089         case TX_E_CLEANUP_DONE:
3090                 bfa_fsm_set_state(tx, bna_tx_sm_stopped);
3091                 break;
3092
3093         default:
3094                 bfa_sm_fault(event);
3095         }
3096 }
3097
3098 static void
3099 bna_tx_sm_prio_stop_wait_entry(struct bna_tx *tx)
3100 {
3101         tx->tx_stall_cbfn(tx->bna->bnad, tx);
3102         bna_tx_enet_stop(tx);
3103 }
3104
3105 static void
3106 bna_tx_sm_prio_stop_wait(struct bna_tx *tx, enum bna_tx_event event)
3107 {
3108         switch (event) {
3109         case TX_E_STOP:
3110                 bfa_fsm_set_state(tx, bna_tx_sm_stop_wait);
3111                 break;
3112
3113         case TX_E_FAIL:
3114                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3115                 tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
3116                 break;
3117
3118         case TX_E_STOPPED:
3119                 bfa_fsm_set_state(tx, bna_tx_sm_prio_cleanup_wait);
3120                 break;
3121
3122         case TX_E_PRIO_CHANGE:
3123         case TX_E_BW_UPDATE:
3124                 /* No-op */
3125                 break;
3126
3127         default:
3128                 bfa_sm_fault(event);
3129         }
3130 }
3131
3132 static void
3133 bna_tx_sm_prio_cleanup_wait_entry(struct bna_tx *tx)
3134 {
3135         tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
3136 }
3137
3138 static void
3139 bna_tx_sm_prio_cleanup_wait(struct bna_tx *tx, enum bna_tx_event event)
3140 {
3141         switch (event) {
3142         case TX_E_STOP:
3143                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3144                 break;
3145
3146         case TX_E_FAIL:
3147                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3148                 break;
3149
3150         case TX_E_PRIO_CHANGE:
3151         case TX_E_BW_UPDATE:
3152                 /* No-op */
3153                 break;
3154
3155         case TX_E_CLEANUP_DONE:
3156                 bfa_fsm_set_state(tx, bna_tx_sm_start_wait);
3157                 break;
3158
3159         default:
3160                 bfa_sm_fault(event);
3161         }
3162 }
3163
3164 static void
3165 bna_tx_sm_failed_entry(struct bna_tx *tx)
3166 {
3167 }
3168
3169 static void
3170 bna_tx_sm_failed(struct bna_tx *tx, enum bna_tx_event event)
3171 {
3172         switch (event) {
3173         case TX_E_START:
3174                 bfa_fsm_set_state(tx, bna_tx_sm_quiesce_wait);
3175                 break;
3176
3177         case TX_E_STOP:
3178                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3179                 break;
3180
3181         case TX_E_FAIL:
3182                 /* No-op */
3183                 break;
3184
3185         case TX_E_CLEANUP_DONE:
3186                 bfa_fsm_set_state(tx, bna_tx_sm_stopped);
3187                 break;
3188
3189         default:
3190                 bfa_sm_fault(event);
3191         }
3192 }
3193
3194 static void
3195 bna_tx_sm_quiesce_wait_entry(struct bna_tx *tx)
3196 {
3197 }
3198
3199 static void
3200 bna_tx_sm_quiesce_wait(struct bna_tx *tx, enum bna_tx_event event)
3201 {
3202         switch (event) {
3203         case TX_E_STOP:
3204                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3205                 break;
3206
3207         case TX_E_FAIL:
3208                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3209                 break;
3210
3211         case TX_E_CLEANUP_DONE:
3212                 bfa_fsm_set_state(tx, bna_tx_sm_start_wait);
3213                 break;
3214
3215         case TX_E_BW_UPDATE:
3216                 /* No-op */
3217                 break;
3218
3219         default:
3220                 bfa_sm_fault(event);
3221         }
3222 }
3223
3224 static void
3225 bna_bfi_tx_enet_start(struct bna_tx *tx)
3226 {
3227         struct bfi_enet_tx_cfg_req *cfg_req = &tx->bfi_enet_cmd.cfg_req;
3228         struct bna_txq *txq = NULL;
3229         struct list_head *qe;
3230         int i;
3231
3232         bfi_msgq_mhdr_set(cfg_req->mh, BFI_MC_ENET,
3233                 BFI_ENET_H2I_TX_CFG_SET_REQ, 0, tx->rid);
3234         cfg_req->mh.num_entries = htons(
3235                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_tx_cfg_req)));
3236
3237         cfg_req->num_queues = tx->num_txq;
3238         for (i = 0, qe = bfa_q_first(&tx->txq_q);
3239                 i < tx->num_txq;
3240                 i++, qe = bfa_q_next(qe)) {
3241                 txq = (struct bna_txq *)qe;
3242
3243                 bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].q.q, &txq->qpt);
3244                 cfg_req->q_cfg[i].q.priority = txq->priority;
3245
3246                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_lo =
3247                         txq->ib.ib_seg_host_addr.lsb;
3248                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_hi =
3249                         txq->ib.ib_seg_host_addr.msb;
3250                 cfg_req->q_cfg[i].ib.intr.msix_index =
3251                         htons((u16)txq->ib.intr_vector);
3252         }
3253
3254         cfg_req->ib_cfg.int_pkt_dma = BNA_STATUS_T_ENABLED;
3255         cfg_req->ib_cfg.int_enabled = BNA_STATUS_T_ENABLED;
3256         cfg_req->ib_cfg.int_pkt_enabled = BNA_STATUS_T_DISABLED;
3257         cfg_req->ib_cfg.continuous_coalescing = BNA_STATUS_T_ENABLED;
3258         cfg_req->ib_cfg.msix = (txq->ib.intr_type == BNA_INTR_T_MSIX)
3259                                 ? BNA_STATUS_T_ENABLED : BNA_STATUS_T_DISABLED;
3260         cfg_req->ib_cfg.coalescing_timeout =
3261                         htonl((u32)txq->ib.coalescing_timeo);
3262         cfg_req->ib_cfg.inter_pkt_timeout =
3263                         htonl((u32)txq->ib.interpkt_timeo);
3264         cfg_req->ib_cfg.inter_pkt_count = (u8)txq->ib.interpkt_count;
3265
3266         cfg_req->tx_cfg.vlan_mode = BFI_ENET_TX_VLAN_WI;
3267         cfg_req->tx_cfg.vlan_id = htons((u16)tx->txf_vlan_id);
3268         cfg_req->tx_cfg.admit_tagged_frame = BNA_STATUS_T_ENABLED;
3269         cfg_req->tx_cfg.apply_vlan_filter = BNA_STATUS_T_DISABLED;
3270
3271         bfa_msgq_cmd_set(&tx->msgq_cmd, NULL, NULL,
3272                 sizeof(struct bfi_enet_tx_cfg_req), &cfg_req->mh);
3273         bfa_msgq_cmd_post(&tx->bna->msgq, &tx->msgq_cmd);
3274 }
3275
3276 static void
3277 bna_bfi_tx_enet_stop(struct bna_tx *tx)
3278 {
3279         struct bfi_enet_req *req = &tx->bfi_enet_cmd.req;
3280
3281         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
3282                 BFI_ENET_H2I_TX_CFG_CLR_REQ, 0, tx->rid);
3283         req->mh.num_entries = htons(
3284                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_req)));
3285         bfa_msgq_cmd_set(&tx->msgq_cmd, NULL, NULL, sizeof(struct bfi_enet_req),
3286                 &req->mh);
3287         bfa_msgq_cmd_post(&tx->bna->msgq, &tx->msgq_cmd);
3288 }
3289
3290 static void
3291 bna_tx_enet_stop(struct bna_tx *tx)
3292 {
3293         struct bna_txq *txq;
3294         struct list_head                 *qe;
3295
3296         /* Stop IB */
3297         list_for_each(qe, &tx->txq_q) {
3298                 txq = (struct bna_txq *)qe;
3299                 bna_ib_stop(tx->bna, &txq->ib);
3300         }
3301
3302         bna_bfi_tx_enet_stop(tx);
3303 }
3304
3305 static void
3306 bna_txq_qpt_setup(struct bna_txq *txq, int page_count, int page_size,
3307                 struct bna_mem_descr *qpt_mem,
3308                 struct bna_mem_descr *swqpt_mem,
3309                 struct bna_mem_descr *page_mem)
3310 {
3311         u8 *kva;
3312         u64 dma;
3313         struct bna_dma_addr bna_dma;
3314         int i;
3315
3316         txq->qpt.hw_qpt_ptr.lsb = qpt_mem->dma.lsb;
3317         txq->qpt.hw_qpt_ptr.msb = qpt_mem->dma.msb;
3318         txq->qpt.kv_qpt_ptr = qpt_mem->kva;
3319         txq->qpt.page_count = page_count;
3320         txq->qpt.page_size = page_size;
3321
3322         txq->tcb->sw_qpt = (void **) swqpt_mem->kva;
3323         txq->tcb->sw_q = page_mem->kva;
3324
3325         kva = page_mem->kva;
3326         BNA_GET_DMA_ADDR(&page_mem->dma, dma);
3327
3328         for (i = 0; i < page_count; i++) {
3329                 txq->tcb->sw_qpt[i] = kva;
3330                 kva += PAGE_SIZE;
3331
3332                 BNA_SET_DMA_ADDR(dma, &bna_dma);
3333                 ((struct bna_dma_addr *)txq->qpt.kv_qpt_ptr)[i].lsb =
3334                         bna_dma.lsb;
3335                 ((struct bna_dma_addr *)txq->qpt.kv_qpt_ptr)[i].msb =
3336                         bna_dma.msb;
3337                 dma += PAGE_SIZE;
3338         }
3339 }
3340
3341 static struct bna_tx *
3342 bna_tx_get(struct bna_tx_mod *tx_mod, enum bna_tx_type type)
3343 {
3344         struct list_head        *qe = NULL;
3345         struct bna_tx *tx = NULL;
3346
3347         if (list_empty(&tx_mod->tx_free_q))
3348                 return NULL;
3349         if (type == BNA_TX_T_REGULAR) {
3350                 bfa_q_deq(&tx_mod->tx_free_q, &qe);
3351         } else {
3352                 bfa_q_deq_tail(&tx_mod->tx_free_q, &qe);
3353         }
3354         tx = (struct bna_tx *)qe;
3355         bfa_q_qe_init(&tx->qe);
3356         tx->type = type;
3357
3358         return tx;
3359 }
3360
3361 static void
3362 bna_tx_free(struct bna_tx *tx)
3363 {
3364         struct bna_tx_mod *tx_mod = &tx->bna->tx_mod;
3365         struct bna_txq *txq;
3366         struct list_head *prev_qe;
3367         struct list_head *qe;
3368
3369         while (!list_empty(&tx->txq_q)) {
3370                 bfa_q_deq(&tx->txq_q, &txq);
3371                 bfa_q_qe_init(&txq->qe);
3372                 txq->tcb = NULL;
3373                 txq->tx = NULL;
3374                 list_add_tail(&txq->qe, &tx_mod->txq_free_q);
3375         }
3376
3377         list_for_each(qe, &tx_mod->tx_active_q) {
3378                 if (qe == &tx->qe) {
3379                         list_del(&tx->qe);
3380                         bfa_q_qe_init(&tx->qe);
3381                         break;
3382                 }
3383         }
3384
3385         tx->bna = NULL;
3386         tx->priv = NULL;
3387
3388         prev_qe = NULL;
3389         list_for_each(qe, &tx_mod->tx_free_q) {
3390                 if (((struct bna_tx *)qe)->rid < tx->rid)
3391                         prev_qe = qe;
3392                 else {
3393                         break;
3394                 }
3395         }
3396
3397         if (prev_qe == NULL) {
3398                 /* This is the first entry */
3399                 bfa_q_enq_head(&tx_mod->tx_free_q, &tx->qe);
3400         } else if (bfa_q_next(prev_qe) == &tx_mod->tx_free_q) {
3401                 /* This is the last entry */
3402                 list_add_tail(&tx->qe, &tx_mod->tx_free_q);
3403         } else {
3404                 /* Somewhere in the middle */
3405                 bfa_q_next(&tx->qe) = bfa_q_next(prev_qe);
3406                 bfa_q_prev(&tx->qe) = prev_qe;
3407                 bfa_q_next(prev_qe) = &tx->qe;
3408                 bfa_q_prev(bfa_q_next(&tx->qe)) = &tx->qe;
3409         }
3410 }
3411
3412 static void
3413 bna_tx_start(struct bna_tx *tx)
3414 {
3415         tx->flags |= BNA_TX_F_ENET_STARTED;
3416         if (tx->flags & BNA_TX_F_ENABLED)
3417                 bfa_fsm_send_event(tx, TX_E_START);
3418 }
3419
3420 static void
3421 bna_tx_stop(struct bna_tx *tx)
3422 {
3423         tx->stop_cbfn = bna_tx_mod_cb_tx_stopped;
3424         tx->stop_cbarg = &tx->bna->tx_mod;
3425
3426         tx->flags &= ~BNA_TX_F_ENET_STARTED;
3427         bfa_fsm_send_event(tx, TX_E_STOP);
3428 }
3429
3430 static void
3431 bna_tx_fail(struct bna_tx *tx)
3432 {
3433         tx->flags &= ~BNA_TX_F_ENET_STARTED;
3434         bfa_fsm_send_event(tx, TX_E_FAIL);
3435 }
3436
3437 void
3438 bna_bfi_tx_enet_start_rsp(struct bna_tx *tx, struct bfi_msgq_mhdr *msghdr)
3439 {
3440         struct bfi_enet_tx_cfg_rsp *cfg_rsp = &tx->bfi_enet_cmd.cfg_rsp;
3441         struct bna_txq *txq = NULL;
3442         struct list_head *qe;
3443         int i;
3444
3445         bfa_msgq_rsp_copy(&tx->bna->msgq, (u8 *)cfg_rsp,
3446                 sizeof(struct bfi_enet_tx_cfg_rsp));
3447
3448         tx->hw_id = cfg_rsp->hw_id;
3449
3450         for (i = 0, qe = bfa_q_first(&tx->txq_q);
3451                 i < tx->num_txq; i++, qe = bfa_q_next(qe)) {
3452                 txq = (struct bna_txq *)qe;
3453
3454                 /* Setup doorbells */
3455                 txq->tcb->i_dbell->doorbell_addr =
3456                         tx->bna->pcidev.pci_bar_kva
3457                         + ntohl(cfg_rsp->q_handles[i].i_dbell);
3458                 txq->tcb->q_dbell =
3459                         tx->bna->pcidev.pci_bar_kva
3460                         + ntohl(cfg_rsp->q_handles[i].q_dbell);
3461                 txq->hw_id = cfg_rsp->q_handles[i].hw_qid;
3462
3463                 /* Initialize producer/consumer indexes */
3464                 (*txq->tcb->hw_consumer_index) = 0;
3465                 txq->tcb->producer_index = txq->tcb->consumer_index = 0;
3466         }
3467
3468         bfa_fsm_send_event(tx, TX_E_STARTED);
3469 }
3470
3471 void
3472 bna_bfi_tx_enet_stop_rsp(struct bna_tx *tx, struct bfi_msgq_mhdr *msghdr)
3473 {
3474         bfa_fsm_send_event(tx, TX_E_STOPPED);
3475 }
3476
3477 void
3478 bna_bfi_bw_update_aen(struct bna_tx_mod *tx_mod)
3479 {
3480         struct bna_tx *tx;
3481         struct list_head                *qe;
3482
3483         list_for_each(qe, &tx_mod->tx_active_q) {
3484                 tx = (struct bna_tx *)qe;
3485                 bfa_fsm_send_event(tx, TX_E_BW_UPDATE);
3486         }
3487 }
3488
3489 void
3490 bna_tx_res_req(int num_txq, int txq_depth, struct bna_res_info *res_info)
3491 {
3492         u32 q_size;
3493         u32 page_count;
3494         struct bna_mem_info *mem_info;
3495
3496         res_info[BNA_TX_RES_MEM_T_TCB].res_type = BNA_RES_T_MEM;
3497         mem_info = &res_info[BNA_TX_RES_MEM_T_TCB].res_u.mem_info;
3498         mem_info->mem_type = BNA_MEM_T_KVA;
3499         mem_info->len = sizeof(struct bna_tcb);
3500         mem_info->num = num_txq;
3501
3502         q_size = txq_depth * BFI_TXQ_WI_SIZE;
3503         q_size = ALIGN(q_size, PAGE_SIZE);
3504         page_count = q_size >> PAGE_SHIFT;
3505
3506         res_info[BNA_TX_RES_MEM_T_QPT].res_type = BNA_RES_T_MEM;
3507         mem_info = &res_info[BNA_TX_RES_MEM_T_QPT].res_u.mem_info;
3508         mem_info->mem_type = BNA_MEM_T_DMA;
3509         mem_info->len = page_count * sizeof(struct bna_dma_addr);
3510         mem_info->num = num_txq;
3511
3512         res_info[BNA_TX_RES_MEM_T_SWQPT].res_type = BNA_RES_T_MEM;
3513         mem_info = &res_info[BNA_TX_RES_MEM_T_SWQPT].res_u.mem_info;
3514         mem_info->mem_type = BNA_MEM_T_KVA;
3515         mem_info->len = page_count * sizeof(void *);
3516         mem_info->num = num_txq;
3517
3518         res_info[BNA_TX_RES_MEM_T_PAGE].res_type = BNA_RES_T_MEM;
3519         mem_info = &res_info[BNA_TX_RES_MEM_T_PAGE].res_u.mem_info;
3520         mem_info->mem_type = BNA_MEM_T_DMA;
3521         mem_info->len = PAGE_SIZE * page_count;
3522         mem_info->num = num_txq;
3523
3524         res_info[BNA_TX_RES_MEM_T_IBIDX].res_type = BNA_RES_T_MEM;
3525         mem_info = &res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info;
3526         mem_info->mem_type = BNA_MEM_T_DMA;
3527         mem_info->len = BFI_IBIDX_SIZE;
3528         mem_info->num = num_txq;
3529
3530         res_info[BNA_TX_RES_INTR_T_TXCMPL].res_type = BNA_RES_T_INTR;
3531         res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info.intr_type =
3532                         BNA_INTR_T_MSIX;
3533         res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info.num = num_txq;
3534 }
3535
3536 struct bna_tx *
3537 bna_tx_create(struct bna *bna, struct bnad *bnad,
3538                 struct bna_tx_config *tx_cfg,
3539                 const struct bna_tx_event_cbfn *tx_cbfn,
3540                 struct bna_res_info *res_info, void *priv)
3541 {
3542         struct bna_intr_info *intr_info;
3543         struct bna_tx_mod *tx_mod = &bna->tx_mod;
3544         struct bna_tx *tx;
3545         struct bna_txq *txq;
3546         struct list_head *qe;
3547         int page_count;
3548         int i;
3549
3550         intr_info = &res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info;
3551         page_count = (res_info[BNA_TX_RES_MEM_T_PAGE].res_u.mem_info.len) /
3552                                         PAGE_SIZE;
3553
3554         /**
3555          * Get resources
3556          */
3557
3558         if ((intr_info->num != 1) && (intr_info->num != tx_cfg->num_txq))
3559                 return NULL;
3560
3561         /* Tx */
3562
3563         tx = bna_tx_get(tx_mod, tx_cfg->tx_type);
3564         if (!tx)
3565                 return NULL;
3566         tx->bna = bna;
3567         tx->priv = priv;
3568
3569         /* TxQs */
3570
3571         INIT_LIST_HEAD(&tx->txq_q);
3572         for (i = 0; i < tx_cfg->num_txq; i++) {
3573                 if (list_empty(&tx_mod->txq_free_q))
3574                         goto err_return;
3575
3576                 bfa_q_deq(&tx_mod->txq_free_q, &txq);
3577                 bfa_q_qe_init(&txq->qe);
3578                 list_add_tail(&txq->qe, &tx->txq_q);
3579                 txq->tx = tx;
3580         }
3581
3582         /*
3583          * Initialize
3584          */
3585
3586         /* Tx */
3587
3588         tx->tcb_setup_cbfn = tx_cbfn->tcb_setup_cbfn;
3589         tx->tcb_destroy_cbfn = tx_cbfn->tcb_destroy_cbfn;
3590         /* Following callbacks are mandatory */
3591         tx->tx_stall_cbfn = tx_cbfn->tx_stall_cbfn;
3592         tx->tx_resume_cbfn = tx_cbfn->tx_resume_cbfn;
3593         tx->tx_cleanup_cbfn = tx_cbfn->tx_cleanup_cbfn;
3594
3595         list_add_tail(&tx->qe, &tx_mod->tx_active_q);
3596
3597         tx->num_txq = tx_cfg->num_txq;
3598
3599         tx->flags = 0;
3600         if (tx->bna->tx_mod.flags & BNA_TX_MOD_F_ENET_STARTED) {
3601                 switch (tx->type) {
3602                 case BNA_TX_T_REGULAR:
3603                         if (!(tx->bna->tx_mod.flags &
3604                                 BNA_TX_MOD_F_ENET_LOOPBACK))
3605                                 tx->flags |= BNA_TX_F_ENET_STARTED;
3606                         break;
3607                 case BNA_TX_T_LOOPBACK:
3608                         if (tx->bna->tx_mod.flags & BNA_TX_MOD_F_ENET_LOOPBACK)
3609                                 tx->flags |= BNA_TX_F_ENET_STARTED;
3610                         break;
3611                 }
3612         }
3613
3614         /* TxQ */
3615
3616         i = 0;
3617         list_for_each(qe, &tx->txq_q) {
3618                 txq = (struct bna_txq *)qe;
3619                 txq->tcb = (struct bna_tcb *)
3620                 res_info[BNA_TX_RES_MEM_T_TCB].res_u.mem_info.mdl[i].kva;
3621                 txq->tx_packets = 0;
3622                 txq->tx_bytes = 0;
3623
3624                 /* IB */
3625                 txq->ib.ib_seg_host_addr.lsb =
3626                 res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.lsb;
3627                 txq->ib.ib_seg_host_addr.msb =
3628                 res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.msb;
3629                 txq->ib.ib_seg_host_addr_kva =
3630                 res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].kva;
3631                 txq->ib.intr_type = intr_info->intr_type;
3632                 txq->ib.intr_vector = (intr_info->num == 1) ?
3633                                         intr_info->idl[0].vector :
3634                                         intr_info->idl[i].vector;
3635                 if (intr_info->intr_type == BNA_INTR_T_INTX)
3636                         txq->ib.intr_vector = BIT(txq->ib.intr_vector);
3637                 txq->ib.coalescing_timeo = tx_cfg->coalescing_timeo;
3638                 txq->ib.interpkt_timeo = BFI_TX_INTERPKT_TIMEO;
3639                 txq->ib.interpkt_count = BFI_TX_INTERPKT_COUNT;
3640
3641                 /* TCB */
3642
3643                 txq->tcb->q_depth = tx_cfg->txq_depth;
3644                 txq->tcb->unmap_q = (void *)
3645                 res_info[BNA_TX_RES_MEM_T_UNMAPQ].res_u.mem_info.mdl[i].kva;
3646                 txq->tcb->hw_consumer_index =
3647                         (u32 *)txq->ib.ib_seg_host_addr_kva;
3648                 txq->tcb->i_dbell = &txq->ib.door_bell;
3649                 txq->tcb->intr_type = txq->ib.intr_type;
3650                 txq->tcb->intr_vector = txq->ib.intr_vector;
3651                 txq->tcb->txq = txq;
3652                 txq->tcb->bnad = bnad;
3653                 txq->tcb->id = i;
3654
3655                 /* QPT, SWQPT, Pages */
3656                 bna_txq_qpt_setup(txq, page_count, PAGE_SIZE,
3657                         &res_info[BNA_TX_RES_MEM_T_QPT].res_u.mem_info.mdl[i],
3658                         &res_info[BNA_TX_RES_MEM_T_SWQPT].res_u.mem_info.mdl[i],
3659                         &res_info[BNA_TX_RES_MEM_T_PAGE].
3660                                   res_u.mem_info.mdl[i]);
3661
3662                 /* Callback to bnad for setting up TCB */
3663                 if (tx->tcb_setup_cbfn)
3664                         (tx->tcb_setup_cbfn)(bna->bnad, txq->tcb);
3665
3666                 if (tx_cfg->num_txq == BFI_TX_MAX_PRIO)
3667                         txq->priority = txq->tcb->id;
3668                 else
3669                         txq->priority = tx_mod->default_prio;
3670
3671                 i++;
3672         }
3673
3674         tx->txf_vlan_id = 0;
3675
3676         bfa_fsm_set_state(tx, bna_tx_sm_stopped);
3677
3678         tx_mod->rid_mask |= BIT(tx->rid);
3679
3680         return tx;
3681
3682 err_return:
3683         bna_tx_free(tx);
3684         return NULL;
3685 }
3686
3687 void
3688 bna_tx_destroy(struct bna_tx *tx)
3689 {
3690         struct bna_txq *txq;
3691         struct list_head *qe;
3692
3693         list_for_each(qe, &tx->txq_q) {
3694                 txq = (struct bna_txq *)qe;
3695                 if (tx->tcb_destroy_cbfn)
3696                         (tx->tcb_destroy_cbfn)(tx->bna->bnad, txq->tcb);
3697         }
3698
3699         tx->bna->tx_mod.rid_mask &= ~BIT(tx->rid);
3700         bna_tx_free(tx);
3701 }
3702
3703 void
3704 bna_tx_enable(struct bna_tx *tx)
3705 {
3706         if (tx->fsm != (bfa_sm_t)bna_tx_sm_stopped)
3707                 return;
3708
3709         tx->flags |= BNA_TX_F_ENABLED;
3710
3711         if (tx->flags & BNA_TX_F_ENET_STARTED)
3712                 bfa_fsm_send_event(tx, TX_E_START);
3713 }
3714
3715 void
3716 bna_tx_disable(struct bna_tx *tx, enum bna_cleanup_type type,
3717                 void (*cbfn)(void *, struct bna_tx *))
3718 {
3719         if (type == BNA_SOFT_CLEANUP) {
3720                 (*cbfn)(tx->bna->bnad, tx);
3721                 return;
3722         }
3723
3724         tx->stop_cbfn = cbfn;
3725         tx->stop_cbarg = tx->bna->bnad;
3726
3727         tx->flags &= ~BNA_TX_F_ENABLED;
3728
3729         bfa_fsm_send_event(tx, TX_E_STOP);
3730 }
3731
3732 void
3733 bna_tx_cleanup_complete(struct bna_tx *tx)
3734 {
3735         bfa_fsm_send_event(tx, TX_E_CLEANUP_DONE);
3736 }
3737
3738 static void
3739 bna_tx_mod_cb_tx_stopped(void *arg, struct bna_tx *tx)
3740 {
3741         struct bna_tx_mod *tx_mod = (struct bna_tx_mod *)arg;
3742
3743         bfa_wc_down(&tx_mod->tx_stop_wc);
3744 }
3745
3746 static void
3747 bna_tx_mod_cb_tx_stopped_all(void *arg)
3748 {
3749         struct bna_tx_mod *tx_mod = (struct bna_tx_mod *)arg;
3750
3751         if (tx_mod->stop_cbfn)
3752                 tx_mod->stop_cbfn(&tx_mod->bna->enet);
3753         tx_mod->stop_cbfn = NULL;
3754 }
3755
3756 void
3757 bna_tx_mod_init(struct bna_tx_mod *tx_mod, struct bna *bna,
3758                 struct bna_res_info *res_info)
3759 {
3760         int i;
3761
3762         tx_mod->bna = bna;
3763         tx_mod->flags = 0;
3764
3765         tx_mod->tx = (struct bna_tx *)
3766                 res_info[BNA_MOD_RES_MEM_T_TX_ARRAY].res_u.mem_info.mdl[0].kva;
3767         tx_mod->txq = (struct bna_txq *)
3768                 res_info[BNA_MOD_RES_MEM_T_TXQ_ARRAY].res_u.mem_info.mdl[0].kva;
3769
3770         INIT_LIST_HEAD(&tx_mod->tx_free_q);
3771         INIT_LIST_HEAD(&tx_mod->tx_active_q);
3772
3773         INIT_LIST_HEAD(&tx_mod->txq_free_q);
3774
3775         for (i = 0; i < bna->ioceth.attr.num_txq; i++) {
3776                 tx_mod->tx[i].rid = i;
3777                 bfa_q_qe_init(&tx_mod->tx[i].qe);
3778                 list_add_tail(&tx_mod->tx[i].qe, &tx_mod->tx_free_q);
3779                 bfa_q_qe_init(&tx_mod->txq[i].qe);
3780                 list_add_tail(&tx_mod->txq[i].qe, &tx_mod->txq_free_q);
3781         }
3782
3783         tx_mod->prio_map = BFI_TX_PRIO_MAP_ALL;
3784         tx_mod->default_prio = 0;
3785         tx_mod->iscsi_over_cee = BNA_STATUS_T_DISABLED;
3786         tx_mod->iscsi_prio = -1;
3787 }
3788
3789 void
3790 bna_tx_mod_uninit(struct bna_tx_mod *tx_mod)
3791 {
3792         struct list_head                *qe;
3793         int i;
3794
3795         i = 0;
3796         list_for_each(qe, &tx_mod->tx_free_q)
3797                 i++;
3798
3799         i = 0;
3800         list_for_each(qe, &tx_mod->txq_free_q)
3801                 i++;
3802
3803         tx_mod->bna = NULL;
3804 }
3805
3806 void
3807 bna_tx_mod_start(struct bna_tx_mod *tx_mod, enum bna_tx_type type)
3808 {
3809         struct bna_tx *tx;
3810         struct list_head                *qe;
3811
3812         tx_mod->flags |= BNA_TX_MOD_F_ENET_STARTED;
3813         if (type == BNA_TX_T_LOOPBACK)
3814                 tx_mod->flags |= BNA_TX_MOD_F_ENET_LOOPBACK;
3815
3816         list_for_each(qe, &tx_mod->tx_active_q) {
3817                 tx = (struct bna_tx *)qe;
3818                 if (tx->type == type)
3819                         bna_tx_start(tx);
3820         }
3821 }
3822
3823 void
3824 bna_tx_mod_stop(struct bna_tx_mod *tx_mod, enum bna_tx_type type)
3825 {
3826         struct bna_tx *tx;
3827         struct list_head                *qe;
3828
3829         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_STARTED;
3830         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_LOOPBACK;
3831
3832         tx_mod->stop_cbfn = bna_enet_cb_tx_stopped;
3833
3834         bfa_wc_init(&tx_mod->tx_stop_wc, bna_tx_mod_cb_tx_stopped_all, tx_mod);
3835
3836         list_for_each(qe, &tx_mod->tx_active_q) {
3837                 tx = (struct bna_tx *)qe;
3838                 if (tx->type == type) {
3839                         bfa_wc_up(&tx_mod->tx_stop_wc);
3840                         bna_tx_stop(tx);
3841                 }
3842         }
3843
3844         bfa_wc_wait(&tx_mod->tx_stop_wc);
3845 }
3846
3847 void
3848 bna_tx_mod_fail(struct bna_tx_mod *tx_mod)
3849 {
3850         struct bna_tx *tx;
3851         struct list_head                *qe;
3852
3853         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_STARTED;
3854         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_LOOPBACK;
3855
3856         list_for_each(qe, &tx_mod->tx_active_q) {
3857                 tx = (struct bna_tx *)qe;
3858                 bna_tx_fail(tx);
3859         }
3860 }
3861
3862 void
3863 bna_tx_coalescing_timeo_set(struct bna_tx *tx, int coalescing_timeo)
3864 {
3865         struct bna_txq *txq;
3866         struct list_head *qe;
3867
3868         list_for_each(qe, &tx->txq_q) {
3869                 txq = (struct bna_txq *)qe;
3870                 bna_ib_coalescing_timeo_set(&txq->ib, coalescing_timeo);
3871         }
3872 }