1 /**********************************************************************
4 * Contact: support@cavium.com
5 * Please include "LiquidIO" in the subject.
7 * Copyright (c) 2003-2015 Cavium, Inc.
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * This file may also be available under a different license from Cavium.
20 * Contact Cavium, Inc. for more information
21 **********************************************************************/
23 /*! \file liquidio_common.h
24 * \brief Common: Structures and macros used in PCI-NIC package by core and
28 #ifndef __LIQUIDIO_COMMON_H__
29 #define __LIQUIDIO_COMMON_H__
31 #include "octeon_config.h"
33 #define LIQUIDIO_BASE_VERSION "1.4"
34 #define LIQUIDIO_MICRO_VERSION ".1"
35 #define LIQUIDIO_PACKAGE ""
36 #define LIQUIDIO_VERSION "1.4.1"
39 /** Tag types used by Octeon cores in its work. */
40 enum octeon_tag_type {
47 /* pre-defined host->NIC tag values */
48 #define LIO_CONTROL (0x11111110)
49 #define LIO_DATA(i) (0x11111111 + (i))
51 /* Opcodes used by host driver/apps to perform operations on the core.
52 * These are used to identify the major subsystem that the operation
55 #define OPCODE_CORE 0 /* used for generic core operations */
56 #define OPCODE_NIC 1 /* used for NIC operations */
57 #define OPCODE_LAST OPCODE_NIC
59 /* Subcodes are used by host driver/apps to identify the sub-operation
60 * for the core. They only need to by unique for a given subsystem.
62 #define OPCODE_SUBCODE(op, sub) (((op & 0x0f) << 8) | ((sub) & 0x7f))
64 /** OPCODE_CORE subcodes. For future use. */
66 /** OPCODE_NIC subcodes */
68 /* This subcode is sent by core PCI driver to indicate cores are ready. */
69 #define OPCODE_NIC_CORE_DRV_ACTIVE 0x01
70 #define OPCODE_NIC_NW_DATA 0x02 /* network packet data */
71 #define OPCODE_NIC_CMD 0x03
72 #define OPCODE_NIC_INFO 0x04
73 #define OPCODE_NIC_PORT_STATS 0x05
74 #define OPCODE_NIC_MDIO45 0x06
75 #define OPCODE_NIC_TIMESTAMP 0x07
76 #define OPCODE_NIC_INTRMOD_CFG 0x08
77 #define OPCODE_NIC_IF_CFG 0x09
79 #define CORE_DRV_TEST_SCATTER_OP 0xFFF5
81 #define OPCODE_SLOW_PATH(rh) \
82 (OPCODE_SUBCODE(rh->r.opcode, rh->r.subcode) != \
83 OPCODE_SUBCODE(OPCODE_NIC, OPCODE_NIC_NW_DATA))
85 /* Application codes advertised by the core driver initialization packet. */
86 #define CVM_DRV_APP_START 0x0
87 #define CVM_DRV_NO_APP 0
88 #define CVM_DRV_APP_COUNT 0x2
89 #define CVM_DRV_BASE_APP (CVM_DRV_APP_START + 0x0)
90 #define CVM_DRV_NIC_APP (CVM_DRV_APP_START + 0x1)
91 #define CVM_DRV_INVALID_APP (CVM_DRV_APP_START + 0x2)
92 #define CVM_DRV_APP_END (CVM_DRV_INVALID_APP - 1)
94 /* Macro to increment index.
95 * Index is incremented by count; if the sum exceeds
96 * max, index is wrapped-around to the start.
98 #define INCR_INDEX(index, count, max) \
100 if (((index) + (count)) >= (max)) \
101 index = ((index) + (count)) - (max); \
106 #define INCR_INDEX_BY1(index, max) \
108 if ((++(index)) == (max)) \
112 #define DECR_INDEX(index, count, max) \
114 if ((count) > (index)) \
115 index = ((max) - ((count - index))); \
120 #define OCT_BOARD_NAME 32
121 #define OCT_SERIAL_LEN 64
123 /* Structure used by core driver to send indication that the Octeon
124 * application is ready.
126 struct octeon_core_setup {
129 char boardname[OCT_BOARD_NAME];
131 char board_serial_number[OCT_SERIAL_LEN];
139 /*--------------------------- SCATTER GATHER ENTRY -----------------------*/
141 /* The Scatter-Gather List Entry. The scatter or gather component used with
142 * a Octeon input instruction has this format.
144 struct octeon_sg_entry {
145 /** The first 64 bit gives the size of data in each dptr.*/
151 /** The 4 dptr pointers for this entry. */
156 #define OCT_SG_ENTRY_SIZE (sizeof(struct octeon_sg_entry))
158 /* \brief Add size to gather list
159 * @param sg_entry scatter/gather entry
160 * @param size size to add
161 * @param pos position to add it.
163 static inline void add_sg_size(struct octeon_sg_entry *sg_entry,
167 #ifdef __BIG_ENDIAN_BITFIELD
168 sg_entry->u.size[pos] = size;
170 sg_entry->u.size[3 - pos] = size;
174 /*------------------------- End Scatter/Gather ---------------------------*/
176 #define OCTNET_FRM_PTP_HEADER_SIZE 8
178 #define OCTNET_FRM_HEADER_SIZE 22 /* VLAN + Ethernet */
180 #define OCTNET_MIN_FRM_SIZE 64
182 #define OCTNET_MAX_FRM_SIZE (16000 + OCTNET_FRM_HEADER_SIZE)
184 #define OCTNET_DEFAULT_FRM_SIZE (1500 + OCTNET_FRM_HEADER_SIZE)
186 /** NIC Commands are sent using this Octeon Input Queue */
187 #define OCTNET_CMD_Q 0
189 /* NIC Command types */
190 #define OCTNET_CMD_CHANGE_MTU 0x1
191 #define OCTNET_CMD_CHANGE_MACADDR 0x2
192 #define OCTNET_CMD_CHANGE_DEVFLAGS 0x3
193 #define OCTNET_CMD_RX_CTL 0x4
195 #define OCTNET_CMD_SET_MULTI_LIST 0x5
196 #define OCTNET_CMD_CLEAR_STATS 0x6
198 /* command for setting the speed, duplex & autoneg */
199 #define OCTNET_CMD_SET_SETTINGS 0x7
200 #define OCTNET_CMD_SET_FLOW_CTL 0x8
202 #define OCTNET_CMD_MDIO_READ_WRITE 0x9
203 #define OCTNET_CMD_GPIO_ACCESS 0xA
204 #define OCTNET_CMD_LRO_ENABLE 0xB
205 #define OCTNET_CMD_LRO_DISABLE 0xC
206 #define OCTNET_CMD_SET_RSS 0xD
207 #define OCTNET_CMD_WRITE_SA 0xE
208 #define OCTNET_CMD_DELETE_SA 0xF
209 #define OCTNET_CMD_UPDATE_SA 0x12
211 #define OCTNET_CMD_TNL_RX_CSUM_CTL 0x10
212 #define OCTNET_CMD_TNL_TX_CSUM_CTL 0x11
213 #define OCTNET_CMD_IPSECV2_AH_ESP_CTL 0x13
214 #define OCTNET_CMD_VERBOSE_ENABLE 0x14
215 #define OCTNET_CMD_VERBOSE_DISABLE 0x15
217 #define OCTNET_CMD_ENABLE_VLAN_FILTER 0x16
218 #define OCTNET_CMD_ADD_VLAN_FILTER 0x17
219 #define OCTNET_CMD_DEL_VLAN_FILTER 0x18
220 #define OCTNET_CMD_VXLAN_PORT_CONFIG 0x19
221 #define OCTNET_CMD_VXLAN_PORT_ADD 0x0
222 #define OCTNET_CMD_VXLAN_PORT_DEL 0x1
223 #define OCTNET_CMD_RXCSUM_ENABLE 0x0
224 #define OCTNET_CMD_RXCSUM_DISABLE 0x1
225 #define OCTNET_CMD_TXCSUM_ENABLE 0x0
226 #define OCTNET_CMD_TXCSUM_DISABLE 0x1
228 /* RX(packets coming from wire) Checksum verification flags */
230 #define CNNIC_L4SUM_VERIFIED 0x1
231 #define CNNIC_IPSUM_VERIFIED 0x2
232 #define CNNIC_TUN_CSUM_VERIFIED 0x4
233 #define CNNIC_CSUM_VERIFIED (CNNIC_IPSUM_VERIFIED | CNNIC_L4SUM_VERIFIED)
235 /*LROIPV4 and LROIPV6 Flags*/
236 #define OCTNIC_LROIPV4 0x1
237 #define OCTNIC_LROIPV6 0x2
239 /* Interface flags communicated between host driver and core app. */
240 enum octnet_ifflags {
241 OCTNET_IFFLAG_PROMISC = 0x01,
242 OCTNET_IFFLAG_ALLMULTI = 0x02,
243 OCTNET_IFFLAG_MULTICAST = 0x04,
244 OCTNET_IFFLAG_BROADCAST = 0x08,
245 OCTNET_IFFLAG_UNICAST = 0x10
269 #ifdef __BIG_ENDIAN_BITFIELD
272 u64 more:6; /* How many udd words follow the command */
297 #define OCTNET_CMD_SIZE (sizeof(union octnet_cmd))
299 /* Instruction Header(DPI) - for OCTEON-III models */
300 struct octeon_instr_ih3 {
301 #ifdef __BIG_ENDIAN_BITFIELD
306 /** Gather indicator 1=gather*/
309 /** Data length OR no. of entries in gather list */
312 /** Front Data size */
318 /** PKI port kind - PKIND */
328 /** PKI port kind - PKIND */
334 /** Front Data size */
337 /** Data length OR no. of entries in gather list */
340 /** Gather indicator 1=gather*/
349 /* Optional PKI Instruction Header(PKI IH) - for OCTEON-III models */
350 /** BIG ENDIAN format. */
351 struct octeon_instr_pki_ih3 {
352 #ifdef __BIG_ENDIAN_BITFIELD
357 /** Raw mode indicator 1 = RAW */
422 /** Raw mode indicator 1 = RAW */
431 /** Instruction Header */
432 struct octeon_instr_ih2 {
433 #ifdef __BIG_ENDIAN_BITFIELD
434 /** Raw mode indicator 1 = RAW */
437 /** Gather indicator 1=gather*/
440 /** Data length OR no. of entries in gather list */
443 /** Front Data size */
446 /** Packet Order / Work Unit selection (1 of 8)*/
449 /** Core group selection (1 of 16) */
452 /** Short Raw Packet Indicator 1=short raw pkt */
467 /** Short Raw Packet Indicator 1=short raw pkt */
470 /** Core group selection (1 of 16) */
473 /** Packet Order / Work Unit selection (1 of 8)*/
476 /** Front Data size */
479 /** Data length OR no. of entries in gather list */
482 /** Gather indicator 1=gather*/
485 /** Raw mode indicator 1 = RAW */
490 /** Input Request Header */
491 struct octeon_instr_irh {
492 #ifdef __BIG_ENDIAN_BITFIELD
499 u64 ossp:32; /* opcode/subcode specific parameters */
501 u64 ossp:32; /* opcode/subcode specific parameters */
511 /** Return Data Parameters */
512 struct octeon_instr_rdp {
513 #ifdef __BIG_ENDIAN_BITFIELD
524 /** Receive Header */
526 #ifdef __BIG_ENDIAN_BITFIELD
531 u64 len:3; /** additional 64-bit words */
533 u64 ossp:32; /** opcode/subcode specific parameters */
538 u64 len:3; /** additional 64-bit words */
542 u64 csum_verified:3; /** checksum verified. */
543 u64 has_hwtstamp:1; /** Has hardware timestamp. 1 = yes. */
545 u64 has_hash:1; /** Has hash (rth or rss). 1 = yes. */
550 u64 len:3; /** additional 64-bit words */
553 u64 max_nic_ports:10;
561 u64 len:3; /** additional 64-bit words */
569 u64 ossp:32; /** opcode/subcode specific parameters */
571 u64 len:3; /** additional 64-bit words */
576 u64 has_hash:1; /** Has hash (rth or rss). 1 = yes. */
578 u64 has_hwtstamp:1; /** 1 = has hwtstamp */
579 u64 csum_verified:3; /** checksum verified. */
583 u64 len:3; /** additional 64-bit words */
591 u64 max_nic_ports:10;
594 u64 len:3; /** additional 64-bit words */
602 u64 len:3; /** additional 64-bit words */
609 #define OCT_RH_SIZE (sizeof(union octeon_rh))
611 union octnic_packet_params {
614 #ifdef __BIG_ENDIAN_BITFIELD
616 u32 ip_csum:1; /* Perform IP header checksum(s) */
617 /* Perform Outer transport header checksum */
618 u32 transport_csum:1;
619 /* Find tunnel, and perform transport csum. */
621 u32 tsflag:1; /* Timestamp this packet */
622 u32 ipsec_ops:4; /* IPsec operation */
627 u32 transport_csum:1;
634 /** Status of a RGMII Link on Octeon as seen by core driver. */
635 union oct_link_status {
639 #ifdef __BIG_ENDIAN_BITFIELD
663 /** The txpciq info passed to host from the firmware */
669 #ifdef __BIG_ENDIAN_BITFIELD
687 /** The rxpciq info passed to host from the firmware */
693 #ifdef __BIG_ENDIAN_BITFIELD
703 /** Information for a OCTEON ethernet interface shared between core & host. */
704 struct oct_link_info {
705 union oct_link_status link;
708 #ifdef __BIG_ENDIAN_BITFIELD
720 union oct_txpciq txpciq[MAX_IOQS_PER_NICIF];
721 union oct_rxpciq rxpciq[MAX_IOQS_PER_NICIF];
724 #define OCT_LINK_INFO_SIZE (sizeof(struct oct_link_info))
726 struct liquidio_if_cfg_info {
727 u64 iqmask; /** mask for IQs enabled for the port */
728 u64 oqmask; /** mask for OQs enabled for the port */
729 struct oct_link_info linfo; /** initial link information */
730 char liquidio_firmware_version[32];
733 /** Stats for each NIC port in RX direction. */
734 struct nic_rx_stats {
735 /* link-level stats */
742 u64 fifo_err; /* Accounts for over/under-run of buffers */
759 u64 fw_lro_pkts; /* Number of packets that are LROed */
760 u64 fw_lro_octs; /* Number of octets that are LROed */
761 u64 fw_total_lro; /* Number of LRO packets formed */
762 u64 fw_lro_aborts; /* Number of times lRO of packet aborted */
763 u64 fw_lro_aborts_port;
764 u64 fw_lro_aborts_seq;
765 u64 fw_lro_aborts_tsval;
766 u64 fw_lro_aborts_timer;
767 /* intrmod: packet forward rate */
771 /** Stats for each NIC port in RX direction. */
772 struct nic_tx_stats {
773 /* link-level stats */
775 u64 total_bytes_sent;
779 u64 one_collision_sent; /* Packets sent after one collision*/
780 u64 multi_collision_sent; /* Packets sent after multiple collision*/
781 u64 max_collision_fail; /* Packets not sent due to max collisions */
782 u64 max_deferral_fail; /* Packets not sent due to max deferrals */
783 u64 fifo_err; /* Accounts for over/under-run of buffers */
785 u64 total_collisions; /* Total number of collisions detected */
790 u64 fw_total_fwd_bytes;
795 u64 fw_tso; /* number of tso requests */
796 u64 fw_tso_fwd; /* number of packets segmented in tso */
800 struct oct_link_stats {
801 struct nic_rx_stats fromwire;
802 struct nic_tx_stats fromhost;
806 #define LIO68XX_LED_CTRL_ADDR 0x3501
807 #define LIO68XX_LED_CTRL_CFGON 0x1f
808 #define LIO68XX_LED_CTRL_CFGOFF 0x100
809 #define LIO68XX_LED_BEACON_ADDR 0x3508
810 #define LIO68XX_LED_BEACON_CFGON 0x47fd
811 #define LIO68XX_LED_BEACON_CFGOFF 0x11fc
812 #define VITESSE_PHY_GPIO_DRIVEON 0x1
813 #define VITESSE_PHY_GPIO_CFG 0x8
814 #define VITESSE_PHY_GPIO_DRIVEOFF 0x4
815 #define VITESSE_PHY_GPIO_HIGH 0x2
816 #define VITESSE_PHY_GPIO_LOW 0x3
818 struct oct_mdio_cmd {
826 #define OCT_LINK_STATS_SIZE (sizeof(struct oct_link_stats))
828 /* intrmod: max. packet rate threshold */
829 #define LIO_INTRMOD_MAXPKT_RATETHR 196608
830 /* intrmod: min. packet rate threshold */
831 #define LIO_INTRMOD_MINPKT_RATETHR 9216
832 /* intrmod: max. packets to trigger interrupt */
833 #define LIO_INTRMOD_RXMAXCNT_TRIGGER 384
834 /* intrmod: min. packets to trigger interrupt */
835 #define LIO_INTRMOD_RXMINCNT_TRIGGER 1
836 /* intrmod: max. time to trigger interrupt */
837 #define LIO_INTRMOD_RXMAXTMR_TRIGGER 128
838 /* 66xx:intrmod: min. time to trigger interrupt
839 * (value of 1 is optimum for TCP_RR)
841 #define LIO_INTRMOD_RXMINTMR_TRIGGER 1
843 /* intrmod: max. packets to trigger interrupt */
844 #define LIO_INTRMOD_TXMAXCNT_TRIGGER 64
845 /* intrmod: min. packets to trigger interrupt */
846 #define LIO_INTRMOD_TXMINCNT_TRIGGER 0
848 /* intrmod: poll interval in seconds */
849 #define LIO_INTRMOD_CHECK_INTERVAL 1
851 struct oct_intrmod_cfg {
857 u64 rx_maxcnt_trigger;
858 u64 rx_mincnt_trigger;
859 u64 rx_maxtmr_trigger;
860 u64 rx_mintmr_trigger;
861 u64 tx_mincnt_trigger;
862 u64 tx_maxcnt_trigger;
868 #define BASE_QUEUE_NOT_REQUESTED 65535
870 union oct_nic_if_cfg {
873 #ifdef __BIG_ENDIAN_BITFIELD