cxgb4: Add some more details to sge qinfo
[cascardo/linux.git] / drivers / net / ethernet / chelsio / cxgb4 / cxgb4_debugfs.c
1 /*
2  * This file is part of the Chelsio T4 Ethernet driver for Linux.
3  *
4  * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34
35 #include <linux/seq_file.h>
36 #include <linux/debugfs.h>
37 #include <linux/string_helpers.h>
38 #include <linux/sort.h>
39 #include <linux/ctype.h>
40
41 #include "cxgb4.h"
42 #include "t4_regs.h"
43 #include "t4_values.h"
44 #include "t4fw_api.h"
45 #include "cxgb4_debugfs.h"
46 #include "clip_tbl.h"
47 #include "l2t.h"
48
49 /* generic seq_file support for showing a table of size rows x width. */
50 static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
51 {
52         pos -= tb->skip_first;
53         return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
54 }
55
56 static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
57 {
58         struct seq_tab *tb = seq->private;
59
60         if (tb->skip_first && *pos == 0)
61                 return SEQ_START_TOKEN;
62
63         return seq_tab_get_idx(tb, *pos);
64 }
65
66 static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
67 {
68         v = seq_tab_get_idx(seq->private, *pos + 1);
69         if (v)
70                 ++*pos;
71         return v;
72 }
73
74 static void seq_tab_stop(struct seq_file *seq, void *v)
75 {
76 }
77
78 static int seq_tab_show(struct seq_file *seq, void *v)
79 {
80         const struct seq_tab *tb = seq->private;
81
82         return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
83 }
84
85 static const struct seq_operations seq_tab_ops = {
86         .start = seq_tab_start,
87         .next  = seq_tab_next,
88         .stop  = seq_tab_stop,
89         .show  = seq_tab_show
90 };
91
92 struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
93                              unsigned int width, unsigned int have_header,
94                              int (*show)(struct seq_file *seq, void *v, int i))
95 {
96         struct seq_tab *p;
97
98         p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
99         if (p) {
100                 p->show = show;
101                 p->rows = rows;
102                 p->width = width;
103                 p->skip_first = have_header != 0;
104         }
105         return p;
106 }
107
108 /* Trim the size of a seq_tab to the supplied number of rows.  The operation is
109  * irreversible.
110  */
111 static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
112 {
113         if (new_rows > p->rows)
114                 return -EINVAL;
115         p->rows = new_rows;
116         return 0;
117 }
118
119 static int cim_la_show(struct seq_file *seq, void *v, int idx)
120 {
121         if (v == SEQ_START_TOKEN)
122                 seq_puts(seq, "Status   Data      PC     LS0Stat  LS0Addr "
123                          "            LS0Data\n");
124         else {
125                 const u32 *p = v;
126
127                 seq_printf(seq,
128                            "  %02x  %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
129                            (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
130                            p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
131                            p[6], p[7]);
132         }
133         return 0;
134 }
135
136 static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
137 {
138         if (v == SEQ_START_TOKEN) {
139                 seq_puts(seq, "Status   Data      PC\n");
140         } else {
141                 const u32 *p = v;
142
143                 seq_printf(seq, "  %02x   %08x %08x\n", p[5] & 0xff, p[6],
144                            p[7]);
145                 seq_printf(seq, "  %02x   %02x%06x %02x%06x\n",
146                            (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
147                            p[4] & 0xff, p[5] >> 8);
148                 seq_printf(seq, "  %02x   %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
149                            p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
150         }
151         return 0;
152 }
153
154 static int cim_la_show_t6(struct seq_file *seq, void *v, int idx)
155 {
156         if (v == SEQ_START_TOKEN) {
157                 seq_puts(seq, "Status   Inst    Data      PC     LS0Stat  "
158                          "LS0Addr  LS0Data  LS1Stat  LS1Addr  LS1Data\n");
159         } else {
160                 const u32 *p = v;
161
162                 seq_printf(seq, "  %02x   %04x%04x %04x%04x %04x%04x %08x %08x %08x %08x %08x %08x\n",
163                            (p[9] >> 16) & 0xff,       /* Status */
164                            p[9] & 0xffff, p[8] >> 16, /* Inst */
165                            p[8] & 0xffff, p[7] >> 16, /* Data */
166                            p[7] & 0xffff, p[6] >> 16, /* PC */
167                            p[2], p[1], p[0],      /* LS0 Stat, Addr and Data */
168                            p[5], p[4], p[3]);     /* LS1 Stat, Addr and Data */
169         }
170         return 0;
171 }
172
173 static int cim_la_show_pc_t6(struct seq_file *seq, void *v, int idx)
174 {
175         if (v == SEQ_START_TOKEN) {
176                 seq_puts(seq, "Status   Inst    Data      PC\n");
177         } else {
178                 const u32 *p = v;
179
180                 seq_printf(seq, "  %02x   %08x %08x %08x\n",
181                            p[3] & 0xff, p[2], p[1], p[0]);
182                 seq_printf(seq, "  %02x   %02x%06x %02x%06x %02x%06x\n",
183                            (p[6] >> 8) & 0xff, p[6] & 0xff, p[5] >> 8,
184                            p[5] & 0xff, p[4] >> 8, p[4] & 0xff, p[3] >> 8);
185                 seq_printf(seq, "  %02x   %04x%04x %04x%04x %04x%04x\n",
186                            (p[9] >> 16) & 0xff, p[9] & 0xffff, p[8] >> 16,
187                            p[8] & 0xffff, p[7] >> 16, p[7] & 0xffff,
188                            p[6] >> 16);
189         }
190         return 0;
191 }
192
193 static int cim_la_open(struct inode *inode, struct file *file)
194 {
195         int ret;
196         unsigned int cfg;
197         struct seq_tab *p;
198         struct adapter *adap = inode->i_private;
199
200         ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
201         if (ret)
202                 return ret;
203
204         if (is_t6(adap->params.chip)) {
205                 /* +1 to account for integer division of CIMLA_SIZE/10 */
206                 p = seq_open_tab(file, (adap->params.cim_la_size / 10) + 1,
207                                  10 * sizeof(u32), 1,
208                                  cfg & UPDBGLACAPTPCONLY_F ?
209                                         cim_la_show_pc_t6 : cim_la_show_t6);
210         } else {
211                 p = seq_open_tab(file, adap->params.cim_la_size / 8,
212                                  8 * sizeof(u32), 1,
213                                  cfg & UPDBGLACAPTPCONLY_F ? cim_la_show_3in1 :
214                                                              cim_la_show);
215         }
216         if (!p)
217                 return -ENOMEM;
218
219         ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
220         if (ret)
221                 seq_release_private(inode, file);
222         return ret;
223 }
224
225 static const struct file_operations cim_la_fops = {
226         .owner   = THIS_MODULE,
227         .open    = cim_la_open,
228         .read    = seq_read,
229         .llseek  = seq_lseek,
230         .release = seq_release_private
231 };
232
233 static int cim_pif_la_show(struct seq_file *seq, void *v, int idx)
234 {
235         const u32 *p = v;
236
237         if (v == SEQ_START_TOKEN) {
238                 seq_puts(seq, "Cntl ID DataBE   Addr                 Data\n");
239         } else if (idx < CIM_PIFLA_SIZE) {
240                 seq_printf(seq, " %02x  %02x  %04x  %08x %08x%08x%08x%08x\n",
241                            (p[5] >> 22) & 0xff, (p[5] >> 16) & 0x3f,
242                            p[5] & 0xffff, p[4], p[3], p[2], p[1], p[0]);
243         } else {
244                 if (idx == CIM_PIFLA_SIZE)
245                         seq_puts(seq, "\nCntl ID               Data\n");
246                 seq_printf(seq, " %02x  %02x %08x%08x%08x%08x\n",
247                            (p[4] >> 6) & 0xff, p[4] & 0x3f,
248                            p[3], p[2], p[1], p[0]);
249         }
250         return 0;
251 }
252
253 static int cim_pif_la_open(struct inode *inode, struct file *file)
254 {
255         struct seq_tab *p;
256         struct adapter *adap = inode->i_private;
257
258         p = seq_open_tab(file, 2 * CIM_PIFLA_SIZE, 6 * sizeof(u32), 1,
259                          cim_pif_la_show);
260         if (!p)
261                 return -ENOMEM;
262
263         t4_cim_read_pif_la(adap, (u32 *)p->data,
264                            (u32 *)p->data + 6 * CIM_PIFLA_SIZE, NULL, NULL);
265         return 0;
266 }
267
268 static const struct file_operations cim_pif_la_fops = {
269         .owner   = THIS_MODULE,
270         .open    = cim_pif_la_open,
271         .read    = seq_read,
272         .llseek  = seq_lseek,
273         .release = seq_release_private
274 };
275
276 static int cim_ma_la_show(struct seq_file *seq, void *v, int idx)
277 {
278         const u32 *p = v;
279
280         if (v == SEQ_START_TOKEN) {
281                 seq_puts(seq, "\n");
282         } else if (idx < CIM_MALA_SIZE) {
283                 seq_printf(seq, "%02x%08x%08x%08x%08x\n",
284                            p[4], p[3], p[2], p[1], p[0]);
285         } else {
286                 if (idx == CIM_MALA_SIZE)
287                         seq_puts(seq,
288                                  "\nCnt ID Tag UE       Data       RDY VLD\n");
289                 seq_printf(seq, "%3u %2u  %x   %u %08x%08x  %u   %u\n",
290                            (p[2] >> 10) & 0xff, (p[2] >> 7) & 7,
291                            (p[2] >> 3) & 0xf, (p[2] >> 2) & 1,
292                            (p[1] >> 2) | ((p[2] & 3) << 30),
293                            (p[0] >> 2) | ((p[1] & 3) << 30), (p[0] >> 1) & 1,
294                            p[0] & 1);
295         }
296         return 0;
297 }
298
299 static int cim_ma_la_open(struct inode *inode, struct file *file)
300 {
301         struct seq_tab *p;
302         struct adapter *adap = inode->i_private;
303
304         p = seq_open_tab(file, 2 * CIM_MALA_SIZE, 5 * sizeof(u32), 1,
305                          cim_ma_la_show);
306         if (!p)
307                 return -ENOMEM;
308
309         t4_cim_read_ma_la(adap, (u32 *)p->data,
310                           (u32 *)p->data + 5 * CIM_MALA_SIZE);
311         return 0;
312 }
313
314 static const struct file_operations cim_ma_la_fops = {
315         .owner   = THIS_MODULE,
316         .open    = cim_ma_la_open,
317         .read    = seq_read,
318         .llseek  = seq_lseek,
319         .release = seq_release_private
320 };
321
322 static int cim_qcfg_show(struct seq_file *seq, void *v)
323 {
324         static const char * const qname[] = {
325                 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
326                 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
327                 "SGE0-RX", "SGE1-RX"
328         };
329
330         int i;
331         struct adapter *adap = seq->private;
332         u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
333         u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
334         u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
335         u16 thres[CIM_NUM_IBQ];
336         u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
337         u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
338         u32 *p = stat;
339         int cim_num_obq = is_t4(adap->params.chip) ?
340                                 CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
341
342         i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
343                         UP_IBQ_0_SHADOW_RDADDR_A,
344                         ARRAY_SIZE(stat), stat);
345         if (!i) {
346                 if (is_t4(adap->params.chip)) {
347                         i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
348                                         ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
349                         wr = obq_wr_t4;
350                 } else {
351                         i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
352                                         ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
353                         wr = obq_wr_t5;
354                 }
355         }
356         if (i)
357                 return i;
358
359         t4_read_cimq_cfg(adap, base, size, thres);
360
361         seq_printf(seq,
362                    "  Queue  Base  Size Thres  RdPtr WrPtr  SOP  EOP Avail\n");
363         for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
364                 seq_printf(seq, "%7s %5x %5u %5u %6x  %4x %4u %4u %5u\n",
365                            qname[i], base[i], size[i], thres[i],
366                            IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
367                            QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
368                            QUEREMFLITS_G(p[2]) * 16);
369         for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
370                 seq_printf(seq, "%7s %5x %5u %12x  %4x %4u %4u %5u\n",
371                            qname[i], base[i], size[i],
372                            QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
373                            QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
374                            QUEREMFLITS_G(p[2]) * 16);
375         return 0;
376 }
377
378 static int cim_qcfg_open(struct inode *inode, struct file *file)
379 {
380         return single_open(file, cim_qcfg_show, inode->i_private);
381 }
382
383 static const struct file_operations cim_qcfg_fops = {
384         .owner   = THIS_MODULE,
385         .open    = cim_qcfg_open,
386         .read    = seq_read,
387         .llseek  = seq_lseek,
388         .release = single_release,
389 };
390
391 static int cimq_show(struct seq_file *seq, void *v, int idx)
392 {
393         const u32 *p = v;
394
395         seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
396                    p[2], p[3]);
397         return 0;
398 }
399
400 static int cim_ibq_open(struct inode *inode, struct file *file)
401 {
402         int ret;
403         struct seq_tab *p;
404         unsigned int qid = (uintptr_t)inode->i_private & 7;
405         struct adapter *adap = inode->i_private - qid;
406
407         p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
408         if (!p)
409                 return -ENOMEM;
410
411         ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
412         if (ret < 0)
413                 seq_release_private(inode, file);
414         else
415                 ret = 0;
416         return ret;
417 }
418
419 static const struct file_operations cim_ibq_fops = {
420         .owner   = THIS_MODULE,
421         .open    = cim_ibq_open,
422         .read    = seq_read,
423         .llseek  = seq_lseek,
424         .release = seq_release_private
425 };
426
427 static int cim_obq_open(struct inode *inode, struct file *file)
428 {
429         int ret;
430         struct seq_tab *p;
431         unsigned int qid = (uintptr_t)inode->i_private & 7;
432         struct adapter *adap = inode->i_private - qid;
433
434         p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
435         if (!p)
436                 return -ENOMEM;
437
438         ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
439         if (ret < 0) {
440                 seq_release_private(inode, file);
441         } else {
442                 seq_tab_trim(p, ret / 4);
443                 ret = 0;
444         }
445         return ret;
446 }
447
448 static const struct file_operations cim_obq_fops = {
449         .owner   = THIS_MODULE,
450         .open    = cim_obq_open,
451         .read    = seq_read,
452         .llseek  = seq_lseek,
453         .release = seq_release_private
454 };
455
456 struct field_desc {
457         const char *name;
458         unsigned int start;
459         unsigned int width;
460 };
461
462 static void field_desc_show(struct seq_file *seq, u64 v,
463                             const struct field_desc *p)
464 {
465         char buf[32];
466         int line_size = 0;
467
468         while (p->name) {
469                 u64 mask = (1ULL << p->width) - 1;
470                 int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
471                                     ((unsigned long long)v >> p->start) & mask);
472
473                 if (line_size + len >= 79) {
474                         line_size = 8;
475                         seq_puts(seq, "\n        ");
476                 }
477                 seq_printf(seq, "%s ", buf);
478                 line_size += len + 1;
479                 p++;
480         }
481         seq_putc(seq, '\n');
482 }
483
484 static struct field_desc tp_la0[] = {
485         { "RcfOpCodeOut", 60, 4 },
486         { "State", 56, 4 },
487         { "WcfState", 52, 4 },
488         { "RcfOpcSrcOut", 50, 2 },
489         { "CRxError", 49, 1 },
490         { "ERxError", 48, 1 },
491         { "SanityFailed", 47, 1 },
492         { "SpuriousMsg", 46, 1 },
493         { "FlushInputMsg", 45, 1 },
494         { "FlushInputCpl", 44, 1 },
495         { "RssUpBit", 43, 1 },
496         { "RssFilterHit", 42, 1 },
497         { "Tid", 32, 10 },
498         { "InitTcb", 31, 1 },
499         { "LineNumber", 24, 7 },
500         { "Emsg", 23, 1 },
501         { "EdataOut", 22, 1 },
502         { "Cmsg", 21, 1 },
503         { "CdataOut", 20, 1 },
504         { "EreadPdu", 19, 1 },
505         { "CreadPdu", 18, 1 },
506         { "TunnelPkt", 17, 1 },
507         { "RcfPeerFin", 16, 1 },
508         { "RcfReasonOut", 12, 4 },
509         { "TxCchannel", 10, 2 },
510         { "RcfTxChannel", 8, 2 },
511         { "RxEchannel", 6, 2 },
512         { "RcfRxChannel", 5, 1 },
513         { "RcfDataOutSrdy", 4, 1 },
514         { "RxDvld", 3, 1 },
515         { "RxOoDvld", 2, 1 },
516         { "RxCongestion", 1, 1 },
517         { "TxCongestion", 0, 1 },
518         { NULL }
519 };
520
521 static int tp_la_show(struct seq_file *seq, void *v, int idx)
522 {
523         const u64 *p = v;
524
525         field_desc_show(seq, *p, tp_la0);
526         return 0;
527 }
528
529 static int tp_la_show2(struct seq_file *seq, void *v, int idx)
530 {
531         const u64 *p = v;
532
533         if (idx)
534                 seq_putc(seq, '\n');
535         field_desc_show(seq, p[0], tp_la0);
536         if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
537                 field_desc_show(seq, p[1], tp_la0);
538         return 0;
539 }
540
541 static int tp_la_show3(struct seq_file *seq, void *v, int idx)
542 {
543         static struct field_desc tp_la1[] = {
544                 { "CplCmdIn", 56, 8 },
545                 { "CplCmdOut", 48, 8 },
546                 { "ESynOut", 47, 1 },
547                 { "EAckOut", 46, 1 },
548                 { "EFinOut", 45, 1 },
549                 { "ERstOut", 44, 1 },
550                 { "SynIn", 43, 1 },
551                 { "AckIn", 42, 1 },
552                 { "FinIn", 41, 1 },
553                 { "RstIn", 40, 1 },
554                 { "DataIn", 39, 1 },
555                 { "DataInVld", 38, 1 },
556                 { "PadIn", 37, 1 },
557                 { "RxBufEmpty", 36, 1 },
558                 { "RxDdp", 35, 1 },
559                 { "RxFbCongestion", 34, 1 },
560                 { "TxFbCongestion", 33, 1 },
561                 { "TxPktSumSrdy", 32, 1 },
562                 { "RcfUlpType", 28, 4 },
563                 { "Eread", 27, 1 },
564                 { "Ebypass", 26, 1 },
565                 { "Esave", 25, 1 },
566                 { "Static0", 24, 1 },
567                 { "Cread", 23, 1 },
568                 { "Cbypass", 22, 1 },
569                 { "Csave", 21, 1 },
570                 { "CPktOut", 20, 1 },
571                 { "RxPagePoolFull", 18, 2 },
572                 { "RxLpbkPkt", 17, 1 },
573                 { "TxLpbkPkt", 16, 1 },
574                 { "RxVfValid", 15, 1 },
575                 { "SynLearned", 14, 1 },
576                 { "SetDelEntry", 13, 1 },
577                 { "SetInvEntry", 12, 1 },
578                 { "CpcmdDvld", 11, 1 },
579                 { "CpcmdSave", 10, 1 },
580                 { "RxPstructsFull", 8, 2 },
581                 { "EpcmdDvld", 7, 1 },
582                 { "EpcmdFlush", 6, 1 },
583                 { "EpcmdTrimPrefix", 5, 1 },
584                 { "EpcmdTrimPostfix", 4, 1 },
585                 { "ERssIp4Pkt", 3, 1 },
586                 { "ERssIp6Pkt", 2, 1 },
587                 { "ERssTcpUdpPkt", 1, 1 },
588                 { "ERssFceFipPkt", 0, 1 },
589                 { NULL }
590         };
591         static struct field_desc tp_la2[] = {
592                 { "CplCmdIn", 56, 8 },
593                 { "MpsVfVld", 55, 1 },
594                 { "MpsPf", 52, 3 },
595                 { "MpsVf", 44, 8 },
596                 { "SynIn", 43, 1 },
597                 { "AckIn", 42, 1 },
598                 { "FinIn", 41, 1 },
599                 { "RstIn", 40, 1 },
600                 { "DataIn", 39, 1 },
601                 { "DataInVld", 38, 1 },
602                 { "PadIn", 37, 1 },
603                 { "RxBufEmpty", 36, 1 },
604                 { "RxDdp", 35, 1 },
605                 { "RxFbCongestion", 34, 1 },
606                 { "TxFbCongestion", 33, 1 },
607                 { "TxPktSumSrdy", 32, 1 },
608                 { "RcfUlpType", 28, 4 },
609                 { "Eread", 27, 1 },
610                 { "Ebypass", 26, 1 },
611                 { "Esave", 25, 1 },
612                 { "Static0", 24, 1 },
613                 { "Cread", 23, 1 },
614                 { "Cbypass", 22, 1 },
615                 { "Csave", 21, 1 },
616                 { "CPktOut", 20, 1 },
617                 { "RxPagePoolFull", 18, 2 },
618                 { "RxLpbkPkt", 17, 1 },
619                 { "TxLpbkPkt", 16, 1 },
620                 { "RxVfValid", 15, 1 },
621                 { "SynLearned", 14, 1 },
622                 { "SetDelEntry", 13, 1 },
623                 { "SetInvEntry", 12, 1 },
624                 { "CpcmdDvld", 11, 1 },
625                 { "CpcmdSave", 10, 1 },
626                 { "RxPstructsFull", 8, 2 },
627                 { "EpcmdDvld", 7, 1 },
628                 { "EpcmdFlush", 6, 1 },
629                 { "EpcmdTrimPrefix", 5, 1 },
630                 { "EpcmdTrimPostfix", 4, 1 },
631                 { "ERssIp4Pkt", 3, 1 },
632                 { "ERssIp6Pkt", 2, 1 },
633                 { "ERssTcpUdpPkt", 1, 1 },
634                 { "ERssFceFipPkt", 0, 1 },
635                 { NULL }
636         };
637         const u64 *p = v;
638
639         if (idx)
640                 seq_putc(seq, '\n');
641         field_desc_show(seq, p[0], tp_la0);
642         if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
643                 field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
644         return 0;
645 }
646
647 static int tp_la_open(struct inode *inode, struct file *file)
648 {
649         struct seq_tab *p;
650         struct adapter *adap = inode->i_private;
651
652         switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
653         case 2:
654                 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
655                                  tp_la_show2);
656                 break;
657         case 3:
658                 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
659                                  tp_la_show3);
660                 break;
661         default:
662                 p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
663         }
664         if (!p)
665                 return -ENOMEM;
666
667         t4_tp_read_la(adap, (u64 *)p->data, NULL);
668         return 0;
669 }
670
671 static ssize_t tp_la_write(struct file *file, const char __user *buf,
672                            size_t count, loff_t *pos)
673 {
674         int err;
675         char s[32];
676         unsigned long val;
677         size_t size = min(sizeof(s) - 1, count);
678         struct adapter *adap = file_inode(file)->i_private;
679
680         if (copy_from_user(s, buf, size))
681                 return -EFAULT;
682         s[size] = '\0';
683         err = kstrtoul(s, 0, &val);
684         if (err)
685                 return err;
686         if (val > 0xffff)
687                 return -EINVAL;
688         adap->params.tp.la_mask = val << 16;
689         t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
690                          adap->params.tp.la_mask);
691         return count;
692 }
693
694 static const struct file_operations tp_la_fops = {
695         .owner   = THIS_MODULE,
696         .open    = tp_la_open,
697         .read    = seq_read,
698         .llseek  = seq_lseek,
699         .release = seq_release_private,
700         .write   = tp_la_write
701 };
702
703 static int ulprx_la_show(struct seq_file *seq, void *v, int idx)
704 {
705         const u32 *p = v;
706
707         if (v == SEQ_START_TOKEN)
708                 seq_puts(seq, "      Pcmd        Type   Message"
709                          "                Data\n");
710         else
711                 seq_printf(seq, "%08x%08x  %4x  %08x  %08x%08x%08x%08x\n",
712                            p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]);
713         return 0;
714 }
715
716 static int ulprx_la_open(struct inode *inode, struct file *file)
717 {
718         struct seq_tab *p;
719         struct adapter *adap = inode->i_private;
720
721         p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1,
722                          ulprx_la_show);
723         if (!p)
724                 return -ENOMEM;
725
726         t4_ulprx_read_la(adap, (u32 *)p->data);
727         return 0;
728 }
729
730 static const struct file_operations ulprx_la_fops = {
731         .owner   = THIS_MODULE,
732         .open    = ulprx_la_open,
733         .read    = seq_read,
734         .llseek  = seq_lseek,
735         .release = seq_release_private
736 };
737
738 /* Show the PM memory stats.  These stats include:
739  *
740  * TX:
741  *   Read: memory read operation
742  *   Write Bypass: cut-through
743  *   Bypass + mem: cut-through and save copy
744  *
745  * RX:
746  *   Read: memory read
747  *   Write Bypass: cut-through
748  *   Flush: payload trim or drop
749  */
750 static int pm_stats_show(struct seq_file *seq, void *v)
751 {
752         static const char * const tx_pm_stats[] = {
753                 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
754         };
755         static const char * const rx_pm_stats[] = {
756                 "Read:", "Write bypass:", "Write mem:", "Flush:"
757         };
758
759         int i;
760         u32 tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS];
761         u64 tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS];
762         struct adapter *adap = seq->private;
763
764         t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
765         t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
766
767         seq_printf(seq, "%13s %10s  %20s\n", " ", "Tx pcmds", "Tx bytes");
768         for (i = 0; i < PM_NSTATS - 1; i++)
769                 seq_printf(seq, "%-13s %10u  %20llu\n",
770                            tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
771
772         seq_printf(seq, "%13s %10s  %20s\n", " ", "Rx pcmds", "Rx bytes");
773         for (i = 0; i < PM_NSTATS - 1; i++)
774                 seq_printf(seq, "%-13s %10u  %20llu\n",
775                            rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
776         return 0;
777 }
778
779 static int pm_stats_open(struct inode *inode, struct file *file)
780 {
781         return single_open(file, pm_stats_show, inode->i_private);
782 }
783
784 static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
785                               size_t count, loff_t *pos)
786 {
787         struct adapter *adap = file_inode(file)->i_private;
788
789         t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
790         t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
791         return count;
792 }
793
794 static const struct file_operations pm_stats_debugfs_fops = {
795         .owner   = THIS_MODULE,
796         .open    = pm_stats_open,
797         .read    = seq_read,
798         .llseek  = seq_lseek,
799         .release = single_release,
800         .write   = pm_stats_clear
801 };
802
803 static int tx_rate_show(struct seq_file *seq, void *v)
804 {
805         u64 nrate[NCHAN], orate[NCHAN];
806         struct adapter *adap = seq->private;
807
808         t4_get_chan_txrate(adap, nrate, orate);
809         if (adap->params.arch.nchan == NCHAN) {
810                 seq_puts(seq, "              channel 0   channel 1   "
811                          "channel 2   channel 3\n");
812                 seq_printf(seq, "NIC B/s:     %10llu  %10llu  %10llu  %10llu\n",
813                            (unsigned long long)nrate[0],
814                            (unsigned long long)nrate[1],
815                            (unsigned long long)nrate[2],
816                            (unsigned long long)nrate[3]);
817                 seq_printf(seq, "Offload B/s: %10llu  %10llu  %10llu  %10llu\n",
818                            (unsigned long long)orate[0],
819                            (unsigned long long)orate[1],
820                            (unsigned long long)orate[2],
821                            (unsigned long long)orate[3]);
822         } else {
823                 seq_puts(seq, "              channel 0   channel 1\n");
824                 seq_printf(seq, "NIC B/s:     %10llu  %10llu\n",
825                            (unsigned long long)nrate[0],
826                            (unsigned long long)nrate[1]);
827                 seq_printf(seq, "Offload B/s: %10llu  %10llu\n",
828                            (unsigned long long)orate[0],
829                            (unsigned long long)orate[1]);
830         }
831         return 0;
832 }
833
834 DEFINE_SIMPLE_DEBUGFS_FILE(tx_rate);
835
836 static int cctrl_tbl_show(struct seq_file *seq, void *v)
837 {
838         static const char * const dec_fac[] = {
839                 "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
840                 "0.9375" };
841
842         int i;
843         u16 (*incr)[NCCTRL_WIN];
844         struct adapter *adap = seq->private;
845
846         incr = kmalloc(sizeof(*incr) * NMTUS, GFP_KERNEL);
847         if (!incr)
848                 return -ENOMEM;
849
850         t4_read_cong_tbl(adap, incr);
851
852         for (i = 0; i < NCCTRL_WIN; ++i) {
853                 seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i,
854                            incr[0][i], incr[1][i], incr[2][i], incr[3][i],
855                            incr[4][i], incr[5][i], incr[6][i], incr[7][i]);
856                 seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
857                            incr[8][i], incr[9][i], incr[10][i], incr[11][i],
858                            incr[12][i], incr[13][i], incr[14][i], incr[15][i],
859                            adap->params.a_wnd[i],
860                            dec_fac[adap->params.b_wnd[i]]);
861         }
862
863         kfree(incr);
864         return 0;
865 }
866
867 DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl);
868
869 /* Format a value in a unit that differs from the value's native unit by the
870  * given factor.
871  */
872 static char *unit_conv(char *buf, size_t len, unsigned int val,
873                        unsigned int factor)
874 {
875         unsigned int rem = val % factor;
876
877         if (rem == 0) {
878                 snprintf(buf, len, "%u", val / factor);
879         } else {
880                 while (rem % 10 == 0)
881                         rem /= 10;
882                 snprintf(buf, len, "%u.%u", val / factor, rem);
883         }
884         return buf;
885 }
886
887 static int clk_show(struct seq_file *seq, void *v)
888 {
889         char buf[32];
890         struct adapter *adap = seq->private;
891         unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk;  /* in ps */
892         u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
893         unsigned int tre = TIMERRESOLUTION_G(res);
894         unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
895         unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
896
897         seq_printf(seq, "Core clock period: %s ns\n",
898                    unit_conv(buf, sizeof(buf), cclk_ps, 1000));
899         seq_printf(seq, "TP timer tick: %s us\n",
900                    unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
901         seq_printf(seq, "TCP timestamp tick: %s us\n",
902                    unit_conv(buf, sizeof(buf),
903                              (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
904         seq_printf(seq, "DACK tick: %s us\n",
905                    unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
906         seq_printf(seq, "DACK timer: %u us\n",
907                    ((cclk_ps << dack_re) / 1000000) *
908                    t4_read_reg(adap, TP_DACK_TIMER_A));
909         seq_printf(seq, "Retransmit min: %llu us\n",
910                    tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
911         seq_printf(seq, "Retransmit max: %llu us\n",
912                    tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
913         seq_printf(seq, "Persist timer min: %llu us\n",
914                    tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
915         seq_printf(seq, "Persist timer max: %llu us\n",
916                    tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
917         seq_printf(seq, "Keepalive idle timer: %llu us\n",
918                    tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
919         seq_printf(seq, "Keepalive interval: %llu us\n",
920                    tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
921         seq_printf(seq, "Initial SRTT: %llu us\n",
922                    tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
923         seq_printf(seq, "FINWAIT2 timer: %llu us\n",
924                    tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
925
926         return 0;
927 }
928
929 DEFINE_SIMPLE_DEBUGFS_FILE(clk);
930
931 /* Firmware Device Log dump. */
932 static const char * const devlog_level_strings[] = {
933         [FW_DEVLOG_LEVEL_EMERG]         = "EMERG",
934         [FW_DEVLOG_LEVEL_CRIT]          = "CRIT",
935         [FW_DEVLOG_LEVEL_ERR]           = "ERR",
936         [FW_DEVLOG_LEVEL_NOTICE]        = "NOTICE",
937         [FW_DEVLOG_LEVEL_INFO]          = "INFO",
938         [FW_DEVLOG_LEVEL_DEBUG]         = "DEBUG"
939 };
940
941 static const char * const devlog_facility_strings[] = {
942         [FW_DEVLOG_FACILITY_CORE]       = "CORE",
943         [FW_DEVLOG_FACILITY_SCHED]      = "SCHED",
944         [FW_DEVLOG_FACILITY_TIMER]      = "TIMER",
945         [FW_DEVLOG_FACILITY_RES]        = "RES",
946         [FW_DEVLOG_FACILITY_HW]         = "HW",
947         [FW_DEVLOG_FACILITY_FLR]        = "FLR",
948         [FW_DEVLOG_FACILITY_DMAQ]       = "DMAQ",
949         [FW_DEVLOG_FACILITY_PHY]        = "PHY",
950         [FW_DEVLOG_FACILITY_MAC]        = "MAC",
951         [FW_DEVLOG_FACILITY_PORT]       = "PORT",
952         [FW_DEVLOG_FACILITY_VI]         = "VI",
953         [FW_DEVLOG_FACILITY_FILTER]     = "FILTER",
954         [FW_DEVLOG_FACILITY_ACL]        = "ACL",
955         [FW_DEVLOG_FACILITY_TM]         = "TM",
956         [FW_DEVLOG_FACILITY_QFC]        = "QFC",
957         [FW_DEVLOG_FACILITY_DCB]        = "DCB",
958         [FW_DEVLOG_FACILITY_ETH]        = "ETH",
959         [FW_DEVLOG_FACILITY_OFLD]       = "OFLD",
960         [FW_DEVLOG_FACILITY_RI]         = "RI",
961         [FW_DEVLOG_FACILITY_ISCSI]      = "ISCSI",
962         [FW_DEVLOG_FACILITY_FCOE]       = "FCOE",
963         [FW_DEVLOG_FACILITY_FOISCSI]    = "FOISCSI",
964         [FW_DEVLOG_FACILITY_FOFCOE]     = "FOFCOE"
965 };
966
967 /* Information gathered by Device Log Open routine for the display routine.
968  */
969 struct devlog_info {
970         unsigned int nentries;          /* number of entries in log[] */
971         unsigned int first;             /* first [temporal] entry in log[] */
972         struct fw_devlog_e log[0];      /* Firmware Device Log */
973 };
974
975 /* Dump a Firmaware Device Log entry.
976  */
977 static int devlog_show(struct seq_file *seq, void *v)
978 {
979         if (v == SEQ_START_TOKEN)
980                 seq_printf(seq, "%10s  %15s  %8s  %8s  %s\n",
981                            "Seq#", "Tstamp", "Level", "Facility", "Message");
982         else {
983                 struct devlog_info *dinfo = seq->private;
984                 int fidx = (uintptr_t)v - 2;
985                 unsigned long index;
986                 struct fw_devlog_e *e;
987
988                 /* Get a pointer to the log entry to display.  Skip unused log
989                  * entries.
990                  */
991                 index = dinfo->first + fidx;
992                 if (index >= dinfo->nentries)
993                         index -= dinfo->nentries;
994                 e = &dinfo->log[index];
995                 if (e->timestamp == 0)
996                         return 0;
997
998                 /* Print the message.  This depends on the firmware using
999                  * exactly the same formating strings as the kernel so we may
1000                  * eventually have to put a format interpreter in here ...
1001                  */
1002                 seq_printf(seq, "%10d  %15llu  %8s  %8s  ",
1003                            be32_to_cpu(e->seqno),
1004                            be64_to_cpu(e->timestamp),
1005                            (e->level < ARRAY_SIZE(devlog_level_strings)
1006                             ? devlog_level_strings[e->level]
1007                             : "UNKNOWN"),
1008                            (e->facility < ARRAY_SIZE(devlog_facility_strings)
1009                             ? devlog_facility_strings[e->facility]
1010                             : "UNKNOWN"));
1011                 seq_printf(seq, e->fmt,
1012                            be32_to_cpu(e->params[0]),
1013                            be32_to_cpu(e->params[1]),
1014                            be32_to_cpu(e->params[2]),
1015                            be32_to_cpu(e->params[3]),
1016                            be32_to_cpu(e->params[4]),
1017                            be32_to_cpu(e->params[5]),
1018                            be32_to_cpu(e->params[6]),
1019                            be32_to_cpu(e->params[7]));
1020         }
1021         return 0;
1022 }
1023
1024 /* Sequential File Operations for Device Log.
1025  */
1026 static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
1027 {
1028         if (pos > dinfo->nentries)
1029                 return NULL;
1030
1031         return (void *)(uintptr_t)(pos + 1);
1032 }
1033
1034 static void *devlog_start(struct seq_file *seq, loff_t *pos)
1035 {
1036         struct devlog_info *dinfo = seq->private;
1037
1038         return (*pos
1039                 ? devlog_get_idx(dinfo, *pos)
1040                 : SEQ_START_TOKEN);
1041 }
1042
1043 static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
1044 {
1045         struct devlog_info *dinfo = seq->private;
1046
1047         (*pos)++;
1048         return devlog_get_idx(dinfo, *pos);
1049 }
1050
1051 static void devlog_stop(struct seq_file *seq, void *v)
1052 {
1053 }
1054
1055 static const struct seq_operations devlog_seq_ops = {
1056         .start = devlog_start,
1057         .next  = devlog_next,
1058         .stop  = devlog_stop,
1059         .show  = devlog_show
1060 };
1061
1062 /* Set up for reading the firmware's device log.  We read the entire log here
1063  * and then display it incrementally in devlog_show().
1064  */
1065 static int devlog_open(struct inode *inode, struct file *file)
1066 {
1067         struct adapter *adap = inode->i_private;
1068         struct devlog_params *dparams = &adap->params.devlog;
1069         struct devlog_info *dinfo;
1070         unsigned int index;
1071         u32 fseqno;
1072         int ret;
1073
1074         /* If we don't know where the log is we can't do anything.
1075          */
1076         if (dparams->start == 0)
1077                 return -ENXIO;
1078
1079         /* Allocate the space to read in the firmware's device log and set up
1080          * for the iterated call to our display function.
1081          */
1082         dinfo = __seq_open_private(file, &devlog_seq_ops,
1083                                    sizeof(*dinfo) + dparams->size);
1084         if (!dinfo)
1085                 return -ENOMEM;
1086
1087         /* Record the basic log buffer information and read in the raw log.
1088          */
1089         dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
1090         dinfo->first = 0;
1091         spin_lock(&adap->win0_lock);
1092         ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
1093                            dparams->start, dparams->size, (__be32 *)dinfo->log,
1094                            T4_MEMORY_READ);
1095         spin_unlock(&adap->win0_lock);
1096         if (ret) {
1097                 seq_release_private(inode, file);
1098                 return ret;
1099         }
1100
1101         /* Find the earliest (lowest Sequence Number) log entry in the
1102          * circular Device Log.
1103          */
1104         for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
1105                 struct fw_devlog_e *e = &dinfo->log[index];
1106                 __u32 seqno;
1107
1108                 if (e->timestamp == 0)
1109                         continue;
1110
1111                 seqno = be32_to_cpu(e->seqno);
1112                 if (seqno < fseqno) {
1113                         fseqno = seqno;
1114                         dinfo->first = index;
1115                 }
1116         }
1117         return 0;
1118 }
1119
1120 static const struct file_operations devlog_fops = {
1121         .owner   = THIS_MODULE,
1122         .open    = devlog_open,
1123         .read    = seq_read,
1124         .llseek  = seq_lseek,
1125         .release = seq_release_private
1126 };
1127
1128 static int mbox_show(struct seq_file *seq, void *v)
1129 {
1130         static const char * const owner[] = { "none", "FW", "driver",
1131                                               "unknown" };
1132
1133         int i;
1134         unsigned int mbox = (uintptr_t)seq->private & 7;
1135         struct adapter *adap = seq->private - mbox;
1136         void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1137         unsigned int ctrl_reg = (is_t4(adap->params.chip)
1138                                  ? CIM_PF_MAILBOX_CTRL_A
1139                                  : CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A);
1140         void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg);
1141
1142         i = MBOWNER_G(readl(ctrl));
1143         seq_printf(seq, "mailbox owned by %s\n\n", owner[i]);
1144
1145         for (i = 0; i < MBOX_LEN; i += 8)
1146                 seq_printf(seq, "%016llx\n",
1147                            (unsigned long long)readq(addr + i));
1148         return 0;
1149 }
1150
1151 static int mbox_open(struct inode *inode, struct file *file)
1152 {
1153         return single_open(file, mbox_show, inode->i_private);
1154 }
1155
1156 static ssize_t mbox_write(struct file *file, const char __user *buf,
1157                           size_t count, loff_t *pos)
1158 {
1159         int i;
1160         char c = '\n', s[256];
1161         unsigned long long data[8];
1162         const struct inode *ino;
1163         unsigned int mbox;
1164         struct adapter *adap;
1165         void __iomem *addr;
1166         void __iomem *ctrl;
1167
1168         if (count > sizeof(s) - 1 || !count)
1169                 return -EINVAL;
1170         if (copy_from_user(s, buf, count))
1171                 return -EFAULT;
1172         s[count] = '\0';
1173
1174         if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0],
1175                    &data[1], &data[2], &data[3], &data[4], &data[5], &data[6],
1176                    &data[7], &c) < 8 || c != '\n')
1177                 return -EINVAL;
1178
1179         ino = file_inode(file);
1180         mbox = (uintptr_t)ino->i_private & 7;
1181         adap = ino->i_private - mbox;
1182         addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1183         ctrl = addr + MBOX_LEN;
1184
1185         if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
1186                 return -EBUSY;
1187
1188         for (i = 0; i < 8; i++)
1189                 writeq(data[i], addr + 8 * i);
1190
1191         writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
1192         return count;
1193 }
1194
1195 static const struct file_operations mbox_debugfs_fops = {
1196         .owner   = THIS_MODULE,
1197         .open    = mbox_open,
1198         .read    = seq_read,
1199         .llseek  = seq_lseek,
1200         .release = single_release,
1201         .write   = mbox_write
1202 };
1203
1204 static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
1205                           loff_t *ppos)
1206 {
1207         loff_t pos = *ppos;
1208         loff_t avail = file_inode(file)->i_size;
1209         struct adapter *adap = file->private_data;
1210
1211         if (pos < 0)
1212                 return -EINVAL;
1213         if (pos >= avail)
1214                 return 0;
1215         if (count > avail - pos)
1216                 count = avail - pos;
1217
1218         while (count) {
1219                 size_t len;
1220                 int ret, ofst;
1221                 u8 data[256];
1222
1223                 ofst = pos & 3;
1224                 len = min(count + ofst, sizeof(data));
1225                 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
1226                                     (u32 *)data, 1);
1227                 if (ret)
1228                         return ret;
1229
1230                 len -= ofst;
1231                 if (copy_to_user(buf, data + ofst, len))
1232                         return -EFAULT;
1233
1234                 buf += len;
1235                 pos += len;
1236                 count -= len;
1237         }
1238         count = pos - *ppos;
1239         *ppos = pos;
1240         return count;
1241 }
1242
1243 static const struct file_operations flash_debugfs_fops = {
1244         .owner   = THIS_MODULE,
1245         .open    = mem_open,
1246         .read    = flash_read,
1247 };
1248
1249 static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
1250 {
1251         *mask = x | y;
1252         y = (__force u64)cpu_to_be64(y);
1253         memcpy(addr, (char *)&y + 2, ETH_ALEN);
1254 }
1255
1256 static int mps_tcam_show(struct seq_file *seq, void *v)
1257 {
1258         struct adapter *adap = seq->private;
1259         unsigned int chip_ver = CHELSIO_CHIP_VERSION(adap->params.chip);
1260
1261         if (v == SEQ_START_TOKEN) {
1262                 if (adap->params.arch.mps_rplc_size > 128)
1263                         seq_puts(seq, "Idx  Ethernet address     Mask     "
1264                                  "Vld Ports PF  VF                           "
1265                                  "Replication                                "
1266                                  "    P0 P1 P2 P3  ML\n");
1267                 else
1268                         seq_puts(seq, "Idx  Ethernet address     Mask     "
1269                                  "Vld Ports PF  VF              Replication"
1270                                  "               P0 P1 P2 P3  ML\n");
1271         } else {
1272                 u64 mask;
1273                 u8 addr[ETH_ALEN];
1274                 bool replicate;
1275                 unsigned int idx = (uintptr_t)v - 2;
1276                 u64 tcamy, tcamx, val;
1277                 u32 cls_lo, cls_hi, ctl;
1278                 u32 rplc[8] = {0};
1279
1280                 if (chip_ver > CHELSIO_T5) {
1281                         /* CtlCmdType - 0: Read, 1: Write
1282                          * CtlTcamSel - 0: TCAM0, 1: TCAM1
1283                          * CtlXYBitSel- 0: Y bit, 1: X bit
1284                          */
1285
1286                         /* Read tcamy */
1287                         ctl = CTLCMDTYPE_V(0) | CTLXYBITSEL_V(0);
1288                         if (idx < 256)
1289                                 ctl |= CTLTCAMINDEX_V(idx) | CTLTCAMSEL_V(0);
1290                         else
1291                                 ctl |= CTLTCAMINDEX_V(idx - 256) |
1292                                        CTLTCAMSEL_V(1);
1293                         t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1294                         val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1295                         tcamy = DMACH_G(val) << 32;
1296                         tcamy |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1297
1298                         /* Read tcamx. Change the control param */
1299                         ctl |= CTLXYBITSEL_V(1);
1300                         t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1301                         val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1302                         tcamx = DMACH_G(val) << 32;
1303                         tcamx |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1304                 } else {
1305                         tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
1306                         tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
1307                 }
1308
1309                 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
1310                 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
1311
1312                 if (tcamx & tcamy) {
1313                         seq_printf(seq, "%3u         -\n", idx);
1314                         goto out;
1315                 }
1316
1317                 rplc[0] = rplc[1] = rplc[2] = rplc[3] = 0;
1318                 if (chip_ver > CHELSIO_T5)
1319                         replicate = (cls_lo & T6_REPLICATE_F);
1320                 else
1321                         replicate = (cls_lo & REPLICATE_F);
1322
1323                 if (replicate) {
1324                         struct fw_ldst_cmd ldst_cmd;
1325                         int ret;
1326                         struct fw_ldst_mps_rplc mps_rplc;
1327                         u32 ldst_addrspc;
1328
1329                         memset(&ldst_cmd, 0, sizeof(ldst_cmd));
1330                         ldst_addrspc =
1331                                 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MPS);
1332                         ldst_cmd.op_to_addrspace =
1333                                 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
1334                                       FW_CMD_REQUEST_F |
1335                                       FW_CMD_READ_F |
1336                                       ldst_addrspc);
1337                         ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
1338                         ldst_cmd.u.mps.rplc.fid_idx =
1339                                 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
1340                                       FW_LDST_CMD_IDX_V(idx));
1341                         ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
1342                                          sizeof(ldst_cmd), &ldst_cmd);
1343                         if (ret)
1344                                 dev_warn(adap->pdev_dev, "Can't read MPS "
1345                                          "replication map for idx %d: %d\n",
1346                                          idx, -ret);
1347                         else {
1348                                 mps_rplc = ldst_cmd.u.mps.rplc;
1349                                 rplc[0] = ntohl(mps_rplc.rplc31_0);
1350                                 rplc[1] = ntohl(mps_rplc.rplc63_32);
1351                                 rplc[2] = ntohl(mps_rplc.rplc95_64);
1352                                 rplc[3] = ntohl(mps_rplc.rplc127_96);
1353                                 if (adap->params.arch.mps_rplc_size > 128) {
1354                                         rplc[4] = ntohl(mps_rplc.rplc159_128);
1355                                         rplc[5] = ntohl(mps_rplc.rplc191_160);
1356                                         rplc[6] = ntohl(mps_rplc.rplc223_192);
1357                                         rplc[7] = ntohl(mps_rplc.rplc255_224);
1358                                 }
1359                         }
1360                 }
1361
1362                 tcamxy2valmask(tcamx, tcamy, addr, &mask);
1363                 if (chip_ver > CHELSIO_T5)
1364                         seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1365                                    "%012llx%3c   %#x%4u%4d",
1366                                    idx, addr[0], addr[1], addr[2], addr[3],
1367                                    addr[4], addr[5], (unsigned long long)mask,
1368                                    (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1369                                    PORTMAP_G(cls_hi),
1370                                    T6_PF_G(cls_lo),
1371                                    (cls_lo & T6_VF_VALID_F) ?
1372                                    T6_VF_G(cls_lo) : -1);
1373                 else
1374                         seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1375                                    "%012llx%3c   %#x%4u%4d",
1376                                    idx, addr[0], addr[1], addr[2], addr[3],
1377                                    addr[4], addr[5], (unsigned long long)mask,
1378                                    (cls_lo & SRAM_VLD_F) ? 'Y' : 'N',
1379                                    PORTMAP_G(cls_hi),
1380                                    PF_G(cls_lo),
1381                                    (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
1382
1383                 if (replicate) {
1384                         if (adap->params.arch.mps_rplc_size > 128)
1385                                 seq_printf(seq, " %08x %08x %08x %08x "
1386                                            "%08x %08x %08x %08x",
1387                                            rplc[7], rplc[6], rplc[5], rplc[4],
1388                                            rplc[3], rplc[2], rplc[1], rplc[0]);
1389                         else
1390                                 seq_printf(seq, " %08x %08x %08x %08x",
1391                                            rplc[3], rplc[2], rplc[1], rplc[0]);
1392                 } else {
1393                         if (adap->params.arch.mps_rplc_size > 128)
1394                                 seq_printf(seq, "%72c", ' ');
1395                         else
1396                                 seq_printf(seq, "%36c", ' ');
1397                 }
1398
1399                 if (chip_ver > CHELSIO_T5)
1400                         seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1401                                    T6_SRAM_PRIO0_G(cls_lo),
1402                                    T6_SRAM_PRIO1_G(cls_lo),
1403                                    T6_SRAM_PRIO2_G(cls_lo),
1404                                    T6_SRAM_PRIO3_G(cls_lo),
1405                                    (cls_lo >> T6_MULTILISTEN0_S) & 0xf);
1406                 else
1407                         seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1408                                    SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
1409                                    SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
1410                                    (cls_lo >> MULTILISTEN0_S) & 0xf);
1411         }
1412 out:    return 0;
1413 }
1414
1415 static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
1416 {
1417         struct adapter *adap = seq->private;
1418         int max_mac_addr = is_t4(adap->params.chip) ?
1419                                 NUM_MPS_CLS_SRAM_L_INSTANCES :
1420                                 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1421         return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
1422 }
1423
1424 static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
1425 {
1426         return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
1427 }
1428
1429 static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
1430 {
1431         ++*pos;
1432         return mps_tcam_get_idx(seq, *pos);
1433 }
1434
1435 static void mps_tcam_stop(struct seq_file *seq, void *v)
1436 {
1437 }
1438
1439 static const struct seq_operations mps_tcam_seq_ops = {
1440         .start = mps_tcam_start,
1441         .next  = mps_tcam_next,
1442         .stop  = mps_tcam_stop,
1443         .show  = mps_tcam_show
1444 };
1445
1446 static int mps_tcam_open(struct inode *inode, struct file *file)
1447 {
1448         int res = seq_open(file, &mps_tcam_seq_ops);
1449
1450         if (!res) {
1451                 struct seq_file *seq = file->private_data;
1452
1453                 seq->private = inode->i_private;
1454         }
1455         return res;
1456 }
1457
1458 static const struct file_operations mps_tcam_debugfs_fops = {
1459         .owner   = THIS_MODULE,
1460         .open    = mps_tcam_open,
1461         .read    = seq_read,
1462         .llseek  = seq_lseek,
1463         .release = seq_release,
1464 };
1465
1466 /* Display various sensor information.
1467  */
1468 static int sensors_show(struct seq_file *seq, void *v)
1469 {
1470         struct adapter *adap = seq->private;
1471         u32 param[7], val[7];
1472         int ret;
1473
1474         /* Note that if the sensors haven't been initialized and turned on
1475          * we'll get values of 0, so treat those as "<unknown>" ...
1476          */
1477         param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1478                     FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1479                     FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
1480         param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1481                     FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1482                     FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
1483         ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 2,
1484                               param, val);
1485
1486         if (ret < 0 || val[0] == 0)
1487                 seq_puts(seq, "Temperature: <unknown>\n");
1488         else
1489                 seq_printf(seq, "Temperature: %dC\n", val[0]);
1490
1491         if (ret < 0 || val[1] == 0)
1492                 seq_puts(seq, "Core VDD:    <unknown>\n");
1493         else
1494                 seq_printf(seq, "Core VDD:    %dmV\n", val[1]);
1495
1496         return 0;
1497 }
1498
1499 DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
1500
1501 #if IS_ENABLED(CONFIG_IPV6)
1502 static int clip_tbl_open(struct inode *inode, struct file *file)
1503 {
1504         return single_open(file, clip_tbl_show, inode->i_private);
1505 }
1506
1507 static const struct file_operations clip_tbl_debugfs_fops = {
1508         .owner   = THIS_MODULE,
1509         .open    = clip_tbl_open,
1510         .read    = seq_read,
1511         .llseek  = seq_lseek,
1512         .release = single_release
1513 };
1514 #endif
1515
1516 /*RSS Table.
1517  */
1518
1519 static int rss_show(struct seq_file *seq, void *v, int idx)
1520 {
1521         u16 *entry = v;
1522
1523         seq_printf(seq, "%4d:  %4u  %4u  %4u  %4u  %4u  %4u  %4u  %4u\n",
1524                    idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
1525                    entry[5], entry[6], entry[7]);
1526         return 0;
1527 }
1528
1529 static int rss_open(struct inode *inode, struct file *file)
1530 {
1531         int ret;
1532         struct seq_tab *p;
1533         struct adapter *adap = inode->i_private;
1534
1535         p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show);
1536         if (!p)
1537                 return -ENOMEM;
1538
1539         ret = t4_read_rss(adap, (u16 *)p->data);
1540         if (ret)
1541                 seq_release_private(inode, file);
1542
1543         return ret;
1544 }
1545
1546 static const struct file_operations rss_debugfs_fops = {
1547         .owner   = THIS_MODULE,
1548         .open    = rss_open,
1549         .read    = seq_read,
1550         .llseek  = seq_lseek,
1551         .release = seq_release_private
1552 };
1553
1554 /* RSS Configuration.
1555  */
1556
1557 /* Small utility function to return the strings "yes" or "no" if the supplied
1558  * argument is non-zero.
1559  */
1560 static const char *yesno(int x)
1561 {
1562         static const char *yes = "yes";
1563         static const char *no = "no";
1564
1565         return x ? yes : no;
1566 }
1567
1568 static int rss_config_show(struct seq_file *seq, void *v)
1569 {
1570         struct adapter *adapter = seq->private;
1571         static const char * const keymode[] = {
1572                 "global",
1573                 "global and per-VF scramble",
1574                 "per-PF and per-VF scramble",
1575                 "per-VF and per-VF scramble",
1576         };
1577         u32 rssconf;
1578
1579         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
1580         seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
1581         seq_printf(seq, "  Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
1582                                                         TNL4TUPENIPV6_F));
1583         seq_printf(seq, "  Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
1584                                                         TNL2TUPENIPV6_F));
1585         seq_printf(seq, "  Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
1586                                                         TNL4TUPENIPV4_F));
1587         seq_printf(seq, "  Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
1588                                                         TNL2TUPENIPV4_F));
1589         seq_printf(seq, "  TnlTcpSel:     %3s\n", yesno(rssconf & TNLTCPSEL_F));
1590         seq_printf(seq, "  TnlIp6Sel:     %3s\n", yesno(rssconf & TNLIP6SEL_F));
1591         seq_printf(seq, "  TnlVrtSel:     %3s\n", yesno(rssconf & TNLVRTSEL_F));
1592         seq_printf(seq, "  TnlMapEn:      %3s\n", yesno(rssconf & TNLMAPEN_F));
1593         seq_printf(seq, "  OfdHashSave:   %3s\n", yesno(rssconf &
1594                                                         OFDHASHSAVE_F));
1595         seq_printf(seq, "  OfdVrtSel:     %3s\n", yesno(rssconf & OFDVRTSEL_F));
1596         seq_printf(seq, "  OfdMapEn:      %3s\n", yesno(rssconf & OFDMAPEN_F));
1597         seq_printf(seq, "  OfdLkpEn:      %3s\n", yesno(rssconf & OFDLKPEN_F));
1598         seq_printf(seq, "  Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1599                                                         SYN4TUPENIPV6_F));
1600         seq_printf(seq, "  Syn2TupEnIpv6: %3s\n", yesno(rssconf &
1601                                                         SYN2TUPENIPV6_F));
1602         seq_printf(seq, "  Syn4TupEnIpv4: %3s\n", yesno(rssconf &
1603                                                         SYN4TUPENIPV4_F));
1604         seq_printf(seq, "  Syn2TupEnIpv4: %3s\n", yesno(rssconf &
1605                                                         SYN2TUPENIPV4_F));
1606         seq_printf(seq, "  Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1607                                                         SYN4TUPENIPV6_F));
1608         seq_printf(seq, "  SynIp6Sel:     %3s\n", yesno(rssconf & SYNIP6SEL_F));
1609         seq_printf(seq, "  SynVrt6Sel:    %3s\n", yesno(rssconf & SYNVRTSEL_F));
1610         seq_printf(seq, "  SynMapEn:      %3s\n", yesno(rssconf & SYNMAPEN_F));
1611         seq_printf(seq, "  SynLkpEn:      %3s\n", yesno(rssconf & SYNLKPEN_F));
1612         seq_printf(seq, "  ChnEn:         %3s\n", yesno(rssconf &
1613                                                         CHANNELENABLE_F));
1614         seq_printf(seq, "  PrtEn:         %3s\n", yesno(rssconf &
1615                                                         PORTENABLE_F));
1616         seq_printf(seq, "  TnlAllLkp:     %3s\n", yesno(rssconf &
1617                                                         TNLALLLOOKUP_F));
1618         seq_printf(seq, "  VrtEn:         %3s\n", yesno(rssconf &
1619                                                         VIRTENABLE_F));
1620         seq_printf(seq, "  CngEn:         %3s\n", yesno(rssconf &
1621                                                         CONGESTIONENABLE_F));
1622         seq_printf(seq, "  HashToeplitz:  %3s\n", yesno(rssconf &
1623                                                         HASHTOEPLITZ_F));
1624         seq_printf(seq, "  Udp4En:        %3s\n", yesno(rssconf & UDPENABLE_F));
1625         seq_printf(seq, "  Disable:       %3s\n", yesno(rssconf & DISABLE_F));
1626
1627         seq_puts(seq, "\n");
1628
1629         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
1630         seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
1631         seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
1632         seq_printf(seq, "  MaskFilter:    %3d\n", MASKFILTER_G(rssconf));
1633         if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1634                 seq_printf(seq, "  HashAll:     %3s\n",
1635                            yesno(rssconf & HASHALL_F));
1636                 seq_printf(seq, "  HashEth:     %3s\n",
1637                            yesno(rssconf & HASHETH_F));
1638         }
1639         seq_printf(seq, "  UseWireCh:     %3s\n", yesno(rssconf & USEWIRECH_F));
1640
1641         seq_puts(seq, "\n");
1642
1643         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
1644         seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
1645         seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
1646         seq_printf(seq, "  RRCplMapEn:    %3s\n", yesno(rssconf &
1647                                                         RRCPLMAPEN_F));
1648         seq_printf(seq, "  RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
1649
1650         seq_puts(seq, "\n");
1651
1652         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
1653         seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
1654         seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
1655         seq_printf(seq, "  UseWireCh:     %3s\n", yesno(rssconf & USEWIRECH_F));
1656
1657         seq_puts(seq, "\n");
1658
1659         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
1660         seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
1661         if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1662                 seq_printf(seq, "  KeyWrAddrX:     %3d\n",
1663                            KEYWRADDRX_G(rssconf));
1664                 seq_printf(seq, "  KeyExtend:      %3s\n",
1665                            yesno(rssconf & KEYEXTEND_F));
1666         }
1667         seq_printf(seq, "  VfRdRg:        %3s\n", yesno(rssconf & VFRDRG_F));
1668         seq_printf(seq, "  VfRdEn:        %3s\n", yesno(rssconf & VFRDEN_F));
1669         seq_printf(seq, "  VfPerrEn:      %3s\n", yesno(rssconf & VFPERREN_F));
1670         seq_printf(seq, "  KeyPerrEn:     %3s\n", yesno(rssconf & KEYPERREN_F));
1671         seq_printf(seq, "  DisVfVlan:     %3s\n", yesno(rssconf &
1672                                                         DISABLEVLAN_F));
1673         seq_printf(seq, "  EnUpSwt:       %3s\n", yesno(rssconf & ENABLEUP0_F));
1674         seq_printf(seq, "  HashDelay:     %3d\n", HASHDELAY_G(rssconf));
1675         if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
1676                 seq_printf(seq, "  VfWrAddr:      %3d\n", VFWRADDR_G(rssconf));
1677         else
1678                 seq_printf(seq, "  VfWrAddr:      %3d\n",
1679                            T6_VFWRADDR_G(rssconf));
1680         seq_printf(seq, "  KeyMode:       %s\n", keymode[KEYMODE_G(rssconf)]);
1681         seq_printf(seq, "  VfWrEn:        %3s\n", yesno(rssconf & VFWREN_F));
1682         seq_printf(seq, "  KeyWrEn:       %3s\n", yesno(rssconf & KEYWREN_F));
1683         seq_printf(seq, "  KeyWrAddr:     %3d\n", KEYWRADDR_G(rssconf));
1684
1685         seq_puts(seq, "\n");
1686
1687         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
1688         seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
1689         seq_printf(seq, "  ChnCount3:     %3s\n", yesno(rssconf & CHNCOUNT3_F));
1690         seq_printf(seq, "  ChnCount2:     %3s\n", yesno(rssconf & CHNCOUNT2_F));
1691         seq_printf(seq, "  ChnCount1:     %3s\n", yesno(rssconf & CHNCOUNT1_F));
1692         seq_printf(seq, "  ChnCount0:     %3s\n", yesno(rssconf & CHNCOUNT0_F));
1693         seq_printf(seq, "  ChnUndFlow3:   %3s\n", yesno(rssconf &
1694                                                         CHNUNDFLOW3_F));
1695         seq_printf(seq, "  ChnUndFlow2:   %3s\n", yesno(rssconf &
1696                                                         CHNUNDFLOW2_F));
1697         seq_printf(seq, "  ChnUndFlow1:   %3s\n", yesno(rssconf &
1698                                                         CHNUNDFLOW1_F));
1699         seq_printf(seq, "  ChnUndFlow0:   %3s\n", yesno(rssconf &
1700                                                         CHNUNDFLOW0_F));
1701         seq_printf(seq, "  RstChn3:       %3s\n", yesno(rssconf & RSTCHN3_F));
1702         seq_printf(seq, "  RstChn2:       %3s\n", yesno(rssconf & RSTCHN2_F));
1703         seq_printf(seq, "  RstChn1:       %3s\n", yesno(rssconf & RSTCHN1_F));
1704         seq_printf(seq, "  RstChn0:       %3s\n", yesno(rssconf & RSTCHN0_F));
1705         seq_printf(seq, "  UpdVld:        %3s\n", yesno(rssconf & UPDVLD_F));
1706         seq_printf(seq, "  Xoff:          %3s\n", yesno(rssconf & XOFF_F));
1707         seq_printf(seq, "  UpdChn3:       %3s\n", yesno(rssconf & UPDCHN3_F));
1708         seq_printf(seq, "  UpdChn2:       %3s\n", yesno(rssconf & UPDCHN2_F));
1709         seq_printf(seq, "  UpdChn1:       %3s\n", yesno(rssconf & UPDCHN1_F));
1710         seq_printf(seq, "  UpdChn0:       %3s\n", yesno(rssconf & UPDCHN0_F));
1711         seq_printf(seq, "  Queue:         %3d\n", QUEUE_G(rssconf));
1712
1713         return 0;
1714 }
1715
1716 DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
1717
1718 /* RSS Secret Key.
1719  */
1720
1721 static int rss_key_show(struct seq_file *seq, void *v)
1722 {
1723         u32 key[10];
1724
1725         t4_read_rss_key(seq->private, key);
1726         seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
1727                    key[9], key[8], key[7], key[6], key[5], key[4], key[3],
1728                    key[2], key[1], key[0]);
1729         return 0;
1730 }
1731
1732 static int rss_key_open(struct inode *inode, struct file *file)
1733 {
1734         return single_open(file, rss_key_show, inode->i_private);
1735 }
1736
1737 static ssize_t rss_key_write(struct file *file, const char __user *buf,
1738                              size_t count, loff_t *pos)
1739 {
1740         int i, j;
1741         u32 key[10];
1742         char s[100], *p;
1743         struct adapter *adap = file_inode(file)->i_private;
1744
1745         if (count > sizeof(s) - 1)
1746                 return -EINVAL;
1747         if (copy_from_user(s, buf, count))
1748                 return -EFAULT;
1749         for (i = count; i > 0 && isspace(s[i - 1]); i--)
1750                 ;
1751         s[i] = '\0';
1752
1753         for (p = s, i = 9; i >= 0; i--) {
1754                 key[i] = 0;
1755                 for (j = 0; j < 8; j++, p++) {
1756                         if (!isxdigit(*p))
1757                                 return -EINVAL;
1758                         key[i] = (key[i] << 4) | hex2val(*p);
1759                 }
1760         }
1761
1762         t4_write_rss_key(adap, key, -1);
1763         return count;
1764 }
1765
1766 static const struct file_operations rss_key_debugfs_fops = {
1767         .owner   = THIS_MODULE,
1768         .open    = rss_key_open,
1769         .read    = seq_read,
1770         .llseek  = seq_lseek,
1771         .release = single_release,
1772         .write   = rss_key_write
1773 };
1774
1775 /* PF RSS Configuration.
1776  */
1777
1778 struct rss_pf_conf {
1779         u32 rss_pf_map;
1780         u32 rss_pf_mask;
1781         u32 rss_pf_config;
1782 };
1783
1784 static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
1785 {
1786         struct rss_pf_conf *pfconf;
1787
1788         if (v == SEQ_START_TOKEN) {
1789                 /* use the 0th entry to dump the PF Map Index Size */
1790                 pfconf = seq->private + offsetof(struct seq_tab, data);
1791                 seq_printf(seq, "PF Map Index Size = %d\n\n",
1792                            LKPIDXSIZE_G(pfconf->rss_pf_map));
1793
1794                 seq_puts(seq, "     RSS              PF   VF    Hash Tuple Enable         Default\n");
1795                 seq_puts(seq, "     Enable       IPF Mask Mask  IPv6      IPv4      UDP   Queue\n");
1796                 seq_puts(seq, " PF  Map Chn Prt  Map Size Size  Four Two  Four Two  Four  Ch1  Ch0\n");
1797         } else {
1798                 #define G_PFnLKPIDX(map, n) \
1799                         (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
1800                 #define G_PFnMSKSIZE(mask, n) \
1801                         (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
1802
1803                 pfconf = v;
1804                 seq_printf(seq, "%3d  %3s %3s %3s  %3d  %3d  %3d   %3s %3s   %3s %3s   %3s  %3d  %3d\n",
1805                            idx,
1806                            yesno(pfconf->rss_pf_config & MAPENABLE_F),
1807                            yesno(pfconf->rss_pf_config & CHNENABLE_F),
1808                            yesno(pfconf->rss_pf_config & PRTENABLE_F),
1809                            G_PFnLKPIDX(pfconf->rss_pf_map, idx),
1810                            G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
1811                            IVFWIDTH_G(pfconf->rss_pf_config),
1812                            yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
1813                            yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
1814                            yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
1815                            yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
1816                            yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
1817                            CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
1818                            CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
1819
1820                 #undef G_PFnLKPIDX
1821                 #undef G_PFnMSKSIZE
1822         }
1823         return 0;
1824 }
1825
1826 static int rss_pf_config_open(struct inode *inode, struct file *file)
1827 {
1828         struct adapter *adapter = inode->i_private;
1829         struct seq_tab *p;
1830         u32 rss_pf_map, rss_pf_mask;
1831         struct rss_pf_conf *pfconf;
1832         int pf;
1833
1834         p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
1835         if (!p)
1836                 return -ENOMEM;
1837
1838         pfconf = (struct rss_pf_conf *)p->data;
1839         rss_pf_map = t4_read_rss_pf_map(adapter);
1840         rss_pf_mask = t4_read_rss_pf_mask(adapter);
1841         for (pf = 0; pf < 8; pf++) {
1842                 pfconf[pf].rss_pf_map = rss_pf_map;
1843                 pfconf[pf].rss_pf_mask = rss_pf_mask;
1844                 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config);
1845         }
1846         return 0;
1847 }
1848
1849 static const struct file_operations rss_pf_config_debugfs_fops = {
1850         .owner   = THIS_MODULE,
1851         .open    = rss_pf_config_open,
1852         .read    = seq_read,
1853         .llseek  = seq_lseek,
1854         .release = seq_release_private
1855 };
1856
1857 /* VF RSS Configuration.
1858  */
1859
1860 struct rss_vf_conf {
1861         u32 rss_vf_vfl;
1862         u32 rss_vf_vfh;
1863 };
1864
1865 static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
1866 {
1867         if (v == SEQ_START_TOKEN) {
1868                 seq_puts(seq, "     RSS                     Hash Tuple Enable\n");
1869                 seq_puts(seq, "     Enable   IVF  Dis  Enb  IPv6      IPv4      UDP    Def  Secret Key\n");
1870                 seq_puts(seq, " VF  Chn Prt  Map  VLAN  uP  Four Two  Four Two  Four   Que  Idx       Hash\n");
1871         } else {
1872                 struct rss_vf_conf *vfconf = v;
1873
1874                 seq_printf(seq, "%3d  %3s %3s  %3d   %3s %3s   %3s %3s   %3s  %3s   %3s  %4d  %3d %#10x\n",
1875                            idx,
1876                            yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
1877                            yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
1878                            VFLKPIDX_G(vfconf->rss_vf_vfh),
1879                            yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
1880                            yesno(vfconf->rss_vf_vfh & VFUPEN_F),
1881                            yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
1882                            yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
1883                            yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
1884                            yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
1885                            yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
1886                            DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
1887                            KEYINDEX_G(vfconf->rss_vf_vfh),
1888                            vfconf->rss_vf_vfl);
1889         }
1890         return 0;
1891 }
1892
1893 static int rss_vf_config_open(struct inode *inode, struct file *file)
1894 {
1895         struct adapter *adapter = inode->i_private;
1896         struct seq_tab *p;
1897         struct rss_vf_conf *vfconf;
1898         int vf, vfcount = adapter->params.arch.vfcount;
1899
1900         p = seq_open_tab(file, vfcount, sizeof(*vfconf), 1, rss_vf_config_show);
1901         if (!p)
1902                 return -ENOMEM;
1903
1904         vfconf = (struct rss_vf_conf *)p->data;
1905         for (vf = 0; vf < vfcount; vf++) {
1906                 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
1907                                       &vfconf[vf].rss_vf_vfh);
1908         }
1909         return 0;
1910 }
1911
1912 static const struct file_operations rss_vf_config_debugfs_fops = {
1913         .owner   = THIS_MODULE,
1914         .open    = rss_vf_config_open,
1915         .read    = seq_read,
1916         .llseek  = seq_lseek,
1917         .release = seq_release_private
1918 };
1919
1920 /**
1921  * ethqset2pinfo - return port_info of an Ethernet Queue Set
1922  * @adap: the adapter
1923  * @qset: Ethernet Queue Set
1924  */
1925 static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
1926 {
1927         int pidx;
1928
1929         for_each_port(adap, pidx) {
1930                 struct port_info *pi = adap2pinfo(adap, pidx);
1931
1932                 if (qset >= pi->first_qset &&
1933                     qset < pi->first_qset + pi->nqsets)
1934                         return pi;
1935         }
1936
1937         /* should never happen! */
1938         BUG_ON(1);
1939         return NULL;
1940 }
1941
1942 static int sge_qinfo_show(struct seq_file *seq, void *v)
1943 {
1944         struct adapter *adap = seq->private;
1945         int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
1946         int iscsi_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
1947         int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
1948         int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
1949         int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
1950         int i, r = (uintptr_t)v - 1;
1951         int iscsi_idx = r - eth_entries;
1952         int rdma_idx = iscsi_idx - iscsi_entries;
1953         int ciq_idx = rdma_idx - rdma_entries;
1954         int ctrl_idx =  ciq_idx - ciq_entries;
1955         int fq_idx =  ctrl_idx - ctrl_entries;
1956
1957         if (r)
1958                 seq_putc(seq, '\n');
1959
1960 #define S3(fmt_spec, s, v) \
1961 do { \
1962         seq_printf(seq, "%-12s", s); \
1963         for (i = 0; i < n; ++i) \
1964                 seq_printf(seq, " %16" fmt_spec, v); \
1965                 seq_putc(seq, '\n'); \
1966 } while (0)
1967 #define S(s, v) S3("s", s, v)
1968 #define T3(fmt_spec, s, v) S3(fmt_spec, s, tx[i].v)
1969 #define T(s, v) S3("u", s, tx[i].v)
1970 #define TL(s, v) T3("lu", s, v)
1971 #define R3(fmt_spec, s, v) S3(fmt_spec, s, rx[i].v)
1972 #define R(s, v) S3("u", s, rx[i].v)
1973 #define RL(s, v) R3("lu", s, v)
1974
1975         if (r < eth_entries) {
1976                 int base_qset = r * 4;
1977                 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
1978                 const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
1979                 int n = min(4, adap->sge.ethqsets - 4 * r);
1980
1981                 S("QType:", "Ethernet");
1982                 S("Interface:",
1983                   rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
1984                 T("TxQ ID:", q.cntxt_id);
1985                 T("TxQ size:", q.size);
1986                 T("TxQ inuse:", q.in_use);
1987                 T("TxQ CIDX:", q.cidx);
1988                 T("TxQ PIDX:", q.pidx);
1989 #ifdef CONFIG_CHELSIO_T4_DCB
1990                 T("DCB Prio:", dcb_prio);
1991                 S3("u", "DCB PGID:",
1992                    (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
1993                     4*(7-tx[i].dcb_prio)) & 0xf);
1994                 S3("u", "DCB PFC:",
1995                    (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
1996                     1*(7-tx[i].dcb_prio)) & 0x1);
1997 #endif
1998                 R("RspQ ID:", rspq.abs_id);
1999                 R("RspQ size:", rspq.size);
2000                 R("RspQE size:", rspq.iqe_len);
2001                 R("RspQ CIDX:", rspq.cidx);
2002                 R("RspQ Gen:", rspq.gen);
2003                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2004                 S3("u", "Intr pktcnt:",
2005                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2006                 R("FL ID:", fl.cntxt_id);
2007                 R("FL size:", fl.size - 8);
2008                 R("FL pend:", fl.pend_cred);
2009                 R("FL avail:", fl.avail);
2010                 R("FL PIDX:", fl.pidx);
2011                 R("FL CIDX:", fl.cidx);
2012                 RL("RxPackets:", stats.pkts);
2013                 RL("RxCSO:", stats.rx_cso);
2014                 RL("VLANxtract:", stats.vlan_ex);
2015                 RL("LROmerged:", stats.lro_merged);
2016                 RL("LROpackets:", stats.lro_pkts);
2017                 RL("RxDrops:", stats.rx_drops);
2018                 TL("TSO:", tso);
2019                 TL("TxCSO:", tx_cso);
2020                 TL("VLANins:", vlan_ins);
2021                 TL("TxQFull:", q.stops);
2022                 TL("TxQRestarts:", q.restarts);
2023                 TL("TxMapErr:", mapping_err);
2024                 RL("FLAllocErr:", fl.alloc_failed);
2025                 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2026                 RL("FLStarving:", fl.starving);
2027
2028         } else if (iscsi_idx < iscsi_entries) {
2029                 const struct sge_ofld_rxq *rx =
2030                         &adap->sge.ofldrxq[iscsi_idx * 4];
2031                 const struct sge_ofld_txq *tx =
2032                         &adap->sge.ofldtxq[iscsi_idx * 4];
2033                 int n = min(4, adap->sge.ofldqsets - 4 * iscsi_idx);
2034
2035                 S("QType:", "iSCSI");
2036                 T("TxQ ID:", q.cntxt_id);
2037                 T("TxQ size:", q.size);
2038                 T("TxQ inuse:", q.in_use);
2039                 T("TxQ CIDX:", q.cidx);
2040                 T("TxQ PIDX:", q.pidx);
2041                 R("RspQ ID:", rspq.abs_id);
2042                 R("RspQ size:", rspq.size);
2043                 R("RspQE size:", rspq.iqe_len);
2044                 R("RspQ CIDX:", rspq.cidx);
2045                 R("RspQ Gen:", rspq.gen);
2046                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2047                 S3("u", "Intr pktcnt:",
2048                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2049                 R("FL ID:", fl.cntxt_id);
2050                 R("FL size:", fl.size - 8);
2051                 R("FL pend:", fl.pend_cred);
2052                 R("FL avail:", fl.avail);
2053                 R("FL PIDX:", fl.pidx);
2054                 R("FL CIDX:", fl.cidx);
2055                 RL("RxPackets:", stats.pkts);
2056                 RL("RxImmPkts:", stats.imm);
2057                 RL("RxNoMem:", stats.nomem);
2058                 RL("FLAllocErr:", fl.alloc_failed);
2059                 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2060                 RL("FLStarving:", fl.starving);
2061
2062         } else if (rdma_idx < rdma_entries) {
2063                 const struct sge_ofld_rxq *rx =
2064                                 &adap->sge.rdmarxq[rdma_idx * 4];
2065                 int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
2066
2067                 S("QType:", "RDMA-CPL");
2068                 S("Interface:",
2069                   rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2070                 R("RspQ ID:", rspq.abs_id);
2071                 R("RspQ size:", rspq.size);
2072                 R("RspQE size:", rspq.iqe_len);
2073                 R("RspQ CIDX:", rspq.cidx);
2074                 R("RspQ Gen:", rspq.gen);
2075                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2076                 S3("u", "Intr pktcnt:",
2077                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2078                 R("FL ID:", fl.cntxt_id);
2079                 R("FL size:", fl.size - 8);
2080                 R("FL pend:", fl.pend_cred);
2081                 R("FL avail:", fl.avail);
2082                 R("FL PIDX:", fl.pidx);
2083                 R("FL CIDX:", fl.cidx);
2084                 RL("RxPackets:", stats.pkts);
2085                 RL("RxImmPkts:", stats.imm);
2086                 RL("RxNoMem:", stats.nomem);
2087                 RL("FLAllocErr:", fl.alloc_failed);
2088                 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2089                 RL("FLStarving:", fl.starving);
2090
2091         } else if (ciq_idx < ciq_entries) {
2092                 const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
2093                 int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
2094
2095                 S("QType:", "RDMA-CIQ");
2096                 S("Interface:",
2097                   rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2098                 R("RspQ ID:", rspq.abs_id);
2099                 R("RspQ size:", rspq.size);
2100                 R("RspQE size:", rspq.iqe_len);
2101                 R("RspQ CIDX:", rspq.cidx);
2102                 R("RspQ Gen:", rspq.gen);
2103                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2104                 S3("u", "Intr pktcnt:",
2105                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2106                 RL("RxAN:", stats.an);
2107                 RL("RxNoMem:", stats.nomem);
2108
2109         } else if (ctrl_idx < ctrl_entries) {
2110                 const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
2111                 int n = min(4, adap->params.nports - 4 * ctrl_idx);
2112
2113                 S("QType:", "Control");
2114                 T("TxQ ID:", q.cntxt_id);
2115                 T("TxQ size:", q.size);
2116                 T("TxQ inuse:", q.in_use);
2117                 T("TxQ CIDX:", q.cidx);
2118                 T("TxQ PIDX:", q.pidx);
2119                 TL("TxQFull:", q.stops);
2120                 TL("TxQRestarts:", q.restarts);
2121         } else if (fq_idx == 0) {
2122                 const struct sge_rspq *evtq = &adap->sge.fw_evtq;
2123
2124                 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
2125                 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
2126                 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
2127                 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
2128                 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
2129                 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
2130                 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
2131                            qtimer_val(adap, evtq));
2132                 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
2133                            adap->sge.counter_val[evtq->pktcnt_idx]);
2134         }
2135 #undef R
2136 #undef RL
2137 #undef T
2138 #undef TL
2139 #undef S
2140 #undef R3
2141 #undef T3
2142 #undef S3
2143         return 0;
2144 }
2145
2146 static int sge_queue_entries(const struct adapter *adap)
2147 {
2148         return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
2149                DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
2150                DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
2151                DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
2152                DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
2153 }
2154
2155 static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
2156 {
2157         int entries = sge_queue_entries(seq->private);
2158
2159         return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
2160 }
2161
2162 static void sge_queue_stop(struct seq_file *seq, void *v)
2163 {
2164 }
2165
2166 static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
2167 {
2168         int entries = sge_queue_entries(seq->private);
2169
2170         ++*pos;
2171         return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
2172 }
2173
2174 static const struct seq_operations sge_qinfo_seq_ops = {
2175         .start = sge_queue_start,
2176         .next  = sge_queue_next,
2177         .stop  = sge_queue_stop,
2178         .show  = sge_qinfo_show
2179 };
2180
2181 static int sge_qinfo_open(struct inode *inode, struct file *file)
2182 {
2183         int res = seq_open(file, &sge_qinfo_seq_ops);
2184
2185         if (!res) {
2186                 struct seq_file *seq = file->private_data;
2187
2188                 seq->private = inode->i_private;
2189         }
2190         return res;
2191 }
2192
2193 static const struct file_operations sge_qinfo_debugfs_fops = {
2194         .owner   = THIS_MODULE,
2195         .open    = sge_qinfo_open,
2196         .read    = seq_read,
2197         .llseek  = seq_lseek,
2198         .release = seq_release,
2199 };
2200
2201 int mem_open(struct inode *inode, struct file *file)
2202 {
2203         unsigned int mem;
2204         struct adapter *adap;
2205
2206         file->private_data = inode->i_private;
2207
2208         mem = (uintptr_t)file->private_data & 0x3;
2209         adap = file->private_data - mem;
2210
2211         (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
2212
2213         return 0;
2214 }
2215
2216 static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
2217                         loff_t *ppos)
2218 {
2219         loff_t pos = *ppos;
2220         loff_t avail = file_inode(file)->i_size;
2221         unsigned int mem = (uintptr_t)file->private_data & 3;
2222         struct adapter *adap = file->private_data - mem;
2223         __be32 *data;
2224         int ret;
2225
2226         if (pos < 0)
2227                 return -EINVAL;
2228         if (pos >= avail)
2229                 return 0;
2230         if (count > avail - pos)
2231                 count = avail - pos;
2232
2233         data = t4_alloc_mem(count);
2234         if (!data)
2235                 return -ENOMEM;
2236
2237         spin_lock(&adap->win0_lock);
2238         ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
2239         spin_unlock(&adap->win0_lock);
2240         if (ret) {
2241                 t4_free_mem(data);
2242                 return ret;
2243         }
2244         ret = copy_to_user(buf, data, count);
2245
2246         t4_free_mem(data);
2247         if (ret)
2248                 return -EFAULT;
2249
2250         *ppos = pos + count;
2251         return count;
2252 }
2253 static const struct file_operations mem_debugfs_fops = {
2254         .owner   = THIS_MODULE,
2255         .open    = simple_open,
2256         .read    = mem_read,
2257         .llseek  = default_llseek,
2258 };
2259
2260 static void add_debugfs_mem(struct adapter *adap, const char *name,
2261                             unsigned int idx, unsigned int size_mb)
2262 {
2263         debugfs_create_file_size(name, S_IRUSR, adap->debugfs_root,
2264                                  (void *)adap + idx, &mem_debugfs_fops,
2265                                  size_mb << 20);
2266 }
2267
2268 static int blocked_fl_open(struct inode *inode, struct file *file)
2269 {
2270         file->private_data = inode->i_private;
2271         return 0;
2272 }
2273
2274 static ssize_t blocked_fl_read(struct file *filp, char __user *ubuf,
2275                                size_t count, loff_t *ppos)
2276 {
2277         int len;
2278         const struct adapter *adap = filp->private_data;
2279         char *buf;
2280         ssize_t size = (adap->sge.egr_sz + 3) / 4 +
2281                         adap->sge.egr_sz / 32 + 2; /* includes ,/\n/\0 */
2282
2283         buf = kzalloc(size, GFP_KERNEL);
2284         if (!buf)
2285                 return -ENOMEM;
2286
2287         len = snprintf(buf, size - 1, "%*pb\n",
2288                        adap->sge.egr_sz, adap->sge.blocked_fl);
2289         len += sprintf(buf + len, "\n");
2290         size = simple_read_from_buffer(ubuf, count, ppos, buf, len);
2291         t4_free_mem(buf);
2292         return size;
2293 }
2294
2295 static ssize_t blocked_fl_write(struct file *filp, const char __user *ubuf,
2296                                 size_t count, loff_t *ppos)
2297 {
2298         int err;
2299         unsigned long *t;
2300         struct adapter *adap = filp->private_data;
2301
2302         t = kcalloc(BITS_TO_LONGS(adap->sge.egr_sz), sizeof(long), GFP_KERNEL);
2303         if (!t)
2304                 return -ENOMEM;
2305
2306         err = bitmap_parse_user(ubuf, count, t, adap->sge.egr_sz);
2307         if (err)
2308                 return err;
2309
2310         bitmap_copy(adap->sge.blocked_fl, t, adap->sge.egr_sz);
2311         t4_free_mem(t);
2312         return count;
2313 }
2314
2315 static const struct file_operations blocked_fl_fops = {
2316         .owner   = THIS_MODULE,
2317         .open    = blocked_fl_open,
2318         .read    = blocked_fl_read,
2319         .write   = blocked_fl_write,
2320         .llseek  = generic_file_llseek,
2321 };
2322
2323 struct mem_desc {
2324         unsigned int base;
2325         unsigned int limit;
2326         unsigned int idx;
2327 };
2328
2329 static int mem_desc_cmp(const void *a, const void *b)
2330 {
2331         return ((const struct mem_desc *)a)->base -
2332                ((const struct mem_desc *)b)->base;
2333 }
2334
2335 static void mem_region_show(struct seq_file *seq, const char *name,
2336                             unsigned int from, unsigned int to)
2337 {
2338         char buf[40];
2339
2340         string_get_size((u64)to - from + 1, 1, STRING_UNITS_2, buf,
2341                         sizeof(buf));
2342         seq_printf(seq, "%-15s %#x-%#x [%s]\n", name, from, to, buf);
2343 }
2344
2345 static int meminfo_show(struct seq_file *seq, void *v)
2346 {
2347         static const char * const memory[] = { "EDC0:", "EDC1:", "MC:",
2348                                         "MC0:", "MC1:"};
2349         static const char * const region[] = {
2350                 "DBQ contexts:", "IMSG contexts:", "FLM cache:", "TCBs:",
2351                 "Pstructs:", "Timers:", "Rx FL:", "Tx FL:", "Pstruct FL:",
2352                 "Tx payload:", "Rx payload:", "LE hash:", "iSCSI region:",
2353                 "TDDP region:", "TPT region:", "STAG region:", "RQ region:",
2354                 "RQUDP region:", "PBL region:", "TXPBL region:",
2355                 "DBVFIFO region:", "ULPRX state:", "ULPTX state:",
2356                 "On-chip queues:"
2357         };
2358
2359         int i, n;
2360         u32 lo, hi, used, alloc;
2361         struct mem_desc avail[4];
2362         struct mem_desc mem[ARRAY_SIZE(region) + 3];      /* up to 3 holes */
2363         struct mem_desc *md = mem;
2364         struct adapter *adap = seq->private;
2365
2366         for (i = 0; i < ARRAY_SIZE(mem); i++) {
2367                 mem[i].limit = 0;
2368                 mem[i].idx = i;
2369         }
2370
2371         /* Find and sort the populated memory ranges */
2372         i = 0;
2373         lo = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
2374         if (lo & EDRAM0_ENABLE_F) {
2375                 hi = t4_read_reg(adap, MA_EDRAM0_BAR_A);
2376                 avail[i].base = EDRAM0_BASE_G(hi) << 20;
2377                 avail[i].limit = avail[i].base + (EDRAM0_SIZE_G(hi) << 20);
2378                 avail[i].idx = 0;
2379                 i++;
2380         }
2381         if (lo & EDRAM1_ENABLE_F) {
2382                 hi = t4_read_reg(adap, MA_EDRAM1_BAR_A);
2383                 avail[i].base = EDRAM1_BASE_G(hi) << 20;
2384                 avail[i].limit = avail[i].base + (EDRAM1_SIZE_G(hi) << 20);
2385                 avail[i].idx = 1;
2386                 i++;
2387         }
2388
2389         if (is_t5(adap->params.chip)) {
2390                 if (lo & EXT_MEM0_ENABLE_F) {
2391                         hi = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
2392                         avail[i].base = EXT_MEM0_BASE_G(hi) << 20;
2393                         avail[i].limit =
2394                                 avail[i].base + (EXT_MEM0_SIZE_G(hi) << 20);
2395                         avail[i].idx = 3;
2396                         i++;
2397                 }
2398                 if (lo & EXT_MEM1_ENABLE_F) {
2399                         hi = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
2400                         avail[i].base = EXT_MEM1_BASE_G(hi) << 20;
2401                         avail[i].limit =
2402                                 avail[i].base + (EXT_MEM1_SIZE_G(hi) << 20);
2403                         avail[i].idx = 4;
2404                         i++;
2405                 }
2406         } else {
2407                 if (lo & EXT_MEM_ENABLE_F) {
2408                         hi = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
2409                         avail[i].base = EXT_MEM_BASE_G(hi) << 20;
2410                         avail[i].limit =
2411                                 avail[i].base + (EXT_MEM_SIZE_G(hi) << 20);
2412                         avail[i].idx = 2;
2413                         i++;
2414                 }
2415         }
2416         if (!i)                                    /* no memory available */
2417                 return 0;
2418         sort(avail, i, sizeof(struct mem_desc), mem_desc_cmp, NULL);
2419
2420         (md++)->base = t4_read_reg(adap, SGE_DBQ_CTXT_BADDR_A);
2421         (md++)->base = t4_read_reg(adap, SGE_IMSG_CTXT_BADDR_A);
2422         (md++)->base = t4_read_reg(adap, SGE_FLM_CACHE_BADDR_A);
2423         (md++)->base = t4_read_reg(adap, TP_CMM_TCB_BASE_A);
2424         (md++)->base = t4_read_reg(adap, TP_CMM_MM_BASE_A);
2425         (md++)->base = t4_read_reg(adap, TP_CMM_TIMER_BASE_A);
2426         (md++)->base = t4_read_reg(adap, TP_CMM_MM_RX_FLST_BASE_A);
2427         (md++)->base = t4_read_reg(adap, TP_CMM_MM_TX_FLST_BASE_A);
2428         (md++)->base = t4_read_reg(adap, TP_CMM_MM_PS_FLST_BASE_A);
2429
2430         /* the next few have explicit upper bounds */
2431         md->base = t4_read_reg(adap, TP_PMM_TX_BASE_A);
2432         md->limit = md->base - 1 +
2433                     t4_read_reg(adap, TP_PMM_TX_PAGE_SIZE_A) *
2434                     PMTXMAXPAGE_G(t4_read_reg(adap, TP_PMM_TX_MAX_PAGE_A));
2435         md++;
2436
2437         md->base = t4_read_reg(adap, TP_PMM_RX_BASE_A);
2438         md->limit = md->base - 1 +
2439                     t4_read_reg(adap, TP_PMM_RX_PAGE_SIZE_A) *
2440                     PMRXMAXPAGE_G(t4_read_reg(adap, TP_PMM_RX_MAX_PAGE_A));
2441         md++;
2442
2443         if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) {
2444                 if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5) {
2445                         hi = t4_read_reg(adap, LE_DB_TID_HASHBASE_A) / 4;
2446                         md->base = t4_read_reg(adap, LE_DB_HASH_TID_BASE_A);
2447                  } else {
2448                         hi = t4_read_reg(adap, LE_DB_HASH_TID_BASE_A);
2449                         md->base = t4_read_reg(adap,
2450                                                LE_DB_HASH_TBL_BASE_ADDR_A);
2451                 }
2452                 md->limit = 0;
2453         } else {
2454                 md->base = 0;
2455                 md->idx = ARRAY_SIZE(region);  /* hide it */
2456         }
2457         md++;
2458
2459 #define ulp_region(reg) do { \
2460         md->base = t4_read_reg(adap, ULP_ ## reg ## _LLIMIT_A);\
2461         (md++)->limit = t4_read_reg(adap, ULP_ ## reg ## _ULIMIT_A); \
2462 } while (0)
2463
2464         ulp_region(RX_ISCSI);
2465         ulp_region(RX_TDDP);
2466         ulp_region(TX_TPT);
2467         ulp_region(RX_STAG);
2468         ulp_region(RX_RQ);
2469         ulp_region(RX_RQUDP);
2470         ulp_region(RX_PBL);
2471         ulp_region(TX_PBL);
2472 #undef ulp_region
2473         md->base = 0;
2474         md->idx = ARRAY_SIZE(region);
2475         if (!is_t4(adap->params.chip)) {
2476                 u32 size = 0;
2477                 u32 sge_ctrl = t4_read_reg(adap, SGE_CONTROL2_A);
2478                 u32 fifo_size = t4_read_reg(adap, SGE_DBVFIFO_SIZE_A);
2479
2480                 if (is_t5(adap->params.chip)) {
2481                         if (sge_ctrl & VFIFO_ENABLE_F)
2482                                 size = DBVFIFO_SIZE_G(fifo_size);
2483                 } else {
2484                         size = T6_DBVFIFO_SIZE_G(fifo_size);
2485                 }
2486
2487                 if (size) {
2488                         md->base = BASEADDR_G(t4_read_reg(adap,
2489                                         SGE_DBVFIFO_BADDR_A));
2490                         md->limit = md->base + (size << 2) - 1;
2491                 }
2492         }
2493
2494         md++;
2495
2496         md->base = t4_read_reg(adap, ULP_RX_CTX_BASE_A);
2497         md->limit = 0;
2498         md++;
2499         md->base = t4_read_reg(adap, ULP_TX_ERR_TABLE_BASE_A);
2500         md->limit = 0;
2501         md++;
2502
2503         md->base = adap->vres.ocq.start;
2504         if (adap->vres.ocq.size)
2505                 md->limit = md->base + adap->vres.ocq.size - 1;
2506         else
2507                 md->idx = ARRAY_SIZE(region);  /* hide it */
2508         md++;
2509
2510         /* add any address-space holes, there can be up to 3 */
2511         for (n = 0; n < i - 1; n++)
2512                 if (avail[n].limit < avail[n + 1].base)
2513                         (md++)->base = avail[n].limit;
2514         if (avail[n].limit)
2515                 (md++)->base = avail[n].limit;
2516
2517         n = md - mem;
2518         sort(mem, n, sizeof(struct mem_desc), mem_desc_cmp, NULL);
2519
2520         for (lo = 0; lo < i; lo++)
2521                 mem_region_show(seq, memory[avail[lo].idx], avail[lo].base,
2522                                 avail[lo].limit - 1);
2523
2524         seq_putc(seq, '\n');
2525         for (i = 0; i < n; i++) {
2526                 if (mem[i].idx >= ARRAY_SIZE(region))
2527                         continue;                        /* skip holes */
2528                 if (!mem[i].limit)
2529                         mem[i].limit = i < n - 1 ? mem[i + 1].base - 1 : ~0;
2530                 mem_region_show(seq, region[mem[i].idx], mem[i].base,
2531                                 mem[i].limit);
2532         }
2533
2534         seq_putc(seq, '\n');
2535         lo = t4_read_reg(adap, CIM_SDRAM_BASE_ADDR_A);
2536         hi = t4_read_reg(adap, CIM_SDRAM_ADDR_SIZE_A) + lo - 1;
2537         mem_region_show(seq, "uP RAM:", lo, hi);
2538
2539         lo = t4_read_reg(adap, CIM_EXTMEM2_BASE_ADDR_A);
2540         hi = t4_read_reg(adap, CIM_EXTMEM2_ADDR_SIZE_A) + lo - 1;
2541         mem_region_show(seq, "uP Extmem2:", lo, hi);
2542
2543         lo = t4_read_reg(adap, TP_PMM_RX_MAX_PAGE_A);
2544         seq_printf(seq, "\n%u Rx pages of size %uKiB for %u channels\n",
2545                    PMRXMAXPAGE_G(lo),
2546                    t4_read_reg(adap, TP_PMM_RX_PAGE_SIZE_A) >> 10,
2547                    (lo & PMRXNUMCHN_F) ? 2 : 1);
2548
2549         lo = t4_read_reg(adap, TP_PMM_TX_MAX_PAGE_A);
2550         hi = t4_read_reg(adap, TP_PMM_TX_PAGE_SIZE_A);
2551         seq_printf(seq, "%u Tx pages of size %u%ciB for %u channels\n",
2552                    PMTXMAXPAGE_G(lo),
2553                    hi >= (1 << 20) ? (hi >> 20) : (hi >> 10),
2554                    hi >= (1 << 20) ? 'M' : 'K', 1 << PMTXNUMCHN_G(lo));
2555         seq_printf(seq, "%u p-structs\n\n",
2556                    t4_read_reg(adap, TP_CMM_MM_MAX_PSTRUCT_A));
2557
2558         for (i = 0; i < 4; i++) {
2559                 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5)
2560                         lo = t4_read_reg(adap, MPS_RX_MAC_BG_PG_CNT0_A + i * 4);
2561                 else
2562                         lo = t4_read_reg(adap, MPS_RX_PG_RSV0_A + i * 4);
2563                 if (is_t5(adap->params.chip)) {
2564                         used = T5_USED_G(lo);
2565                         alloc = T5_ALLOC_G(lo);
2566                 } else {
2567                         used = USED_G(lo);
2568                         alloc = ALLOC_G(lo);
2569                 }
2570                 /* For T6 these are MAC buffer groups */
2571                 seq_printf(seq, "Port %d using %u pages out of %u allocated\n",
2572                            i, used, alloc);
2573         }
2574         for (i = 0; i < adap->params.arch.nchan; i++) {
2575                 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5)
2576                         lo = t4_read_reg(adap,
2577                                          MPS_RX_LPBK_BG_PG_CNT0_A + i * 4);
2578                 else
2579                         lo = t4_read_reg(adap, MPS_RX_PG_RSV4_A + i * 4);
2580                 if (is_t5(adap->params.chip)) {
2581                         used = T5_USED_G(lo);
2582                         alloc = T5_ALLOC_G(lo);
2583                 } else {
2584                         used = USED_G(lo);
2585                         alloc = ALLOC_G(lo);
2586                 }
2587                 /* For T6 these are MAC buffer groups */
2588                 seq_printf(seq,
2589                            "Loopback %d using %u pages out of %u allocated\n",
2590                            i, used, alloc);
2591         }
2592         return 0;
2593 }
2594
2595 static int meminfo_open(struct inode *inode, struct file *file)
2596 {
2597         return single_open(file, meminfo_show, inode->i_private);
2598 }
2599
2600 static const struct file_operations meminfo_fops = {
2601         .owner   = THIS_MODULE,
2602         .open    = meminfo_open,
2603         .read    = seq_read,
2604         .llseek  = seq_lseek,
2605         .release = single_release,
2606 };
2607 /* Add an array of Debug FS files.
2608  */
2609 void add_debugfs_files(struct adapter *adap,
2610                        struct t4_debugfs_entry *files,
2611                        unsigned int nfiles)
2612 {
2613         int i;
2614
2615         /* debugfs support is best effort */
2616         for (i = 0; i < nfiles; i++)
2617                 debugfs_create_file(files[i].name, files[i].mode,
2618                                     adap->debugfs_root,
2619                                     (void *)adap + files[i].data,
2620                                     files[i].ops);
2621 }
2622
2623 int t4_setup_debugfs(struct adapter *adap)
2624 {
2625         int i;
2626         u32 size = 0;
2627         struct dentry *de;
2628
2629         static struct t4_debugfs_entry t4_debugfs_files[] = {
2630                 { "cim_la", &cim_la_fops, S_IRUSR, 0 },
2631                 { "cim_pif_la", &cim_pif_la_fops, S_IRUSR, 0 },
2632                 { "cim_ma_la", &cim_ma_la_fops, S_IRUSR, 0 },
2633                 { "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
2634                 { "clk", &clk_debugfs_fops, S_IRUSR, 0 },
2635                 { "devlog", &devlog_fops, S_IRUSR, 0 },
2636                 { "mbox0", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 0 },
2637                 { "mbox1", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 1 },
2638                 { "mbox2", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 2 },
2639                 { "mbox3", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 3 },
2640                 { "mbox4", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 4 },
2641                 { "mbox5", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 5 },
2642                 { "mbox6", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 6 },
2643                 { "mbox7", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 7 },
2644                 { "l2t", &t4_l2t_fops, S_IRUSR, 0},
2645                 { "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
2646                 { "rss", &rss_debugfs_fops, S_IRUSR, 0 },
2647                 { "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 },
2648                 { "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
2649                 { "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
2650                 { "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
2651                 { "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
2652                 { "ibq_tp0",  &cim_ibq_fops, S_IRUSR, 0 },
2653                 { "ibq_tp1",  &cim_ibq_fops, S_IRUSR, 1 },
2654                 { "ibq_ulp",  &cim_ibq_fops, S_IRUSR, 2 },
2655                 { "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 },
2656                 { "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 },
2657                 { "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 },
2658                 { "obq_ulp0", &cim_obq_fops, S_IRUSR, 0 },
2659                 { "obq_ulp1", &cim_obq_fops, S_IRUSR, 1 },
2660                 { "obq_ulp2", &cim_obq_fops, S_IRUSR, 2 },
2661                 { "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
2662                 { "obq_sge",  &cim_obq_fops, S_IRUSR, 4 },
2663                 { "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
2664                 { "tp_la", &tp_la_fops, S_IRUSR, 0 },
2665                 { "ulprx_la", &ulprx_la_fops, S_IRUSR, 0 },
2666                 { "sensors", &sensors_debugfs_fops, S_IRUSR, 0 },
2667                 { "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
2668                 { "tx_rate", &tx_rate_debugfs_fops, S_IRUSR, 0 },
2669                 { "cctrl", &cctrl_tbl_debugfs_fops, S_IRUSR, 0 },
2670 #if IS_ENABLED(CONFIG_IPV6)
2671                 { "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
2672 #endif
2673                 { "blocked_fl", &blocked_fl_fops, S_IRUSR | S_IWUSR, 0 },
2674                 { "meminfo", &meminfo_fops, S_IRUSR, 0 },
2675         };
2676
2677         /* Debug FS nodes common to all T5 and later adapters.
2678          */
2679         static struct t4_debugfs_entry t5_debugfs_files[] = {
2680                 { "obq_sge_rx_q0", &cim_obq_fops, S_IRUSR, 6 },
2681                 { "obq_sge_rx_q1", &cim_obq_fops, S_IRUSR, 7 },
2682         };
2683
2684         add_debugfs_files(adap,
2685                           t4_debugfs_files,
2686                           ARRAY_SIZE(t4_debugfs_files));
2687         if (!is_t4(adap->params.chip))
2688                 add_debugfs_files(adap,
2689                                   t5_debugfs_files,
2690                                   ARRAY_SIZE(t5_debugfs_files));
2691
2692         i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
2693         if (i & EDRAM0_ENABLE_F) {
2694                 size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
2695                 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
2696         }
2697         if (i & EDRAM1_ENABLE_F) {
2698                 size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
2699                 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
2700         }
2701         if (is_t5(adap->params.chip)) {
2702                 if (i & EXT_MEM0_ENABLE_F) {
2703                         size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
2704                         add_debugfs_mem(adap, "mc0", MEM_MC0,
2705                                         EXT_MEM0_SIZE_G(size));
2706                 }
2707                 if (i & EXT_MEM1_ENABLE_F) {
2708                         size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
2709                         add_debugfs_mem(adap, "mc1", MEM_MC1,
2710                                         EXT_MEM1_SIZE_G(size));
2711                 }
2712         } else {
2713                 if (i & EXT_MEM_ENABLE_F)
2714                         size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
2715                         add_debugfs_mem(adap, "mc", MEM_MC,
2716                                         EXT_MEM_SIZE_G(size));
2717         }
2718
2719         de = debugfs_create_file_size("flash", S_IRUSR, adap->debugfs_root, adap,
2720                                       &flash_debugfs_fops, adap->params.sf_size);
2721         debugfs_create_bool("use_backdoor", S_IWUSR | S_IRUSR,
2722                             adap->debugfs_root, &adap->use_bd);
2723
2724         return 0;
2725 }