cxgb4: Add MPS tracing support
[cascardo/linux.git] / drivers / net / ethernet / chelsio / cxgb4 / cxgb4_debugfs.c
1 /*
2  * This file is part of the Chelsio T4 Ethernet driver for Linux.
3  *
4  * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34
35 #include <linux/seq_file.h>
36 #include <linux/debugfs.h>
37 #include <linux/string_helpers.h>
38 #include <linux/sort.h>
39 #include <linux/ctype.h>
40
41 #include "cxgb4.h"
42 #include "t4_regs.h"
43 #include "t4_values.h"
44 #include "t4fw_api.h"
45 #include "cxgb4_debugfs.h"
46 #include "clip_tbl.h"
47 #include "l2t.h"
48
49 /* generic seq_file support for showing a table of size rows x width. */
50 static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
51 {
52         pos -= tb->skip_first;
53         return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
54 }
55
56 static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
57 {
58         struct seq_tab *tb = seq->private;
59
60         if (tb->skip_first && *pos == 0)
61                 return SEQ_START_TOKEN;
62
63         return seq_tab_get_idx(tb, *pos);
64 }
65
66 static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
67 {
68         v = seq_tab_get_idx(seq->private, *pos + 1);
69         if (v)
70                 ++*pos;
71         return v;
72 }
73
74 static void seq_tab_stop(struct seq_file *seq, void *v)
75 {
76 }
77
78 static int seq_tab_show(struct seq_file *seq, void *v)
79 {
80         const struct seq_tab *tb = seq->private;
81
82         return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
83 }
84
85 static const struct seq_operations seq_tab_ops = {
86         .start = seq_tab_start,
87         .next  = seq_tab_next,
88         .stop  = seq_tab_stop,
89         .show  = seq_tab_show
90 };
91
92 struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
93                              unsigned int width, unsigned int have_header,
94                              int (*show)(struct seq_file *seq, void *v, int i))
95 {
96         struct seq_tab *p;
97
98         p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
99         if (p) {
100                 p->show = show;
101                 p->rows = rows;
102                 p->width = width;
103                 p->skip_first = have_header != 0;
104         }
105         return p;
106 }
107
108 /* Trim the size of a seq_tab to the supplied number of rows.  The operation is
109  * irreversible.
110  */
111 static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
112 {
113         if (new_rows > p->rows)
114                 return -EINVAL;
115         p->rows = new_rows;
116         return 0;
117 }
118
119 static int cim_la_show(struct seq_file *seq, void *v, int idx)
120 {
121         if (v == SEQ_START_TOKEN)
122                 seq_puts(seq, "Status   Data      PC     LS0Stat  LS0Addr "
123                          "            LS0Data\n");
124         else {
125                 const u32 *p = v;
126
127                 seq_printf(seq,
128                            "  %02x  %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
129                            (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
130                            p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
131                            p[6], p[7]);
132         }
133         return 0;
134 }
135
136 static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
137 {
138         if (v == SEQ_START_TOKEN) {
139                 seq_puts(seq, "Status   Data      PC\n");
140         } else {
141                 const u32 *p = v;
142
143                 seq_printf(seq, "  %02x   %08x %08x\n", p[5] & 0xff, p[6],
144                            p[7]);
145                 seq_printf(seq, "  %02x   %02x%06x %02x%06x\n",
146                            (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
147                            p[4] & 0xff, p[5] >> 8);
148                 seq_printf(seq, "  %02x   %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
149                            p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
150         }
151         return 0;
152 }
153
154 static int cim_la_show_t6(struct seq_file *seq, void *v, int idx)
155 {
156         if (v == SEQ_START_TOKEN) {
157                 seq_puts(seq, "Status   Inst    Data      PC     LS0Stat  "
158                          "LS0Addr  LS0Data  LS1Stat  LS1Addr  LS1Data\n");
159         } else {
160                 const u32 *p = v;
161
162                 seq_printf(seq, "  %02x   %04x%04x %04x%04x %04x%04x %08x %08x %08x %08x %08x %08x\n",
163                            (p[9] >> 16) & 0xff,       /* Status */
164                            p[9] & 0xffff, p[8] >> 16, /* Inst */
165                            p[8] & 0xffff, p[7] >> 16, /* Data */
166                            p[7] & 0xffff, p[6] >> 16, /* PC */
167                            p[2], p[1], p[0],      /* LS0 Stat, Addr and Data */
168                            p[5], p[4], p[3]);     /* LS1 Stat, Addr and Data */
169         }
170         return 0;
171 }
172
173 static int cim_la_show_pc_t6(struct seq_file *seq, void *v, int idx)
174 {
175         if (v == SEQ_START_TOKEN) {
176                 seq_puts(seq, "Status   Inst    Data      PC\n");
177         } else {
178                 const u32 *p = v;
179
180                 seq_printf(seq, "  %02x   %08x %08x %08x\n",
181                            p[3] & 0xff, p[2], p[1], p[0]);
182                 seq_printf(seq, "  %02x   %02x%06x %02x%06x %02x%06x\n",
183                            (p[6] >> 8) & 0xff, p[6] & 0xff, p[5] >> 8,
184                            p[5] & 0xff, p[4] >> 8, p[4] & 0xff, p[3] >> 8);
185                 seq_printf(seq, "  %02x   %04x%04x %04x%04x %04x%04x\n",
186                            (p[9] >> 16) & 0xff, p[9] & 0xffff, p[8] >> 16,
187                            p[8] & 0xffff, p[7] >> 16, p[7] & 0xffff,
188                            p[6] >> 16);
189         }
190         return 0;
191 }
192
193 static int cim_la_open(struct inode *inode, struct file *file)
194 {
195         int ret;
196         unsigned int cfg;
197         struct seq_tab *p;
198         struct adapter *adap = inode->i_private;
199
200         ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
201         if (ret)
202                 return ret;
203
204         if (is_t6(adap->params.chip)) {
205                 /* +1 to account for integer division of CIMLA_SIZE/10 */
206                 p = seq_open_tab(file, (adap->params.cim_la_size / 10) + 1,
207                                  10 * sizeof(u32), 1,
208                                  cfg & UPDBGLACAPTPCONLY_F ?
209                                         cim_la_show_pc_t6 : cim_la_show_t6);
210         } else {
211                 p = seq_open_tab(file, adap->params.cim_la_size / 8,
212                                  8 * sizeof(u32), 1,
213                                  cfg & UPDBGLACAPTPCONLY_F ? cim_la_show_3in1 :
214                                                              cim_la_show);
215         }
216         if (!p)
217                 return -ENOMEM;
218
219         ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
220         if (ret)
221                 seq_release_private(inode, file);
222         return ret;
223 }
224
225 static const struct file_operations cim_la_fops = {
226         .owner   = THIS_MODULE,
227         .open    = cim_la_open,
228         .read    = seq_read,
229         .llseek  = seq_lseek,
230         .release = seq_release_private
231 };
232
233 static int cim_pif_la_show(struct seq_file *seq, void *v, int idx)
234 {
235         const u32 *p = v;
236
237         if (v == SEQ_START_TOKEN) {
238                 seq_puts(seq, "Cntl ID DataBE   Addr                 Data\n");
239         } else if (idx < CIM_PIFLA_SIZE) {
240                 seq_printf(seq, " %02x  %02x  %04x  %08x %08x%08x%08x%08x\n",
241                            (p[5] >> 22) & 0xff, (p[5] >> 16) & 0x3f,
242                            p[5] & 0xffff, p[4], p[3], p[2], p[1], p[0]);
243         } else {
244                 if (idx == CIM_PIFLA_SIZE)
245                         seq_puts(seq, "\nCntl ID               Data\n");
246                 seq_printf(seq, " %02x  %02x %08x%08x%08x%08x\n",
247                            (p[4] >> 6) & 0xff, p[4] & 0x3f,
248                            p[3], p[2], p[1], p[0]);
249         }
250         return 0;
251 }
252
253 static int cim_pif_la_open(struct inode *inode, struct file *file)
254 {
255         struct seq_tab *p;
256         struct adapter *adap = inode->i_private;
257
258         p = seq_open_tab(file, 2 * CIM_PIFLA_SIZE, 6 * sizeof(u32), 1,
259                          cim_pif_la_show);
260         if (!p)
261                 return -ENOMEM;
262
263         t4_cim_read_pif_la(adap, (u32 *)p->data,
264                            (u32 *)p->data + 6 * CIM_PIFLA_SIZE, NULL, NULL);
265         return 0;
266 }
267
268 static const struct file_operations cim_pif_la_fops = {
269         .owner   = THIS_MODULE,
270         .open    = cim_pif_la_open,
271         .read    = seq_read,
272         .llseek  = seq_lseek,
273         .release = seq_release_private
274 };
275
276 static int cim_ma_la_show(struct seq_file *seq, void *v, int idx)
277 {
278         const u32 *p = v;
279
280         if (v == SEQ_START_TOKEN) {
281                 seq_puts(seq, "\n");
282         } else if (idx < CIM_MALA_SIZE) {
283                 seq_printf(seq, "%02x%08x%08x%08x%08x\n",
284                            p[4], p[3], p[2], p[1], p[0]);
285         } else {
286                 if (idx == CIM_MALA_SIZE)
287                         seq_puts(seq,
288                                  "\nCnt ID Tag UE       Data       RDY VLD\n");
289                 seq_printf(seq, "%3u %2u  %x   %u %08x%08x  %u   %u\n",
290                            (p[2] >> 10) & 0xff, (p[2] >> 7) & 7,
291                            (p[2] >> 3) & 0xf, (p[2] >> 2) & 1,
292                            (p[1] >> 2) | ((p[2] & 3) << 30),
293                            (p[0] >> 2) | ((p[1] & 3) << 30), (p[0] >> 1) & 1,
294                            p[0] & 1);
295         }
296         return 0;
297 }
298
299 static int cim_ma_la_open(struct inode *inode, struct file *file)
300 {
301         struct seq_tab *p;
302         struct adapter *adap = inode->i_private;
303
304         p = seq_open_tab(file, 2 * CIM_MALA_SIZE, 5 * sizeof(u32), 1,
305                          cim_ma_la_show);
306         if (!p)
307                 return -ENOMEM;
308
309         t4_cim_read_ma_la(adap, (u32 *)p->data,
310                           (u32 *)p->data + 5 * CIM_MALA_SIZE);
311         return 0;
312 }
313
314 static const struct file_operations cim_ma_la_fops = {
315         .owner   = THIS_MODULE,
316         .open    = cim_ma_la_open,
317         .read    = seq_read,
318         .llseek  = seq_lseek,
319         .release = seq_release_private
320 };
321
322 static int cim_qcfg_show(struct seq_file *seq, void *v)
323 {
324         static const char * const qname[] = {
325                 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
326                 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
327                 "SGE0-RX", "SGE1-RX"
328         };
329
330         int i;
331         struct adapter *adap = seq->private;
332         u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
333         u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
334         u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
335         u16 thres[CIM_NUM_IBQ];
336         u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
337         u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
338         u32 *p = stat;
339         int cim_num_obq = is_t4(adap->params.chip) ?
340                                 CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
341
342         i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
343                         UP_IBQ_0_SHADOW_RDADDR_A,
344                         ARRAY_SIZE(stat), stat);
345         if (!i) {
346                 if (is_t4(adap->params.chip)) {
347                         i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
348                                         ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
349                         wr = obq_wr_t4;
350                 } else {
351                         i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
352                                         ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
353                         wr = obq_wr_t5;
354                 }
355         }
356         if (i)
357                 return i;
358
359         t4_read_cimq_cfg(adap, base, size, thres);
360
361         seq_printf(seq,
362                    "  Queue  Base  Size Thres  RdPtr WrPtr  SOP  EOP Avail\n");
363         for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
364                 seq_printf(seq, "%7s %5x %5u %5u %6x  %4x %4u %4u %5u\n",
365                            qname[i], base[i], size[i], thres[i],
366                            IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
367                            QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
368                            QUEREMFLITS_G(p[2]) * 16);
369         for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
370                 seq_printf(seq, "%7s %5x %5u %12x  %4x %4u %4u %5u\n",
371                            qname[i], base[i], size[i],
372                            QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
373                            QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
374                            QUEREMFLITS_G(p[2]) * 16);
375         return 0;
376 }
377
378 static int cim_qcfg_open(struct inode *inode, struct file *file)
379 {
380         return single_open(file, cim_qcfg_show, inode->i_private);
381 }
382
383 static const struct file_operations cim_qcfg_fops = {
384         .owner   = THIS_MODULE,
385         .open    = cim_qcfg_open,
386         .read    = seq_read,
387         .llseek  = seq_lseek,
388         .release = single_release,
389 };
390
391 static int cimq_show(struct seq_file *seq, void *v, int idx)
392 {
393         const u32 *p = v;
394
395         seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
396                    p[2], p[3]);
397         return 0;
398 }
399
400 static int cim_ibq_open(struct inode *inode, struct file *file)
401 {
402         int ret;
403         struct seq_tab *p;
404         unsigned int qid = (uintptr_t)inode->i_private & 7;
405         struct adapter *adap = inode->i_private - qid;
406
407         p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
408         if (!p)
409                 return -ENOMEM;
410
411         ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
412         if (ret < 0)
413                 seq_release_private(inode, file);
414         else
415                 ret = 0;
416         return ret;
417 }
418
419 static const struct file_operations cim_ibq_fops = {
420         .owner   = THIS_MODULE,
421         .open    = cim_ibq_open,
422         .read    = seq_read,
423         .llseek  = seq_lseek,
424         .release = seq_release_private
425 };
426
427 static int cim_obq_open(struct inode *inode, struct file *file)
428 {
429         int ret;
430         struct seq_tab *p;
431         unsigned int qid = (uintptr_t)inode->i_private & 7;
432         struct adapter *adap = inode->i_private - qid;
433
434         p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
435         if (!p)
436                 return -ENOMEM;
437
438         ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
439         if (ret < 0) {
440                 seq_release_private(inode, file);
441         } else {
442                 seq_tab_trim(p, ret / 4);
443                 ret = 0;
444         }
445         return ret;
446 }
447
448 static const struct file_operations cim_obq_fops = {
449         .owner   = THIS_MODULE,
450         .open    = cim_obq_open,
451         .read    = seq_read,
452         .llseek  = seq_lseek,
453         .release = seq_release_private
454 };
455
456 struct field_desc {
457         const char *name;
458         unsigned int start;
459         unsigned int width;
460 };
461
462 static void field_desc_show(struct seq_file *seq, u64 v,
463                             const struct field_desc *p)
464 {
465         char buf[32];
466         int line_size = 0;
467
468         while (p->name) {
469                 u64 mask = (1ULL << p->width) - 1;
470                 int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
471                                     ((unsigned long long)v >> p->start) & mask);
472
473                 if (line_size + len >= 79) {
474                         line_size = 8;
475                         seq_puts(seq, "\n        ");
476                 }
477                 seq_printf(seq, "%s ", buf);
478                 line_size += len + 1;
479                 p++;
480         }
481         seq_putc(seq, '\n');
482 }
483
484 static struct field_desc tp_la0[] = {
485         { "RcfOpCodeOut", 60, 4 },
486         { "State", 56, 4 },
487         { "WcfState", 52, 4 },
488         { "RcfOpcSrcOut", 50, 2 },
489         { "CRxError", 49, 1 },
490         { "ERxError", 48, 1 },
491         { "SanityFailed", 47, 1 },
492         { "SpuriousMsg", 46, 1 },
493         { "FlushInputMsg", 45, 1 },
494         { "FlushInputCpl", 44, 1 },
495         { "RssUpBit", 43, 1 },
496         { "RssFilterHit", 42, 1 },
497         { "Tid", 32, 10 },
498         { "InitTcb", 31, 1 },
499         { "LineNumber", 24, 7 },
500         { "Emsg", 23, 1 },
501         { "EdataOut", 22, 1 },
502         { "Cmsg", 21, 1 },
503         { "CdataOut", 20, 1 },
504         { "EreadPdu", 19, 1 },
505         { "CreadPdu", 18, 1 },
506         { "TunnelPkt", 17, 1 },
507         { "RcfPeerFin", 16, 1 },
508         { "RcfReasonOut", 12, 4 },
509         { "TxCchannel", 10, 2 },
510         { "RcfTxChannel", 8, 2 },
511         { "RxEchannel", 6, 2 },
512         { "RcfRxChannel", 5, 1 },
513         { "RcfDataOutSrdy", 4, 1 },
514         { "RxDvld", 3, 1 },
515         { "RxOoDvld", 2, 1 },
516         { "RxCongestion", 1, 1 },
517         { "TxCongestion", 0, 1 },
518         { NULL }
519 };
520
521 static int tp_la_show(struct seq_file *seq, void *v, int idx)
522 {
523         const u64 *p = v;
524
525         field_desc_show(seq, *p, tp_la0);
526         return 0;
527 }
528
529 static int tp_la_show2(struct seq_file *seq, void *v, int idx)
530 {
531         const u64 *p = v;
532
533         if (idx)
534                 seq_putc(seq, '\n');
535         field_desc_show(seq, p[0], tp_la0);
536         if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
537                 field_desc_show(seq, p[1], tp_la0);
538         return 0;
539 }
540
541 static int tp_la_show3(struct seq_file *seq, void *v, int idx)
542 {
543         static struct field_desc tp_la1[] = {
544                 { "CplCmdIn", 56, 8 },
545                 { "CplCmdOut", 48, 8 },
546                 { "ESynOut", 47, 1 },
547                 { "EAckOut", 46, 1 },
548                 { "EFinOut", 45, 1 },
549                 { "ERstOut", 44, 1 },
550                 { "SynIn", 43, 1 },
551                 { "AckIn", 42, 1 },
552                 { "FinIn", 41, 1 },
553                 { "RstIn", 40, 1 },
554                 { "DataIn", 39, 1 },
555                 { "DataInVld", 38, 1 },
556                 { "PadIn", 37, 1 },
557                 { "RxBufEmpty", 36, 1 },
558                 { "RxDdp", 35, 1 },
559                 { "RxFbCongestion", 34, 1 },
560                 { "TxFbCongestion", 33, 1 },
561                 { "TxPktSumSrdy", 32, 1 },
562                 { "RcfUlpType", 28, 4 },
563                 { "Eread", 27, 1 },
564                 { "Ebypass", 26, 1 },
565                 { "Esave", 25, 1 },
566                 { "Static0", 24, 1 },
567                 { "Cread", 23, 1 },
568                 { "Cbypass", 22, 1 },
569                 { "Csave", 21, 1 },
570                 { "CPktOut", 20, 1 },
571                 { "RxPagePoolFull", 18, 2 },
572                 { "RxLpbkPkt", 17, 1 },
573                 { "TxLpbkPkt", 16, 1 },
574                 { "RxVfValid", 15, 1 },
575                 { "SynLearned", 14, 1 },
576                 { "SetDelEntry", 13, 1 },
577                 { "SetInvEntry", 12, 1 },
578                 { "CpcmdDvld", 11, 1 },
579                 { "CpcmdSave", 10, 1 },
580                 { "RxPstructsFull", 8, 2 },
581                 { "EpcmdDvld", 7, 1 },
582                 { "EpcmdFlush", 6, 1 },
583                 { "EpcmdTrimPrefix", 5, 1 },
584                 { "EpcmdTrimPostfix", 4, 1 },
585                 { "ERssIp4Pkt", 3, 1 },
586                 { "ERssIp6Pkt", 2, 1 },
587                 { "ERssTcpUdpPkt", 1, 1 },
588                 { "ERssFceFipPkt", 0, 1 },
589                 { NULL }
590         };
591         static struct field_desc tp_la2[] = {
592                 { "CplCmdIn", 56, 8 },
593                 { "MpsVfVld", 55, 1 },
594                 { "MpsPf", 52, 3 },
595                 { "MpsVf", 44, 8 },
596                 { "SynIn", 43, 1 },
597                 { "AckIn", 42, 1 },
598                 { "FinIn", 41, 1 },
599                 { "RstIn", 40, 1 },
600                 { "DataIn", 39, 1 },
601                 { "DataInVld", 38, 1 },
602                 { "PadIn", 37, 1 },
603                 { "RxBufEmpty", 36, 1 },
604                 { "RxDdp", 35, 1 },
605                 { "RxFbCongestion", 34, 1 },
606                 { "TxFbCongestion", 33, 1 },
607                 { "TxPktSumSrdy", 32, 1 },
608                 { "RcfUlpType", 28, 4 },
609                 { "Eread", 27, 1 },
610                 { "Ebypass", 26, 1 },
611                 { "Esave", 25, 1 },
612                 { "Static0", 24, 1 },
613                 { "Cread", 23, 1 },
614                 { "Cbypass", 22, 1 },
615                 { "Csave", 21, 1 },
616                 { "CPktOut", 20, 1 },
617                 { "RxPagePoolFull", 18, 2 },
618                 { "RxLpbkPkt", 17, 1 },
619                 { "TxLpbkPkt", 16, 1 },
620                 { "RxVfValid", 15, 1 },
621                 { "SynLearned", 14, 1 },
622                 { "SetDelEntry", 13, 1 },
623                 { "SetInvEntry", 12, 1 },
624                 { "CpcmdDvld", 11, 1 },
625                 { "CpcmdSave", 10, 1 },
626                 { "RxPstructsFull", 8, 2 },
627                 { "EpcmdDvld", 7, 1 },
628                 { "EpcmdFlush", 6, 1 },
629                 { "EpcmdTrimPrefix", 5, 1 },
630                 { "EpcmdTrimPostfix", 4, 1 },
631                 { "ERssIp4Pkt", 3, 1 },
632                 { "ERssIp6Pkt", 2, 1 },
633                 { "ERssTcpUdpPkt", 1, 1 },
634                 { "ERssFceFipPkt", 0, 1 },
635                 { NULL }
636         };
637         const u64 *p = v;
638
639         if (idx)
640                 seq_putc(seq, '\n');
641         field_desc_show(seq, p[0], tp_la0);
642         if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
643                 field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
644         return 0;
645 }
646
647 static int tp_la_open(struct inode *inode, struct file *file)
648 {
649         struct seq_tab *p;
650         struct adapter *adap = inode->i_private;
651
652         switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
653         case 2:
654                 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
655                                  tp_la_show2);
656                 break;
657         case 3:
658                 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
659                                  tp_la_show3);
660                 break;
661         default:
662                 p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
663         }
664         if (!p)
665                 return -ENOMEM;
666
667         t4_tp_read_la(adap, (u64 *)p->data, NULL);
668         return 0;
669 }
670
671 static ssize_t tp_la_write(struct file *file, const char __user *buf,
672                            size_t count, loff_t *pos)
673 {
674         int err;
675         char s[32];
676         unsigned long val;
677         size_t size = min(sizeof(s) - 1, count);
678         struct adapter *adap = file_inode(file)->i_private;
679
680         if (copy_from_user(s, buf, size))
681                 return -EFAULT;
682         s[size] = '\0';
683         err = kstrtoul(s, 0, &val);
684         if (err)
685                 return err;
686         if (val > 0xffff)
687                 return -EINVAL;
688         adap->params.tp.la_mask = val << 16;
689         t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
690                          adap->params.tp.la_mask);
691         return count;
692 }
693
694 static const struct file_operations tp_la_fops = {
695         .owner   = THIS_MODULE,
696         .open    = tp_la_open,
697         .read    = seq_read,
698         .llseek  = seq_lseek,
699         .release = seq_release_private,
700         .write   = tp_la_write
701 };
702
703 static int ulprx_la_show(struct seq_file *seq, void *v, int idx)
704 {
705         const u32 *p = v;
706
707         if (v == SEQ_START_TOKEN)
708                 seq_puts(seq, "      Pcmd        Type   Message"
709                          "                Data\n");
710         else
711                 seq_printf(seq, "%08x%08x  %4x  %08x  %08x%08x%08x%08x\n",
712                            p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]);
713         return 0;
714 }
715
716 static int ulprx_la_open(struct inode *inode, struct file *file)
717 {
718         struct seq_tab *p;
719         struct adapter *adap = inode->i_private;
720
721         p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1,
722                          ulprx_la_show);
723         if (!p)
724                 return -ENOMEM;
725
726         t4_ulprx_read_la(adap, (u32 *)p->data);
727         return 0;
728 }
729
730 static const struct file_operations ulprx_la_fops = {
731         .owner   = THIS_MODULE,
732         .open    = ulprx_la_open,
733         .read    = seq_read,
734         .llseek  = seq_lseek,
735         .release = seq_release_private
736 };
737
738 /* Show the PM memory stats.  These stats include:
739  *
740  * TX:
741  *   Read: memory read operation
742  *   Write Bypass: cut-through
743  *   Bypass + mem: cut-through and save copy
744  *
745  * RX:
746  *   Read: memory read
747  *   Write Bypass: cut-through
748  *   Flush: payload trim or drop
749  */
750 static int pm_stats_show(struct seq_file *seq, void *v)
751 {
752         static const char * const tx_pm_stats[] = {
753                 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
754         };
755         static const char * const rx_pm_stats[] = {
756                 "Read:", "Write bypass:", "Write mem:", "Flush:"
757         };
758
759         int i;
760         u32 tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS];
761         u64 tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS];
762         struct adapter *adap = seq->private;
763
764         t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
765         t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
766
767         seq_printf(seq, "%13s %10s  %20s\n", " ", "Tx pcmds", "Tx bytes");
768         for (i = 0; i < PM_NSTATS - 1; i++)
769                 seq_printf(seq, "%-13s %10u  %20llu\n",
770                            tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
771
772         seq_printf(seq, "%13s %10s  %20s\n", " ", "Rx pcmds", "Rx bytes");
773         for (i = 0; i < PM_NSTATS - 1; i++)
774                 seq_printf(seq, "%-13s %10u  %20llu\n",
775                            rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
776         return 0;
777 }
778
779 static int pm_stats_open(struct inode *inode, struct file *file)
780 {
781         return single_open(file, pm_stats_show, inode->i_private);
782 }
783
784 static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
785                               size_t count, loff_t *pos)
786 {
787         struct adapter *adap = file_inode(file)->i_private;
788
789         t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
790         t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
791         return count;
792 }
793
794 static const struct file_operations pm_stats_debugfs_fops = {
795         .owner   = THIS_MODULE,
796         .open    = pm_stats_open,
797         .read    = seq_read,
798         .llseek  = seq_lseek,
799         .release = single_release,
800         .write   = pm_stats_clear
801 };
802
803 static int tx_rate_show(struct seq_file *seq, void *v)
804 {
805         u64 nrate[NCHAN], orate[NCHAN];
806         struct adapter *adap = seq->private;
807
808         t4_get_chan_txrate(adap, nrate, orate);
809         if (adap->params.arch.nchan == NCHAN) {
810                 seq_puts(seq, "              channel 0   channel 1   "
811                          "channel 2   channel 3\n");
812                 seq_printf(seq, "NIC B/s:     %10llu  %10llu  %10llu  %10llu\n",
813                            (unsigned long long)nrate[0],
814                            (unsigned long long)nrate[1],
815                            (unsigned long long)nrate[2],
816                            (unsigned long long)nrate[3]);
817                 seq_printf(seq, "Offload B/s: %10llu  %10llu  %10llu  %10llu\n",
818                            (unsigned long long)orate[0],
819                            (unsigned long long)orate[1],
820                            (unsigned long long)orate[2],
821                            (unsigned long long)orate[3]);
822         } else {
823                 seq_puts(seq, "              channel 0   channel 1\n");
824                 seq_printf(seq, "NIC B/s:     %10llu  %10llu\n",
825                            (unsigned long long)nrate[0],
826                            (unsigned long long)nrate[1]);
827                 seq_printf(seq, "Offload B/s: %10llu  %10llu\n",
828                            (unsigned long long)orate[0],
829                            (unsigned long long)orate[1]);
830         }
831         return 0;
832 }
833
834 DEFINE_SIMPLE_DEBUGFS_FILE(tx_rate);
835
836 static int cctrl_tbl_show(struct seq_file *seq, void *v)
837 {
838         static const char * const dec_fac[] = {
839                 "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
840                 "0.9375" };
841
842         int i;
843         u16 (*incr)[NCCTRL_WIN];
844         struct adapter *adap = seq->private;
845
846         incr = kmalloc(sizeof(*incr) * NMTUS, GFP_KERNEL);
847         if (!incr)
848                 return -ENOMEM;
849
850         t4_read_cong_tbl(adap, incr);
851
852         for (i = 0; i < NCCTRL_WIN; ++i) {
853                 seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i,
854                            incr[0][i], incr[1][i], incr[2][i], incr[3][i],
855                            incr[4][i], incr[5][i], incr[6][i], incr[7][i]);
856                 seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
857                            incr[8][i], incr[9][i], incr[10][i], incr[11][i],
858                            incr[12][i], incr[13][i], incr[14][i], incr[15][i],
859                            adap->params.a_wnd[i],
860                            dec_fac[adap->params.b_wnd[i]]);
861         }
862
863         kfree(incr);
864         return 0;
865 }
866
867 DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl);
868
869 /* Format a value in a unit that differs from the value's native unit by the
870  * given factor.
871  */
872 static char *unit_conv(char *buf, size_t len, unsigned int val,
873                        unsigned int factor)
874 {
875         unsigned int rem = val % factor;
876
877         if (rem == 0) {
878                 snprintf(buf, len, "%u", val / factor);
879         } else {
880                 while (rem % 10 == 0)
881                         rem /= 10;
882                 snprintf(buf, len, "%u.%u", val / factor, rem);
883         }
884         return buf;
885 }
886
887 static int clk_show(struct seq_file *seq, void *v)
888 {
889         char buf[32];
890         struct adapter *adap = seq->private;
891         unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk;  /* in ps */
892         u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
893         unsigned int tre = TIMERRESOLUTION_G(res);
894         unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
895         unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
896
897         seq_printf(seq, "Core clock period: %s ns\n",
898                    unit_conv(buf, sizeof(buf), cclk_ps, 1000));
899         seq_printf(seq, "TP timer tick: %s us\n",
900                    unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
901         seq_printf(seq, "TCP timestamp tick: %s us\n",
902                    unit_conv(buf, sizeof(buf),
903                              (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
904         seq_printf(seq, "DACK tick: %s us\n",
905                    unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
906         seq_printf(seq, "DACK timer: %u us\n",
907                    ((cclk_ps << dack_re) / 1000000) *
908                    t4_read_reg(adap, TP_DACK_TIMER_A));
909         seq_printf(seq, "Retransmit min: %llu us\n",
910                    tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
911         seq_printf(seq, "Retransmit max: %llu us\n",
912                    tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
913         seq_printf(seq, "Persist timer min: %llu us\n",
914                    tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
915         seq_printf(seq, "Persist timer max: %llu us\n",
916                    tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
917         seq_printf(seq, "Keepalive idle timer: %llu us\n",
918                    tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
919         seq_printf(seq, "Keepalive interval: %llu us\n",
920                    tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
921         seq_printf(seq, "Initial SRTT: %llu us\n",
922                    tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
923         seq_printf(seq, "FINWAIT2 timer: %llu us\n",
924                    tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
925
926         return 0;
927 }
928
929 DEFINE_SIMPLE_DEBUGFS_FILE(clk);
930
931 /* Firmware Device Log dump. */
932 static const char * const devlog_level_strings[] = {
933         [FW_DEVLOG_LEVEL_EMERG]         = "EMERG",
934         [FW_DEVLOG_LEVEL_CRIT]          = "CRIT",
935         [FW_DEVLOG_LEVEL_ERR]           = "ERR",
936         [FW_DEVLOG_LEVEL_NOTICE]        = "NOTICE",
937         [FW_DEVLOG_LEVEL_INFO]          = "INFO",
938         [FW_DEVLOG_LEVEL_DEBUG]         = "DEBUG"
939 };
940
941 static const char * const devlog_facility_strings[] = {
942         [FW_DEVLOG_FACILITY_CORE]       = "CORE",
943         [FW_DEVLOG_FACILITY_SCHED]      = "SCHED",
944         [FW_DEVLOG_FACILITY_TIMER]      = "TIMER",
945         [FW_DEVLOG_FACILITY_RES]        = "RES",
946         [FW_DEVLOG_FACILITY_HW]         = "HW",
947         [FW_DEVLOG_FACILITY_FLR]        = "FLR",
948         [FW_DEVLOG_FACILITY_DMAQ]       = "DMAQ",
949         [FW_DEVLOG_FACILITY_PHY]        = "PHY",
950         [FW_DEVLOG_FACILITY_MAC]        = "MAC",
951         [FW_DEVLOG_FACILITY_PORT]       = "PORT",
952         [FW_DEVLOG_FACILITY_VI]         = "VI",
953         [FW_DEVLOG_FACILITY_FILTER]     = "FILTER",
954         [FW_DEVLOG_FACILITY_ACL]        = "ACL",
955         [FW_DEVLOG_FACILITY_TM]         = "TM",
956         [FW_DEVLOG_FACILITY_QFC]        = "QFC",
957         [FW_DEVLOG_FACILITY_DCB]        = "DCB",
958         [FW_DEVLOG_FACILITY_ETH]        = "ETH",
959         [FW_DEVLOG_FACILITY_OFLD]       = "OFLD",
960         [FW_DEVLOG_FACILITY_RI]         = "RI",
961         [FW_DEVLOG_FACILITY_ISCSI]      = "ISCSI",
962         [FW_DEVLOG_FACILITY_FCOE]       = "FCOE",
963         [FW_DEVLOG_FACILITY_FOISCSI]    = "FOISCSI",
964         [FW_DEVLOG_FACILITY_FOFCOE]     = "FOFCOE"
965 };
966
967 /* Information gathered by Device Log Open routine for the display routine.
968  */
969 struct devlog_info {
970         unsigned int nentries;          /* number of entries in log[] */
971         unsigned int first;             /* first [temporal] entry in log[] */
972         struct fw_devlog_e log[0];      /* Firmware Device Log */
973 };
974
975 /* Dump a Firmaware Device Log entry.
976  */
977 static int devlog_show(struct seq_file *seq, void *v)
978 {
979         if (v == SEQ_START_TOKEN)
980                 seq_printf(seq, "%10s  %15s  %8s  %8s  %s\n",
981                            "Seq#", "Tstamp", "Level", "Facility", "Message");
982         else {
983                 struct devlog_info *dinfo = seq->private;
984                 int fidx = (uintptr_t)v - 2;
985                 unsigned long index;
986                 struct fw_devlog_e *e;
987
988                 /* Get a pointer to the log entry to display.  Skip unused log
989                  * entries.
990                  */
991                 index = dinfo->first + fidx;
992                 if (index >= dinfo->nentries)
993                         index -= dinfo->nentries;
994                 e = &dinfo->log[index];
995                 if (e->timestamp == 0)
996                         return 0;
997
998                 /* Print the message.  This depends on the firmware using
999                  * exactly the same formating strings as the kernel so we may
1000                  * eventually have to put a format interpreter in here ...
1001                  */
1002                 seq_printf(seq, "%10d  %15llu  %8s  %8s  ",
1003                            be32_to_cpu(e->seqno),
1004                            be64_to_cpu(e->timestamp),
1005                            (e->level < ARRAY_SIZE(devlog_level_strings)
1006                             ? devlog_level_strings[e->level]
1007                             : "UNKNOWN"),
1008                            (e->facility < ARRAY_SIZE(devlog_facility_strings)
1009                             ? devlog_facility_strings[e->facility]
1010                             : "UNKNOWN"));
1011                 seq_printf(seq, e->fmt,
1012                            be32_to_cpu(e->params[0]),
1013                            be32_to_cpu(e->params[1]),
1014                            be32_to_cpu(e->params[2]),
1015                            be32_to_cpu(e->params[3]),
1016                            be32_to_cpu(e->params[4]),
1017                            be32_to_cpu(e->params[5]),
1018                            be32_to_cpu(e->params[6]),
1019                            be32_to_cpu(e->params[7]));
1020         }
1021         return 0;
1022 }
1023
1024 /* Sequential File Operations for Device Log.
1025  */
1026 static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
1027 {
1028         if (pos > dinfo->nentries)
1029                 return NULL;
1030
1031         return (void *)(uintptr_t)(pos + 1);
1032 }
1033
1034 static void *devlog_start(struct seq_file *seq, loff_t *pos)
1035 {
1036         struct devlog_info *dinfo = seq->private;
1037
1038         return (*pos
1039                 ? devlog_get_idx(dinfo, *pos)
1040                 : SEQ_START_TOKEN);
1041 }
1042
1043 static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
1044 {
1045         struct devlog_info *dinfo = seq->private;
1046
1047         (*pos)++;
1048         return devlog_get_idx(dinfo, *pos);
1049 }
1050
1051 static void devlog_stop(struct seq_file *seq, void *v)
1052 {
1053 }
1054
1055 static const struct seq_operations devlog_seq_ops = {
1056         .start = devlog_start,
1057         .next  = devlog_next,
1058         .stop  = devlog_stop,
1059         .show  = devlog_show
1060 };
1061
1062 /* Set up for reading the firmware's device log.  We read the entire log here
1063  * and then display it incrementally in devlog_show().
1064  */
1065 static int devlog_open(struct inode *inode, struct file *file)
1066 {
1067         struct adapter *adap = inode->i_private;
1068         struct devlog_params *dparams = &adap->params.devlog;
1069         struct devlog_info *dinfo;
1070         unsigned int index;
1071         u32 fseqno;
1072         int ret;
1073
1074         /* If we don't know where the log is we can't do anything.
1075          */
1076         if (dparams->start == 0)
1077                 return -ENXIO;
1078
1079         /* Allocate the space to read in the firmware's device log and set up
1080          * for the iterated call to our display function.
1081          */
1082         dinfo = __seq_open_private(file, &devlog_seq_ops,
1083                                    sizeof(*dinfo) + dparams->size);
1084         if (!dinfo)
1085                 return -ENOMEM;
1086
1087         /* Record the basic log buffer information and read in the raw log.
1088          */
1089         dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
1090         dinfo->first = 0;
1091         spin_lock(&adap->win0_lock);
1092         ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
1093                            dparams->start, dparams->size, (__be32 *)dinfo->log,
1094                            T4_MEMORY_READ);
1095         spin_unlock(&adap->win0_lock);
1096         if (ret) {
1097                 seq_release_private(inode, file);
1098                 return ret;
1099         }
1100
1101         /* Find the earliest (lowest Sequence Number) log entry in the
1102          * circular Device Log.
1103          */
1104         for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
1105                 struct fw_devlog_e *e = &dinfo->log[index];
1106                 __u32 seqno;
1107
1108                 if (e->timestamp == 0)
1109                         continue;
1110
1111                 seqno = be32_to_cpu(e->seqno);
1112                 if (seqno < fseqno) {
1113                         fseqno = seqno;
1114                         dinfo->first = index;
1115                 }
1116         }
1117         return 0;
1118 }
1119
1120 static const struct file_operations devlog_fops = {
1121         .owner   = THIS_MODULE,
1122         .open    = devlog_open,
1123         .read    = seq_read,
1124         .llseek  = seq_lseek,
1125         .release = seq_release_private
1126 };
1127
1128 static int mbox_show(struct seq_file *seq, void *v)
1129 {
1130         static const char * const owner[] = { "none", "FW", "driver",
1131                                               "unknown" };
1132
1133         int i;
1134         unsigned int mbox = (uintptr_t)seq->private & 7;
1135         struct adapter *adap = seq->private - mbox;
1136         void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1137         unsigned int ctrl_reg = (is_t4(adap->params.chip)
1138                                  ? CIM_PF_MAILBOX_CTRL_A
1139                                  : CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A);
1140         void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg);
1141
1142         i = MBOWNER_G(readl(ctrl));
1143         seq_printf(seq, "mailbox owned by %s\n\n", owner[i]);
1144
1145         for (i = 0; i < MBOX_LEN; i += 8)
1146                 seq_printf(seq, "%016llx\n",
1147                            (unsigned long long)readq(addr + i));
1148         return 0;
1149 }
1150
1151 static int mbox_open(struct inode *inode, struct file *file)
1152 {
1153         return single_open(file, mbox_show, inode->i_private);
1154 }
1155
1156 static ssize_t mbox_write(struct file *file, const char __user *buf,
1157                           size_t count, loff_t *pos)
1158 {
1159         int i;
1160         char c = '\n', s[256];
1161         unsigned long long data[8];
1162         const struct inode *ino;
1163         unsigned int mbox;
1164         struct adapter *adap;
1165         void __iomem *addr;
1166         void __iomem *ctrl;
1167
1168         if (count > sizeof(s) - 1 || !count)
1169                 return -EINVAL;
1170         if (copy_from_user(s, buf, count))
1171                 return -EFAULT;
1172         s[count] = '\0';
1173
1174         if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0],
1175                    &data[1], &data[2], &data[3], &data[4], &data[5], &data[6],
1176                    &data[7], &c) < 8 || c != '\n')
1177                 return -EINVAL;
1178
1179         ino = file_inode(file);
1180         mbox = (uintptr_t)ino->i_private & 7;
1181         adap = ino->i_private - mbox;
1182         addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1183         ctrl = addr + MBOX_LEN;
1184
1185         if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
1186                 return -EBUSY;
1187
1188         for (i = 0; i < 8; i++)
1189                 writeq(data[i], addr + 8 * i);
1190
1191         writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
1192         return count;
1193 }
1194
1195 static const struct file_operations mbox_debugfs_fops = {
1196         .owner   = THIS_MODULE,
1197         .open    = mbox_open,
1198         .read    = seq_read,
1199         .llseek  = seq_lseek,
1200         .release = single_release,
1201         .write   = mbox_write
1202 };
1203
1204 static int mps_trc_show(struct seq_file *seq, void *v)
1205 {
1206         int enabled, i;
1207         struct trace_params tp;
1208         unsigned int trcidx = (uintptr_t)seq->private & 3;
1209         struct adapter *adap = seq->private - trcidx;
1210
1211         t4_get_trace_filter(adap, &tp, trcidx, &enabled);
1212         if (!enabled) {
1213                 seq_puts(seq, "tracer is disabled\n");
1214                 return 0;
1215         }
1216
1217         if (tp.skip_ofst * 8 >= TRACE_LEN) {
1218                 dev_err(adap->pdev_dev, "illegal trace pattern skip offset\n");
1219                 return -EINVAL;
1220         }
1221         if (tp.port < 8) {
1222                 i = adap->chan_map[tp.port & 3];
1223                 if (i >= MAX_NPORTS) {
1224                         dev_err(adap->pdev_dev, "tracer %u is assigned "
1225                                 "to non-existing port\n", trcidx);
1226                         return -EINVAL;
1227                 }
1228                 seq_printf(seq, "tracer is capturing %s %s, ",
1229                            adap->port[i]->name, tp.port < 4 ? "Rx" : "Tx");
1230         } else
1231                 seq_printf(seq, "tracer is capturing loopback %d, ",
1232                            tp.port - 8);
1233         seq_printf(seq, "snap length: %u, min length: %u\n", tp.snap_len,
1234                    tp.min_len);
1235         seq_printf(seq, "packets captured %smatch filter\n",
1236                    tp.invert ? "do not " : "");
1237
1238         if (tp.skip_ofst) {
1239                 seq_puts(seq, "filter pattern: ");
1240                 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1241                         seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1242                 seq_putc(seq, '/');
1243                 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1244                         seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1245                 seq_puts(seq, "@0\n");
1246         }
1247
1248         seq_puts(seq, "filter pattern: ");
1249         for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1250                 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1251         seq_putc(seq, '/');
1252         for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1253                 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1254         seq_printf(seq, "@%u\n", (tp.skip_ofst + tp.skip_len) * 8);
1255         return 0;
1256 }
1257
1258 static int mps_trc_open(struct inode *inode, struct file *file)
1259 {
1260         return single_open(file, mps_trc_show, inode->i_private);
1261 }
1262
1263 static unsigned int xdigit2int(unsigned char c)
1264 {
1265         return isdigit(c) ? c - '0' : tolower(c) - 'a' + 10;
1266 }
1267
1268 #define TRC_PORT_NONE 0xff
1269 #define TRC_RSS_ENABLE 0x33
1270 #define TRC_RSS_DISABLE 0x13
1271
1272 /* Set an MPS trace filter.  Syntax is:
1273  *
1274  * disable
1275  *
1276  * to disable tracing, or
1277  *
1278  * interface qid=<qid no> [snaplen=<val>] [minlen=<val>] [not] [<pattern>]...
1279  *
1280  * where interface is one of rxN, txN, or loopbackN, N = 0..3, qid can be one
1281  * of the NIC's response qid obtained from sge_qinfo and pattern has the form
1282  *
1283  * <pattern data>[/<pattern mask>][@<anchor>]
1284  *
1285  * Up to 2 filter patterns can be specified.  If 2 are supplied the first one
1286  * must be anchored at 0.  An omited mask is taken as a mask of 1s, an omitted
1287  * anchor is taken as 0.
1288  */
1289 static ssize_t mps_trc_write(struct file *file, const char __user *buf,
1290                              size_t count, loff_t *pos)
1291 {
1292         int i, j, enable, ret;
1293         u32 *data, *mask;
1294         struct trace_params tp;
1295         const struct inode *ino;
1296         unsigned int trcidx;
1297         char *s, *p, *word, *end;
1298         struct adapter *adap;
1299
1300         ino = file_inode(file);
1301         trcidx = (uintptr_t)ino->i_private & 3;
1302         adap = ino->i_private - trcidx;
1303
1304         /* Don't accept input more than 1K, can't be anything valid except lots
1305          * of whitespace.  Well, use less.
1306          */
1307         if (count > 1024)
1308                 return -EFBIG;
1309         p = s = kzalloc(count + 1, GFP_USER);
1310         if (!s)
1311                 return -ENOMEM;
1312         if (copy_from_user(s, buf, count)) {
1313                 count = -EFAULT;
1314                 goto out;
1315         }
1316
1317         if (s[count - 1] == '\n')
1318                 s[count - 1] = '\0';
1319
1320         enable = strcmp("disable", s) != 0;
1321         if (!enable)
1322                 goto apply;
1323
1324         /* enable or disable trace multi rss filter */
1325         if (adap->trace_rss)
1326                 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_ENABLE);
1327         else
1328                 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_DISABLE);
1329
1330         memset(&tp, 0, sizeof(tp));
1331         tp.port = TRC_PORT_NONE;
1332         i = 0;  /* counts pattern nibbles */
1333
1334         while (p) {
1335                 while (isspace(*p))
1336                         p++;
1337                 word = strsep(&p, " ");
1338                 if (!*word)
1339                         break;
1340
1341                 if (!strncmp(word, "qid=", 4)) {
1342                         end = (char *)word + 4;
1343                         ret = kstrtoul(end, 10, (unsigned long *)&j);
1344                         if (ret)
1345                                 goto out;
1346                         if (!adap->trace_rss) {
1347                                 t4_write_reg(adap, MPS_T5_TRC_RSS_CONTROL_A, j);
1348                                 continue;
1349                         }
1350
1351                         switch (trcidx) {
1352                         case 0:
1353                                 t4_write_reg(adap, MPS_TRC_RSS_CONTROL_A, j);
1354                                 break;
1355                         case 1:
1356                                 t4_write_reg(adap,
1357                                              MPS_TRC_FILTER1_RSS_CONTROL_A, j);
1358                                 break;
1359                         case 2:
1360                                 t4_write_reg(adap,
1361                                              MPS_TRC_FILTER2_RSS_CONTROL_A, j);
1362                                 break;
1363                         case 3:
1364                                 t4_write_reg(adap,
1365                                              MPS_TRC_FILTER3_RSS_CONTROL_A, j);
1366                                 break;
1367                         }
1368                         continue;
1369                 }
1370                 if (!strncmp(word, "snaplen=", 8)) {
1371                         end = (char *)word + 8;
1372                         ret = kstrtoul(end, 10, (unsigned long *)&j);
1373                         if (ret || j > 9600) {
1374 inval:                          count = -EINVAL;
1375                                 goto out;
1376                         }
1377                         tp.snap_len = j;
1378                         continue;
1379                 }
1380                 if (!strncmp(word, "minlen=", 7)) {
1381                         end = (char *)word + 7;
1382                         ret = kstrtoul(end, 10, (unsigned long *)&j);
1383                         if (ret || j > TFMINPKTSIZE_M)
1384                                 goto inval;
1385                         tp.min_len = j;
1386                         continue;
1387                 }
1388                 if (!strcmp(word, "not")) {
1389                         tp.invert = !tp.invert;
1390                         continue;
1391                 }
1392                 if (!strncmp(word, "loopback", 8) && tp.port == TRC_PORT_NONE) {
1393                         if (word[8] < '0' || word[8] > '3' || word[9])
1394                                 goto inval;
1395                         tp.port = word[8] - '0' + 8;
1396                         continue;
1397                 }
1398                 if (!strncmp(word, "tx", 2) && tp.port == TRC_PORT_NONE) {
1399                         if (word[2] < '0' || word[2] > '3' || word[3])
1400                                 goto inval;
1401                         tp.port = word[2] - '0' + 4;
1402                         if (adap->chan_map[tp.port & 3] >= MAX_NPORTS)
1403                                 goto inval;
1404                         continue;
1405                 }
1406                 if (!strncmp(word, "rx", 2) && tp.port == TRC_PORT_NONE) {
1407                         if (word[2] < '0' || word[2] > '3' || word[3])
1408                                 goto inval;
1409                         tp.port = word[2] - '0';
1410                         if (adap->chan_map[tp.port] >= MAX_NPORTS)
1411                                 goto inval;
1412                         continue;
1413                 }
1414                 if (!isxdigit(*word))
1415                         goto inval;
1416
1417                 /* we have found a trace pattern */
1418                 if (i) {                            /* split pattern */
1419                         if (tp.skip_len)            /* too many splits */
1420                                 goto inval;
1421                         tp.skip_ofst = i / 16;
1422                 }
1423
1424                 data = &tp.data[i / 8];
1425                 mask = &tp.mask[i / 8];
1426                 j = i;
1427
1428                 while (isxdigit(*word)) {
1429                         if (i >= TRACE_LEN * 2) {
1430                                 count = -EFBIG;
1431                                 goto out;
1432                         }
1433                         *data = (*data << 4) + xdigit2int(*word++);
1434                         if (++i % 8 == 0)
1435                                 data++;
1436                 }
1437                 if (*word == '/') {
1438                         word++;
1439                         while (isxdigit(*word)) {
1440                                 if (j >= i)         /* mask longer than data */
1441                                         goto inval;
1442                                 *mask = (*mask << 4) + xdigit2int(*word++);
1443                                 if (++j % 8 == 0)
1444                                         mask++;
1445                         }
1446                         if (i != j)                 /* mask shorter than data */
1447                                 goto inval;
1448                 } else {                            /* no mask, use all 1s */
1449                         for ( ; i - j >= 8; j += 8)
1450                                 *mask++ = 0xffffffff;
1451                         if (i % 8)
1452                                 *mask = (1 << (i % 8) * 4) - 1;
1453                 }
1454                 if (*word == '@') {
1455                         end = (char *)word + 1;
1456                         ret = kstrtoul(end, 10, (unsigned long *)&j);
1457                         if (*end && *end != '\n')
1458                                 goto inval;
1459                         if (j & 7)          /* doesn't start at multiple of 8 */
1460                                 goto inval;
1461                         j /= 8;
1462                         if (j < tp.skip_ofst)     /* overlaps earlier pattern */
1463                                 goto inval;
1464                         if (j - tp.skip_ofst > 31)            /* skip too big */
1465                                 goto inval;
1466                         tp.skip_len = j - tp.skip_ofst;
1467                 }
1468                 if (i % 8) {
1469                         *data <<= (8 - i % 8) * 4;
1470                         *mask <<= (8 - i % 8) * 4;
1471                         i = (i + 15) & ~15;         /* 8-byte align */
1472                 }
1473         }
1474
1475         if (tp.port == TRC_PORT_NONE)
1476                 goto inval;
1477
1478 apply:
1479         i = t4_set_trace_filter(adap, &tp, trcidx, enable);
1480         if (i)
1481                 count = i;
1482 out:
1483         kfree(s);
1484         return count;
1485 }
1486
1487 static const struct file_operations mps_trc_debugfs_fops = {
1488         .owner   = THIS_MODULE,
1489         .open    = mps_trc_open,
1490         .read    = seq_read,
1491         .llseek  = seq_lseek,
1492         .release = single_release,
1493         .write   = mps_trc_write
1494 };
1495
1496 static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
1497                           loff_t *ppos)
1498 {
1499         loff_t pos = *ppos;
1500         loff_t avail = file_inode(file)->i_size;
1501         struct adapter *adap = file->private_data;
1502
1503         if (pos < 0)
1504                 return -EINVAL;
1505         if (pos >= avail)
1506                 return 0;
1507         if (count > avail - pos)
1508                 count = avail - pos;
1509
1510         while (count) {
1511                 size_t len;
1512                 int ret, ofst;
1513                 u8 data[256];
1514
1515                 ofst = pos & 3;
1516                 len = min(count + ofst, sizeof(data));
1517                 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
1518                                     (u32 *)data, 1);
1519                 if (ret)
1520                         return ret;
1521
1522                 len -= ofst;
1523                 if (copy_to_user(buf, data + ofst, len))
1524                         return -EFAULT;
1525
1526                 buf += len;
1527                 pos += len;
1528                 count -= len;
1529         }
1530         count = pos - *ppos;
1531         *ppos = pos;
1532         return count;
1533 }
1534
1535 static const struct file_operations flash_debugfs_fops = {
1536         .owner   = THIS_MODULE,
1537         .open    = mem_open,
1538         .read    = flash_read,
1539 };
1540
1541 static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
1542 {
1543         *mask = x | y;
1544         y = (__force u64)cpu_to_be64(y);
1545         memcpy(addr, (char *)&y + 2, ETH_ALEN);
1546 }
1547
1548 static int mps_tcam_show(struct seq_file *seq, void *v)
1549 {
1550         struct adapter *adap = seq->private;
1551         unsigned int chip_ver = CHELSIO_CHIP_VERSION(adap->params.chip);
1552
1553         if (v == SEQ_START_TOKEN) {
1554                 if (adap->params.arch.mps_rplc_size > 128)
1555                         seq_puts(seq, "Idx  Ethernet address     Mask     "
1556                                  "Vld Ports PF  VF                           "
1557                                  "Replication                                "
1558                                  "    P0 P1 P2 P3  ML\n");
1559                 else
1560                         seq_puts(seq, "Idx  Ethernet address     Mask     "
1561                                  "Vld Ports PF  VF              Replication"
1562                                  "               P0 P1 P2 P3  ML\n");
1563         } else {
1564                 u64 mask;
1565                 u8 addr[ETH_ALEN];
1566                 bool replicate;
1567                 unsigned int idx = (uintptr_t)v - 2;
1568                 u64 tcamy, tcamx, val;
1569                 u32 cls_lo, cls_hi, ctl;
1570                 u32 rplc[8] = {0};
1571
1572                 if (chip_ver > CHELSIO_T5) {
1573                         /* CtlCmdType - 0: Read, 1: Write
1574                          * CtlTcamSel - 0: TCAM0, 1: TCAM1
1575                          * CtlXYBitSel- 0: Y bit, 1: X bit
1576                          */
1577
1578                         /* Read tcamy */
1579                         ctl = CTLCMDTYPE_V(0) | CTLXYBITSEL_V(0);
1580                         if (idx < 256)
1581                                 ctl |= CTLTCAMINDEX_V(idx) | CTLTCAMSEL_V(0);
1582                         else
1583                                 ctl |= CTLTCAMINDEX_V(idx - 256) |
1584                                        CTLTCAMSEL_V(1);
1585                         t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1586                         val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1587                         tcamy = DMACH_G(val) << 32;
1588                         tcamy |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1589
1590                         /* Read tcamx. Change the control param */
1591                         ctl |= CTLXYBITSEL_V(1);
1592                         t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1593                         val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1594                         tcamx = DMACH_G(val) << 32;
1595                         tcamx |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1596                 } else {
1597                         tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
1598                         tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
1599                 }
1600
1601                 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
1602                 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
1603
1604                 if (tcamx & tcamy) {
1605                         seq_printf(seq, "%3u         -\n", idx);
1606                         goto out;
1607                 }
1608
1609                 rplc[0] = rplc[1] = rplc[2] = rplc[3] = 0;
1610                 if (chip_ver > CHELSIO_T5)
1611                         replicate = (cls_lo & T6_REPLICATE_F);
1612                 else
1613                         replicate = (cls_lo & REPLICATE_F);
1614
1615                 if (replicate) {
1616                         struct fw_ldst_cmd ldst_cmd;
1617                         int ret;
1618                         struct fw_ldst_mps_rplc mps_rplc;
1619                         u32 ldst_addrspc;
1620
1621                         memset(&ldst_cmd, 0, sizeof(ldst_cmd));
1622                         ldst_addrspc =
1623                                 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MPS);
1624                         ldst_cmd.op_to_addrspace =
1625                                 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
1626                                       FW_CMD_REQUEST_F |
1627                                       FW_CMD_READ_F |
1628                                       ldst_addrspc);
1629                         ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
1630                         ldst_cmd.u.mps.rplc.fid_idx =
1631                                 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
1632                                       FW_LDST_CMD_IDX_V(idx));
1633                         ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
1634                                          sizeof(ldst_cmd), &ldst_cmd);
1635                         if (ret)
1636                                 dev_warn(adap->pdev_dev, "Can't read MPS "
1637                                          "replication map for idx %d: %d\n",
1638                                          idx, -ret);
1639                         else {
1640                                 mps_rplc = ldst_cmd.u.mps.rplc;
1641                                 rplc[0] = ntohl(mps_rplc.rplc31_0);
1642                                 rplc[1] = ntohl(mps_rplc.rplc63_32);
1643                                 rplc[2] = ntohl(mps_rplc.rplc95_64);
1644                                 rplc[3] = ntohl(mps_rplc.rplc127_96);
1645                                 if (adap->params.arch.mps_rplc_size > 128) {
1646                                         rplc[4] = ntohl(mps_rplc.rplc159_128);
1647                                         rplc[5] = ntohl(mps_rplc.rplc191_160);
1648                                         rplc[6] = ntohl(mps_rplc.rplc223_192);
1649                                         rplc[7] = ntohl(mps_rplc.rplc255_224);
1650                                 }
1651                         }
1652                 }
1653
1654                 tcamxy2valmask(tcamx, tcamy, addr, &mask);
1655                 if (chip_ver > CHELSIO_T5)
1656                         seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1657                                    "%012llx%3c   %#x%4u%4d",
1658                                    idx, addr[0], addr[1], addr[2], addr[3],
1659                                    addr[4], addr[5], (unsigned long long)mask,
1660                                    (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1661                                    PORTMAP_G(cls_hi),
1662                                    T6_PF_G(cls_lo),
1663                                    (cls_lo & T6_VF_VALID_F) ?
1664                                    T6_VF_G(cls_lo) : -1);
1665                 else
1666                         seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1667                                    "%012llx%3c   %#x%4u%4d",
1668                                    idx, addr[0], addr[1], addr[2], addr[3],
1669                                    addr[4], addr[5], (unsigned long long)mask,
1670                                    (cls_lo & SRAM_VLD_F) ? 'Y' : 'N',
1671                                    PORTMAP_G(cls_hi),
1672                                    PF_G(cls_lo),
1673                                    (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
1674
1675                 if (replicate) {
1676                         if (adap->params.arch.mps_rplc_size > 128)
1677                                 seq_printf(seq, " %08x %08x %08x %08x "
1678                                            "%08x %08x %08x %08x",
1679                                            rplc[7], rplc[6], rplc[5], rplc[4],
1680                                            rplc[3], rplc[2], rplc[1], rplc[0]);
1681                         else
1682                                 seq_printf(seq, " %08x %08x %08x %08x",
1683                                            rplc[3], rplc[2], rplc[1], rplc[0]);
1684                 } else {
1685                         if (adap->params.arch.mps_rplc_size > 128)
1686                                 seq_printf(seq, "%72c", ' ');
1687                         else
1688                                 seq_printf(seq, "%36c", ' ');
1689                 }
1690
1691                 if (chip_ver > CHELSIO_T5)
1692                         seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1693                                    T6_SRAM_PRIO0_G(cls_lo),
1694                                    T6_SRAM_PRIO1_G(cls_lo),
1695                                    T6_SRAM_PRIO2_G(cls_lo),
1696                                    T6_SRAM_PRIO3_G(cls_lo),
1697                                    (cls_lo >> T6_MULTILISTEN0_S) & 0xf);
1698                 else
1699                         seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1700                                    SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
1701                                    SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
1702                                    (cls_lo >> MULTILISTEN0_S) & 0xf);
1703         }
1704 out:    return 0;
1705 }
1706
1707 static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
1708 {
1709         struct adapter *adap = seq->private;
1710         int max_mac_addr = is_t4(adap->params.chip) ?
1711                                 NUM_MPS_CLS_SRAM_L_INSTANCES :
1712                                 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1713         return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
1714 }
1715
1716 static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
1717 {
1718         return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
1719 }
1720
1721 static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
1722 {
1723         ++*pos;
1724         return mps_tcam_get_idx(seq, *pos);
1725 }
1726
1727 static void mps_tcam_stop(struct seq_file *seq, void *v)
1728 {
1729 }
1730
1731 static const struct seq_operations mps_tcam_seq_ops = {
1732         .start = mps_tcam_start,
1733         .next  = mps_tcam_next,
1734         .stop  = mps_tcam_stop,
1735         .show  = mps_tcam_show
1736 };
1737
1738 static int mps_tcam_open(struct inode *inode, struct file *file)
1739 {
1740         int res = seq_open(file, &mps_tcam_seq_ops);
1741
1742         if (!res) {
1743                 struct seq_file *seq = file->private_data;
1744
1745                 seq->private = inode->i_private;
1746         }
1747         return res;
1748 }
1749
1750 static const struct file_operations mps_tcam_debugfs_fops = {
1751         .owner   = THIS_MODULE,
1752         .open    = mps_tcam_open,
1753         .read    = seq_read,
1754         .llseek  = seq_lseek,
1755         .release = seq_release,
1756 };
1757
1758 /* Display various sensor information.
1759  */
1760 static int sensors_show(struct seq_file *seq, void *v)
1761 {
1762         struct adapter *adap = seq->private;
1763         u32 param[7], val[7];
1764         int ret;
1765
1766         /* Note that if the sensors haven't been initialized and turned on
1767          * we'll get values of 0, so treat those as "<unknown>" ...
1768          */
1769         param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1770                     FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1771                     FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
1772         param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1773                     FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1774                     FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
1775         ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 2,
1776                               param, val);
1777
1778         if (ret < 0 || val[0] == 0)
1779                 seq_puts(seq, "Temperature: <unknown>\n");
1780         else
1781                 seq_printf(seq, "Temperature: %dC\n", val[0]);
1782
1783         if (ret < 0 || val[1] == 0)
1784                 seq_puts(seq, "Core VDD:    <unknown>\n");
1785         else
1786                 seq_printf(seq, "Core VDD:    %dmV\n", val[1]);
1787
1788         return 0;
1789 }
1790
1791 DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
1792
1793 #if IS_ENABLED(CONFIG_IPV6)
1794 static int clip_tbl_open(struct inode *inode, struct file *file)
1795 {
1796         return single_open(file, clip_tbl_show, inode->i_private);
1797 }
1798
1799 static const struct file_operations clip_tbl_debugfs_fops = {
1800         .owner   = THIS_MODULE,
1801         .open    = clip_tbl_open,
1802         .read    = seq_read,
1803         .llseek  = seq_lseek,
1804         .release = single_release
1805 };
1806 #endif
1807
1808 /*RSS Table.
1809  */
1810
1811 static int rss_show(struct seq_file *seq, void *v, int idx)
1812 {
1813         u16 *entry = v;
1814
1815         seq_printf(seq, "%4d:  %4u  %4u  %4u  %4u  %4u  %4u  %4u  %4u\n",
1816                    idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
1817                    entry[5], entry[6], entry[7]);
1818         return 0;
1819 }
1820
1821 static int rss_open(struct inode *inode, struct file *file)
1822 {
1823         int ret;
1824         struct seq_tab *p;
1825         struct adapter *adap = inode->i_private;
1826
1827         p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show);
1828         if (!p)
1829                 return -ENOMEM;
1830
1831         ret = t4_read_rss(adap, (u16 *)p->data);
1832         if (ret)
1833                 seq_release_private(inode, file);
1834
1835         return ret;
1836 }
1837
1838 static const struct file_operations rss_debugfs_fops = {
1839         .owner   = THIS_MODULE,
1840         .open    = rss_open,
1841         .read    = seq_read,
1842         .llseek  = seq_lseek,
1843         .release = seq_release_private
1844 };
1845
1846 /* RSS Configuration.
1847  */
1848
1849 /* Small utility function to return the strings "yes" or "no" if the supplied
1850  * argument is non-zero.
1851  */
1852 static const char *yesno(int x)
1853 {
1854         static const char *yes = "yes";
1855         static const char *no = "no";
1856
1857         return x ? yes : no;
1858 }
1859
1860 static int rss_config_show(struct seq_file *seq, void *v)
1861 {
1862         struct adapter *adapter = seq->private;
1863         static const char * const keymode[] = {
1864                 "global",
1865                 "global and per-VF scramble",
1866                 "per-PF and per-VF scramble",
1867                 "per-VF and per-VF scramble",
1868         };
1869         u32 rssconf;
1870
1871         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
1872         seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
1873         seq_printf(seq, "  Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
1874                                                         TNL4TUPENIPV6_F));
1875         seq_printf(seq, "  Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
1876                                                         TNL2TUPENIPV6_F));
1877         seq_printf(seq, "  Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
1878                                                         TNL4TUPENIPV4_F));
1879         seq_printf(seq, "  Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
1880                                                         TNL2TUPENIPV4_F));
1881         seq_printf(seq, "  TnlTcpSel:     %3s\n", yesno(rssconf & TNLTCPSEL_F));
1882         seq_printf(seq, "  TnlIp6Sel:     %3s\n", yesno(rssconf & TNLIP6SEL_F));
1883         seq_printf(seq, "  TnlVrtSel:     %3s\n", yesno(rssconf & TNLVRTSEL_F));
1884         seq_printf(seq, "  TnlMapEn:      %3s\n", yesno(rssconf & TNLMAPEN_F));
1885         seq_printf(seq, "  OfdHashSave:   %3s\n", yesno(rssconf &
1886                                                         OFDHASHSAVE_F));
1887         seq_printf(seq, "  OfdVrtSel:     %3s\n", yesno(rssconf & OFDVRTSEL_F));
1888         seq_printf(seq, "  OfdMapEn:      %3s\n", yesno(rssconf & OFDMAPEN_F));
1889         seq_printf(seq, "  OfdLkpEn:      %3s\n", yesno(rssconf & OFDLKPEN_F));
1890         seq_printf(seq, "  Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1891                                                         SYN4TUPENIPV6_F));
1892         seq_printf(seq, "  Syn2TupEnIpv6: %3s\n", yesno(rssconf &
1893                                                         SYN2TUPENIPV6_F));
1894         seq_printf(seq, "  Syn4TupEnIpv4: %3s\n", yesno(rssconf &
1895                                                         SYN4TUPENIPV4_F));
1896         seq_printf(seq, "  Syn2TupEnIpv4: %3s\n", yesno(rssconf &
1897                                                         SYN2TUPENIPV4_F));
1898         seq_printf(seq, "  Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1899                                                         SYN4TUPENIPV6_F));
1900         seq_printf(seq, "  SynIp6Sel:     %3s\n", yesno(rssconf & SYNIP6SEL_F));
1901         seq_printf(seq, "  SynVrt6Sel:    %3s\n", yesno(rssconf & SYNVRTSEL_F));
1902         seq_printf(seq, "  SynMapEn:      %3s\n", yesno(rssconf & SYNMAPEN_F));
1903         seq_printf(seq, "  SynLkpEn:      %3s\n", yesno(rssconf & SYNLKPEN_F));
1904         seq_printf(seq, "  ChnEn:         %3s\n", yesno(rssconf &
1905                                                         CHANNELENABLE_F));
1906         seq_printf(seq, "  PrtEn:         %3s\n", yesno(rssconf &
1907                                                         PORTENABLE_F));
1908         seq_printf(seq, "  TnlAllLkp:     %3s\n", yesno(rssconf &
1909                                                         TNLALLLOOKUP_F));
1910         seq_printf(seq, "  VrtEn:         %3s\n", yesno(rssconf &
1911                                                         VIRTENABLE_F));
1912         seq_printf(seq, "  CngEn:         %3s\n", yesno(rssconf &
1913                                                         CONGESTIONENABLE_F));
1914         seq_printf(seq, "  HashToeplitz:  %3s\n", yesno(rssconf &
1915                                                         HASHTOEPLITZ_F));
1916         seq_printf(seq, "  Udp4En:        %3s\n", yesno(rssconf & UDPENABLE_F));
1917         seq_printf(seq, "  Disable:       %3s\n", yesno(rssconf & DISABLE_F));
1918
1919         seq_puts(seq, "\n");
1920
1921         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
1922         seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
1923         seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
1924         seq_printf(seq, "  MaskFilter:    %3d\n", MASKFILTER_G(rssconf));
1925         if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1926                 seq_printf(seq, "  HashAll:     %3s\n",
1927                            yesno(rssconf & HASHALL_F));
1928                 seq_printf(seq, "  HashEth:     %3s\n",
1929                            yesno(rssconf & HASHETH_F));
1930         }
1931         seq_printf(seq, "  UseWireCh:     %3s\n", yesno(rssconf & USEWIRECH_F));
1932
1933         seq_puts(seq, "\n");
1934
1935         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
1936         seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
1937         seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
1938         seq_printf(seq, "  RRCplMapEn:    %3s\n", yesno(rssconf &
1939                                                         RRCPLMAPEN_F));
1940         seq_printf(seq, "  RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
1941
1942         seq_puts(seq, "\n");
1943
1944         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
1945         seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
1946         seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
1947         seq_printf(seq, "  UseWireCh:     %3s\n", yesno(rssconf & USEWIRECH_F));
1948
1949         seq_puts(seq, "\n");
1950
1951         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
1952         seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
1953         if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1954                 seq_printf(seq, "  KeyWrAddrX:     %3d\n",
1955                            KEYWRADDRX_G(rssconf));
1956                 seq_printf(seq, "  KeyExtend:      %3s\n",
1957                            yesno(rssconf & KEYEXTEND_F));
1958         }
1959         seq_printf(seq, "  VfRdRg:        %3s\n", yesno(rssconf & VFRDRG_F));
1960         seq_printf(seq, "  VfRdEn:        %3s\n", yesno(rssconf & VFRDEN_F));
1961         seq_printf(seq, "  VfPerrEn:      %3s\n", yesno(rssconf & VFPERREN_F));
1962         seq_printf(seq, "  KeyPerrEn:     %3s\n", yesno(rssconf & KEYPERREN_F));
1963         seq_printf(seq, "  DisVfVlan:     %3s\n", yesno(rssconf &
1964                                                         DISABLEVLAN_F));
1965         seq_printf(seq, "  EnUpSwt:       %3s\n", yesno(rssconf & ENABLEUP0_F));
1966         seq_printf(seq, "  HashDelay:     %3d\n", HASHDELAY_G(rssconf));
1967         if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
1968                 seq_printf(seq, "  VfWrAddr:      %3d\n", VFWRADDR_G(rssconf));
1969         else
1970                 seq_printf(seq, "  VfWrAddr:      %3d\n",
1971                            T6_VFWRADDR_G(rssconf));
1972         seq_printf(seq, "  KeyMode:       %s\n", keymode[KEYMODE_G(rssconf)]);
1973         seq_printf(seq, "  VfWrEn:        %3s\n", yesno(rssconf & VFWREN_F));
1974         seq_printf(seq, "  KeyWrEn:       %3s\n", yesno(rssconf & KEYWREN_F));
1975         seq_printf(seq, "  KeyWrAddr:     %3d\n", KEYWRADDR_G(rssconf));
1976
1977         seq_puts(seq, "\n");
1978
1979         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
1980         seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
1981         seq_printf(seq, "  ChnCount3:     %3s\n", yesno(rssconf & CHNCOUNT3_F));
1982         seq_printf(seq, "  ChnCount2:     %3s\n", yesno(rssconf & CHNCOUNT2_F));
1983         seq_printf(seq, "  ChnCount1:     %3s\n", yesno(rssconf & CHNCOUNT1_F));
1984         seq_printf(seq, "  ChnCount0:     %3s\n", yesno(rssconf & CHNCOUNT0_F));
1985         seq_printf(seq, "  ChnUndFlow3:   %3s\n", yesno(rssconf &
1986                                                         CHNUNDFLOW3_F));
1987         seq_printf(seq, "  ChnUndFlow2:   %3s\n", yesno(rssconf &
1988                                                         CHNUNDFLOW2_F));
1989         seq_printf(seq, "  ChnUndFlow1:   %3s\n", yesno(rssconf &
1990                                                         CHNUNDFLOW1_F));
1991         seq_printf(seq, "  ChnUndFlow0:   %3s\n", yesno(rssconf &
1992                                                         CHNUNDFLOW0_F));
1993         seq_printf(seq, "  RstChn3:       %3s\n", yesno(rssconf & RSTCHN3_F));
1994         seq_printf(seq, "  RstChn2:       %3s\n", yesno(rssconf & RSTCHN2_F));
1995         seq_printf(seq, "  RstChn1:       %3s\n", yesno(rssconf & RSTCHN1_F));
1996         seq_printf(seq, "  RstChn0:       %3s\n", yesno(rssconf & RSTCHN0_F));
1997         seq_printf(seq, "  UpdVld:        %3s\n", yesno(rssconf & UPDVLD_F));
1998         seq_printf(seq, "  Xoff:          %3s\n", yesno(rssconf & XOFF_F));
1999         seq_printf(seq, "  UpdChn3:       %3s\n", yesno(rssconf & UPDCHN3_F));
2000         seq_printf(seq, "  UpdChn2:       %3s\n", yesno(rssconf & UPDCHN2_F));
2001         seq_printf(seq, "  UpdChn1:       %3s\n", yesno(rssconf & UPDCHN1_F));
2002         seq_printf(seq, "  UpdChn0:       %3s\n", yesno(rssconf & UPDCHN0_F));
2003         seq_printf(seq, "  Queue:         %3d\n", QUEUE_G(rssconf));
2004
2005         return 0;
2006 }
2007
2008 DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
2009
2010 /* RSS Secret Key.
2011  */
2012
2013 static int rss_key_show(struct seq_file *seq, void *v)
2014 {
2015         u32 key[10];
2016
2017         t4_read_rss_key(seq->private, key);
2018         seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
2019                    key[9], key[8], key[7], key[6], key[5], key[4], key[3],
2020                    key[2], key[1], key[0]);
2021         return 0;
2022 }
2023
2024 static int rss_key_open(struct inode *inode, struct file *file)
2025 {
2026         return single_open(file, rss_key_show, inode->i_private);
2027 }
2028
2029 static ssize_t rss_key_write(struct file *file, const char __user *buf,
2030                              size_t count, loff_t *pos)
2031 {
2032         int i, j;
2033         u32 key[10];
2034         char s[100], *p;
2035         struct adapter *adap = file_inode(file)->i_private;
2036
2037         if (count > sizeof(s) - 1)
2038                 return -EINVAL;
2039         if (copy_from_user(s, buf, count))
2040                 return -EFAULT;
2041         for (i = count; i > 0 && isspace(s[i - 1]); i--)
2042                 ;
2043         s[i] = '\0';
2044
2045         for (p = s, i = 9; i >= 0; i--) {
2046                 key[i] = 0;
2047                 for (j = 0; j < 8; j++, p++) {
2048                         if (!isxdigit(*p))
2049                                 return -EINVAL;
2050                         key[i] = (key[i] << 4) | hex2val(*p);
2051                 }
2052         }
2053
2054         t4_write_rss_key(adap, key, -1);
2055         return count;
2056 }
2057
2058 static const struct file_operations rss_key_debugfs_fops = {
2059         .owner   = THIS_MODULE,
2060         .open    = rss_key_open,
2061         .read    = seq_read,
2062         .llseek  = seq_lseek,
2063         .release = single_release,
2064         .write   = rss_key_write
2065 };
2066
2067 /* PF RSS Configuration.
2068  */
2069
2070 struct rss_pf_conf {
2071         u32 rss_pf_map;
2072         u32 rss_pf_mask;
2073         u32 rss_pf_config;
2074 };
2075
2076 static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
2077 {
2078         struct rss_pf_conf *pfconf;
2079
2080         if (v == SEQ_START_TOKEN) {
2081                 /* use the 0th entry to dump the PF Map Index Size */
2082                 pfconf = seq->private + offsetof(struct seq_tab, data);
2083                 seq_printf(seq, "PF Map Index Size = %d\n\n",
2084                            LKPIDXSIZE_G(pfconf->rss_pf_map));
2085
2086                 seq_puts(seq, "     RSS              PF   VF    Hash Tuple Enable         Default\n");
2087                 seq_puts(seq, "     Enable       IPF Mask Mask  IPv6      IPv4      UDP   Queue\n");
2088                 seq_puts(seq, " PF  Map Chn Prt  Map Size Size  Four Two  Four Two  Four  Ch1  Ch0\n");
2089         } else {
2090                 #define G_PFnLKPIDX(map, n) \
2091                         (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
2092                 #define G_PFnMSKSIZE(mask, n) \
2093                         (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
2094
2095                 pfconf = v;
2096                 seq_printf(seq, "%3d  %3s %3s %3s  %3d  %3d  %3d   %3s %3s   %3s %3s   %3s  %3d  %3d\n",
2097                            idx,
2098                            yesno(pfconf->rss_pf_config & MAPENABLE_F),
2099                            yesno(pfconf->rss_pf_config & CHNENABLE_F),
2100                            yesno(pfconf->rss_pf_config & PRTENABLE_F),
2101                            G_PFnLKPIDX(pfconf->rss_pf_map, idx),
2102                            G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
2103                            IVFWIDTH_G(pfconf->rss_pf_config),
2104                            yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
2105                            yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
2106                            yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
2107                            yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
2108                            yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
2109                            CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
2110                            CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
2111
2112                 #undef G_PFnLKPIDX
2113                 #undef G_PFnMSKSIZE
2114         }
2115         return 0;
2116 }
2117
2118 static int rss_pf_config_open(struct inode *inode, struct file *file)
2119 {
2120         struct adapter *adapter = inode->i_private;
2121         struct seq_tab *p;
2122         u32 rss_pf_map, rss_pf_mask;
2123         struct rss_pf_conf *pfconf;
2124         int pf;
2125
2126         p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
2127         if (!p)
2128                 return -ENOMEM;
2129
2130         pfconf = (struct rss_pf_conf *)p->data;
2131         rss_pf_map = t4_read_rss_pf_map(adapter);
2132         rss_pf_mask = t4_read_rss_pf_mask(adapter);
2133         for (pf = 0; pf < 8; pf++) {
2134                 pfconf[pf].rss_pf_map = rss_pf_map;
2135                 pfconf[pf].rss_pf_mask = rss_pf_mask;
2136                 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config);
2137         }
2138         return 0;
2139 }
2140
2141 static const struct file_operations rss_pf_config_debugfs_fops = {
2142         .owner   = THIS_MODULE,
2143         .open    = rss_pf_config_open,
2144         .read    = seq_read,
2145         .llseek  = seq_lseek,
2146         .release = seq_release_private
2147 };
2148
2149 /* VF RSS Configuration.
2150  */
2151
2152 struct rss_vf_conf {
2153         u32 rss_vf_vfl;
2154         u32 rss_vf_vfh;
2155 };
2156
2157 static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
2158 {
2159         if (v == SEQ_START_TOKEN) {
2160                 seq_puts(seq, "     RSS                     Hash Tuple Enable\n");
2161                 seq_puts(seq, "     Enable   IVF  Dis  Enb  IPv6      IPv4      UDP    Def  Secret Key\n");
2162                 seq_puts(seq, " VF  Chn Prt  Map  VLAN  uP  Four Two  Four Two  Four   Que  Idx       Hash\n");
2163         } else {
2164                 struct rss_vf_conf *vfconf = v;
2165
2166                 seq_printf(seq, "%3d  %3s %3s  %3d   %3s %3s   %3s %3s   %3s  %3s   %3s  %4d  %3d %#10x\n",
2167                            idx,
2168                            yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
2169                            yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
2170                            VFLKPIDX_G(vfconf->rss_vf_vfh),
2171                            yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
2172                            yesno(vfconf->rss_vf_vfh & VFUPEN_F),
2173                            yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2174                            yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
2175                            yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2176                            yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
2177                            yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
2178                            DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
2179                            KEYINDEX_G(vfconf->rss_vf_vfh),
2180                            vfconf->rss_vf_vfl);
2181         }
2182         return 0;
2183 }
2184
2185 static int rss_vf_config_open(struct inode *inode, struct file *file)
2186 {
2187         struct adapter *adapter = inode->i_private;
2188         struct seq_tab *p;
2189         struct rss_vf_conf *vfconf;
2190         int vf, vfcount = adapter->params.arch.vfcount;
2191
2192         p = seq_open_tab(file, vfcount, sizeof(*vfconf), 1, rss_vf_config_show);
2193         if (!p)
2194                 return -ENOMEM;
2195
2196         vfconf = (struct rss_vf_conf *)p->data;
2197         for (vf = 0; vf < vfcount; vf++) {
2198                 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
2199                                       &vfconf[vf].rss_vf_vfh);
2200         }
2201         return 0;
2202 }
2203
2204 static const struct file_operations rss_vf_config_debugfs_fops = {
2205         .owner   = THIS_MODULE,
2206         .open    = rss_vf_config_open,
2207         .read    = seq_read,
2208         .llseek  = seq_lseek,
2209         .release = seq_release_private
2210 };
2211
2212 /**
2213  * ethqset2pinfo - return port_info of an Ethernet Queue Set
2214  * @adap: the adapter
2215  * @qset: Ethernet Queue Set
2216  */
2217 static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
2218 {
2219         int pidx;
2220
2221         for_each_port(adap, pidx) {
2222                 struct port_info *pi = adap2pinfo(adap, pidx);
2223
2224                 if (qset >= pi->first_qset &&
2225                     qset < pi->first_qset + pi->nqsets)
2226                         return pi;
2227         }
2228
2229         /* should never happen! */
2230         BUG_ON(1);
2231         return NULL;
2232 }
2233
2234 static int sge_qinfo_show(struct seq_file *seq, void *v)
2235 {
2236         struct adapter *adap = seq->private;
2237         int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
2238         int iscsi_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
2239         int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
2240         int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
2241         int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
2242         int i, r = (uintptr_t)v - 1;
2243         int iscsi_idx = r - eth_entries;
2244         int rdma_idx = iscsi_idx - iscsi_entries;
2245         int ciq_idx = rdma_idx - rdma_entries;
2246         int ctrl_idx =  ciq_idx - ciq_entries;
2247         int fq_idx =  ctrl_idx - ctrl_entries;
2248
2249         if (r)
2250                 seq_putc(seq, '\n');
2251
2252 #define S3(fmt_spec, s, v) \
2253 do { \
2254         seq_printf(seq, "%-12s", s); \
2255         for (i = 0; i < n; ++i) \
2256                 seq_printf(seq, " %16" fmt_spec, v); \
2257                 seq_putc(seq, '\n'); \
2258 } while (0)
2259 #define S(s, v) S3("s", s, v)
2260 #define T3(fmt_spec, s, v) S3(fmt_spec, s, tx[i].v)
2261 #define T(s, v) S3("u", s, tx[i].v)
2262 #define TL(s, v) T3("lu", s, v)
2263 #define R3(fmt_spec, s, v) S3(fmt_spec, s, rx[i].v)
2264 #define R(s, v) S3("u", s, rx[i].v)
2265 #define RL(s, v) R3("lu", s, v)
2266
2267         if (r < eth_entries) {
2268                 int base_qset = r * 4;
2269                 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
2270                 const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
2271                 int n = min(4, adap->sge.ethqsets - 4 * r);
2272
2273                 S("QType:", "Ethernet");
2274                 S("Interface:",
2275                   rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2276                 T("TxQ ID:", q.cntxt_id);
2277                 T("TxQ size:", q.size);
2278                 T("TxQ inuse:", q.in_use);
2279                 T("TxQ CIDX:", q.cidx);
2280                 T("TxQ PIDX:", q.pidx);
2281 #ifdef CONFIG_CHELSIO_T4_DCB
2282                 T("DCB Prio:", dcb_prio);
2283                 S3("u", "DCB PGID:",
2284                    (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
2285                     4*(7-tx[i].dcb_prio)) & 0xf);
2286                 S3("u", "DCB PFC:",
2287                    (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
2288                     1*(7-tx[i].dcb_prio)) & 0x1);
2289 #endif
2290                 R("RspQ ID:", rspq.abs_id);
2291                 R("RspQ size:", rspq.size);
2292                 R("RspQE size:", rspq.iqe_len);
2293                 R("RspQ CIDX:", rspq.cidx);
2294                 R("RspQ Gen:", rspq.gen);
2295                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2296                 S3("u", "Intr pktcnt:",
2297                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2298                 R("FL ID:", fl.cntxt_id);
2299                 R("FL size:", fl.size - 8);
2300                 R("FL pend:", fl.pend_cred);
2301                 R("FL avail:", fl.avail);
2302                 R("FL PIDX:", fl.pidx);
2303                 R("FL CIDX:", fl.cidx);
2304                 RL("RxPackets:", stats.pkts);
2305                 RL("RxCSO:", stats.rx_cso);
2306                 RL("VLANxtract:", stats.vlan_ex);
2307                 RL("LROmerged:", stats.lro_merged);
2308                 RL("LROpackets:", stats.lro_pkts);
2309                 RL("RxDrops:", stats.rx_drops);
2310                 TL("TSO:", tso);
2311                 TL("TxCSO:", tx_cso);
2312                 TL("VLANins:", vlan_ins);
2313                 TL("TxQFull:", q.stops);
2314                 TL("TxQRestarts:", q.restarts);
2315                 TL("TxMapErr:", mapping_err);
2316                 RL("FLAllocErr:", fl.alloc_failed);
2317                 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2318                 RL("FLStarving:", fl.starving);
2319
2320         } else if (iscsi_idx < iscsi_entries) {
2321                 const struct sge_ofld_rxq *rx =
2322                         &adap->sge.ofldrxq[iscsi_idx * 4];
2323                 const struct sge_ofld_txq *tx =
2324                         &adap->sge.ofldtxq[iscsi_idx * 4];
2325                 int n = min(4, adap->sge.ofldqsets - 4 * iscsi_idx);
2326
2327                 S("QType:", "iSCSI");
2328                 T("TxQ ID:", q.cntxt_id);
2329                 T("TxQ size:", q.size);
2330                 T("TxQ inuse:", q.in_use);
2331                 T("TxQ CIDX:", q.cidx);
2332                 T("TxQ PIDX:", q.pidx);
2333                 R("RspQ ID:", rspq.abs_id);
2334                 R("RspQ size:", rspq.size);
2335                 R("RspQE size:", rspq.iqe_len);
2336                 R("RspQ CIDX:", rspq.cidx);
2337                 R("RspQ Gen:", rspq.gen);
2338                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2339                 S3("u", "Intr pktcnt:",
2340                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2341                 R("FL ID:", fl.cntxt_id);
2342                 R("FL size:", fl.size - 8);
2343                 R("FL pend:", fl.pend_cred);
2344                 R("FL avail:", fl.avail);
2345                 R("FL PIDX:", fl.pidx);
2346                 R("FL CIDX:", fl.cidx);
2347                 RL("RxPackets:", stats.pkts);
2348                 RL("RxImmPkts:", stats.imm);
2349                 RL("RxNoMem:", stats.nomem);
2350                 RL("FLAllocErr:", fl.alloc_failed);
2351                 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2352                 RL("FLStarving:", fl.starving);
2353
2354         } else if (rdma_idx < rdma_entries) {
2355                 const struct sge_ofld_rxq *rx =
2356                                 &adap->sge.rdmarxq[rdma_idx * 4];
2357                 int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
2358
2359                 S("QType:", "RDMA-CPL");
2360                 S("Interface:",
2361                   rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2362                 R("RspQ ID:", rspq.abs_id);
2363                 R("RspQ size:", rspq.size);
2364                 R("RspQE size:", rspq.iqe_len);
2365                 R("RspQ CIDX:", rspq.cidx);
2366                 R("RspQ Gen:", rspq.gen);
2367                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2368                 S3("u", "Intr pktcnt:",
2369                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2370                 R("FL ID:", fl.cntxt_id);
2371                 R("FL size:", fl.size - 8);
2372                 R("FL pend:", fl.pend_cred);
2373                 R("FL avail:", fl.avail);
2374                 R("FL PIDX:", fl.pidx);
2375                 R("FL CIDX:", fl.cidx);
2376                 RL("RxPackets:", stats.pkts);
2377                 RL("RxImmPkts:", stats.imm);
2378                 RL("RxNoMem:", stats.nomem);
2379                 RL("FLAllocErr:", fl.alloc_failed);
2380                 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2381                 RL("FLStarving:", fl.starving);
2382
2383         } else if (ciq_idx < ciq_entries) {
2384                 const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
2385                 int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
2386
2387                 S("QType:", "RDMA-CIQ");
2388                 S("Interface:",
2389                   rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2390                 R("RspQ ID:", rspq.abs_id);
2391                 R("RspQ size:", rspq.size);
2392                 R("RspQE size:", rspq.iqe_len);
2393                 R("RspQ CIDX:", rspq.cidx);
2394                 R("RspQ Gen:", rspq.gen);
2395                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2396                 S3("u", "Intr pktcnt:",
2397                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2398                 RL("RxAN:", stats.an);
2399                 RL("RxNoMem:", stats.nomem);
2400
2401         } else if (ctrl_idx < ctrl_entries) {
2402                 const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
2403                 int n = min(4, adap->params.nports - 4 * ctrl_idx);
2404
2405                 S("QType:", "Control");
2406                 T("TxQ ID:", q.cntxt_id);
2407                 T("TxQ size:", q.size);
2408                 T("TxQ inuse:", q.in_use);
2409                 T("TxQ CIDX:", q.cidx);
2410                 T("TxQ PIDX:", q.pidx);
2411                 TL("TxQFull:", q.stops);
2412                 TL("TxQRestarts:", q.restarts);
2413         } else if (fq_idx == 0) {
2414                 const struct sge_rspq *evtq = &adap->sge.fw_evtq;
2415
2416                 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
2417                 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
2418                 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
2419                 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
2420                 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
2421                 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
2422                 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
2423                            qtimer_val(adap, evtq));
2424                 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
2425                            adap->sge.counter_val[evtq->pktcnt_idx]);
2426         }
2427 #undef R
2428 #undef RL
2429 #undef T
2430 #undef TL
2431 #undef S
2432 #undef R3
2433 #undef T3
2434 #undef S3
2435         return 0;
2436 }
2437
2438 static int sge_queue_entries(const struct adapter *adap)
2439 {
2440         return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
2441                DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
2442                DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
2443                DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
2444                DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
2445 }
2446
2447 static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
2448 {
2449         int entries = sge_queue_entries(seq->private);
2450
2451         return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
2452 }
2453
2454 static void sge_queue_stop(struct seq_file *seq, void *v)
2455 {
2456 }
2457
2458 static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
2459 {
2460         int entries = sge_queue_entries(seq->private);
2461
2462         ++*pos;
2463         return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
2464 }
2465
2466 static const struct seq_operations sge_qinfo_seq_ops = {
2467         .start = sge_queue_start,
2468         .next  = sge_queue_next,
2469         .stop  = sge_queue_stop,
2470         .show  = sge_qinfo_show
2471 };
2472
2473 static int sge_qinfo_open(struct inode *inode, struct file *file)
2474 {
2475         int res = seq_open(file, &sge_qinfo_seq_ops);
2476
2477         if (!res) {
2478                 struct seq_file *seq = file->private_data;
2479
2480                 seq->private = inode->i_private;
2481         }
2482         return res;
2483 }
2484
2485 static const struct file_operations sge_qinfo_debugfs_fops = {
2486         .owner   = THIS_MODULE,
2487         .open    = sge_qinfo_open,
2488         .read    = seq_read,
2489         .llseek  = seq_lseek,
2490         .release = seq_release,
2491 };
2492
2493 int mem_open(struct inode *inode, struct file *file)
2494 {
2495         unsigned int mem;
2496         struct adapter *adap;
2497
2498         file->private_data = inode->i_private;
2499
2500         mem = (uintptr_t)file->private_data & 0x3;
2501         adap = file->private_data - mem;
2502
2503         (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
2504
2505         return 0;
2506 }
2507
2508 static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
2509                         loff_t *ppos)
2510 {
2511         loff_t pos = *ppos;
2512         loff_t avail = file_inode(file)->i_size;
2513         unsigned int mem = (uintptr_t)file->private_data & 3;
2514         struct adapter *adap = file->private_data - mem;
2515         __be32 *data;
2516         int ret;
2517
2518         if (pos < 0)
2519                 return -EINVAL;
2520         if (pos >= avail)
2521                 return 0;
2522         if (count > avail - pos)
2523                 count = avail - pos;
2524
2525         data = t4_alloc_mem(count);
2526         if (!data)
2527                 return -ENOMEM;
2528
2529         spin_lock(&adap->win0_lock);
2530         ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
2531         spin_unlock(&adap->win0_lock);
2532         if (ret) {
2533                 t4_free_mem(data);
2534                 return ret;
2535         }
2536         ret = copy_to_user(buf, data, count);
2537
2538         t4_free_mem(data);
2539         if (ret)
2540                 return -EFAULT;
2541
2542         *ppos = pos + count;
2543         return count;
2544 }
2545 static const struct file_operations mem_debugfs_fops = {
2546         .owner   = THIS_MODULE,
2547         .open    = simple_open,
2548         .read    = mem_read,
2549         .llseek  = default_llseek,
2550 };
2551
2552 static int tid_info_show(struct seq_file *seq, void *v)
2553 {
2554         struct adapter *adap = seq->private;
2555         const struct tid_info *t = &adap->tids;
2556         enum chip_type chip = CHELSIO_CHIP_VERSION(adap->params.chip);
2557
2558         if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) {
2559                 unsigned int sb;
2560
2561                 if (chip <= CHELSIO_T5)
2562                         sb = t4_read_reg(adap, LE_DB_SERVER_INDEX_A) / 4;
2563                 else
2564                         sb = t4_read_reg(adap, LE_DB_SRVR_START_INDEX_A);
2565
2566                 if (sb) {
2567                         seq_printf(seq, "TID range: 0..%u/%u..%u", sb - 1,
2568                                    adap->tids.hash_base,
2569                                    t->ntids - 1);
2570                         seq_printf(seq, ", in use: %u/%u\n",
2571                                    atomic_read(&t->tids_in_use),
2572                                    atomic_read(&t->hash_tids_in_use));
2573                 } else if (adap->flags & FW_OFLD_CONN) {
2574                         seq_printf(seq, "TID range: %u..%u/%u..%u",
2575                                    t->aftid_base,
2576                                    t->aftid_end,
2577                                    adap->tids.hash_base,
2578                                    t->ntids - 1);
2579                         seq_printf(seq, ", in use: %u/%u\n",
2580                                    atomic_read(&t->tids_in_use),
2581                                    atomic_read(&t->hash_tids_in_use));
2582                 } else {
2583                         seq_printf(seq, "TID range: %u..%u",
2584                                    adap->tids.hash_base,
2585                                    t->ntids - 1);
2586                         seq_printf(seq, ", in use: %u\n",
2587                                    atomic_read(&t->hash_tids_in_use));
2588                 }
2589         } else if (t->ntids) {
2590                 seq_printf(seq, "TID range: 0..%u", t->ntids - 1);
2591                 seq_printf(seq, ", in use: %u\n",
2592                            atomic_read(&t->tids_in_use));
2593         }
2594
2595         if (t->nstids)
2596                 seq_printf(seq, "STID range: %u..%u, in use: %u\n",
2597                            (!t->stid_base &&
2598                            (chip <= CHELSIO_T5)) ?
2599                            t->stid_base + 1 : t->stid_base,
2600                            t->stid_base + t->nstids - 1, t->stids_in_use);
2601         if (t->natids)
2602                 seq_printf(seq, "ATID range: 0..%u, in use: %u\n",
2603                            t->natids - 1, t->atids_in_use);
2604         seq_printf(seq, "FTID range: %u..%u\n", t->ftid_base,
2605                    t->ftid_base + t->nftids - 1);
2606         if (t->nsftids)
2607                 seq_printf(seq, "SFTID range: %u..%u in use: %u\n",
2608                            t->sftid_base, t->sftid_base + t->nsftids - 2,
2609                            t->sftids_in_use);
2610         if (t->ntids)
2611                 seq_printf(seq, "HW TID usage: %u IP users, %u IPv6 users\n",
2612                            t4_read_reg(adap, LE_DB_ACT_CNT_IPV4_A),
2613                            t4_read_reg(adap, LE_DB_ACT_CNT_IPV6_A));
2614         return 0;
2615 }
2616
2617 DEFINE_SIMPLE_DEBUGFS_FILE(tid_info);
2618
2619 static void add_debugfs_mem(struct adapter *adap, const char *name,
2620                             unsigned int idx, unsigned int size_mb)
2621 {
2622         debugfs_create_file_size(name, S_IRUSR, adap->debugfs_root,
2623                                  (void *)adap + idx, &mem_debugfs_fops,
2624                                  size_mb << 20);
2625 }
2626
2627 static int blocked_fl_open(struct inode *inode, struct file *file)
2628 {
2629         file->private_data = inode->i_private;
2630         return 0;
2631 }
2632
2633 static ssize_t blocked_fl_read(struct file *filp, char __user *ubuf,
2634                                size_t count, loff_t *ppos)
2635 {
2636         int len;
2637         const struct adapter *adap = filp->private_data;
2638         char *buf;
2639         ssize_t size = (adap->sge.egr_sz + 3) / 4 +
2640                         adap->sge.egr_sz / 32 + 2; /* includes ,/\n/\0 */
2641
2642         buf = kzalloc(size, GFP_KERNEL);
2643         if (!buf)
2644                 return -ENOMEM;
2645
2646         len = snprintf(buf, size - 1, "%*pb\n",
2647                        adap->sge.egr_sz, adap->sge.blocked_fl);
2648         len += sprintf(buf + len, "\n");
2649         size = simple_read_from_buffer(ubuf, count, ppos, buf, len);
2650         t4_free_mem(buf);
2651         return size;
2652 }
2653
2654 static ssize_t blocked_fl_write(struct file *filp, const char __user *ubuf,
2655                                 size_t count, loff_t *ppos)
2656 {
2657         int err;
2658         unsigned long *t;
2659         struct adapter *adap = filp->private_data;
2660
2661         t = kcalloc(BITS_TO_LONGS(adap->sge.egr_sz), sizeof(long), GFP_KERNEL);
2662         if (!t)
2663                 return -ENOMEM;
2664
2665         err = bitmap_parse_user(ubuf, count, t, adap->sge.egr_sz);
2666         if (err)
2667                 return err;
2668
2669         bitmap_copy(adap->sge.blocked_fl, t, adap->sge.egr_sz);
2670         t4_free_mem(t);
2671         return count;
2672 }
2673
2674 static const struct file_operations blocked_fl_fops = {
2675         .owner   = THIS_MODULE,
2676         .open    = blocked_fl_open,
2677         .read    = blocked_fl_read,
2678         .write   = blocked_fl_write,
2679         .llseek  = generic_file_llseek,
2680 };
2681
2682 struct mem_desc {
2683         unsigned int base;
2684         unsigned int limit;
2685         unsigned int idx;
2686 };
2687
2688 static int mem_desc_cmp(const void *a, const void *b)
2689 {
2690         return ((const struct mem_desc *)a)->base -
2691                ((const struct mem_desc *)b)->base;
2692 }
2693
2694 static void mem_region_show(struct seq_file *seq, const char *name,
2695                             unsigned int from, unsigned int to)
2696 {
2697         char buf[40];
2698
2699         string_get_size((u64)to - from + 1, 1, STRING_UNITS_2, buf,
2700                         sizeof(buf));
2701         seq_printf(seq, "%-15s %#x-%#x [%s]\n", name, from, to, buf);
2702 }
2703
2704 static int meminfo_show(struct seq_file *seq, void *v)
2705 {
2706         static const char * const memory[] = { "EDC0:", "EDC1:", "MC:",
2707                                         "MC0:", "MC1:"};
2708         static const char * const region[] = {
2709                 "DBQ contexts:", "IMSG contexts:", "FLM cache:", "TCBs:",
2710                 "Pstructs:", "Timers:", "Rx FL:", "Tx FL:", "Pstruct FL:",
2711                 "Tx payload:", "Rx payload:", "LE hash:", "iSCSI region:",
2712                 "TDDP region:", "TPT region:", "STAG region:", "RQ region:",
2713                 "RQUDP region:", "PBL region:", "TXPBL region:",
2714                 "DBVFIFO region:", "ULPRX state:", "ULPTX state:",
2715                 "On-chip queues:"
2716         };
2717
2718         int i, n;
2719         u32 lo, hi, used, alloc;
2720         struct mem_desc avail[4];
2721         struct mem_desc mem[ARRAY_SIZE(region) + 3];      /* up to 3 holes */
2722         struct mem_desc *md = mem;
2723         struct adapter *adap = seq->private;
2724
2725         for (i = 0; i < ARRAY_SIZE(mem); i++) {
2726                 mem[i].limit = 0;
2727                 mem[i].idx = i;
2728         }
2729
2730         /* Find and sort the populated memory ranges */
2731         i = 0;
2732         lo = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
2733         if (lo & EDRAM0_ENABLE_F) {
2734                 hi = t4_read_reg(adap, MA_EDRAM0_BAR_A);
2735                 avail[i].base = EDRAM0_BASE_G(hi) << 20;
2736                 avail[i].limit = avail[i].base + (EDRAM0_SIZE_G(hi) << 20);
2737                 avail[i].idx = 0;
2738                 i++;
2739         }
2740         if (lo & EDRAM1_ENABLE_F) {
2741                 hi = t4_read_reg(adap, MA_EDRAM1_BAR_A);
2742                 avail[i].base = EDRAM1_BASE_G(hi) << 20;
2743                 avail[i].limit = avail[i].base + (EDRAM1_SIZE_G(hi) << 20);
2744                 avail[i].idx = 1;
2745                 i++;
2746         }
2747
2748         if (is_t5(adap->params.chip)) {
2749                 if (lo & EXT_MEM0_ENABLE_F) {
2750                         hi = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
2751                         avail[i].base = EXT_MEM0_BASE_G(hi) << 20;
2752                         avail[i].limit =
2753                                 avail[i].base + (EXT_MEM0_SIZE_G(hi) << 20);
2754                         avail[i].idx = 3;
2755                         i++;
2756                 }
2757                 if (lo & EXT_MEM1_ENABLE_F) {
2758                         hi = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
2759                         avail[i].base = EXT_MEM1_BASE_G(hi) << 20;
2760                         avail[i].limit =
2761                                 avail[i].base + (EXT_MEM1_SIZE_G(hi) << 20);
2762                         avail[i].idx = 4;
2763                         i++;
2764                 }
2765         } else {
2766                 if (lo & EXT_MEM_ENABLE_F) {
2767                         hi = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
2768                         avail[i].base = EXT_MEM_BASE_G(hi) << 20;
2769                         avail[i].limit =
2770                                 avail[i].base + (EXT_MEM_SIZE_G(hi) << 20);
2771                         avail[i].idx = 2;
2772                         i++;
2773                 }
2774         }
2775         if (!i)                                    /* no memory available */
2776                 return 0;
2777         sort(avail, i, sizeof(struct mem_desc), mem_desc_cmp, NULL);
2778
2779         (md++)->base = t4_read_reg(adap, SGE_DBQ_CTXT_BADDR_A);
2780         (md++)->base = t4_read_reg(adap, SGE_IMSG_CTXT_BADDR_A);
2781         (md++)->base = t4_read_reg(adap, SGE_FLM_CACHE_BADDR_A);
2782         (md++)->base = t4_read_reg(adap, TP_CMM_TCB_BASE_A);
2783         (md++)->base = t4_read_reg(adap, TP_CMM_MM_BASE_A);
2784         (md++)->base = t4_read_reg(adap, TP_CMM_TIMER_BASE_A);
2785         (md++)->base = t4_read_reg(adap, TP_CMM_MM_RX_FLST_BASE_A);
2786         (md++)->base = t4_read_reg(adap, TP_CMM_MM_TX_FLST_BASE_A);
2787         (md++)->base = t4_read_reg(adap, TP_CMM_MM_PS_FLST_BASE_A);
2788
2789         /* the next few have explicit upper bounds */
2790         md->base = t4_read_reg(adap, TP_PMM_TX_BASE_A);
2791         md->limit = md->base - 1 +
2792                     t4_read_reg(adap, TP_PMM_TX_PAGE_SIZE_A) *
2793                     PMTXMAXPAGE_G(t4_read_reg(adap, TP_PMM_TX_MAX_PAGE_A));
2794         md++;
2795
2796         md->base = t4_read_reg(adap, TP_PMM_RX_BASE_A);
2797         md->limit = md->base - 1 +
2798                     t4_read_reg(adap, TP_PMM_RX_PAGE_SIZE_A) *
2799                     PMRXMAXPAGE_G(t4_read_reg(adap, TP_PMM_RX_MAX_PAGE_A));
2800         md++;
2801
2802         if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) {
2803                 if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5) {
2804                         hi = t4_read_reg(adap, LE_DB_TID_HASHBASE_A) / 4;
2805                         md->base = t4_read_reg(adap, LE_DB_HASH_TID_BASE_A);
2806                  } else {
2807                         hi = t4_read_reg(adap, LE_DB_HASH_TID_BASE_A);
2808                         md->base = t4_read_reg(adap,
2809                                                LE_DB_HASH_TBL_BASE_ADDR_A);
2810                 }
2811                 md->limit = 0;
2812         } else {
2813                 md->base = 0;
2814                 md->idx = ARRAY_SIZE(region);  /* hide it */
2815         }
2816         md++;
2817
2818 #define ulp_region(reg) do { \
2819         md->base = t4_read_reg(adap, ULP_ ## reg ## _LLIMIT_A);\
2820         (md++)->limit = t4_read_reg(adap, ULP_ ## reg ## _ULIMIT_A); \
2821 } while (0)
2822
2823         ulp_region(RX_ISCSI);
2824         ulp_region(RX_TDDP);
2825         ulp_region(TX_TPT);
2826         ulp_region(RX_STAG);
2827         ulp_region(RX_RQ);
2828         ulp_region(RX_RQUDP);
2829         ulp_region(RX_PBL);
2830         ulp_region(TX_PBL);
2831 #undef ulp_region
2832         md->base = 0;
2833         md->idx = ARRAY_SIZE(region);
2834         if (!is_t4(adap->params.chip)) {
2835                 u32 size = 0;
2836                 u32 sge_ctrl = t4_read_reg(adap, SGE_CONTROL2_A);
2837                 u32 fifo_size = t4_read_reg(adap, SGE_DBVFIFO_SIZE_A);
2838
2839                 if (is_t5(adap->params.chip)) {
2840                         if (sge_ctrl & VFIFO_ENABLE_F)
2841                                 size = DBVFIFO_SIZE_G(fifo_size);
2842                 } else {
2843                         size = T6_DBVFIFO_SIZE_G(fifo_size);
2844                 }
2845
2846                 if (size) {
2847                         md->base = BASEADDR_G(t4_read_reg(adap,
2848                                         SGE_DBVFIFO_BADDR_A));
2849                         md->limit = md->base + (size << 2) - 1;
2850                 }
2851         }
2852
2853         md++;
2854
2855         md->base = t4_read_reg(adap, ULP_RX_CTX_BASE_A);
2856         md->limit = 0;
2857         md++;
2858         md->base = t4_read_reg(adap, ULP_TX_ERR_TABLE_BASE_A);
2859         md->limit = 0;
2860         md++;
2861
2862         md->base = adap->vres.ocq.start;
2863         if (adap->vres.ocq.size)
2864                 md->limit = md->base + adap->vres.ocq.size - 1;
2865         else
2866                 md->idx = ARRAY_SIZE(region);  /* hide it */
2867         md++;
2868
2869         /* add any address-space holes, there can be up to 3 */
2870         for (n = 0; n < i - 1; n++)
2871                 if (avail[n].limit < avail[n + 1].base)
2872                         (md++)->base = avail[n].limit;
2873         if (avail[n].limit)
2874                 (md++)->base = avail[n].limit;
2875
2876         n = md - mem;
2877         sort(mem, n, sizeof(struct mem_desc), mem_desc_cmp, NULL);
2878
2879         for (lo = 0; lo < i; lo++)
2880                 mem_region_show(seq, memory[avail[lo].idx], avail[lo].base,
2881                                 avail[lo].limit - 1);
2882
2883         seq_putc(seq, '\n');
2884         for (i = 0; i < n; i++) {
2885                 if (mem[i].idx >= ARRAY_SIZE(region))
2886                         continue;                        /* skip holes */
2887                 if (!mem[i].limit)
2888                         mem[i].limit = i < n - 1 ? mem[i + 1].base - 1 : ~0;
2889                 mem_region_show(seq, region[mem[i].idx], mem[i].base,
2890                                 mem[i].limit);
2891         }
2892
2893         seq_putc(seq, '\n');
2894         lo = t4_read_reg(adap, CIM_SDRAM_BASE_ADDR_A);
2895         hi = t4_read_reg(adap, CIM_SDRAM_ADDR_SIZE_A) + lo - 1;
2896         mem_region_show(seq, "uP RAM:", lo, hi);
2897
2898         lo = t4_read_reg(adap, CIM_EXTMEM2_BASE_ADDR_A);
2899         hi = t4_read_reg(adap, CIM_EXTMEM2_ADDR_SIZE_A) + lo - 1;
2900         mem_region_show(seq, "uP Extmem2:", lo, hi);
2901
2902         lo = t4_read_reg(adap, TP_PMM_RX_MAX_PAGE_A);
2903         seq_printf(seq, "\n%u Rx pages of size %uKiB for %u channels\n",
2904                    PMRXMAXPAGE_G(lo),
2905                    t4_read_reg(adap, TP_PMM_RX_PAGE_SIZE_A) >> 10,
2906                    (lo & PMRXNUMCHN_F) ? 2 : 1);
2907
2908         lo = t4_read_reg(adap, TP_PMM_TX_MAX_PAGE_A);
2909         hi = t4_read_reg(adap, TP_PMM_TX_PAGE_SIZE_A);
2910         seq_printf(seq, "%u Tx pages of size %u%ciB for %u channels\n",
2911                    PMTXMAXPAGE_G(lo),
2912                    hi >= (1 << 20) ? (hi >> 20) : (hi >> 10),
2913                    hi >= (1 << 20) ? 'M' : 'K', 1 << PMTXNUMCHN_G(lo));
2914         seq_printf(seq, "%u p-structs\n\n",
2915                    t4_read_reg(adap, TP_CMM_MM_MAX_PSTRUCT_A));
2916
2917         for (i = 0; i < 4; i++) {
2918                 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5)
2919                         lo = t4_read_reg(adap, MPS_RX_MAC_BG_PG_CNT0_A + i * 4);
2920                 else
2921                         lo = t4_read_reg(adap, MPS_RX_PG_RSV0_A + i * 4);
2922                 if (is_t5(adap->params.chip)) {
2923                         used = T5_USED_G(lo);
2924                         alloc = T5_ALLOC_G(lo);
2925                 } else {
2926                         used = USED_G(lo);
2927                         alloc = ALLOC_G(lo);
2928                 }
2929                 /* For T6 these are MAC buffer groups */
2930                 seq_printf(seq, "Port %d using %u pages out of %u allocated\n",
2931                            i, used, alloc);
2932         }
2933         for (i = 0; i < adap->params.arch.nchan; i++) {
2934                 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5)
2935                         lo = t4_read_reg(adap,
2936                                          MPS_RX_LPBK_BG_PG_CNT0_A + i * 4);
2937                 else
2938                         lo = t4_read_reg(adap, MPS_RX_PG_RSV4_A + i * 4);
2939                 if (is_t5(adap->params.chip)) {
2940                         used = T5_USED_G(lo);
2941                         alloc = T5_ALLOC_G(lo);
2942                 } else {
2943                         used = USED_G(lo);
2944                         alloc = ALLOC_G(lo);
2945                 }
2946                 /* For T6 these are MAC buffer groups */
2947                 seq_printf(seq,
2948                            "Loopback %d using %u pages out of %u allocated\n",
2949                            i, used, alloc);
2950         }
2951         return 0;
2952 }
2953
2954 static int meminfo_open(struct inode *inode, struct file *file)
2955 {
2956         return single_open(file, meminfo_show, inode->i_private);
2957 }
2958
2959 static const struct file_operations meminfo_fops = {
2960         .owner   = THIS_MODULE,
2961         .open    = meminfo_open,
2962         .read    = seq_read,
2963         .llseek  = seq_lseek,
2964         .release = single_release,
2965 };
2966 /* Add an array of Debug FS files.
2967  */
2968 void add_debugfs_files(struct adapter *adap,
2969                        struct t4_debugfs_entry *files,
2970                        unsigned int nfiles)
2971 {
2972         int i;
2973
2974         /* debugfs support is best effort */
2975         for (i = 0; i < nfiles; i++)
2976                 debugfs_create_file(files[i].name, files[i].mode,
2977                                     adap->debugfs_root,
2978                                     (void *)adap + files[i].data,
2979                                     files[i].ops);
2980 }
2981
2982 int t4_setup_debugfs(struct adapter *adap)
2983 {
2984         int i;
2985         u32 size = 0;
2986         struct dentry *de;
2987
2988         static struct t4_debugfs_entry t4_debugfs_files[] = {
2989                 { "cim_la", &cim_la_fops, S_IRUSR, 0 },
2990                 { "cim_pif_la", &cim_pif_la_fops, S_IRUSR, 0 },
2991                 { "cim_ma_la", &cim_ma_la_fops, S_IRUSR, 0 },
2992                 { "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
2993                 { "clk", &clk_debugfs_fops, S_IRUSR, 0 },
2994                 { "devlog", &devlog_fops, S_IRUSR, 0 },
2995                 { "mbox0", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 0 },
2996                 { "mbox1", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 1 },
2997                 { "mbox2", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 2 },
2998                 { "mbox3", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 3 },
2999                 { "mbox4", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 4 },
3000                 { "mbox5", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 5 },
3001                 { "mbox6", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 6 },
3002                 { "mbox7", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 7 },
3003                 { "trace0", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 0 },
3004                 { "trace1", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 1 },
3005                 { "trace2", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 2 },
3006                 { "trace3", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 3 },
3007                 { "l2t", &t4_l2t_fops, S_IRUSR, 0},
3008                 { "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
3009                 { "rss", &rss_debugfs_fops, S_IRUSR, 0 },
3010                 { "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 },
3011                 { "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
3012                 { "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
3013                 { "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
3014                 { "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
3015                 { "ibq_tp0",  &cim_ibq_fops, S_IRUSR, 0 },
3016                 { "ibq_tp1",  &cim_ibq_fops, S_IRUSR, 1 },
3017                 { "ibq_ulp",  &cim_ibq_fops, S_IRUSR, 2 },
3018                 { "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 },
3019                 { "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 },
3020                 { "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 },
3021                 { "obq_ulp0", &cim_obq_fops, S_IRUSR, 0 },
3022                 { "obq_ulp1", &cim_obq_fops, S_IRUSR, 1 },
3023                 { "obq_ulp2", &cim_obq_fops, S_IRUSR, 2 },
3024                 { "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
3025                 { "obq_sge",  &cim_obq_fops, S_IRUSR, 4 },
3026                 { "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
3027                 { "tp_la", &tp_la_fops, S_IRUSR, 0 },
3028                 { "ulprx_la", &ulprx_la_fops, S_IRUSR, 0 },
3029                 { "sensors", &sensors_debugfs_fops, S_IRUSR, 0 },
3030                 { "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
3031                 { "tx_rate", &tx_rate_debugfs_fops, S_IRUSR, 0 },
3032                 { "cctrl", &cctrl_tbl_debugfs_fops, S_IRUSR, 0 },
3033 #if IS_ENABLED(CONFIG_IPV6)
3034                 { "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
3035 #endif
3036                 { "tids", &tid_info_debugfs_fops, S_IRUSR, 0},
3037                 { "blocked_fl", &blocked_fl_fops, S_IRUSR | S_IWUSR, 0 },
3038                 { "meminfo", &meminfo_fops, S_IRUSR, 0 },
3039         };
3040
3041         /* Debug FS nodes common to all T5 and later adapters.
3042          */
3043         static struct t4_debugfs_entry t5_debugfs_files[] = {
3044                 { "obq_sge_rx_q0", &cim_obq_fops, S_IRUSR, 6 },
3045                 { "obq_sge_rx_q1", &cim_obq_fops, S_IRUSR, 7 },
3046         };
3047
3048         add_debugfs_files(adap,
3049                           t4_debugfs_files,
3050                           ARRAY_SIZE(t4_debugfs_files));
3051         if (!is_t4(adap->params.chip))
3052                 add_debugfs_files(adap,
3053                                   t5_debugfs_files,
3054                                   ARRAY_SIZE(t5_debugfs_files));
3055
3056         i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
3057         if (i & EDRAM0_ENABLE_F) {
3058                 size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
3059                 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
3060         }
3061         if (i & EDRAM1_ENABLE_F) {
3062                 size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
3063                 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
3064         }
3065         if (is_t5(adap->params.chip)) {
3066                 if (i & EXT_MEM0_ENABLE_F) {
3067                         size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
3068                         add_debugfs_mem(adap, "mc0", MEM_MC0,
3069                                         EXT_MEM0_SIZE_G(size));
3070                 }
3071                 if (i & EXT_MEM1_ENABLE_F) {
3072                         size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
3073                         add_debugfs_mem(adap, "mc1", MEM_MC1,
3074                                         EXT_MEM1_SIZE_G(size));
3075                 }
3076         } else {
3077                 if (i & EXT_MEM_ENABLE_F) {
3078                         size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
3079                         add_debugfs_mem(adap, "mc", MEM_MC,
3080                                         EXT_MEM_SIZE_G(size));
3081                 }
3082         }
3083
3084         de = debugfs_create_file_size("flash", S_IRUSR, adap->debugfs_root, adap,
3085                                       &flash_debugfs_fops, adap->params.sf_size);
3086         debugfs_create_bool("use_backdoor", S_IWUSR | S_IRUSR,
3087                             adap->debugfs_root, &adap->use_bd);
3088         debugfs_create_bool("trace_rss", S_IWUSR | S_IRUSR,
3089                             adap->debugfs_root, &adap->trace_rss);
3090
3091         return 0;
3092 }