Merge tag 'sound-4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...
[cascardo/linux.git] / drivers / net / ethernet / chelsio / cxgb4 / cxgb4_debugfs.c
1 /*
2  * This file is part of the Chelsio T4 Ethernet driver for Linux.
3  *
4  * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34
35 #include <linux/seq_file.h>
36 #include <linux/debugfs.h>
37 #include <linux/string_helpers.h>
38 #include <linux/sort.h>
39 #include <linux/ctype.h>
40
41 #include "cxgb4.h"
42 #include "t4_regs.h"
43 #include "t4_values.h"
44 #include "t4fw_api.h"
45 #include "cxgb4_debugfs.h"
46 #include "clip_tbl.h"
47 #include "l2t.h"
48
49 /* generic seq_file support for showing a table of size rows x width. */
50 static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
51 {
52         pos -= tb->skip_first;
53         return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
54 }
55
56 static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
57 {
58         struct seq_tab *tb = seq->private;
59
60         if (tb->skip_first && *pos == 0)
61                 return SEQ_START_TOKEN;
62
63         return seq_tab_get_idx(tb, *pos);
64 }
65
66 static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
67 {
68         v = seq_tab_get_idx(seq->private, *pos + 1);
69         if (v)
70                 ++*pos;
71         return v;
72 }
73
74 static void seq_tab_stop(struct seq_file *seq, void *v)
75 {
76 }
77
78 static int seq_tab_show(struct seq_file *seq, void *v)
79 {
80         const struct seq_tab *tb = seq->private;
81
82         return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
83 }
84
85 static const struct seq_operations seq_tab_ops = {
86         .start = seq_tab_start,
87         .next  = seq_tab_next,
88         .stop  = seq_tab_stop,
89         .show  = seq_tab_show
90 };
91
92 struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
93                              unsigned int width, unsigned int have_header,
94                              int (*show)(struct seq_file *seq, void *v, int i))
95 {
96         struct seq_tab *p;
97
98         p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
99         if (p) {
100                 p->show = show;
101                 p->rows = rows;
102                 p->width = width;
103                 p->skip_first = have_header != 0;
104         }
105         return p;
106 }
107
108 /* Trim the size of a seq_tab to the supplied number of rows.  The operation is
109  * irreversible.
110  */
111 static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
112 {
113         if (new_rows > p->rows)
114                 return -EINVAL;
115         p->rows = new_rows;
116         return 0;
117 }
118
119 static int cim_la_show(struct seq_file *seq, void *v, int idx)
120 {
121         if (v == SEQ_START_TOKEN)
122                 seq_puts(seq, "Status   Data      PC     LS0Stat  LS0Addr "
123                          "            LS0Data\n");
124         else {
125                 const u32 *p = v;
126
127                 seq_printf(seq,
128                            "  %02x  %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
129                            (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
130                            p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
131                            p[6], p[7]);
132         }
133         return 0;
134 }
135
136 static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
137 {
138         if (v == SEQ_START_TOKEN) {
139                 seq_puts(seq, "Status   Data      PC\n");
140         } else {
141                 const u32 *p = v;
142
143                 seq_printf(seq, "  %02x   %08x %08x\n", p[5] & 0xff, p[6],
144                            p[7]);
145                 seq_printf(seq, "  %02x   %02x%06x %02x%06x\n",
146                            (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
147                            p[4] & 0xff, p[5] >> 8);
148                 seq_printf(seq, "  %02x   %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
149                            p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
150         }
151         return 0;
152 }
153
154 static int cim_la_show_t6(struct seq_file *seq, void *v, int idx)
155 {
156         if (v == SEQ_START_TOKEN) {
157                 seq_puts(seq, "Status   Inst    Data      PC     LS0Stat  "
158                          "LS0Addr  LS0Data  LS1Stat  LS1Addr  LS1Data\n");
159         } else {
160                 const u32 *p = v;
161
162                 seq_printf(seq, "  %02x   %04x%04x %04x%04x %04x%04x %08x %08x %08x %08x %08x %08x\n",
163                            (p[9] >> 16) & 0xff,       /* Status */
164                            p[9] & 0xffff, p[8] >> 16, /* Inst */
165                            p[8] & 0xffff, p[7] >> 16, /* Data */
166                            p[7] & 0xffff, p[6] >> 16, /* PC */
167                            p[2], p[1], p[0],      /* LS0 Stat, Addr and Data */
168                            p[5], p[4], p[3]);     /* LS1 Stat, Addr and Data */
169         }
170         return 0;
171 }
172
173 static int cim_la_show_pc_t6(struct seq_file *seq, void *v, int idx)
174 {
175         if (v == SEQ_START_TOKEN) {
176                 seq_puts(seq, "Status   Inst    Data      PC\n");
177         } else {
178                 const u32 *p = v;
179
180                 seq_printf(seq, "  %02x   %08x %08x %08x\n",
181                            p[3] & 0xff, p[2], p[1], p[0]);
182                 seq_printf(seq, "  %02x   %02x%06x %02x%06x %02x%06x\n",
183                            (p[6] >> 8) & 0xff, p[6] & 0xff, p[5] >> 8,
184                            p[5] & 0xff, p[4] >> 8, p[4] & 0xff, p[3] >> 8);
185                 seq_printf(seq, "  %02x   %04x%04x %04x%04x %04x%04x\n",
186                            (p[9] >> 16) & 0xff, p[9] & 0xffff, p[8] >> 16,
187                            p[8] & 0xffff, p[7] >> 16, p[7] & 0xffff,
188                            p[6] >> 16);
189         }
190         return 0;
191 }
192
193 static int cim_la_open(struct inode *inode, struct file *file)
194 {
195         int ret;
196         unsigned int cfg;
197         struct seq_tab *p;
198         struct adapter *adap = inode->i_private;
199
200         ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
201         if (ret)
202                 return ret;
203
204         if (is_t6(adap->params.chip)) {
205                 /* +1 to account for integer division of CIMLA_SIZE/10 */
206                 p = seq_open_tab(file, (adap->params.cim_la_size / 10) + 1,
207                                  10 * sizeof(u32), 1,
208                                  cfg & UPDBGLACAPTPCONLY_F ?
209                                         cim_la_show_pc_t6 : cim_la_show_t6);
210         } else {
211                 p = seq_open_tab(file, adap->params.cim_la_size / 8,
212                                  8 * sizeof(u32), 1,
213                                  cfg & UPDBGLACAPTPCONLY_F ? cim_la_show_3in1 :
214                                                              cim_la_show);
215         }
216         if (!p)
217                 return -ENOMEM;
218
219         ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
220         if (ret)
221                 seq_release_private(inode, file);
222         return ret;
223 }
224
225 static const struct file_operations cim_la_fops = {
226         .owner   = THIS_MODULE,
227         .open    = cim_la_open,
228         .read    = seq_read,
229         .llseek  = seq_lseek,
230         .release = seq_release_private
231 };
232
233 static int cim_pif_la_show(struct seq_file *seq, void *v, int idx)
234 {
235         const u32 *p = v;
236
237         if (v == SEQ_START_TOKEN) {
238                 seq_puts(seq, "Cntl ID DataBE   Addr                 Data\n");
239         } else if (idx < CIM_PIFLA_SIZE) {
240                 seq_printf(seq, " %02x  %02x  %04x  %08x %08x%08x%08x%08x\n",
241                            (p[5] >> 22) & 0xff, (p[5] >> 16) & 0x3f,
242                            p[5] & 0xffff, p[4], p[3], p[2], p[1], p[0]);
243         } else {
244                 if (idx == CIM_PIFLA_SIZE)
245                         seq_puts(seq, "\nCntl ID               Data\n");
246                 seq_printf(seq, " %02x  %02x %08x%08x%08x%08x\n",
247                            (p[4] >> 6) & 0xff, p[4] & 0x3f,
248                            p[3], p[2], p[1], p[0]);
249         }
250         return 0;
251 }
252
253 static int cim_pif_la_open(struct inode *inode, struct file *file)
254 {
255         struct seq_tab *p;
256         struct adapter *adap = inode->i_private;
257
258         p = seq_open_tab(file, 2 * CIM_PIFLA_SIZE, 6 * sizeof(u32), 1,
259                          cim_pif_la_show);
260         if (!p)
261                 return -ENOMEM;
262
263         t4_cim_read_pif_la(adap, (u32 *)p->data,
264                            (u32 *)p->data + 6 * CIM_PIFLA_SIZE, NULL, NULL);
265         return 0;
266 }
267
268 static const struct file_operations cim_pif_la_fops = {
269         .owner   = THIS_MODULE,
270         .open    = cim_pif_la_open,
271         .read    = seq_read,
272         .llseek  = seq_lseek,
273         .release = seq_release_private
274 };
275
276 static int cim_ma_la_show(struct seq_file *seq, void *v, int idx)
277 {
278         const u32 *p = v;
279
280         if (v == SEQ_START_TOKEN) {
281                 seq_puts(seq, "\n");
282         } else if (idx < CIM_MALA_SIZE) {
283                 seq_printf(seq, "%02x%08x%08x%08x%08x\n",
284                            p[4], p[3], p[2], p[1], p[0]);
285         } else {
286                 if (idx == CIM_MALA_SIZE)
287                         seq_puts(seq,
288                                  "\nCnt ID Tag UE       Data       RDY VLD\n");
289                 seq_printf(seq, "%3u %2u  %x   %u %08x%08x  %u   %u\n",
290                            (p[2] >> 10) & 0xff, (p[2] >> 7) & 7,
291                            (p[2] >> 3) & 0xf, (p[2] >> 2) & 1,
292                            (p[1] >> 2) | ((p[2] & 3) << 30),
293                            (p[0] >> 2) | ((p[1] & 3) << 30), (p[0] >> 1) & 1,
294                            p[0] & 1);
295         }
296         return 0;
297 }
298
299 static int cim_ma_la_open(struct inode *inode, struct file *file)
300 {
301         struct seq_tab *p;
302         struct adapter *adap = inode->i_private;
303
304         p = seq_open_tab(file, 2 * CIM_MALA_SIZE, 5 * sizeof(u32), 1,
305                          cim_ma_la_show);
306         if (!p)
307                 return -ENOMEM;
308
309         t4_cim_read_ma_la(adap, (u32 *)p->data,
310                           (u32 *)p->data + 5 * CIM_MALA_SIZE);
311         return 0;
312 }
313
314 static const struct file_operations cim_ma_la_fops = {
315         .owner   = THIS_MODULE,
316         .open    = cim_ma_la_open,
317         .read    = seq_read,
318         .llseek  = seq_lseek,
319         .release = seq_release_private
320 };
321
322 static int cim_qcfg_show(struct seq_file *seq, void *v)
323 {
324         static const char * const qname[] = {
325                 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
326                 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
327                 "SGE0-RX", "SGE1-RX"
328         };
329
330         int i;
331         struct adapter *adap = seq->private;
332         u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
333         u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
334         u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
335         u16 thres[CIM_NUM_IBQ];
336         u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
337         u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
338         u32 *p = stat;
339         int cim_num_obq = is_t4(adap->params.chip) ?
340                                 CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
341
342         i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
343                         UP_IBQ_0_SHADOW_RDADDR_A,
344                         ARRAY_SIZE(stat), stat);
345         if (!i) {
346                 if (is_t4(adap->params.chip)) {
347                         i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
348                                         ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
349                         wr = obq_wr_t4;
350                 } else {
351                         i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
352                                         ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
353                         wr = obq_wr_t5;
354                 }
355         }
356         if (i)
357                 return i;
358
359         t4_read_cimq_cfg(adap, base, size, thres);
360
361         seq_printf(seq,
362                    "  Queue  Base  Size Thres  RdPtr WrPtr  SOP  EOP Avail\n");
363         for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
364                 seq_printf(seq, "%7s %5x %5u %5u %6x  %4x %4u %4u %5u\n",
365                            qname[i], base[i], size[i], thres[i],
366                            IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
367                            QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
368                            QUEREMFLITS_G(p[2]) * 16);
369         for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
370                 seq_printf(seq, "%7s %5x %5u %12x  %4x %4u %4u %5u\n",
371                            qname[i], base[i], size[i],
372                            QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
373                            QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
374                            QUEREMFLITS_G(p[2]) * 16);
375         return 0;
376 }
377
378 static int cim_qcfg_open(struct inode *inode, struct file *file)
379 {
380         return single_open(file, cim_qcfg_show, inode->i_private);
381 }
382
383 static const struct file_operations cim_qcfg_fops = {
384         .owner   = THIS_MODULE,
385         .open    = cim_qcfg_open,
386         .read    = seq_read,
387         .llseek  = seq_lseek,
388         .release = single_release,
389 };
390
391 static int cimq_show(struct seq_file *seq, void *v, int idx)
392 {
393         const u32 *p = v;
394
395         seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
396                    p[2], p[3]);
397         return 0;
398 }
399
400 static int cim_ibq_open(struct inode *inode, struct file *file)
401 {
402         int ret;
403         struct seq_tab *p;
404         unsigned int qid = (uintptr_t)inode->i_private & 7;
405         struct adapter *adap = inode->i_private - qid;
406
407         p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
408         if (!p)
409                 return -ENOMEM;
410
411         ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
412         if (ret < 0)
413                 seq_release_private(inode, file);
414         else
415                 ret = 0;
416         return ret;
417 }
418
419 static const struct file_operations cim_ibq_fops = {
420         .owner   = THIS_MODULE,
421         .open    = cim_ibq_open,
422         .read    = seq_read,
423         .llseek  = seq_lseek,
424         .release = seq_release_private
425 };
426
427 static int cim_obq_open(struct inode *inode, struct file *file)
428 {
429         int ret;
430         struct seq_tab *p;
431         unsigned int qid = (uintptr_t)inode->i_private & 7;
432         struct adapter *adap = inode->i_private - qid;
433
434         p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
435         if (!p)
436                 return -ENOMEM;
437
438         ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
439         if (ret < 0) {
440                 seq_release_private(inode, file);
441         } else {
442                 seq_tab_trim(p, ret / 4);
443                 ret = 0;
444         }
445         return ret;
446 }
447
448 static const struct file_operations cim_obq_fops = {
449         .owner   = THIS_MODULE,
450         .open    = cim_obq_open,
451         .read    = seq_read,
452         .llseek  = seq_lseek,
453         .release = seq_release_private
454 };
455
456 struct field_desc {
457         const char *name;
458         unsigned int start;
459         unsigned int width;
460 };
461
462 static void field_desc_show(struct seq_file *seq, u64 v,
463                             const struct field_desc *p)
464 {
465         char buf[32];
466         int line_size = 0;
467
468         while (p->name) {
469                 u64 mask = (1ULL << p->width) - 1;
470                 int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
471                                     ((unsigned long long)v >> p->start) & mask);
472
473                 if (line_size + len >= 79) {
474                         line_size = 8;
475                         seq_puts(seq, "\n        ");
476                 }
477                 seq_printf(seq, "%s ", buf);
478                 line_size += len + 1;
479                 p++;
480         }
481         seq_putc(seq, '\n');
482 }
483
484 static struct field_desc tp_la0[] = {
485         { "RcfOpCodeOut", 60, 4 },
486         { "State", 56, 4 },
487         { "WcfState", 52, 4 },
488         { "RcfOpcSrcOut", 50, 2 },
489         { "CRxError", 49, 1 },
490         { "ERxError", 48, 1 },
491         { "SanityFailed", 47, 1 },
492         { "SpuriousMsg", 46, 1 },
493         { "FlushInputMsg", 45, 1 },
494         { "FlushInputCpl", 44, 1 },
495         { "RssUpBit", 43, 1 },
496         { "RssFilterHit", 42, 1 },
497         { "Tid", 32, 10 },
498         { "InitTcb", 31, 1 },
499         { "LineNumber", 24, 7 },
500         { "Emsg", 23, 1 },
501         { "EdataOut", 22, 1 },
502         { "Cmsg", 21, 1 },
503         { "CdataOut", 20, 1 },
504         { "EreadPdu", 19, 1 },
505         { "CreadPdu", 18, 1 },
506         { "TunnelPkt", 17, 1 },
507         { "RcfPeerFin", 16, 1 },
508         { "RcfReasonOut", 12, 4 },
509         { "TxCchannel", 10, 2 },
510         { "RcfTxChannel", 8, 2 },
511         { "RxEchannel", 6, 2 },
512         { "RcfRxChannel", 5, 1 },
513         { "RcfDataOutSrdy", 4, 1 },
514         { "RxDvld", 3, 1 },
515         { "RxOoDvld", 2, 1 },
516         { "RxCongestion", 1, 1 },
517         { "TxCongestion", 0, 1 },
518         { NULL }
519 };
520
521 static int tp_la_show(struct seq_file *seq, void *v, int idx)
522 {
523         const u64 *p = v;
524
525         field_desc_show(seq, *p, tp_la0);
526         return 0;
527 }
528
529 static int tp_la_show2(struct seq_file *seq, void *v, int idx)
530 {
531         const u64 *p = v;
532
533         if (idx)
534                 seq_putc(seq, '\n');
535         field_desc_show(seq, p[0], tp_la0);
536         if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
537                 field_desc_show(seq, p[1], tp_la0);
538         return 0;
539 }
540
541 static int tp_la_show3(struct seq_file *seq, void *v, int idx)
542 {
543         static struct field_desc tp_la1[] = {
544                 { "CplCmdIn", 56, 8 },
545                 { "CplCmdOut", 48, 8 },
546                 { "ESynOut", 47, 1 },
547                 { "EAckOut", 46, 1 },
548                 { "EFinOut", 45, 1 },
549                 { "ERstOut", 44, 1 },
550                 { "SynIn", 43, 1 },
551                 { "AckIn", 42, 1 },
552                 { "FinIn", 41, 1 },
553                 { "RstIn", 40, 1 },
554                 { "DataIn", 39, 1 },
555                 { "DataInVld", 38, 1 },
556                 { "PadIn", 37, 1 },
557                 { "RxBufEmpty", 36, 1 },
558                 { "RxDdp", 35, 1 },
559                 { "RxFbCongestion", 34, 1 },
560                 { "TxFbCongestion", 33, 1 },
561                 { "TxPktSumSrdy", 32, 1 },
562                 { "RcfUlpType", 28, 4 },
563                 { "Eread", 27, 1 },
564                 { "Ebypass", 26, 1 },
565                 { "Esave", 25, 1 },
566                 { "Static0", 24, 1 },
567                 { "Cread", 23, 1 },
568                 { "Cbypass", 22, 1 },
569                 { "Csave", 21, 1 },
570                 { "CPktOut", 20, 1 },
571                 { "RxPagePoolFull", 18, 2 },
572                 { "RxLpbkPkt", 17, 1 },
573                 { "TxLpbkPkt", 16, 1 },
574                 { "RxVfValid", 15, 1 },
575                 { "SynLearned", 14, 1 },
576                 { "SetDelEntry", 13, 1 },
577                 { "SetInvEntry", 12, 1 },
578                 { "CpcmdDvld", 11, 1 },
579                 { "CpcmdSave", 10, 1 },
580                 { "RxPstructsFull", 8, 2 },
581                 { "EpcmdDvld", 7, 1 },
582                 { "EpcmdFlush", 6, 1 },
583                 { "EpcmdTrimPrefix", 5, 1 },
584                 { "EpcmdTrimPostfix", 4, 1 },
585                 { "ERssIp4Pkt", 3, 1 },
586                 { "ERssIp6Pkt", 2, 1 },
587                 { "ERssTcpUdpPkt", 1, 1 },
588                 { "ERssFceFipPkt", 0, 1 },
589                 { NULL }
590         };
591         static struct field_desc tp_la2[] = {
592                 { "CplCmdIn", 56, 8 },
593                 { "MpsVfVld", 55, 1 },
594                 { "MpsPf", 52, 3 },
595                 { "MpsVf", 44, 8 },
596                 { "SynIn", 43, 1 },
597                 { "AckIn", 42, 1 },
598                 { "FinIn", 41, 1 },
599                 { "RstIn", 40, 1 },
600                 { "DataIn", 39, 1 },
601                 { "DataInVld", 38, 1 },
602                 { "PadIn", 37, 1 },
603                 { "RxBufEmpty", 36, 1 },
604                 { "RxDdp", 35, 1 },
605                 { "RxFbCongestion", 34, 1 },
606                 { "TxFbCongestion", 33, 1 },
607                 { "TxPktSumSrdy", 32, 1 },
608                 { "RcfUlpType", 28, 4 },
609                 { "Eread", 27, 1 },
610                 { "Ebypass", 26, 1 },
611                 { "Esave", 25, 1 },
612                 { "Static0", 24, 1 },
613                 { "Cread", 23, 1 },
614                 { "Cbypass", 22, 1 },
615                 { "Csave", 21, 1 },
616                 { "CPktOut", 20, 1 },
617                 { "RxPagePoolFull", 18, 2 },
618                 { "RxLpbkPkt", 17, 1 },
619                 { "TxLpbkPkt", 16, 1 },
620                 { "RxVfValid", 15, 1 },
621                 { "SynLearned", 14, 1 },
622                 { "SetDelEntry", 13, 1 },
623                 { "SetInvEntry", 12, 1 },
624                 { "CpcmdDvld", 11, 1 },
625                 { "CpcmdSave", 10, 1 },
626                 { "RxPstructsFull", 8, 2 },
627                 { "EpcmdDvld", 7, 1 },
628                 { "EpcmdFlush", 6, 1 },
629                 { "EpcmdTrimPrefix", 5, 1 },
630                 { "EpcmdTrimPostfix", 4, 1 },
631                 { "ERssIp4Pkt", 3, 1 },
632                 { "ERssIp6Pkt", 2, 1 },
633                 { "ERssTcpUdpPkt", 1, 1 },
634                 { "ERssFceFipPkt", 0, 1 },
635                 { NULL }
636         };
637         const u64 *p = v;
638
639         if (idx)
640                 seq_putc(seq, '\n');
641         field_desc_show(seq, p[0], tp_la0);
642         if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
643                 field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
644         return 0;
645 }
646
647 static int tp_la_open(struct inode *inode, struct file *file)
648 {
649         struct seq_tab *p;
650         struct adapter *adap = inode->i_private;
651
652         switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
653         case 2:
654                 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
655                                  tp_la_show2);
656                 break;
657         case 3:
658                 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
659                                  tp_la_show3);
660                 break;
661         default:
662                 p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
663         }
664         if (!p)
665                 return -ENOMEM;
666
667         t4_tp_read_la(adap, (u64 *)p->data, NULL);
668         return 0;
669 }
670
671 static ssize_t tp_la_write(struct file *file, const char __user *buf,
672                            size_t count, loff_t *pos)
673 {
674         int err;
675         char s[32];
676         unsigned long val;
677         size_t size = min(sizeof(s) - 1, count);
678         struct adapter *adap = file_inode(file)->i_private;
679
680         if (copy_from_user(s, buf, size))
681                 return -EFAULT;
682         s[size] = '\0';
683         err = kstrtoul(s, 0, &val);
684         if (err)
685                 return err;
686         if (val > 0xffff)
687                 return -EINVAL;
688         adap->params.tp.la_mask = val << 16;
689         t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
690                          adap->params.tp.la_mask);
691         return count;
692 }
693
694 static const struct file_operations tp_la_fops = {
695         .owner   = THIS_MODULE,
696         .open    = tp_la_open,
697         .read    = seq_read,
698         .llseek  = seq_lseek,
699         .release = seq_release_private,
700         .write   = tp_la_write
701 };
702
703 static int ulprx_la_show(struct seq_file *seq, void *v, int idx)
704 {
705         const u32 *p = v;
706
707         if (v == SEQ_START_TOKEN)
708                 seq_puts(seq, "      Pcmd        Type   Message"
709                          "                Data\n");
710         else
711                 seq_printf(seq, "%08x%08x  %4x  %08x  %08x%08x%08x%08x\n",
712                            p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]);
713         return 0;
714 }
715
716 static int ulprx_la_open(struct inode *inode, struct file *file)
717 {
718         struct seq_tab *p;
719         struct adapter *adap = inode->i_private;
720
721         p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1,
722                          ulprx_la_show);
723         if (!p)
724                 return -ENOMEM;
725
726         t4_ulprx_read_la(adap, (u32 *)p->data);
727         return 0;
728 }
729
730 static const struct file_operations ulprx_la_fops = {
731         .owner   = THIS_MODULE,
732         .open    = ulprx_la_open,
733         .read    = seq_read,
734         .llseek  = seq_lseek,
735         .release = seq_release_private
736 };
737
738 /* Show the PM memory stats.  These stats include:
739  *
740  * TX:
741  *   Read: memory read operation
742  *   Write Bypass: cut-through
743  *   Bypass + mem: cut-through and save copy
744  *
745  * RX:
746  *   Read: memory read
747  *   Write Bypass: cut-through
748  *   Flush: payload trim or drop
749  */
750 static int pm_stats_show(struct seq_file *seq, void *v)
751 {
752         static const char * const tx_pm_stats[] = {
753                 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
754         };
755         static const char * const rx_pm_stats[] = {
756                 "Read:", "Write bypass:", "Write mem:", "Flush:"
757         };
758
759         int i;
760         u32 tx_cnt[T6_PM_NSTATS], rx_cnt[T6_PM_NSTATS];
761         u64 tx_cyc[T6_PM_NSTATS], rx_cyc[T6_PM_NSTATS];
762         struct adapter *adap = seq->private;
763
764         t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
765         t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
766
767         seq_printf(seq, "%13s %10s  %20s\n", " ", "Tx pcmds", "Tx bytes");
768         for (i = 0; i < PM_NSTATS - 1; i++)
769                 seq_printf(seq, "%-13s %10u  %20llu\n",
770                            tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
771
772         seq_printf(seq, "%13s %10s  %20s\n", " ", "Rx pcmds", "Rx bytes");
773         for (i = 0; i < PM_NSTATS - 1; i++)
774                 seq_printf(seq, "%-13s %10u  %20llu\n",
775                            rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
776
777         if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) {
778                 /* In T5 the granularity of the total wait is too fine.
779                  * It is not useful as it reaches the max value too fast.
780                  * Hence display this Input FIFO wait for T6 onwards.
781                  */
782                 seq_printf(seq, "%13s %10s  %20s\n",
783                            " ", "Total wait", "Total Occupancy");
784                 seq_printf(seq, "Tx FIFO wait  %10u  %20llu\n",
785                            tx_cnt[i], tx_cyc[i]);
786                 seq_printf(seq, "Rx FIFO wait  %10u  %20llu\n",
787                            rx_cnt[i], rx_cyc[i]);
788
789                 /* Skip index 6 as there is nothing useful ihere */
790                 i += 2;
791
792                 /* At index 7, a new stat for read latency (count, total wait)
793                  * is added.
794                  */
795                 seq_printf(seq, "%13s %10s  %20s\n",
796                            " ", "Reads", "Total wait");
797                 seq_printf(seq, "Tx latency    %10u  %20llu\n",
798                            tx_cnt[i], tx_cyc[i]);
799                 seq_printf(seq, "Rx latency    %10u  %20llu\n",
800                            rx_cnt[i], rx_cyc[i]);
801         }
802         return 0;
803 }
804
805 static int pm_stats_open(struct inode *inode, struct file *file)
806 {
807         return single_open(file, pm_stats_show, inode->i_private);
808 }
809
810 static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
811                               size_t count, loff_t *pos)
812 {
813         struct adapter *adap = file_inode(file)->i_private;
814
815         t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
816         t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
817         return count;
818 }
819
820 static const struct file_operations pm_stats_debugfs_fops = {
821         .owner   = THIS_MODULE,
822         .open    = pm_stats_open,
823         .read    = seq_read,
824         .llseek  = seq_lseek,
825         .release = single_release,
826         .write   = pm_stats_clear
827 };
828
829 static int tx_rate_show(struct seq_file *seq, void *v)
830 {
831         u64 nrate[NCHAN], orate[NCHAN];
832         struct adapter *adap = seq->private;
833
834         t4_get_chan_txrate(adap, nrate, orate);
835         if (adap->params.arch.nchan == NCHAN) {
836                 seq_puts(seq, "              channel 0   channel 1   "
837                          "channel 2   channel 3\n");
838                 seq_printf(seq, "NIC B/s:     %10llu  %10llu  %10llu  %10llu\n",
839                            (unsigned long long)nrate[0],
840                            (unsigned long long)nrate[1],
841                            (unsigned long long)nrate[2],
842                            (unsigned long long)nrate[3]);
843                 seq_printf(seq, "Offload B/s: %10llu  %10llu  %10llu  %10llu\n",
844                            (unsigned long long)orate[0],
845                            (unsigned long long)orate[1],
846                            (unsigned long long)orate[2],
847                            (unsigned long long)orate[3]);
848         } else {
849                 seq_puts(seq, "              channel 0   channel 1\n");
850                 seq_printf(seq, "NIC B/s:     %10llu  %10llu\n",
851                            (unsigned long long)nrate[0],
852                            (unsigned long long)nrate[1]);
853                 seq_printf(seq, "Offload B/s: %10llu  %10llu\n",
854                            (unsigned long long)orate[0],
855                            (unsigned long long)orate[1]);
856         }
857         return 0;
858 }
859
860 DEFINE_SIMPLE_DEBUGFS_FILE(tx_rate);
861
862 static int cctrl_tbl_show(struct seq_file *seq, void *v)
863 {
864         static const char * const dec_fac[] = {
865                 "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
866                 "0.9375" };
867
868         int i;
869         u16 (*incr)[NCCTRL_WIN];
870         struct adapter *adap = seq->private;
871
872         incr = kmalloc(sizeof(*incr) * NMTUS, GFP_KERNEL);
873         if (!incr)
874                 return -ENOMEM;
875
876         t4_read_cong_tbl(adap, incr);
877
878         for (i = 0; i < NCCTRL_WIN; ++i) {
879                 seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i,
880                            incr[0][i], incr[1][i], incr[2][i], incr[3][i],
881                            incr[4][i], incr[5][i], incr[6][i], incr[7][i]);
882                 seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
883                            incr[8][i], incr[9][i], incr[10][i], incr[11][i],
884                            incr[12][i], incr[13][i], incr[14][i], incr[15][i],
885                            adap->params.a_wnd[i],
886                            dec_fac[adap->params.b_wnd[i]]);
887         }
888
889         kfree(incr);
890         return 0;
891 }
892
893 DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl);
894
895 /* Format a value in a unit that differs from the value's native unit by the
896  * given factor.
897  */
898 static char *unit_conv(char *buf, size_t len, unsigned int val,
899                        unsigned int factor)
900 {
901         unsigned int rem = val % factor;
902
903         if (rem == 0) {
904                 snprintf(buf, len, "%u", val / factor);
905         } else {
906                 while (rem % 10 == 0)
907                         rem /= 10;
908                 snprintf(buf, len, "%u.%u", val / factor, rem);
909         }
910         return buf;
911 }
912
913 static int clk_show(struct seq_file *seq, void *v)
914 {
915         char buf[32];
916         struct adapter *adap = seq->private;
917         unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk;  /* in ps */
918         u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
919         unsigned int tre = TIMERRESOLUTION_G(res);
920         unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
921         unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
922
923         seq_printf(seq, "Core clock period: %s ns\n",
924                    unit_conv(buf, sizeof(buf), cclk_ps, 1000));
925         seq_printf(seq, "TP timer tick: %s us\n",
926                    unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
927         seq_printf(seq, "TCP timestamp tick: %s us\n",
928                    unit_conv(buf, sizeof(buf),
929                              (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
930         seq_printf(seq, "DACK tick: %s us\n",
931                    unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
932         seq_printf(seq, "DACK timer: %u us\n",
933                    ((cclk_ps << dack_re) / 1000000) *
934                    t4_read_reg(adap, TP_DACK_TIMER_A));
935         seq_printf(seq, "Retransmit min: %llu us\n",
936                    tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
937         seq_printf(seq, "Retransmit max: %llu us\n",
938                    tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
939         seq_printf(seq, "Persist timer min: %llu us\n",
940                    tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
941         seq_printf(seq, "Persist timer max: %llu us\n",
942                    tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
943         seq_printf(seq, "Keepalive idle timer: %llu us\n",
944                    tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
945         seq_printf(seq, "Keepalive interval: %llu us\n",
946                    tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
947         seq_printf(seq, "Initial SRTT: %llu us\n",
948                    tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
949         seq_printf(seq, "FINWAIT2 timer: %llu us\n",
950                    tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
951
952         return 0;
953 }
954
955 DEFINE_SIMPLE_DEBUGFS_FILE(clk);
956
957 /* Firmware Device Log dump. */
958 static const char * const devlog_level_strings[] = {
959         [FW_DEVLOG_LEVEL_EMERG]         = "EMERG",
960         [FW_DEVLOG_LEVEL_CRIT]          = "CRIT",
961         [FW_DEVLOG_LEVEL_ERR]           = "ERR",
962         [FW_DEVLOG_LEVEL_NOTICE]        = "NOTICE",
963         [FW_DEVLOG_LEVEL_INFO]          = "INFO",
964         [FW_DEVLOG_LEVEL_DEBUG]         = "DEBUG"
965 };
966
967 static const char * const devlog_facility_strings[] = {
968         [FW_DEVLOG_FACILITY_CORE]       = "CORE",
969         [FW_DEVLOG_FACILITY_CF]         = "CF",
970         [FW_DEVLOG_FACILITY_SCHED]      = "SCHED",
971         [FW_DEVLOG_FACILITY_TIMER]      = "TIMER",
972         [FW_DEVLOG_FACILITY_RES]        = "RES",
973         [FW_DEVLOG_FACILITY_HW]         = "HW",
974         [FW_DEVLOG_FACILITY_FLR]        = "FLR",
975         [FW_DEVLOG_FACILITY_DMAQ]       = "DMAQ",
976         [FW_DEVLOG_FACILITY_PHY]        = "PHY",
977         [FW_DEVLOG_FACILITY_MAC]        = "MAC",
978         [FW_DEVLOG_FACILITY_PORT]       = "PORT",
979         [FW_DEVLOG_FACILITY_VI]         = "VI",
980         [FW_DEVLOG_FACILITY_FILTER]     = "FILTER",
981         [FW_DEVLOG_FACILITY_ACL]        = "ACL",
982         [FW_DEVLOG_FACILITY_TM]         = "TM",
983         [FW_DEVLOG_FACILITY_QFC]        = "QFC",
984         [FW_DEVLOG_FACILITY_DCB]        = "DCB",
985         [FW_DEVLOG_FACILITY_ETH]        = "ETH",
986         [FW_DEVLOG_FACILITY_OFLD]       = "OFLD",
987         [FW_DEVLOG_FACILITY_RI]         = "RI",
988         [FW_DEVLOG_FACILITY_ISCSI]      = "ISCSI",
989         [FW_DEVLOG_FACILITY_FCOE]       = "FCOE",
990         [FW_DEVLOG_FACILITY_FOISCSI]    = "FOISCSI",
991         [FW_DEVLOG_FACILITY_FOFCOE]     = "FOFCOE"
992 };
993
994 /* Information gathered by Device Log Open routine for the display routine.
995  */
996 struct devlog_info {
997         unsigned int nentries;          /* number of entries in log[] */
998         unsigned int first;             /* first [temporal] entry in log[] */
999         struct fw_devlog_e log[0];      /* Firmware Device Log */
1000 };
1001
1002 /* Dump a Firmaware Device Log entry.
1003  */
1004 static int devlog_show(struct seq_file *seq, void *v)
1005 {
1006         if (v == SEQ_START_TOKEN)
1007                 seq_printf(seq, "%10s  %15s  %8s  %8s  %s\n",
1008                            "Seq#", "Tstamp", "Level", "Facility", "Message");
1009         else {
1010                 struct devlog_info *dinfo = seq->private;
1011                 int fidx = (uintptr_t)v - 2;
1012                 unsigned long index;
1013                 struct fw_devlog_e *e;
1014
1015                 /* Get a pointer to the log entry to display.  Skip unused log
1016                  * entries.
1017                  */
1018                 index = dinfo->first + fidx;
1019                 if (index >= dinfo->nentries)
1020                         index -= dinfo->nentries;
1021                 e = &dinfo->log[index];
1022                 if (e->timestamp == 0)
1023                         return 0;
1024
1025                 /* Print the message.  This depends on the firmware using
1026                  * exactly the same formating strings as the kernel so we may
1027                  * eventually have to put a format interpreter in here ...
1028                  */
1029                 seq_printf(seq, "%10d  %15llu  %8s  %8s  ",
1030                            be32_to_cpu(e->seqno),
1031                            be64_to_cpu(e->timestamp),
1032                            (e->level < ARRAY_SIZE(devlog_level_strings)
1033                             ? devlog_level_strings[e->level]
1034                             : "UNKNOWN"),
1035                            (e->facility < ARRAY_SIZE(devlog_facility_strings)
1036                             ? devlog_facility_strings[e->facility]
1037                             : "UNKNOWN"));
1038                 seq_printf(seq, e->fmt,
1039                            be32_to_cpu(e->params[0]),
1040                            be32_to_cpu(e->params[1]),
1041                            be32_to_cpu(e->params[2]),
1042                            be32_to_cpu(e->params[3]),
1043                            be32_to_cpu(e->params[4]),
1044                            be32_to_cpu(e->params[5]),
1045                            be32_to_cpu(e->params[6]),
1046                            be32_to_cpu(e->params[7]));
1047         }
1048         return 0;
1049 }
1050
1051 /* Sequential File Operations for Device Log.
1052  */
1053 static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
1054 {
1055         if (pos > dinfo->nentries)
1056                 return NULL;
1057
1058         return (void *)(uintptr_t)(pos + 1);
1059 }
1060
1061 static void *devlog_start(struct seq_file *seq, loff_t *pos)
1062 {
1063         struct devlog_info *dinfo = seq->private;
1064
1065         return (*pos
1066                 ? devlog_get_idx(dinfo, *pos)
1067                 : SEQ_START_TOKEN);
1068 }
1069
1070 static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
1071 {
1072         struct devlog_info *dinfo = seq->private;
1073
1074         (*pos)++;
1075         return devlog_get_idx(dinfo, *pos);
1076 }
1077
1078 static void devlog_stop(struct seq_file *seq, void *v)
1079 {
1080 }
1081
1082 static const struct seq_operations devlog_seq_ops = {
1083         .start = devlog_start,
1084         .next  = devlog_next,
1085         .stop  = devlog_stop,
1086         .show  = devlog_show
1087 };
1088
1089 /* Set up for reading the firmware's device log.  We read the entire log here
1090  * and then display it incrementally in devlog_show().
1091  */
1092 static int devlog_open(struct inode *inode, struct file *file)
1093 {
1094         struct adapter *adap = inode->i_private;
1095         struct devlog_params *dparams = &adap->params.devlog;
1096         struct devlog_info *dinfo;
1097         unsigned int index;
1098         u32 fseqno;
1099         int ret;
1100
1101         /* If we don't know where the log is we can't do anything.
1102          */
1103         if (dparams->start == 0)
1104                 return -ENXIO;
1105
1106         /* Allocate the space to read in the firmware's device log and set up
1107          * for the iterated call to our display function.
1108          */
1109         dinfo = __seq_open_private(file, &devlog_seq_ops,
1110                                    sizeof(*dinfo) + dparams->size);
1111         if (!dinfo)
1112                 return -ENOMEM;
1113
1114         /* Record the basic log buffer information and read in the raw log.
1115          */
1116         dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
1117         dinfo->first = 0;
1118         spin_lock(&adap->win0_lock);
1119         ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
1120                            dparams->start, dparams->size, (__be32 *)dinfo->log,
1121                            T4_MEMORY_READ);
1122         spin_unlock(&adap->win0_lock);
1123         if (ret) {
1124                 seq_release_private(inode, file);
1125                 return ret;
1126         }
1127
1128         /* Find the earliest (lowest Sequence Number) log entry in the
1129          * circular Device Log.
1130          */
1131         for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
1132                 struct fw_devlog_e *e = &dinfo->log[index];
1133                 __u32 seqno;
1134
1135                 if (e->timestamp == 0)
1136                         continue;
1137
1138                 seqno = be32_to_cpu(e->seqno);
1139                 if (seqno < fseqno) {
1140                         fseqno = seqno;
1141                         dinfo->first = index;
1142                 }
1143         }
1144         return 0;
1145 }
1146
1147 static const struct file_operations devlog_fops = {
1148         .owner   = THIS_MODULE,
1149         .open    = devlog_open,
1150         .read    = seq_read,
1151         .llseek  = seq_lseek,
1152         .release = seq_release_private
1153 };
1154
1155 static int mbox_show(struct seq_file *seq, void *v)
1156 {
1157         static const char * const owner[] = { "none", "FW", "driver",
1158                                               "unknown", "<unread>" };
1159
1160         int i;
1161         unsigned int mbox = (uintptr_t)seq->private & 7;
1162         struct adapter *adap = seq->private - mbox;
1163         void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1164
1165         /* For T4 we don't have a shadow copy of the Mailbox Control register.
1166          * And since reading that real register causes a side effect of
1167          * granting ownership, we're best of simply not reading it at all.
1168          */
1169         if (is_t4(adap->params.chip)) {
1170                 i = 4; /* index of "<unread>" */
1171         } else {
1172                 unsigned int ctrl_reg = CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A;
1173                 void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg);
1174
1175                 i = MBOWNER_G(readl(ctrl));
1176         }
1177
1178         seq_printf(seq, "mailbox owned by %s\n\n", owner[i]);
1179
1180         for (i = 0; i < MBOX_LEN; i += 8)
1181                 seq_printf(seq, "%016llx\n",
1182                            (unsigned long long)readq(addr + i));
1183         return 0;
1184 }
1185
1186 static int mbox_open(struct inode *inode, struct file *file)
1187 {
1188         return single_open(file, mbox_show, inode->i_private);
1189 }
1190
1191 static ssize_t mbox_write(struct file *file, const char __user *buf,
1192                           size_t count, loff_t *pos)
1193 {
1194         int i;
1195         char c = '\n', s[256];
1196         unsigned long long data[8];
1197         const struct inode *ino;
1198         unsigned int mbox;
1199         struct adapter *adap;
1200         void __iomem *addr;
1201         void __iomem *ctrl;
1202
1203         if (count > sizeof(s) - 1 || !count)
1204                 return -EINVAL;
1205         if (copy_from_user(s, buf, count))
1206                 return -EFAULT;
1207         s[count] = '\0';
1208
1209         if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0],
1210                    &data[1], &data[2], &data[3], &data[4], &data[5], &data[6],
1211                    &data[7], &c) < 8 || c != '\n')
1212                 return -EINVAL;
1213
1214         ino = file_inode(file);
1215         mbox = (uintptr_t)ino->i_private & 7;
1216         adap = ino->i_private - mbox;
1217         addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1218         ctrl = addr + MBOX_LEN;
1219
1220         if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
1221                 return -EBUSY;
1222
1223         for (i = 0; i < 8; i++)
1224                 writeq(data[i], addr + 8 * i);
1225
1226         writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
1227         return count;
1228 }
1229
1230 static const struct file_operations mbox_debugfs_fops = {
1231         .owner   = THIS_MODULE,
1232         .open    = mbox_open,
1233         .read    = seq_read,
1234         .llseek  = seq_lseek,
1235         .release = single_release,
1236         .write   = mbox_write
1237 };
1238
1239 static int mps_trc_show(struct seq_file *seq, void *v)
1240 {
1241         int enabled, i;
1242         struct trace_params tp;
1243         unsigned int trcidx = (uintptr_t)seq->private & 3;
1244         struct adapter *adap = seq->private - trcidx;
1245
1246         t4_get_trace_filter(adap, &tp, trcidx, &enabled);
1247         if (!enabled) {
1248                 seq_puts(seq, "tracer is disabled\n");
1249                 return 0;
1250         }
1251
1252         if (tp.skip_ofst * 8 >= TRACE_LEN) {
1253                 dev_err(adap->pdev_dev, "illegal trace pattern skip offset\n");
1254                 return -EINVAL;
1255         }
1256         if (tp.port < 8) {
1257                 i = adap->chan_map[tp.port & 3];
1258                 if (i >= MAX_NPORTS) {
1259                         dev_err(adap->pdev_dev, "tracer %u is assigned "
1260                                 "to non-existing port\n", trcidx);
1261                         return -EINVAL;
1262                 }
1263                 seq_printf(seq, "tracer is capturing %s %s, ",
1264                            adap->port[i]->name, tp.port < 4 ? "Rx" : "Tx");
1265         } else
1266                 seq_printf(seq, "tracer is capturing loopback %d, ",
1267                            tp.port - 8);
1268         seq_printf(seq, "snap length: %u, min length: %u\n", tp.snap_len,
1269                    tp.min_len);
1270         seq_printf(seq, "packets captured %smatch filter\n",
1271                    tp.invert ? "do not " : "");
1272
1273         if (tp.skip_ofst) {
1274                 seq_puts(seq, "filter pattern: ");
1275                 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1276                         seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1277                 seq_putc(seq, '/');
1278                 for (i = 0; i < tp.skip_ofst * 2; i += 2)
1279                         seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1280                 seq_puts(seq, "@0\n");
1281         }
1282
1283         seq_puts(seq, "filter pattern: ");
1284         for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1285                 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]);
1286         seq_putc(seq, '/');
1287         for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2)
1288                 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]);
1289         seq_printf(seq, "@%u\n", (tp.skip_ofst + tp.skip_len) * 8);
1290         return 0;
1291 }
1292
1293 static int mps_trc_open(struct inode *inode, struct file *file)
1294 {
1295         return single_open(file, mps_trc_show, inode->i_private);
1296 }
1297
1298 static unsigned int xdigit2int(unsigned char c)
1299 {
1300         return isdigit(c) ? c - '0' : tolower(c) - 'a' + 10;
1301 }
1302
1303 #define TRC_PORT_NONE 0xff
1304 #define TRC_RSS_ENABLE 0x33
1305 #define TRC_RSS_DISABLE 0x13
1306
1307 /* Set an MPS trace filter.  Syntax is:
1308  *
1309  * disable
1310  *
1311  * to disable tracing, or
1312  *
1313  * interface qid=<qid no> [snaplen=<val>] [minlen=<val>] [not] [<pattern>]...
1314  *
1315  * where interface is one of rxN, txN, or loopbackN, N = 0..3, qid can be one
1316  * of the NIC's response qid obtained from sge_qinfo and pattern has the form
1317  *
1318  * <pattern data>[/<pattern mask>][@<anchor>]
1319  *
1320  * Up to 2 filter patterns can be specified.  If 2 are supplied the first one
1321  * must be anchored at 0.  An omited mask is taken as a mask of 1s, an omitted
1322  * anchor is taken as 0.
1323  */
1324 static ssize_t mps_trc_write(struct file *file, const char __user *buf,
1325                              size_t count, loff_t *pos)
1326 {
1327         int i, enable, ret;
1328         u32 *data, *mask;
1329         struct trace_params tp;
1330         const struct inode *ino;
1331         unsigned int trcidx;
1332         char *s, *p, *word, *end;
1333         struct adapter *adap;
1334         u32 j;
1335
1336         ino = file_inode(file);
1337         trcidx = (uintptr_t)ino->i_private & 3;
1338         adap = ino->i_private - trcidx;
1339
1340         /* Don't accept input more than 1K, can't be anything valid except lots
1341          * of whitespace.  Well, use less.
1342          */
1343         if (count > 1024)
1344                 return -EFBIG;
1345         p = s = kzalloc(count + 1, GFP_USER);
1346         if (!s)
1347                 return -ENOMEM;
1348         if (copy_from_user(s, buf, count)) {
1349                 count = -EFAULT;
1350                 goto out;
1351         }
1352
1353         if (s[count - 1] == '\n')
1354                 s[count - 1] = '\0';
1355
1356         enable = strcmp("disable", s) != 0;
1357         if (!enable)
1358                 goto apply;
1359
1360         /* enable or disable trace multi rss filter */
1361         if (adap->trace_rss)
1362                 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_ENABLE);
1363         else
1364                 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_DISABLE);
1365
1366         memset(&tp, 0, sizeof(tp));
1367         tp.port = TRC_PORT_NONE;
1368         i = 0;  /* counts pattern nibbles */
1369
1370         while (p) {
1371                 while (isspace(*p))
1372                         p++;
1373                 word = strsep(&p, " ");
1374                 if (!*word)
1375                         break;
1376
1377                 if (!strncmp(word, "qid=", 4)) {
1378                         end = (char *)word + 4;
1379                         ret = kstrtouint(end, 10, &j);
1380                         if (ret)
1381                                 goto out;
1382                         if (!adap->trace_rss) {
1383                                 t4_write_reg(adap, MPS_T5_TRC_RSS_CONTROL_A, j);
1384                                 continue;
1385                         }
1386
1387                         switch (trcidx) {
1388                         case 0:
1389                                 t4_write_reg(adap, MPS_TRC_RSS_CONTROL_A, j);
1390                                 break;
1391                         case 1:
1392                                 t4_write_reg(adap,
1393                                              MPS_TRC_FILTER1_RSS_CONTROL_A, j);
1394                                 break;
1395                         case 2:
1396                                 t4_write_reg(adap,
1397                                              MPS_TRC_FILTER2_RSS_CONTROL_A, j);
1398                                 break;
1399                         case 3:
1400                                 t4_write_reg(adap,
1401                                              MPS_TRC_FILTER3_RSS_CONTROL_A, j);
1402                                 break;
1403                         }
1404                         continue;
1405                 }
1406                 if (!strncmp(word, "snaplen=", 8)) {
1407                         end = (char *)word + 8;
1408                         ret = kstrtouint(end, 10, &j);
1409                         if (ret || j > 9600) {
1410 inval:                          count = -EINVAL;
1411                                 goto out;
1412                         }
1413                         tp.snap_len = j;
1414                         continue;
1415                 }
1416                 if (!strncmp(word, "minlen=", 7)) {
1417                         end = (char *)word + 7;
1418                         ret = kstrtouint(end, 10, &j);
1419                         if (ret || j > TFMINPKTSIZE_M)
1420                                 goto inval;
1421                         tp.min_len = j;
1422                         continue;
1423                 }
1424                 if (!strcmp(word, "not")) {
1425                         tp.invert = !tp.invert;
1426                         continue;
1427                 }
1428                 if (!strncmp(word, "loopback", 8) && tp.port == TRC_PORT_NONE) {
1429                         if (word[8] < '0' || word[8] > '3' || word[9])
1430                                 goto inval;
1431                         tp.port = word[8] - '0' + 8;
1432                         continue;
1433                 }
1434                 if (!strncmp(word, "tx", 2) && tp.port == TRC_PORT_NONE) {
1435                         if (word[2] < '0' || word[2] > '3' || word[3])
1436                                 goto inval;
1437                         tp.port = word[2] - '0' + 4;
1438                         if (adap->chan_map[tp.port & 3] >= MAX_NPORTS)
1439                                 goto inval;
1440                         continue;
1441                 }
1442                 if (!strncmp(word, "rx", 2) && tp.port == TRC_PORT_NONE) {
1443                         if (word[2] < '0' || word[2] > '3' || word[3])
1444                                 goto inval;
1445                         tp.port = word[2] - '0';
1446                         if (adap->chan_map[tp.port] >= MAX_NPORTS)
1447                                 goto inval;
1448                         continue;
1449                 }
1450                 if (!isxdigit(*word))
1451                         goto inval;
1452
1453                 /* we have found a trace pattern */
1454                 if (i) {                            /* split pattern */
1455                         if (tp.skip_len)            /* too many splits */
1456                                 goto inval;
1457                         tp.skip_ofst = i / 16;
1458                 }
1459
1460                 data = &tp.data[i / 8];
1461                 mask = &tp.mask[i / 8];
1462                 j = i;
1463
1464                 while (isxdigit(*word)) {
1465                         if (i >= TRACE_LEN * 2) {
1466                                 count = -EFBIG;
1467                                 goto out;
1468                         }
1469                         *data = (*data << 4) + xdigit2int(*word++);
1470                         if (++i % 8 == 0)
1471                                 data++;
1472                 }
1473                 if (*word == '/') {
1474                         word++;
1475                         while (isxdigit(*word)) {
1476                                 if (j >= i)         /* mask longer than data */
1477                                         goto inval;
1478                                 *mask = (*mask << 4) + xdigit2int(*word++);
1479                                 if (++j % 8 == 0)
1480                                         mask++;
1481                         }
1482                         if (i != j)                 /* mask shorter than data */
1483                                 goto inval;
1484                 } else {                            /* no mask, use all 1s */
1485                         for ( ; i - j >= 8; j += 8)
1486                                 *mask++ = 0xffffffff;
1487                         if (i % 8)
1488                                 *mask = (1 << (i % 8) * 4) - 1;
1489                 }
1490                 if (*word == '@') {
1491                         end = (char *)word + 1;
1492                         ret = kstrtouint(end, 10, &j);
1493                         if (*end && *end != '\n')
1494                                 goto inval;
1495                         if (j & 7)          /* doesn't start at multiple of 8 */
1496                                 goto inval;
1497                         j /= 8;
1498                         if (j < tp.skip_ofst)     /* overlaps earlier pattern */
1499                                 goto inval;
1500                         if (j - tp.skip_ofst > 31)            /* skip too big */
1501                                 goto inval;
1502                         tp.skip_len = j - tp.skip_ofst;
1503                 }
1504                 if (i % 8) {
1505                         *data <<= (8 - i % 8) * 4;
1506                         *mask <<= (8 - i % 8) * 4;
1507                         i = (i + 15) & ~15;         /* 8-byte align */
1508                 }
1509         }
1510
1511         if (tp.port == TRC_PORT_NONE)
1512                 goto inval;
1513
1514 apply:
1515         i = t4_set_trace_filter(adap, &tp, trcidx, enable);
1516         if (i)
1517                 count = i;
1518 out:
1519         kfree(s);
1520         return count;
1521 }
1522
1523 static const struct file_operations mps_trc_debugfs_fops = {
1524         .owner   = THIS_MODULE,
1525         .open    = mps_trc_open,
1526         .read    = seq_read,
1527         .llseek  = seq_lseek,
1528         .release = single_release,
1529         .write   = mps_trc_write
1530 };
1531
1532 static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
1533                           loff_t *ppos)
1534 {
1535         loff_t pos = *ppos;
1536         loff_t avail = file_inode(file)->i_size;
1537         struct adapter *adap = file->private_data;
1538
1539         if (pos < 0)
1540                 return -EINVAL;
1541         if (pos >= avail)
1542                 return 0;
1543         if (count > avail - pos)
1544                 count = avail - pos;
1545
1546         while (count) {
1547                 size_t len;
1548                 int ret, ofst;
1549                 u8 data[256];
1550
1551                 ofst = pos & 3;
1552                 len = min(count + ofst, sizeof(data));
1553                 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
1554                                     (u32 *)data, 1);
1555                 if (ret)
1556                         return ret;
1557
1558                 len -= ofst;
1559                 if (copy_to_user(buf, data + ofst, len))
1560                         return -EFAULT;
1561
1562                 buf += len;
1563                 pos += len;
1564                 count -= len;
1565         }
1566         count = pos - *ppos;
1567         *ppos = pos;
1568         return count;
1569 }
1570
1571 static const struct file_operations flash_debugfs_fops = {
1572         .owner   = THIS_MODULE,
1573         .open    = mem_open,
1574         .read    = flash_read,
1575 };
1576
1577 static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
1578 {
1579         *mask = x | y;
1580         y = (__force u64)cpu_to_be64(y);
1581         memcpy(addr, (char *)&y + 2, ETH_ALEN);
1582 }
1583
1584 static int mps_tcam_show(struct seq_file *seq, void *v)
1585 {
1586         struct adapter *adap = seq->private;
1587         unsigned int chip_ver = CHELSIO_CHIP_VERSION(adap->params.chip);
1588         if (v == SEQ_START_TOKEN) {
1589                 if (chip_ver > CHELSIO_T5) {
1590                         seq_puts(seq, "Idx  Ethernet address     Mask     "
1591                                  "  VNI   Mask   IVLAN Vld "
1592                                  "DIP_Hit   Lookup  Port "
1593                                  "Vld Ports PF  VF                           "
1594                                  "Replication                                "
1595                                  "    P0 P1 P2 P3  ML\n");
1596                 } else {
1597                         if (adap->params.arch.mps_rplc_size > 128)
1598                                 seq_puts(seq, "Idx  Ethernet address     Mask     "
1599                                          "Vld Ports PF  VF                           "
1600                                          "Replication                                "
1601                                          "    P0 P1 P2 P3  ML\n");
1602                         else
1603                                 seq_puts(seq, "Idx  Ethernet address     Mask     "
1604                                          "Vld Ports PF  VF              Replication"
1605                                          "               P0 P1 P2 P3  ML\n");
1606                 }
1607         } else {
1608                 u64 mask;
1609                 u8 addr[ETH_ALEN];
1610                 bool replicate, dip_hit = false, vlan_vld = false;
1611                 unsigned int idx = (uintptr_t)v - 2;
1612                 u64 tcamy, tcamx, val;
1613                 u32 cls_lo, cls_hi, ctl, data2, vnix = 0, vniy = 0;
1614                 u32 rplc[8] = {0};
1615                 u8 lookup_type = 0, port_num = 0;
1616                 u16 ivlan = 0;
1617
1618                 if (chip_ver > CHELSIO_T5) {
1619                         /* CtlCmdType - 0: Read, 1: Write
1620                          * CtlTcamSel - 0: TCAM0, 1: TCAM1
1621                          * CtlXYBitSel- 0: Y bit, 1: X bit
1622                          */
1623
1624                         /* Read tcamy */
1625                         ctl = CTLCMDTYPE_V(0) | CTLXYBITSEL_V(0);
1626                         if (idx < 256)
1627                                 ctl |= CTLTCAMINDEX_V(idx) | CTLTCAMSEL_V(0);
1628                         else
1629                                 ctl |= CTLTCAMINDEX_V(idx - 256) |
1630                                        CTLTCAMSEL_V(1);
1631                         t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1632                         val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1633                         tcamy = DMACH_G(val) << 32;
1634                         tcamy |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1635                         data2 = t4_read_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A);
1636                         lookup_type = DATALKPTYPE_G(data2);
1637                         /* 0 - Outer header, 1 - Inner header
1638                          * [71:48] bit locations are overloaded for
1639                          * outer vs. inner lookup types.
1640                          */
1641                         if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1642                                 /* Inner header VNI */
1643                                 vniy = ((data2 & DATAVIDH2_F) << 23) |
1644                                        (DATAVIDH1_G(data2) << 16) | VIDL_G(val);
1645                                 dip_hit = data2 & DATADIPHIT_F;
1646                         } else {
1647                                 vlan_vld = data2 & DATAVIDH2_F;
1648                                 ivlan = VIDL_G(val);
1649                         }
1650                         port_num = DATAPORTNUM_G(data2);
1651
1652                         /* Read tcamx. Change the control param */
1653                         ctl |= CTLXYBITSEL_V(1);
1654                         t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl);
1655                         val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A);
1656                         tcamx = DMACH_G(val) << 32;
1657                         tcamx |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A);
1658                         data2 = t4_read_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A);
1659                         if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1660                                 /* Inner header VNI mask */
1661                                 vnix = ((data2 & DATAVIDH2_F) << 23) |
1662                                        (DATAVIDH1_G(data2) << 16) | VIDL_G(val);
1663                         }
1664                 } else {
1665                         tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
1666                         tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
1667                 }
1668
1669                 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
1670                 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
1671
1672                 if (tcamx & tcamy) {
1673                         seq_printf(seq, "%3u         -\n", idx);
1674                         goto out;
1675                 }
1676
1677                 rplc[0] = rplc[1] = rplc[2] = rplc[3] = 0;
1678                 if (chip_ver > CHELSIO_T5)
1679                         replicate = (cls_lo & T6_REPLICATE_F);
1680                 else
1681                         replicate = (cls_lo & REPLICATE_F);
1682
1683                 if (replicate) {
1684                         struct fw_ldst_cmd ldst_cmd;
1685                         int ret;
1686                         struct fw_ldst_mps_rplc mps_rplc;
1687                         u32 ldst_addrspc;
1688
1689                         memset(&ldst_cmd, 0, sizeof(ldst_cmd));
1690                         ldst_addrspc =
1691                                 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MPS);
1692                         ldst_cmd.op_to_addrspace =
1693                                 htonl(FW_CMD_OP_V(FW_LDST_CMD) |
1694                                       FW_CMD_REQUEST_F |
1695                                       FW_CMD_READ_F |
1696                                       ldst_addrspc);
1697                         ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
1698                         ldst_cmd.u.mps.rplc.fid_idx =
1699                                 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
1700                                       FW_LDST_CMD_IDX_V(idx));
1701                         ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
1702                                          sizeof(ldst_cmd), &ldst_cmd);
1703                         if (ret)
1704                                 dev_warn(adap->pdev_dev, "Can't read MPS "
1705                                          "replication map for idx %d: %d\n",
1706                                          idx, -ret);
1707                         else {
1708                                 mps_rplc = ldst_cmd.u.mps.rplc;
1709                                 rplc[0] = ntohl(mps_rplc.rplc31_0);
1710                                 rplc[1] = ntohl(mps_rplc.rplc63_32);
1711                                 rplc[2] = ntohl(mps_rplc.rplc95_64);
1712                                 rplc[3] = ntohl(mps_rplc.rplc127_96);
1713                                 if (adap->params.arch.mps_rplc_size > 128) {
1714                                         rplc[4] = ntohl(mps_rplc.rplc159_128);
1715                                         rplc[5] = ntohl(mps_rplc.rplc191_160);
1716                                         rplc[6] = ntohl(mps_rplc.rplc223_192);
1717                                         rplc[7] = ntohl(mps_rplc.rplc255_224);
1718                                 }
1719                         }
1720                 }
1721
1722                 tcamxy2valmask(tcamx, tcamy, addr, &mask);
1723                 if (chip_ver > CHELSIO_T5) {
1724                         /* Inner header lookup */
1725                         if (lookup_type && (lookup_type != DATALKPTYPE_M)) {
1726                                 seq_printf(seq,
1727                                            "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1728                                            "%012llx %06x %06x    -    -   %3c"
1729                                            "      'I'  %4x   "
1730                                            "%3c   %#x%4u%4d", idx, addr[0],
1731                                            addr[1], addr[2], addr[3],
1732                                            addr[4], addr[5],
1733                                            (unsigned long long)mask,
1734                                            vniy, vnix, dip_hit ? 'Y' : 'N',
1735                                            port_num,
1736                                            (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1737                                            PORTMAP_G(cls_hi),
1738                                            T6_PF_G(cls_lo),
1739                                            (cls_lo & T6_VF_VALID_F) ?
1740                                            T6_VF_G(cls_lo) : -1);
1741                         } else {
1742                                 seq_printf(seq,
1743                                            "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1744                                            "%012llx    -       -   ",
1745                                            idx, addr[0], addr[1], addr[2],
1746                                            addr[3], addr[4], addr[5],
1747                                            (unsigned long long)mask);
1748
1749                                 if (vlan_vld)
1750                                         seq_printf(seq, "%4u   Y     ", ivlan);
1751                                 else
1752                                         seq_puts(seq, "  -    N     ");
1753
1754                                 seq_printf(seq,
1755                                            "-      %3c  %4x   %3c   %#x%4u%4d",
1756                                            lookup_type ? 'I' : 'O', port_num,
1757                                            (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N',
1758                                            PORTMAP_G(cls_hi),
1759                                            T6_PF_G(cls_lo),
1760                                            (cls_lo & T6_VF_VALID_F) ?
1761                                            T6_VF_G(cls_lo) : -1);
1762                         }
1763                 } else
1764                         seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1765                                    "%012llx%3c   %#x%4u%4d",
1766                                    idx, addr[0], addr[1], addr[2], addr[3],
1767                                    addr[4], addr[5], (unsigned long long)mask,
1768                                    (cls_lo & SRAM_VLD_F) ? 'Y' : 'N',
1769                                    PORTMAP_G(cls_hi),
1770                                    PF_G(cls_lo),
1771                                    (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
1772
1773                 if (replicate) {
1774                         if (adap->params.arch.mps_rplc_size > 128)
1775                                 seq_printf(seq, " %08x %08x %08x %08x "
1776                                            "%08x %08x %08x %08x",
1777                                            rplc[7], rplc[6], rplc[5], rplc[4],
1778                                            rplc[3], rplc[2], rplc[1], rplc[0]);
1779                         else
1780                                 seq_printf(seq, " %08x %08x %08x %08x",
1781                                            rplc[3], rplc[2], rplc[1], rplc[0]);
1782                 } else {
1783                         if (adap->params.arch.mps_rplc_size > 128)
1784                                 seq_printf(seq, "%72c", ' ');
1785                         else
1786                                 seq_printf(seq, "%36c", ' ');
1787                 }
1788
1789                 if (chip_ver > CHELSIO_T5)
1790                         seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1791                                    T6_SRAM_PRIO0_G(cls_lo),
1792                                    T6_SRAM_PRIO1_G(cls_lo),
1793                                    T6_SRAM_PRIO2_G(cls_lo),
1794                                    T6_SRAM_PRIO3_G(cls_lo),
1795                                    (cls_lo >> T6_MULTILISTEN0_S) & 0xf);
1796                 else
1797                         seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1798                                    SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
1799                                    SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
1800                                    (cls_lo >> MULTILISTEN0_S) & 0xf);
1801         }
1802 out:    return 0;
1803 }
1804
1805 static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
1806 {
1807         struct adapter *adap = seq->private;
1808         int max_mac_addr = is_t4(adap->params.chip) ?
1809                                 NUM_MPS_CLS_SRAM_L_INSTANCES :
1810                                 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1811         return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
1812 }
1813
1814 static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
1815 {
1816         return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
1817 }
1818
1819 static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
1820 {
1821         ++*pos;
1822         return mps_tcam_get_idx(seq, *pos);
1823 }
1824
1825 static void mps_tcam_stop(struct seq_file *seq, void *v)
1826 {
1827 }
1828
1829 static const struct seq_operations mps_tcam_seq_ops = {
1830         .start = mps_tcam_start,
1831         .next  = mps_tcam_next,
1832         .stop  = mps_tcam_stop,
1833         .show  = mps_tcam_show
1834 };
1835
1836 static int mps_tcam_open(struct inode *inode, struct file *file)
1837 {
1838         int res = seq_open(file, &mps_tcam_seq_ops);
1839
1840         if (!res) {
1841                 struct seq_file *seq = file->private_data;
1842
1843                 seq->private = inode->i_private;
1844         }
1845         return res;
1846 }
1847
1848 static const struct file_operations mps_tcam_debugfs_fops = {
1849         .owner   = THIS_MODULE,
1850         .open    = mps_tcam_open,
1851         .read    = seq_read,
1852         .llseek  = seq_lseek,
1853         .release = seq_release,
1854 };
1855
1856 /* Display various sensor information.
1857  */
1858 static int sensors_show(struct seq_file *seq, void *v)
1859 {
1860         struct adapter *adap = seq->private;
1861         u32 param[7], val[7];
1862         int ret;
1863
1864         /* Note that if the sensors haven't been initialized and turned on
1865          * we'll get values of 0, so treat those as "<unknown>" ...
1866          */
1867         param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1868                     FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1869                     FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
1870         param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1871                     FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1872                     FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
1873         ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 2,
1874                               param, val);
1875
1876         if (ret < 0 || val[0] == 0)
1877                 seq_puts(seq, "Temperature: <unknown>\n");
1878         else
1879                 seq_printf(seq, "Temperature: %dC\n", val[0]);
1880
1881         if (ret < 0 || val[1] == 0)
1882                 seq_puts(seq, "Core VDD:    <unknown>\n");
1883         else
1884                 seq_printf(seq, "Core VDD:    %dmV\n", val[1]);
1885
1886         return 0;
1887 }
1888
1889 DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
1890
1891 #if IS_ENABLED(CONFIG_IPV6)
1892 static int clip_tbl_open(struct inode *inode, struct file *file)
1893 {
1894         return single_open(file, clip_tbl_show, inode->i_private);
1895 }
1896
1897 static const struct file_operations clip_tbl_debugfs_fops = {
1898         .owner   = THIS_MODULE,
1899         .open    = clip_tbl_open,
1900         .read    = seq_read,
1901         .llseek  = seq_lseek,
1902         .release = single_release
1903 };
1904 #endif
1905
1906 /*RSS Table.
1907  */
1908
1909 static int rss_show(struct seq_file *seq, void *v, int idx)
1910 {
1911         u16 *entry = v;
1912
1913         seq_printf(seq, "%4d:  %4u  %4u  %4u  %4u  %4u  %4u  %4u  %4u\n",
1914                    idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
1915                    entry[5], entry[6], entry[7]);
1916         return 0;
1917 }
1918
1919 static int rss_open(struct inode *inode, struct file *file)
1920 {
1921         int ret;
1922         struct seq_tab *p;
1923         struct adapter *adap = inode->i_private;
1924
1925         p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show);
1926         if (!p)
1927                 return -ENOMEM;
1928
1929         ret = t4_read_rss(adap, (u16 *)p->data);
1930         if (ret)
1931                 seq_release_private(inode, file);
1932
1933         return ret;
1934 }
1935
1936 static const struct file_operations rss_debugfs_fops = {
1937         .owner   = THIS_MODULE,
1938         .open    = rss_open,
1939         .read    = seq_read,
1940         .llseek  = seq_lseek,
1941         .release = seq_release_private
1942 };
1943
1944 /* RSS Configuration.
1945  */
1946
1947 /* Small utility function to return the strings "yes" or "no" if the supplied
1948  * argument is non-zero.
1949  */
1950 static const char *yesno(int x)
1951 {
1952         static const char *yes = "yes";
1953         static const char *no = "no";
1954
1955         return x ? yes : no;
1956 }
1957
1958 static int rss_config_show(struct seq_file *seq, void *v)
1959 {
1960         struct adapter *adapter = seq->private;
1961         static const char * const keymode[] = {
1962                 "global",
1963                 "global and per-VF scramble",
1964                 "per-PF and per-VF scramble",
1965                 "per-VF and per-VF scramble",
1966         };
1967         u32 rssconf;
1968
1969         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
1970         seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
1971         seq_printf(seq, "  Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
1972                                                         TNL4TUPENIPV6_F));
1973         seq_printf(seq, "  Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
1974                                                         TNL2TUPENIPV6_F));
1975         seq_printf(seq, "  Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
1976                                                         TNL4TUPENIPV4_F));
1977         seq_printf(seq, "  Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
1978                                                         TNL2TUPENIPV4_F));
1979         seq_printf(seq, "  TnlTcpSel:     %3s\n", yesno(rssconf & TNLTCPSEL_F));
1980         seq_printf(seq, "  TnlIp6Sel:     %3s\n", yesno(rssconf & TNLIP6SEL_F));
1981         seq_printf(seq, "  TnlVrtSel:     %3s\n", yesno(rssconf & TNLVRTSEL_F));
1982         seq_printf(seq, "  TnlMapEn:      %3s\n", yesno(rssconf & TNLMAPEN_F));
1983         seq_printf(seq, "  OfdHashSave:   %3s\n", yesno(rssconf &
1984                                                         OFDHASHSAVE_F));
1985         seq_printf(seq, "  OfdVrtSel:     %3s\n", yesno(rssconf & OFDVRTSEL_F));
1986         seq_printf(seq, "  OfdMapEn:      %3s\n", yesno(rssconf & OFDMAPEN_F));
1987         seq_printf(seq, "  OfdLkpEn:      %3s\n", yesno(rssconf & OFDLKPEN_F));
1988         seq_printf(seq, "  Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1989                                                         SYN4TUPENIPV6_F));
1990         seq_printf(seq, "  Syn2TupEnIpv6: %3s\n", yesno(rssconf &
1991                                                         SYN2TUPENIPV6_F));
1992         seq_printf(seq, "  Syn4TupEnIpv4: %3s\n", yesno(rssconf &
1993                                                         SYN4TUPENIPV4_F));
1994         seq_printf(seq, "  Syn2TupEnIpv4: %3s\n", yesno(rssconf &
1995                                                         SYN2TUPENIPV4_F));
1996         seq_printf(seq, "  Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1997                                                         SYN4TUPENIPV6_F));
1998         seq_printf(seq, "  SynIp6Sel:     %3s\n", yesno(rssconf & SYNIP6SEL_F));
1999         seq_printf(seq, "  SynVrt6Sel:    %3s\n", yesno(rssconf & SYNVRTSEL_F));
2000         seq_printf(seq, "  SynMapEn:      %3s\n", yesno(rssconf & SYNMAPEN_F));
2001         seq_printf(seq, "  SynLkpEn:      %3s\n", yesno(rssconf & SYNLKPEN_F));
2002         seq_printf(seq, "  ChnEn:         %3s\n", yesno(rssconf &
2003                                                         CHANNELENABLE_F));
2004         seq_printf(seq, "  PrtEn:         %3s\n", yesno(rssconf &
2005                                                         PORTENABLE_F));
2006         seq_printf(seq, "  TnlAllLkp:     %3s\n", yesno(rssconf &
2007                                                         TNLALLLOOKUP_F));
2008         seq_printf(seq, "  VrtEn:         %3s\n", yesno(rssconf &
2009                                                         VIRTENABLE_F));
2010         seq_printf(seq, "  CngEn:         %3s\n", yesno(rssconf &
2011                                                         CONGESTIONENABLE_F));
2012         seq_printf(seq, "  HashToeplitz:  %3s\n", yesno(rssconf &
2013                                                         HASHTOEPLITZ_F));
2014         seq_printf(seq, "  Udp4En:        %3s\n", yesno(rssconf & UDPENABLE_F));
2015         seq_printf(seq, "  Disable:       %3s\n", yesno(rssconf & DISABLE_F));
2016
2017         seq_puts(seq, "\n");
2018
2019         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
2020         seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
2021         seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
2022         seq_printf(seq, "  MaskFilter:    %3d\n", MASKFILTER_G(rssconf));
2023         if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
2024                 seq_printf(seq, "  HashAll:     %3s\n",
2025                            yesno(rssconf & HASHALL_F));
2026                 seq_printf(seq, "  HashEth:     %3s\n",
2027                            yesno(rssconf & HASHETH_F));
2028         }
2029         seq_printf(seq, "  UseWireCh:     %3s\n", yesno(rssconf & USEWIRECH_F));
2030
2031         seq_puts(seq, "\n");
2032
2033         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
2034         seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
2035         seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
2036         seq_printf(seq, "  RRCplMapEn:    %3s\n", yesno(rssconf &
2037                                                         RRCPLMAPEN_F));
2038         seq_printf(seq, "  RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
2039
2040         seq_puts(seq, "\n");
2041
2042         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
2043         seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
2044         seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
2045         seq_printf(seq, "  UseWireCh:     %3s\n", yesno(rssconf & USEWIRECH_F));
2046
2047         seq_puts(seq, "\n");
2048
2049         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
2050         seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
2051         if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
2052                 seq_printf(seq, "  KeyWrAddrX:     %3d\n",
2053                            KEYWRADDRX_G(rssconf));
2054                 seq_printf(seq, "  KeyExtend:      %3s\n",
2055                            yesno(rssconf & KEYEXTEND_F));
2056         }
2057         seq_printf(seq, "  VfRdRg:        %3s\n", yesno(rssconf & VFRDRG_F));
2058         seq_printf(seq, "  VfRdEn:        %3s\n", yesno(rssconf & VFRDEN_F));
2059         seq_printf(seq, "  VfPerrEn:      %3s\n", yesno(rssconf & VFPERREN_F));
2060         seq_printf(seq, "  KeyPerrEn:     %3s\n", yesno(rssconf & KEYPERREN_F));
2061         seq_printf(seq, "  DisVfVlan:     %3s\n", yesno(rssconf &
2062                                                         DISABLEVLAN_F));
2063         seq_printf(seq, "  EnUpSwt:       %3s\n", yesno(rssconf & ENABLEUP0_F));
2064         seq_printf(seq, "  HashDelay:     %3d\n", HASHDELAY_G(rssconf));
2065         if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
2066                 seq_printf(seq, "  VfWrAddr:      %3d\n", VFWRADDR_G(rssconf));
2067         else
2068                 seq_printf(seq, "  VfWrAddr:      %3d\n",
2069                            T6_VFWRADDR_G(rssconf));
2070         seq_printf(seq, "  KeyMode:       %s\n", keymode[KEYMODE_G(rssconf)]);
2071         seq_printf(seq, "  VfWrEn:        %3s\n", yesno(rssconf & VFWREN_F));
2072         seq_printf(seq, "  KeyWrEn:       %3s\n", yesno(rssconf & KEYWREN_F));
2073         seq_printf(seq, "  KeyWrAddr:     %3d\n", KEYWRADDR_G(rssconf));
2074
2075         seq_puts(seq, "\n");
2076
2077         rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
2078         seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
2079         seq_printf(seq, "  ChnCount3:     %3s\n", yesno(rssconf & CHNCOUNT3_F));
2080         seq_printf(seq, "  ChnCount2:     %3s\n", yesno(rssconf & CHNCOUNT2_F));
2081         seq_printf(seq, "  ChnCount1:     %3s\n", yesno(rssconf & CHNCOUNT1_F));
2082         seq_printf(seq, "  ChnCount0:     %3s\n", yesno(rssconf & CHNCOUNT0_F));
2083         seq_printf(seq, "  ChnUndFlow3:   %3s\n", yesno(rssconf &
2084                                                         CHNUNDFLOW3_F));
2085         seq_printf(seq, "  ChnUndFlow2:   %3s\n", yesno(rssconf &
2086                                                         CHNUNDFLOW2_F));
2087         seq_printf(seq, "  ChnUndFlow1:   %3s\n", yesno(rssconf &
2088                                                         CHNUNDFLOW1_F));
2089         seq_printf(seq, "  ChnUndFlow0:   %3s\n", yesno(rssconf &
2090                                                         CHNUNDFLOW0_F));
2091         seq_printf(seq, "  RstChn3:       %3s\n", yesno(rssconf & RSTCHN3_F));
2092         seq_printf(seq, "  RstChn2:       %3s\n", yesno(rssconf & RSTCHN2_F));
2093         seq_printf(seq, "  RstChn1:       %3s\n", yesno(rssconf & RSTCHN1_F));
2094         seq_printf(seq, "  RstChn0:       %3s\n", yesno(rssconf & RSTCHN0_F));
2095         seq_printf(seq, "  UpdVld:        %3s\n", yesno(rssconf & UPDVLD_F));
2096         seq_printf(seq, "  Xoff:          %3s\n", yesno(rssconf & XOFF_F));
2097         seq_printf(seq, "  UpdChn3:       %3s\n", yesno(rssconf & UPDCHN3_F));
2098         seq_printf(seq, "  UpdChn2:       %3s\n", yesno(rssconf & UPDCHN2_F));
2099         seq_printf(seq, "  UpdChn1:       %3s\n", yesno(rssconf & UPDCHN1_F));
2100         seq_printf(seq, "  UpdChn0:       %3s\n", yesno(rssconf & UPDCHN0_F));
2101         seq_printf(seq, "  Queue:         %3d\n", QUEUE_G(rssconf));
2102
2103         return 0;
2104 }
2105
2106 DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
2107
2108 /* RSS Secret Key.
2109  */
2110
2111 static int rss_key_show(struct seq_file *seq, void *v)
2112 {
2113         u32 key[10];
2114
2115         t4_read_rss_key(seq->private, key);
2116         seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
2117                    key[9], key[8], key[7], key[6], key[5], key[4], key[3],
2118                    key[2], key[1], key[0]);
2119         return 0;
2120 }
2121
2122 static int rss_key_open(struct inode *inode, struct file *file)
2123 {
2124         return single_open(file, rss_key_show, inode->i_private);
2125 }
2126
2127 static ssize_t rss_key_write(struct file *file, const char __user *buf,
2128                              size_t count, loff_t *pos)
2129 {
2130         int i, j;
2131         u32 key[10];
2132         char s[100], *p;
2133         struct adapter *adap = file_inode(file)->i_private;
2134
2135         if (count > sizeof(s) - 1)
2136                 return -EINVAL;
2137         if (copy_from_user(s, buf, count))
2138                 return -EFAULT;
2139         for (i = count; i > 0 && isspace(s[i - 1]); i--)
2140                 ;
2141         s[i] = '\0';
2142
2143         for (p = s, i = 9; i >= 0; i--) {
2144                 key[i] = 0;
2145                 for (j = 0; j < 8; j++, p++) {
2146                         if (!isxdigit(*p))
2147                                 return -EINVAL;
2148                         key[i] = (key[i] << 4) | hex2val(*p);
2149                 }
2150         }
2151
2152         t4_write_rss_key(adap, key, -1);
2153         return count;
2154 }
2155
2156 static const struct file_operations rss_key_debugfs_fops = {
2157         .owner   = THIS_MODULE,
2158         .open    = rss_key_open,
2159         .read    = seq_read,
2160         .llseek  = seq_lseek,
2161         .release = single_release,
2162         .write   = rss_key_write
2163 };
2164
2165 /* PF RSS Configuration.
2166  */
2167
2168 struct rss_pf_conf {
2169         u32 rss_pf_map;
2170         u32 rss_pf_mask;
2171         u32 rss_pf_config;
2172 };
2173
2174 static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
2175 {
2176         struct rss_pf_conf *pfconf;
2177
2178         if (v == SEQ_START_TOKEN) {
2179                 /* use the 0th entry to dump the PF Map Index Size */
2180                 pfconf = seq->private + offsetof(struct seq_tab, data);
2181                 seq_printf(seq, "PF Map Index Size = %d\n\n",
2182                            LKPIDXSIZE_G(pfconf->rss_pf_map));
2183
2184                 seq_puts(seq, "     RSS              PF   VF    Hash Tuple Enable         Default\n");
2185                 seq_puts(seq, "     Enable       IPF Mask Mask  IPv6      IPv4      UDP   Queue\n");
2186                 seq_puts(seq, " PF  Map Chn Prt  Map Size Size  Four Two  Four Two  Four  Ch1  Ch0\n");
2187         } else {
2188                 #define G_PFnLKPIDX(map, n) \
2189                         (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
2190                 #define G_PFnMSKSIZE(mask, n) \
2191                         (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
2192
2193                 pfconf = v;
2194                 seq_printf(seq, "%3d  %3s %3s %3s  %3d  %3d  %3d   %3s %3s   %3s %3s   %3s  %3d  %3d\n",
2195                            idx,
2196                            yesno(pfconf->rss_pf_config & MAPENABLE_F),
2197                            yesno(pfconf->rss_pf_config & CHNENABLE_F),
2198                            yesno(pfconf->rss_pf_config & PRTENABLE_F),
2199                            G_PFnLKPIDX(pfconf->rss_pf_map, idx),
2200                            G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
2201                            IVFWIDTH_G(pfconf->rss_pf_config),
2202                            yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
2203                            yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
2204                            yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
2205                            yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
2206                            yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
2207                            CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
2208                            CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
2209
2210                 #undef G_PFnLKPIDX
2211                 #undef G_PFnMSKSIZE
2212         }
2213         return 0;
2214 }
2215
2216 static int rss_pf_config_open(struct inode *inode, struct file *file)
2217 {
2218         struct adapter *adapter = inode->i_private;
2219         struct seq_tab *p;
2220         u32 rss_pf_map, rss_pf_mask;
2221         struct rss_pf_conf *pfconf;
2222         int pf;
2223
2224         p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
2225         if (!p)
2226                 return -ENOMEM;
2227
2228         pfconf = (struct rss_pf_conf *)p->data;
2229         rss_pf_map = t4_read_rss_pf_map(adapter);
2230         rss_pf_mask = t4_read_rss_pf_mask(adapter);
2231         for (pf = 0; pf < 8; pf++) {
2232                 pfconf[pf].rss_pf_map = rss_pf_map;
2233                 pfconf[pf].rss_pf_mask = rss_pf_mask;
2234                 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config);
2235         }
2236         return 0;
2237 }
2238
2239 static const struct file_operations rss_pf_config_debugfs_fops = {
2240         .owner   = THIS_MODULE,
2241         .open    = rss_pf_config_open,
2242         .read    = seq_read,
2243         .llseek  = seq_lseek,
2244         .release = seq_release_private
2245 };
2246
2247 /* VF RSS Configuration.
2248  */
2249
2250 struct rss_vf_conf {
2251         u32 rss_vf_vfl;
2252         u32 rss_vf_vfh;
2253 };
2254
2255 static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
2256 {
2257         if (v == SEQ_START_TOKEN) {
2258                 seq_puts(seq, "     RSS                     Hash Tuple Enable\n");
2259                 seq_puts(seq, "     Enable   IVF  Dis  Enb  IPv6      IPv4      UDP    Def  Secret Key\n");
2260                 seq_puts(seq, " VF  Chn Prt  Map  VLAN  uP  Four Two  Four Two  Four   Que  Idx       Hash\n");
2261         } else {
2262                 struct rss_vf_conf *vfconf = v;
2263
2264                 seq_printf(seq, "%3d  %3s %3s  %3d   %3s %3s   %3s %3s   %3s  %3s   %3s  %4d  %3d %#10x\n",
2265                            idx,
2266                            yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
2267                            yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
2268                            VFLKPIDX_G(vfconf->rss_vf_vfh),
2269                            yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
2270                            yesno(vfconf->rss_vf_vfh & VFUPEN_F),
2271                            yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2272                            yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
2273                            yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
2274                            yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
2275                            yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
2276                            DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
2277                            KEYINDEX_G(vfconf->rss_vf_vfh),
2278                            vfconf->rss_vf_vfl);
2279         }
2280         return 0;
2281 }
2282
2283 static int rss_vf_config_open(struct inode *inode, struct file *file)
2284 {
2285         struct adapter *adapter = inode->i_private;
2286         struct seq_tab *p;
2287         struct rss_vf_conf *vfconf;
2288         int vf, vfcount = adapter->params.arch.vfcount;
2289
2290         p = seq_open_tab(file, vfcount, sizeof(*vfconf), 1, rss_vf_config_show);
2291         if (!p)
2292                 return -ENOMEM;
2293
2294         vfconf = (struct rss_vf_conf *)p->data;
2295         for (vf = 0; vf < vfcount; vf++) {
2296                 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
2297                                       &vfconf[vf].rss_vf_vfh);
2298         }
2299         return 0;
2300 }
2301
2302 static const struct file_operations rss_vf_config_debugfs_fops = {
2303         .owner   = THIS_MODULE,
2304         .open    = rss_vf_config_open,
2305         .read    = seq_read,
2306         .llseek  = seq_lseek,
2307         .release = seq_release_private
2308 };
2309
2310 /**
2311  * ethqset2pinfo - return port_info of an Ethernet Queue Set
2312  * @adap: the adapter
2313  * @qset: Ethernet Queue Set
2314  */
2315 static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
2316 {
2317         int pidx;
2318
2319         for_each_port(adap, pidx) {
2320                 struct port_info *pi = adap2pinfo(adap, pidx);
2321
2322                 if (qset >= pi->first_qset &&
2323                     qset < pi->first_qset + pi->nqsets)
2324                         return pi;
2325         }
2326
2327         /* should never happen! */
2328         BUG_ON(1);
2329         return NULL;
2330 }
2331
2332 static int sge_qinfo_show(struct seq_file *seq, void *v)
2333 {
2334         struct adapter *adap = seq->private;
2335         int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
2336         int iscsi_entries = DIV_ROUND_UP(adap->sge.iscsiqsets, 4);
2337         int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
2338         int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
2339         int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
2340         int i, r = (uintptr_t)v - 1;
2341         int iscsi_idx = r - eth_entries;
2342         int rdma_idx = iscsi_idx - iscsi_entries;
2343         int ciq_idx = rdma_idx - rdma_entries;
2344         int ctrl_idx =  ciq_idx - ciq_entries;
2345         int fq_idx =  ctrl_idx - ctrl_entries;
2346
2347         if (r)
2348                 seq_putc(seq, '\n');
2349
2350 #define S3(fmt_spec, s, v) \
2351 do { \
2352         seq_printf(seq, "%-12s", s); \
2353         for (i = 0; i < n; ++i) \
2354                 seq_printf(seq, " %16" fmt_spec, v); \
2355                 seq_putc(seq, '\n'); \
2356 } while (0)
2357 #define S(s, v) S3("s", s, v)
2358 #define T3(fmt_spec, s, v) S3(fmt_spec, s, tx[i].v)
2359 #define T(s, v) S3("u", s, tx[i].v)
2360 #define TL(s, v) T3("lu", s, v)
2361 #define R3(fmt_spec, s, v) S3(fmt_spec, s, rx[i].v)
2362 #define R(s, v) S3("u", s, rx[i].v)
2363 #define RL(s, v) R3("lu", s, v)
2364
2365         if (r < eth_entries) {
2366                 int base_qset = r * 4;
2367                 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
2368                 const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
2369                 int n = min(4, adap->sge.ethqsets - 4 * r);
2370
2371                 S("QType:", "Ethernet");
2372                 S("Interface:",
2373                   rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2374                 T("TxQ ID:", q.cntxt_id);
2375                 T("TxQ size:", q.size);
2376                 T("TxQ inuse:", q.in_use);
2377                 T("TxQ CIDX:", q.cidx);
2378                 T("TxQ PIDX:", q.pidx);
2379 #ifdef CONFIG_CHELSIO_T4_DCB
2380                 T("DCB Prio:", dcb_prio);
2381                 S3("u", "DCB PGID:",
2382                    (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
2383                     4*(7-tx[i].dcb_prio)) & 0xf);
2384                 S3("u", "DCB PFC:",
2385                    (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
2386                     1*(7-tx[i].dcb_prio)) & 0x1);
2387 #endif
2388                 R("RspQ ID:", rspq.abs_id);
2389                 R("RspQ size:", rspq.size);
2390                 R("RspQE size:", rspq.iqe_len);
2391                 R("RspQ CIDX:", rspq.cidx);
2392                 R("RspQ Gen:", rspq.gen);
2393                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2394                 S3("u", "Intr pktcnt:",
2395                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2396                 R("FL ID:", fl.cntxt_id);
2397                 R("FL size:", fl.size - 8);
2398                 R("FL pend:", fl.pend_cred);
2399                 R("FL avail:", fl.avail);
2400                 R("FL PIDX:", fl.pidx);
2401                 R("FL CIDX:", fl.cidx);
2402                 RL("RxPackets:", stats.pkts);
2403                 RL("RxCSO:", stats.rx_cso);
2404                 RL("VLANxtract:", stats.vlan_ex);
2405                 RL("LROmerged:", stats.lro_merged);
2406                 RL("LROpackets:", stats.lro_pkts);
2407                 RL("RxDrops:", stats.rx_drops);
2408                 TL("TSO:", tso);
2409                 TL("TxCSO:", tx_cso);
2410                 TL("VLANins:", vlan_ins);
2411                 TL("TxQFull:", q.stops);
2412                 TL("TxQRestarts:", q.restarts);
2413                 TL("TxMapErr:", mapping_err);
2414                 RL("FLAllocErr:", fl.alloc_failed);
2415                 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2416                 RL("FLMapErr:", fl.mapping_err);
2417                 RL("FLLow:", fl.low);
2418                 RL("FLStarving:", fl.starving);
2419
2420         } else if (iscsi_idx < iscsi_entries) {
2421                 const struct sge_ofld_rxq *rx =
2422                         &adap->sge.iscsirxq[iscsi_idx * 4];
2423                 const struct sge_ofld_txq *tx =
2424                         &adap->sge.ofldtxq[iscsi_idx * 4];
2425                 int n = min(4, adap->sge.iscsiqsets - 4 * iscsi_idx);
2426
2427                 S("QType:", "iSCSI");
2428                 T("TxQ ID:", q.cntxt_id);
2429                 T("TxQ size:", q.size);
2430                 T("TxQ inuse:", q.in_use);
2431                 T("TxQ CIDX:", q.cidx);
2432                 T("TxQ PIDX:", q.pidx);
2433                 R("RspQ ID:", rspq.abs_id);
2434                 R("RspQ size:", rspq.size);
2435                 R("RspQE size:", rspq.iqe_len);
2436                 R("RspQ CIDX:", rspq.cidx);
2437                 R("RspQ Gen:", rspq.gen);
2438                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2439                 S3("u", "Intr pktcnt:",
2440                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2441                 R("FL ID:", fl.cntxt_id);
2442                 R("FL size:", fl.size - 8);
2443                 R("FL pend:", fl.pend_cred);
2444                 R("FL avail:", fl.avail);
2445                 R("FL PIDX:", fl.pidx);
2446                 R("FL CIDX:", fl.cidx);
2447                 RL("RxPackets:", stats.pkts);
2448                 RL("RxImmPkts:", stats.imm);
2449                 RL("RxNoMem:", stats.nomem);
2450                 RL("FLAllocErr:", fl.alloc_failed);
2451                 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2452                 RL("FLMapErr:", fl.mapping_err);
2453                 RL("FLLow:", fl.low);
2454                 RL("FLStarving:", fl.starving);
2455
2456         } else if (rdma_idx < rdma_entries) {
2457                 const struct sge_ofld_rxq *rx =
2458                                 &adap->sge.rdmarxq[rdma_idx * 4];
2459                 int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
2460
2461                 S("QType:", "RDMA-CPL");
2462                 S("Interface:",
2463                   rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2464                 R("RspQ ID:", rspq.abs_id);
2465                 R("RspQ size:", rspq.size);
2466                 R("RspQE size:", rspq.iqe_len);
2467                 R("RspQ CIDX:", rspq.cidx);
2468                 R("RspQ Gen:", rspq.gen);
2469                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2470                 S3("u", "Intr pktcnt:",
2471                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2472                 R("FL ID:", fl.cntxt_id);
2473                 R("FL size:", fl.size - 8);
2474                 R("FL pend:", fl.pend_cred);
2475                 R("FL avail:", fl.avail);
2476                 R("FL PIDX:", fl.pidx);
2477                 R("FL CIDX:", fl.cidx);
2478                 RL("RxPackets:", stats.pkts);
2479                 RL("RxImmPkts:", stats.imm);
2480                 RL("RxNoMem:", stats.nomem);
2481                 RL("FLAllocErr:", fl.alloc_failed);
2482                 RL("FLLrgAlcErr:", fl.large_alloc_failed);
2483                 RL("FLMapErr:", fl.mapping_err);
2484                 RL("FLLow:", fl.low);
2485                 RL("FLStarving:", fl.starving);
2486
2487         } else if (ciq_idx < ciq_entries) {
2488                 const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
2489                 int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
2490
2491                 S("QType:", "RDMA-CIQ");
2492                 S("Interface:",
2493                   rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
2494                 R("RspQ ID:", rspq.abs_id);
2495                 R("RspQ size:", rspq.size);
2496                 R("RspQE size:", rspq.iqe_len);
2497                 R("RspQ CIDX:", rspq.cidx);
2498                 R("RspQ Gen:", rspq.gen);
2499                 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
2500                 S3("u", "Intr pktcnt:",
2501                    adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
2502                 RL("RxAN:", stats.an);
2503                 RL("RxNoMem:", stats.nomem);
2504
2505         } else if (ctrl_idx < ctrl_entries) {
2506                 const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
2507                 int n = min(4, adap->params.nports - 4 * ctrl_idx);
2508
2509                 S("QType:", "Control");
2510                 T("TxQ ID:", q.cntxt_id);
2511                 T("TxQ size:", q.size);
2512                 T("TxQ inuse:", q.in_use);
2513                 T("TxQ CIDX:", q.cidx);
2514                 T("TxQ PIDX:", q.pidx);
2515                 TL("TxQFull:", q.stops);
2516                 TL("TxQRestarts:", q.restarts);
2517         } else if (fq_idx == 0) {
2518                 const struct sge_rspq *evtq = &adap->sge.fw_evtq;
2519
2520                 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
2521                 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
2522                 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
2523                 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
2524                 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
2525                 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
2526                 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
2527                            qtimer_val(adap, evtq));
2528                 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
2529                            adap->sge.counter_val[evtq->pktcnt_idx]);
2530         }
2531 #undef R
2532 #undef RL
2533 #undef T
2534 #undef TL
2535 #undef S
2536 #undef R3
2537 #undef T3
2538 #undef S3
2539         return 0;
2540 }
2541
2542 static int sge_queue_entries(const struct adapter *adap)
2543 {
2544         return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
2545                DIV_ROUND_UP(adap->sge.iscsiqsets, 4) +
2546                DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
2547                DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
2548                DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
2549 }
2550
2551 static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
2552 {
2553         int entries = sge_queue_entries(seq->private);
2554
2555         return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
2556 }
2557
2558 static void sge_queue_stop(struct seq_file *seq, void *v)
2559 {
2560 }
2561
2562 static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
2563 {
2564         int entries = sge_queue_entries(seq->private);
2565
2566         ++*pos;
2567         return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
2568 }
2569
2570 static const struct seq_operations sge_qinfo_seq_ops = {
2571         .start = sge_queue_start,
2572         .next  = sge_queue_next,
2573         .stop  = sge_queue_stop,
2574         .show  = sge_qinfo_show
2575 };
2576
2577 static int sge_qinfo_open(struct inode *inode, struct file *file)
2578 {
2579         int res = seq_open(file, &sge_qinfo_seq_ops);
2580
2581         if (!res) {
2582                 struct seq_file *seq = file->private_data;
2583
2584                 seq->private = inode->i_private;
2585         }
2586         return res;
2587 }
2588
2589 static const struct file_operations sge_qinfo_debugfs_fops = {
2590         .owner   = THIS_MODULE,
2591         .open    = sge_qinfo_open,
2592         .read    = seq_read,
2593         .llseek  = seq_lseek,
2594         .release = seq_release,
2595 };
2596
2597 int mem_open(struct inode *inode, struct file *file)
2598 {
2599         unsigned int mem;
2600         struct adapter *adap;
2601
2602         file->private_data = inode->i_private;
2603
2604         mem = (uintptr_t)file->private_data & 0x3;
2605         adap = file->private_data - mem;
2606
2607         (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
2608
2609         return 0;
2610 }
2611
2612 static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
2613                         loff_t *ppos)
2614 {
2615         loff_t pos = *ppos;
2616         loff_t avail = file_inode(file)->i_size;
2617         unsigned int mem = (uintptr_t)file->private_data & 3;
2618         struct adapter *adap = file->private_data - mem;
2619         __be32 *data;
2620         int ret;
2621
2622         if (pos < 0)
2623                 return -EINVAL;
2624         if (pos >= avail)
2625                 return 0;
2626         if (count > avail - pos)
2627                 count = avail - pos;
2628
2629         data = t4_alloc_mem(count);
2630         if (!data)
2631                 return -ENOMEM;
2632
2633         spin_lock(&adap->win0_lock);
2634         ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
2635         spin_unlock(&adap->win0_lock);
2636         if (ret) {
2637                 t4_free_mem(data);
2638                 return ret;
2639         }
2640         ret = copy_to_user(buf, data, count);
2641
2642         t4_free_mem(data);
2643         if (ret)
2644                 return -EFAULT;
2645
2646         *ppos = pos + count;
2647         return count;
2648 }
2649 static const struct file_operations mem_debugfs_fops = {
2650         .owner   = THIS_MODULE,
2651         .open    = simple_open,
2652         .read    = mem_read,
2653         .llseek  = default_llseek,
2654 };
2655
2656 static int tid_info_show(struct seq_file *seq, void *v)
2657 {
2658         struct adapter *adap = seq->private;
2659         const struct tid_info *t = &adap->tids;
2660         enum chip_type chip = CHELSIO_CHIP_VERSION(adap->params.chip);
2661
2662         if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) {
2663                 unsigned int sb;
2664
2665                 if (chip <= CHELSIO_T5)
2666                         sb = t4_read_reg(adap, LE_DB_SERVER_INDEX_A) / 4;
2667                 else
2668                         sb = t4_read_reg(adap, LE_DB_SRVR_START_INDEX_A);
2669
2670                 if (sb) {
2671                         seq_printf(seq, "TID range: 0..%u/%u..%u", sb - 1,
2672                                    adap->tids.hash_base,
2673                                    t->ntids - 1);
2674                         seq_printf(seq, ", in use: %u/%u\n",
2675                                    atomic_read(&t->tids_in_use),
2676                                    atomic_read(&t->hash_tids_in_use));
2677                 } else if (adap->flags & FW_OFLD_CONN) {
2678                         seq_printf(seq, "TID range: %u..%u/%u..%u",
2679                                    t->aftid_base,
2680                                    t->aftid_end,
2681                                    adap->tids.hash_base,
2682                                    t->ntids - 1);
2683                         seq_printf(seq, ", in use: %u/%u\n",
2684                                    atomic_read(&t->tids_in_use),
2685                                    atomic_read(&t->hash_tids_in_use));
2686                 } else {
2687                         seq_printf(seq, "TID range: %u..%u",
2688                                    adap->tids.hash_base,
2689                                    t->ntids - 1);
2690                         seq_printf(seq, ", in use: %u\n",
2691                                    atomic_read(&t->hash_tids_in_use));
2692                 }
2693         } else if (t->ntids) {
2694                 seq_printf(seq, "TID range: 0..%u", t->ntids - 1);
2695                 seq_printf(seq, ", in use: %u\n",
2696                            atomic_read(&t->tids_in_use));
2697         }
2698
2699         if (t->nstids)
2700                 seq_printf(seq, "STID range: %u..%u, in use: %u\n",
2701                            (!t->stid_base &&
2702                            (chip <= CHELSIO_T5)) ?
2703                            t->stid_base + 1 : t->stid_base,
2704                            t->stid_base + t->nstids - 1, t->stids_in_use);
2705         if (t->natids)
2706                 seq_printf(seq, "ATID range: 0..%u, in use: %u\n",
2707                            t->natids - 1, t->atids_in_use);
2708         seq_printf(seq, "FTID range: %u..%u\n", t->ftid_base,
2709                    t->ftid_base + t->nftids - 1);
2710         if (t->nsftids)
2711                 seq_printf(seq, "SFTID range: %u..%u in use: %u\n",
2712                            t->sftid_base, t->sftid_base + t->nsftids - 2,
2713                            t->sftids_in_use);
2714         if (t->ntids)
2715                 seq_printf(seq, "HW TID usage: %u IP users, %u IPv6 users\n",
2716                            t4_read_reg(adap, LE_DB_ACT_CNT_IPV4_A),
2717                            t4_read_reg(adap, LE_DB_ACT_CNT_IPV6_A));
2718         return 0;
2719 }
2720
2721 DEFINE_SIMPLE_DEBUGFS_FILE(tid_info);
2722
2723 static void add_debugfs_mem(struct adapter *adap, const char *name,
2724                             unsigned int idx, unsigned int size_mb)
2725 {
2726         debugfs_create_file_size(name, S_IRUSR, adap->debugfs_root,
2727                                  (void *)adap + idx, &mem_debugfs_fops,
2728                                  size_mb << 20);
2729 }
2730
2731 static int blocked_fl_open(struct inode *inode, struct file *file)
2732 {
2733         file->private_data = inode->i_private;
2734         return 0;
2735 }
2736
2737 static ssize_t blocked_fl_read(struct file *filp, char __user *ubuf,
2738                                size_t count, loff_t *ppos)
2739 {
2740         int len;
2741         const struct adapter *adap = filp->private_data;
2742         char *buf;
2743         ssize_t size = (adap->sge.egr_sz + 3) / 4 +
2744                         adap->sge.egr_sz / 32 + 2; /* includes ,/\n/\0 */
2745
2746         buf = kzalloc(size, GFP_KERNEL);
2747         if (!buf)
2748                 return -ENOMEM;
2749
2750         len = snprintf(buf, size - 1, "%*pb\n",
2751                        adap->sge.egr_sz, adap->sge.blocked_fl);
2752         len += sprintf(buf + len, "\n");
2753         size = simple_read_from_buffer(ubuf, count, ppos, buf, len);
2754         t4_free_mem(buf);
2755         return size;
2756 }
2757
2758 static ssize_t blocked_fl_write(struct file *filp, const char __user *ubuf,
2759                                 size_t count, loff_t *ppos)
2760 {
2761         int err;
2762         unsigned long *t;
2763         struct adapter *adap = filp->private_data;
2764
2765         t = kcalloc(BITS_TO_LONGS(adap->sge.egr_sz), sizeof(long), GFP_KERNEL);
2766         if (!t)
2767                 return -ENOMEM;
2768
2769         err = bitmap_parse_user(ubuf, count, t, adap->sge.egr_sz);
2770         if (err)
2771                 return err;
2772
2773         bitmap_copy(adap->sge.blocked_fl, t, adap->sge.egr_sz);
2774         t4_free_mem(t);
2775         return count;
2776 }
2777
2778 static const struct file_operations blocked_fl_fops = {
2779         .owner   = THIS_MODULE,
2780         .open    = blocked_fl_open,
2781         .read    = blocked_fl_read,
2782         .write   = blocked_fl_write,
2783         .llseek  = generic_file_llseek,
2784 };
2785
2786 struct mem_desc {
2787         unsigned int base;
2788         unsigned int limit;
2789         unsigned int idx;
2790 };
2791
2792 static int mem_desc_cmp(const void *a, const void *b)
2793 {
2794         return ((const struct mem_desc *)a)->base -
2795                ((const struct mem_desc *)b)->base;
2796 }
2797
2798 static void mem_region_show(struct seq_file *seq, const char *name,
2799                             unsigned int from, unsigned int to)
2800 {
2801         char buf[40];
2802
2803         string_get_size((u64)to - from + 1, 1, STRING_UNITS_2, buf,
2804                         sizeof(buf));
2805         seq_printf(seq, "%-15s %#x-%#x [%s]\n", name, from, to, buf);
2806 }
2807
2808 static int meminfo_show(struct seq_file *seq, void *v)
2809 {
2810         static const char * const memory[] = { "EDC0:", "EDC1:", "MC:",
2811                                         "MC0:", "MC1:"};
2812         static const char * const region[] = {
2813                 "DBQ contexts:", "IMSG contexts:", "FLM cache:", "TCBs:",
2814                 "Pstructs:", "Timers:", "Rx FL:", "Tx FL:", "Pstruct FL:",
2815                 "Tx payload:", "Rx payload:", "LE hash:", "iSCSI region:",
2816                 "TDDP region:", "TPT region:", "STAG region:", "RQ region:",
2817                 "RQUDP region:", "PBL region:", "TXPBL region:",
2818                 "DBVFIFO region:", "ULPRX state:", "ULPTX state:",
2819                 "On-chip queues:"
2820         };
2821
2822         int i, n;
2823         u32 lo, hi, used, alloc;
2824         struct mem_desc avail[4];
2825         struct mem_desc mem[ARRAY_SIZE(region) + 3];      /* up to 3 holes */
2826         struct mem_desc *md = mem;
2827         struct adapter *adap = seq->private;
2828
2829         for (i = 0; i < ARRAY_SIZE(mem); i++) {
2830                 mem[i].limit = 0;
2831                 mem[i].idx = i;
2832         }
2833
2834         /* Find and sort the populated memory ranges */
2835         i = 0;
2836         lo = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
2837         if (lo & EDRAM0_ENABLE_F) {
2838                 hi = t4_read_reg(adap, MA_EDRAM0_BAR_A);
2839                 avail[i].base = EDRAM0_BASE_G(hi) << 20;
2840                 avail[i].limit = avail[i].base + (EDRAM0_SIZE_G(hi) << 20);
2841                 avail[i].idx = 0;
2842                 i++;
2843         }
2844         if (lo & EDRAM1_ENABLE_F) {
2845                 hi = t4_read_reg(adap, MA_EDRAM1_BAR_A);
2846                 avail[i].base = EDRAM1_BASE_G(hi) << 20;
2847                 avail[i].limit = avail[i].base + (EDRAM1_SIZE_G(hi) << 20);
2848                 avail[i].idx = 1;
2849                 i++;
2850         }
2851
2852         if (is_t5(adap->params.chip)) {
2853                 if (lo & EXT_MEM0_ENABLE_F) {
2854                         hi = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
2855                         avail[i].base = EXT_MEM0_BASE_G(hi) << 20;
2856                         avail[i].limit =
2857                                 avail[i].base + (EXT_MEM0_SIZE_G(hi) << 20);
2858                         avail[i].idx = 3;
2859                         i++;
2860                 }
2861                 if (lo & EXT_MEM1_ENABLE_F) {
2862                         hi = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
2863                         avail[i].base = EXT_MEM1_BASE_G(hi) << 20;
2864                         avail[i].limit =
2865                                 avail[i].base + (EXT_MEM1_SIZE_G(hi) << 20);
2866                         avail[i].idx = 4;
2867                         i++;
2868                 }
2869         } else {
2870                 if (lo & EXT_MEM_ENABLE_F) {
2871                         hi = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
2872                         avail[i].base = EXT_MEM_BASE_G(hi) << 20;
2873                         avail[i].limit =
2874                                 avail[i].base + (EXT_MEM_SIZE_G(hi) << 20);
2875                         avail[i].idx = 2;
2876                         i++;
2877                 }
2878         }
2879         if (!i)                                    /* no memory available */
2880                 return 0;
2881         sort(avail, i, sizeof(struct mem_desc), mem_desc_cmp, NULL);
2882
2883         (md++)->base = t4_read_reg(adap, SGE_DBQ_CTXT_BADDR_A);
2884         (md++)->base = t4_read_reg(adap, SGE_IMSG_CTXT_BADDR_A);
2885         (md++)->base = t4_read_reg(adap, SGE_FLM_CACHE_BADDR_A);
2886         (md++)->base = t4_read_reg(adap, TP_CMM_TCB_BASE_A);
2887         (md++)->base = t4_read_reg(adap, TP_CMM_MM_BASE_A);
2888         (md++)->base = t4_read_reg(adap, TP_CMM_TIMER_BASE_A);
2889         (md++)->base = t4_read_reg(adap, TP_CMM_MM_RX_FLST_BASE_A);
2890         (md++)->base = t4_read_reg(adap, TP_CMM_MM_TX_FLST_BASE_A);
2891         (md++)->base = t4_read_reg(adap, TP_CMM_MM_PS_FLST_BASE_A);
2892
2893         /* the next few have explicit upper bounds */
2894         md->base = t4_read_reg(adap, TP_PMM_TX_BASE_A);
2895         md->limit = md->base - 1 +
2896                     t4_read_reg(adap, TP_PMM_TX_PAGE_SIZE_A) *
2897                     PMTXMAXPAGE_G(t4_read_reg(adap, TP_PMM_TX_MAX_PAGE_A));
2898         md++;
2899
2900         md->base = t4_read_reg(adap, TP_PMM_RX_BASE_A);
2901         md->limit = md->base - 1 +
2902                     t4_read_reg(adap, TP_PMM_RX_PAGE_SIZE_A) *
2903                     PMRXMAXPAGE_G(t4_read_reg(adap, TP_PMM_RX_MAX_PAGE_A));
2904         md++;
2905
2906         if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) {
2907                 if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5) {
2908                         hi = t4_read_reg(adap, LE_DB_TID_HASHBASE_A) / 4;
2909                         md->base = t4_read_reg(adap, LE_DB_HASH_TID_BASE_A);
2910                  } else {
2911                         hi = t4_read_reg(adap, LE_DB_HASH_TID_BASE_A);
2912                         md->base = t4_read_reg(adap,
2913                                                LE_DB_HASH_TBL_BASE_ADDR_A);
2914                 }
2915                 md->limit = 0;
2916         } else {
2917                 md->base = 0;
2918                 md->idx = ARRAY_SIZE(region);  /* hide it */
2919         }
2920         md++;
2921
2922 #define ulp_region(reg) do { \
2923         md->base = t4_read_reg(adap, ULP_ ## reg ## _LLIMIT_A);\
2924         (md++)->limit = t4_read_reg(adap, ULP_ ## reg ## _ULIMIT_A); \
2925 } while (0)
2926
2927         ulp_region(RX_ISCSI);
2928         ulp_region(RX_TDDP);
2929         ulp_region(TX_TPT);
2930         ulp_region(RX_STAG);
2931         ulp_region(RX_RQ);
2932         ulp_region(RX_RQUDP);
2933         ulp_region(RX_PBL);
2934         ulp_region(TX_PBL);
2935 #undef ulp_region
2936         md->base = 0;
2937         md->idx = ARRAY_SIZE(region);
2938         if (!is_t4(adap->params.chip)) {
2939                 u32 size = 0;
2940                 u32 sge_ctrl = t4_read_reg(adap, SGE_CONTROL2_A);
2941                 u32 fifo_size = t4_read_reg(adap, SGE_DBVFIFO_SIZE_A);
2942
2943                 if (is_t5(adap->params.chip)) {
2944                         if (sge_ctrl & VFIFO_ENABLE_F)
2945                                 size = DBVFIFO_SIZE_G(fifo_size);
2946                 } else {
2947                         size = T6_DBVFIFO_SIZE_G(fifo_size);
2948                 }
2949
2950                 if (size) {
2951                         md->base = BASEADDR_G(t4_read_reg(adap,
2952                                         SGE_DBVFIFO_BADDR_A));
2953                         md->limit = md->base + (size << 2) - 1;
2954                 }
2955         }
2956
2957         md++;
2958
2959         md->base = t4_read_reg(adap, ULP_RX_CTX_BASE_A);
2960         md->limit = 0;
2961         md++;
2962         md->base = t4_read_reg(adap, ULP_TX_ERR_TABLE_BASE_A);
2963         md->limit = 0;
2964         md++;
2965
2966         md->base = adap->vres.ocq.start;
2967         if (adap->vres.ocq.size)
2968                 md->limit = md->base + adap->vres.ocq.size - 1;
2969         else
2970                 md->idx = ARRAY_SIZE(region);  /* hide it */
2971         md++;
2972
2973         /* add any address-space holes, there can be up to 3 */
2974         for (n = 0; n < i - 1; n++)
2975                 if (avail[n].limit < avail[n + 1].base)
2976                         (md++)->base = avail[n].limit;
2977         if (avail[n].limit)
2978                 (md++)->base = avail[n].limit;
2979
2980         n = md - mem;
2981         sort(mem, n, sizeof(struct mem_desc), mem_desc_cmp, NULL);
2982
2983         for (lo = 0; lo < i; lo++)
2984                 mem_region_show(seq, memory[avail[lo].idx], avail[lo].base,
2985                                 avail[lo].limit - 1);
2986
2987         seq_putc(seq, '\n');
2988         for (i = 0; i < n; i++) {
2989                 if (mem[i].idx >= ARRAY_SIZE(region))
2990                         continue;                        /* skip holes */
2991                 if (!mem[i].limit)
2992                         mem[i].limit = i < n - 1 ? mem[i + 1].base - 1 : ~0;
2993                 mem_region_show(seq, region[mem[i].idx], mem[i].base,
2994                                 mem[i].limit);
2995         }
2996
2997         seq_putc(seq, '\n');
2998         lo = t4_read_reg(adap, CIM_SDRAM_BASE_ADDR_A);
2999         hi = t4_read_reg(adap, CIM_SDRAM_ADDR_SIZE_A) + lo - 1;
3000         mem_region_show(seq, "uP RAM:", lo, hi);
3001
3002         lo = t4_read_reg(adap, CIM_EXTMEM2_BASE_ADDR_A);
3003         hi = t4_read_reg(adap, CIM_EXTMEM2_ADDR_SIZE_A) + lo - 1;
3004         mem_region_show(seq, "uP Extmem2:", lo, hi);
3005
3006         lo = t4_read_reg(adap, TP_PMM_RX_MAX_PAGE_A);
3007         seq_printf(seq, "\n%u Rx pages of size %uKiB for %u channels\n",
3008                    PMRXMAXPAGE_G(lo),
3009                    t4_read_reg(adap, TP_PMM_RX_PAGE_SIZE_A) >> 10,
3010                    (lo & PMRXNUMCHN_F) ? 2 : 1);
3011
3012         lo = t4_read_reg(adap, TP_PMM_TX_MAX_PAGE_A);
3013         hi = t4_read_reg(adap, TP_PMM_TX_PAGE_SIZE_A);
3014         seq_printf(seq, "%u Tx pages of size %u%ciB for %u channels\n",
3015                    PMTXMAXPAGE_G(lo),
3016                    hi >= (1 << 20) ? (hi >> 20) : (hi >> 10),
3017                    hi >= (1 << 20) ? 'M' : 'K', 1 << PMTXNUMCHN_G(lo));
3018         seq_printf(seq, "%u p-structs\n\n",
3019                    t4_read_reg(adap, TP_CMM_MM_MAX_PSTRUCT_A));
3020
3021         for (i = 0; i < 4; i++) {
3022                 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5)
3023                         lo = t4_read_reg(adap, MPS_RX_MAC_BG_PG_CNT0_A + i * 4);
3024                 else
3025                         lo = t4_read_reg(adap, MPS_RX_PG_RSV0_A + i * 4);
3026                 if (is_t5(adap->params.chip)) {
3027                         used = T5_USED_G(lo);
3028                         alloc = T5_ALLOC_G(lo);
3029                 } else {
3030                         used = USED_G(lo);
3031                         alloc = ALLOC_G(lo);
3032                 }
3033                 /* For T6 these are MAC buffer groups */
3034                 seq_printf(seq, "Port %d using %u pages out of %u allocated\n",
3035                            i, used, alloc);
3036         }
3037         for (i = 0; i < adap->params.arch.nchan; i++) {
3038                 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5)
3039                         lo = t4_read_reg(adap,
3040                                          MPS_RX_LPBK_BG_PG_CNT0_A + i * 4);
3041                 else
3042                         lo = t4_read_reg(adap, MPS_RX_PG_RSV4_A + i * 4);
3043                 if (is_t5(adap->params.chip)) {
3044                         used = T5_USED_G(lo);
3045                         alloc = T5_ALLOC_G(lo);
3046                 } else {
3047                         used = USED_G(lo);
3048                         alloc = ALLOC_G(lo);
3049                 }
3050                 /* For T6 these are MAC buffer groups */
3051                 seq_printf(seq,
3052                            "Loopback %d using %u pages out of %u allocated\n",
3053                            i, used, alloc);
3054         }
3055         return 0;
3056 }
3057
3058 static int meminfo_open(struct inode *inode, struct file *file)
3059 {
3060         return single_open(file, meminfo_show, inode->i_private);
3061 }
3062
3063 static const struct file_operations meminfo_fops = {
3064         .owner   = THIS_MODULE,
3065         .open    = meminfo_open,
3066         .read    = seq_read,
3067         .llseek  = seq_lseek,
3068         .release = single_release,
3069 };
3070 /* Add an array of Debug FS files.
3071  */
3072 void add_debugfs_files(struct adapter *adap,
3073                        struct t4_debugfs_entry *files,
3074                        unsigned int nfiles)
3075 {
3076         int i;
3077
3078         /* debugfs support is best effort */
3079         for (i = 0; i < nfiles; i++)
3080                 debugfs_create_file(files[i].name, files[i].mode,
3081                                     adap->debugfs_root,
3082                                     (void *)adap + files[i].data,
3083                                     files[i].ops);
3084 }
3085
3086 int t4_setup_debugfs(struct adapter *adap)
3087 {
3088         int i;
3089         u32 size = 0;
3090         struct dentry *de;
3091
3092         static struct t4_debugfs_entry t4_debugfs_files[] = {
3093                 { "cim_la", &cim_la_fops, S_IRUSR, 0 },
3094                 { "cim_pif_la", &cim_pif_la_fops, S_IRUSR, 0 },
3095                 { "cim_ma_la", &cim_ma_la_fops, S_IRUSR, 0 },
3096                 { "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
3097                 { "clk", &clk_debugfs_fops, S_IRUSR, 0 },
3098                 { "devlog", &devlog_fops, S_IRUSR, 0 },
3099                 { "mbox0", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 0 },
3100                 { "mbox1", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 1 },
3101                 { "mbox2", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 2 },
3102                 { "mbox3", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 3 },
3103                 { "mbox4", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 4 },
3104                 { "mbox5", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 5 },
3105                 { "mbox6", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 6 },
3106                 { "mbox7", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 7 },
3107                 { "trace0", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 0 },
3108                 { "trace1", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 1 },
3109                 { "trace2", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 2 },
3110                 { "trace3", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 3 },
3111                 { "l2t", &t4_l2t_fops, S_IRUSR, 0},
3112                 { "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
3113                 { "rss", &rss_debugfs_fops, S_IRUSR, 0 },
3114                 { "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 },
3115                 { "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
3116                 { "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
3117                 { "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
3118                 { "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
3119                 { "ibq_tp0",  &cim_ibq_fops, S_IRUSR, 0 },
3120                 { "ibq_tp1",  &cim_ibq_fops, S_IRUSR, 1 },
3121                 { "ibq_ulp",  &cim_ibq_fops, S_IRUSR, 2 },
3122                 { "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 },
3123                 { "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 },
3124                 { "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 },
3125                 { "obq_ulp0", &cim_obq_fops, S_IRUSR, 0 },
3126                 { "obq_ulp1", &cim_obq_fops, S_IRUSR, 1 },
3127                 { "obq_ulp2", &cim_obq_fops, S_IRUSR, 2 },
3128                 { "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
3129                 { "obq_sge",  &cim_obq_fops, S_IRUSR, 4 },
3130                 { "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
3131                 { "tp_la", &tp_la_fops, S_IRUSR, 0 },
3132                 { "ulprx_la", &ulprx_la_fops, S_IRUSR, 0 },
3133                 { "sensors", &sensors_debugfs_fops, S_IRUSR, 0 },
3134                 { "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
3135                 { "tx_rate", &tx_rate_debugfs_fops, S_IRUSR, 0 },
3136                 { "cctrl", &cctrl_tbl_debugfs_fops, S_IRUSR, 0 },
3137 #if IS_ENABLED(CONFIG_IPV6)
3138                 { "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
3139 #endif
3140                 { "tids", &tid_info_debugfs_fops, S_IRUSR, 0},
3141                 { "blocked_fl", &blocked_fl_fops, S_IRUSR | S_IWUSR, 0 },
3142                 { "meminfo", &meminfo_fops, S_IRUSR, 0 },
3143         };
3144
3145         /* Debug FS nodes common to all T5 and later adapters.
3146          */
3147         static struct t4_debugfs_entry t5_debugfs_files[] = {
3148                 { "obq_sge_rx_q0", &cim_obq_fops, S_IRUSR, 6 },
3149                 { "obq_sge_rx_q1", &cim_obq_fops, S_IRUSR, 7 },
3150         };
3151
3152         add_debugfs_files(adap,
3153                           t4_debugfs_files,
3154                           ARRAY_SIZE(t4_debugfs_files));
3155         if (!is_t4(adap->params.chip))
3156                 add_debugfs_files(adap,
3157                                   t5_debugfs_files,
3158                                   ARRAY_SIZE(t5_debugfs_files));
3159
3160         i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
3161         if (i & EDRAM0_ENABLE_F) {
3162                 size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
3163                 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
3164         }
3165         if (i & EDRAM1_ENABLE_F) {
3166                 size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
3167                 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
3168         }
3169         if (is_t5(adap->params.chip)) {
3170                 if (i & EXT_MEM0_ENABLE_F) {
3171                         size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
3172                         add_debugfs_mem(adap, "mc0", MEM_MC0,
3173                                         EXT_MEM0_SIZE_G(size));
3174                 }
3175                 if (i & EXT_MEM1_ENABLE_F) {
3176                         size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
3177                         add_debugfs_mem(adap, "mc1", MEM_MC1,
3178                                         EXT_MEM1_SIZE_G(size));
3179                 }
3180         } else {
3181                 if (i & EXT_MEM_ENABLE_F) {
3182                         size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
3183                         add_debugfs_mem(adap, "mc", MEM_MC,
3184                                         EXT_MEM_SIZE_G(size));
3185                 }
3186         }
3187
3188         de = debugfs_create_file_size("flash", S_IRUSR, adap->debugfs_root, adap,
3189                                       &flash_debugfs_fops, adap->params.sf_size);
3190         debugfs_create_bool("use_backdoor", S_IWUSR | S_IRUSR,
3191                             adap->debugfs_root, &adap->use_bd);
3192         debugfs_create_bool("trace_rss", S_IWUSR | S_IRUSR,
3193                             adap->debugfs_root, &adap->trace_rss);
3194
3195         return 0;
3196 }