drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c

   1 /*
   2  * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
   3  * driver for Linux.
   4  *
   5  * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/pci.h>
  37
  38 #include "t4vf_common.h"
  39 #include "t4vf_defs.h"
  40
  41 #include "../cxgb4/t4_regs.h"
  42 #include "../cxgb4/t4_values.h"
  43 #include "../cxgb4/t4fw_api.h"
  44
  45 /*
  46  * Wait for the device to become ready (signified by our "who am I" register
  47  * returning a value other than all 1's).  Return an error if it doesn't
  48  * become ready ...
  49  */
  50 int t4vf_wait_dev_ready(struct adapter *adapter)
  51 {
  52         const u32 whoami = T4VF_PL_BASE_ADDR + PL_VF_WHOAMI;
  53         const u32 notready1 = 0xffffffff;
  54         const u32 notready2 = 0xeeeeeeee;
  55         u32 val;
  56
  57         val = t4_read_reg(adapter, whoami);
  58         if (val != notready1 && val != notready2)
  59                 return 0;
  60         msleep(500);
  61         val = t4_read_reg(adapter, whoami);
  62         if (val != notready1 && val != notready2)
  63                 return 0;
  64         else
  65                 return -EIO;
  66 }
  67
  68 /*
  69  * Get the reply to a mailbox command and store it in @rpl in big-endian order
  70  * (since the firmware data structures are specified in a big-endian layout).
  71  */
  72 static void get_mbox_rpl(struct adapter *adapter, __be64 *rpl, int size,
  73                          u32 mbox_data)
  74 {
  75         for ( ; size; size -= 8, mbox_data += 8)
  76                 *rpl++ = cpu_to_be64(t4_read_reg64(adapter, mbox_data));
  77 }
  78
  79 /**
  80  *      t4vf_record_mbox - record a Firmware Mailbox Command/Reply in the log
  81  *      @adapter: the adapter
  82  *      @cmd: the Firmware Mailbox Command or Reply
  83  *      @size: command length in bytes
  84  *      @access: the time (ms) needed to access the Firmware Mailbox
  85  *      @execute: the time (ms) the command spent being executed
  86  */
  87 static void t4vf_record_mbox(struct adapter *adapter, const __be64 *cmd,
  88                              int size, int access, int execute)
  89 {
  90         struct mbox_cmd_log *log = adapter->mbox_log;
  91         struct mbox_cmd *entry;
  92         int i;
  93
  94         entry = mbox_cmd_log_entry(log, log->cursor++);
  95         if (log->cursor == log->size)
  96                 log->cursor = 0;
  97
  98         for (i = 0; i < size / 8; i++)
  99                 entry->cmd[i] = be64_to_cpu(cmd[i]);
 100         while (i < MBOX_LEN / 8)
 101                 entry->cmd[i++] = 0;
 102         entry->timestamp = jiffies;
 103         entry->seqno = log->seqno++;
 104         entry->access = access;
 105         entry->execute = execute;
 106 }
 107
 108 /**
 109  *      t4vf_wr_mbox_core - send a command to FW through the mailbox
 110  *      @adapter: the adapter
 111  *      @cmd: the command to write
 112  *      @size: command length in bytes
 113  *      @rpl: where to optionally store the reply
 114  *      @sleep_ok: if true we may sleep while awaiting command completion
 115  *
 116  *      Sends the given command to FW through the mailbox and waits for the
 117  *      FW to execute the command.  If @rpl is not %NULL it is used to store
 118  *      the FW's reply to the command.  The command and its optional reply
 119  *      are of the same length.  FW can take up to 500 ms to respond.
 120  *      @sleep_ok determines whether we may sleep while awaiting the response.
 121  *      If sleeping is allowed we use progressive backoff otherwise we spin.
 122  *
 123  *      The return value is 0 on success or a negative errno on failure.  A
 124  *      failure can happen either because we are not able to execute the
 125  *      command or FW executes it but signals an error.  In the latter case
 126  *      the return value is the error code indicated by FW (negated).
 127  */
 128 int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size,
 129                       void *rpl, bool sleep_ok)
 130 {
 131         static const int delay[] = {
 132                 1, 1, 3, 5, 10, 10, 20, 50, 100
 133         };
 134
 135         u16 access = 0, execute = 0;
 136         u32 v, mbox_data;
 137         int i, ms, delay_idx, ret;
 138         const __be64 *p;
 139         u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL;
 140         u32 cmd_op = FW_CMD_OP_G(be32_to_cpu(((struct fw_cmd_hdr *)cmd)->hi));
 141         __be64 cmd_rpl[MBOX_LEN / 8];
 142         struct mbox_list entry;
 143
 144         /* In T6, mailbox size is changed to 128 bytes to avoid
 145          * invalidating the entire prefetch buffer.
 146          */
 147         if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
 148                 mbox_data = T4VF_MBDATA_BASE_ADDR;
 149         else
 150                 mbox_data = T6VF_MBDATA_BASE_ADDR;
 151
 152         /*
 153          * Commands must be multiples of 16 bytes in length and may not be
 154          * larger than the size of the Mailbox Data register array.
 155          */
 156         if ((size % 16) != 0 ||
 157             size > NUM_CIM_VF_MAILBOX_DATA_INSTANCES * 4)
 158                 return -EINVAL;
 159
 160         /* Queue ourselves onto the mailbox access list.  When our entry is at
 161          * the front of the list, we have rights to access the mailbox.  So we
 162          * wait [for a while] till we're at the front [or bail out with an
 163          * EBUSY] ...
 164          */
 165         spin_lock(&adapter->mbox_lock);
 166         list_add_tail(&entry.list, &adapter->mlist.list);
 167         spin_unlock(&adapter->mbox_lock);
 168
 169         delay_idx = 0;
 170         ms = delay[0];
 171
 172         for (i = 0; ; i += ms) {
 173                 /* If we've waited too long, return a busy indication.  This
 174                  * really ought to be based on our initial position in the
 175                  * mailbox access list but this is a start.  We very rearely
 176                  * contend on access to the mailbox ...
 177                  */
 178                 if (i > FW_CMD_MAX_TIMEOUT) {
 179                         spin_lock(&adapter->mbox_lock);
 180                         list_del(&entry.list);
 181                         spin_unlock(&adapter->mbox_lock);
 182                         ret = -EBUSY;
 183                         t4vf_record_mbox(adapter, cmd, size, access, ret);
 184                         return ret;
 185                 }
 186
 187                 /* If we're at the head, break out and start the mailbox
 188                  * protocol.
 189                  */
 190                 if (list_first_entry(&adapter->mlist.list, struct mbox_list,
 191                                      list) == &entry)
 192                         break;
 193
 194                 /* Delay for a bit before checking again ... */
 195                 if (sleep_ok) {
 196                         ms = delay[delay_idx];  /* last element may repeat */
 197                         if (delay_idx < ARRAY_SIZE(delay) - 1)
 198                                 delay_idx++;
 199                         msleep(ms);
 200                 } else {
 201                         mdelay(ms);
 202                 }
 203         }
 204
 205         /*
 206          * Loop trying to get ownership of the mailbox.  Return an error
 207          * if we can't gain ownership.
 208          */
 209         v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl));
 210         for (i = 0; v == MBOX_OWNER_NONE && i < 3; i++)
 211                 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl));
 212         if (v != MBOX_OWNER_DRV) {
 213                 spin_lock(&adapter->mbox_lock);
 214                 list_del(&entry.list);
 215                 spin_unlock(&adapter->mbox_lock);
 216                 ret = (v == MBOX_OWNER_FW) ? -EBUSY : -ETIMEDOUT;
 217                 t4vf_record_mbox(adapter, cmd, size, access, ret);
 218                 return ret;
 219         }
 220
 221         /*
 222          * Write the command array into the Mailbox Data register array and
 223          * transfer ownership of the mailbox to the firmware.
 224          *
 225          * For the VFs, the Mailbox Data "registers" are actually backed by
 226          * T4's "MA" interface rather than PL Registers (as is the case for
 227          * the PFs).  Because these are in different coherency domains, the
 228          * write to the VF's PL-register-backed Mailbox Control can race in
 229          * front of the writes to the MA-backed VF Mailbox Data "registers".
 230          * So we need to do a read-back on at least one byte of the VF Mailbox
 231          * Data registers before doing the write to the VF Mailbox Control
 232          * register.
 233          */
 234         if (cmd_op != FW_VI_STATS_CMD)
 235                 t4vf_record_mbox(adapter, cmd, size, access, 0);
 236         for (i = 0, p = cmd; i < size; i += 8)
 237                 t4_write_reg64(adapter, mbox_data + i, be64_to_cpu(*p++));
 238         t4_read_reg(adapter, mbox_data);         /* flush write */
 239
 240         t4_write_reg(adapter, mbox_ctl,
 241                      MBMSGVALID_F | MBOWNER_V(MBOX_OWNER_FW));
 242         t4_read_reg(adapter, mbox_ctl);          /* flush write */
 243
 244         /*
 245          * Spin waiting for firmware to acknowledge processing our command.
 246          */
 247         delay_idx = 0;
 248         ms = delay[0];
 249
 250         for (i = 0; i < FW_CMD_MAX_TIMEOUT; i += ms) {
 251                 if (sleep_ok) {
 252                         ms = delay[delay_idx];
 253                         if (delay_idx < ARRAY_SIZE(delay) - 1)
 254                                 delay_idx++;
 255                         msleep(ms);
 256                 } else
 257                         mdelay(ms);
 258
 259                 /*
 260                  * If we're the owner, see if this is the reply we wanted.
 261                  */
 262                 v = t4_read_reg(adapter, mbox_ctl);
 263                 if (MBOWNER_G(v) == MBOX_OWNER_DRV) {
 264                         /*
 265                          * If the Message Valid bit isn't on, revoke ownership
 266                          * of the mailbox and continue waiting for our reply.
 267                          */
 268                         if ((v & MBMSGVALID_F) == 0) {
 269                                 t4_write_reg(adapter, mbox_ctl,
 270                                              MBOWNER_V(MBOX_OWNER_NONE));
 271                                 continue;
 272                         }
 273
 274                         /*
 275                          * We now have our reply.  Extract the command return
 276                          * value, copy the reply back to our caller's buffer
 277                          * (if specified) and revoke ownership of the mailbox.
 278                          * We return the (negated) firmware command return
 279                          * code (this depends on FW_SUCCESS == 0).
 280                          */
 281                         get_mbox_rpl(adapter, cmd_rpl, size, mbox_data);
 282
 283                         /* return value in low-order little-endian word */
 284                         v = be64_to_cpu(cmd_rpl[0]);
 285
 286                         if (rpl) {
 287                                 /* request bit in high-order BE word */
 288                                 WARN_ON((be32_to_cpu(*(const __be32 *)cmd)
 289                                          & FW_CMD_REQUEST_F) == 0);
 290                                 memcpy(rpl, cmd_rpl, size);
 291                                 WARN_ON((be32_to_cpu(*(__be32 *)rpl)
 292                                          & FW_CMD_REQUEST_F) != 0);
 293                         }
 294                         t4_write_reg(adapter, mbox_ctl,
 295                                      MBOWNER_V(MBOX_OWNER_NONE));
 296                         execute = i + ms;
 297                         if (cmd_op != FW_VI_STATS_CMD)
 298                                 t4vf_record_mbox(adapter, cmd_rpl, size, access,
 299                                                  execute);
 300                         spin_lock(&adapter->mbox_lock);
 301                         list_del(&entry.list);
 302                         spin_unlock(&adapter->mbox_lock);
 303                         return -FW_CMD_RETVAL_G(v);
 304                 }
 305         }
 306
 307         /* We timed out.  Return the error ... */
 308         ret = -ETIMEDOUT;
 309         t4vf_record_mbox(adapter, cmd, size, access, ret);
 310         spin_lock(&adapter->mbox_lock);
 311         list_del(&entry.list);
 312         spin_unlock(&adapter->mbox_lock);
 313         return ret;
 314 }
 315
 316 #define ADVERT_MASK (FW_PORT_CAP_SPEED_100M | FW_PORT_CAP_SPEED_1G |\
 317                      FW_PORT_CAP_SPEED_10G | FW_PORT_CAP_SPEED_40G | \
 318                      FW_PORT_CAP_SPEED_100G | FW_PORT_CAP_ANEG)
 319
 320 /**
 321  *      init_link_config - initialize a link's SW state
 322  *      @lc: structure holding the link state
 323  *      @caps: link capabilities
 324  *
 325  *      Initializes the SW state maintained for each link, including the link's
 326  *      capabilities and default speed/flow-control/autonegotiation settings.
 327  */
 328 static void init_link_config(struct link_config *lc, unsigned int caps)
 329 {
 330         lc->supported = caps;
 331         lc->requested_speed = 0;
 332         lc->speed = 0;
 333         lc->requested_fc = lc->fc = PAUSE_RX | PAUSE_TX;
 334         if (lc->supported & FW_PORT_CAP_ANEG) {
 335                 lc->advertising = lc->supported & ADVERT_MASK;
 336                 lc->autoneg = AUTONEG_ENABLE;
 337                 lc->requested_fc |= PAUSE_AUTONEG;
 338         } else {
 339                 lc->advertising = 0;
 340                 lc->autoneg = AUTONEG_DISABLE;
 341         }
 342 }
 343
 344 /**
 345  *      t4vf_port_init - initialize port hardware/software state
 346  *      @adapter: the adapter
 347  *      @pidx: the adapter port index
 348  */
 349 int t4vf_port_init(struct adapter *adapter, int pidx)
 350 {
 351         struct port_info *pi = adap2pinfo(adapter, pidx);
 352         struct fw_vi_cmd vi_cmd, vi_rpl;
 353         struct fw_port_cmd port_cmd, port_rpl;
 354         int v;
 355
 356         /*
 357          * Execute a VI Read command to get our Virtual Interface information
 358          * like MAC address, etc.
 359          */
 360         memset(&vi_cmd, 0, sizeof(vi_cmd));
 361         vi_cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) |
 362                                        FW_CMD_REQUEST_F |
 363                                        FW_CMD_READ_F);
 364         vi_cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(vi_cmd));
 365         vi_cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(pi->viid));
 366         v = t4vf_wr_mbox(adapter, &vi_cmd, sizeof(vi_cmd), &vi_rpl);
 367         if (v)
 368                 return v;
 369
 370         BUG_ON(pi->port_id != FW_VI_CMD_PORTID_G(vi_rpl.portid_pkd));
 371         pi->rss_size = FW_VI_CMD_RSSSIZE_G(be16_to_cpu(vi_rpl.rsssize_pkd));
 372         t4_os_set_hw_addr(adapter, pidx, vi_rpl.mac);
 373
 374         /*
 375          * If we don't have read access to our port information, we're done
 376          * now.  Otherwise, execute a PORT Read command to get it ...
 377          */
 378         if (!(adapter->params.vfres.r_caps & FW_CMD_CAP_PORT))
 379                 return 0;
 380
 381         memset(&port_cmd, 0, sizeof(port_cmd));
 382         port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) |
 383                                             FW_CMD_REQUEST_F |
 384                                             FW_CMD_READ_F |
 385                                             FW_PORT_CMD_PORTID_V(pi->port_id));
 386         port_cmd.action_to_len16 =
 387                 cpu_to_be32(FW_PORT_CMD_ACTION_V(FW_PORT_ACTION_GET_PORT_INFO) |
 388                             FW_LEN16(port_cmd));
 389         v = t4vf_wr_mbox(adapter, &port_cmd, sizeof(port_cmd), &port_rpl);
 390         if (v)
 391                 return v;
 392
 393         v = be32_to_cpu(port_rpl.u.info.lstatus_to_modtype);
 394         pi->mdio_addr = (v & FW_PORT_CMD_MDIOCAP_F) ?
 395                         FW_PORT_CMD_MDIOADDR_G(v) : -1;
 396         pi->port_type = FW_PORT_CMD_PTYPE_G(v);
 397         pi->mod_type = FW_PORT_MOD_TYPE_NA;
 398
 399         init_link_config(&pi->link_cfg, be16_to_cpu(port_rpl.u.info.pcap));
 400
 401         return 0;
 402 }
 403
 404 /**
 405  *      t4vf_fw_reset - issue a reset to FW
 406  *      @adapter: the adapter
 407  *
 408  *      Issues a reset command to FW.  For a Physical Function this would
 409  *      result in the Firmware resetting all of its state.  For a Virtual
 410  *      Function this just resets the state associated with the VF.
 411  */
 412 int t4vf_fw_reset(struct adapter *adapter)
 413 {
 414         struct fw_reset_cmd cmd;
 415
 416         memset(&cmd, 0, sizeof(cmd));
 417         cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RESET_CMD) |
 418                                       FW_CMD_WRITE_F);
 419         cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
 420         return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL);
 421 }
 422
 423 /**
 424  *      t4vf_query_params - query FW or device parameters
 425  *      @adapter: the adapter
 426  *      @nparams: the number of parameters
 427  *      @params: the parameter names
 428  *      @vals: the parameter values
 429  *
 430  *      Reads the values of firmware or device parameters.  Up to 7 parameters
 431  *      can be queried at once.
 432  */
 433 static int t4vf_query_params(struct adapter *adapter, unsigned int nparams,
 434                              const u32 *params, u32 *vals)
 435 {
 436         int i, ret;
 437         struct fw_params_cmd cmd, rpl;
 438         struct fw_params_param *p;
 439         size_t len16;
 440
 441         if (nparams > 7)
 442                 return -EINVAL;
 443
 444         memset(&cmd, 0, sizeof(cmd));
 445         cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) |
 446                                     FW_CMD_REQUEST_F |
 447                                     FW_CMD_READ_F);
 448         len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd,
 449                                       param[nparams].mnem), 16);
 450         cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16));
 451         for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++)
 452                 p->mnem = htonl(*params++);
 453
 454         ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl);
 455         if (ret == 0)
 456                 for (i = 0, p = &rpl.param[0]; i < nparams; i++, p++)
 457                         *vals++ = be32_to_cpu(p->val);
 458         return ret;
 459 }
 460
 461 /**
 462  *      t4vf_set_params - sets FW or device parameters
 463  *      @adapter: the adapter
 464  *      @nparams: the number of parameters
 465  *      @params: the parameter names
 466  *      @vals: the parameter values
 467  *
 468  *      Sets the values of firmware or device parameters.  Up to 7 parameters
 469  *      can be specified at once.
 470  */
 471 int t4vf_set_params(struct adapter *adapter, unsigned int nparams,
 472                     const u32 *params, const u32 *vals)
 473 {
 474         int i;
 475         struct fw_params_cmd cmd;
 476         struct fw_params_param *p;
 477         size_t len16;
 478
 479         if (nparams > 7)
 480                 return -EINVAL;
 481
 482         memset(&cmd, 0, sizeof(cmd));
 483         cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) |
 484                                     FW_CMD_REQUEST_F |
 485                                     FW_CMD_WRITE_F);
 486         len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd,
 487                                       param[nparams]), 16);
 488         cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16));
 489         for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) {
 490                 p->mnem = cpu_to_be32(*params++);
 491                 p->val = cpu_to_be32(*vals++);
 492         }
 493
 494         return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL);
 495 }
 496
 497 /**
 498  *      t4vf_fl_pkt_align - return the fl packet alignment
 499  *      @adapter: the adapter
 500  *
 501  *      T4 has a single field to specify the packing and padding boundary.
 502  *      T5 onwards has separate fields for this and hence the alignment for
 503  *      next packet offset is maximum of these two.  And T6 changes the
 504  *      Ingress Padding Boundary Shift, so it's all a mess and it's best
 505  *      if we put this in low-level Common Code ...
 506  *
 507  */
 508 int t4vf_fl_pkt_align(struct adapter *adapter)
 509 {
 510         u32 sge_control, sge_control2;
 511         unsigned int ingpadboundary, ingpackboundary, fl_align, ingpad_shift;
 512
 513         sge_control = adapter->params.sge.sge_control;
 514
 515         /* T4 uses a single control field to specify both the PCIe Padding and
 516          * Packing Boundary.  T5 introduced the ability to specify these
 517          * separately.  The actual Ingress Packet Data alignment boundary
 518          * within Packed Buffer Mode is the maximum of these two
 519          * specifications.  (Note that it makes no real practical sense to
 520          * have the Pading Boudary be larger than the Packing Boundary but you
 521          * could set the chip up that way and, in fact, legacy T4 code would
 522          * end doing this because it would initialize the Padding Boundary and
 523          * leave the Packing Boundary initialized to 0 (16 bytes).)
 524          * Padding Boundary values in T6 starts from 8B,
 525          * where as it is 32B for T4 and T5.
 526          */
 527         if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
 528                 ingpad_shift = INGPADBOUNDARY_SHIFT_X;
 529         else
 530                 ingpad_shift = T6_INGPADBOUNDARY_SHIFT_X;
 531
 532         ingpadboundary = 1 << (INGPADBOUNDARY_G(sge_control) + ingpad_shift);
 533
 534         fl_align = ingpadboundary;
 535         if (!is_t4(adapter->params.chip)) {
 536                 /* T5 has a different interpretation of one of the PCIe Packing
 537                  * Boundary values.
 538                  */
 539                 sge_control2 = adapter->params.sge.sge_control2;
 540                 ingpackboundary = INGPACKBOUNDARY_G(sge_control2);
 541                 if (ingpackboundary == INGPACKBOUNDARY_16B_X)
 542                         ingpackboundary = 16;
 543                 else
 544                         ingpackboundary = 1 << (ingpackboundary +
 545                                                 INGPACKBOUNDARY_SHIFT_X);
 546
 547                 fl_align = max(ingpadboundary, ingpackboundary);
 548         }
 549         return fl_align;
 550 }
 551
 552 /**
 553  *      t4vf_bar2_sge_qregs - return BAR2 SGE Queue register information
 554  *      @adapter: the adapter
 555  *      @qid: the Queue ID
 556  *      @qtype: the Ingress or Egress type for @qid
 557  *      @pbar2_qoffset: BAR2 Queue Offset
 558  *      @pbar2_qid: BAR2 Queue ID or 0 for Queue ID inferred SGE Queues
 559  *
 560  *      Returns the BAR2 SGE Queue Registers information associated with the
 561  *      indicated Absolute Queue ID.  These are passed back in return value
 562  *      pointers.  @qtype should be T4_BAR2_QTYPE_EGRESS for Egress Queue
 563  *      and T4_BAR2_QTYPE_INGRESS for Ingress Queues.
 564  *
 565  *      This may return an error which indicates that BAR2 SGE Queue
 566  *      registers aren't available.  If an error is not returned, then the
 567  *      following values are returned:
 568  *
 569  *        *@pbar2_qoffset: the BAR2 Offset of the @qid Registers
 570  *        *@pbar2_qid: the BAR2 SGE Queue ID or 0 of @qid
 571  *
 572  *      If the returned BAR2 Queue ID is 0, then BAR2 SGE registers which
 573  *      require the "Inferred Queue ID" ability may be used.  E.g. the
 574  *      Write Combining Doorbell Buffer. If the BAR2 Queue ID is not 0,
 575  *      then these "Inferred Queue ID" register may not be used.
 576  */
 577 int t4vf_bar2_sge_qregs(struct adapter *adapter,
 578                         unsigned int qid,
 579                         enum t4_bar2_qtype qtype,
 580                         u64 *pbar2_qoffset,
 581                         unsigned int *pbar2_qid)
 582 {
 583         unsigned int page_shift, page_size, qpp_shift, qpp_mask;
 584         u64 bar2_page_offset, bar2_qoffset;
 585         unsigned int bar2_qid, bar2_qid_offset, bar2_qinferred;
 586
 587         /* T4 doesn't support BAR2 SGE Queue registers.
 588          */
 589         if (is_t4(adapter->params.chip))
 590                 return -EINVAL;
 591
 592         /* Get our SGE Page Size parameters.
 593          */
 594         page_shift = adapter->params.sge.sge_vf_hps + 10;
 595         page_size = 1 << page_shift;
 596
 597         /* Get the right Queues per Page parameters for our Queue.
 598          */
 599         qpp_shift = (qtype == T4_BAR2_QTYPE_EGRESS
 600                      ? adapter->params.sge.sge_vf_eq_qpp
 601                      : adapter->params.sge.sge_vf_iq_qpp);
 602         qpp_mask = (1 << qpp_shift) - 1;
 603
 604         /* Calculate the basics of the BAR2 SGE Queue register area:
 605          *  o The BAR2 page the Queue registers will be in.
 606          *  o The BAR2 Queue ID.
 607          *  o The BAR2 Queue ID Offset into the BAR2 page.
 608          */
 609         bar2_page_offset = ((u64)(qid >> qpp_shift) << page_shift);
 610         bar2_qid = qid & qpp_mask;
 611         bar2_qid_offset = bar2_qid * SGE_UDB_SIZE;
 612
 613         /* If the BAR2 Queue ID Offset is less than the Page Size, then the
 614          * hardware will infer the Absolute Queue ID simply from the writes to
 615          * the BAR2 Queue ID Offset within the BAR2 Page (and we need to use a
 616          * BAR2 Queue ID of 0 for those writes).  Otherwise, we'll simply
 617          * write to the first BAR2 SGE Queue Area within the BAR2 Page with
 618          * the BAR2 Queue ID and the hardware will infer the Absolute Queue ID
 619          * from the BAR2 Page and BAR2 Queue ID.
 620          *
 621          * One important censequence of this is that some BAR2 SGE registers
 622          * have a "Queue ID" field and we can write the BAR2 SGE Queue ID
 623          * there.  But other registers synthesize the SGE Queue ID purely
 624          * from the writes to the registers -- the Write Combined Doorbell
 625          * Buffer is a good example.  These BAR2 SGE Registers are only
 626          * available for those BAR2 SGE Register areas where the SGE Absolute
 627          * Queue ID can be inferred from simple writes.
 628          */
 629         bar2_qoffset = bar2_page_offset;
 630         bar2_qinferred = (bar2_qid_offset < page_size);
 631         if (bar2_qinferred) {
 632                 bar2_qoffset += bar2_qid_offset;
 633                 bar2_qid = 0;
 634         }
 635
 636         *pbar2_qoffset = bar2_qoffset;
 637         *pbar2_qid = bar2_qid;
 638         return 0;
 639 }
 640
 641 /**
 642  *      t4vf_get_sge_params - retrieve adapter Scatter gather Engine parameters
 643  *      @adapter: the adapter
 644  *
 645  *      Retrieves various core SGE parameters in the form of hardware SGE
 646  *      register values.  The caller is responsible for decoding these as
 647  *      needed.  The SGE parameters are stored in @adapter->params.sge.
 648  */
 649 int t4vf_get_sge_params(struct adapter *adapter)
 650 {
 651         struct sge_params *sge_params = &adapter->params.sge;
 652         u32 params[7], vals[7];
 653         int v;
 654
 655         params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 656                      FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL_A));
 657         params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 658                      FW_PARAMS_PARAM_XYZ_V(SGE_HOST_PAGE_SIZE_A));
 659         params[2] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 660                      FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE0_A));
 661         params[3] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 662                      FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE1_A));
 663         params[4] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 664                      FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_0_AND_1_A));
 665         params[5] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 666                      FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_2_AND_3_A));
 667         params[6] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 668                      FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_4_AND_5_A));
 669         v = t4vf_query_params(adapter, 7, params, vals);
 670         if (v)
 671                 return v;
 672         sge_params->sge_control = vals[0];
 673         sge_params->sge_host_page_size = vals[1];
 674         sge_params->sge_fl_buffer_size[0] = vals[2];
 675         sge_params->sge_fl_buffer_size[1] = vals[3];
 676         sge_params->sge_timer_value_0_and_1 = vals[4];
 677         sge_params->sge_timer_value_2_and_3 = vals[5];
 678         sge_params->sge_timer_value_4_and_5 = vals[6];
 679
 680         /* T4 uses a single control field to specify both the PCIe Padding and
 681          * Packing Boundary.  T5 introduced the ability to specify these
 682          * separately with the Padding Boundary in SGE_CONTROL and and Packing
 683          * Boundary in SGE_CONTROL2.  So for T5 and later we need to grab
 684          * SGE_CONTROL in order to determine how ingress packet data will be
 685          * laid out in Packed Buffer Mode.  Unfortunately, older versions of
 686          * the firmware won't let us retrieve SGE_CONTROL2 so if we get a
 687          * failure grabbing it we throw an error since we can't figure out the
 688          * right value.
 689          */
 690         if (!is_t4(adapter->params.chip)) {
 691                 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 692                              FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL2_A));
 693                 v = t4vf_query_params(adapter, 1, params, vals);
 694                 if (v != FW_SUCCESS) {
 695                         dev_err(adapter->pdev_dev,
 696                                 "Unable to get SGE Control2; "
 697                                 "probably old firmware.\n");
 698                         return v;
 699                 }
 700                 sge_params->sge_control2 = vals[0];
 701         }
 702
 703         params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 704                      FW_PARAMS_PARAM_XYZ_V(SGE_INGRESS_RX_THRESHOLD_A));
 705         params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 706                      FW_PARAMS_PARAM_XYZ_V(SGE_CONM_CTRL_A));
 707         v = t4vf_query_params(adapter, 2, params, vals);
 708         if (v)
 709                 return v;
 710         sge_params->sge_ingress_rx_threshold = vals[0];
 711         sge_params->sge_congestion_control = vals[1];
 712
 713         /* For T5 and later we want to use the new BAR2 Doorbells.
 714          * Unfortunately, older firmware didn't allow the this register to be
 715          * read.
 716          */
 717         if (!is_t4(adapter->params.chip)) {
 718                 u32 whoami;
 719                 unsigned int pf, s_hps, s_qpp;
 720
 721                 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 722                              FW_PARAMS_PARAM_XYZ_V(
 723                                      SGE_EGRESS_QUEUES_PER_PAGE_VF_A));
 724                 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) |
 725                              FW_PARAMS_PARAM_XYZ_V(
 726                                      SGE_INGRESS_QUEUES_PER_PAGE_VF_A));
 727                 v = t4vf_query_params(adapter, 2, params, vals);
 728                 if (v != FW_SUCCESS) {
 729                         dev_warn(adapter->pdev_dev,
 730                                  "Unable to get VF SGE Queues/Page; "
 731                                  "probably old firmware.\n");
 732                         return v;
 733                 }
 734                 sge_params->sge_egress_queues_per_page = vals[0];
 735                 sge_params->sge_ingress_queues_per_page = vals[1];
 736
 737                 /* We need the Queues/Page for our VF.  This is based on the
 738                  * PF from which we're instantiated and is indexed in the
 739                  * register we just read. Do it once here so other code in
 740                  * the driver can just use it.
 741                  */
 742                 whoami = t4_read_reg(adapter,
 743                                      T4VF_PL_BASE_ADDR + PL_VF_WHOAMI_A);
 744                 pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ?
 745                         SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami);
 746
 747                 s_hps = (HOSTPAGESIZEPF0_S +
 748                          (HOSTPAGESIZEPF1_S - HOSTPAGESIZEPF0_S) * pf);
 749                 sge_params->sge_vf_hps =
 750                         ((sge_params->sge_host_page_size >> s_hps)
 751                          & HOSTPAGESIZEPF0_M);
 752
 753                 s_qpp = (QUEUESPERPAGEPF0_S +
 754                          (QUEUESPERPAGEPF1_S - QUEUESPERPAGEPF0_S) * pf);
 755                 sge_params->sge_vf_eq_qpp =
 756                         ((sge_params->sge_egress_queues_per_page >> s_qpp)
 757                          & QUEUESPERPAGEPF0_M);
 758                 sge_params->sge_vf_iq_qpp =
 759                         ((sge_params->sge_ingress_queues_per_page >> s_qpp)
 760                          & QUEUESPERPAGEPF0_M);
 761         }
 762
 763         return 0;
 764 }
 765
 766 /**
 767  *      t4vf_get_vpd_params - retrieve device VPD paremeters
 768  *      @adapter: the adapter
 769  *
 770  *      Retrives various device Vital Product Data parameters.  The parameters
 771  *      are stored in @adapter->params.vpd.
 772  */
 773 int t4vf_get_vpd_params(struct adapter *adapter)
 774 {
 775         struct vpd_params *vpd_params = &adapter->params.vpd;
 776         u32 params[7], vals[7];
 777         int v;
 778
 779         params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
 780                      FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CCLK));
 781         v = t4vf_query_params(adapter, 1, params, vals);
 782         if (v)
 783                 return v;
 784         vpd_params->cclk = vals[0];
 785
 786         return 0;
 787 }
 788
 789 /**
 790  *      t4vf_get_dev_params - retrieve device paremeters
 791  *      @adapter: the adapter
 792  *
 793  *      Retrives various device parameters.  The parameters are stored in
 794  *      @adapter->params.dev.
 795  */
 796 int t4vf_get_dev_params(struct adapter *adapter)
 797 {
 798         struct dev_params *dev_params = &adapter->params.dev;
 799         u32 params[7], vals[7];
 800         int v;
 801
 802         params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
 803                      FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FWREV));
 804         params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
 805                      FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_TPREV));
 806         v = t4vf_query_params(adapter, 2, params, vals);
 807         if (v)
 808                 return v;
 809         dev_params->fwrev = vals[0];
 810         dev_params->tprev = vals[1];
 811
 812         return 0;
 813 }
 814
 815 /**
 816  *      t4vf_get_rss_glb_config - retrieve adapter RSS Global Configuration
 817  *      @adapter: the adapter
 818  *
 819  *      Retrieves global RSS mode and parameters with which we have to live
 820  *      and stores them in the @adapter's RSS parameters.
 821  */
 822 int t4vf_get_rss_glb_config(struct adapter *adapter)
 823 {
 824         struct rss_params *rss = &adapter->params.rss;
 825         struct fw_rss_glb_config_cmd cmd, rpl;
 826         int v;
 827
 828         /*
 829          * Execute an RSS Global Configuration read command to retrieve
 830          * our RSS configuration.
 831          */
 832         memset(&cmd, 0, sizeof(cmd));
 833         cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RSS_GLB_CONFIG_CMD) |
 834                                       FW_CMD_REQUEST_F |
 835                                       FW_CMD_READ_F);
 836         cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
 837         v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl);
 838         if (v)
 839                 return v;
 840
 841         /*
 842          * Transate the big-endian RSS Global Configuration into our
 843          * cpu-endian format based on the RSS mode.  We also do first level
 844          * filtering at this point to weed out modes which don't support
 845          * VF Drivers ...
 846          */
 847         rss->mode = FW_RSS_GLB_CONFIG_CMD_MODE_G(
 848                         be32_to_cpu(rpl.u.manual.mode_pkd));
 849         switch (rss->mode) {
 850         case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: {
 851                 u32 word = be32_to_cpu(
 852                                 rpl.u.basicvirtual.synmapen_to_hashtoeplitz);
 853
 854                 rss->u.basicvirtual.synmapen =
 855                         ((word & FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F) != 0);
 856                 rss->u.basicvirtual.syn4tupenipv6 =
 857                         ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F) != 0);
 858                 rss->u.basicvirtual.syn2tupenipv6 =
 859                         ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F) != 0);
 860                 rss->u.basicvirtual.syn4tupenipv4 =
 861                         ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F) != 0);
 862                 rss->u.basicvirtual.syn2tupenipv4 =
 863                         ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F) != 0);
 864
 865                 rss->u.basicvirtual.ofdmapen =
 866                         ((word & FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F) != 0);
 867
 868                 rss->u.basicvirtual.tnlmapen =
 869                         ((word & FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F) != 0);
 870                 rss->u.basicvirtual.tnlalllookup =
 871                         ((word  & FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F) != 0);
 872
 873                 rss->u.basicvirtual.hashtoeplitz =
 874                         ((word & FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F) != 0);
 875
 876                 /* we need at least Tunnel Map Enable to be set */
 877                 if (!rss->u.basicvirtual.tnlmapen)
 878                         return -EINVAL;
 879                 break;
 880         }
 881
 882         default:
 883                 /* all unknown/unsupported RSS modes result in an error */
 884                 return -EINVAL;
 885         }
 886
 887         return 0;
 888 }
 889
 890 /**
 891  *      t4vf_get_vfres - retrieve VF resource limits
 892  *      @adapter: the adapter
 893  *
 894  *      Retrieves configured resource limits and capabilities for a virtual
 895  *      function.  The results are stored in @adapter->vfres.
 896  */
 897 int t4vf_get_vfres(struct adapter *adapter)
 898 {
 899         struct vf_resources *vfres = &adapter->params.vfres;
 900         struct fw_pfvf_cmd cmd, rpl;
 901         int v;
 902         u32 word;
 903
 904         /*
 905          * Execute PFVF Read command to get VF resource limits; bail out early
 906          * with error on command failure.
 907          */
 908         memset(&cmd, 0, sizeof(cmd));
 909         cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PFVF_CMD) |
 910                                     FW_CMD_REQUEST_F |
 911                                     FW_CMD_READ_F);
 912         cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
 913         v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl);
 914         if (v)
 915                 return v;
 916
 917         /*
 918          * Extract VF resource limits and return success.
 919          */
 920         word = be32_to_cpu(rpl.niqflint_niq);
 921         vfres->niqflint = FW_PFVF_CMD_NIQFLINT_G(word);
 922         vfres->niq = FW_PFVF_CMD_NIQ_G(word);
 923
 924         word = be32_to_cpu(rpl.type_to_neq);
 925         vfres->neq = FW_PFVF_CMD_NEQ_G(word);
 926         vfres->pmask = FW_PFVF_CMD_PMASK_G(word);
 927
 928         word = be32_to_cpu(rpl.tc_to_nexactf);
 929         vfres->tc = FW_PFVF_CMD_TC_G(word);
 930         vfres->nvi = FW_PFVF_CMD_NVI_G(word);
 931         vfres->nexactf = FW_PFVF_CMD_NEXACTF_G(word);
 932
 933         word = be32_to_cpu(rpl.r_caps_to_nethctrl);
 934         vfres->r_caps = FW_PFVF_CMD_R_CAPS_G(word);
 935         vfres->wx_caps = FW_PFVF_CMD_WX_CAPS_G(word);
 936         vfres->nethctrl = FW_PFVF_CMD_NETHCTRL_G(word);
 937
 938         return 0;
 939 }
 940
 941 /**
 942  *      t4vf_read_rss_vi_config - read a VI's RSS configuration
 943  *      @adapter: the adapter
 944  *      @viid: Virtual Interface ID
 945  *      @config: pointer to host-native VI RSS Configuration buffer
 946  *
 947  *      Reads the Virtual Interface's RSS configuration information and
 948  *      translates it into CPU-native format.
 949  */
 950 int t4vf_read_rss_vi_config(struct adapter *adapter, unsigned int viid,
 951                             union rss_vi_config *config)
 952 {
 953         struct fw_rss_vi_config_cmd cmd, rpl;
 954         int v;
 955
 956         memset(&cmd, 0, sizeof(cmd));
 957         cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) |
 958                                      FW_CMD_REQUEST_F |
 959                                      FW_CMD_READ_F |
 960                                      FW_RSS_VI_CONFIG_CMD_VIID(viid));
 961         cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
 962         v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl);
 963         if (v)
 964                 return v;
 965
 966         switch (adapter->params.rss.mode) {
 967         case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: {
 968                 u32 word = be32_to_cpu(rpl.u.basicvirtual.defaultq_to_udpen);
 969
 970                 config->basicvirtual.ip6fourtupen =
 971                         ((word & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) != 0);
 972                 config->basicvirtual.ip6twotupen =
 973                         ((word & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) != 0);
 974                 config->basicvirtual.ip4fourtupen =
 975                         ((word & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) != 0);
 976                 config->basicvirtual.ip4twotupen =
 977                         ((word & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) != 0);
 978                 config->basicvirtual.udpen =
 979                         ((word & FW_RSS_VI_CONFIG_CMD_UDPEN_F) != 0);
 980                 config->basicvirtual.defaultq =
 981                         FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(word);
 982                 break;
 983         }
 984
 985         default:
 986                 return -EINVAL;
 987         }
 988
 989         return 0;
 990 }
 991
 992 /**
 993  *      t4vf_write_rss_vi_config - write a VI's RSS configuration
 994  *      @adapter: the adapter
 995  *      @viid: Virtual Interface ID
 996  *      @config: pointer to host-native VI RSS Configuration buffer
 997  *
 998  *      Write the Virtual Interface's RSS configuration information
 999  *      (translating it into firmware-native format before writing).
1000  */
1001 int t4vf_write_rss_vi_config(struct adapter *adapter, unsigned int viid,
1002                              union rss_vi_config *config)
1003 {
1004         struct fw_rss_vi_config_cmd cmd, rpl;
1005
1006         memset(&cmd, 0, sizeof(cmd));
1007         cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) |
1008                                      FW_CMD_REQUEST_F |
1009                                      FW_CMD_WRITE_F |
1010                                      FW_RSS_VI_CONFIG_CMD_VIID(viid));
1011         cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
1012         switch (adapter->params.rss.mode) {
1013         case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: {
1014                 u32 word = 0;
1015
1016                 if (config->basicvirtual.ip6fourtupen)
1017                         word |= FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F;
1018                 if (config->basicvirtual.ip6twotupen)
1019                         word |= FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F;
1020                 if (config->basicvirtual.ip4fourtupen)
1021                         word |= FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F;
1022                 if (config->basicvirtual.ip4twotupen)
1023                         word |= FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F;
1024                 if (config->basicvirtual.udpen)
1025                         word |= FW_RSS_VI_CONFIG_CMD_UDPEN_F;
1026                 word |= FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V(
1027                                 config->basicvirtual.defaultq);
1028                 cmd.u.basicvirtual.defaultq_to_udpen = cpu_to_be32(word);
1029                 break;
1030         }
1031
1032         default:
1033                 return -EINVAL;
1034         }
1035
1036         return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl);
1037 }
1038
1039 /**
1040  *      t4vf_config_rss_range - configure a portion of the RSS mapping table
1041  *      @adapter: the adapter
1042  *      @viid: Virtual Interface of RSS Table Slice
1043  *      @start: starting entry in the table to write
1044  *      @n: how many table entries to write
1045  *      @rspq: values for the "Response Queue" (Ingress Queue) lookup table
1046  *      @nrspq: number of values in @rspq
1047  *
1048  *      Programs the selected part of the VI's RSS mapping table with the
1049  *      provided values.  If @nrspq < @n the supplied values are used repeatedly
1050  *      until the full table range is populated.
1051  *
1052  *      The caller must ensure the values in @rspq are in the range 0..1023.
1053  */
1054 int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid,
1055                           int start, int n, const u16 *rspq, int nrspq)
1056 {
1057         const u16 *rsp = rspq;
1058         const u16 *rsp_end = rspq+nrspq;
1059         struct fw_rss_ind_tbl_cmd cmd;
1060
1061         /*
1062          * Initialize firmware command template to write the RSS table.
1063          */
1064         memset(&cmd, 0, sizeof(cmd));
1065         cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) |
1066                                      FW_CMD_REQUEST_F |
1067                                      FW_CMD_WRITE_F |
1068                                      FW_RSS_IND_TBL_CMD_VIID_V(viid));
1069         cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
1070
1071         /*
1072          * Each firmware RSS command can accommodate up to 32 RSS Ingress
1073          * Queue Identifiers.  These Ingress Queue IDs are packed three to
1074          * a 32-bit word as 10-bit values with the upper remaining 2 bits
1075          * reserved.
1076          */
1077         while (n > 0) {
1078                 __be32 *qp = &cmd.iq0_to_iq2;
1079                 int nq = min(n, 32);
1080                 int ret;
1081
1082                 /*
1083                  * Set up the firmware RSS command header to send the next
1084                  * "nq" Ingress Queue IDs to the firmware.
1085                  */
1086                 cmd.niqid = cpu_to_be16(nq);
1087                 cmd.startidx = cpu_to_be16(start);
1088
1089                 /*
1090                  * "nq" more done for the start of the next loop.
1091                  */
1092                 start += nq;
1093                 n -= nq;
1094
1095                 /*
1096                  * While there are still Ingress Queue IDs to stuff into the
1097                  * current firmware RSS command, retrieve them from the
1098                  * Ingress Queue ID array and insert them into the command.
1099                  */
1100                 while (nq > 0) {
1101                         /*
1102                          * Grab up to the next 3 Ingress Queue IDs (wrapping
1103                          * around the Ingress Queue ID array if necessary) and
1104                          * insert them into the firmware RSS command at the
1105                          * current 3-tuple position within the commad.
1106                          */
1107                         u16 qbuf[3];
1108                         u16 *qbp = qbuf;
1109                         int nqbuf = min(3, nq);
1110
1111                         nq -= nqbuf;
1112                         qbuf[0] = qbuf[1] = qbuf[2] = 0;
1113                         while (nqbuf) {
1114                                 nqbuf--;
1115                                 *qbp++ = *rsp++;
1116                                 if (rsp >= rsp_end)
1117                                         rsp = rspq;
1118                         }
1119                         *qp++ = cpu_to_be32(FW_RSS_IND_TBL_CMD_IQ0_V(qbuf[0]) |
1120                                             FW_RSS_IND_TBL_CMD_IQ1_V(qbuf[1]) |
1121                                             FW_RSS_IND_TBL_CMD_IQ2_V(qbuf[2]));
1122                 }
1123
1124                 /*
1125                  * Send this portion of the RRS table update to the firmware;
1126                  * bail out on any errors.
1127                  */
1128                 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL);
1129                 if (ret)
1130                         return ret;
1131         }
1132         return 0;
1133 }
1134
1135 /**
1136  *      t4vf_alloc_vi - allocate a virtual interface on a port
1137  *      @adapter: the adapter
1138  *      @port_id: physical port associated with the VI
1139  *
1140  *      Allocate a new Virtual Interface and bind it to the indicated
1141  *      physical port.  Return the new Virtual Interface Identifier on
1142  *      success, or a [negative] error number on failure.
1143  */
1144 int t4vf_alloc_vi(struct adapter *adapter, int port_id)
1145 {
1146         struct fw_vi_cmd cmd, rpl;
1147         int v;
1148
1149         /*
1150          * Execute a VI command to allocate Virtual Interface and return its
1151          * VIID.
1152          */
1153         memset(&cmd, 0, sizeof(cmd));
1154         cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) |
1155                                     FW_CMD_REQUEST_F |
1156                                     FW_CMD_WRITE_F |
1157                                     FW_CMD_EXEC_F);
1158         cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) |
1159                                          FW_VI_CMD_ALLOC_F);
1160         cmd.portid_pkd = FW_VI_CMD_PORTID_V(port_id);
1161         v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl);
1162         if (v)
1163                 return v;
1164
1165         return FW_VI_CMD_VIID_G(be16_to_cpu(rpl.type_viid));
1166 }
1167
1168 /**
1169  *      t4vf_free_vi -- free a virtual interface
1170  *      @adapter: the adapter
1171  *      @viid: the virtual interface identifier
1172  *
1173  *      Free a previously allocated Virtual Interface.  Return an error on
1174  *      failure.
1175  */
1176 int t4vf_free_vi(struct adapter *adapter, int viid)
1177 {
1178         struct fw_vi_cmd cmd;
1179
1180         /*
1181          * Execute a VI command to free the Virtual Interface.
1182          */
1183         memset(&cmd, 0, sizeof(cmd));
1184         cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) |
1185                                     FW_CMD_REQUEST_F |
1186                                     FW_CMD_EXEC_F);
1187         cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) |
1188                                          FW_VI_CMD_FREE_F);
1189         cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(viid));
1190         return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL);
1191 }
1192
1193 /**
1194  *      t4vf_enable_vi - enable/disable a virtual interface
1195  *      @adapter: the adapter
1196  *      @viid: the Virtual Interface ID
1197  *      @rx_en: 1=enable Rx, 0=disable Rx
1198  *      @tx_en: 1=enable Tx, 0=disable Tx
1199  *
1200  *      Enables/disables a virtual interface.
1201  */
1202 int t4vf_enable_vi(struct adapter *adapter, unsigned int viid,
1203                    bool rx_en, bool tx_en)
1204 {
1205         struct fw_vi_enable_cmd cmd;
1206
1207         memset(&cmd, 0, sizeof(cmd));
1208         cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) |
1209                                      FW_CMD_REQUEST_F |
1210                                      FW_CMD_EXEC_F |
1211                                      FW_VI_ENABLE_CMD_VIID_V(viid));
1212         cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN_V(rx_en) |
1213                                        FW_VI_ENABLE_CMD_EEN_V(tx_en) |
1214                                        FW_LEN16(cmd));
1215         return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL);
1216 }
1217
1218 /**
1219  *      t4vf_identify_port - identify a VI's port by blinking its LED
1220  *      @adapter: the adapter
1221  *      @viid: the Virtual Interface ID
1222  *      @nblinks: how many times to blink LED at 2.5 Hz
1223  *
1224  *      Identifies a VI's port by blinking its LED.
1225  */
1226 int t4vf_identify_port(struct adapter *adapter, unsigned int viid,
1227                        unsigned int nblinks)
1228 {
1229         struct fw_vi_enable_cmd cmd;
1230
1231         memset(&cmd, 0, sizeof(cmd));
1232         cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) |
1233                                      FW_CMD_REQUEST_F |
1234                                      FW_CMD_EXEC_F |
1235                                      FW_VI_ENABLE_CMD_VIID_V(viid));
1236         cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_LED_F |
1237                                        FW_LEN16(cmd));
1238         cmd.blinkdur = cpu_to_be16(nblinks);
1239         return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL);
1240 }
1241
1242 /**
1243  *      t4vf_set_rxmode - set Rx properties of a virtual interface
1244  *      @adapter: the adapter
1245  *      @viid: the VI id
1246  *      @mtu: the new MTU or -1 for no change
1247  *      @promisc: 1 to enable promiscuous mode, 0 to disable it, -1 no change
1248  *      @all_multi: 1 to enable all-multi mode, 0 to disable it, -1 no change
1249  *      @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change
1250  *      @vlanex: 1 to enable hardware VLAN Tag extraction, 0 to disable it,
1251  *              -1 no change
1252  *
1253  *      Sets Rx properties of a virtual interface.
1254  */
1255 int t4vf_set_rxmode(struct adapter *adapter, unsigned int viid,
1256                     int mtu, int promisc, int all_multi, int bcast, int vlanex,
1257                     bool sleep_ok)
1258 {
1259         struct fw_vi_rxmode_cmd cmd;
1260
1261         /* convert to FW values */
1262         if (mtu < 0)
1263                 mtu = FW_VI_RXMODE_CMD_MTU_M;
1264         if (promisc < 0)
1265                 promisc = FW_VI_RXMODE_CMD_PROMISCEN_M;
1266         if (all_multi < 0)
1267                 all_multi = FW_VI_RXMODE_CMD_ALLMULTIEN_M;
1268         if (bcast < 0)
1269                 bcast = FW_VI_RXMODE_CMD_BROADCASTEN_M;
1270         if (vlanex < 0)
1271                 vlanex = FW_VI_RXMODE_CMD_VLANEXEN_M;
1272
1273         memset(&cmd, 0, sizeof(cmd));
1274         cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_RXMODE_CMD) |
1275                                      FW_CMD_REQUEST_F |
1276                                      FW_CMD_WRITE_F |
1277                                      FW_VI_RXMODE_CMD_VIID_V(viid));
1278         cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
1279         cmd.mtu_to_vlanexen =
1280                 cpu_to_be32(FW_VI_RXMODE_CMD_MTU_V(mtu) |
1281                             FW_VI_RXMODE_CMD_PROMISCEN_V(promisc) |
1282                             FW_VI_RXMODE_CMD_ALLMULTIEN_V(all_multi) |
1283                             FW_VI_RXMODE_CMD_BROADCASTEN_V(bcast) |
1284                             FW_VI_RXMODE_CMD_VLANEXEN_V(vlanex));
1285         return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok);
1286 }
1287
1288 /**
1289  *      t4vf_alloc_mac_filt - allocates exact-match filters for MAC addresses
1290  *      @adapter: the adapter
1291  *      @viid: the Virtual Interface Identifier
1292  *      @free: if true any existing filters for this VI id are first removed
1293  *      @naddr: the number of MAC addresses to allocate filters for (up to 7)
1294  *      @addr: the MAC address(es)
1295  *      @idx: where to store the index of each allocated filter
1296  *      @hash: pointer to hash address filter bitmap
1297  *      @sleep_ok: call is allowed to sleep
1298  *
1299  *      Allocates an exact-match filter for each of the supplied addresses and
1300  *      sets it to the corresponding address.  If @idx is not %NULL it should
1301  *      have at least @naddr entries, each of which will be set to the index of
1302  *      the filter allocated for the corresponding MAC address.  If a filter
1303  *      could not be allocated for an address its index is set to 0xffff.
1304  *      If @hash is not %NULL addresses that fail to allocate an exact filter
1305  *      are hashed and update the hash filter bitmap pointed at by @hash.
1306  *
1307  *      Returns a negative error number or the number of filters allocated.
1308  */
1309 int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free,
1310                         unsigned int naddr, const u8 **addr, u16 *idx,
1311                         u64 *hash, bool sleep_ok)
1312 {
1313         int offset, ret = 0;
1314         unsigned nfilters = 0;
1315         unsigned int rem = naddr;
1316         struct fw_vi_mac_cmd cmd, rpl;
1317         unsigned int max_naddr = adapter->params.arch.mps_tcam_size;
1318
1319         if (naddr > max_naddr)
1320                 return -EINVAL;
1321
1322         for (offset = 0; offset < naddr; /**/) {
1323                 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact)
1324                                          ? rem
1325                                          : ARRAY_SIZE(cmd.u.exact));
1326                 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd,
1327                                                      u.exact[fw_naddr]), 16);
1328                 struct fw_vi_mac_exact *p;
1329                 int i;
1330
1331                 memset(&cmd, 0, sizeof(cmd));
1332                 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) |
1333                                              FW_CMD_REQUEST_F |
1334                                              FW_CMD_WRITE_F |
1335                                              (free ? FW_CMD_EXEC_F : 0) |
1336                                              FW_VI_MAC_CMD_VIID_V(viid));
1337                 cmd.freemacs_to_len16 =
1338                         cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(free) |
1339                                     FW_CMD_LEN16_V(len16));
1340
1341                 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) {
1342                         p->valid_to_idx = cpu_to_be16(
1343                                 FW_VI_MAC_CMD_VALID_F |
1344                                 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_ADD_MAC));
1345                         memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr));
1346                 }
1347
1348
1349                 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &rpl,
1350                                         sleep_ok);
1351                 if (ret && ret != -ENOMEM)
1352                         break;
1353
1354                 for (i = 0, p = rpl.u.exact; i < fw_naddr; i++, p++) {
1355                         u16 index = FW_VI_MAC_CMD_IDX_G(
1356                                 be16_to_cpu(p->valid_to_idx));
1357
1358                         if (idx)
1359                                 idx[offset+i] =
1360                                         (index >= max_naddr
1361                                          ? 0xffff
1362                                          : index);
1363                         if (index < max_naddr)
1364                                 nfilters++;
1365                         else if (hash)
1366                                 *hash |= (1ULL << hash_mac_addr(addr[offset+i]));
1367                 }
1368
1369                 free = false;
1370                 offset += fw_naddr;
1371                 rem -= fw_naddr;
1372         }
1373
1374         /*
1375          * If there were no errors or we merely ran out of room in our MAC
1376          * address arena, return the number of filters actually written.
1377          */
1378         if (ret == 0 || ret == -ENOMEM)
1379                 ret = nfilters;
1380         return ret;
1381 }
1382
1383 /**
1384  *      t4vf_free_mac_filt - frees exact-match filters of given MAC addresses
1385  *      @adapter: the adapter
1386  *      @viid: the VI id
1387  *      @naddr: the number of MAC addresses to allocate filters for (up to 7)
1388  *      @addr: the MAC address(es)
1389  *      @sleep_ok: call is allowed to sleep
1390  *
1391  *      Frees the exact-match filter for each of the supplied addresses
1392  *
1393  *      Returns a negative error number or the number of filters freed.
1394  */
1395 int t4vf_free_mac_filt(struct adapter *adapter, unsigned int viid,
1396                        unsigned int naddr, const u8 **addr, bool sleep_ok)
1397 {
1398         int offset, ret = 0;
1399         struct fw_vi_mac_cmd cmd;
1400         unsigned int nfilters = 0;
1401         unsigned int max_naddr = adapter->params.arch.mps_tcam_size;
1402         unsigned int rem = naddr;
1403
1404         if (naddr > max_naddr)
1405                 return -EINVAL;
1406
1407         for (offset = 0; offset < (int)naddr ; /**/) {
1408                 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) ?
1409                                          rem : ARRAY_SIZE(cmd.u.exact));
1410                 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd,
1411                                                      u.exact[fw_naddr]), 16);
1412                 struct fw_vi_mac_exact *p;
1413                 int i;
1414
1415                 memset(&cmd, 0, sizeof(cmd));
1416                 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) |
1417                                      FW_CMD_REQUEST_F |
1418                                      FW_CMD_WRITE_F |
1419                                      FW_CMD_EXEC_V(0) |
1420                                      FW_VI_MAC_CMD_VIID_V(viid));
1421                 cmd.freemacs_to_len16 =
1422                                 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(0) |
1423                                             FW_CMD_LEN16_V(len16));
1424
1425                 for (i = 0, p = cmd.u.exact; i < (int)fw_naddr; i++, p++) {
1426                         p->valid_to_idx = cpu_to_be16(
1427                                 FW_VI_MAC_CMD_VALID_F |
1428                                 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_MAC_BASED_FREE));
1429                         memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr));
1430                 }
1431
1432                 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &cmd,
1433                                         sleep_ok);
1434                 if (ret)
1435                         break;
1436
1437                 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) {
1438                         u16 index = FW_VI_MAC_CMD_IDX_G(
1439                                                 be16_to_cpu(p->valid_to_idx));
1440
1441                         if (index < max_naddr)
1442                                 nfilters++;
1443                 }
1444
1445                 offset += fw_naddr;
1446                 rem -= fw_naddr;
1447         }
1448
1449         if (ret == 0)
1450                 ret = nfilters;
1451         return ret;
1452 }
1453
1454 /**
1455  *      t4vf_change_mac - modifies the exact-match filter for a MAC address
1456  *      @adapter: the adapter
1457  *      @viid: the Virtual Interface ID
1458  *      @idx: index of existing filter for old value of MAC address, or -1
1459  *      @addr: the new MAC address value
1460  *      @persist: if idx < 0, the new MAC allocation should be persistent
1461  *
1462  *      Modifies an exact-match filter and sets it to the new MAC address.
1463  *      Note that in general it is not possible to modify the value of a given
1464  *      filter so the generic way to modify an address filter is to free the
1465  *      one being used by the old address value and allocate a new filter for
1466  *      the new address value.  @idx can be -1 if the address is a new
1467  *      addition.
1468  *
1469  *      Returns a negative error number or the index of the filter with the new
1470  *      MAC value.
1471  */
1472 int t4vf_change_mac(struct adapter *adapter, unsigned int viid,
1473                     int idx, const u8 *addr, bool persist)
1474 {
1475         int ret;
1476         struct fw_vi_mac_cmd cmd, rpl;
1477         struct fw_vi_mac_exact *p = &cmd.u.exact[0];
1478         size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd,
1479                                              u.exact[1]), 16);
1480         unsigned int max_mac_addr = adapter->params.arch.mps_tcam_size;
1481
1482         /*
1483          * If this is a new allocation, determine whether it should be
1484          * persistent (across a "freemacs" operation) or not.
1485          */
1486         if (idx < 0)
1487                 idx = persist ? FW_VI_MAC_ADD_PERSIST_MAC : FW_VI_MAC_ADD_MAC;
1488
1489         memset(&cmd, 0, sizeof(cmd));
1490         cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) |
1491                                      FW_CMD_REQUEST_F |
1492                                      FW_CMD_WRITE_F |
1493                                      FW_VI_MAC_CMD_VIID_V(viid));
1494         cmd.freemacs_to_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16));
1495         p->valid_to_idx = cpu_to_be16(FW_VI_MAC_CMD_VALID_F |
1496                                       FW_VI_MAC_CMD_IDX_V(idx));
1497         memcpy(p->macaddr, addr, sizeof(p->macaddr));
1498
1499         ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl);
1500         if (ret == 0) {
1501                 p = &rpl.u.exact[0];
1502                 ret = FW_VI_MAC_CMD_IDX_G(be16_to_cpu(p->valid_to_idx));
1503                 if (ret >= max_mac_addr)
1504                         ret = -ENOMEM;
1505         }
1506         return ret;
1507 }
1508
1509 /**
1510  *      t4vf_set_addr_hash - program the MAC inexact-match hash filter
1511  *      @adapter: the adapter
1512  *      @viid: the Virtual Interface Identifier
1513  *      @ucast: whether the hash filter should also match unicast addresses
1514  *      @vec: the value to be written to the hash filter
1515  *      @sleep_ok: call is allowed to sleep
1516  *
1517  *      Sets the 64-bit inexact-match hash filter for a virtual interface.
1518  */
1519 int t4vf_set_addr_hash(struct adapter *adapter, unsigned int viid,
1520                        bool ucast, u64 vec, bool sleep_ok)
1521 {
1522         struct fw_vi_mac_cmd cmd;
1523         size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd,
1524                                              u.exact[0]), 16);
1525
1526         memset(&cmd, 0, sizeof(cmd));
1527         cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) |
1528                                      FW_CMD_REQUEST_F |
1529                                      FW_CMD_WRITE_F |
1530                                      FW_VI_ENABLE_CMD_VIID_V(viid));
1531         cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_HASHVECEN_F |
1532                                             FW_VI_MAC_CMD_HASHUNIEN_V(ucast) |
1533                                             FW_CMD_LEN16_V(len16));
1534         cmd.u.hash.hashvec = cpu_to_be64(vec);
1535         return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok);
1536 }
1537
1538 /**
1539  *      t4vf_get_port_stats - collect "port" statistics
1540  *      @adapter: the adapter
1541  *      @pidx: the port index
1542  *      @s: the stats structure to fill
1543  *
1544  *      Collect statistics for the "port"'s Virtual Interface.
1545  */
1546 int t4vf_get_port_stats(struct adapter *adapter, int pidx,
1547                         struct t4vf_port_stats *s)
1548 {
1549         struct port_info *pi = adap2pinfo(adapter, pidx);
1550         struct fw_vi_stats_vf fwstats;
1551         unsigned int rem = VI_VF_NUM_STATS;
1552         __be64 *fwsp = (__be64 *)&fwstats;
1553
1554         /*
1555          * Grab the Virtual Interface statistics a chunk at a time via mailbox
1556          * commands.  We could use a Work Request and get all of them at once
1557          * but that's an asynchronous interface which is awkward to use.
1558          */
1559         while (rem) {
1560                 unsigned int ix = VI_VF_NUM_STATS - rem;
1561                 unsigned int nstats = min(6U, rem);
1562                 struct fw_vi_stats_cmd cmd, rpl;
1563                 size_t len = (offsetof(struct fw_vi_stats_cmd, u) +
1564                               sizeof(struct fw_vi_stats_ctl));
1565                 size_t len16 = DIV_ROUND_UP(len, 16);
1566                 int ret;
1567
1568                 memset(&cmd, 0, sizeof(cmd));
1569                 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_STATS_CMD) |
1570                                              FW_VI_STATS_CMD_VIID_V(pi->viid) |
1571                                              FW_CMD_REQUEST_F |
1572                                              FW_CMD_READ_F);
1573                 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16));
1574                 cmd.u.ctl.nstats_ix =
1575                         cpu_to_be16(FW_VI_STATS_CMD_IX_V(ix) |
1576                                     FW_VI_STATS_CMD_NSTATS_V(nstats));
1577                 ret = t4vf_wr_mbox_ns(adapter, &cmd, len, &rpl);
1578                 if (ret)
1579                         return ret;
1580
1581                 memcpy(fwsp, &rpl.u.ctl.stat0, sizeof(__be64) * nstats);
1582
1583                 rem -= nstats;
1584                 fwsp += nstats;
1585         }
1586
1587         /*
1588          * Translate firmware statistics into host native statistics.
1589          */
1590         s->tx_bcast_bytes = be64_to_cpu(fwstats.tx_bcast_bytes);
1591         s->tx_bcast_frames = be64_to_cpu(fwstats.tx_bcast_frames);
1592         s->tx_mcast_bytes = be64_to_cpu(fwstats.tx_mcast_bytes);
1593         s->tx_mcast_frames = be64_to_cpu(fwstats.tx_mcast_frames);
1594         s->tx_ucast_bytes = be64_to_cpu(fwstats.tx_ucast_bytes);
1595         s->tx_ucast_frames = be64_to_cpu(fwstats.tx_ucast_frames);
1596         s->tx_drop_frames = be64_to_cpu(fwstats.tx_drop_frames);
1597         s->tx_offload_bytes = be64_to_cpu(fwstats.tx_offload_bytes);
1598         s->tx_offload_frames = be64_to_cpu(fwstats.tx_offload_frames);
1599
1600         s->rx_bcast_bytes = be64_to_cpu(fwstats.rx_bcast_bytes);
1601         s->rx_bcast_frames = be64_to_cpu(fwstats.rx_bcast_frames);
1602         s->rx_mcast_bytes = be64_to_cpu(fwstats.rx_mcast_bytes);
1603         s->rx_mcast_frames = be64_to_cpu(fwstats.rx_mcast_frames);
1604         s->rx_ucast_bytes = be64_to_cpu(fwstats.rx_ucast_bytes);
1605         s->rx_ucast_frames = be64_to_cpu(fwstats.rx_ucast_frames);
1606
1607         s->rx_err_frames = be64_to_cpu(fwstats.rx_err_frames);
1608
1609         return 0;
1610 }
1611
1612 /**
1613  *      t4vf_iq_free - free an ingress queue and its free lists
1614  *      @adapter: the adapter
1615  *      @iqtype: the ingress queue type (FW_IQ_TYPE_FL_INT_CAP, etc.)
1616  *      @iqid: ingress queue ID
1617  *      @fl0id: FL0 queue ID or 0xffff if no attached FL0
1618  *      @fl1id: FL1 queue ID or 0xffff if no attached FL1
1619  *
1620  *      Frees an ingress queue and its associated free lists, if any.
1621  */
1622 int t4vf_iq_free(struct adapter *adapter, unsigned int iqtype,
1623                  unsigned int iqid, unsigned int fl0id, unsigned int fl1id)
1624 {
1625         struct fw_iq_cmd cmd;
1626
1627         memset(&cmd, 0, sizeof(cmd));
1628         cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_IQ_CMD) |
1629                                     FW_CMD_REQUEST_F |
1630                                     FW_CMD_EXEC_F);
1631         cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_FREE_F |
1632                                          FW_LEN16(cmd));
1633         cmd.type_to_iqandstindex =
1634                 cpu_to_be32(FW_IQ_CMD_TYPE_V(iqtype));
1635
1636         cmd.iqid = cpu_to_be16(iqid);
1637         cmd.fl0id = cpu_to_be16(fl0id);
1638         cmd.fl1id = cpu_to_be16(fl1id);
1639         return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL);
1640 }
1641
1642 /**
1643  *      t4vf_eth_eq_free - free an Ethernet egress queue
1644  *      @adapter: the adapter
1645  *      @eqid: egress queue ID
1646  *
1647  *      Frees an Ethernet egress queue.
1648  */
1649 int t4vf_eth_eq_free(struct adapter *adapter, unsigned int eqid)
1650 {
1651         struct fw_eq_eth_cmd cmd;
1652
1653         memset(&cmd, 0, sizeof(cmd));
1654         cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_EQ_ETH_CMD) |
1655                                     FW_CMD_REQUEST_F |
1656                                     FW_CMD_EXEC_F);
1657         cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_FREE_F |
1658                                          FW_LEN16(cmd));
1659         cmd.eqid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_EQID_V(eqid));
1660         return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL);
1661 }
1662
1663 /**
1664  *      t4vf_handle_fw_rpl - process a firmware reply message
1665  *      @adapter: the adapter
1666  *      @rpl: start of the firmware message
1667  *
1668  *      Processes a firmware message, such as link state change messages.
1669  */
1670 int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl)
1671 {
1672         const struct fw_cmd_hdr *cmd_hdr = (const struct fw_cmd_hdr *)rpl;
1673         u8 opcode = FW_CMD_OP_G(be32_to_cpu(cmd_hdr->hi));
1674
1675         switch (opcode) {
1676         case FW_PORT_CMD: {
1677                 /*
1678                  * Link/module state change message.
1679                  */
1680                 const struct fw_port_cmd *port_cmd =
1681                         (const struct fw_port_cmd *)rpl;
1682                 u32 stat, mod;
1683                 int action, port_id, link_ok, speed, fc, pidx;
1684
1685                 /*
1686                  * Extract various fields from port status change message.
1687                  */
1688                 action = FW_PORT_CMD_ACTION_G(
1689                         be32_to_cpu(port_cmd->action_to_len16));
1690                 if (action != FW_PORT_ACTION_GET_PORT_INFO) {
1691                         dev_err(adapter->pdev_dev,
1692                                 "Unknown firmware PORT reply action %x\n",
1693                                 action);
1694                         break;
1695                 }
1696
1697                 port_id = FW_PORT_CMD_PORTID_G(
1698                         be32_to_cpu(port_cmd->op_to_portid));
1699
1700                 stat = be32_to_cpu(port_cmd->u.info.lstatus_to_modtype);
1701                 link_ok = (stat & FW_PORT_CMD_LSTATUS_F) != 0;
1702                 speed = 0;
1703                 fc = 0;
1704                 if (stat & FW_PORT_CMD_RXPAUSE_F)
1705                         fc |= PAUSE_RX;
1706                 if (stat & FW_PORT_CMD_TXPAUSE_F)
1707                         fc |= PAUSE_TX;
1708                 if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M))
1709                         speed = 100;
1710                 else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G))
1711                         speed = 1000;
1712                 else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G))
1713                         speed = 10000;
1714                 else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G))
1715                         speed = 40000;
1716
1717                 /*
1718                  * Scan all of our "ports" (Virtual Interfaces) looking for
1719                  * those bound to the physical port which has changed.  If
1720                  * our recorded state doesn't match the current state,
1721                  * signal that change to the OS code.
1722                  */
1723                 for_each_port(adapter, pidx) {
1724                         struct port_info *pi = adap2pinfo(adapter, pidx);
1725                         struct link_config *lc;
1726
1727                         if (pi->port_id != port_id)
1728                                 continue;
1729
1730                         lc = &pi->link_cfg;
1731
1732                         mod = FW_PORT_CMD_MODTYPE_G(stat);
1733                         if (mod != pi->mod_type) {
1734                                 pi->mod_type = mod;
1735                                 t4vf_os_portmod_changed(adapter, pidx);
1736                         }
1737
1738                         if (link_ok != lc->link_ok || speed != lc->speed ||
1739                             fc != lc->fc) {
1740                                 /* something changed */
1741                                 lc->link_ok = link_ok;
1742                                 lc->speed = speed;
1743                                 lc->fc = fc;
1744                                 lc->supported =
1745                                         be16_to_cpu(port_cmd->u.info.pcap);
1746                                 t4vf_os_link_changed(adapter, pidx, link_ok);
1747                         }
1748                 }
1749                 break;
1750         }
1751
1752         default:
1753                 dev_err(adapter->pdev_dev, "Unknown firmware reply %X\n",
1754                         opcode);
1755         }
1756         return 0;
1757 }
1758
1759 /**
1760  */
1761 int t4vf_prep_adapter(struct adapter *adapter)
1762 {
1763         int err;
1764         unsigned int chipid;
1765
1766         /* Wait for the device to become ready before proceeding ...
1767          */
1768         err = t4vf_wait_dev_ready(adapter);
1769         if (err)
1770                 return err;
1771
1772         /* Default port and clock for debugging in case we can't reach
1773          * firmware.
1774          */
1775         adapter->params.nports = 1;
1776         adapter->params.vfres.pmask = 1;
1777         adapter->params.vpd.cclk = 50000;
1778
1779         adapter->params.chip = 0;
1780         switch (CHELSIO_PCI_ID_VER(adapter->pdev->device)) {
1781         case CHELSIO_T4:
1782                 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, 0);
1783                 adapter->params.arch.sge_fl_db = DBPRIO_F;
1784                 adapter->params.arch.mps_tcam_size =
1785                                 NUM_MPS_CLS_SRAM_L_INSTANCES;
1786                 break;
1787
1788         case CHELSIO_T5:
1789                 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A));
1790                 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, chipid);
1791                 adapter->params.arch.sge_fl_db = DBPRIO_F | DBTYPE_F;
1792                 adapter->params.arch.mps_tcam_size =
1793                                 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1794                 break;
1795
1796         case CHELSIO_T6:
1797                 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A));
1798                 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T6, chipid);
1799                 adapter->params.arch.sge_fl_db = 0;
1800                 adapter->params.arch.mps_tcam_size =
1801                                 NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1802                 break;
1803         }
1804
1805         return 0;
1806 }