drivers/net/ethernet/intel/e1000e/netdev.c

   1 /*******************************************************************************
   2
   3   Intel PRO/1000 Linux driver
   4   Copyright(c) 1999 - 2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30
  31 #include <linux/module.h>
  32 #include <linux/types.h>
  33 #include <linux/init.h>
  34 #include <linux/pci.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/pagemap.h>
  37 #include <linux/delay.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/tcp.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/ethtool.h>
  46 #include <linux/if_vlan.h>
  47 #include <linux/cpu.h>
  48 #include <linux/smp.h>
  49 #include <linux/pm_qos.h>
  50 #include <linux/pm_runtime.h>
  51 #include <linux/aer.h>
  52 #include <linux/prefetch.h>
  53
  54 #include "e1000.h"
  55
  56 #define DRV_EXTRAVERSION "-k"
  57
  58 #define DRV_VERSION "2.3.2" DRV_EXTRAVERSION
  59 char e1000e_driver_name[] = "e1000e";
  60 const char e1000e_driver_version[] = DRV_VERSION;
  61
  62 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  63 static int debug = -1;
  64 module_param(debug, int, 0);
  65 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  66
  67 static const struct e1000_info *e1000_info_tbl[] = {
  68         [board_82571]           = &e1000_82571_info,
  69         [board_82572]           = &e1000_82572_info,
  70         [board_82573]           = &e1000_82573_info,
  71         [board_82574]           = &e1000_82574_info,
  72         [board_82583]           = &e1000_82583_info,
  73         [board_80003es2lan]     = &e1000_es2_info,
  74         [board_ich8lan]         = &e1000_ich8_info,
  75         [board_ich9lan]         = &e1000_ich9_info,
  76         [board_ich10lan]        = &e1000_ich10_info,
  77         [board_pchlan]          = &e1000_pch_info,
  78         [board_pch2lan]         = &e1000_pch2_info,
  79         [board_pch_lpt]         = &e1000_pch_lpt_info,
  80 };
  81
  82 struct e1000_reg_info {
  83         u32 ofs;
  84         char *name;
  85 };
  86
  87 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  88         /* General Registers */
  89         {E1000_CTRL, "CTRL"},
  90         {E1000_STATUS, "STATUS"},
  91         {E1000_CTRL_EXT, "CTRL_EXT"},
  92
  93         /* Interrupt Registers */
  94         {E1000_ICR, "ICR"},
  95
  96         /* Rx Registers */
  97         {E1000_RCTL, "RCTL"},
  98         {E1000_RDLEN(0), "RDLEN"},
  99         {E1000_RDH(0), "RDH"},
 100         {E1000_RDT(0), "RDT"},
 101         {E1000_RDTR, "RDTR"},
 102         {E1000_RXDCTL(0), "RXDCTL"},
 103         {E1000_ERT, "ERT"},
 104         {E1000_RDBAL(0), "RDBAL"},
 105         {E1000_RDBAH(0), "RDBAH"},
 106         {E1000_RDFH, "RDFH"},
 107         {E1000_RDFT, "RDFT"},
 108         {E1000_RDFHS, "RDFHS"},
 109         {E1000_RDFTS, "RDFTS"},
 110         {E1000_RDFPC, "RDFPC"},
 111
 112         /* Tx Registers */
 113         {E1000_TCTL, "TCTL"},
 114         {E1000_TDBAL(0), "TDBAL"},
 115         {E1000_TDBAH(0), "TDBAH"},
 116         {E1000_TDLEN(0), "TDLEN"},
 117         {E1000_TDH(0), "TDH"},
 118         {E1000_TDT(0), "TDT"},
 119         {E1000_TIDV, "TIDV"},
 120         {E1000_TXDCTL(0), "TXDCTL"},
 121         {E1000_TADV, "TADV"},
 122         {E1000_TARC(0), "TARC"},
 123         {E1000_TDFH, "TDFH"},
 124         {E1000_TDFT, "TDFT"},
 125         {E1000_TDFHS, "TDFHS"},
 126         {E1000_TDFTS, "TDFTS"},
 127         {E1000_TDFPC, "TDFPC"},
 128
 129         /* List Terminator */
 130         {0, NULL}
 131 };
 132
 133 /**
 134  * e1000_regdump - register printout routine
 135  * @hw: pointer to the HW structure
 136  * @reginfo: pointer to the register info table
 137  **/
 138 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 139 {
 140         int n = 0;
 141         char rname[16];
 142         u32 regs[8];
 143
 144         switch (reginfo->ofs) {
 145         case E1000_RXDCTL(0):
 146                 for (n = 0; n < 2; n++)
 147                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 148                 break;
 149         case E1000_TXDCTL(0):
 150                 for (n = 0; n < 2; n++)
 151                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 152                 break;
 153         case E1000_TARC(0):
 154                 for (n = 0; n < 2; n++)
 155                         regs[n] = __er32(hw, E1000_TARC(n));
 156                 break;
 157         default:
 158                 pr_info("%-15s %08x\n",
 159                         reginfo->name, __er32(hw, reginfo->ofs));
 160                 return;
 161         }
 162
 163         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 164         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 165 }
 166
 167 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 168                                  struct e1000_buffer *bi)
 169 {
 170         int i;
 171         struct e1000_ps_page *ps_page;
 172
 173         for (i = 0; i < adapter->rx_ps_pages; i++) {
 174                 ps_page = &bi->ps_pages[i];
 175
 176                 if (ps_page->page) {
 177                         pr_info("packet dump for ps_page %d:\n", i);
 178                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 179                                        16, 1, page_address(ps_page->page),
 180                                        PAGE_SIZE, true);
 181                 }
 182         }
 183 }
 184
 185 /**
 186  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 187  * @adapter: board private structure
 188  **/
 189 static void e1000e_dump(struct e1000_adapter *adapter)
 190 {
 191         struct net_device *netdev = adapter->netdev;
 192         struct e1000_hw *hw = &adapter->hw;
 193         struct e1000_reg_info *reginfo;
 194         struct e1000_ring *tx_ring = adapter->tx_ring;
 195         struct e1000_tx_desc *tx_desc;
 196         struct my_u0 {
 197                 __le64 a;
 198                 __le64 b;
 199         } *u0;
 200         struct e1000_buffer *buffer_info;
 201         struct e1000_ring *rx_ring = adapter->rx_ring;
 202         union e1000_rx_desc_packet_split *rx_desc_ps;
 203         union e1000_rx_desc_extended *rx_desc;
 204         struct my_u1 {
 205                 __le64 a;
 206                 __le64 b;
 207                 __le64 c;
 208                 __le64 d;
 209         } *u1;
 210         u32 staterr;
 211         int i = 0;
 212
 213         if (!netif_msg_hw(adapter))
 214                 return;
 215
 216         /* Print netdevice Info */
 217         if (netdev) {
 218                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 219                 pr_info("Device Name     state            trans_start      last_rx\n");
 220                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 221                         netdev->state, netdev->trans_start, netdev->last_rx);
 222         }
 223
 224         /* Print Registers */
 225         dev_info(&adapter->pdev->dev, "Register Dump\n");
 226         pr_info(" Register Name   Value\n");
 227         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 228              reginfo->name; reginfo++) {
 229                 e1000_regdump(hw, reginfo);
 230         }
 231
 232         /* Print Tx Ring Summary */
 233         if (!netdev || !netif_running(netdev))
 234                 return;
 235
 236         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 237         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 238         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 239         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 240                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 241                 (unsigned long long)buffer_info->dma,
 242                 buffer_info->length,
 243                 buffer_info->next_to_watch,
 244                 (unsigned long long)buffer_info->time_stamp);
 245
 246         /* Print Tx Ring */
 247         if (!netif_msg_tx_done(adapter))
 248                 goto rx_ring_summary;
 249
 250         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 251
 252         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 253          *
 254          * Legacy Transmit Descriptor
 255          *   +--------------------------------------------------------------+
 256          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 257          *   +--------------------------------------------------------------+
 258          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 259          *   +--------------------------------------------------------------+
 260          *   63       48 47        36 35    32 31     24 23    16 15        0
 261          *
 262          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 263          *   63      48 47    40 39       32 31             16 15    8 7      0
 264          *   +----------------------------------------------------------------+
 265          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 266          *   +----------------------------------------------------------------+
 267          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 268          *   +----------------------------------------------------------------+
 269          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 270          *
 271          * Extended Data Descriptor (DTYP=0x1)
 272          *   +----------------------------------------------------------------+
 273          * 0 |                     Buffer Address [63:0]                      |
 274          *   +----------------------------------------------------------------+
 275          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 276          *   +----------------------------------------------------------------+
 277          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 278          */
 279         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 280         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 281         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 282         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 283                 const char *next_desc;
 284                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 285                 buffer_info = &tx_ring->buffer_info[i];
 286                 u0 = (struct my_u0 *)tx_desc;
 287                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 288                         next_desc = " NTC/U";
 289                 else if (i == tx_ring->next_to_use)
 290                         next_desc = " NTU";
 291                 else if (i == tx_ring->next_to_clean)
 292                         next_desc = " NTC";
 293                 else
 294                         next_desc = "";
 295                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 296                         (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
 297                          ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
 298                         i,
 299                         (unsigned long long)le64_to_cpu(u0->a),
 300                         (unsigned long long)le64_to_cpu(u0->b),
 301                         (unsigned long long)buffer_info->dma,
 302                         buffer_info->length, buffer_info->next_to_watch,
 303                         (unsigned long long)buffer_info->time_stamp,
 304                         buffer_info->skb, next_desc);
 305
 306                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 307                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 308                                        16, 1, buffer_info->skb->data,
 309                                        buffer_info->skb->len, true);
 310         }
 311
 312         /* Print Rx Ring Summary */
 313 rx_ring_summary:
 314         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 315         pr_info("Queue [NTU] [NTC]\n");
 316         pr_info(" %5d %5X %5X\n",
 317                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 318
 319         /* Print Rx Ring */
 320         if (!netif_msg_rx_status(adapter))
 321                 return;
 322
 323         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 324         switch (adapter->rx_ps_pages) {
 325         case 1:
 326         case 2:
 327         case 3:
 328                 /* [Extended] Packet Split Receive Descriptor Format
 329                  *
 330                  *    +-----------------------------------------------------+
 331                  *  0 |                Buffer Address 0 [63:0]              |
 332                  *    +-----------------------------------------------------+
 333                  *  8 |                Buffer Address 1 [63:0]              |
 334                  *    +-----------------------------------------------------+
 335                  * 16 |                Buffer Address 2 [63:0]              |
 336                  *    +-----------------------------------------------------+
 337                  * 24 |                Buffer Address 3 [63:0]              |
 338                  *    +-----------------------------------------------------+
 339                  */
 340                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 341                 /* [Extended] Receive Descriptor (Write-Back) Format
 342                  *
 343                  *   63       48 47    32 31     13 12    8 7    4 3        0
 344                  *   +------------------------------------------------------+
 345                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 346                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 347                  *   +------------------------------------------------------+
 348                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 349                  *   +------------------------------------------------------+
 350                  *   63       48 47    32 31            20 19               0
 351                  */
 352                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 353                 for (i = 0; i < rx_ring->count; i++) {
 354                         const char *next_desc;
 355                         buffer_info = &rx_ring->buffer_info[i];
 356                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 357                         u1 = (struct my_u1 *)rx_desc_ps;
 358                         staterr =
 359                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 360
 361                         if (i == rx_ring->next_to_use)
 362                                 next_desc = " NTU";
 363                         else if (i == rx_ring->next_to_clean)
 364                                 next_desc = " NTC";
 365                         else
 366                                 next_desc = "";
 367
 368                         if (staterr & E1000_RXD_STAT_DD) {
 369                                 /* Descriptor Done */
 370                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 371                                         "RWB", i,
 372                                         (unsigned long long)le64_to_cpu(u1->a),
 373                                         (unsigned long long)le64_to_cpu(u1->b),
 374                                         (unsigned long long)le64_to_cpu(u1->c),
 375                                         (unsigned long long)le64_to_cpu(u1->d),
 376                                         buffer_info->skb, next_desc);
 377                         } else {
 378                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 379                                         "R  ", i,
 380                                         (unsigned long long)le64_to_cpu(u1->a),
 381                                         (unsigned long long)le64_to_cpu(u1->b),
 382                                         (unsigned long long)le64_to_cpu(u1->c),
 383                                         (unsigned long long)le64_to_cpu(u1->d),
 384                                         (unsigned long long)buffer_info->dma,
 385                                         buffer_info->skb, next_desc);
 386
 387                                 if (netif_msg_pktdata(adapter))
 388                                         e1000e_dump_ps_pages(adapter,
 389                                                              buffer_info);
 390                         }
 391                 }
 392                 break;
 393         default:
 394         case 0:
 395                 /* Extended Receive Descriptor (Read) Format
 396                  *
 397                  *   +-----------------------------------------------------+
 398                  * 0 |                Buffer Address [63:0]                |
 399                  *   +-----------------------------------------------------+
 400                  * 8 |                      Reserved                       |
 401                  *   +-----------------------------------------------------+
 402                  */
 403                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 404                 /* Extended Receive Descriptor (Write-Back) Format
 405                  *
 406                  *   63       48 47    32 31    24 23            4 3        0
 407                  *   +------------------------------------------------------+
 408                  *   |     RSS Hash      |        |               |         |
 409                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 410                  *   | Packet   | IP     |        |               |  Type   |
 411                  *   | Checksum | Ident  |        |               |         |
 412                  *   +------------------------------------------------------+
 413                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 414                  *   +------------------------------------------------------+
 415                  *   63       48 47    32 31            20 19               0
 416                  */
 417                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 418
 419                 for (i = 0; i < rx_ring->count; i++) {
 420                         const char *next_desc;
 421
 422                         buffer_info = &rx_ring->buffer_info[i];
 423                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 424                         u1 = (struct my_u1 *)rx_desc;
 425                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 426
 427                         if (i == rx_ring->next_to_use)
 428                                 next_desc = " NTU";
 429                         else if (i == rx_ring->next_to_clean)
 430                                 next_desc = " NTC";
 431                         else
 432                                 next_desc = "";
 433
 434                         if (staterr & E1000_RXD_STAT_DD) {
 435                                 /* Descriptor Done */
 436                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 437                                         "RWB", i,
 438                                         (unsigned long long)le64_to_cpu(u1->a),
 439                                         (unsigned long long)le64_to_cpu(u1->b),
 440                                         buffer_info->skb, next_desc);
 441                         } else {
 442                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 443                                         "R  ", i,
 444                                         (unsigned long long)le64_to_cpu(u1->a),
 445                                         (unsigned long long)le64_to_cpu(u1->b),
 446                                         (unsigned long long)buffer_info->dma,
 447                                         buffer_info->skb, next_desc);
 448
 449                                 if (netif_msg_pktdata(adapter) &&
 450                                     buffer_info->skb)
 451                                         print_hex_dump(KERN_INFO, "",
 452                                                        DUMP_PREFIX_ADDRESS, 16,
 453                                                        1,
 454                                                        buffer_info->skb->data,
 455                                                        adapter->rx_buffer_len,
 456                                                        true);
 457                         }
 458                 }
 459         }
 460 }
 461
 462 /**
 463  * e1000_desc_unused - calculate if we have unused descriptors
 464  **/
 465 static int e1000_desc_unused(struct e1000_ring *ring)
 466 {
 467         if (ring->next_to_clean > ring->next_to_use)
 468                 return ring->next_to_clean - ring->next_to_use - 1;
 469
 470         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 471 }
 472
 473 /**
 474  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 475  * @adapter: board private structure
 476  * @hwtstamps: time stamp structure to update
 477  * @systim: unsigned 64bit system time value.
 478  *
 479  * Convert the system time value stored in the RX/TXSTMP registers into a
 480  * hwtstamp which can be used by the upper level time stamping functions.
 481  *
 482  * The 'systim_lock' spinlock is used to protect the consistency of the
 483  * system time value. This is needed because reading the 64 bit time
 484  * value involves reading two 32 bit registers. The first read latches the
 485  * value.
 486  **/
 487 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 488                                       struct skb_shared_hwtstamps *hwtstamps,
 489                                       u64 systim)
 490 {
 491         u64 ns;
 492         unsigned long flags;
 493
 494         spin_lock_irqsave(&adapter->systim_lock, flags);
 495         ns = timecounter_cyc2time(&adapter->tc, systim);
 496         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 497
 498         memset(hwtstamps, 0, sizeof(*hwtstamps));
 499         hwtstamps->hwtstamp = ns_to_ktime(ns);
 500 }
 501
 502 /**
 503  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 504  * @adapter: board private structure
 505  * @status: descriptor extended error and status field
 506  * @skb: particular skb to include time stamp
 507  *
 508  * If the time stamp is valid, convert it into the timecounter ns value
 509  * and store that result into the shhwtstamps structure which is passed
 510  * up the network stack.
 511  **/
 512 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 513                                struct sk_buff *skb)
 514 {
 515         struct e1000_hw *hw = &adapter->hw;
 516         u64 rxstmp;
 517
 518         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 519             !(status & E1000_RXDEXT_STATERR_TST) ||
 520             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 521                 return;
 522
 523         /* The Rx time stamp registers contain the time stamp.  No other
 524          * received packet will be time stamped until the Rx time stamp
 525          * registers are read.  Because only one packet can be time stamped
 526          * at a time, the register values must belong to this packet and
 527          * therefore none of the other additional attributes need to be
 528          * compared.
 529          */
 530         rxstmp = (u64)er32(RXSTMPL);
 531         rxstmp |= (u64)er32(RXSTMPH) << 32;
 532         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 533
 534         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 535 }
 536
 537 /**
 538  * e1000_receive_skb - helper function to handle Rx indications
 539  * @adapter: board private structure
 540  * @staterr: descriptor extended error and status field as written by hardware
 541  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 542  * @skb: pointer to sk_buff to be indicated to stack
 543  **/
 544 static void e1000_receive_skb(struct e1000_adapter *adapter,
 545                               struct net_device *netdev, struct sk_buff *skb,
 546                               u32 staterr, __le16 vlan)
 547 {
 548         u16 tag = le16_to_cpu(vlan);
 549
 550         e1000e_rx_hwtstamp(adapter, staterr, skb);
 551
 552         skb->protocol = eth_type_trans(skb, netdev);
 553
 554         if (staterr & E1000_RXD_STAT_VP)
 555                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 556
 557         napi_gro_receive(&adapter->napi, skb);
 558 }
 559
 560 /**
 561  * e1000_rx_checksum - Receive Checksum Offload
 562  * @adapter: board private structure
 563  * @status_err: receive descriptor status and error fields
 564  * @csum: receive descriptor csum field
 565  * @sk_buff: socket buffer with received data
 566  **/
 567 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 568                               struct sk_buff *skb)
 569 {
 570         u16 status = (u16)status_err;
 571         u8 errors = (u8)(status_err >> 24);
 572
 573         skb_checksum_none_assert(skb);
 574
 575         /* Rx checksum disabled */
 576         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 577                 return;
 578
 579         /* Ignore Checksum bit is set */
 580         if (status & E1000_RXD_STAT_IXSM)
 581                 return;
 582
 583         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 584         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 585                 /* let the stack verify checksum errors */
 586                 adapter->hw_csum_err++;
 587                 return;
 588         }
 589
 590         /* TCP/UDP Checksum has not been calculated */
 591         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 592                 return;
 593
 594         /* It must be a TCP or UDP packet with a valid checksum */
 595         skb->ip_summed = CHECKSUM_UNNECESSARY;
 596         adapter->hw_csum_good++;
 597 }
 598
 599 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 600 {
 601         struct e1000_adapter *adapter = rx_ring->adapter;
 602         struct e1000_hw *hw = &adapter->hw;
 603         s32 ret_val = __ew32_prepare(hw);
 604
 605         writel(i, rx_ring->tail);
 606
 607         if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
 608                 u32 rctl = er32(RCTL);
 609                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 610                 e_err("ME firmware caused invalid RDT - resetting\n");
 611                 schedule_work(&adapter->reset_task);
 612         }
 613 }
 614
 615 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 616 {
 617         struct e1000_adapter *adapter = tx_ring->adapter;
 618         struct e1000_hw *hw = &adapter->hw;
 619         s32 ret_val = __ew32_prepare(hw);
 620
 621         writel(i, tx_ring->tail);
 622
 623         if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
 624                 u32 tctl = er32(TCTL);
 625                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 626                 e_err("ME firmware caused invalid TDT - resetting\n");
 627                 schedule_work(&adapter->reset_task);
 628         }
 629 }
 630
 631 /**
 632  * e1000_alloc_rx_buffers - Replace used receive buffers
 633  * @rx_ring: Rx descriptor ring
 634  **/
 635 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 636                                    int cleaned_count, gfp_t gfp)
 637 {
 638         struct e1000_adapter *adapter = rx_ring->adapter;
 639         struct net_device *netdev = adapter->netdev;
 640         struct pci_dev *pdev = adapter->pdev;
 641         union e1000_rx_desc_extended *rx_desc;
 642         struct e1000_buffer *buffer_info;
 643         struct sk_buff *skb;
 644         unsigned int i;
 645         unsigned int bufsz = adapter->rx_buffer_len;
 646
 647         i = rx_ring->next_to_use;
 648         buffer_info = &rx_ring->buffer_info[i];
 649
 650         while (cleaned_count--) {
 651                 skb = buffer_info->skb;
 652                 if (skb) {
 653                         skb_trim(skb, 0);
 654                         goto map_skb;
 655                 }
 656
 657                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 658                 if (!skb) {
 659                         /* Better luck next round */
 660                         adapter->alloc_rx_buff_failed++;
 661                         break;
 662                 }
 663
 664                 buffer_info->skb = skb;
 665 map_skb:
 666                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 667                                                   adapter->rx_buffer_len,
 668                                                   DMA_FROM_DEVICE);
 669                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 670                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 671                         adapter->rx_dma_failed++;
 672                         break;
 673                 }
 674
 675                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 676                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 677
 678                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 679                         /* Force memory writes to complete before letting h/w
 680                          * know there are new descriptors to fetch.  (Only
 681                          * applicable for weak-ordered memory model archs,
 682                          * such as IA-64).
 683                          */
 684                         wmb();
 685                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 686                                 e1000e_update_rdt_wa(rx_ring, i);
 687                         else
 688                                 writel(i, rx_ring->tail);
 689                 }
 690                 i++;
 691                 if (i == rx_ring->count)
 692                         i = 0;
 693                 buffer_info = &rx_ring->buffer_info[i];
 694         }
 695
 696         rx_ring->next_to_use = i;
 697 }
 698
 699 /**
 700  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 701  * @rx_ring: Rx descriptor ring
 702  **/
 703 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 704                                       int cleaned_count, gfp_t gfp)
 705 {
 706         struct e1000_adapter *adapter = rx_ring->adapter;
 707         struct net_device *netdev = adapter->netdev;
 708         struct pci_dev *pdev = adapter->pdev;
 709         union e1000_rx_desc_packet_split *rx_desc;
 710         struct e1000_buffer *buffer_info;
 711         struct e1000_ps_page *ps_page;
 712         struct sk_buff *skb;
 713         unsigned int i, j;
 714
 715         i = rx_ring->next_to_use;
 716         buffer_info = &rx_ring->buffer_info[i];
 717
 718         while (cleaned_count--) {
 719                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 720
 721                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 722                         ps_page = &buffer_info->ps_pages[j];
 723                         if (j >= adapter->rx_ps_pages) {
 724                                 /* all unused desc entries get hw null ptr */
 725                                 rx_desc->read.buffer_addr[j + 1] =
 726                                     ~cpu_to_le64(0);
 727                                 continue;
 728                         }
 729                         if (!ps_page->page) {
 730                                 ps_page->page = alloc_page(gfp);
 731                                 if (!ps_page->page) {
 732                                         adapter->alloc_rx_buff_failed++;
 733                                         goto no_buffers;
 734                                 }
 735                                 ps_page->dma = dma_map_page(&pdev->dev,
 736                                                             ps_page->page,
 737                                                             0, PAGE_SIZE,
 738                                                             DMA_FROM_DEVICE);
 739                                 if (dma_mapping_error(&pdev->dev,
 740                                                       ps_page->dma)) {
 741                                         dev_err(&adapter->pdev->dev,
 742                                                 "Rx DMA page map failed\n");
 743                                         adapter->rx_dma_failed++;
 744                                         goto no_buffers;
 745                                 }
 746                         }
 747                         /* Refresh the desc even if buffer_addrs
 748                          * didn't change because each write-back
 749                          * erases this info.
 750                          */
 751                         rx_desc->read.buffer_addr[j + 1] =
 752                             cpu_to_le64(ps_page->dma);
 753                 }
 754
 755                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 756                                                   gfp);
 757
 758                 if (!skb) {
 759                         adapter->alloc_rx_buff_failed++;
 760                         break;
 761                 }
 762
 763                 buffer_info->skb = skb;
 764                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 765                                                   adapter->rx_ps_bsize0,
 766                                                   DMA_FROM_DEVICE);
 767                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 768                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 769                         adapter->rx_dma_failed++;
 770                         /* cleanup skb */
 771                         dev_kfree_skb_any(skb);
 772                         buffer_info->skb = NULL;
 773                         break;
 774                 }
 775
 776                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 777
 778                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 779                         /* Force memory writes to complete before letting h/w
 780                          * know there are new descriptors to fetch.  (Only
 781                          * applicable for weak-ordered memory model archs,
 782                          * such as IA-64).
 783                          */
 784                         wmb();
 785                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 786                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 787                         else
 788                                 writel(i << 1, rx_ring->tail);
 789                 }
 790
 791                 i++;
 792                 if (i == rx_ring->count)
 793                         i = 0;
 794                 buffer_info = &rx_ring->buffer_info[i];
 795         }
 796
 797 no_buffers:
 798         rx_ring->next_to_use = i;
 799 }
 800
 801 /**
 802  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 803  * @rx_ring: Rx descriptor ring
 804  * @cleaned_count: number of buffers to allocate this pass
 805  **/
 806
 807 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 808                                          int cleaned_count, gfp_t gfp)
 809 {
 810         struct e1000_adapter *adapter = rx_ring->adapter;
 811         struct net_device *netdev = adapter->netdev;
 812         struct pci_dev *pdev = adapter->pdev;
 813         union e1000_rx_desc_extended *rx_desc;
 814         struct e1000_buffer *buffer_info;
 815         struct sk_buff *skb;
 816         unsigned int i;
 817         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 818
 819         i = rx_ring->next_to_use;
 820         buffer_info = &rx_ring->buffer_info[i];
 821
 822         while (cleaned_count--) {
 823                 skb = buffer_info->skb;
 824                 if (skb) {
 825                         skb_trim(skb, 0);
 826                         goto check_page;
 827                 }
 828
 829                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 830                 if (unlikely(!skb)) {
 831                         /* Better luck next round */
 832                         adapter->alloc_rx_buff_failed++;
 833                         break;
 834                 }
 835
 836                 buffer_info->skb = skb;
 837 check_page:
 838                 /* allocate a new page if necessary */
 839                 if (!buffer_info->page) {
 840                         buffer_info->page = alloc_page(gfp);
 841                         if (unlikely(!buffer_info->page)) {
 842                                 adapter->alloc_rx_buff_failed++;
 843                                 break;
 844                         }
 845                 }
 846
 847                 if (!buffer_info->dma) {
 848                         buffer_info->dma = dma_map_page(&pdev->dev,
 849                                                         buffer_info->page, 0,
 850                                                         PAGE_SIZE,
 851                                                         DMA_FROM_DEVICE);
 852                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 853                                 adapter->alloc_rx_buff_failed++;
 854                                 break;
 855                         }
 856                 }
 857
 858                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 859                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 860
 861                 if (unlikely(++i == rx_ring->count))
 862                         i = 0;
 863                 buffer_info = &rx_ring->buffer_info[i];
 864         }
 865
 866         if (likely(rx_ring->next_to_use != i)) {
 867                 rx_ring->next_to_use = i;
 868                 if (unlikely(i-- == 0))
 869                         i = (rx_ring->count - 1);
 870
 871                 /* Force memory writes to complete before letting h/w
 872                  * know there are new descriptors to fetch.  (Only
 873                  * applicable for weak-ordered memory model archs,
 874                  * such as IA-64).
 875                  */
 876                 wmb();
 877                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 878                         e1000e_update_rdt_wa(rx_ring, i);
 879                 else
 880                         writel(i, rx_ring->tail);
 881         }
 882 }
 883
 884 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 885                                  struct sk_buff *skb)
 886 {
 887         if (netdev->features & NETIF_F_RXHASH)
 888                 skb->rxhash = le32_to_cpu(rss);
 889 }
 890
 891 /**
 892  * e1000_clean_rx_irq - Send received data up the network stack
 893  * @rx_ring: Rx descriptor ring
 894  *
 895  * the return value indicates whether actual cleaning was done, there
 896  * is no guarantee that everything was cleaned
 897  **/
 898 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 899                                int work_to_do)
 900 {
 901         struct e1000_adapter *adapter = rx_ring->adapter;
 902         struct net_device *netdev = adapter->netdev;
 903         struct pci_dev *pdev = adapter->pdev;
 904         struct e1000_hw *hw = &adapter->hw;
 905         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 906         struct e1000_buffer *buffer_info, *next_buffer;
 907         u32 length, staterr;
 908         unsigned int i;
 909         int cleaned_count = 0;
 910         bool cleaned = false;
 911         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 912
 913         i = rx_ring->next_to_clean;
 914         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 915         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 916         buffer_info = &rx_ring->buffer_info[i];
 917
 918         while (staterr & E1000_RXD_STAT_DD) {
 919                 struct sk_buff *skb;
 920
 921                 if (*work_done >= work_to_do)
 922                         break;
 923                 (*work_done)++;
 924                 rmb();  /* read descriptor and rx_buffer_info after status DD */
 925
 926                 skb = buffer_info->skb;
 927                 buffer_info->skb = NULL;
 928
 929                 prefetch(skb->data - NET_IP_ALIGN);
 930
 931                 i++;
 932                 if (i == rx_ring->count)
 933                         i = 0;
 934                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 935                 prefetch(next_rxd);
 936
 937                 next_buffer = &rx_ring->buffer_info[i];
 938
 939                 cleaned = true;
 940                 cleaned_count++;
 941                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 942                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 943                 buffer_info->dma = 0;
 944
 945                 length = le16_to_cpu(rx_desc->wb.upper.length);
 946
 947                 /* !EOP means multiple descriptors were used to store a single
 948                  * packet, if that's the case we need to toss it.  In fact, we
 949                  * need to toss every packet with the EOP bit clear and the
 950                  * next frame that _does_ have the EOP bit set, as it is by
 951                  * definition only a frame fragment
 952                  */
 953                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 954                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 955
 956                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 957                         /* All receives must fit into a single buffer */
 958                         e_dbg("Receive packet consumed multiple buffers\n");
 959                         /* recycle */
 960                         buffer_info->skb = skb;
 961                         if (staterr & E1000_RXD_STAT_EOP)
 962                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 963                         goto next_desc;
 964                 }
 965
 966                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 967                              !(netdev->features & NETIF_F_RXALL))) {
 968                         /* recycle */
 969                         buffer_info->skb = skb;
 970                         goto next_desc;
 971                 }
 972
 973                 /* adjust length to remove Ethernet CRC */
 974                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
 975                         /* If configured to store CRC, don't subtract FCS,
 976                          * but keep the FCS bytes out of the total_rx_bytes
 977                          * counter
 978                          */
 979                         if (netdev->features & NETIF_F_RXFCS)
 980                                 total_rx_bytes -= 4;
 981                         else
 982                                 length -= 4;
 983                 }
 984
 985                 total_rx_bytes += length;
 986                 total_rx_packets++;
 987
 988                 /* code added for copybreak, this should improve
 989                  * performance for small packets with large amounts
 990                  * of reassembly being done in the stack
 991                  */
 992                 if (length < copybreak) {
 993                         struct sk_buff *new_skb =
 994                             netdev_alloc_skb_ip_align(netdev, length);
 995                         if (new_skb) {
 996                                 skb_copy_to_linear_data_offset(new_skb,
 997                                                                -NET_IP_ALIGN,
 998                                                                (skb->data -
 999                                                                 NET_IP_ALIGN),
1000                                                                (length +
1001                                                                 NET_IP_ALIGN));
1002                                 /* save the skb in buffer_info as good */
1003                                 buffer_info->skb = skb;
1004                                 skb = new_skb;
1005                         }
1006                         /* else just continue with the old one */
1007                 }
1008                 /* end copybreak code */
1009                 skb_put(skb, length);
1010
1011                 /* Receive Checksum Offload */
1012                 e1000_rx_checksum(adapter, staterr, skb);
1013
1014                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1015
1016                 e1000_receive_skb(adapter, netdev, skb, staterr,
1017                                   rx_desc->wb.upper.vlan);
1018
1019 next_desc:
1020                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1021
1022                 /* return some buffers to hardware, one at a time is too slow */
1023                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1024                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1025                                               GFP_ATOMIC);
1026                         cleaned_count = 0;
1027                 }
1028
1029                 /* use prefetched values */
1030                 rx_desc = next_rxd;
1031                 buffer_info = next_buffer;
1032
1033                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1034         }
1035         rx_ring->next_to_clean = i;
1036
1037         cleaned_count = e1000_desc_unused(rx_ring);
1038         if (cleaned_count)
1039                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1040
1041         adapter->total_rx_bytes += total_rx_bytes;
1042         adapter->total_rx_packets += total_rx_packets;
1043         return cleaned;
1044 }
1045
1046 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1047                             struct e1000_buffer *buffer_info)
1048 {
1049         struct e1000_adapter *adapter = tx_ring->adapter;
1050
1051         if (buffer_info->dma) {
1052                 if (buffer_info->mapped_as_page)
1053                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1054                                        buffer_info->length, DMA_TO_DEVICE);
1055                 else
1056                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1057                                          buffer_info->length, DMA_TO_DEVICE);
1058                 buffer_info->dma = 0;
1059         }
1060         if (buffer_info->skb) {
1061                 dev_kfree_skb_any(buffer_info->skb);
1062                 buffer_info->skb = NULL;
1063         }
1064         buffer_info->time_stamp = 0;
1065 }
1066
1067 static void e1000_print_hw_hang(struct work_struct *work)
1068 {
1069         struct e1000_adapter *adapter = container_of(work,
1070                                                      struct e1000_adapter,
1071                                                      print_hang_task);
1072         struct net_device *netdev = adapter->netdev;
1073         struct e1000_ring *tx_ring = adapter->tx_ring;
1074         unsigned int i = tx_ring->next_to_clean;
1075         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1076         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1077         struct e1000_hw *hw = &adapter->hw;
1078         u16 phy_status, phy_1000t_status, phy_ext_status;
1079         u16 pci_status;
1080
1081         if (test_bit(__E1000_DOWN, &adapter->state))
1082                 return;
1083
1084         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1085                 /* May be block on write-back, flush and detect again
1086                  * flush pending descriptor writebacks to memory
1087                  */
1088                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1089                 /* execute the writes immediately */
1090                 e1e_flush();
1091                 /* Due to rare timing issues, write to TIDV again to ensure
1092                  * the write is successful
1093                  */
1094                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1095                 /* execute the writes immediately */
1096                 e1e_flush();
1097                 adapter->tx_hang_recheck = true;
1098                 return;
1099         }
1100         /* Real hang detected */
1101         adapter->tx_hang_recheck = false;
1102         netif_stop_queue(netdev);
1103
1104         e1e_rphy(hw, MII_BMSR, &phy_status);
1105         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1106         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1107
1108         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1109
1110         /* detected Hardware unit hang */
1111         e_err("Detected Hardware Unit Hang:\n"
1112               "  TDH                  <%x>\n"
1113               "  TDT                  <%x>\n"
1114               "  next_to_use          <%x>\n"
1115               "  next_to_clean        <%x>\n"
1116               "buffer_info[next_to_clean]:\n"
1117               "  time_stamp           <%lx>\n"
1118               "  next_to_watch        <%x>\n"
1119               "  jiffies              <%lx>\n"
1120               "  next_to_watch.status <%x>\n"
1121               "MAC Status             <%x>\n"
1122               "PHY Status             <%x>\n"
1123               "PHY 1000BASE-T Status  <%x>\n"
1124               "PHY Extended Status    <%x>\n"
1125               "PCI Status             <%x>\n",
1126               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1127               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1128               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1129               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1130
1131         /* Suggest workaround for known h/w issue */
1132         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1133                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1134 }
1135
1136 /**
1137  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1138  * @work: pointer to work struct
1139  *
1140  * This work function polls the TSYNCTXCTL valid bit to determine when a
1141  * timestamp has been taken for the current stored skb.  The timestamp must
1142  * be for this skb because only one such packet is allowed in the queue.
1143  */
1144 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1145 {
1146         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1147                                                      tx_hwtstamp_work);
1148         struct e1000_hw *hw = &adapter->hw;
1149
1150         if (!adapter->tx_hwtstamp_skb)
1151                 return;
1152
1153         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1154                 struct skb_shared_hwtstamps shhwtstamps;
1155                 u64 txstmp;
1156
1157                 txstmp = er32(TXSTMPL);
1158                 txstmp |= (u64)er32(TXSTMPH) << 32;
1159
1160                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1161
1162                 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps);
1163                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1164                 adapter->tx_hwtstamp_skb = NULL;
1165         } else {
1166                 /* reschedule to check later */
1167                 schedule_work(&adapter->tx_hwtstamp_work);
1168         }
1169 }
1170
1171 /**
1172  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1173  * @tx_ring: Tx descriptor ring
1174  *
1175  * the return value indicates whether actual cleaning was done, there
1176  * is no guarantee that everything was cleaned
1177  **/
1178 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1179 {
1180         struct e1000_adapter *adapter = tx_ring->adapter;
1181         struct net_device *netdev = adapter->netdev;
1182         struct e1000_hw *hw = &adapter->hw;
1183         struct e1000_tx_desc *tx_desc, *eop_desc;
1184         struct e1000_buffer *buffer_info;
1185         unsigned int i, eop;
1186         unsigned int count = 0;
1187         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1188         unsigned int bytes_compl = 0, pkts_compl = 0;
1189
1190         i = tx_ring->next_to_clean;
1191         eop = tx_ring->buffer_info[i].next_to_watch;
1192         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1193
1194         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1195                (count < tx_ring->count)) {
1196                 bool cleaned = false;
1197                 rmb();          /* read buffer_info after eop_desc */
1198                 for (; !cleaned; count++) {
1199                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1200                         buffer_info = &tx_ring->buffer_info[i];
1201                         cleaned = (i == eop);
1202
1203                         if (cleaned) {
1204                                 total_tx_packets += buffer_info->segs;
1205                                 total_tx_bytes += buffer_info->bytecount;
1206                                 if (buffer_info->skb) {
1207                                         bytes_compl += buffer_info->skb->len;
1208                                         pkts_compl++;
1209                                 }
1210                         }
1211
1212                         e1000_put_txbuf(tx_ring, buffer_info);
1213                         tx_desc->upper.data = 0;
1214
1215                         i++;
1216                         if (i == tx_ring->count)
1217                                 i = 0;
1218                 }
1219
1220                 if (i == tx_ring->next_to_use)
1221                         break;
1222                 eop = tx_ring->buffer_info[i].next_to_watch;
1223                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1224         }
1225
1226         tx_ring->next_to_clean = i;
1227
1228         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1229
1230 #define TX_WAKE_THRESHOLD 32
1231         if (count && netif_carrier_ok(netdev) &&
1232             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1233                 /* Make sure that anybody stopping the queue after this
1234                  * sees the new next_to_clean.
1235                  */
1236                 smp_mb();
1237
1238                 if (netif_queue_stopped(netdev) &&
1239                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1240                         netif_wake_queue(netdev);
1241                         ++adapter->restart_queue;
1242                 }
1243         }
1244
1245         if (adapter->detect_tx_hung) {
1246                 /* Detect a transmit hang in hardware, this serializes the
1247                  * check with the clearing of time_stamp and movement of i
1248                  */
1249                 adapter->detect_tx_hung = false;
1250                 if (tx_ring->buffer_info[i].time_stamp &&
1251                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1252                                + (adapter->tx_timeout_factor * HZ)) &&
1253                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1254                         schedule_work(&adapter->print_hang_task);
1255                 else
1256                         adapter->tx_hang_recheck = false;
1257         }
1258         adapter->total_tx_bytes += total_tx_bytes;
1259         adapter->total_tx_packets += total_tx_packets;
1260         return count < tx_ring->count;
1261 }
1262
1263 /**
1264  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1265  * @rx_ring: Rx descriptor ring
1266  *
1267  * the return value indicates whether actual cleaning was done, there
1268  * is no guarantee that everything was cleaned
1269  **/
1270 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1271                                   int work_to_do)
1272 {
1273         struct e1000_adapter *adapter = rx_ring->adapter;
1274         struct e1000_hw *hw = &adapter->hw;
1275         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1276         struct net_device *netdev = adapter->netdev;
1277         struct pci_dev *pdev = adapter->pdev;
1278         struct e1000_buffer *buffer_info, *next_buffer;
1279         struct e1000_ps_page *ps_page;
1280         struct sk_buff *skb;
1281         unsigned int i, j;
1282         u32 length, staterr;
1283         int cleaned_count = 0;
1284         bool cleaned = false;
1285         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1286
1287         i = rx_ring->next_to_clean;
1288         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1289         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1290         buffer_info = &rx_ring->buffer_info[i];
1291
1292         while (staterr & E1000_RXD_STAT_DD) {
1293                 if (*work_done >= work_to_do)
1294                         break;
1295                 (*work_done)++;
1296                 skb = buffer_info->skb;
1297                 rmb();  /* read descriptor and rx_buffer_info after status DD */
1298
1299                 /* in the packet split case this is header only */
1300                 prefetch(skb->data - NET_IP_ALIGN);
1301
1302                 i++;
1303                 if (i == rx_ring->count)
1304                         i = 0;
1305                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1306                 prefetch(next_rxd);
1307
1308                 next_buffer = &rx_ring->buffer_info[i];
1309
1310                 cleaned = true;
1311                 cleaned_count++;
1312                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1313                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1314                 buffer_info->dma = 0;
1315
1316                 /* see !EOP comment in other Rx routine */
1317                 if (!(staterr & E1000_RXD_STAT_EOP))
1318                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1319
1320                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1321                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1322                         dev_kfree_skb_irq(skb);
1323                         if (staterr & E1000_RXD_STAT_EOP)
1324                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1325                         goto next_desc;
1326                 }
1327
1328                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1329                              !(netdev->features & NETIF_F_RXALL))) {
1330                         dev_kfree_skb_irq(skb);
1331                         goto next_desc;
1332                 }
1333
1334                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1335
1336                 if (!length) {
1337                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1338                         dev_kfree_skb_irq(skb);
1339                         goto next_desc;
1340                 }
1341
1342                 /* Good Receive */
1343                 skb_put(skb, length);
1344
1345                 {
1346                         /* this looks ugly, but it seems compiler issues make
1347                          * it more efficient than reusing j
1348                          */
1349                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1350
1351                         /* page alloc/put takes too long and effects small
1352                          * packet throughput, so unsplit small packets and
1353                          * save the alloc/put only valid in softirq (napi)
1354                          * context to call kmap_*
1355                          */
1356                         if (l1 && (l1 <= copybreak) &&
1357                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1358                                 u8 *vaddr;
1359
1360                                 ps_page = &buffer_info->ps_pages[0];
1361
1362                                 /* there is no documentation about how to call
1363                                  * kmap_atomic, so we can't hold the mapping
1364                                  * very long
1365                                  */
1366                                 dma_sync_single_for_cpu(&pdev->dev,
1367                                                         ps_page->dma,
1368                                                         PAGE_SIZE,
1369                                                         DMA_FROM_DEVICE);
1370                                 vaddr = kmap_atomic(ps_page->page);
1371                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1372                                 kunmap_atomic(vaddr);
1373                                 dma_sync_single_for_device(&pdev->dev,
1374                                                            ps_page->dma,
1375                                                            PAGE_SIZE,
1376                                                            DMA_FROM_DEVICE);
1377
1378                                 /* remove the CRC */
1379                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1380                                         if (!(netdev->features & NETIF_F_RXFCS))
1381                                                 l1 -= 4;
1382                                 }
1383
1384                                 skb_put(skb, l1);
1385                                 goto copydone;
1386                         }       /* if */
1387                 }
1388
1389                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1390                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1391                         if (!length)
1392                                 break;
1393
1394                         ps_page = &buffer_info->ps_pages[j];
1395                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1396                                        DMA_FROM_DEVICE);
1397                         ps_page->dma = 0;
1398                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1399                         ps_page->page = NULL;
1400                         skb->len += length;
1401                         skb->data_len += length;
1402                         skb->truesize += PAGE_SIZE;
1403                 }
1404
1405                 /* strip the ethernet crc, problem is we're using pages now so
1406                  * this whole operation can get a little cpu intensive
1407                  */
1408                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1409                         if (!(netdev->features & NETIF_F_RXFCS))
1410                                 pskb_trim(skb, skb->len - 4);
1411                 }
1412
1413 copydone:
1414                 total_rx_bytes += skb->len;
1415                 total_rx_packets++;
1416
1417                 e1000_rx_checksum(adapter, staterr, skb);
1418
1419                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1420
1421                 if (rx_desc->wb.upper.header_status &
1422                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1423                         adapter->rx_hdr_split++;
1424
1425                 e1000_receive_skb(adapter, netdev, skb, staterr,
1426                                   rx_desc->wb.middle.vlan);
1427
1428 next_desc:
1429                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1430                 buffer_info->skb = NULL;
1431
1432                 /* return some buffers to hardware, one at a time is too slow */
1433                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1434                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1435                                               GFP_ATOMIC);
1436                         cleaned_count = 0;
1437                 }
1438
1439                 /* use prefetched values */
1440                 rx_desc = next_rxd;
1441                 buffer_info = next_buffer;
1442
1443                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1444         }
1445         rx_ring->next_to_clean = i;
1446
1447         cleaned_count = e1000_desc_unused(rx_ring);
1448         if (cleaned_count)
1449                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1450
1451         adapter->total_rx_bytes += total_rx_bytes;
1452         adapter->total_rx_packets += total_rx_packets;
1453         return cleaned;
1454 }
1455
1456 /**
1457  * e1000_consume_page - helper function
1458  **/
1459 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1460                                u16 length)
1461 {
1462         bi->page = NULL;
1463         skb->len += length;
1464         skb->data_len += length;
1465         skb->truesize += PAGE_SIZE;
1466 }
1467
1468 /**
1469  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1470  * @adapter: board private structure
1471  *
1472  * the return value indicates whether actual cleaning was done, there
1473  * is no guarantee that everything was cleaned
1474  **/
1475 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1476                                      int work_to_do)
1477 {
1478         struct e1000_adapter *adapter = rx_ring->adapter;
1479         struct net_device *netdev = adapter->netdev;
1480         struct pci_dev *pdev = adapter->pdev;
1481         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1482         struct e1000_buffer *buffer_info, *next_buffer;
1483         u32 length, staterr;
1484         unsigned int i;
1485         int cleaned_count = 0;
1486         bool cleaned = false;
1487         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1488         struct skb_shared_info *shinfo;
1489
1490         i = rx_ring->next_to_clean;
1491         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1492         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1493         buffer_info = &rx_ring->buffer_info[i];
1494
1495         while (staterr & E1000_RXD_STAT_DD) {
1496                 struct sk_buff *skb;
1497
1498                 if (*work_done >= work_to_do)
1499                         break;
1500                 (*work_done)++;
1501                 rmb();  /* read descriptor and rx_buffer_info after status DD */
1502
1503                 skb = buffer_info->skb;
1504                 buffer_info->skb = NULL;
1505
1506                 ++i;
1507                 if (i == rx_ring->count)
1508                         i = 0;
1509                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1510                 prefetch(next_rxd);
1511
1512                 next_buffer = &rx_ring->buffer_info[i];
1513
1514                 cleaned = true;
1515                 cleaned_count++;
1516                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1517                                DMA_FROM_DEVICE);
1518                 buffer_info->dma = 0;
1519
1520                 length = le16_to_cpu(rx_desc->wb.upper.length);
1521
1522                 /* errors is only valid for DD + EOP descriptors */
1523                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1524                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1525                               !(netdev->features & NETIF_F_RXALL)))) {
1526                         /* recycle both page and skb */
1527                         buffer_info->skb = skb;
1528                         /* an error means any chain goes out the window too */
1529                         if (rx_ring->rx_skb_top)
1530                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1531                         rx_ring->rx_skb_top = NULL;
1532                         goto next_desc;
1533                 }
1534 #define rxtop (rx_ring->rx_skb_top)
1535                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1536                         /* this descriptor is only the beginning (or middle) */
1537                         if (!rxtop) {
1538                                 /* this is the beginning of a chain */
1539                                 rxtop = skb;
1540                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1541                                                    0, length);
1542                         } else {
1543                                 /* this is the middle of a chain */
1544                                 shinfo = skb_shinfo(rxtop);
1545                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1546                                                    buffer_info->page, 0,
1547                                                    length);
1548                                 /* re-use the skb, only consumed the page */
1549                                 buffer_info->skb = skb;
1550                         }
1551                         e1000_consume_page(buffer_info, rxtop, length);
1552                         goto next_desc;
1553                 } else {
1554                         if (rxtop) {
1555                                 /* end of the chain */
1556                                 shinfo = skb_shinfo(rxtop);
1557                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1558                                                    buffer_info->page, 0,
1559                                                    length);
1560                                 /* re-use the current skb, we only consumed the
1561                                  * page
1562                                  */
1563                                 buffer_info->skb = skb;
1564                                 skb = rxtop;
1565                                 rxtop = NULL;
1566                                 e1000_consume_page(buffer_info, skb, length);
1567                         } else {
1568                                 /* no chain, got EOP, this buf is the packet
1569                                  * copybreak to save the put_page/alloc_page
1570                                  */
1571                                 if (length <= copybreak &&
1572                                     skb_tailroom(skb) >= length) {
1573                                         u8 *vaddr;
1574                                         vaddr = kmap_atomic(buffer_info->page);
1575                                         memcpy(skb_tail_pointer(skb), vaddr,
1576                                                length);
1577                                         kunmap_atomic(vaddr);
1578                                         /* re-use the page, so don't erase
1579                                          * buffer_info->page
1580                                          */
1581                                         skb_put(skb, length);
1582                                 } else {
1583                                         skb_fill_page_desc(skb, 0,
1584                                                            buffer_info->page, 0,
1585                                                            length);
1586                                         e1000_consume_page(buffer_info, skb,
1587                                                            length);
1588                                 }
1589                         }
1590                 }
1591
1592                 /* Receive Checksum Offload */
1593                 e1000_rx_checksum(adapter, staterr, skb);
1594
1595                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1596
1597                 /* probably a little skewed due to removing CRC */
1598                 total_rx_bytes += skb->len;
1599                 total_rx_packets++;
1600
1601                 /* eth type trans needs skb->data to point to something */
1602                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1603                         e_err("pskb_may_pull failed.\n");
1604                         dev_kfree_skb_irq(skb);
1605                         goto next_desc;
1606                 }
1607
1608                 e1000_receive_skb(adapter, netdev, skb, staterr,
1609                                   rx_desc->wb.upper.vlan);
1610
1611 next_desc:
1612                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1613
1614                 /* return some buffers to hardware, one at a time is too slow */
1615                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1616                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1617                                               GFP_ATOMIC);
1618                         cleaned_count = 0;
1619                 }
1620
1621                 /* use prefetched values */
1622                 rx_desc = next_rxd;
1623                 buffer_info = next_buffer;
1624
1625                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1626         }
1627         rx_ring->next_to_clean = i;
1628
1629         cleaned_count = e1000_desc_unused(rx_ring);
1630         if (cleaned_count)
1631                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1632
1633         adapter->total_rx_bytes += total_rx_bytes;
1634         adapter->total_rx_packets += total_rx_packets;
1635         return cleaned;
1636 }
1637
1638 /**
1639  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1640  * @rx_ring: Rx descriptor ring
1641  **/
1642 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1643 {
1644         struct e1000_adapter *adapter = rx_ring->adapter;
1645         struct e1000_buffer *buffer_info;
1646         struct e1000_ps_page *ps_page;
1647         struct pci_dev *pdev = adapter->pdev;
1648         unsigned int i, j;
1649
1650         /* Free all the Rx ring sk_buffs */
1651         for (i = 0; i < rx_ring->count; i++) {
1652                 buffer_info = &rx_ring->buffer_info[i];
1653                 if (buffer_info->dma) {
1654                         if (adapter->clean_rx == e1000_clean_rx_irq)
1655                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1656                                                  adapter->rx_buffer_len,
1657                                                  DMA_FROM_DEVICE);
1658                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1659                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1660                                                PAGE_SIZE, DMA_FROM_DEVICE);
1661                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1662                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1663                                                  adapter->rx_ps_bsize0,
1664                                                  DMA_FROM_DEVICE);
1665                         buffer_info->dma = 0;
1666                 }
1667
1668                 if (buffer_info->page) {
1669                         put_page(buffer_info->page);
1670                         buffer_info->page = NULL;
1671                 }
1672
1673                 if (buffer_info->skb) {
1674                         dev_kfree_skb(buffer_info->skb);
1675                         buffer_info->skb = NULL;
1676                 }
1677
1678                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1679                         ps_page = &buffer_info->ps_pages[j];
1680                         if (!ps_page->page)
1681                                 break;
1682                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1683                                        DMA_FROM_DEVICE);
1684                         ps_page->dma = 0;
1685                         put_page(ps_page->page);
1686                         ps_page->page = NULL;
1687                 }
1688         }
1689
1690         /* there also may be some cached data from a chained receive */
1691         if (rx_ring->rx_skb_top) {
1692                 dev_kfree_skb(rx_ring->rx_skb_top);
1693                 rx_ring->rx_skb_top = NULL;
1694         }
1695
1696         /* Zero out the descriptor ring */
1697         memset(rx_ring->desc, 0, rx_ring->size);
1698
1699         rx_ring->next_to_clean = 0;
1700         rx_ring->next_to_use = 0;
1701         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1702
1703         writel(0, rx_ring->head);
1704         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
1705                 e1000e_update_rdt_wa(rx_ring, 0);
1706         else
1707                 writel(0, rx_ring->tail);
1708 }
1709
1710 static void e1000e_downshift_workaround(struct work_struct *work)
1711 {
1712         struct e1000_adapter *adapter = container_of(work,
1713                                                      struct e1000_adapter,
1714                                                      downshift_task);
1715
1716         if (test_bit(__E1000_DOWN, &adapter->state))
1717                 return;
1718
1719         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1720 }
1721
1722 /**
1723  * e1000_intr_msi - Interrupt Handler
1724  * @irq: interrupt number
1725  * @data: pointer to a network interface device structure
1726  **/
1727 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1728 {
1729         struct net_device *netdev = data;
1730         struct e1000_adapter *adapter = netdev_priv(netdev);
1731         struct e1000_hw *hw = &adapter->hw;
1732         u32 icr = er32(ICR);
1733
1734         /* read ICR disables interrupts using IAM */
1735         if (icr & E1000_ICR_LSC) {
1736                 hw->mac.get_link_status = true;
1737                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1738                  * disconnect (LSC) before accessing any PHY registers
1739                  */
1740                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1741                     (!(er32(STATUS) & E1000_STATUS_LU)))
1742                         schedule_work(&adapter->downshift_task);
1743
1744                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1745                  * link down event; disable receives here in the ISR and reset
1746                  * adapter in watchdog
1747                  */
1748                 if (netif_carrier_ok(netdev) &&
1749                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1750                         /* disable receives */
1751                         u32 rctl = er32(RCTL);
1752                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1753                         adapter->flags |= FLAG_RESTART_NOW;
1754                 }
1755                 /* guard against interrupt when we're going down */
1756                 if (!test_bit(__E1000_DOWN, &adapter->state))
1757                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1758         }
1759
1760         /* Reset on uncorrectable ECC error */
1761         if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
1762                 u32 pbeccsts = er32(PBECCSTS);
1763
1764                 adapter->corr_errors +=
1765                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1766                 adapter->uncorr_errors +=
1767                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1768                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1769
1770                 /* Do the reset outside of interrupt context */
1771                 schedule_work(&adapter->reset_task);
1772
1773                 /* return immediately since reset is imminent */
1774                 return IRQ_HANDLED;
1775         }
1776
1777         if (napi_schedule_prep(&adapter->napi)) {
1778                 adapter->total_tx_bytes = 0;
1779                 adapter->total_tx_packets = 0;
1780                 adapter->total_rx_bytes = 0;
1781                 adapter->total_rx_packets = 0;
1782                 __napi_schedule(&adapter->napi);
1783         }
1784
1785         return IRQ_HANDLED;
1786 }
1787
1788 /**
1789  * e1000_intr - Interrupt Handler
1790  * @irq: interrupt number
1791  * @data: pointer to a network interface device structure
1792  **/
1793 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1794 {
1795         struct net_device *netdev = data;
1796         struct e1000_adapter *adapter = netdev_priv(netdev);
1797         struct e1000_hw *hw = &adapter->hw;
1798         u32 rctl, icr = er32(ICR);
1799
1800         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1801                 return IRQ_NONE;        /* Not our interrupt */
1802
1803         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1804          * not set, then the adapter didn't send an interrupt
1805          */
1806         if (!(icr & E1000_ICR_INT_ASSERTED))
1807                 return IRQ_NONE;
1808
1809         /* Interrupt Auto-Mask...upon reading ICR,
1810          * interrupts are masked.  No need for the
1811          * IMC write
1812          */
1813
1814         if (icr & E1000_ICR_LSC) {
1815                 hw->mac.get_link_status = true;
1816                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1817                  * disconnect (LSC) before accessing any PHY registers
1818                  */
1819                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1820                     (!(er32(STATUS) & E1000_STATUS_LU)))
1821                         schedule_work(&adapter->downshift_task);
1822
1823                 /* 80003ES2LAN workaround--
1824                  * For packet buffer work-around on link down event;
1825                  * disable receives here in the ISR and
1826                  * reset adapter in watchdog
1827                  */
1828                 if (netif_carrier_ok(netdev) &&
1829                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1830                         /* disable receives */
1831                         rctl = er32(RCTL);
1832                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1833                         adapter->flags |= FLAG_RESTART_NOW;
1834                 }
1835                 /* guard against interrupt when we're going down */
1836                 if (!test_bit(__E1000_DOWN, &adapter->state))
1837                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1838         }
1839
1840         /* Reset on uncorrectable ECC error */
1841         if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
1842                 u32 pbeccsts = er32(PBECCSTS);
1843
1844                 adapter->corr_errors +=
1845                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1846                 adapter->uncorr_errors +=
1847                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1848                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1849
1850                 /* Do the reset outside of interrupt context */
1851                 schedule_work(&adapter->reset_task);
1852
1853                 /* return immediately since reset is imminent */
1854                 return IRQ_HANDLED;
1855         }
1856
1857         if (napi_schedule_prep(&adapter->napi)) {
1858                 adapter->total_tx_bytes = 0;
1859                 adapter->total_tx_packets = 0;
1860                 adapter->total_rx_bytes = 0;
1861                 adapter->total_rx_packets = 0;
1862                 __napi_schedule(&adapter->napi);
1863         }
1864
1865         return IRQ_HANDLED;
1866 }
1867
1868 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1869 {
1870         struct net_device *netdev = data;
1871         struct e1000_adapter *adapter = netdev_priv(netdev);
1872         struct e1000_hw *hw = &adapter->hw;
1873         u32 icr = er32(ICR);
1874
1875         if (!(icr & E1000_ICR_INT_ASSERTED)) {
1876                 if (!test_bit(__E1000_DOWN, &adapter->state))
1877                         ew32(IMS, E1000_IMS_OTHER);
1878                 return IRQ_NONE;
1879         }
1880
1881         if (icr & adapter->eiac_mask)
1882                 ew32(ICS, (icr & adapter->eiac_mask));
1883
1884         if (icr & E1000_ICR_OTHER) {
1885                 if (!(icr & E1000_ICR_LSC))
1886                         goto no_link_interrupt;
1887                 hw->mac.get_link_status = true;
1888                 /* guard against interrupt when we're going down */
1889                 if (!test_bit(__E1000_DOWN, &adapter->state))
1890                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1891         }
1892
1893 no_link_interrupt:
1894         if (!test_bit(__E1000_DOWN, &adapter->state))
1895                 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1896
1897         return IRQ_HANDLED;
1898 }
1899
1900 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1901 {
1902         struct net_device *netdev = data;
1903         struct e1000_adapter *adapter = netdev_priv(netdev);
1904         struct e1000_hw *hw = &adapter->hw;
1905         struct e1000_ring *tx_ring = adapter->tx_ring;
1906
1907         adapter->total_tx_bytes = 0;
1908         adapter->total_tx_packets = 0;
1909
1910         if (!e1000_clean_tx_irq(tx_ring))
1911                 /* Ring was not completely cleaned, so fire another interrupt */
1912                 ew32(ICS, tx_ring->ims_val);
1913
1914         return IRQ_HANDLED;
1915 }
1916
1917 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1918 {
1919         struct net_device *netdev = data;
1920         struct e1000_adapter *adapter = netdev_priv(netdev);
1921         struct e1000_ring *rx_ring = adapter->rx_ring;
1922
1923         /* Write the ITR value calculated at the end of the
1924          * previous interrupt.
1925          */
1926         if (rx_ring->set_itr) {
1927                 writel(1000000000 / (rx_ring->itr_val * 256),
1928                        rx_ring->itr_register);
1929                 rx_ring->set_itr = 0;
1930         }
1931
1932         if (napi_schedule_prep(&adapter->napi)) {
1933                 adapter->total_rx_bytes = 0;
1934                 adapter->total_rx_packets = 0;
1935                 __napi_schedule(&adapter->napi);
1936         }
1937         return IRQ_HANDLED;
1938 }
1939
1940 /**
1941  * e1000_configure_msix - Configure MSI-X hardware
1942  *
1943  * e1000_configure_msix sets up the hardware to properly
1944  * generate MSI-X interrupts.
1945  **/
1946 static void e1000_configure_msix(struct e1000_adapter *adapter)
1947 {
1948         struct e1000_hw *hw = &adapter->hw;
1949         struct e1000_ring *rx_ring = adapter->rx_ring;
1950         struct e1000_ring *tx_ring = adapter->tx_ring;
1951         int vector = 0;
1952         u32 ctrl_ext, ivar = 0;
1953
1954         adapter->eiac_mask = 0;
1955
1956         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1957         if (hw->mac.type == e1000_82574) {
1958                 u32 rfctl = er32(RFCTL);
1959                 rfctl |= E1000_RFCTL_ACK_DIS;
1960                 ew32(RFCTL, rfctl);
1961         }
1962
1963         /* Configure Rx vector */
1964         rx_ring->ims_val = E1000_IMS_RXQ0;
1965         adapter->eiac_mask |= rx_ring->ims_val;
1966         if (rx_ring->itr_val)
1967                 writel(1000000000 / (rx_ring->itr_val * 256),
1968                        rx_ring->itr_register);
1969         else
1970                 writel(1, rx_ring->itr_register);
1971         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1972
1973         /* Configure Tx vector */
1974         tx_ring->ims_val = E1000_IMS_TXQ0;
1975         vector++;
1976         if (tx_ring->itr_val)
1977                 writel(1000000000 / (tx_ring->itr_val * 256),
1978                        tx_ring->itr_register);
1979         else
1980                 writel(1, tx_ring->itr_register);
1981         adapter->eiac_mask |= tx_ring->ims_val;
1982         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1983
1984         /* set vector for Other Causes, e.g. link changes */
1985         vector++;
1986         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1987         if (rx_ring->itr_val)
1988                 writel(1000000000 / (rx_ring->itr_val * 256),
1989                        hw->hw_addr + E1000_EITR_82574(vector));
1990         else
1991                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1992
1993         /* Cause Tx interrupts on every write back */
1994         ivar |= (1 << 31);
1995
1996         ew32(IVAR, ivar);
1997
1998         /* enable MSI-X PBA support */
1999         ctrl_ext = er32(CTRL_EXT);
2000         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
2001
2002         /* Auto-Mask Other interrupts upon ICR read */
2003         ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
2004         ctrl_ext |= E1000_CTRL_EXT_EIAME;
2005         ew32(CTRL_EXT, ctrl_ext);
2006         e1e_flush();
2007 }
2008
2009 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2010 {
2011         if (adapter->msix_entries) {
2012                 pci_disable_msix(adapter->pdev);
2013                 kfree(adapter->msix_entries);
2014                 adapter->msix_entries = NULL;
2015         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2016                 pci_disable_msi(adapter->pdev);
2017                 adapter->flags &= ~FLAG_MSI_ENABLED;
2018         }
2019 }
2020
2021 /**
2022  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2023  *
2024  * Attempt to configure interrupts using the best available
2025  * capabilities of the hardware and kernel.
2026  **/
2027 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2028 {
2029         int err;
2030         int i;
2031
2032         switch (adapter->int_mode) {
2033         case E1000E_INT_MODE_MSIX:
2034                 if (adapter->flags & FLAG_HAS_MSIX) {
2035                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2036                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2037                                                         sizeof(struct
2038                                                                msix_entry),
2039                                                         GFP_KERNEL);
2040                         if (adapter->msix_entries) {
2041                                 struct e1000_adapter *a = adapter;
2042
2043                                 for (i = 0; i < adapter->num_vectors; i++)
2044                                         adapter->msix_entries[i].entry = i;
2045
2046                                 err = pci_enable_msix_range(a->pdev,
2047                                                             a->msix_entries,
2048                                                             a->num_vectors,
2049                                                             a->num_vectors);
2050                                 if (err > 0)
2051                                         return;
2052                         }
2053                         /* MSI-X failed, so fall through and try MSI */
2054                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2055                         e1000e_reset_interrupt_capability(adapter);
2056                 }
2057                 adapter->int_mode = E1000E_INT_MODE_MSI;
2058                 /* Fall through */
2059         case E1000E_INT_MODE_MSI:
2060                 if (!pci_enable_msi(adapter->pdev)) {
2061                         adapter->flags |= FLAG_MSI_ENABLED;
2062                 } else {
2063                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2064                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2065                 }
2066                 /* Fall through */
2067         case E1000E_INT_MODE_LEGACY:
2068                 /* Don't do anything; this is the system default */
2069                 break;
2070         }
2071
2072         /* store the number of vectors being used */
2073         adapter->num_vectors = 1;
2074 }
2075
2076 /**
2077  * e1000_request_msix - Initialize MSI-X interrupts
2078  *
2079  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2080  * kernel.
2081  **/
2082 static int e1000_request_msix(struct e1000_adapter *adapter)
2083 {
2084         struct net_device *netdev = adapter->netdev;
2085         int err = 0, vector = 0;
2086
2087         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2088                 snprintf(adapter->rx_ring->name,
2089                          sizeof(adapter->rx_ring->name) - 1,
2090                          "%s-rx-0", netdev->name);
2091         else
2092                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2093         err = request_irq(adapter->msix_entries[vector].vector,
2094                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2095                           netdev);
2096         if (err)
2097                 return err;
2098         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2099             E1000_EITR_82574(vector);
2100         adapter->rx_ring->itr_val = adapter->itr;
2101         vector++;
2102
2103         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2104                 snprintf(adapter->tx_ring->name,
2105                          sizeof(adapter->tx_ring->name) - 1,
2106                          "%s-tx-0", netdev->name);
2107         else
2108                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2109         err = request_irq(adapter->msix_entries[vector].vector,
2110                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2111                           netdev);
2112         if (err)
2113                 return err;
2114         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2115             E1000_EITR_82574(vector);
2116         adapter->tx_ring->itr_val = adapter->itr;
2117         vector++;
2118
2119         err = request_irq(adapter->msix_entries[vector].vector,
2120                           e1000_msix_other, 0, netdev->name, netdev);
2121         if (err)
2122                 return err;
2123
2124         e1000_configure_msix(adapter);
2125
2126         return 0;
2127 }
2128
2129 /**
2130  * e1000_request_irq - initialize interrupts
2131  *
2132  * Attempts to configure interrupts using the best available
2133  * capabilities of the hardware and kernel.
2134  **/
2135 static int e1000_request_irq(struct e1000_adapter *adapter)
2136 {
2137         struct net_device *netdev = adapter->netdev;
2138         int err;
2139
2140         if (adapter->msix_entries) {
2141                 err = e1000_request_msix(adapter);
2142                 if (!err)
2143                         return err;
2144                 /* fall back to MSI */
2145                 e1000e_reset_interrupt_capability(adapter);
2146                 adapter->int_mode = E1000E_INT_MODE_MSI;
2147                 e1000e_set_interrupt_capability(adapter);
2148         }
2149         if (adapter->flags & FLAG_MSI_ENABLED) {
2150                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2151                                   netdev->name, netdev);
2152                 if (!err)
2153                         return err;
2154
2155                 /* fall back to legacy interrupt */
2156                 e1000e_reset_interrupt_capability(adapter);
2157                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2158         }
2159
2160         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2161                           netdev->name, netdev);
2162         if (err)
2163                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2164
2165         return err;
2166 }
2167
2168 static void e1000_free_irq(struct e1000_adapter *adapter)
2169 {
2170         struct net_device *netdev = adapter->netdev;
2171
2172         if (adapter->msix_entries) {
2173                 int vector = 0;
2174
2175                 free_irq(adapter->msix_entries[vector].vector, netdev);
2176                 vector++;
2177
2178                 free_irq(adapter->msix_entries[vector].vector, netdev);
2179                 vector++;
2180
2181                 /* Other Causes interrupt vector */
2182                 free_irq(adapter->msix_entries[vector].vector, netdev);
2183                 return;
2184         }
2185
2186         free_irq(adapter->pdev->irq, netdev);
2187 }
2188
2189 /**
2190  * e1000_irq_disable - Mask off interrupt generation on the NIC
2191  **/
2192 static void e1000_irq_disable(struct e1000_adapter *adapter)
2193 {
2194         struct e1000_hw *hw = &adapter->hw;
2195
2196         ew32(IMC, ~0);
2197         if (adapter->msix_entries)
2198                 ew32(EIAC_82574, 0);
2199         e1e_flush();
2200
2201         if (adapter->msix_entries) {
2202                 int i;
2203                 for (i = 0; i < adapter->num_vectors; i++)
2204                         synchronize_irq(adapter->msix_entries[i].vector);
2205         } else {
2206                 synchronize_irq(adapter->pdev->irq);
2207         }
2208 }
2209
2210 /**
2211  * e1000_irq_enable - Enable default interrupt generation settings
2212  **/
2213 static void e1000_irq_enable(struct e1000_adapter *adapter)
2214 {
2215         struct e1000_hw *hw = &adapter->hw;
2216
2217         if (adapter->msix_entries) {
2218                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2219                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2220         } else if (hw->mac.type == e1000_pch_lpt) {
2221                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2222         } else {
2223                 ew32(IMS, IMS_ENABLE_MASK);
2224         }
2225         e1e_flush();
2226 }
2227
2228 /**
2229  * e1000e_get_hw_control - get control of the h/w from f/w
2230  * @adapter: address of board private structure
2231  *
2232  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2233  * For ASF and Pass Through versions of f/w this means that
2234  * the driver is loaded. For AMT version (only with 82573)
2235  * of the f/w this means that the network i/f is open.
2236  **/
2237 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2238 {
2239         struct e1000_hw *hw = &adapter->hw;
2240         u32 ctrl_ext;
2241         u32 swsm;
2242
2243         /* Let firmware know the driver has taken over */
2244         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2245                 swsm = er32(SWSM);
2246                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2247         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2248                 ctrl_ext = er32(CTRL_EXT);
2249                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2250         }
2251 }
2252
2253 /**
2254  * e1000e_release_hw_control - release control of the h/w to f/w
2255  * @adapter: address of board private structure
2256  *
2257  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2258  * For ASF and Pass Through versions of f/w this means that the
2259  * driver is no longer loaded. For AMT version (only with 82573) i
2260  * of the f/w this means that the network i/f is closed.
2261  *
2262  **/
2263 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2264 {
2265         struct e1000_hw *hw = &adapter->hw;
2266         u32 ctrl_ext;
2267         u32 swsm;
2268
2269         /* Let firmware taken over control of h/w */
2270         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2271                 swsm = er32(SWSM);
2272                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2273         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2274                 ctrl_ext = er32(CTRL_EXT);
2275                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2276         }
2277 }
2278
2279 /**
2280  * e1000_alloc_ring_dma - allocate memory for a ring structure
2281  **/
2282 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2283                                 struct e1000_ring *ring)
2284 {
2285         struct pci_dev *pdev = adapter->pdev;
2286
2287         ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2288                                         GFP_KERNEL);
2289         if (!ring->desc)
2290                 return -ENOMEM;
2291
2292         return 0;
2293 }
2294
2295 /**
2296  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2297  * @tx_ring: Tx descriptor ring
2298  *
2299  * Return 0 on success, negative on failure
2300  **/
2301 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2302 {
2303         struct e1000_adapter *adapter = tx_ring->adapter;
2304         int err = -ENOMEM, size;
2305
2306         size = sizeof(struct e1000_buffer) * tx_ring->count;
2307         tx_ring->buffer_info = vzalloc(size);
2308         if (!tx_ring->buffer_info)
2309                 goto err;
2310
2311         /* round up to nearest 4K */
2312         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2313         tx_ring->size = ALIGN(tx_ring->size, 4096);
2314
2315         err = e1000_alloc_ring_dma(adapter, tx_ring);
2316         if (err)
2317                 goto err;
2318
2319         tx_ring->next_to_use = 0;
2320         tx_ring->next_to_clean = 0;
2321
2322         return 0;
2323 err:
2324         vfree(tx_ring->buffer_info);
2325         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2326         return err;
2327 }
2328
2329 /**
2330  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2331  * @rx_ring: Rx descriptor ring
2332  *
2333  * Returns 0 on success, negative on failure
2334  **/
2335 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2336 {
2337         struct e1000_adapter *adapter = rx_ring->adapter;
2338         struct e1000_buffer *buffer_info;
2339         int i, size, desc_len, err = -ENOMEM;
2340
2341         size = sizeof(struct e1000_buffer) * rx_ring->count;
2342         rx_ring->buffer_info = vzalloc(size);
2343         if (!rx_ring->buffer_info)
2344                 goto err;
2345
2346         for (i = 0; i < rx_ring->count; i++) {
2347                 buffer_info = &rx_ring->buffer_info[i];
2348                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2349                                                 sizeof(struct e1000_ps_page),
2350                                                 GFP_KERNEL);
2351                 if (!buffer_info->ps_pages)
2352                         goto err_pages;
2353         }
2354
2355         desc_len = sizeof(union e1000_rx_desc_packet_split);
2356
2357         /* Round up to nearest 4K */
2358         rx_ring->size = rx_ring->count * desc_len;
2359         rx_ring->size = ALIGN(rx_ring->size, 4096);
2360
2361         err = e1000_alloc_ring_dma(adapter, rx_ring);
2362         if (err)
2363                 goto err_pages;
2364
2365         rx_ring->next_to_clean = 0;
2366         rx_ring->next_to_use = 0;
2367         rx_ring->rx_skb_top = NULL;
2368
2369         return 0;
2370
2371 err_pages:
2372         for (i = 0; i < rx_ring->count; i++) {
2373                 buffer_info = &rx_ring->buffer_info[i];
2374                 kfree(buffer_info->ps_pages);
2375         }
2376 err:
2377         vfree(rx_ring->buffer_info);
2378         e_err("Unable to allocate memory for the receive descriptor ring\n");
2379         return err;
2380 }
2381
2382 /**
2383  * e1000_clean_tx_ring - Free Tx Buffers
2384  * @tx_ring: Tx descriptor ring
2385  **/
2386 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2387 {
2388         struct e1000_adapter *adapter = tx_ring->adapter;
2389         struct e1000_buffer *buffer_info;
2390         unsigned long size;
2391         unsigned int i;
2392
2393         for (i = 0; i < tx_ring->count; i++) {
2394                 buffer_info = &tx_ring->buffer_info[i];
2395                 e1000_put_txbuf(tx_ring, buffer_info);
2396         }
2397
2398         netdev_reset_queue(adapter->netdev);
2399         size = sizeof(struct e1000_buffer) * tx_ring->count;
2400         memset(tx_ring->buffer_info, 0, size);
2401
2402         memset(tx_ring->desc, 0, tx_ring->size);
2403
2404         tx_ring->next_to_use = 0;
2405         tx_ring->next_to_clean = 0;
2406
2407         writel(0, tx_ring->head);
2408         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2409                 e1000e_update_tdt_wa(tx_ring, 0);
2410         else
2411                 writel(0, tx_ring->tail);
2412 }
2413
2414 /**
2415  * e1000e_free_tx_resources - Free Tx Resources per Queue
2416  * @tx_ring: Tx descriptor ring
2417  *
2418  * Free all transmit software resources
2419  **/
2420 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2421 {
2422         struct e1000_adapter *adapter = tx_ring->adapter;
2423         struct pci_dev *pdev = adapter->pdev;
2424
2425         e1000_clean_tx_ring(tx_ring);
2426
2427         vfree(tx_ring->buffer_info);
2428         tx_ring->buffer_info = NULL;
2429
2430         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2431                           tx_ring->dma);
2432         tx_ring->desc = NULL;
2433 }
2434
2435 /**
2436  * e1000e_free_rx_resources - Free Rx Resources
2437  * @rx_ring: Rx descriptor ring
2438  *
2439  * Free all receive software resources
2440  **/
2441 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2442 {
2443         struct e1000_adapter *adapter = rx_ring->adapter;
2444         struct pci_dev *pdev = adapter->pdev;
2445         int i;
2446
2447         e1000_clean_rx_ring(rx_ring);
2448
2449         for (i = 0; i < rx_ring->count; i++)
2450                 kfree(rx_ring->buffer_info[i].ps_pages);
2451
2452         vfree(rx_ring->buffer_info);
2453         rx_ring->buffer_info = NULL;
2454
2455         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2456                           rx_ring->dma);
2457         rx_ring->desc = NULL;
2458 }
2459
2460 /**
2461  * e1000_update_itr - update the dynamic ITR value based on statistics
2462  * @adapter: pointer to adapter
2463  * @itr_setting: current adapter->itr
2464  * @packets: the number of packets during this measurement interval
2465  * @bytes: the number of bytes during this measurement interval
2466  *
2467  *      Stores a new ITR value based on packets and byte
2468  *      counts during the last interrupt.  The advantage of per interrupt
2469  *      computation is faster updates and more accurate ITR for the current
2470  *      traffic pattern.  Constants in this function were computed
2471  *      based on theoretical maximum wire speed and thresholds were set based
2472  *      on testing data as well as attempting to minimize response time
2473  *      while increasing bulk throughput.  This functionality is controlled
2474  *      by the InterruptThrottleRate module parameter.
2475  **/
2476 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2477 {
2478         unsigned int retval = itr_setting;
2479
2480         if (packets == 0)
2481                 return itr_setting;
2482
2483         switch (itr_setting) {
2484         case lowest_latency:
2485                 /* handle TSO and jumbo frames */
2486                 if (bytes / packets > 8000)
2487                         retval = bulk_latency;
2488                 else if ((packets < 5) && (bytes > 512))
2489                         retval = low_latency;
2490                 break;
2491         case low_latency:       /* 50 usec aka 20000 ints/s */
2492                 if (bytes > 10000) {
2493                         /* this if handles the TSO accounting */
2494                         if (bytes / packets > 8000)
2495                                 retval = bulk_latency;
2496                         else if ((packets < 10) || ((bytes / packets) > 1200))
2497                                 retval = bulk_latency;
2498                         else if ((packets > 35))
2499                                 retval = lowest_latency;
2500                 } else if (bytes / packets > 2000) {
2501                         retval = bulk_latency;
2502                 } else if (packets <= 2 && bytes < 512) {
2503                         retval = lowest_latency;
2504                 }
2505                 break;
2506         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2507                 if (bytes > 25000) {
2508                         if (packets > 35)
2509                                 retval = low_latency;
2510                 } else if (bytes < 6000) {
2511                         retval = low_latency;
2512                 }
2513                 break;
2514         }
2515
2516         return retval;
2517 }
2518
2519 static void e1000_set_itr(struct e1000_adapter *adapter)
2520 {
2521         u16 current_itr;
2522         u32 new_itr = adapter->itr;
2523
2524         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2525         if (adapter->link_speed != SPEED_1000) {
2526                 current_itr = 0;
2527                 new_itr = 4000;
2528                 goto set_itr_now;
2529         }
2530
2531         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2532                 new_itr = 0;
2533                 goto set_itr_now;
2534         }
2535
2536         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2537                                            adapter->total_tx_packets,
2538                                            adapter->total_tx_bytes);
2539         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2540         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2541                 adapter->tx_itr = low_latency;
2542
2543         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2544                                            adapter->total_rx_packets,
2545                                            adapter->total_rx_bytes);
2546         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2547         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2548                 adapter->rx_itr = low_latency;
2549
2550         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2551
2552         /* counts and packets in update_itr are dependent on these numbers */
2553         switch (current_itr) {
2554         case lowest_latency:
2555                 new_itr = 70000;
2556                 break;
2557         case low_latency:
2558                 new_itr = 20000;        /* aka hwitr = ~200 */
2559                 break;
2560         case bulk_latency:
2561                 new_itr = 4000;
2562                 break;
2563         default:
2564                 break;
2565         }
2566
2567 set_itr_now:
2568         if (new_itr != adapter->itr) {
2569                 /* this attempts to bias the interrupt rate towards Bulk
2570                  * by adding intermediate steps when interrupt rate is
2571                  * increasing
2572                  */
2573                 new_itr = new_itr > adapter->itr ?
2574                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2575                 adapter->itr = new_itr;
2576                 adapter->rx_ring->itr_val = new_itr;
2577                 if (adapter->msix_entries)
2578                         adapter->rx_ring->set_itr = 1;
2579                 else
2580                         e1000e_write_itr(adapter, new_itr);
2581         }
2582 }
2583
2584 /**
2585  * e1000e_write_itr - write the ITR value to the appropriate registers
2586  * @adapter: address of board private structure
2587  * @itr: new ITR value to program
2588  *
2589  * e1000e_write_itr determines if the adapter is in MSI-X mode
2590  * and, if so, writes the EITR registers with the ITR value.
2591  * Otherwise, it writes the ITR value into the ITR register.
2592  **/
2593 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2594 {
2595         struct e1000_hw *hw = &adapter->hw;
2596         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2597
2598         if (adapter->msix_entries) {
2599                 int vector;
2600
2601                 for (vector = 0; vector < adapter->num_vectors; vector++)
2602                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2603         } else {
2604                 ew32(ITR, new_itr);
2605         }
2606 }
2607
2608 /**
2609  * e1000_alloc_queues - Allocate memory for all rings
2610  * @adapter: board private structure to initialize
2611  **/
2612 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2613 {
2614         int size = sizeof(struct e1000_ring);
2615
2616         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2617         if (!adapter->tx_ring)
2618                 goto err;
2619         adapter->tx_ring->count = adapter->tx_ring_count;
2620         adapter->tx_ring->adapter = adapter;
2621
2622         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2623         if (!adapter->rx_ring)
2624                 goto err;
2625         adapter->rx_ring->count = adapter->rx_ring_count;
2626         adapter->rx_ring->adapter = adapter;
2627
2628         return 0;
2629 err:
2630         e_err("Unable to allocate memory for queues\n");
2631         kfree(adapter->rx_ring);
2632         kfree(adapter->tx_ring);
2633         return -ENOMEM;
2634 }
2635
2636 /**
2637  * e1000e_poll - NAPI Rx polling callback
2638  * @napi: struct associated with this polling callback
2639  * @weight: number of packets driver is allowed to process this poll
2640  **/
2641 static int e1000e_poll(struct napi_struct *napi, int weight)
2642 {
2643         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2644                                                      napi);
2645         struct e1000_hw *hw = &adapter->hw;
2646         struct net_device *poll_dev = adapter->netdev;
2647         int tx_cleaned = 1, work_done = 0;
2648
2649         adapter = netdev_priv(poll_dev);
2650
2651         if (!adapter->msix_entries ||
2652             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2653                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2654
2655         adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2656
2657         if (!tx_cleaned)
2658                 work_done = weight;
2659
2660         /* If weight not fully consumed, exit the polling mode */
2661         if (work_done < weight) {
2662                 if (adapter->itr_setting & 3)
2663                         e1000_set_itr(adapter);
2664                 napi_complete(napi);
2665                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2666                         if (adapter->msix_entries)
2667                                 ew32(IMS, adapter->rx_ring->ims_val);
2668                         else
2669                                 e1000_irq_enable(adapter);
2670                 }
2671         }
2672
2673         return work_done;
2674 }
2675
2676 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2677                                  __always_unused __be16 proto, u16 vid)
2678 {
2679         struct e1000_adapter *adapter = netdev_priv(netdev);
2680         struct e1000_hw *hw = &adapter->hw;
2681         u32 vfta, index;
2682
2683         /* don't update vlan cookie if already programmed */
2684         if ((adapter->hw.mng_cookie.status &
2685              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2686             (vid == adapter->mng_vlan_id))
2687                 return 0;
2688
2689         /* add VID to filter table */
2690         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2691                 index = (vid >> 5) & 0x7F;
2692                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2693                 vfta |= (1 << (vid & 0x1F));
2694                 hw->mac.ops.write_vfta(hw, index, vfta);
2695         }
2696
2697         set_bit(vid, adapter->active_vlans);
2698
2699         return 0;
2700 }
2701
2702 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2703                                   __always_unused __be16 proto, u16 vid)
2704 {
2705         struct e1000_adapter *adapter = netdev_priv(netdev);
2706         struct e1000_hw *hw = &adapter->hw;
2707         u32 vfta, index;
2708
2709         if ((adapter->hw.mng_cookie.status &
2710              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2711             (vid == adapter->mng_vlan_id)) {
2712                 /* release control to f/w */
2713                 e1000e_release_hw_control(adapter);
2714                 return 0;
2715         }
2716
2717         /* remove VID from filter table */
2718         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2719                 index = (vid >> 5) & 0x7F;
2720                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2721                 vfta &= ~(1 << (vid & 0x1F));
2722                 hw->mac.ops.write_vfta(hw, index, vfta);
2723         }
2724
2725         clear_bit(vid, adapter->active_vlans);
2726
2727         return 0;
2728 }
2729
2730 /**
2731  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2732  * @adapter: board private structure to initialize
2733  **/
2734 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2735 {
2736         struct net_device *netdev = adapter->netdev;
2737         struct e1000_hw *hw = &adapter->hw;
2738         u32 rctl;
2739
2740         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2741                 /* disable VLAN receive filtering */
2742                 rctl = er32(RCTL);
2743                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2744                 ew32(RCTL, rctl);
2745
2746                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2747                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2748                                                adapter->mng_vlan_id);
2749                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2750                 }
2751         }
2752 }
2753
2754 /**
2755  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2756  * @adapter: board private structure to initialize
2757  **/
2758 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2759 {
2760         struct e1000_hw *hw = &adapter->hw;
2761         u32 rctl;
2762
2763         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2764                 /* enable VLAN receive filtering */
2765                 rctl = er32(RCTL);
2766                 rctl |= E1000_RCTL_VFE;
2767                 rctl &= ~E1000_RCTL_CFIEN;
2768                 ew32(RCTL, rctl);
2769         }
2770 }
2771
2772 /**
2773  * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2774  * @adapter: board private structure to initialize
2775  **/
2776 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2777 {
2778         struct e1000_hw *hw = &adapter->hw;
2779         u32 ctrl;
2780
2781         /* disable VLAN tag insert/strip */
2782         ctrl = er32(CTRL);
2783         ctrl &= ~E1000_CTRL_VME;
2784         ew32(CTRL, ctrl);
2785 }
2786
2787 /**
2788  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2789  * @adapter: board private structure to initialize
2790  **/
2791 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2792 {
2793         struct e1000_hw *hw = &adapter->hw;
2794         u32 ctrl;
2795
2796         /* enable VLAN tag insert/strip */
2797         ctrl = er32(CTRL);
2798         ctrl |= E1000_CTRL_VME;
2799         ew32(CTRL, ctrl);
2800 }
2801
2802 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2803 {
2804         struct net_device *netdev = adapter->netdev;
2805         u16 vid = adapter->hw.mng_cookie.vlan_id;
2806         u16 old_vid = adapter->mng_vlan_id;
2807
2808         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2809                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2810                 adapter->mng_vlan_id = vid;
2811         }
2812
2813         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2814                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2815 }
2816
2817 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2818 {
2819         u16 vid;
2820
2821         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2822
2823         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2824             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2825 }
2826
2827 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2828 {
2829         struct e1000_hw *hw = &adapter->hw;
2830         u32 manc, manc2h, mdef, i, j;
2831
2832         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2833                 return;
2834
2835         manc = er32(MANC);
2836
2837         /* enable receiving management packets to the host. this will probably
2838          * generate destination unreachable messages from the host OS, but
2839          * the packets will be handled on SMBUS
2840          */
2841         manc |= E1000_MANC_EN_MNG2HOST;
2842         manc2h = er32(MANC2H);
2843
2844         switch (hw->mac.type) {
2845         default:
2846                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2847                 break;
2848         case e1000_82574:
2849         case e1000_82583:
2850                 /* Check if IPMI pass-through decision filter already exists;
2851                  * if so, enable it.
2852                  */
2853                 for (i = 0, j = 0; i < 8; i++) {
2854                         mdef = er32(MDEF(i));
2855
2856                         /* Ignore filters with anything other than IPMI ports */
2857                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2858                                 continue;
2859
2860                         /* Enable this decision filter in MANC2H */
2861                         if (mdef)
2862                                 manc2h |= (1 << i);
2863
2864                         j |= mdef;
2865                 }
2866
2867                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2868                         break;
2869
2870                 /* Create new decision filter in an empty filter */
2871                 for (i = 0, j = 0; i < 8; i++)
2872                         if (er32(MDEF(i)) == 0) {
2873                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2874                                                E1000_MDEF_PORT_664));
2875                                 manc2h |= (1 << 1);
2876                                 j++;
2877                                 break;
2878                         }
2879
2880                 if (!j)
2881                         e_warn("Unable to create IPMI pass-through filter\n");
2882                 break;
2883         }
2884
2885         ew32(MANC2H, manc2h);
2886         ew32(MANC, manc);
2887 }
2888
2889 /**
2890  * e1000_configure_tx - Configure Transmit Unit after Reset
2891  * @adapter: board private structure
2892  *
2893  * Configure the Tx unit of the MAC after a reset.
2894  **/
2895 static void e1000_configure_tx(struct e1000_adapter *adapter)
2896 {
2897         struct e1000_hw *hw = &adapter->hw;
2898         struct e1000_ring *tx_ring = adapter->tx_ring;
2899         u64 tdba;
2900         u32 tdlen, tarc;
2901
2902         /* Setup the HW Tx Head and Tail descriptor pointers */
2903         tdba = tx_ring->dma;
2904         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2905         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2906         ew32(TDBAH(0), (tdba >> 32));
2907         ew32(TDLEN(0), tdlen);
2908         ew32(TDH(0), 0);
2909         ew32(TDT(0), 0);
2910         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2911         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2912
2913         /* Set the Tx Interrupt Delay register */
2914         ew32(TIDV, adapter->tx_int_delay);
2915         /* Tx irq moderation */
2916         ew32(TADV, adapter->tx_abs_int_delay);
2917
2918         if (adapter->flags2 & FLAG2_DMA_BURST) {
2919                 u32 txdctl = er32(TXDCTL(0));
2920                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2921                             E1000_TXDCTL_WTHRESH);
2922                 /* set up some performance related parameters to encourage the
2923                  * hardware to use the bus more efficiently in bursts, depends
2924                  * on the tx_int_delay to be enabled,
2925                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2926                  * hthresh = 1 ==> prefetch when one or more available
2927                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2928                  * BEWARE: this seems to work but should be considered first if
2929                  * there are Tx hangs or other Tx related bugs
2930                  */
2931                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2932                 ew32(TXDCTL(0), txdctl);
2933         }
2934         /* erratum work around: set txdctl the same for both queues */
2935         ew32(TXDCTL(1), er32(TXDCTL(0)));
2936
2937         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2938                 tarc = er32(TARC(0));
2939                 /* set the speed mode bit, we'll clear it if we're not at
2940                  * gigabit link later
2941                  */
2942 #define SPEED_MODE_BIT (1 << 21)
2943                 tarc |= SPEED_MODE_BIT;
2944                 ew32(TARC(0), tarc);
2945         }
2946
2947         /* errata: program both queues to unweighted RR */
2948         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2949                 tarc = er32(TARC(0));
2950                 tarc |= 1;
2951                 ew32(TARC(0), tarc);
2952                 tarc = er32(TARC(1));
2953                 tarc |= 1;
2954                 ew32(TARC(1), tarc);
2955         }
2956
2957         /* Setup Transmit Descriptor Settings for eop descriptor */
2958         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2959
2960         /* only set IDE if we are delaying interrupts using the timers */
2961         if (adapter->tx_int_delay)
2962                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2963
2964         /* enable Report Status bit */
2965         adapter->txd_cmd |= E1000_TXD_CMD_RS;
2966
2967         hw->mac.ops.config_collision_dist(hw);
2968 }
2969
2970 /**
2971  * e1000_setup_rctl - configure the receive control registers
2972  * @adapter: Board private structure
2973  **/
2974 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2975                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2976 static void e1000_setup_rctl(struct e1000_adapter *adapter)
2977 {
2978         struct e1000_hw *hw = &adapter->hw;
2979         u32 rctl, rfctl;
2980         u32 pages = 0;
2981
2982         /* Workaround Si errata on PCHx - configure jumbo frame flow */
2983         if ((hw->mac.type >= e1000_pch2lan) &&
2984             (adapter->netdev->mtu > ETH_DATA_LEN) &&
2985             e1000_lv_jumbo_workaround_ich8lan(hw, true))
2986                 e_dbg("failed to enable jumbo frame workaround mode\n");
2987
2988         /* Program MC offset vector base */
2989         rctl = er32(RCTL);
2990         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2991         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2992             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2993             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2994
2995         /* Do not Store bad packets */
2996         rctl &= ~E1000_RCTL_SBP;
2997
2998         /* Enable Long Packet receive */
2999         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3000                 rctl &= ~E1000_RCTL_LPE;
3001         else
3002                 rctl |= E1000_RCTL_LPE;
3003
3004         /* Some systems expect that the CRC is included in SMBUS traffic. The
3005          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3006          * host memory when this is enabled
3007          */
3008         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3009                 rctl |= E1000_RCTL_SECRC;
3010
3011         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3012         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3013                 u16 phy_data;
3014
3015                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3016                 phy_data &= 0xfff8;
3017                 phy_data |= (1 << 2);
3018                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3019
3020                 e1e_rphy(hw, 22, &phy_data);
3021                 phy_data &= 0x0fff;
3022                 phy_data |= (1 << 14);
3023                 e1e_wphy(hw, 0x10, 0x2823);
3024                 e1e_wphy(hw, 0x11, 0x0003);
3025                 e1e_wphy(hw, 22, phy_data);
3026         }
3027
3028         /* Setup buffer sizes */
3029         rctl &= ~E1000_RCTL_SZ_4096;
3030         rctl |= E1000_RCTL_BSEX;
3031         switch (adapter->rx_buffer_len) {
3032         case 2048:
3033         default:
3034                 rctl |= E1000_RCTL_SZ_2048;
3035                 rctl &= ~E1000_RCTL_BSEX;
3036                 break;
3037         case 4096:
3038                 rctl |= E1000_RCTL_SZ_4096;
3039                 break;
3040         case 8192:
3041                 rctl |= E1000_RCTL_SZ_8192;
3042                 break;
3043         case 16384:
3044                 rctl |= E1000_RCTL_SZ_16384;
3045                 break;
3046         }
3047
3048         /* Enable Extended Status in all Receive Descriptors */
3049         rfctl = er32(RFCTL);
3050         rfctl |= E1000_RFCTL_EXTEN;
3051         ew32(RFCTL, rfctl);
3052
3053         /* 82571 and greater support packet-split where the protocol
3054          * header is placed in skb->data and the packet data is
3055          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3056          * In the case of a non-split, skb->data is linearly filled,
3057          * followed by the page buffers.  Therefore, skb->data is
3058          * sized to hold the largest protocol header.
3059          *
3060          * allocations using alloc_page take too long for regular MTU
3061          * so only enable packet split for jumbo frames
3062          *
3063          * Using pages when the page size is greater than 16k wastes
3064          * a lot of memory, since we allocate 3 pages at all times
3065          * per packet.
3066          */
3067         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3068         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3069                 adapter->rx_ps_pages = pages;
3070         else
3071                 adapter->rx_ps_pages = 0;
3072
3073         if (adapter->rx_ps_pages) {
3074                 u32 psrctl = 0;
3075
3076                 /* Enable Packet split descriptors */
3077                 rctl |= E1000_RCTL_DTYP_PS;
3078
3079                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3080
3081                 switch (adapter->rx_ps_pages) {
3082                 case 3:
3083                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3084                         /* fall-through */
3085                 case 2:
3086                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3087                         /* fall-through */
3088                 case 1:
3089                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3090                         break;
3091                 }
3092
3093                 ew32(PSRCTL, psrctl);
3094         }
3095
3096         /* This is useful for sniffing bad packets. */
3097         if (adapter->netdev->features & NETIF_F_RXALL) {
3098                 /* UPE and MPE will be handled by normal PROMISC logic
3099                  * in e1000e_set_rx_mode
3100                  */
3101                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3102                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3103                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3104
3105                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3106                           E1000_RCTL_DPF |      /* Allow filtered pause */
3107                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3108                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3109                  * and that breaks VLANs.
3110                  */
3111         }
3112
3113         ew32(RCTL, rctl);
3114         /* just started the receive unit, no need to restart */
3115         adapter->flags &= ~FLAG_RESTART_NOW;
3116 }
3117
3118 /**
3119  * e1000_configure_rx - Configure Receive Unit after Reset
3120  * @adapter: board private structure
3121  *
3122  * Configure the Rx unit of the MAC after a reset.
3123  **/
3124 static void e1000_configure_rx(struct e1000_adapter *adapter)
3125 {
3126         struct e1000_hw *hw = &adapter->hw;
3127         struct e1000_ring *rx_ring = adapter->rx_ring;
3128         u64 rdba;
3129         u32 rdlen, rctl, rxcsum, ctrl_ext;
3130
3131         if (adapter->rx_ps_pages) {
3132                 /* this is a 32 byte descriptor */
3133                 rdlen = rx_ring->count *
3134                     sizeof(union e1000_rx_desc_packet_split);
3135                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3136                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3137         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3138                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3139                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3140                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3141         } else {
3142                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3143                 adapter->clean_rx = e1000_clean_rx_irq;
3144                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3145         }
3146
3147         /* disable receives while setting up the descriptors */
3148         rctl = er32(RCTL);
3149         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3150                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3151         e1e_flush();
3152         usleep_range(10000, 20000);
3153
3154         if (adapter->flags2 & FLAG2_DMA_BURST) {
3155                 /* set the writeback threshold (only takes effect if the RDTR
3156                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3157                  * enable prefetching of 0x20 Rx descriptors
3158                  * granularity = 01
3159                  * wthresh = 04,
3160                  * hthresh = 04,
3161                  * pthresh = 0x20
3162                  */
3163                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3164                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3165
3166                 /* override the delay timers for enabling bursting, only if
3167                  * the value was not set by the user via module options
3168                  */
3169                 if (adapter->rx_int_delay == DEFAULT_RDTR)
3170                         adapter->rx_int_delay = BURST_RDTR;
3171                 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3172                         adapter->rx_abs_int_delay = BURST_RADV;
3173         }
3174
3175         /* set the Receive Delay Timer Register */
3176         ew32(RDTR, adapter->rx_int_delay);
3177
3178         /* irq moderation */
3179         ew32(RADV, adapter->rx_abs_int_delay);
3180         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3181                 e1000e_write_itr(adapter, adapter->itr);
3182
3183         ctrl_ext = er32(CTRL_EXT);
3184         /* Auto-Mask interrupts upon ICR access */
3185         ctrl_ext |= E1000_CTRL_EXT_IAME;
3186         ew32(IAM, 0xffffffff);
3187         ew32(CTRL_EXT, ctrl_ext);
3188         e1e_flush();
3189
3190         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3191          * the Base and Length of the Rx Descriptor Ring
3192          */
3193         rdba = rx_ring->dma;
3194         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3195         ew32(RDBAH(0), (rdba >> 32));
3196         ew32(RDLEN(0), rdlen);
3197         ew32(RDH(0), 0);
3198         ew32(RDT(0), 0);
3199         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3200         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3201
3202         /* Enable Receive Checksum Offload for TCP and UDP */
3203         rxcsum = er32(RXCSUM);
3204         if (adapter->netdev->features & NETIF_F_RXCSUM)
3205                 rxcsum |= E1000_RXCSUM_TUOFL;
3206         else
3207                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3208         ew32(RXCSUM, rxcsum);
3209
3210         /* With jumbo frames, excessive C-state transition latencies result
3211          * in dropped transactions.
3212          */
3213         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3214                 u32 lat =
3215                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3216                      adapter->max_frame_size) * 8 / 1000;
3217
3218                 if (adapter->flags & FLAG_IS_ICH) {
3219                         u32 rxdctl = er32(RXDCTL(0));
3220                         ew32(RXDCTL(0), rxdctl | 0x3);
3221                 }
3222
3223                 pm_qos_update_request(&adapter->netdev->pm_qos_req, lat);
3224         } else {
3225                 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3226                                       PM_QOS_DEFAULT_VALUE);
3227         }
3228
3229         /* Enable Receives */
3230         ew32(RCTL, rctl);
3231 }
3232
3233 /**
3234  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3235  * @netdev: network interface device structure
3236  *
3237  * Writes multicast address list to the MTA hash table.
3238  * Returns: -ENOMEM on failure
3239  *                0 on no addresses written
3240  *                X on writing X addresses to MTA
3241  */
3242 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3243 {
3244         struct e1000_adapter *adapter = netdev_priv(netdev);
3245         struct e1000_hw *hw = &adapter->hw;
3246         struct netdev_hw_addr *ha;
3247         u8 *mta_list;
3248         int i;
3249
3250         if (netdev_mc_empty(netdev)) {
3251                 /* nothing to program, so clear mc list */
3252                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3253                 return 0;
3254         }
3255
3256         mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3257         if (!mta_list)
3258                 return -ENOMEM;
3259
3260         /* update_mc_addr_list expects a packed array of only addresses. */
3261         i = 0;
3262         netdev_for_each_mc_addr(ha, netdev)
3263             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3264
3265         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3266         kfree(mta_list);
3267
3268         return netdev_mc_count(netdev);
3269 }
3270
3271 /**
3272  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3273  * @netdev: network interface device structure
3274  *
3275  * Writes unicast address list to the RAR table.
3276  * Returns: -ENOMEM on failure/insufficient address space
3277  *                0 on no addresses written
3278  *                X on writing X addresses to the RAR table
3279  **/
3280 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3281 {
3282         struct e1000_adapter *adapter = netdev_priv(netdev);
3283         struct e1000_hw *hw = &adapter->hw;
3284         unsigned int rar_entries = hw->mac.rar_entry_count;
3285         int count = 0;
3286
3287         /* save a rar entry for our hardware address */
3288         rar_entries--;
3289
3290         /* save a rar entry for the LAA workaround */
3291         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3292                 rar_entries--;
3293
3294         /* return ENOMEM indicating insufficient memory for addresses */
3295         if (netdev_uc_count(netdev) > rar_entries)
3296                 return -ENOMEM;
3297
3298         if (!netdev_uc_empty(netdev) && rar_entries) {
3299                 struct netdev_hw_addr *ha;
3300
3301                 /* write the addresses in reverse order to avoid write
3302                  * combining
3303                  */
3304                 netdev_for_each_uc_addr(ha, netdev) {
3305                         if (!rar_entries)
3306                                 break;
3307                         hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3308                         count++;
3309                 }
3310         }
3311
3312         /* zero out the remaining RAR entries not used above */
3313         for (; rar_entries > 0; rar_entries--) {
3314                 ew32(RAH(rar_entries), 0);
3315                 ew32(RAL(rar_entries), 0);
3316         }
3317         e1e_flush();
3318
3319         return count;
3320 }
3321
3322 /**
3323  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3324  * @netdev: network interface device structure
3325  *
3326  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3327  * address list or the network interface flags are updated.  This routine is
3328  * responsible for configuring the hardware for proper unicast, multicast,
3329  * promiscuous mode, and all-multi behavior.
3330  **/
3331 static void e1000e_set_rx_mode(struct net_device *netdev)
3332 {
3333         struct e1000_adapter *adapter = netdev_priv(netdev);
3334         struct e1000_hw *hw = &adapter->hw;
3335         u32 rctl;
3336
3337         /* Check for Promiscuous and All Multicast modes */
3338         rctl = er32(RCTL);
3339
3340         /* clear the affected bits */
3341         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3342
3343         if (netdev->flags & IFF_PROMISC) {
3344                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3345                 /* Do not hardware filter VLANs in promisc mode */
3346                 e1000e_vlan_filter_disable(adapter);
3347         } else {
3348                 int count;
3349
3350                 if (netdev->flags & IFF_ALLMULTI) {
3351                         rctl |= E1000_RCTL_MPE;
3352                 } else {
3353                         /* Write addresses to the MTA, if the attempt fails
3354                          * then we should just turn on promiscuous mode so
3355                          * that we can at least receive multicast traffic
3356                          */
3357                         count = e1000e_write_mc_addr_list(netdev);
3358                         if (count < 0)
3359                                 rctl |= E1000_RCTL_MPE;
3360                 }
3361                 e1000e_vlan_filter_enable(adapter);
3362                 /* Write addresses to available RAR registers, if there is not
3363                  * sufficient space to store all the addresses then enable
3364                  * unicast promiscuous mode
3365                  */
3366                 count = e1000e_write_uc_addr_list(netdev);
3367                 if (count < 0)
3368                         rctl |= E1000_RCTL_UPE;
3369         }
3370
3371         ew32(RCTL, rctl);
3372
3373         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3374                 e1000e_vlan_strip_enable(adapter);
3375         else
3376                 e1000e_vlan_strip_disable(adapter);
3377 }
3378
3379 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3380 {
3381         struct e1000_hw *hw = &adapter->hw;
3382         u32 mrqc, rxcsum;
3383         int i;
3384         static const u32 rsskey[10] = {
3385                 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0,
3386                 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe
3387         };
3388
3389         /* Fill out hash function seed */
3390         for (i = 0; i < 10; i++)
3391                 ew32(RSSRK(i), rsskey[i]);
3392
3393         /* Direct all traffic to queue 0 */
3394         for (i = 0; i < 32; i++)
3395                 ew32(RETA(i), 0);
3396
3397         /* Disable raw packet checksumming so that RSS hash is placed in
3398          * descriptor on writeback.
3399          */
3400         rxcsum = er32(RXCSUM);
3401         rxcsum |= E1000_RXCSUM_PCSD;
3402
3403         ew32(RXCSUM, rxcsum);
3404
3405         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3406                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3407                 E1000_MRQC_RSS_FIELD_IPV6 |
3408                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3409                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3410
3411         ew32(MRQC, mrqc);
3412 }
3413
3414 /**
3415  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3416  * @adapter: board private structure
3417  * @timinca: pointer to returned time increment attributes
3418  *
3419  * Get attributes for incrementing the System Time Register SYSTIML/H at
3420  * the default base frequency, and set the cyclecounter shift value.
3421  **/
3422 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3423 {
3424         struct e1000_hw *hw = &adapter->hw;
3425         u32 incvalue, incperiod, shift;
3426
3427         /* Make sure clock is enabled on I217 before checking the frequency */
3428         if ((hw->mac.type == e1000_pch_lpt) &&
3429             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3430             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3431                 u32 fextnvm7 = er32(FEXTNVM7);
3432
3433                 if (!(fextnvm7 & (1 << 0))) {
3434                         ew32(FEXTNVM7, fextnvm7 | (1 << 0));
3435                         e1e_flush();
3436                 }
3437         }
3438
3439         switch (hw->mac.type) {
3440         case e1000_pch2lan:
3441         case e1000_pch_lpt:
3442                 /* On I217, the clock frequency is 25MHz or 96MHz as
3443                  * indicated by the System Clock Frequency Indication
3444                  */
3445                 if ((hw->mac.type != e1000_pch_lpt) ||
3446                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
3447                         /* Stable 96MHz frequency */
3448                         incperiod = INCPERIOD_96MHz;
3449                         incvalue = INCVALUE_96MHz;
3450                         shift = INCVALUE_SHIFT_96MHz;
3451                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3452                         break;
3453                 }
3454                 /* fall-through */
3455         case e1000_82574:
3456         case e1000_82583:
3457                 /* Stable 25MHz frequency */
3458                 incperiod = INCPERIOD_25MHz;
3459                 incvalue = INCVALUE_25MHz;
3460                 shift = INCVALUE_SHIFT_25MHz;
3461                 adapter->cc.shift = shift;
3462                 break;
3463         default:
3464                 return -EINVAL;
3465         }
3466
3467         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3468                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3469
3470         return 0;
3471 }
3472
3473 /**
3474  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3475  * @adapter: board private structure
3476  *
3477  * Outgoing time stamping can be enabled and disabled. Play nice and
3478  * disable it when requested, although it shouldn't cause any overhead
3479  * when no packet needs it. At most one packet in the queue may be
3480  * marked for time stamping, otherwise it would be impossible to tell
3481  * for sure to which packet the hardware time stamp belongs.
3482  *
3483  * Incoming time stamping has to be configured via the hardware filters.
3484  * Not all combinations are supported, in particular event type has to be
3485  * specified. Matching the kind of event packet is not supported, with the
3486  * exception of "all V2 events regardless of level 2 or 4".
3487  **/
3488 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3489                                   struct hwtstamp_config *config)
3490 {
3491         struct e1000_hw *hw = &adapter->hw;
3492         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3493         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3494         u32 rxmtrl = 0;
3495         u16 rxudp = 0;
3496         bool is_l4 = false;
3497         bool is_l2 = false;
3498         u32 regval;
3499         s32 ret_val;
3500
3501         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3502                 return -EINVAL;
3503
3504         /* flags reserved for future extensions - must be zero */
3505         if (config->flags)
3506                 return -EINVAL;
3507
3508         switch (config->tx_type) {
3509         case HWTSTAMP_TX_OFF:
3510                 tsync_tx_ctl = 0;
3511                 break;
3512         case HWTSTAMP_TX_ON:
3513                 break;
3514         default:
3515                 return -ERANGE;
3516         }
3517
3518         switch (config->rx_filter) {
3519         case HWTSTAMP_FILTER_NONE:
3520                 tsync_rx_ctl = 0;
3521                 break;
3522         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3523                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3524                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3525                 is_l4 = true;
3526                 break;
3527         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3528                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3529                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3530                 is_l4 = true;
3531                 break;
3532         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3533                 /* Also time stamps V2 L2 Path Delay Request/Response */
3534                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3535                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3536                 is_l2 = true;
3537                 break;
3538         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3539                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3540                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3541                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3542                 is_l2 = true;
3543                 break;
3544         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3545                 /* Hardware cannot filter just V2 L4 Sync messages;
3546                  * fall-through to V2 (both L2 and L4) Sync.
3547                  */
3548         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3549                 /* Also time stamps V2 Path Delay Request/Response. */
3550                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3551                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3552                 is_l2 = true;
3553                 is_l4 = true;
3554                 break;
3555         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3556                 /* Hardware cannot filter just V2 L4 Delay Request messages;
3557                  * fall-through to V2 (both L2 and L4) Delay Request.
3558                  */
3559         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3560                 /* Also time stamps V2 Path Delay Request/Response. */
3561                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3562                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3563                 is_l2 = true;
3564                 is_l4 = true;
3565                 break;
3566         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3567         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3568                 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3569                  * fall-through to all V2 (both L2 and L4) Events.
3570                  */
3571         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3572                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3573                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3574                 is_l2 = true;
3575                 is_l4 = true;
3576                 break;
3577         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3578                 /* For V1, the hardware can only filter Sync messages or
3579                  * Delay Request messages but not both so fall-through to
3580                  * time stamp all packets.
3581                  */
3582         case HWTSTAMP_FILTER_ALL:
3583                 is_l2 = true;
3584                 is_l4 = true;
3585                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3586                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3587                 break;
3588         default:
3589                 return -ERANGE;
3590         }
3591
3592         adapter->hwtstamp_config = *config;
3593
3594         /* enable/disable Tx h/w time stamping */
3595         regval = er32(TSYNCTXCTL);
3596         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3597         regval |= tsync_tx_ctl;
3598         ew32(TSYNCTXCTL, regval);
3599         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3600             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3601                 e_err("Timesync Tx Control register not set as expected\n");
3602                 return -EAGAIN;
3603         }
3604
3605         /* enable/disable Rx h/w time stamping */
3606         regval = er32(TSYNCRXCTL);
3607         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3608         regval |= tsync_rx_ctl;
3609         ew32(TSYNCRXCTL, regval);
3610         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3611                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3612             (regval & (E1000_TSYNCRXCTL_ENABLED |
3613                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3614                 e_err("Timesync Rx Control register not set as expected\n");
3615                 return -EAGAIN;
3616         }
3617
3618         /* L2: define ethertype filter for time stamped packets */
3619         if (is_l2)
3620                 rxmtrl |= ETH_P_1588;
3621
3622         /* define which PTP packets get time stamped */
3623         ew32(RXMTRL, rxmtrl);
3624
3625         /* Filter by destination port */
3626         if (is_l4) {
3627                 rxudp = PTP_EV_PORT;
3628                 cpu_to_be16s(&rxudp);
3629         }
3630         ew32(RXUDP, rxudp);
3631
3632         e1e_flush();
3633
3634         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3635         er32(RXSTMPH);
3636         er32(TXSTMPH);
3637
3638         /* Get and set the System Time Register SYSTIM base frequency */
3639         ret_val = e1000e_get_base_timinca(adapter, &regval);
3640         if (ret_val)
3641                 return ret_val;
3642         ew32(TIMINCA, regval);
3643
3644         /* reset the ns time counter */
3645         timecounter_init(&adapter->tc, &adapter->cc,
3646                          ktime_to_ns(ktime_get_real()));
3647
3648         return 0;
3649 }
3650
3651 /**
3652  * e1000_configure - configure the hardware for Rx and Tx
3653  * @adapter: private board structure
3654  **/
3655 static void e1000_configure(struct e1000_adapter *adapter)
3656 {
3657         struct e1000_ring *rx_ring = adapter->rx_ring;
3658
3659         e1000e_set_rx_mode(adapter->netdev);
3660
3661         e1000_restore_vlan(adapter);
3662         e1000_init_manageability_pt(adapter);
3663
3664         e1000_configure_tx(adapter);
3665
3666         if (adapter->netdev->features & NETIF_F_RXHASH)
3667                 e1000e_setup_rss_hash(adapter);
3668         e1000_setup_rctl(adapter);
3669         e1000_configure_rx(adapter);
3670         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3671 }
3672
3673 /**
3674  * e1000e_power_up_phy - restore link in case the phy was powered down
3675  * @adapter: address of board private structure
3676  *
3677  * The phy may be powered down to save power and turn off link when the
3678  * driver is unloaded and wake on lan is not enabled (among others)
3679  * *** this routine MUST be followed by a call to e1000e_reset ***
3680  **/
3681 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3682 {
3683         if (adapter->hw.phy.ops.power_up)
3684                 adapter->hw.phy.ops.power_up(&adapter->hw);
3685
3686         adapter->hw.mac.ops.setup_link(&adapter->hw);
3687 }
3688
3689 /**
3690  * e1000_power_down_phy - Power down the PHY
3691  *
3692  * Power down the PHY so no link is implied when interface is down.
3693  * The PHY cannot be powered down if management or WoL is active.
3694  */
3695 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3696 {
3697         /* WoL is enabled */
3698         if (adapter->wol)
3699                 return;
3700
3701         if (adapter->hw.phy.ops.power_down)
3702                 adapter->hw.phy.ops.power_down(&adapter->hw);
3703 }
3704
3705 /**
3706  * e1000e_reset - bring the hardware into a known good state
3707  *
3708  * This function boots the hardware and enables some settings that
3709  * require a configuration cycle of the hardware - those cannot be
3710  * set/changed during runtime. After reset the device needs to be
3711  * properly configured for Rx, Tx etc.
3712  */
3713 void e1000e_reset(struct e1000_adapter *adapter)
3714 {
3715         struct e1000_mac_info *mac = &adapter->hw.mac;
3716         struct e1000_fc_info *fc = &adapter->hw.fc;
3717         struct e1000_hw *hw = &adapter->hw;
3718         u32 tx_space, min_tx_space, min_rx_space;
3719         u32 pba = adapter->pba;
3720         u16 hwm;
3721
3722         /* reset Packet Buffer Allocation to default */
3723         ew32(PBA, pba);
3724
3725         if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3726                 /* To maintain wire speed transmits, the Tx FIFO should be
3727                  * large enough to accommodate two full transmit packets,
3728                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3729                  * the Rx FIFO should be large enough to accommodate at least
3730                  * one full receive packet and is similarly rounded up and
3731                  * expressed in KB.
3732                  */
3733                 pba = er32(PBA);
3734                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3735                 tx_space = pba >> 16;
3736                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3737                 pba &= 0xffff;
3738                 /* the Tx fifo also stores 16 bytes of information about the Tx
3739                  * but don't include ethernet FCS because hardware appends it
3740                  */
3741                 min_tx_space = (adapter->max_frame_size +
3742                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3743                 min_tx_space = ALIGN(min_tx_space, 1024);
3744                 min_tx_space >>= 10;
3745                 /* software strips receive CRC, so leave room for it */
3746                 min_rx_space = adapter->max_frame_size;
3747                 min_rx_space = ALIGN(min_rx_space, 1024);
3748                 min_rx_space >>= 10;
3749
3750                 /* If current Tx allocation is less than the min Tx FIFO size,
3751                  * and the min Tx FIFO size is less than the current Rx FIFO
3752                  * allocation, take space away from current Rx allocation
3753                  */
3754                 if ((tx_space < min_tx_space) &&
3755                     ((min_tx_space - tx_space) < pba)) {
3756                         pba -= min_tx_space - tx_space;
3757
3758                         /* if short on Rx space, Rx wins and must trump Tx
3759                          * adjustment
3760                          */
3761                         if (pba < min_rx_space)
3762                                 pba = min_rx_space;
3763                 }
3764
3765                 ew32(PBA, pba);
3766         }
3767
3768         /* flow control settings
3769          *
3770          * The high water mark must be low enough to fit one full frame
3771          * (or the size used for early receive) above it in the Rx FIFO.
3772          * Set it to the lower of:
3773          * - 90% of the Rx FIFO size, and
3774          * - the full Rx FIFO size minus one full frame
3775          */
3776         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3777                 fc->pause_time = 0xFFFF;
3778         else
3779                 fc->pause_time = E1000_FC_PAUSE_TIME;
3780         fc->send_xon = true;
3781         fc->current_mode = fc->requested_mode;
3782
3783         switch (hw->mac.type) {
3784         case e1000_ich9lan:
3785         case e1000_ich10lan:
3786                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3787                         pba = 14;
3788                         ew32(PBA, pba);
3789                         fc->high_water = 0x2800;
3790                         fc->low_water = fc->high_water - 8;
3791                         break;
3792                 }
3793                 /* fall-through */
3794         default:
3795                 hwm = min(((pba << 10) * 9 / 10),
3796                           ((pba << 10) - adapter->max_frame_size));
3797
3798                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3799                 fc->low_water = fc->high_water - 8;
3800                 break;
3801         case e1000_pchlan:
3802                 /* Workaround PCH LOM adapter hangs with certain network
3803                  * loads.  If hangs persist, try disabling Tx flow control.
3804                  */
3805                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3806                         fc->high_water = 0x3500;
3807                         fc->low_water = 0x1500;
3808                 } else {
3809                         fc->high_water = 0x5000;
3810                         fc->low_water = 0x3000;
3811                 }
3812                 fc->refresh_time = 0x1000;
3813                 break;
3814         case e1000_pch2lan:
3815         case e1000_pch_lpt:
3816                 fc->refresh_time = 0x0400;
3817
3818                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
3819                         fc->high_water = 0x05C20;
3820                         fc->low_water = 0x05048;
3821                         fc->pause_time = 0x0650;
3822                         break;
3823                 }
3824
3825                 pba = 14;
3826                 ew32(PBA, pba);
3827                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
3828                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
3829                 break;
3830         }
3831
3832         /* Alignment of Tx data is on an arbitrary byte boundary with the
3833          * maximum size per Tx descriptor limited only to the transmit
3834          * allocation of the packet buffer minus 96 bytes with an upper
3835          * limit of 24KB due to receive synchronization limitations.
3836          */
3837         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
3838                                        24 << 10);
3839
3840         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
3841          * fit in receive buffer.
3842          */
3843         if (adapter->itr_setting & 0x3) {
3844                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
3845                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3846                                 dev_info(&adapter->pdev->dev,
3847                                          "Interrupt Throttle Rate off\n");
3848                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
3849                                 e1000e_write_itr(adapter, 0);
3850                         }
3851                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3852                         dev_info(&adapter->pdev->dev,
3853                                  "Interrupt Throttle Rate on\n");
3854                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3855                         adapter->itr = 20000;
3856                         e1000e_write_itr(adapter, adapter->itr);
3857                 }
3858         }
3859
3860         /* Allow time for pending master requests to run */
3861         mac->ops.reset_hw(hw);
3862
3863         /* For parts with AMT enabled, let the firmware know
3864          * that the network interface is in control
3865          */
3866         if (adapter->flags & FLAG_HAS_AMT)
3867                 e1000e_get_hw_control(adapter);
3868
3869         ew32(WUC, 0);
3870
3871         if (mac->ops.init_hw(hw))
3872                 e_err("Hardware Error\n");
3873
3874         e1000_update_mng_vlan(adapter);
3875
3876         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3877         ew32(VET, ETH_P_8021Q);
3878
3879         e1000e_reset_adaptive(hw);
3880
3881         /* initialize systim and reset the ns time counter */
3882         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3883
3884         /* Set EEE advertisement as appropriate */
3885         if (adapter->flags2 & FLAG2_HAS_EEE) {
3886                 s32 ret_val;
3887                 u16 adv_addr;
3888
3889                 switch (hw->phy.type) {
3890                 case e1000_phy_82579:
3891                         adv_addr = I82579_EEE_ADVERTISEMENT;
3892                         break;
3893                 case e1000_phy_i217:
3894                         adv_addr = I217_EEE_ADVERTISEMENT;
3895                         break;
3896                 default:
3897                         dev_err(&adapter->pdev->dev,
3898                                 "Invalid PHY type setting EEE advertisement\n");
3899                         return;
3900                 }
3901
3902                 ret_val = hw->phy.ops.acquire(hw);
3903                 if (ret_val) {
3904                         dev_err(&adapter->pdev->dev,
3905                                 "EEE advertisement - unable to acquire PHY\n");
3906                         return;
3907                 }
3908
3909                 e1000_write_emi_reg_locked(hw, adv_addr,
3910                                            hw->dev_spec.ich8lan.eee_disable ?
3911                                            0 : adapter->eee_advert);
3912
3913                 hw->phy.ops.release(hw);
3914         }
3915
3916         if (!netif_running(adapter->netdev) &&
3917             !test_bit(__E1000_TESTING, &adapter->state)) {
3918                 e1000_power_down_phy(adapter);
3919                 return;
3920         }
3921
3922         e1000_get_phy_info(hw);
3923
3924         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3925             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3926                 u16 phy_data = 0;
3927                 /* speed up time to link by disabling smart power down, ignore
3928                  * the return value of this function because there is nothing
3929                  * different we would do if it failed
3930                  */
3931                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3932                 phy_data &= ~IGP02E1000_PM_SPD;
3933                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3934         }
3935 }
3936
3937 int e1000e_up(struct e1000_adapter *adapter)
3938 {
3939         struct e1000_hw *hw = &adapter->hw;
3940
3941         /* hardware has been reset, we need to reload some things */
3942         e1000_configure(adapter);
3943
3944         clear_bit(__E1000_DOWN, &adapter->state);
3945
3946         if (adapter->msix_entries)
3947                 e1000_configure_msix(adapter);
3948         e1000_irq_enable(adapter);
3949
3950         netif_start_queue(adapter->netdev);
3951
3952         /* fire a link change interrupt to start the watchdog */
3953         if (adapter->msix_entries)
3954                 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3955         else
3956                 ew32(ICS, E1000_ICS_LSC);
3957
3958         return 0;
3959 }
3960
3961 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3962 {
3963         struct e1000_hw *hw = &adapter->hw;
3964
3965         if (!(adapter->flags2 & FLAG2_DMA_BURST))
3966                 return;
3967
3968         /* flush pending descriptor writebacks to memory */
3969         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3970         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3971
3972         /* execute the writes immediately */
3973         e1e_flush();
3974
3975         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
3976          * write is successful
3977          */
3978         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3979         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3980
3981         /* execute the writes immediately */
3982         e1e_flush();
3983 }
3984
3985 static void e1000e_update_stats(struct e1000_adapter *adapter);
3986
3987 void e1000e_down(struct e1000_adapter *adapter)
3988 {
3989         struct net_device *netdev = adapter->netdev;
3990         struct e1000_hw *hw = &adapter->hw;
3991         u32 tctl, rctl;
3992
3993         /* signal that we're down so the interrupt handler does not
3994          * reschedule our watchdog timer
3995          */
3996         set_bit(__E1000_DOWN, &adapter->state);
3997
3998         /* disable receives in the hardware */
3999         rctl = er32(RCTL);
4000         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4001                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4002         /* flush and sleep below */
4003
4004         netif_stop_queue(netdev);
4005
4006         /* disable transmits in the hardware */
4007         tctl = er32(TCTL);
4008         tctl &= ~E1000_TCTL_EN;
4009         ew32(TCTL, tctl);
4010
4011         /* flush both disables and wait for them to finish */
4012         e1e_flush();
4013         usleep_range(10000, 20000);
4014
4015         e1000_irq_disable(adapter);
4016
4017         napi_synchronize(&adapter->napi);
4018
4019         del_timer_sync(&adapter->watchdog_timer);
4020         del_timer_sync(&adapter->phy_info_timer);
4021
4022         netif_carrier_off(netdev);
4023
4024         spin_lock(&adapter->stats64_lock);
4025         e1000e_update_stats(adapter);
4026         spin_unlock(&adapter->stats64_lock);
4027
4028         e1000e_flush_descriptors(adapter);
4029         e1000_clean_tx_ring(adapter->tx_ring);
4030         e1000_clean_rx_ring(adapter->rx_ring);
4031
4032         adapter->link_speed = 0;
4033         adapter->link_duplex = 0;
4034
4035         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4036         if ((hw->mac.type >= e1000_pch2lan) &&
4037             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4038             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4039                 e_dbg("failed to disable jumbo frame workaround mode\n");
4040
4041         if (!pci_channel_offline(adapter->pdev))
4042                 e1000e_reset(adapter);
4043
4044         /* TODO: for power management, we could drop the link and
4045          * pci_disable_device here.
4046          */
4047 }
4048
4049 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4050 {
4051         might_sleep();
4052         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4053                 usleep_range(1000, 2000);
4054         e1000e_down(adapter);
4055         e1000e_up(adapter);
4056         clear_bit(__E1000_RESETTING, &adapter->state);
4057 }
4058
4059 /**
4060  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4061  * @cc: cyclecounter structure
4062  **/
4063 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
4064 {
4065         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4066                                                      cc);
4067         struct e1000_hw *hw = &adapter->hw;
4068         cycle_t systim;
4069
4070         /* latch SYSTIMH on read of SYSTIML */
4071         systim = (cycle_t)er32(SYSTIML);
4072         systim |= (cycle_t)er32(SYSTIMH) << 32;
4073
4074         return systim;
4075 }
4076
4077 /**
4078  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4079  * @adapter: board private structure to initialize
4080  *
4081  * e1000_sw_init initializes the Adapter private data structure.
4082  * Fields are initialized based on PCI device information and
4083  * OS network device settings (MTU size).
4084  **/
4085 static int e1000_sw_init(struct e1000_adapter *adapter)
4086 {
4087         struct net_device *netdev = adapter->netdev;
4088
4089         adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
4090         adapter->rx_ps_bsize0 = 128;
4091         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4092         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4093         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4094         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4095
4096         spin_lock_init(&adapter->stats64_lock);
4097
4098         e1000e_set_interrupt_capability(adapter);
4099
4100         if (e1000_alloc_queues(adapter))
4101                 return -ENOMEM;
4102
4103         /* Setup hardware time stamping cyclecounter */
4104         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4105                 adapter->cc.read = e1000e_cyclecounter_read;
4106                 adapter->cc.mask = CLOCKSOURCE_MASK(64);
4107                 adapter->cc.mult = 1;
4108                 /* cc.shift set in e1000e_get_base_tininca() */
4109
4110                 spin_lock_init(&adapter->systim_lock);
4111                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4112         }
4113
4114         /* Explicitly disable IRQ since the NIC can be in any state. */
4115         e1000_irq_disable(adapter);
4116
4117         set_bit(__E1000_DOWN, &adapter->state);
4118         return 0;
4119 }
4120
4121 /**
4122  * e1000_intr_msi_test - Interrupt Handler
4123  * @irq: interrupt number
4124  * @data: pointer to a network interface device structure
4125  **/
4126 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4127 {
4128         struct net_device *netdev = data;
4129         struct e1000_adapter *adapter = netdev_priv(netdev);
4130         struct e1000_hw *hw = &adapter->hw;
4131         u32 icr = er32(ICR);
4132
4133         e_dbg("icr is %08X\n", icr);
4134         if (icr & E1000_ICR_RXSEQ) {
4135                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4136                 /* Force memory writes to complete before acknowledging the
4137                  * interrupt is handled.
4138                  */
4139                 wmb();
4140         }
4141
4142         return IRQ_HANDLED;
4143 }
4144
4145 /**
4146  * e1000_test_msi_interrupt - Returns 0 for successful test
4147  * @adapter: board private struct
4148  *
4149  * code flow taken from tg3.c
4150  **/
4151 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4152 {
4153         struct net_device *netdev = adapter->netdev;
4154         struct e1000_hw *hw = &adapter->hw;
4155         int err;
4156
4157         /* poll_enable hasn't been called yet, so don't need disable */
4158         /* clear any pending events */
4159         er32(ICR);
4160
4161         /* free the real vector and request a test handler */
4162         e1000_free_irq(adapter);
4163         e1000e_reset_interrupt_capability(adapter);
4164
4165         /* Assume that the test fails, if it succeeds then the test
4166          * MSI irq handler will unset this flag
4167          */
4168         adapter->flags |= FLAG_MSI_TEST_FAILED;
4169
4170         err = pci_enable_msi(adapter->pdev);
4171         if (err)
4172                 goto msi_test_failed;
4173
4174         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4175                           netdev->name, netdev);
4176         if (err) {
4177                 pci_disable_msi(adapter->pdev);
4178                 goto msi_test_failed;
4179         }
4180
4181         /* Force memory writes to complete before enabling and firing an
4182          * interrupt.
4183          */
4184         wmb();
4185
4186         e1000_irq_enable(adapter);
4187
4188         /* fire an unusual interrupt on the test handler */
4189         ew32(ICS, E1000_ICS_RXSEQ);
4190         e1e_flush();
4191         msleep(100);
4192
4193         e1000_irq_disable(adapter);
4194
4195         rmb();                  /* read flags after interrupt has been fired */
4196
4197         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4198                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4199                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4200         } else {
4201                 e_dbg("MSI interrupt test succeeded!\n");
4202         }
4203
4204         free_irq(adapter->pdev->irq, netdev);
4205         pci_disable_msi(adapter->pdev);
4206
4207 msi_test_failed:
4208         e1000e_set_interrupt_capability(adapter);
4209         return e1000_request_irq(adapter);
4210 }
4211
4212 /**
4213  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4214  * @adapter: board private struct
4215  *
4216  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4217  **/
4218 static int e1000_test_msi(struct e1000_adapter *adapter)
4219 {
4220         int err;
4221         u16 pci_cmd;
4222
4223         if (!(adapter->flags & FLAG_MSI_ENABLED))
4224                 return 0;
4225
4226         /* disable SERR in case the MSI write causes a master abort */
4227         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4228         if (pci_cmd & PCI_COMMAND_SERR)
4229                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4230                                       pci_cmd & ~PCI_COMMAND_SERR);
4231
4232         err = e1000_test_msi_interrupt(adapter);
4233
4234         /* re-enable SERR */
4235         if (pci_cmd & PCI_COMMAND_SERR) {
4236                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4237                 pci_cmd |= PCI_COMMAND_SERR;
4238                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4239         }
4240
4241         return err;
4242 }
4243
4244 /**
4245  * e1000_open - Called when a network interface is made active
4246  * @netdev: network interface device structure
4247  *
4248  * Returns 0 on success, negative value on failure
4249  *
4250  * The open entry point is called when a network interface is made
4251  * active by the system (IFF_UP).  At this point all resources needed
4252  * for transmit and receive operations are allocated, the interrupt
4253  * handler is registered with the OS, the watchdog timer is started,
4254  * and the stack is notified that the interface is ready.
4255  **/
4256 static int e1000_open(struct net_device *netdev)
4257 {
4258         struct e1000_adapter *adapter = netdev_priv(netdev);
4259         struct e1000_hw *hw = &adapter->hw;
4260         struct pci_dev *pdev = adapter->pdev;
4261         int err;
4262
4263         /* disallow open during test */
4264         if (test_bit(__E1000_TESTING, &adapter->state))
4265                 return -EBUSY;
4266
4267         pm_runtime_get_sync(&pdev->dev);
4268
4269         netif_carrier_off(netdev);
4270
4271         /* allocate transmit descriptors */
4272         err = e1000e_setup_tx_resources(adapter->tx_ring);
4273         if (err)
4274                 goto err_setup_tx;
4275
4276         /* allocate receive descriptors */
4277         err = e1000e_setup_rx_resources(adapter->rx_ring);
4278         if (err)
4279                 goto err_setup_rx;
4280
4281         /* If AMT is enabled, let the firmware know that the network
4282          * interface is now open and reset the part to a known state.
4283          */
4284         if (adapter->flags & FLAG_HAS_AMT) {
4285                 e1000e_get_hw_control(adapter);
4286                 e1000e_reset(adapter);
4287         }
4288
4289         e1000e_power_up_phy(adapter);
4290
4291         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4292         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4293                 e1000_update_mng_vlan(adapter);
4294
4295         /* DMA latency requirement to workaround jumbo issue */
4296         pm_qos_add_request(&adapter->netdev->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4297                            PM_QOS_DEFAULT_VALUE);
4298
4299         /* before we allocate an interrupt, we must be ready to handle it.
4300          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4301          * as soon as we call pci_request_irq, so we have to setup our
4302          * clean_rx handler before we do so.
4303          */
4304         e1000_configure(adapter);
4305
4306         err = e1000_request_irq(adapter);
4307         if (err)
4308                 goto err_req_irq;
4309
4310         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4311          * ignore e1000e MSI messages, which means we need to test our MSI
4312          * interrupt now
4313          */
4314         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4315                 err = e1000_test_msi(adapter);
4316                 if (err) {
4317                         e_err("Interrupt allocation failed\n");
4318                         goto err_req_irq;
4319                 }
4320         }
4321
4322         /* From here on the code is the same as e1000e_up() */
4323         clear_bit(__E1000_DOWN, &adapter->state);
4324
4325         napi_enable(&adapter->napi);
4326
4327         e1000_irq_enable(adapter);
4328
4329         adapter->tx_hang_recheck = false;
4330         netif_start_queue(netdev);
4331
4332         adapter->idle_check = true;
4333         hw->mac.get_link_status = true;
4334         pm_runtime_put(&pdev->dev);
4335
4336         /* fire a link status change interrupt to start the watchdog */
4337         if (adapter->msix_entries)
4338                 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
4339         else
4340                 ew32(ICS, E1000_ICS_LSC);
4341
4342         return 0;
4343
4344 err_req_irq:
4345         e1000e_release_hw_control(adapter);
4346         e1000_power_down_phy(adapter);
4347         e1000e_free_rx_resources(adapter->rx_ring);
4348 err_setup_rx:
4349         e1000e_free_tx_resources(adapter->tx_ring);
4350 err_setup_tx:
4351         e1000e_reset(adapter);
4352         pm_runtime_put_sync(&pdev->dev);
4353
4354         return err;
4355 }
4356
4357 /**
4358  * e1000_close - Disables a network interface
4359  * @netdev: network interface device structure
4360  *
4361  * Returns 0, this is not allowed to fail
4362  *
4363  * The close entry point is called when an interface is de-activated
4364  * by the OS.  The hardware is still under the drivers control, but
4365  * needs to be disabled.  A global MAC reset is issued to stop the
4366  * hardware, and all transmit and receive resources are freed.
4367  **/
4368 static int e1000_close(struct net_device *netdev)
4369 {
4370         struct e1000_adapter *adapter = netdev_priv(netdev);
4371         struct pci_dev *pdev = adapter->pdev;
4372         int count = E1000_CHECK_RESET_COUNT;
4373
4374         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4375                 usleep_range(10000, 20000);
4376
4377         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4378
4379         pm_runtime_get_sync(&pdev->dev);
4380
4381         if (!test_bit(__E1000_DOWN, &adapter->state)) {
4382                 e1000e_down(adapter);
4383                 e1000_free_irq(adapter);
4384         }
4385
4386         napi_disable(&adapter->napi);
4387
4388         e1000_power_down_phy(adapter);
4389
4390         e1000e_free_tx_resources(adapter->tx_ring);
4391         e1000e_free_rx_resources(adapter->rx_ring);
4392
4393         /* kill manageability vlan ID if supported, but not if a vlan with
4394          * the same ID is registered on the host OS (let 8021q kill it)
4395          */
4396         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4397                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4398                                        adapter->mng_vlan_id);
4399
4400         /* If AMT is enabled, let the firmware know that the network
4401          * interface is now closed
4402          */
4403         if ((adapter->flags & FLAG_HAS_AMT) &&
4404             !test_bit(__E1000_TESTING, &adapter->state))
4405                 e1000e_release_hw_control(adapter);
4406
4407         pm_qos_remove_request(&adapter->netdev->pm_qos_req);
4408
4409         pm_runtime_put_sync(&pdev->dev);
4410
4411         return 0;
4412 }
4413
4414 /**
4415  * e1000_set_mac - Change the Ethernet Address of the NIC
4416  * @netdev: network interface device structure
4417  * @p: pointer to an address structure
4418  *
4419  * Returns 0 on success, negative on failure
4420  **/
4421 static int e1000_set_mac(struct net_device *netdev, void *p)
4422 {
4423         struct e1000_adapter *adapter = netdev_priv(netdev);
4424         struct e1000_hw *hw = &adapter->hw;
4425         struct sockaddr *addr = p;
4426
4427         if (!is_valid_ether_addr(addr->sa_data))
4428                 return -EADDRNOTAVAIL;
4429
4430         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4431         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4432
4433         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4434
4435         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4436                 /* activate the work around */
4437                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4438
4439                 /* Hold a copy of the LAA in RAR[14] This is done so that
4440                  * between the time RAR[0] gets clobbered  and the time it
4441                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4442                  * of the RARs and no incoming packets directed to this port
4443                  * are dropped. Eventually the LAA will be in RAR[0] and
4444                  * RAR[14]
4445                  */
4446                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4447                                     adapter->hw.mac.rar_entry_count - 1);
4448         }
4449
4450         return 0;
4451 }
4452
4453 /**
4454  * e1000e_update_phy_task - work thread to update phy
4455  * @work: pointer to our work struct
4456  *
4457  * this worker thread exists because we must acquire a
4458  * semaphore to read the phy, which we could msleep while
4459  * waiting for it, and we can't msleep in a timer.
4460  **/
4461 static void e1000e_update_phy_task(struct work_struct *work)
4462 {
4463         struct e1000_adapter *adapter = container_of(work,
4464                                                      struct e1000_adapter,
4465                                                      update_phy_task);
4466
4467         if (test_bit(__E1000_DOWN, &adapter->state))
4468                 return;
4469
4470         e1000_get_phy_info(&adapter->hw);
4471 }
4472
4473 /**
4474  * e1000_update_phy_info - timre call-back to update PHY info
4475  * @data: pointer to adapter cast into an unsigned long
4476  *
4477  * Need to wait a few seconds after link up to get diagnostic information from
4478  * the phy
4479  **/
4480 static void e1000_update_phy_info(unsigned long data)
4481 {
4482         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4483
4484         if (test_bit(__E1000_DOWN, &adapter->state))
4485                 return;
4486
4487         schedule_work(&adapter->update_phy_task);
4488 }
4489
4490 /**
4491  * e1000e_update_phy_stats - Update the PHY statistics counters
4492  * @adapter: board private structure
4493  *
4494  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4495  **/
4496 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4497 {
4498         struct e1000_hw *hw = &adapter->hw;
4499         s32 ret_val;
4500         u16 phy_data;
4501
4502         ret_val = hw->phy.ops.acquire(hw);
4503         if (ret_val)
4504                 return;
4505
4506         /* A page set is expensive so check if already on desired page.
4507          * If not, set to the page with the PHY status registers.
4508          */
4509         hw->phy.addr = 1;
4510         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4511                                            &phy_data);
4512         if (ret_val)
4513                 goto release;
4514         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4515                 ret_val = hw->phy.ops.set_page(hw,
4516                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4517                 if (ret_val)
4518                         goto release;
4519         }
4520
4521         /* Single Collision Count */
4522         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4523         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4524         if (!ret_val)
4525                 adapter->stats.scc += phy_data;
4526
4527         /* Excessive Collision Count */
4528         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4529         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4530         if (!ret_val)
4531                 adapter->stats.ecol += phy_data;
4532
4533         /* Multiple Collision Count */
4534         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4535         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4536         if (!ret_val)
4537                 adapter->stats.mcc += phy_data;
4538
4539         /* Late Collision Count */
4540         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4541         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4542         if (!ret_val)
4543                 adapter->stats.latecol += phy_data;
4544
4545         /* Collision Count - also used for adaptive IFS */
4546         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4547         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4548         if (!ret_val)
4549                 hw->mac.collision_delta = phy_data;
4550
4551         /* Defer Count */
4552         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4553         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4554         if (!ret_val)
4555                 adapter->stats.dc += phy_data;
4556
4557         /* Transmit with no CRS */
4558         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4559         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4560         if (!ret_val)
4561                 adapter->stats.tncrs += phy_data;
4562
4563 release:
4564         hw->phy.ops.release(hw);
4565 }
4566
4567 /**
4568  * e1000e_update_stats - Update the board statistics counters
4569  * @adapter: board private structure
4570  **/
4571 static void e1000e_update_stats(struct e1000_adapter *adapter)
4572 {
4573         struct net_device *netdev = adapter->netdev;
4574         struct e1000_hw *hw = &adapter->hw;
4575         struct pci_dev *pdev = adapter->pdev;
4576
4577         /* Prevent stats update while adapter is being reset, or if the pci
4578          * connection is down.
4579          */
4580         if (adapter->link_speed == 0)
4581                 return;
4582         if (pci_channel_offline(pdev))
4583                 return;
4584
4585         adapter->stats.crcerrs += er32(CRCERRS);
4586         adapter->stats.gprc += er32(GPRC);
4587         adapter->stats.gorc += er32(GORCL);
4588         er32(GORCH);            /* Clear gorc */
4589         adapter->stats.bprc += er32(BPRC);
4590         adapter->stats.mprc += er32(MPRC);
4591         adapter->stats.roc += er32(ROC);
4592
4593         adapter->stats.mpc += er32(MPC);
4594
4595         /* Half-duplex statistics */
4596         if (adapter->link_duplex == HALF_DUPLEX) {
4597                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4598                         e1000e_update_phy_stats(adapter);
4599                 } else {
4600                         adapter->stats.scc += er32(SCC);
4601                         adapter->stats.ecol += er32(ECOL);
4602                         adapter->stats.mcc += er32(MCC);
4603                         adapter->stats.latecol += er32(LATECOL);
4604                         adapter->stats.dc += er32(DC);
4605
4606                         hw->mac.collision_delta = er32(COLC);
4607
4608                         if ((hw->mac.type != e1000_82574) &&
4609                             (hw->mac.type != e1000_82583))
4610                                 adapter->stats.tncrs += er32(TNCRS);
4611                 }
4612                 adapter->stats.colc += hw->mac.collision_delta;
4613         }
4614
4615         adapter->stats.xonrxc += er32(XONRXC);
4616         adapter->stats.xontxc += er32(XONTXC);
4617         adapter->stats.xoffrxc += er32(XOFFRXC);
4618         adapter->stats.xofftxc += er32(XOFFTXC);
4619         adapter->stats.gptc += er32(GPTC);
4620         adapter->stats.gotc += er32(GOTCL);
4621         er32(GOTCH);            /* Clear gotc */
4622         adapter->stats.rnbc += er32(RNBC);
4623         adapter->stats.ruc += er32(RUC);
4624
4625         adapter->stats.mptc += er32(MPTC);
4626         adapter->stats.bptc += er32(BPTC);
4627
4628         /* used for adaptive IFS */
4629
4630         hw->mac.tx_packet_delta = er32(TPT);
4631         adapter->stats.tpt += hw->mac.tx_packet_delta;
4632
4633         adapter->stats.algnerrc += er32(ALGNERRC);
4634         adapter->stats.rxerrc += er32(RXERRC);
4635         adapter->stats.cexterr += er32(CEXTERR);
4636         adapter->stats.tsctc += er32(TSCTC);
4637         adapter->stats.tsctfc += er32(TSCTFC);
4638
4639         /* Fill out the OS statistics structure */
4640         netdev->stats.multicast = adapter->stats.mprc;
4641         netdev->stats.collisions = adapter->stats.colc;
4642
4643         /* Rx Errors */
4644
4645         /* RLEC on some newer hardware can be incorrect so build
4646          * our own version based on RUC and ROC
4647          */
4648         netdev->stats.rx_errors = adapter->stats.rxerrc +
4649             adapter->stats.crcerrs + adapter->stats.algnerrc +
4650             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4651         netdev->stats.rx_length_errors = adapter->stats.ruc +
4652             adapter->stats.roc;
4653         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4654         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4655         netdev->stats.rx_missed_errors = adapter->stats.mpc;
4656
4657         /* Tx Errors */
4658         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4659         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4660         netdev->stats.tx_window_errors = adapter->stats.latecol;
4661         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4662
4663         /* Tx Dropped needs to be maintained elsewhere */
4664
4665         /* Management Stats */
4666         adapter->stats.mgptc += er32(MGTPTC);
4667         adapter->stats.mgprc += er32(MGTPRC);
4668         adapter->stats.mgpdc += er32(MGTPDC);
4669
4670         /* Correctable ECC Errors */
4671         if (hw->mac.type == e1000_pch_lpt) {
4672                 u32 pbeccsts = er32(PBECCSTS);
4673                 adapter->corr_errors +=
4674                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4675                 adapter->uncorr_errors +=
4676                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4677                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
4678         }
4679 }
4680
4681 /**
4682  * e1000_phy_read_status - Update the PHY register status snapshot
4683  * @adapter: board private structure
4684  **/
4685 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4686 {
4687         struct e1000_hw *hw = &adapter->hw;
4688         struct e1000_phy_regs *phy = &adapter->phy_regs;
4689
4690         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
4691             (er32(STATUS) & E1000_STATUS_LU) &&
4692             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4693                 int ret_val;
4694
4695                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
4696                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
4697                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
4698                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
4699                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
4700                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
4701                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
4702                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
4703                 if (ret_val)
4704                         e_warn("Error reading PHY register\n");
4705         } else {
4706                 /* Do not read PHY registers if link is not up
4707                  * Set values to typical power-on defaults
4708                  */
4709                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4710                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4711                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4712                              BMSR_ERCAP);
4713                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4714                                   ADVERTISE_ALL | ADVERTISE_CSMA);
4715                 phy->lpa = 0;
4716                 phy->expansion = EXPANSION_ENABLENPAGE;
4717                 phy->ctrl1000 = ADVERTISE_1000FULL;
4718                 phy->stat1000 = 0;
4719                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4720         }
4721 }
4722
4723 static void e1000_print_link_info(struct e1000_adapter *adapter)
4724 {
4725         struct e1000_hw *hw = &adapter->hw;
4726         u32 ctrl = er32(CTRL);
4727
4728         /* Link status message must follow this format for user tools */
4729         pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4730                 adapter->netdev->name, adapter->link_speed,
4731                 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4732                 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4733                 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4734                 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
4735 }
4736
4737 static bool e1000e_has_link(struct e1000_adapter *adapter)
4738 {
4739         struct e1000_hw *hw = &adapter->hw;
4740         bool link_active = false;
4741         s32 ret_val = 0;
4742
4743         /* get_link_status is set on LSC (link status) interrupt or
4744          * Rx sequence error interrupt.  get_link_status will stay
4745          * false until the check_for_link establishes link
4746          * for copper adapters ONLY
4747          */
4748         switch (hw->phy.media_type) {
4749         case e1000_media_type_copper:
4750                 if (hw->mac.get_link_status) {
4751                         ret_val = hw->mac.ops.check_for_link(hw);
4752                         link_active = !hw->mac.get_link_status;
4753                 } else {
4754                         link_active = true;
4755                 }
4756                 break;
4757         case e1000_media_type_fiber:
4758                 ret_val = hw->mac.ops.check_for_link(hw);
4759                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4760                 break;
4761         case e1000_media_type_internal_serdes:
4762                 ret_val = hw->mac.ops.check_for_link(hw);
4763                 link_active = adapter->hw.mac.serdes_has_link;
4764                 break;
4765         default:
4766         case e1000_media_type_unknown:
4767                 break;
4768         }
4769
4770         if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4771             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4772                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4773                 e_info("Gigabit has been disabled, downgrading speed\n");
4774         }
4775
4776         return link_active;
4777 }
4778
4779 static void e1000e_enable_receives(struct e1000_adapter *adapter)
4780 {
4781         /* make sure the receive unit is started */
4782         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4783             (adapter->flags & FLAG_RESTART_NOW)) {
4784                 struct e1000_hw *hw = &adapter->hw;
4785                 u32 rctl = er32(RCTL);
4786                 ew32(RCTL, rctl | E1000_RCTL_EN);
4787                 adapter->flags &= ~FLAG_RESTART_NOW;
4788         }
4789 }
4790
4791 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4792 {
4793         struct e1000_hw *hw = &adapter->hw;
4794
4795         /* With 82574 controllers, PHY needs to be checked periodically
4796          * for hung state and reset, if two calls return true
4797          */
4798         if (e1000_check_phy_82574(hw))
4799                 adapter->phy_hang_count++;
4800         else
4801                 adapter->phy_hang_count = 0;
4802
4803         if (adapter->phy_hang_count > 1) {
4804                 adapter->phy_hang_count = 0;
4805                 schedule_work(&adapter->reset_task);
4806         }
4807 }
4808
4809 /**
4810  * e1000_watchdog - Timer Call-back
4811  * @data: pointer to adapter cast into an unsigned long
4812  **/
4813 static void e1000_watchdog(unsigned long data)
4814 {
4815         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4816
4817         /* Do the rest outside of interrupt context */
4818         schedule_work(&adapter->watchdog_task);
4819
4820         /* TODO: make this use queue_delayed_work() */
4821 }
4822
4823 static void e1000_watchdog_task(struct work_struct *work)
4824 {
4825         struct e1000_adapter *adapter = container_of(work,
4826                                                      struct e1000_adapter,
4827                                                      watchdog_task);
4828         struct net_device *netdev = adapter->netdev;
4829         struct e1000_mac_info *mac = &adapter->hw.mac;
4830         struct e1000_phy_info *phy = &adapter->hw.phy;
4831         struct e1000_ring *tx_ring = adapter->tx_ring;
4832         struct e1000_hw *hw = &adapter->hw;
4833         u32 link, tctl;
4834
4835         if (test_bit(__E1000_DOWN, &adapter->state))
4836                 return;
4837
4838         link = e1000e_has_link(adapter);
4839         if ((netif_carrier_ok(netdev)) && link) {
4840                 /* Cancel scheduled suspend requests. */
4841                 pm_runtime_resume(netdev->dev.parent);
4842
4843                 e1000e_enable_receives(adapter);
4844                 goto link_up;
4845         }
4846
4847         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4848             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4849                 e1000_update_mng_vlan(adapter);
4850
4851         if (link) {
4852                 if (!netif_carrier_ok(netdev)) {
4853                         bool txb2b = true;
4854
4855                         /* Cancel scheduled suspend requests. */
4856                         pm_runtime_resume(netdev->dev.parent);
4857
4858                         /* update snapshot of PHY registers on LSC */
4859                         e1000_phy_read_status(adapter);
4860                         mac->ops.get_link_up_info(&adapter->hw,
4861                                                   &adapter->link_speed,
4862                                                   &adapter->link_duplex);
4863                         e1000_print_link_info(adapter);
4864
4865                         /* check if SmartSpeed worked */
4866                         e1000e_check_downshift(hw);
4867                         if (phy->speed_downgraded)
4868                                 netdev_warn(netdev,
4869                                             "Link Speed was downgraded by SmartSpeed\n");
4870
4871                         /* On supported PHYs, check for duplex mismatch only
4872                          * if link has autonegotiated at 10/100 half
4873                          */
4874                         if ((hw->phy.type == e1000_phy_igp_3 ||
4875                              hw->phy.type == e1000_phy_bm) &&
4876                             hw->mac.autoneg &&
4877                             (adapter->link_speed == SPEED_10 ||
4878                              adapter->link_speed == SPEED_100) &&
4879                             (adapter->link_duplex == HALF_DUPLEX)) {
4880                                 u16 autoneg_exp;
4881
4882                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
4883
4884                                 if (!(autoneg_exp & EXPANSION_NWAY))
4885                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
4886                         }
4887
4888                         /* adjust timeout factor according to speed/duplex */
4889                         adapter->tx_timeout_factor = 1;
4890                         switch (adapter->link_speed) {
4891                         case SPEED_10:
4892                                 txb2b = false;
4893                                 adapter->tx_timeout_factor = 16;
4894                                 break;
4895                         case SPEED_100:
4896                                 txb2b = false;
4897                                 adapter->tx_timeout_factor = 10;
4898                                 break;
4899                         }
4900
4901                         /* workaround: re-program speed mode bit after
4902                          * link-up event
4903                          */
4904                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4905                             !txb2b) {
4906                                 u32 tarc0;
4907                                 tarc0 = er32(TARC(0));
4908                                 tarc0 &= ~SPEED_MODE_BIT;
4909                                 ew32(TARC(0), tarc0);
4910                         }
4911
4912                         /* disable TSO for pcie and 10/100 speeds, to avoid
4913                          * some hardware issues
4914                          */
4915                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
4916                                 switch (adapter->link_speed) {
4917                                 case SPEED_10:
4918                                 case SPEED_100:
4919                                         e_info("10/100 speed: disabling TSO\n");
4920                                         netdev->features &= ~NETIF_F_TSO;
4921                                         netdev->features &= ~NETIF_F_TSO6;
4922                                         break;
4923                                 case SPEED_1000:
4924                                         netdev->features |= NETIF_F_TSO;
4925                                         netdev->features |= NETIF_F_TSO6;
4926                                         break;
4927                                 default:
4928                                         /* oops */
4929                                         break;
4930                                 }
4931                         }
4932
4933                         /* enable transmits in the hardware, need to do this
4934                          * after setting TARC(0)
4935                          */
4936                         tctl = er32(TCTL);
4937                         tctl |= E1000_TCTL_EN;
4938                         ew32(TCTL, tctl);
4939
4940                         /* Perform any post-link-up configuration before
4941                          * reporting link up.
4942                          */
4943                         if (phy->ops.cfg_on_link_up)
4944                                 phy->ops.cfg_on_link_up(hw);
4945
4946                         netif_carrier_on(netdev);
4947
4948                         if (!test_bit(__E1000_DOWN, &adapter->state))
4949                                 mod_timer(&adapter->phy_info_timer,
4950                                           round_jiffies(jiffies + 2 * HZ));
4951                 }
4952         } else {
4953                 if (netif_carrier_ok(netdev)) {
4954                         adapter->link_speed = 0;
4955                         adapter->link_duplex = 0;
4956                         /* Link status message must follow this format */
4957                         pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4958                         netif_carrier_off(netdev);
4959                         if (!test_bit(__E1000_DOWN, &adapter->state))
4960                                 mod_timer(&adapter->phy_info_timer,
4961                                           round_jiffies(jiffies + 2 * HZ));
4962
4963                         /* The link is lost so the controller stops DMA.
4964                          * If there is queued Tx work that cannot be done
4965                          * or if on an 8000ES2LAN which requires a Rx packet
4966                          * buffer work-around on link down event, reset the
4967                          * controller to flush the Tx/Rx packet buffers.
4968                          * (Do the reset outside of interrupt context).
4969                          */
4970                         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) ||
4971                             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
4972                                 adapter->flags |= FLAG_RESTART_NOW;
4973                         else
4974                                 pm_schedule_suspend(netdev->dev.parent,
4975                                                     LINK_TIMEOUT);
4976                 }
4977         }
4978
4979 link_up:
4980         spin_lock(&adapter->stats64_lock);
4981         e1000e_update_stats(adapter);
4982
4983         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4984         adapter->tpt_old = adapter->stats.tpt;
4985         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4986         adapter->colc_old = adapter->stats.colc;
4987
4988         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4989         adapter->gorc_old = adapter->stats.gorc;
4990         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4991         adapter->gotc_old = adapter->stats.gotc;
4992         spin_unlock(&adapter->stats64_lock);
4993
4994         if (adapter->flags & FLAG_RESTART_NOW) {
4995                 schedule_work(&adapter->reset_task);
4996                 /* return immediately since reset is imminent */
4997                 return;
4998         }
4999
5000         e1000e_update_adaptive(&adapter->hw);
5001
5002         /* Simple mode for Interrupt Throttle Rate (ITR) */
5003         if (adapter->itr_setting == 4) {
5004                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5005                  * Total asymmetrical Tx or Rx gets ITR=8000;
5006                  * everyone else is between 2000-8000.
5007                  */
5008                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5009                 u32 dif = (adapter->gotc > adapter->gorc ?
5010                            adapter->gotc - adapter->gorc :
5011                            adapter->gorc - adapter->gotc) / 10000;
5012                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5013
5014                 e1000e_write_itr(adapter, itr);
5015         }
5016
5017         /* Cause software interrupt to ensure Rx ring is cleaned */
5018         if (adapter->msix_entries)
5019                 ew32(ICS, adapter->rx_ring->ims_val);
5020         else
5021                 ew32(ICS, E1000_ICS_RXDMT0);
5022
5023         /* flush pending descriptors to memory before detecting Tx hang */
5024         e1000e_flush_descriptors(adapter);
5025
5026         /* Force detection of hung controller every watchdog period */
5027         adapter->detect_tx_hung = true;
5028
5029         /* With 82571 controllers, LAA may be overwritten due to controller
5030          * reset from the other port. Set the appropriate LAA in RAR[0]
5031          */
5032         if (e1000e_get_laa_state_82571(hw))
5033                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5034
5035         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5036                 e1000e_check_82574_phy_workaround(adapter);
5037
5038         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5039         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5040                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5041                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5042                         er32(RXSTMPH);
5043                         adapter->rx_hwtstamp_cleared++;
5044                 } else {
5045                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5046                 }
5047         }
5048
5049         /* Reset the timer */
5050         if (!test_bit(__E1000_DOWN, &adapter->state))
5051                 mod_timer(&adapter->watchdog_timer,
5052                           round_jiffies(jiffies + 2 * HZ));
5053 }
5054
5055 #define E1000_TX_FLAGS_CSUM             0x00000001
5056 #define E1000_TX_FLAGS_VLAN             0x00000002
5057 #define E1000_TX_FLAGS_TSO              0x00000004
5058 #define E1000_TX_FLAGS_IPV4             0x00000008
5059 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5060 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5061 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5062 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5063
5064 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb)
5065 {
5066         struct e1000_context_desc *context_desc;
5067         struct e1000_buffer *buffer_info;
5068         unsigned int i;
5069         u32 cmd_length = 0;
5070         u16 ipcse = 0, mss;
5071         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5072
5073         if (!skb_is_gso(skb))
5074                 return 0;
5075
5076         if (skb_header_cloned(skb)) {
5077                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5078
5079                 if (err)
5080                         return err;
5081         }
5082
5083         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5084         mss = skb_shinfo(skb)->gso_size;
5085         if (skb->protocol == htons(ETH_P_IP)) {
5086                 struct iphdr *iph = ip_hdr(skb);
5087                 iph->tot_len = 0;
5088                 iph->check = 0;
5089                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5090                                                          0, IPPROTO_TCP, 0);
5091                 cmd_length = E1000_TXD_CMD_IP;
5092                 ipcse = skb_transport_offset(skb) - 1;
5093         } else if (skb_is_gso_v6(skb)) {
5094                 ipv6_hdr(skb)->payload_len = 0;
5095                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5096                                                        &ipv6_hdr(skb)->daddr,
5097                                                        0, IPPROTO_TCP, 0);
5098                 ipcse = 0;
5099         }
5100         ipcss = skb_network_offset(skb);
5101         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5102         tucss = skb_transport_offset(skb);
5103         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5104
5105         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5106                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5107
5108         i = tx_ring->next_to_use;
5109         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5110         buffer_info = &tx_ring->buffer_info[i];
5111
5112         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5113         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5114         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5115         context_desc->upper_setup.tcp_fields.tucss = tucss;
5116         context_desc->upper_setup.tcp_fields.tucso = tucso;
5117         context_desc->upper_setup.tcp_fields.tucse = 0;
5118         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5119         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5120         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5121
5122         buffer_info->time_stamp = jiffies;
5123         buffer_info->next_to_watch = i;
5124
5125         i++;
5126         if (i == tx_ring->count)
5127                 i = 0;
5128         tx_ring->next_to_use = i;
5129
5130         return 1;
5131 }
5132
5133 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
5134 {
5135         struct e1000_adapter *adapter = tx_ring->adapter;
5136         struct e1000_context_desc *context_desc;
5137         struct e1000_buffer *buffer_info;
5138         unsigned int i;
5139         u8 css;
5140         u32 cmd_len = E1000_TXD_CMD_DEXT;
5141         __be16 protocol;
5142
5143         if (skb->ip_summed != CHECKSUM_PARTIAL)
5144                 return 0;
5145
5146         if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
5147                 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
5148         else
5149                 protocol = skb->protocol;
5150
5151         switch (protocol) {
5152         case cpu_to_be16(ETH_P_IP):
5153                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5154                         cmd_len |= E1000_TXD_CMD_TCP;
5155                 break;
5156         case cpu_to_be16(ETH_P_IPV6):
5157                 /* XXX not handling all IPV6 headers */
5158                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5159                         cmd_len |= E1000_TXD_CMD_TCP;
5160                 break;
5161         default:
5162                 if (unlikely(net_ratelimit()))
5163                         e_warn("checksum_partial proto=%x!\n",
5164                                be16_to_cpu(protocol));
5165                 break;
5166         }
5167
5168         css = skb_checksum_start_offset(skb);
5169
5170         i = tx_ring->next_to_use;
5171         buffer_info = &tx_ring->buffer_info[i];
5172         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5173
5174         context_desc->lower_setup.ip_config = 0;
5175         context_desc->upper_setup.tcp_fields.tucss = css;
5176         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5177         context_desc->upper_setup.tcp_fields.tucse = 0;
5178         context_desc->tcp_seg_setup.data = 0;
5179         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5180
5181         buffer_info->time_stamp = jiffies;
5182         buffer_info->next_to_watch = i;
5183
5184         i++;
5185         if (i == tx_ring->count)
5186                 i = 0;
5187         tx_ring->next_to_use = i;
5188
5189         return 1;
5190 }
5191
5192 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5193                         unsigned int first, unsigned int max_per_txd,
5194                         unsigned int nr_frags)
5195 {
5196         struct e1000_adapter *adapter = tx_ring->adapter;
5197         struct pci_dev *pdev = adapter->pdev;
5198         struct e1000_buffer *buffer_info;
5199         unsigned int len = skb_headlen(skb);
5200         unsigned int offset = 0, size, count = 0, i;
5201         unsigned int f, bytecount, segs;
5202
5203         i = tx_ring->next_to_use;
5204
5205         while (len) {
5206                 buffer_info = &tx_ring->buffer_info[i];
5207                 size = min(len, max_per_txd);
5208
5209                 buffer_info->length = size;
5210                 buffer_info->time_stamp = jiffies;
5211                 buffer_info->next_to_watch = i;
5212                 buffer_info->dma = dma_map_single(&pdev->dev,
5213                                                   skb->data + offset,
5214                                                   size, DMA_TO_DEVICE);
5215                 buffer_info->mapped_as_page = false;
5216                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5217                         goto dma_error;
5218
5219                 len -= size;
5220                 offset += size;
5221                 count++;
5222
5223                 if (len) {
5224                         i++;
5225                         if (i == tx_ring->count)
5226                                 i = 0;
5227                 }
5228         }
5229
5230         for (f = 0; f < nr_frags; f++) {
5231                 const struct skb_frag_struct *frag;
5232
5233                 frag = &skb_shinfo(skb)->frags[f];
5234                 len = skb_frag_size(frag);
5235                 offset = 0;
5236
5237                 while (len) {
5238                         i++;
5239                         if (i == tx_ring->count)
5240                                 i = 0;
5241
5242                         buffer_info = &tx_ring->buffer_info[i];
5243                         size = min(len, max_per_txd);
5244
5245                         buffer_info->length = size;
5246                         buffer_info->time_stamp = jiffies;
5247                         buffer_info->next_to_watch = i;
5248                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5249                                                             offset, size,
5250                                                             DMA_TO_DEVICE);
5251                         buffer_info->mapped_as_page = true;
5252                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5253                                 goto dma_error;
5254
5255                         len -= size;
5256                         offset += size;
5257                         count++;
5258                 }
5259         }
5260
5261         segs = skb_shinfo(skb)->gso_segs ? : 1;
5262         /* multiply data chunks by size of headers */
5263         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5264
5265         tx_ring->buffer_info[i].skb = skb;
5266         tx_ring->buffer_info[i].segs = segs;
5267         tx_ring->buffer_info[i].bytecount = bytecount;
5268         tx_ring->buffer_info[first].next_to_watch = i;
5269
5270         return count;
5271
5272 dma_error:
5273         dev_err(&pdev->dev, "Tx DMA map failed\n");
5274         buffer_info->dma = 0;
5275         if (count)
5276                 count--;
5277
5278         while (count--) {
5279                 if (i == 0)
5280                         i += tx_ring->count;
5281                 i--;
5282                 buffer_info = &tx_ring->buffer_info[i];
5283                 e1000_put_txbuf(tx_ring, buffer_info);
5284         }
5285
5286         return 0;
5287 }
5288
5289 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5290 {
5291         struct e1000_adapter *adapter = tx_ring->adapter;
5292         struct e1000_tx_desc *tx_desc = NULL;
5293         struct e1000_buffer *buffer_info;
5294         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5295         unsigned int i;
5296
5297         if (tx_flags & E1000_TX_FLAGS_TSO) {
5298                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5299                     E1000_TXD_CMD_TSE;
5300                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5301
5302                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5303                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5304         }
5305
5306         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5307                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5308                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5309         }
5310
5311         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5312                 txd_lower |= E1000_TXD_CMD_VLE;
5313                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5314         }
5315
5316         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5317                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5318
5319         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5320                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5321                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5322         }
5323
5324         i = tx_ring->next_to_use;
5325
5326         do {
5327                 buffer_info = &tx_ring->buffer_info[i];
5328                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5329                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5330                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5331                                                   buffer_info->length);
5332                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5333
5334                 i++;
5335                 if (i == tx_ring->count)
5336                         i = 0;
5337         } while (--count > 0);
5338
5339         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5340
5341         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5342         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5343                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5344
5345         /* Force memory writes to complete before letting h/w
5346          * know there are new descriptors to fetch.  (Only
5347          * applicable for weak-ordered memory model archs,
5348          * such as IA-64).
5349          */
5350         wmb();
5351
5352         tx_ring->next_to_use = i;
5353
5354         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5355                 e1000e_update_tdt_wa(tx_ring, i);
5356         else
5357                 writel(i, tx_ring->tail);
5358
5359         /* we need this if more than one processor can write to our tail
5360          * at a time, it synchronizes IO on IA64/Altix systems
5361          */
5362         mmiowb();
5363 }
5364
5365 #define MINIMUM_DHCP_PACKET_SIZE 282
5366 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5367                                     struct sk_buff *skb)
5368 {
5369         struct e1000_hw *hw = &adapter->hw;
5370         u16 length, offset;
5371
5372         if (vlan_tx_tag_present(skb) &&
5373             !((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5374               (adapter->hw.mng_cookie.status &
5375                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5376                 return 0;
5377
5378         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5379                 return 0;
5380
5381         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5382                 return 0;
5383
5384         {
5385                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5386                 struct udphdr *udp;
5387
5388                 if (ip->protocol != IPPROTO_UDP)
5389                         return 0;
5390
5391                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5392                 if (ntohs(udp->dest) != 67)
5393                         return 0;
5394
5395                 offset = (u8 *)udp + 8 - skb->data;
5396                 length = skb->len - offset;
5397                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5398         }
5399
5400         return 0;
5401 }
5402
5403 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5404 {
5405         struct e1000_adapter *adapter = tx_ring->adapter;
5406
5407         netif_stop_queue(adapter->netdev);
5408         /* Herbert's original patch had:
5409          *  smp_mb__after_netif_stop_queue();
5410          * but since that doesn't exist yet, just open code it.
5411          */
5412         smp_mb();
5413
5414         /* We need to check again in a case another CPU has just
5415          * made room available.
5416          */
5417         if (e1000_desc_unused(tx_ring) < size)
5418                 return -EBUSY;
5419
5420         /* A reprieve! */
5421         netif_start_queue(adapter->netdev);
5422         ++adapter->restart_queue;
5423         return 0;
5424 }
5425
5426 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5427 {
5428         BUG_ON(size > tx_ring->count);
5429
5430         if (e1000_desc_unused(tx_ring) >= size)
5431                 return 0;
5432         return __e1000_maybe_stop_tx(tx_ring, size);
5433 }
5434
5435 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5436                                     struct net_device *netdev)
5437 {
5438         struct e1000_adapter *adapter = netdev_priv(netdev);
5439         struct e1000_ring *tx_ring = adapter->tx_ring;
5440         unsigned int first;
5441         unsigned int tx_flags = 0;
5442         unsigned int len = skb_headlen(skb);
5443         unsigned int nr_frags;
5444         unsigned int mss;
5445         int count = 0;
5446         int tso;
5447         unsigned int f;
5448
5449         if (test_bit(__E1000_DOWN, &adapter->state)) {
5450                 dev_kfree_skb_any(skb);
5451                 return NETDEV_TX_OK;
5452         }
5453
5454         if (skb->len <= 0) {
5455                 dev_kfree_skb_any(skb);
5456                 return NETDEV_TX_OK;
5457         }
5458
5459         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5460          * pad skb in order to meet this minimum size requirement
5461          */
5462         if (unlikely(skb->len < 17)) {
5463                 if (skb_pad(skb, 17 - skb->len))
5464                         return NETDEV_TX_OK;
5465                 skb->len = 17;
5466                 skb_set_tail_pointer(skb, 17);
5467         }
5468
5469         mss = skb_shinfo(skb)->gso_size;
5470         if (mss) {
5471                 u8 hdr_len;
5472
5473                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5474                  * points to just header, pull a few bytes of payload from
5475                  * frags into skb->data
5476                  */
5477                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5478                 /* we do this workaround for ES2LAN, but it is un-necessary,
5479                  * avoiding it could save a lot of cycles
5480                  */
5481                 if (skb->data_len && (hdr_len == len)) {
5482                         unsigned int pull_size;
5483
5484                         pull_size = min_t(unsigned int, 4, skb->data_len);
5485                         if (!__pskb_pull_tail(skb, pull_size)) {
5486                                 e_err("__pskb_pull_tail failed.\n");
5487                                 dev_kfree_skb_any(skb);
5488                                 return NETDEV_TX_OK;
5489                         }
5490                         len = skb_headlen(skb);
5491                 }
5492         }
5493
5494         /* reserve a descriptor for the offload context */
5495         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5496                 count++;
5497         count++;
5498
5499         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5500
5501         nr_frags = skb_shinfo(skb)->nr_frags;
5502         for (f = 0; f < nr_frags; f++)
5503                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5504                                       adapter->tx_fifo_limit);
5505
5506         if (adapter->hw.mac.tx_pkt_filtering)
5507                 e1000_transfer_dhcp_info(adapter, skb);
5508
5509         /* need: count + 2 desc gap to keep tail from touching
5510          * head, otherwise try next time
5511          */
5512         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5513                 return NETDEV_TX_BUSY;
5514
5515         if (vlan_tx_tag_present(skb)) {
5516                 tx_flags |= E1000_TX_FLAGS_VLAN;
5517                 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
5518         }
5519
5520         first = tx_ring->next_to_use;
5521
5522         tso = e1000_tso(tx_ring, skb);
5523         if (tso < 0) {
5524                 dev_kfree_skb_any(skb);
5525                 return NETDEV_TX_OK;
5526         }
5527
5528         if (tso)
5529                 tx_flags |= E1000_TX_FLAGS_TSO;
5530         else if (e1000_tx_csum(tx_ring, skb))
5531                 tx_flags |= E1000_TX_FLAGS_CSUM;
5532
5533         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5534          * 82571 hardware supports TSO capabilities for IPv6 as well...
5535          * no longer assume, we must.
5536          */
5537         if (skb->protocol == htons(ETH_P_IP))
5538                 tx_flags |= E1000_TX_FLAGS_IPV4;
5539
5540         if (unlikely(skb->no_fcs))
5541                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5542
5543         /* if count is 0 then mapping error has occurred */
5544         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5545                              nr_frags);
5546         if (count) {
5547                 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5548                              !adapter->tx_hwtstamp_skb)) {
5549                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5550                         tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5551                         adapter->tx_hwtstamp_skb = skb_get(skb);
5552                         schedule_work(&adapter->tx_hwtstamp_work);
5553                 } else {
5554                         skb_tx_timestamp(skb);
5555                 }
5556
5557                 netdev_sent_queue(netdev, skb->len);
5558                 e1000_tx_queue(tx_ring, tx_flags, count);
5559                 /* Make sure there is space in the ring for the next send. */
5560                 e1000_maybe_stop_tx(tx_ring,
5561                                     (MAX_SKB_FRAGS *
5562                                      DIV_ROUND_UP(PAGE_SIZE,
5563                                                   adapter->tx_fifo_limit) + 2));
5564         } else {
5565                 dev_kfree_skb_any(skb);
5566                 tx_ring->buffer_info[first].time_stamp = 0;
5567                 tx_ring->next_to_use = first;
5568         }
5569
5570         return NETDEV_TX_OK;
5571 }
5572
5573 /**
5574  * e1000_tx_timeout - Respond to a Tx Hang
5575  * @netdev: network interface device structure
5576  **/
5577 static void e1000_tx_timeout(struct net_device *netdev)
5578 {
5579         struct e1000_adapter *adapter = netdev_priv(netdev);
5580
5581         /* Do the reset outside of interrupt context */
5582         adapter->tx_timeout_count++;
5583         schedule_work(&adapter->reset_task);
5584 }
5585
5586 static void e1000_reset_task(struct work_struct *work)
5587 {
5588         struct e1000_adapter *adapter;
5589         adapter = container_of(work, struct e1000_adapter, reset_task);
5590
5591         /* don't run the task if already down */
5592         if (test_bit(__E1000_DOWN, &adapter->state))
5593                 return;
5594
5595         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5596                 e1000e_dump(adapter);
5597                 e_err("Reset adapter unexpectedly\n");
5598         }
5599         e1000e_reinit_locked(adapter);
5600 }
5601
5602 /**
5603  * e1000_get_stats64 - Get System Network Statistics
5604  * @netdev: network interface device structure
5605  * @stats: rtnl_link_stats64 pointer
5606  *
5607  * Returns the address of the device statistics structure.
5608  **/
5609 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5610                                              struct rtnl_link_stats64 *stats)
5611 {
5612         struct e1000_adapter *adapter = netdev_priv(netdev);
5613
5614         memset(stats, 0, sizeof(struct rtnl_link_stats64));
5615         spin_lock(&adapter->stats64_lock);
5616         e1000e_update_stats(adapter);
5617         /* Fill out the OS statistics structure */
5618         stats->rx_bytes = adapter->stats.gorc;
5619         stats->rx_packets = adapter->stats.gprc;
5620         stats->tx_bytes = adapter->stats.gotc;
5621         stats->tx_packets = adapter->stats.gptc;
5622         stats->multicast = adapter->stats.mprc;
5623         stats->collisions = adapter->stats.colc;
5624
5625         /* Rx Errors */
5626
5627         /* RLEC on some newer hardware can be incorrect so build
5628          * our own version based on RUC and ROC
5629          */
5630         stats->rx_errors = adapter->stats.rxerrc +
5631             adapter->stats.crcerrs + adapter->stats.algnerrc +
5632             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5633         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5634         stats->rx_crc_errors = adapter->stats.crcerrs;
5635         stats->rx_frame_errors = adapter->stats.algnerrc;
5636         stats->rx_missed_errors = adapter->stats.mpc;
5637
5638         /* Tx Errors */
5639         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5640         stats->tx_aborted_errors = adapter->stats.ecol;
5641         stats->tx_window_errors = adapter->stats.latecol;
5642         stats->tx_carrier_errors = adapter->stats.tncrs;
5643
5644         /* Tx Dropped needs to be maintained elsewhere */
5645
5646         spin_unlock(&adapter->stats64_lock);
5647         return stats;
5648 }
5649
5650 /**
5651  * e1000_change_mtu - Change the Maximum Transfer Unit
5652  * @netdev: network interface device structure
5653  * @new_mtu: new value for maximum frame size
5654  *
5655  * Returns 0 on success, negative on failure
5656  **/
5657 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5658 {
5659         struct e1000_adapter *adapter = netdev_priv(netdev);
5660         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5661
5662         /* Jumbo frame support */
5663         if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
5664             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5665                 e_err("Jumbo Frames not supported.\n");
5666                 return -EINVAL;
5667         }
5668
5669         /* Supported frame sizes */
5670         if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5671             (max_frame > adapter->max_hw_frame_size)) {
5672                 e_err("Unsupported MTU setting\n");
5673                 return -EINVAL;
5674         }
5675
5676         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5677         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5678             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5679             (new_mtu > ETH_DATA_LEN)) {
5680                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5681                 return -EINVAL;
5682         }
5683
5684         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5685                 usleep_range(1000, 2000);
5686         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5687         adapter->max_frame_size = max_frame;
5688         e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5689         netdev->mtu = new_mtu;
5690         if (netif_running(netdev))
5691                 e1000e_down(adapter);
5692
5693         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5694          * means we reserve 2 more, this pushes us to allocate from the next
5695          * larger slab size.
5696          * i.e. RXBUFFER_2048 --> size-4096 slab
5697          * However with the new *_jumbo_rx* routines, jumbo receives will use
5698          * fragmented skbs
5699          */
5700
5701         if (max_frame <= 2048)
5702                 adapter->rx_buffer_len = 2048;
5703         else
5704                 adapter->rx_buffer_len = 4096;
5705
5706         /* adjust allocation if LPE protects us, and we aren't using SBP */
5707         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5708             (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5709                 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5710                     + ETH_FCS_LEN;
5711
5712         if (netif_running(netdev))
5713                 e1000e_up(adapter);
5714         else
5715                 e1000e_reset(adapter);
5716
5717         clear_bit(__E1000_RESETTING, &adapter->state);
5718
5719         return 0;
5720 }
5721
5722 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5723                            int cmd)
5724 {
5725         struct e1000_adapter *adapter = netdev_priv(netdev);
5726         struct mii_ioctl_data *data = if_mii(ifr);
5727
5728         if (adapter->hw.phy.media_type != e1000_media_type_copper)
5729                 return -EOPNOTSUPP;
5730
5731         switch (cmd) {
5732         case SIOCGMIIPHY:
5733                 data->phy_id = adapter->hw.phy.addr;
5734                 break;
5735         case SIOCGMIIREG:
5736                 e1000_phy_read_status(adapter);
5737
5738                 switch (data->reg_num & 0x1F) {
5739                 case MII_BMCR:
5740                         data->val_out = adapter->phy_regs.bmcr;
5741                         break;
5742                 case MII_BMSR:
5743                         data->val_out = adapter->phy_regs.bmsr;
5744                         break;
5745                 case MII_PHYSID1:
5746                         data->val_out = (adapter->hw.phy.id >> 16);
5747                         break;
5748                 case MII_PHYSID2:
5749                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
5750                         break;
5751                 case MII_ADVERTISE:
5752                         data->val_out = adapter->phy_regs.advertise;
5753                         break;
5754                 case MII_LPA:
5755                         data->val_out = adapter->phy_regs.lpa;
5756                         break;
5757                 case MII_EXPANSION:
5758                         data->val_out = adapter->phy_regs.expansion;
5759                         break;
5760                 case MII_CTRL1000:
5761                         data->val_out = adapter->phy_regs.ctrl1000;
5762                         break;
5763                 case MII_STAT1000:
5764                         data->val_out = adapter->phy_regs.stat1000;
5765                         break;
5766                 case MII_ESTATUS:
5767                         data->val_out = adapter->phy_regs.estatus;
5768                         break;
5769                 default:
5770                         return -EIO;
5771                 }
5772                 break;
5773         case SIOCSMIIREG:
5774         default:
5775                 return -EOPNOTSUPP;
5776         }
5777         return 0;
5778 }
5779
5780 /**
5781  * e1000e_hwtstamp_ioctl - control hardware time stamping
5782  * @netdev: network interface device structure
5783  * @ifreq: interface request
5784  *
5785  * Outgoing time stamping can be enabled and disabled. Play nice and
5786  * disable it when requested, although it shouldn't cause any overhead
5787  * when no packet needs it. At most one packet in the queue may be
5788  * marked for time stamping, otherwise it would be impossible to tell
5789  * for sure to which packet the hardware time stamp belongs.
5790  *
5791  * Incoming time stamping has to be configured via the hardware filters.
5792  * Not all combinations are supported, in particular event type has to be
5793  * specified. Matching the kind of event packet is not supported, with the
5794  * exception of "all V2 events regardless of level 2 or 4".
5795  **/
5796 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
5797 {
5798         struct e1000_adapter *adapter = netdev_priv(netdev);
5799         struct hwtstamp_config config;
5800         int ret_val;
5801
5802         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
5803                 return -EFAULT;
5804
5805         ret_val = e1000e_config_hwtstamp(adapter, &config);
5806         if (ret_val)
5807                 return ret_val;
5808
5809         switch (config.rx_filter) {
5810         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
5811         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
5812         case HWTSTAMP_FILTER_PTP_V2_SYNC:
5813         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
5814         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
5815         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
5816                 /* With V2 type filters which specify a Sync or Delay Request,
5817                  * Path Delay Request/Response messages are also time stamped
5818                  * by hardware so notify the caller the requested packets plus
5819                  * some others are time stamped.
5820                  */
5821                 config.rx_filter = HWTSTAMP_FILTER_SOME;
5822                 break;
5823         default:
5824                 break;
5825         }
5826
5827         return copy_to_user(ifr->ifr_data, &config,
5828                             sizeof(config)) ? -EFAULT : 0;
5829 }
5830
5831 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
5832 {
5833         struct e1000_adapter *adapter = netdev_priv(netdev);
5834
5835         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
5836                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
5837 }
5838
5839 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5840 {
5841         switch (cmd) {
5842         case SIOCGMIIPHY:
5843         case SIOCGMIIREG:
5844         case SIOCSMIIREG:
5845                 return e1000_mii_ioctl(netdev, ifr, cmd);
5846         case SIOCSHWTSTAMP:
5847                 return e1000e_hwtstamp_set(netdev, ifr);
5848         case SIOCGHWTSTAMP:
5849                 return e1000e_hwtstamp_get(netdev, ifr);
5850         default:
5851                 return -EOPNOTSUPP;
5852         }
5853 }
5854
5855 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5856 {
5857         struct e1000_hw *hw = &adapter->hw;
5858         u32 i, mac_reg;
5859         u16 phy_reg, wuc_enable;
5860         int retval;
5861
5862         /* copy MAC RARs to PHY RARs */
5863         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5864
5865         retval = hw->phy.ops.acquire(hw);
5866         if (retval) {
5867                 e_err("Could not acquire PHY\n");
5868                 return retval;
5869         }
5870
5871         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5872         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5873         if (retval)
5874                 goto release;
5875
5876         /* copy MAC MTA to PHY MTA - only needed for pchlan */
5877         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5878                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5879                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5880                                            (u16)(mac_reg & 0xFFFF));
5881                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5882                                            (u16)((mac_reg >> 16) & 0xFFFF));
5883         }
5884
5885         /* configure PHY Rx Control register */
5886         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
5887         mac_reg = er32(RCTL);
5888         if (mac_reg & E1000_RCTL_UPE)
5889                 phy_reg |= BM_RCTL_UPE;
5890         if (mac_reg & E1000_RCTL_MPE)
5891                 phy_reg |= BM_RCTL_MPE;
5892         phy_reg &= ~(BM_RCTL_MO_MASK);
5893         if (mac_reg & E1000_RCTL_MO_3)
5894                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5895                             << BM_RCTL_MO_SHIFT);
5896         if (mac_reg & E1000_RCTL_BAM)
5897                 phy_reg |= BM_RCTL_BAM;
5898         if (mac_reg & E1000_RCTL_PMCF)
5899                 phy_reg |= BM_RCTL_PMCF;
5900         mac_reg = er32(CTRL);
5901         if (mac_reg & E1000_CTRL_RFCE)
5902                 phy_reg |= BM_RCTL_RFCE;
5903         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
5904
5905         /* enable PHY wakeup in MAC register */
5906         ew32(WUFC, wufc);
5907         ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5908
5909         /* configure and enable PHY wakeup in PHY registers */
5910         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5911         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5912
5913         /* activate PHY wakeup */
5914         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5915         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5916         if (retval)
5917                 e_err("Could not set PHY Host Wakeup bit\n");
5918 release:
5919         hw->phy.ops.release(hw);
5920
5921         return retval;
5922 }
5923
5924 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
5925 {
5926         struct net_device *netdev = pci_get_drvdata(pdev);
5927         struct e1000_adapter *adapter = netdev_priv(netdev);
5928         struct e1000_hw *hw = &adapter->hw;
5929         u32 ctrl, ctrl_ext, rctl, status;
5930         /* Runtime suspend should only enable wakeup for link changes */
5931         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
5932         int retval = 0;
5933
5934         netif_device_detach(netdev);
5935
5936         if (netif_running(netdev)) {
5937                 int count = E1000_CHECK_RESET_COUNT;
5938
5939                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
5940                         usleep_range(10000, 20000);
5941
5942                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5943                 e1000e_down(adapter);
5944                 e1000_free_irq(adapter);
5945         }
5946         e1000e_reset_interrupt_capability(adapter);
5947
5948         status = er32(STATUS);
5949         if (status & E1000_STATUS_LU)
5950                 wufc &= ~E1000_WUFC_LNKC;
5951
5952         if (wufc) {
5953                 e1000_setup_rctl(adapter);
5954                 e1000e_set_rx_mode(netdev);
5955
5956                 /* turn on all-multi mode if wake on multicast is enabled */
5957                 if (wufc & E1000_WUFC_MC) {
5958                         rctl = er32(RCTL);
5959                         rctl |= E1000_RCTL_MPE;
5960                         ew32(RCTL, rctl);
5961                 }
5962
5963                 ctrl = er32(CTRL);
5964                 ctrl |= E1000_CTRL_ADVD3WUC;
5965                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5966                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
5967                 ew32(CTRL, ctrl);
5968
5969                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5970                     adapter->hw.phy.media_type ==
5971                     e1000_media_type_internal_serdes) {
5972                         /* keep the laser running in D3 */
5973                         ctrl_ext = er32(CTRL_EXT);
5974                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
5975                         ew32(CTRL_EXT, ctrl_ext);
5976                 }
5977
5978                 if (adapter->flags & FLAG_IS_ICH)
5979                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
5980
5981                 /* Allow time for pending master requests to run */
5982                 e1000e_disable_pcie_master(&adapter->hw);
5983
5984                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5985                         /* enable wakeup by the PHY */
5986                         retval = e1000_init_phy_wakeup(adapter, wufc);
5987                         if (retval)
5988                                 return retval;
5989                 } else {
5990                         /* enable wakeup by the MAC */
5991                         ew32(WUFC, wufc);
5992                         ew32(WUC, E1000_WUC_PME_EN);
5993                 }
5994         } else {
5995                 ew32(WUC, 0);
5996                 ew32(WUFC, 0);
5997         }
5998
5999         if (adapter->hw.phy.type == e1000_phy_igp_3)
6000                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6001
6002         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6003          * would have already happened in close and is redundant.
6004          */
6005         e1000e_release_hw_control(adapter);
6006
6007         pci_clear_master(pdev);
6008
6009         /* The pci-e switch on some quad port adapters will report a
6010          * correctable error when the MAC transitions from D0 to D3.  To
6011          * prevent this we need to mask off the correctable errors on the
6012          * downstream port of the pci-e switch.
6013          *
6014          * We don't have the associated upstream bridge while assigning
6015          * the PCI device into guest. For example, the KVM on power is
6016          * one of the cases.
6017          */
6018         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6019                 struct pci_dev *us_dev = pdev->bus->self;
6020                 u16 devctl;
6021
6022                 if (!us_dev)
6023                         return 0;
6024
6025                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6026                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6027                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6028
6029                 pci_save_state(pdev);
6030                 pci_prepare_to_sleep(pdev);
6031
6032                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6033         }
6034
6035         return 0;
6036 }
6037
6038 /**
6039  * e1000e_disable_aspm - Disable ASPM states
6040  * @pdev: pointer to PCI device struct
6041  * @state: bit-mask of ASPM states to disable
6042  *
6043  * Some devices *must* have certain ASPM states disabled per hardware errata.
6044  **/
6045 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6046 {
6047         struct pci_dev *parent = pdev->bus->self;
6048         u16 aspm_dis_mask = 0;
6049         u16 pdev_aspmc, parent_aspmc;
6050
6051         switch (state) {
6052         case PCIE_LINK_STATE_L0S:
6053         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6054                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6055                 /* fall-through - can't have L1 without L0s */
6056         case PCIE_LINK_STATE_L1:
6057                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6058                 break;
6059         default:
6060                 return;
6061         }
6062
6063         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6064         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6065
6066         if (parent) {
6067                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6068                                           &parent_aspmc);
6069                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6070         }
6071
6072         /* Nothing to do if the ASPM states to be disabled already are */
6073         if (!(pdev_aspmc & aspm_dis_mask) &&
6074             (!parent || !(parent_aspmc & aspm_dis_mask)))
6075                 return;
6076
6077         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6078                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6079                  "L0s" : "",
6080                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6081                  "L1" : "");
6082
6083 #ifdef CONFIG_PCIEASPM
6084         pci_disable_link_state_locked(pdev, state);
6085
6086         /* Double-check ASPM control.  If not disabled by the above, the
6087          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6088          * not enabled); override by writing PCI config space directly.
6089          */
6090         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6091         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6092
6093         if (!(aspm_dis_mask & pdev_aspmc))
6094                 return;
6095 #endif
6096
6097         /* Both device and parent should have the same ASPM setting.
6098          * Disable ASPM in downstream component first and then upstream.
6099          */
6100         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6101
6102         if (parent)
6103                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6104                                            aspm_dis_mask);
6105 }
6106
6107 #ifdef CONFIG_PM
6108 static bool e1000e_pm_ready(struct e1000_adapter *adapter)
6109 {
6110         return !!adapter->tx_ring->buffer_info;
6111 }
6112
6113 static int __e1000_resume(struct pci_dev *pdev)
6114 {
6115         struct net_device *netdev = pci_get_drvdata(pdev);
6116         struct e1000_adapter *adapter = netdev_priv(netdev);
6117         struct e1000_hw *hw = &adapter->hw;
6118         u16 aspm_disable_flag = 0;
6119         u32 err;
6120
6121         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6122                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6123         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6124                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6125         if (aspm_disable_flag)
6126                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6127
6128         pci_set_master(pdev);
6129
6130         e1000e_set_interrupt_capability(adapter);
6131         if (netif_running(netdev)) {
6132                 err = e1000_request_irq(adapter);
6133                 if (err)
6134                         return err;
6135         }
6136
6137         if (hw->mac.type >= e1000_pch2lan)
6138                 e1000_resume_workarounds_pchlan(&adapter->hw);
6139
6140         e1000e_power_up_phy(adapter);
6141
6142         /* report the system wakeup cause from S3/S4 */
6143         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6144                 u16 phy_data;
6145
6146                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6147                 if (phy_data) {
6148                         e_info("PHY Wakeup cause - %s\n",
6149                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6150                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6151                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6152                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6153                                phy_data & E1000_WUS_LNKC ?
6154                                "Link Status Change" : "other");
6155                 }
6156                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6157         } else {
6158                 u32 wus = er32(WUS);
6159                 if (wus) {
6160                         e_info("MAC Wakeup cause - %s\n",
6161                                wus & E1000_WUS_EX ? "Unicast Packet" :
6162                                wus & E1000_WUS_MC ? "Multicast Packet" :
6163                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6164                                wus & E1000_WUS_MAG ? "Magic Packet" :
6165                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6166                                "other");
6167                 }
6168                 ew32(WUS, ~0);
6169         }
6170
6171         e1000e_reset(adapter);
6172
6173         e1000_init_manageability_pt(adapter);
6174
6175         if (netif_running(netdev))
6176                 e1000e_up(adapter);
6177
6178         netif_device_attach(netdev);
6179
6180         /* If the controller has AMT, do not set DRV_LOAD until the interface
6181          * is up.  For all other cases, let the f/w know that the h/w is now
6182          * under the control of the driver.
6183          */
6184         if (!(adapter->flags & FLAG_HAS_AMT))
6185                 e1000e_get_hw_control(adapter);
6186
6187         return 0;
6188 }
6189
6190 #ifdef CONFIG_PM_SLEEP
6191 static int e1000_suspend(struct device *dev)
6192 {
6193         struct pci_dev *pdev = to_pci_dev(dev);
6194
6195         return __e1000_shutdown(pdev, false);
6196 }
6197
6198 static int e1000_resume(struct device *dev)
6199 {
6200         struct pci_dev *pdev = to_pci_dev(dev);
6201         struct net_device *netdev = pci_get_drvdata(pdev);
6202         struct e1000_adapter *adapter = netdev_priv(netdev);
6203
6204         if (e1000e_pm_ready(adapter))
6205                 adapter->idle_check = true;
6206
6207         return __e1000_resume(pdev);
6208 }
6209 #endif /* CONFIG_PM_SLEEP */
6210
6211 #ifdef CONFIG_PM_RUNTIME
6212 static int e1000_runtime_suspend(struct device *dev)
6213 {
6214         struct pci_dev *pdev = to_pci_dev(dev);
6215         struct net_device *netdev = pci_get_drvdata(pdev);
6216         struct e1000_adapter *adapter = netdev_priv(netdev);
6217
6218         if (!e1000e_pm_ready(adapter))
6219                 return 0;
6220
6221         return __e1000_shutdown(pdev, true);
6222 }
6223
6224 static int e1000_idle(struct device *dev)
6225 {
6226         struct pci_dev *pdev = to_pci_dev(dev);
6227         struct net_device *netdev = pci_get_drvdata(pdev);
6228         struct e1000_adapter *adapter = netdev_priv(netdev);
6229
6230         if (!e1000e_pm_ready(adapter))
6231                 return 0;
6232
6233         if (adapter->idle_check) {
6234                 adapter->idle_check = false;
6235                 if (!e1000e_has_link(adapter))
6236                         pm_schedule_suspend(dev, MSEC_PER_SEC);
6237         }
6238
6239         return -EBUSY;
6240 }
6241
6242 static int e1000_runtime_resume(struct device *dev)
6243 {
6244         struct pci_dev *pdev = to_pci_dev(dev);
6245         struct net_device *netdev = pci_get_drvdata(pdev);
6246         struct e1000_adapter *adapter = netdev_priv(netdev);
6247
6248         if (!e1000e_pm_ready(adapter))
6249                 return 0;
6250
6251         adapter->idle_check = !dev->power.runtime_auto;
6252         return __e1000_resume(pdev);
6253 }
6254 #endif /* CONFIG_PM_RUNTIME */
6255 #endif /* CONFIG_PM */
6256
6257 static void e1000_shutdown(struct pci_dev *pdev)
6258 {
6259         __e1000_shutdown(pdev, false);
6260 }
6261
6262 #ifdef CONFIG_NET_POLL_CONTROLLER
6263
6264 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6265 {
6266         struct net_device *netdev = data;
6267         struct e1000_adapter *adapter = netdev_priv(netdev);
6268
6269         if (adapter->msix_entries) {
6270                 int vector, msix_irq;
6271
6272                 vector = 0;
6273                 msix_irq = adapter->msix_entries[vector].vector;
6274                 disable_irq(msix_irq);
6275                 e1000_intr_msix_rx(msix_irq, netdev);
6276                 enable_irq(msix_irq);
6277
6278                 vector++;
6279                 msix_irq = adapter->msix_entries[vector].vector;
6280                 disable_irq(msix_irq);
6281                 e1000_intr_msix_tx(msix_irq, netdev);
6282                 enable_irq(msix_irq);
6283
6284                 vector++;
6285                 msix_irq = adapter->msix_entries[vector].vector;
6286                 disable_irq(msix_irq);
6287                 e1000_msix_other(msix_irq, netdev);
6288                 enable_irq(msix_irq);
6289         }
6290
6291         return IRQ_HANDLED;
6292 }
6293
6294 /**
6295  * e1000_netpoll
6296  * @netdev: network interface device structure
6297  *
6298  * Polling 'interrupt' - used by things like netconsole to send skbs
6299  * without having to re-enable interrupts. It's not called while
6300  * the interrupt routine is executing.
6301  */
6302 static void e1000_netpoll(struct net_device *netdev)
6303 {
6304         struct e1000_adapter *adapter = netdev_priv(netdev);
6305
6306         switch (adapter->int_mode) {
6307         case E1000E_INT_MODE_MSIX:
6308                 e1000_intr_msix(adapter->pdev->irq, netdev);
6309                 break;
6310         case E1000E_INT_MODE_MSI:
6311                 disable_irq(adapter->pdev->irq);
6312                 e1000_intr_msi(adapter->pdev->irq, netdev);
6313                 enable_irq(adapter->pdev->irq);
6314                 break;
6315         default:                /* E1000E_INT_MODE_LEGACY */
6316                 disable_irq(adapter->pdev->irq);
6317                 e1000_intr(adapter->pdev->irq, netdev);
6318                 enable_irq(adapter->pdev->irq);
6319                 break;
6320         }
6321 }
6322 #endif
6323
6324 /**
6325  * e1000_io_error_detected - called when PCI error is detected
6326  * @pdev: Pointer to PCI device
6327  * @state: The current pci connection state
6328  *
6329  * This function is called after a PCI bus error affecting
6330  * this device has been detected.
6331  */
6332 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6333                                                 pci_channel_state_t state)
6334 {
6335         struct net_device *netdev = pci_get_drvdata(pdev);
6336         struct e1000_adapter *adapter = netdev_priv(netdev);
6337
6338         netif_device_detach(netdev);
6339
6340         if (state == pci_channel_io_perm_failure)
6341                 return PCI_ERS_RESULT_DISCONNECT;
6342
6343         if (netif_running(netdev))
6344                 e1000e_down(adapter);
6345         pci_disable_device(pdev);
6346
6347         /* Request a slot slot reset. */
6348         return PCI_ERS_RESULT_NEED_RESET;
6349 }
6350
6351 /**
6352  * e1000_io_slot_reset - called after the pci bus has been reset.
6353  * @pdev: Pointer to PCI device
6354  *
6355  * Restart the card from scratch, as if from a cold-boot. Implementation
6356  * resembles the first-half of the e1000_resume routine.
6357  */
6358 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6359 {
6360         struct net_device *netdev = pci_get_drvdata(pdev);
6361         struct e1000_adapter *adapter = netdev_priv(netdev);
6362         struct e1000_hw *hw = &adapter->hw;
6363         u16 aspm_disable_flag = 0;
6364         int err;
6365         pci_ers_result_t result;
6366
6367         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6368                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6369         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6370                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6371         if (aspm_disable_flag)
6372                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6373
6374         err = pci_enable_device_mem(pdev);
6375         if (err) {
6376                 dev_err(&pdev->dev,
6377                         "Cannot re-enable PCI device after reset.\n");
6378                 result = PCI_ERS_RESULT_DISCONNECT;
6379         } else {
6380                 pdev->state_saved = true;
6381                 pci_restore_state(pdev);
6382                 pci_set_master(pdev);
6383
6384                 pci_enable_wake(pdev, PCI_D3hot, 0);
6385                 pci_enable_wake(pdev, PCI_D3cold, 0);
6386
6387                 e1000e_reset(adapter);
6388                 ew32(WUS, ~0);
6389                 result = PCI_ERS_RESULT_RECOVERED;
6390         }
6391
6392         pci_cleanup_aer_uncorrect_error_status(pdev);
6393
6394         return result;
6395 }
6396
6397 /**
6398  * e1000_io_resume - called when traffic can start flowing again.
6399  * @pdev: Pointer to PCI device
6400  *
6401  * This callback is called when the error recovery driver tells us that
6402  * its OK to resume normal operation. Implementation resembles the
6403  * second-half of the e1000_resume routine.
6404  */
6405 static void e1000_io_resume(struct pci_dev *pdev)
6406 {
6407         struct net_device *netdev = pci_get_drvdata(pdev);
6408         struct e1000_adapter *adapter = netdev_priv(netdev);
6409
6410         e1000_init_manageability_pt(adapter);
6411
6412         if (netif_running(netdev)) {
6413                 if (e1000e_up(adapter)) {
6414                         dev_err(&pdev->dev,
6415                                 "can't bring device back up after reset\n");
6416                         return;
6417                 }
6418         }
6419
6420         netif_device_attach(netdev);
6421
6422         /* If the controller has AMT, do not set DRV_LOAD until the interface
6423          * is up.  For all other cases, let the f/w know that the h/w is now
6424          * under the control of the driver.
6425          */
6426         if (!(adapter->flags & FLAG_HAS_AMT))
6427                 e1000e_get_hw_control(adapter);
6428 }
6429
6430 static void e1000_print_device_info(struct e1000_adapter *adapter)
6431 {
6432         struct e1000_hw *hw = &adapter->hw;
6433         struct net_device *netdev = adapter->netdev;
6434         u32 ret_val;
6435         u8 pba_str[E1000_PBANUM_LENGTH];
6436
6437         /* print bus type/speed/width info */
6438         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6439                /* bus width */
6440                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6441                 "Width x1"),
6442                /* MAC address */
6443                netdev->dev_addr);
6444         e_info("Intel(R) PRO/%s Network Connection\n",
6445                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6446         ret_val = e1000_read_pba_string_generic(hw, pba_str,
6447                                                 E1000_PBANUM_LENGTH);
6448         if (ret_val)
6449                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6450         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6451                hw->mac.type, hw->phy.type, pba_str);
6452 }
6453
6454 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6455 {
6456         struct e1000_hw *hw = &adapter->hw;
6457         int ret_val;
6458         u16 buf = 0;
6459
6460         if (hw->mac.type != e1000_82573)
6461                 return;
6462
6463         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6464         le16_to_cpus(&buf);
6465         if (!ret_val && (!(buf & (1 << 0)))) {
6466                 /* Deep Smart Power Down (DSPD) */
6467                 dev_warn(&adapter->pdev->dev,
6468                          "Warning: detected DSPD enabled in EEPROM\n");
6469         }
6470 }
6471
6472 static int e1000_set_features(struct net_device *netdev,
6473                               netdev_features_t features)
6474 {
6475         struct e1000_adapter *adapter = netdev_priv(netdev);
6476         netdev_features_t changed = features ^ netdev->features;
6477
6478         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6479                 adapter->flags |= FLAG_TSO_FORCE;
6480
6481         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6482                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6483                          NETIF_F_RXALL)))
6484                 return 0;
6485
6486         if (changed & NETIF_F_RXFCS) {
6487                 if (features & NETIF_F_RXFCS) {
6488                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6489                 } else {
6490                         /* We need to take it back to defaults, which might mean
6491                          * stripping is still disabled at the adapter level.
6492                          */
6493                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6494                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6495                         else
6496                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6497                 }
6498         }
6499
6500         netdev->features = features;
6501
6502         if (netif_running(netdev))
6503                 e1000e_reinit_locked(adapter);
6504         else
6505                 e1000e_reset(adapter);
6506
6507         return 0;
6508 }
6509
6510 static const struct net_device_ops e1000e_netdev_ops = {
6511         .ndo_open               = e1000_open,
6512         .ndo_stop               = e1000_close,
6513         .ndo_start_xmit         = e1000_xmit_frame,
6514         .ndo_get_stats64        = e1000e_get_stats64,
6515         .ndo_set_rx_mode        = e1000e_set_rx_mode,
6516         .ndo_set_mac_address    = e1000_set_mac,
6517         .ndo_change_mtu         = e1000_change_mtu,
6518         .ndo_do_ioctl           = e1000_ioctl,
6519         .ndo_tx_timeout         = e1000_tx_timeout,
6520         .ndo_validate_addr      = eth_validate_addr,
6521
6522         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
6523         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
6524 #ifdef CONFIG_NET_POLL_CONTROLLER
6525         .ndo_poll_controller    = e1000_netpoll,
6526 #endif
6527         .ndo_set_features = e1000_set_features,
6528 };
6529
6530 /**
6531  * e1000_probe - Device Initialization Routine
6532  * @pdev: PCI device information struct
6533  * @ent: entry in e1000_pci_tbl
6534  *
6535  * Returns 0 on success, negative on failure
6536  *
6537  * e1000_probe initializes an adapter identified by a pci_dev structure.
6538  * The OS initialization, configuring of the adapter private structure,
6539  * and a hardware reset occur.
6540  **/
6541 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6542 {
6543         struct net_device *netdev;
6544         struct e1000_adapter *adapter;
6545         struct e1000_hw *hw;
6546         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
6547         resource_size_t mmio_start, mmio_len;
6548         resource_size_t flash_start, flash_len;
6549         static int cards_found;
6550         u16 aspm_disable_flag = 0;
6551         int bars, i, err, pci_using_dac;
6552         u16 eeprom_data = 0;
6553         u16 eeprom_apme_mask = E1000_EEPROM_APME;
6554
6555         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6556                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6557         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
6558                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6559         if (aspm_disable_flag)
6560                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6561
6562         err = pci_enable_device_mem(pdev);
6563         if (err)
6564                 return err;
6565
6566         pci_using_dac = 0;
6567         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
6568         if (!err) {
6569                 pci_using_dac = 1;
6570         } else {
6571                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
6572                 if (err) {
6573                         dev_err(&pdev->dev,
6574                                 "No usable DMA configuration, aborting\n");
6575                         goto err_dma;
6576                 }
6577         }
6578
6579         bars = pci_select_bars(pdev, IORESOURCE_MEM);
6580         err = pci_request_selected_regions_exclusive(pdev, bars,
6581                                                      e1000e_driver_name);
6582         if (err)
6583                 goto err_pci_reg;
6584
6585         /* AER (Advanced Error Reporting) hooks */
6586         pci_enable_pcie_error_reporting(pdev);
6587
6588         pci_set_master(pdev);
6589         /* PCI config space info */
6590         err = pci_save_state(pdev);
6591         if (err)
6592                 goto err_alloc_etherdev;
6593
6594         err = -ENOMEM;
6595         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6596         if (!netdev)
6597                 goto err_alloc_etherdev;
6598
6599         SET_NETDEV_DEV(netdev, &pdev->dev);
6600
6601         netdev->irq = pdev->irq;
6602
6603         pci_set_drvdata(pdev, netdev);
6604         adapter = netdev_priv(netdev);
6605         hw = &adapter->hw;
6606         adapter->netdev = netdev;
6607         adapter->pdev = pdev;
6608         adapter->ei = ei;
6609         adapter->pba = ei->pba;
6610         adapter->flags = ei->flags;
6611         adapter->flags2 = ei->flags2;
6612         adapter->hw.adapter = adapter;
6613         adapter->hw.mac.type = ei->mac;
6614         adapter->max_hw_frame_size = ei->max_hw_frame_size;
6615         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
6616
6617         mmio_start = pci_resource_start(pdev, 0);
6618         mmio_len = pci_resource_len(pdev, 0);
6619
6620         err = -EIO;
6621         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6622         if (!adapter->hw.hw_addr)
6623                 goto err_ioremap;
6624
6625         if ((adapter->flags & FLAG_HAS_FLASH) &&
6626             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
6627                 flash_start = pci_resource_start(pdev, 1);
6628                 flash_len = pci_resource_len(pdev, 1);
6629                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6630                 if (!adapter->hw.flash_address)
6631                         goto err_flashmap;
6632         }
6633
6634         /* Set default EEE advertisement */
6635         if (adapter->flags2 & FLAG2_HAS_EEE)
6636                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
6637
6638         /* construct the net_device struct */
6639         netdev->netdev_ops = &e1000e_netdev_ops;
6640         e1000e_set_ethtool_ops(netdev);
6641         netdev->watchdog_timeo = 5 * HZ;
6642         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
6643         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
6644
6645         netdev->mem_start = mmio_start;
6646         netdev->mem_end = mmio_start + mmio_len;
6647
6648         adapter->bd_number = cards_found++;
6649
6650         e1000e_check_options(adapter);
6651
6652         /* setup adapter struct */
6653         err = e1000_sw_init(adapter);
6654         if (err)
6655                 goto err_sw_init;
6656
6657         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
6658         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
6659         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
6660
6661         err = ei->get_variants(adapter);
6662         if (err)
6663                 goto err_hw_init;
6664
6665         if ((adapter->flags & FLAG_IS_ICH) &&
6666             (adapter->flags & FLAG_READ_ONLY_NVM))
6667                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
6668
6669         hw->mac.ops.get_bus_info(&adapter->hw);
6670
6671         adapter->hw.phy.autoneg_wait_to_complete = 0;
6672
6673         /* Copper options */
6674         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
6675                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6676                 adapter->hw.phy.disable_polarity_correction = 0;
6677                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
6678         }
6679
6680         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
6681                 dev_info(&pdev->dev,
6682                          "PHY reset is blocked due to SOL/IDER session.\n");
6683
6684         /* Set initial default active device features */
6685         netdev->features = (NETIF_F_SG |
6686                             NETIF_F_HW_VLAN_CTAG_RX |
6687                             NETIF_F_HW_VLAN_CTAG_TX |
6688                             NETIF_F_TSO |
6689                             NETIF_F_TSO6 |
6690                             NETIF_F_RXHASH |
6691                             NETIF_F_RXCSUM |
6692                             NETIF_F_HW_CSUM);
6693
6694         /* Set user-changeable features (subset of all device features) */
6695         netdev->hw_features = netdev->features;
6696         netdev->hw_features |= NETIF_F_RXFCS;
6697         netdev->priv_flags |= IFF_SUPP_NOFCS;
6698         netdev->hw_features |= NETIF_F_RXALL;
6699
6700         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
6701                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
6702
6703         netdev->vlan_features |= (NETIF_F_SG |
6704                                   NETIF_F_TSO |
6705                                   NETIF_F_TSO6 |
6706                                   NETIF_F_HW_CSUM);
6707
6708         netdev->priv_flags |= IFF_UNICAST_FLT;
6709
6710         if (pci_using_dac) {
6711                 netdev->features |= NETIF_F_HIGHDMA;
6712                 netdev->vlan_features |= NETIF_F_HIGHDMA;
6713         }
6714
6715         if (e1000e_enable_mng_pass_thru(&adapter->hw))
6716                 adapter->flags |= FLAG_MNG_PT_ENABLED;
6717
6718         /* before reading the NVM, reset the controller to
6719          * put the device in a known good starting state
6720          */
6721         adapter->hw.mac.ops.reset_hw(&adapter->hw);
6722
6723         /* systems with ASPM and others may see the checksum fail on the first
6724          * attempt. Let's give it a few tries
6725          */
6726         for (i = 0;; i++) {
6727                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6728                         break;
6729                 if (i == 2) {
6730                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
6731                         err = -EIO;
6732                         goto err_eeprom;
6733                 }
6734         }
6735
6736         e1000_eeprom_checks(adapter);
6737
6738         /* copy the MAC address */
6739         if (e1000e_read_mac_addr(&adapter->hw))
6740                 dev_err(&pdev->dev,
6741                         "NVM Read Error while reading MAC address\n");
6742
6743         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6744
6745         if (!is_valid_ether_addr(netdev->dev_addr)) {
6746                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
6747                         netdev->dev_addr);
6748                 err = -EIO;
6749                 goto err_eeprom;
6750         }
6751
6752         init_timer(&adapter->watchdog_timer);
6753         adapter->watchdog_timer.function = e1000_watchdog;
6754         adapter->watchdog_timer.data = (unsigned long)adapter;
6755
6756         init_timer(&adapter->phy_info_timer);
6757         adapter->phy_info_timer.function = e1000_update_phy_info;
6758         adapter->phy_info_timer.data = (unsigned long)adapter;
6759
6760         INIT_WORK(&adapter->reset_task, e1000_reset_task);
6761         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
6762         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6763         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
6764         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
6765
6766         /* Initialize link parameters. User can change them with ethtool */
6767         adapter->hw.mac.autoneg = 1;
6768         adapter->fc_autoneg = true;
6769         adapter->hw.fc.requested_mode = e1000_fc_default;
6770         adapter->hw.fc.current_mode = e1000_fc_default;
6771         adapter->hw.phy.autoneg_advertised = 0x2f;
6772
6773         /* Initial Wake on LAN setting - If APM wake is enabled in
6774          * the EEPROM, enable the ACPI Magic Packet filter
6775          */
6776         if (adapter->flags & FLAG_APME_IN_WUC) {
6777                 /* APME bit in EEPROM is mapped to WUC.APME */
6778                 eeprom_data = er32(WUC);
6779                 eeprom_apme_mask = E1000_WUC_APME;
6780                 if ((hw->mac.type > e1000_ich10lan) &&
6781                     (eeprom_data & E1000_WUC_PHY_WAKE))
6782                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6783         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6784                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6785                     (adapter->hw.bus.func == 1))
6786                         e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B,
6787                                        1, &eeprom_data);
6788                 else
6789                         e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A,
6790                                        1, &eeprom_data);
6791         }
6792
6793         /* fetch WoL from EEPROM */
6794         if (eeprom_data & eeprom_apme_mask)
6795                 adapter->eeprom_wol |= E1000_WUFC_MAG;
6796
6797         /* now that we have the eeprom settings, apply the special cases
6798          * where the eeprom may be wrong or the board simply won't support
6799          * wake on lan on a particular port
6800          */
6801         if (!(adapter->flags & FLAG_HAS_WOL))
6802                 adapter->eeprom_wol = 0;
6803
6804         /* initialize the wol settings based on the eeprom settings */
6805         adapter->wol = adapter->eeprom_wol;
6806
6807         /* make sure adapter isn't asleep if manageability is enabled */
6808         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
6809             (hw->mac.ops.check_mng_mode(hw)))
6810                 device_wakeup_enable(&pdev->dev);
6811
6812         /* save off EEPROM version number */
6813         e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6814
6815         /* reset the hardware with the new settings */
6816         e1000e_reset(adapter);
6817
6818         /* If the controller has AMT, do not set DRV_LOAD until the interface
6819          * is up.  For all other cases, let the f/w know that the h/w is now
6820          * under the control of the driver.
6821          */
6822         if (!(adapter->flags & FLAG_HAS_AMT))
6823                 e1000e_get_hw_control(adapter);
6824
6825         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
6826         err = register_netdev(netdev);
6827         if (err)
6828                 goto err_register;
6829
6830         /* carrier off reporting is important to ethtool even BEFORE open */
6831         netif_carrier_off(netdev);
6832
6833         /* init PTP hardware clock */
6834         e1000e_ptp_init(adapter);
6835
6836         e1000_print_device_info(adapter);
6837
6838         if (pci_dev_run_wake(pdev))
6839                 pm_runtime_put_noidle(&pdev->dev);
6840
6841         return 0;
6842
6843 err_register:
6844         if (!(adapter->flags & FLAG_HAS_AMT))
6845                 e1000e_release_hw_control(adapter);
6846 err_eeprom:
6847         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
6848                 e1000_phy_hw_reset(&adapter->hw);
6849 err_hw_init:
6850         kfree(adapter->tx_ring);
6851         kfree(adapter->rx_ring);
6852 err_sw_init:
6853         if (adapter->hw.flash_address)
6854                 iounmap(adapter->hw.flash_address);
6855         e1000e_reset_interrupt_capability(adapter);
6856 err_flashmap:
6857         iounmap(adapter->hw.hw_addr);
6858 err_ioremap:
6859         free_netdev(netdev);
6860 err_alloc_etherdev:
6861         pci_release_selected_regions(pdev,
6862                                      pci_select_bars(pdev, IORESOURCE_MEM));
6863 err_pci_reg:
6864 err_dma:
6865         pci_disable_device(pdev);
6866         return err;
6867 }
6868
6869 /**
6870  * e1000_remove - Device Removal Routine
6871  * @pdev: PCI device information struct
6872  *
6873  * e1000_remove is called by the PCI subsystem to alert the driver
6874  * that it should release a PCI device.  The could be caused by a
6875  * Hot-Plug event, or because the driver is going to be removed from
6876  * memory.
6877  **/
6878 static void e1000_remove(struct pci_dev *pdev)
6879 {
6880         struct net_device *netdev = pci_get_drvdata(pdev);
6881         struct e1000_adapter *adapter = netdev_priv(netdev);
6882         bool down = test_bit(__E1000_DOWN, &adapter->state);
6883
6884         e1000e_ptp_remove(adapter);
6885
6886         /* The timers may be rescheduled, so explicitly disable them
6887          * from being rescheduled.
6888          */
6889         if (!down)
6890                 set_bit(__E1000_DOWN, &adapter->state);
6891         del_timer_sync(&adapter->watchdog_timer);
6892         del_timer_sync(&adapter->phy_info_timer);
6893
6894         cancel_work_sync(&adapter->reset_task);
6895         cancel_work_sync(&adapter->watchdog_task);
6896         cancel_work_sync(&adapter->downshift_task);
6897         cancel_work_sync(&adapter->update_phy_task);
6898         cancel_work_sync(&adapter->print_hang_task);
6899
6900         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
6901                 cancel_work_sync(&adapter->tx_hwtstamp_work);
6902                 if (adapter->tx_hwtstamp_skb) {
6903                         dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
6904                         adapter->tx_hwtstamp_skb = NULL;
6905                 }
6906         }
6907
6908         if (!(netdev->flags & IFF_UP))
6909                 e1000_power_down_phy(adapter);
6910
6911         /* Don't lie to e1000_close() down the road. */
6912         if (!down)
6913                 clear_bit(__E1000_DOWN, &adapter->state);
6914         unregister_netdev(netdev);
6915
6916         if (pci_dev_run_wake(pdev))
6917                 pm_runtime_get_noresume(&pdev->dev);
6918
6919         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6920          * would have already happened in close and is redundant.
6921          */
6922         e1000e_release_hw_control(adapter);
6923
6924         e1000e_reset_interrupt_capability(adapter);
6925         kfree(adapter->tx_ring);
6926         kfree(adapter->rx_ring);
6927
6928         iounmap(adapter->hw.hw_addr);
6929         if (adapter->hw.flash_address)
6930                 iounmap(adapter->hw.flash_address);
6931         pci_release_selected_regions(pdev,
6932                                      pci_select_bars(pdev, IORESOURCE_MEM));
6933
6934         free_netdev(netdev);
6935
6936         /* AER disable */
6937         pci_disable_pcie_error_reporting(pdev);
6938
6939         pci_disable_device(pdev);
6940 }
6941
6942 /* PCI Error Recovery (ERS) */
6943 static const struct pci_error_handlers e1000_err_handler = {
6944         .error_detected = e1000_io_error_detected,
6945         .slot_reset = e1000_io_slot_reset,
6946         .resume = e1000_io_resume,
6947 };
6948
6949 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6950         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6951         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6952         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6953         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
6954           board_82571 },
6955         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6956         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
6957         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6958         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6959         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
6960
6961         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6962         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6963         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6964         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
6965
6966         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6967         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6968         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
6969
6970         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
6971         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
6972         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
6973
6974         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6975           board_80003es2lan },
6976         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6977           board_80003es2lan },
6978         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6979           board_80003es2lan },
6980         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6981           board_80003es2lan },
6982
6983         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6984         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6985         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6986         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6987         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6988         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6989         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
6990         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
6991
6992         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6993         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6994         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6995         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6996         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
6997         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
6998         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6999         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7000         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7001
7002         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7003         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7004         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7005
7006         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7007         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7008         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7009
7010         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7011         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7012         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7013         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7014
7015         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7016         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7017
7018         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7019         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7020         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7021         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7022         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7023         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7024         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7025         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7026
7027         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7028 };
7029 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7030
7031 static const struct dev_pm_ops e1000_pm_ops = {
7032         SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
7033         SET_RUNTIME_PM_OPS(e1000_runtime_suspend, e1000_runtime_resume,
7034                            e1000_idle)
7035 };
7036
7037 /* PCI Device API Driver */
7038 static struct pci_driver e1000_driver = {
7039         .name     = e1000e_driver_name,
7040         .id_table = e1000_pci_tbl,
7041         .probe    = e1000_probe,
7042         .remove   = e1000_remove,
7043         .driver   = {
7044                 .pm = &e1000_pm_ops,
7045         },
7046         .shutdown = e1000_shutdown,
7047         .err_handler = &e1000_err_handler
7048 };
7049
7050 /**
7051  * e1000_init_module - Driver Registration Routine
7052  *
7053  * e1000_init_module is the first routine called when the driver is
7054  * loaded. All it does is register with the PCI subsystem.
7055  **/
7056 static int __init e1000_init_module(void)
7057 {
7058         int ret;
7059         pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7060                 e1000e_driver_version);
7061         pr_info("Copyright(c) 1999 - 2013 Intel Corporation.\n");
7062         ret = pci_register_driver(&e1000_driver);
7063
7064         return ret;
7065 }
7066 module_init(e1000_init_module);
7067
7068 /**
7069  * e1000_exit_module - Driver Exit Cleanup Routine
7070  *
7071  * e1000_exit_module is called just before the driver is removed
7072  * from memory.
7073  **/
7074 static void __exit e1000_exit_module(void)
7075 {
7076         pci_unregister_driver(&e1000_driver);
7077 }
7078 module_exit(e1000_exit_module);
7079
7080 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7081 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7082 MODULE_LICENSE("GPL");
7083 MODULE_VERSION(DRV_VERSION);
7084
7085 /* netdev.c */