1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #ifdef CONFIG_I40E_VXLAN
30 #include <net/vxlan.h>
33 const char i40e_driver_name[] = "i40e";
34 static const char i40e_driver_string[] =
35 "Intel(R) Ethernet Connection XL710 Network Driver";
39 #define DRV_VERSION_MAJOR 0
40 #define DRV_VERSION_MINOR 3
41 #define DRV_VERSION_BUILD 36
42 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
43 __stringify(DRV_VERSION_MINOR) "." \
44 __stringify(DRV_VERSION_BUILD) DRV_KERN
45 const char i40e_driver_version_str[] = DRV_VERSION;
46 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48 /* a bit of forward declarations */
49 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
50 static void i40e_handle_reset_warning(struct i40e_pf *pf);
51 static int i40e_add_vsi(struct i40e_vsi *vsi);
52 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
53 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
54 static int i40e_setup_misc_vector(struct i40e_pf *pf);
55 static void i40e_determine_queue_usage(struct i40e_pf *pf);
56 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
57 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
58 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60 /* i40e_pci_tbl - PCI Device ID Table
62 * Last entry must be all 0s
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
67 static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_D), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
78 /* required last entry */
81 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
83 #define I40E_MAX_VF_COUNT 128
84 static int debug = -1;
85 module_param(debug, int, 0);
86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
88 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
89 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
90 MODULE_LICENSE("GPL");
91 MODULE_VERSION(DRV_VERSION);
94 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
95 * @hw: pointer to the HW structure
96 * @mem: ptr to mem struct to fill out
97 * @size: size of memory requested
98 * @alignment: what to align the allocation to
100 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
101 u64 size, u32 alignment)
103 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
105 mem->size = ALIGN(size, alignment);
106 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
107 &mem->pa, GFP_KERNEL);
115 * i40e_free_dma_mem_d - OS specific memory free for shared code
116 * @hw: pointer to the HW structure
117 * @mem: ptr to mem struct to free
119 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
121 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
123 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
132 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
133 * @hw: pointer to the HW structure
134 * @mem: ptr to mem struct to fill out
135 * @size: size of memory requested
137 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
141 mem->va = kzalloc(size, GFP_KERNEL);
150 * i40e_free_virt_mem_d - OS specific memory free for shared code
151 * @hw: pointer to the HW structure
152 * @mem: ptr to mem struct to free
154 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
156 /* it's ok to kfree a NULL pointer */
165 * i40e_get_lump - find a lump of free generic resource
166 * @pf: board private structure
167 * @pile: the pile of resource to search
168 * @needed: the number of items needed
169 * @id: an owner id to stick on the items assigned
171 * Returns the base item index of the lump, or negative for error
173 * The search_hint trick and lack of advanced fit-finding only work
174 * because we're highly likely to have all the same size lump requests.
175 * Linear search time and any fragmentation should be minimal.
177 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
183 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
184 dev_info(&pf->pdev->dev,
185 "param err: pile=%p needed=%d id=0x%04x\n",
190 /* start the linear search with an imperfect hint */
191 i = pile->search_hint;
192 while (i < pile->num_entries) {
193 /* skip already allocated entries */
194 if (pile->list[i] & I40E_PILE_VALID_BIT) {
199 /* do we have enough in this lump? */
200 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
201 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
206 /* there was enough, so assign it to the requestor */
207 for (j = 0; j < needed; j++)
208 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
210 pile->search_hint = i + j;
213 /* not enough, so skip over it and continue looking */
222 * i40e_put_lump - return a lump of generic resource
223 * @pile: the pile of resource to search
224 * @index: the base item index
225 * @id: the owner id of the items assigned
227 * Returns the count of items in the lump
229 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
231 int valid_id = (id | I40E_PILE_VALID_BIT);
235 if (!pile || index >= pile->num_entries)
239 i < pile->num_entries && pile->list[i] == valid_id;
245 if (count && index < pile->search_hint)
246 pile->search_hint = index;
252 * i40e_service_event_schedule - Schedule the service task to wake up
253 * @pf: board private structure
255 * If not already scheduled, this puts the task into the work queue
257 static void i40e_service_event_schedule(struct i40e_pf *pf)
259 if (!test_bit(__I40E_DOWN, &pf->state) &&
260 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
261 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
262 schedule_work(&pf->service_task);
266 * i40e_tx_timeout - Respond to a Tx Hang
267 * @netdev: network interface device structure
269 * If any port has noticed a Tx timeout, it is likely that the whole
270 * device is munged, not just the one netdev port, so go for the full
273 static void i40e_tx_timeout(struct net_device *netdev)
275 struct i40e_netdev_priv *np = netdev_priv(netdev);
276 struct i40e_vsi *vsi = np->vsi;
277 struct i40e_pf *pf = vsi->back;
279 pf->tx_timeout_count++;
281 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
282 pf->tx_timeout_recovery_level = 0;
283 pf->tx_timeout_last_recovery = jiffies;
284 netdev_info(netdev, "tx_timeout recovery level %d\n",
285 pf->tx_timeout_recovery_level);
287 switch (pf->tx_timeout_recovery_level) {
289 /* disable and re-enable queues for the VSI */
290 if (in_interrupt()) {
291 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
292 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
294 i40e_vsi_reinit_locked(vsi);
298 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
301 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
304 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
307 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
308 set_bit(__I40E_DOWN, &vsi->state);
312 i40e_service_event_schedule(pf);
313 pf->tx_timeout_recovery_level++;
317 * i40e_release_rx_desc - Store the new tail and head values
318 * @rx_ring: ring to bump
319 * @val: new head index
321 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
323 rx_ring->next_to_use = val;
325 /* Force memory writes to complete before letting h/w
326 * know there are new descriptors to fetch. (Only
327 * applicable for weak-ordered memory model archs,
331 writel(val, rx_ring->tail);
335 * i40e_get_vsi_stats_struct - Get System Network Statistics
336 * @vsi: the VSI we care about
338 * Returns the address of the device statistics structure.
339 * The statistics are actually updated from the service task.
341 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
343 return &vsi->net_stats;
347 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
348 * @netdev: network interface device structure
350 * Returns the address of the device statistics structure.
351 * The statistics are actually updated from the service task.
353 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
354 struct net_device *netdev,
355 struct rtnl_link_stats64 *stats)
357 struct i40e_netdev_priv *np = netdev_priv(netdev);
358 struct i40e_vsi *vsi = np->vsi;
359 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
362 if (test_bit(__I40E_DOWN, &vsi->state))
369 for (i = 0; i < vsi->num_queue_pairs; i++) {
370 struct i40e_ring *tx_ring, *rx_ring;
374 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
379 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
380 packets = tx_ring->stats.packets;
381 bytes = tx_ring->stats.bytes;
382 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
384 stats->tx_packets += packets;
385 stats->tx_bytes += bytes;
386 rx_ring = &tx_ring[1];
389 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
390 packets = rx_ring->stats.packets;
391 bytes = rx_ring->stats.bytes;
392 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
394 stats->rx_packets += packets;
395 stats->rx_bytes += bytes;
399 /* following stats updated by ixgbe_watchdog_task() */
400 stats->multicast = vsi_stats->multicast;
401 stats->tx_errors = vsi_stats->tx_errors;
402 stats->tx_dropped = vsi_stats->tx_dropped;
403 stats->rx_errors = vsi_stats->rx_errors;
404 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
405 stats->rx_length_errors = vsi_stats->rx_length_errors;
411 * i40e_vsi_reset_stats - Resets all stats of the given vsi
412 * @vsi: the VSI to have its stats reset
414 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
416 struct rtnl_link_stats64 *ns;
422 ns = i40e_get_vsi_stats_struct(vsi);
423 memset(ns, 0, sizeof(*ns));
424 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
425 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
426 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
427 if (vsi->rx_rings && vsi->rx_rings[0]) {
428 for (i = 0; i < vsi->num_queue_pairs; i++) {
429 memset(&vsi->rx_rings[i]->stats, 0 ,
430 sizeof(vsi->rx_rings[i]->stats));
431 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
432 sizeof(vsi->rx_rings[i]->rx_stats));
433 memset(&vsi->tx_rings[i]->stats, 0 ,
434 sizeof(vsi->tx_rings[i]->stats));
435 memset(&vsi->tx_rings[i]->tx_stats, 0,
436 sizeof(vsi->tx_rings[i]->tx_stats));
439 vsi->stat_offsets_loaded = false;
443 * i40e_pf_reset_stats - Reset all of the stats for the given pf
444 * @pf: the PF to be reset
446 void i40e_pf_reset_stats(struct i40e_pf *pf)
448 memset(&pf->stats, 0, sizeof(pf->stats));
449 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
450 pf->stat_offsets_loaded = false;
454 * i40e_stat_update48 - read and update a 48 bit stat from the chip
455 * @hw: ptr to the hardware info
456 * @hireg: the high 32 bit reg to read
457 * @loreg: the low 32 bit reg to read
458 * @offset_loaded: has the initial offset been loaded yet
459 * @offset: ptr to current offset value
460 * @stat: ptr to the stat
462 * Since the device stats are not reset at PFReset, they likely will not
463 * be zeroed when the driver starts. We'll save the first values read
464 * and use them as offsets to be subtracted from the raw values in order
465 * to report stats that count from zero. In the process, we also manage
466 * the potential roll-over.
468 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
469 bool offset_loaded, u64 *offset, u64 *stat)
473 if (hw->device_id == I40E_DEV_ID_QEMU) {
474 new_data = rd32(hw, loreg);
475 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
477 new_data = rd64(hw, loreg);
481 if (likely(new_data >= *offset))
482 *stat = new_data - *offset;
484 *stat = (new_data + ((u64)1 << 48)) - *offset;
485 *stat &= 0xFFFFFFFFFFFFULL;
489 * i40e_stat_update32 - read and update a 32 bit stat from the chip
490 * @hw: ptr to the hardware info
491 * @reg: the hw reg to read
492 * @offset_loaded: has the initial offset been loaded yet
493 * @offset: ptr to current offset value
494 * @stat: ptr to the stat
496 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
497 bool offset_loaded, u64 *offset, u64 *stat)
501 new_data = rd32(hw, reg);
504 if (likely(new_data >= *offset))
505 *stat = (u32)(new_data - *offset);
507 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
511 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
512 * @vsi: the VSI to be updated
514 void i40e_update_eth_stats(struct i40e_vsi *vsi)
516 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
517 struct i40e_pf *pf = vsi->back;
518 struct i40e_hw *hw = &pf->hw;
519 struct i40e_eth_stats *oes;
520 struct i40e_eth_stats *es; /* device's eth stats */
522 es = &vsi->eth_stats;
523 oes = &vsi->eth_stats_offsets;
525 /* Gather up the stats that the hw collects */
526 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
527 vsi->stat_offsets_loaded,
528 &oes->tx_errors, &es->tx_errors);
529 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
530 vsi->stat_offsets_loaded,
531 &oes->rx_discards, &es->rx_discards);
533 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
534 I40E_GLV_GORCL(stat_idx),
535 vsi->stat_offsets_loaded,
536 &oes->rx_bytes, &es->rx_bytes);
537 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
538 I40E_GLV_UPRCL(stat_idx),
539 vsi->stat_offsets_loaded,
540 &oes->rx_unicast, &es->rx_unicast);
541 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
542 I40E_GLV_MPRCL(stat_idx),
543 vsi->stat_offsets_loaded,
544 &oes->rx_multicast, &es->rx_multicast);
545 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
546 I40E_GLV_BPRCL(stat_idx),
547 vsi->stat_offsets_loaded,
548 &oes->rx_broadcast, &es->rx_broadcast);
550 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
551 I40E_GLV_GOTCL(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->tx_bytes, &es->tx_bytes);
554 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
555 I40E_GLV_UPTCL(stat_idx),
556 vsi->stat_offsets_loaded,
557 &oes->tx_unicast, &es->tx_unicast);
558 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
559 I40E_GLV_MPTCL(stat_idx),
560 vsi->stat_offsets_loaded,
561 &oes->tx_multicast, &es->tx_multicast);
562 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
563 I40E_GLV_BPTCL(stat_idx),
564 vsi->stat_offsets_loaded,
565 &oes->tx_broadcast, &es->tx_broadcast);
566 vsi->stat_offsets_loaded = true;
570 * i40e_update_veb_stats - Update Switch component statistics
571 * @veb: the VEB being updated
573 static void i40e_update_veb_stats(struct i40e_veb *veb)
575 struct i40e_pf *pf = veb->pf;
576 struct i40e_hw *hw = &pf->hw;
577 struct i40e_eth_stats *oes;
578 struct i40e_eth_stats *es; /* device's eth stats */
581 idx = veb->stats_idx;
583 oes = &veb->stats_offsets;
585 /* Gather up the stats that the hw collects */
586 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
587 veb->stat_offsets_loaded,
588 &oes->tx_discards, &es->tx_discards);
589 if (hw->revision_id > 0)
590 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
591 veb->stat_offsets_loaded,
592 &oes->rx_unknown_protocol,
593 &es->rx_unknown_protocol);
594 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
595 veb->stat_offsets_loaded,
596 &oes->rx_bytes, &es->rx_bytes);
597 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
598 veb->stat_offsets_loaded,
599 &oes->rx_unicast, &es->rx_unicast);
600 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
601 veb->stat_offsets_loaded,
602 &oes->rx_multicast, &es->rx_multicast);
603 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
604 veb->stat_offsets_loaded,
605 &oes->rx_broadcast, &es->rx_broadcast);
607 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
608 veb->stat_offsets_loaded,
609 &oes->tx_bytes, &es->tx_bytes);
610 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
611 veb->stat_offsets_loaded,
612 &oes->tx_unicast, &es->tx_unicast);
613 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
614 veb->stat_offsets_loaded,
615 &oes->tx_multicast, &es->tx_multicast);
616 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
617 veb->stat_offsets_loaded,
618 &oes->tx_broadcast, &es->tx_broadcast);
619 veb->stat_offsets_loaded = true;
623 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
624 * @pf: the corresponding PF
626 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
628 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
630 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
631 struct i40e_hw_port_stats *nsd = &pf->stats;
632 struct i40e_hw *hw = &pf->hw;
636 if ((hw->fc.current_mode != I40E_FC_FULL) &&
637 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
640 xoff = nsd->link_xoff_rx;
641 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
642 pf->stat_offsets_loaded,
643 &osd->link_xoff_rx, &nsd->link_xoff_rx);
645 /* No new LFC xoff rx */
646 if (!(nsd->link_xoff_rx - xoff))
649 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
650 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
651 struct i40e_vsi *vsi = pf->vsi[v];
656 for (i = 0; i < vsi->num_queue_pairs; i++) {
657 struct i40e_ring *ring = vsi->tx_rings[i];
658 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
664 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
665 * @pf: the corresponding PF
667 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
669 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
671 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
672 struct i40e_hw_port_stats *nsd = &pf->stats;
673 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
674 struct i40e_dcbx_config *dcb_cfg;
675 struct i40e_hw *hw = &pf->hw;
679 dcb_cfg = &hw->local_dcbx_config;
681 /* See if DCB enabled with PFC TC */
682 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
683 !(dcb_cfg->pfc.pfcenable)) {
684 i40e_update_link_xoff_rx(pf);
688 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
689 u64 prio_xoff = nsd->priority_xoff_rx[i];
690 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
691 pf->stat_offsets_loaded,
692 &osd->priority_xoff_rx[i],
693 &nsd->priority_xoff_rx[i]);
695 /* No new PFC xoff rx */
696 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
698 /* Get the TC for given priority */
699 tc = dcb_cfg->etscfg.prioritytable[i];
703 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
704 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
705 struct i40e_vsi *vsi = pf->vsi[v];
710 for (i = 0; i < vsi->num_queue_pairs; i++) {
711 struct i40e_ring *ring = vsi->tx_rings[i];
715 clear_bit(__I40E_HANG_CHECK_ARMED,
722 * i40e_update_stats - Update the board statistics counters.
723 * @vsi: the VSI to be updated
725 * There are a few instances where we store the same stat in a
726 * couple of different structs. This is partly because we have
727 * the netdev stats that need to be filled out, which is slightly
728 * different from the "eth_stats" defined by the chip and used in
729 * VF communications. We sort it all out here in a central place.
731 void i40e_update_stats(struct i40e_vsi *vsi)
733 struct i40e_pf *pf = vsi->back;
734 struct i40e_hw *hw = &pf->hw;
735 struct rtnl_link_stats64 *ons;
736 struct rtnl_link_stats64 *ns; /* netdev stats */
737 struct i40e_eth_stats *oes;
738 struct i40e_eth_stats *es; /* device's eth stats */
739 u32 tx_restart, tx_busy;
746 if (test_bit(__I40E_DOWN, &vsi->state) ||
747 test_bit(__I40E_CONFIG_BUSY, &pf->state))
750 ns = i40e_get_vsi_stats_struct(vsi);
751 ons = &vsi->net_stats_offsets;
752 es = &vsi->eth_stats;
753 oes = &vsi->eth_stats_offsets;
755 /* Gather up the netdev and vsi stats that the driver collects
756 * on the fly during packet processing
760 tx_restart = tx_busy = 0;
764 for (q = 0; q < vsi->num_queue_pairs; q++) {
770 p = ACCESS_ONCE(vsi->tx_rings[q]);
773 start = u64_stats_fetch_begin_irq(&p->syncp);
774 packets = p->stats.packets;
775 bytes = p->stats.bytes;
776 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
779 tx_restart += p->tx_stats.restart_queue;
780 tx_busy += p->tx_stats.tx_busy;
782 /* Rx queue is part of the same block as Tx queue */
785 start = u64_stats_fetch_begin_irq(&p->syncp);
786 packets = p->stats.packets;
787 bytes = p->stats.bytes;
788 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
791 rx_buf += p->rx_stats.alloc_buff_failed;
792 rx_page += p->rx_stats.alloc_page_failed;
795 vsi->tx_restart = tx_restart;
796 vsi->tx_busy = tx_busy;
797 vsi->rx_page_failed = rx_page;
798 vsi->rx_buf_failed = rx_buf;
800 ns->rx_packets = rx_p;
802 ns->tx_packets = tx_p;
805 i40e_update_eth_stats(vsi);
806 /* update netdev stats from eth stats */
807 ons->rx_errors = oes->rx_errors;
808 ns->rx_errors = es->rx_errors;
809 ons->tx_errors = oes->tx_errors;
810 ns->tx_errors = es->tx_errors;
811 ons->multicast = oes->rx_multicast;
812 ns->multicast = es->rx_multicast;
813 ons->tx_dropped = oes->tx_discards;
814 ns->tx_dropped = es->tx_discards;
816 /* Get the port data only if this is the main PF VSI */
817 if (vsi == pf->vsi[pf->lan_vsi]) {
818 struct i40e_hw_port_stats *nsd = &pf->stats;
819 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
821 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
822 I40E_GLPRT_GORCL(hw->port),
823 pf->stat_offsets_loaded,
824 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
825 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
826 I40E_GLPRT_GOTCL(hw->port),
827 pf->stat_offsets_loaded,
828 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
829 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
830 pf->stat_offsets_loaded,
831 &osd->eth.rx_discards,
832 &nsd->eth.rx_discards);
833 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
834 pf->stat_offsets_loaded,
835 &osd->eth.tx_discards,
836 &nsd->eth.tx_discards);
837 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
838 I40E_GLPRT_MPRCL(hw->port),
839 pf->stat_offsets_loaded,
840 &osd->eth.rx_multicast,
841 &nsd->eth.rx_multicast);
843 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
844 pf->stat_offsets_loaded,
845 &osd->tx_dropped_link_down,
846 &nsd->tx_dropped_link_down);
848 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
849 pf->stat_offsets_loaded,
850 &osd->crc_errors, &nsd->crc_errors);
851 ns->rx_crc_errors = nsd->crc_errors;
853 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
854 pf->stat_offsets_loaded,
855 &osd->illegal_bytes, &nsd->illegal_bytes);
856 ns->rx_errors = nsd->crc_errors
857 + nsd->illegal_bytes;
859 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
860 pf->stat_offsets_loaded,
861 &osd->mac_local_faults,
862 &nsd->mac_local_faults);
863 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
864 pf->stat_offsets_loaded,
865 &osd->mac_remote_faults,
866 &nsd->mac_remote_faults);
868 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
869 pf->stat_offsets_loaded,
870 &osd->rx_length_errors,
871 &nsd->rx_length_errors);
872 ns->rx_length_errors = nsd->rx_length_errors;
874 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
875 pf->stat_offsets_loaded,
876 &osd->link_xon_rx, &nsd->link_xon_rx);
877 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
878 pf->stat_offsets_loaded,
879 &osd->link_xon_tx, &nsd->link_xon_tx);
880 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
881 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
882 pf->stat_offsets_loaded,
883 &osd->link_xoff_tx, &nsd->link_xoff_tx);
885 for (i = 0; i < 8; i++) {
886 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
887 pf->stat_offsets_loaded,
888 &osd->priority_xon_rx[i],
889 &nsd->priority_xon_rx[i]);
890 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
891 pf->stat_offsets_loaded,
892 &osd->priority_xon_tx[i],
893 &nsd->priority_xon_tx[i]);
894 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
895 pf->stat_offsets_loaded,
896 &osd->priority_xoff_tx[i],
897 &nsd->priority_xoff_tx[i]);
898 i40e_stat_update32(hw,
899 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
900 pf->stat_offsets_loaded,
901 &osd->priority_xon_2_xoff[i],
902 &nsd->priority_xon_2_xoff[i]);
905 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
906 I40E_GLPRT_PRC64L(hw->port),
907 pf->stat_offsets_loaded,
908 &osd->rx_size_64, &nsd->rx_size_64);
909 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
910 I40E_GLPRT_PRC127L(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->rx_size_127, &nsd->rx_size_127);
913 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
914 I40E_GLPRT_PRC255L(hw->port),
915 pf->stat_offsets_loaded,
916 &osd->rx_size_255, &nsd->rx_size_255);
917 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
918 I40E_GLPRT_PRC511L(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->rx_size_511, &nsd->rx_size_511);
921 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
922 I40E_GLPRT_PRC1023L(hw->port),
923 pf->stat_offsets_loaded,
924 &osd->rx_size_1023, &nsd->rx_size_1023);
925 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
926 I40E_GLPRT_PRC1522L(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->rx_size_1522, &nsd->rx_size_1522);
929 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
930 I40E_GLPRT_PRC9522L(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->rx_size_big, &nsd->rx_size_big);
934 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
935 I40E_GLPRT_PTC64L(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->tx_size_64, &nsd->tx_size_64);
938 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
939 I40E_GLPRT_PTC127L(hw->port),
940 pf->stat_offsets_loaded,
941 &osd->tx_size_127, &nsd->tx_size_127);
942 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
943 I40E_GLPRT_PTC255L(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->tx_size_255, &nsd->tx_size_255);
946 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
947 I40E_GLPRT_PTC511L(hw->port),
948 pf->stat_offsets_loaded,
949 &osd->tx_size_511, &nsd->tx_size_511);
950 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
951 I40E_GLPRT_PTC1023L(hw->port),
952 pf->stat_offsets_loaded,
953 &osd->tx_size_1023, &nsd->tx_size_1023);
954 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
955 I40E_GLPRT_PTC1522L(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->tx_size_1522, &nsd->tx_size_1522);
958 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
959 I40E_GLPRT_PTC9522L(hw->port),
960 pf->stat_offsets_loaded,
961 &osd->tx_size_big, &nsd->tx_size_big);
963 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->rx_undersize, &nsd->rx_undersize);
966 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->rx_fragments, &nsd->rx_fragments);
969 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
970 pf->stat_offsets_loaded,
971 &osd->rx_oversize, &nsd->rx_oversize);
972 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
973 pf->stat_offsets_loaded,
974 &osd->rx_jabber, &nsd->rx_jabber);
977 pf->stat_offsets_loaded = true;
981 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
982 * @vsi: the VSI to be searched
983 * @macaddr: the MAC address
985 * @is_vf: make sure its a vf filter, else doesn't matter
986 * @is_netdev: make sure its a netdev filter, else doesn't matter
988 * Returns ptr to the filter object or NULL
990 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
991 u8 *macaddr, s16 vlan,
992 bool is_vf, bool is_netdev)
994 struct i40e_mac_filter *f;
996 if (!vsi || !macaddr)
999 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1000 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1001 (vlan == f->vlan) &&
1002 (!is_vf || f->is_vf) &&
1003 (!is_netdev || f->is_netdev))
1010 * i40e_find_mac - Find a mac addr in the macvlan filters list
1011 * @vsi: the VSI to be searched
1012 * @macaddr: the MAC address we are searching for
1013 * @is_vf: make sure its a vf filter, else doesn't matter
1014 * @is_netdev: make sure its a netdev filter, else doesn't matter
1016 * Returns the first filter with the provided MAC address or NULL if
1017 * MAC address was not found
1019 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1020 bool is_vf, bool is_netdev)
1022 struct i40e_mac_filter *f;
1024 if (!vsi || !macaddr)
1027 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1028 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1029 (!is_vf || f->is_vf) &&
1030 (!is_netdev || f->is_netdev))
1037 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1038 * @vsi: the VSI to be searched
1040 * Returns true if VSI is in vlan mode or false otherwise
1042 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1044 struct i40e_mac_filter *f;
1046 /* Only -1 for all the filters denotes not in vlan mode
1047 * so we have to go through all the list in order to make sure
1049 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1058 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1059 * @vsi: the VSI to be searched
1060 * @macaddr: the mac address to be filtered
1061 * @is_vf: true if it is a vf
1062 * @is_netdev: true if it is a netdev
1064 * Goes through all the macvlan filters and adds a
1065 * macvlan filter for each unique vlan that already exists
1067 * Returns first filter found on success, else NULL
1069 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1070 bool is_vf, bool is_netdev)
1072 struct i40e_mac_filter *f;
1074 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1075 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1076 is_vf, is_netdev)) {
1077 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1083 return list_first_entry_or_null(&vsi->mac_filter_list,
1084 struct i40e_mac_filter, list);
1088 * i40e_add_filter - Add a mac/vlan filter to the VSI
1089 * @vsi: the VSI to be searched
1090 * @macaddr: the MAC address
1092 * @is_vf: make sure its a vf filter, else doesn't matter
1093 * @is_netdev: make sure its a netdev filter, else doesn't matter
1095 * Returns ptr to the filter object or NULL when no memory available.
1097 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1098 u8 *macaddr, s16 vlan,
1099 bool is_vf, bool is_netdev)
1101 struct i40e_mac_filter *f;
1103 if (!vsi || !macaddr)
1106 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1108 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1110 goto add_filter_out;
1112 memcpy(f->macaddr, macaddr, ETH_ALEN);
1116 INIT_LIST_HEAD(&f->list);
1117 list_add(&f->list, &vsi->mac_filter_list);
1120 /* increment counter and add a new flag if needed */
1126 } else if (is_netdev) {
1127 if (!f->is_netdev) {
1128 f->is_netdev = true;
1135 /* changed tells sync_filters_subtask to
1136 * push the filter down to the firmware
1139 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1140 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1148 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1149 * @vsi: the VSI to be searched
1150 * @macaddr: the MAC address
1152 * @is_vf: make sure it's a vf filter, else doesn't matter
1153 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1155 void i40e_del_filter(struct i40e_vsi *vsi,
1156 u8 *macaddr, s16 vlan,
1157 bool is_vf, bool is_netdev)
1159 struct i40e_mac_filter *f;
1161 if (!vsi || !macaddr)
1164 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1165 if (!f || f->counter == 0)
1173 } else if (is_netdev) {
1175 f->is_netdev = false;
1179 /* make sure we don't remove a filter in use by vf or netdev */
1181 min_f += (f->is_vf ? 1 : 0);
1182 min_f += (f->is_netdev ? 1 : 0);
1184 if (f->counter > min_f)
1188 /* counter == 0 tells sync_filters_subtask to
1189 * remove the filter from the firmware's list
1191 if (f->counter == 0) {
1193 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1194 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1199 * i40e_set_mac - NDO callback to set mac address
1200 * @netdev: network interface device structure
1201 * @p: pointer to an address structure
1203 * Returns 0 on success, negative on failure
1205 static int i40e_set_mac(struct net_device *netdev, void *p)
1207 struct i40e_netdev_priv *np = netdev_priv(netdev);
1208 struct i40e_vsi *vsi = np->vsi;
1209 struct sockaddr *addr = p;
1210 struct i40e_mac_filter *f;
1212 if (!is_valid_ether_addr(addr->sa_data))
1213 return -EADDRNOTAVAIL;
1215 netdev_info(netdev, "set mac address=%pM\n", addr->sa_data);
1217 if (ether_addr_equal(netdev->dev_addr, addr->sa_data))
1220 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1221 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1222 return -EADDRNOTAVAIL;
1224 if (vsi->type == I40E_VSI_MAIN) {
1226 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1227 I40E_AQC_WRITE_TYPE_LAA_ONLY,
1228 addr->sa_data, NULL);
1231 "Addr change for Main VSI failed: %d\n",
1233 return -EADDRNOTAVAIL;
1236 memcpy(vsi->back->hw.mac.addr, addr->sa_data, netdev->addr_len);
1239 /* In order to be sure to not drop any packets, add the new address
1240 * then delete the old one.
1242 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false);
1246 i40e_sync_vsi_filters(vsi);
1247 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false);
1248 i40e_sync_vsi_filters(vsi);
1250 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1256 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1257 * @vsi: the VSI being setup
1258 * @ctxt: VSI context structure
1259 * @enabled_tc: Enabled TCs bitmap
1260 * @is_add: True if called before Add VSI
1262 * Setup VSI queue mapping for enabled traffic classes.
1264 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1265 struct i40e_vsi_context *ctxt,
1269 struct i40e_pf *pf = vsi->back;
1279 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1282 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1283 /* Find numtc from enabled TC bitmap */
1284 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1285 if (enabled_tc & (1 << i)) /* TC is enabled */
1289 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1293 /* At least TC0 is enabled in case of non-DCB case */
1297 vsi->tc_config.numtc = numtc;
1298 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1299 /* Number of queues per enabled TC */
1300 num_tc_qps = rounddown_pow_of_two(vsi->alloc_queue_pairs/numtc);
1301 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1303 /* Setup queue offset/count for all TCs for given VSI */
1304 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1305 /* See if the given TC is enabled for the given VSI */
1306 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1309 switch (vsi->type) {
1311 qcount = min_t(int, pf->rss_size, num_tc_qps);
1314 case I40E_VSI_SRIOV:
1315 case I40E_VSI_VMDQ2:
1317 qcount = num_tc_qps;
1321 vsi->tc_config.tc_info[i].qoffset = offset;
1322 vsi->tc_config.tc_info[i].qcount = qcount;
1324 /* find the power-of-2 of the number of queue pairs */
1327 while (num_qps && ((1 << pow) < qcount)) {
1332 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1334 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1335 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1339 /* TC is not enabled so set the offset to
1340 * default queue and allocate one queue
1343 vsi->tc_config.tc_info[i].qoffset = 0;
1344 vsi->tc_config.tc_info[i].qcount = 1;
1345 vsi->tc_config.tc_info[i].netdev_tc = 0;
1349 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1352 /* Set actual Tx/Rx queue pairs */
1353 vsi->num_queue_pairs = offset;
1355 /* Scheduler section valid can only be set for ADD VSI */
1357 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1359 ctxt->info.up_enable_bits = enabled_tc;
1361 if (vsi->type == I40E_VSI_SRIOV) {
1362 ctxt->info.mapping_flags |=
1363 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1364 for (i = 0; i < vsi->num_queue_pairs; i++)
1365 ctxt->info.queue_mapping[i] =
1366 cpu_to_le16(vsi->base_queue + i);
1368 ctxt->info.mapping_flags |=
1369 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1370 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1372 ctxt->info.valid_sections |= cpu_to_le16(sections);
1376 * i40e_set_rx_mode - NDO callback to set the netdev filters
1377 * @netdev: network interface device structure
1379 static void i40e_set_rx_mode(struct net_device *netdev)
1381 struct i40e_netdev_priv *np = netdev_priv(netdev);
1382 struct i40e_mac_filter *f, *ftmp;
1383 struct i40e_vsi *vsi = np->vsi;
1384 struct netdev_hw_addr *uca;
1385 struct netdev_hw_addr *mca;
1386 struct netdev_hw_addr *ha;
1388 /* add addr if not already in the filter list */
1389 netdev_for_each_uc_addr(uca, netdev) {
1390 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1391 if (i40e_is_vsi_in_vlan(vsi))
1392 i40e_put_mac_in_vlan(vsi, uca->addr,
1395 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1400 netdev_for_each_mc_addr(mca, netdev) {
1401 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1402 if (i40e_is_vsi_in_vlan(vsi))
1403 i40e_put_mac_in_vlan(vsi, mca->addr,
1406 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1411 /* remove filter if not in netdev list */
1412 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1418 if (is_multicast_ether_addr(f->macaddr)) {
1419 netdev_for_each_mc_addr(mca, netdev) {
1420 if (ether_addr_equal(mca->addr, f->macaddr)) {
1426 netdev_for_each_uc_addr(uca, netdev) {
1427 if (ether_addr_equal(uca->addr, f->macaddr)) {
1433 for_each_dev_addr(netdev, ha) {
1434 if (ether_addr_equal(ha->addr, f->macaddr)) {
1442 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1445 /* check for other flag changes */
1446 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1447 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1448 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1453 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1454 * @vsi: ptr to the VSI
1456 * Push any outstanding VSI filter changes through the AdminQ.
1458 * Returns 0 or error value
1460 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1462 struct i40e_mac_filter *f, *ftmp;
1463 bool promisc_forced_on = false;
1464 bool add_happened = false;
1465 int filter_list_len = 0;
1466 u32 changed_flags = 0;
1467 i40e_status aq_ret = 0;
1473 /* empty array typed pointers, kcalloc later */
1474 struct i40e_aqc_add_macvlan_element_data *add_list;
1475 struct i40e_aqc_remove_macvlan_element_data *del_list;
1477 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1478 usleep_range(1000, 2000);
1482 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1483 vsi->current_netdev_flags = vsi->netdev->flags;
1486 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1487 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1489 filter_list_len = pf->hw.aq.asq_buf_size /
1490 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1491 del_list = kcalloc(filter_list_len,
1492 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1497 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1501 if (f->counter != 0)
1506 /* add to delete list */
1507 memcpy(del_list[num_del].mac_addr,
1508 f->macaddr, ETH_ALEN);
1509 del_list[num_del].vlan_tag =
1510 cpu_to_le16((u16)(f->vlan ==
1511 I40E_VLAN_ANY ? 0 : f->vlan));
1513 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1514 del_list[num_del].flags = cmd_flags;
1517 /* unlink from filter list */
1521 /* flush a full buffer */
1522 if (num_del == filter_list_len) {
1523 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1524 vsi->seid, del_list, num_del,
1527 memset(del_list, 0, sizeof(*del_list));
1530 dev_info(&pf->pdev->dev,
1531 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1533 pf->hw.aq.asq_last_status);
1537 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1538 del_list, num_del, NULL);
1542 dev_info(&pf->pdev->dev,
1543 "ignoring delete macvlan error, err %d, aq_err %d\n",
1544 aq_ret, pf->hw.aq.asq_last_status);
1550 /* do all the adds now */
1551 filter_list_len = pf->hw.aq.asq_buf_size /
1552 sizeof(struct i40e_aqc_add_macvlan_element_data),
1553 add_list = kcalloc(filter_list_len,
1554 sizeof(struct i40e_aqc_add_macvlan_element_data),
1559 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1563 if (f->counter == 0)
1566 add_happened = true;
1569 /* add to add array */
1570 memcpy(add_list[num_add].mac_addr,
1571 f->macaddr, ETH_ALEN);
1572 add_list[num_add].vlan_tag =
1574 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1575 add_list[num_add].queue_number = 0;
1577 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1578 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1581 /* flush a full buffer */
1582 if (num_add == filter_list_len) {
1583 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1590 memset(add_list, 0, sizeof(*add_list));
1594 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1595 add_list, num_add, NULL);
1601 if (add_happened && (!aq_ret)) {
1603 } else if (add_happened && (aq_ret)) {
1604 dev_info(&pf->pdev->dev,
1605 "add filter failed, err %d, aq_err %d\n",
1606 aq_ret, pf->hw.aq.asq_last_status);
1607 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1608 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1610 promisc_forced_on = true;
1611 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1613 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1618 /* check for changes in promiscuous modes */
1619 if (changed_flags & IFF_ALLMULTI) {
1620 bool cur_multipromisc;
1621 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1622 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1627 dev_info(&pf->pdev->dev,
1628 "set multi promisc failed, err %d, aq_err %d\n",
1629 aq_ret, pf->hw.aq.asq_last_status);
1631 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1633 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1634 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1636 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1640 dev_info(&pf->pdev->dev,
1641 "set uni promisc failed, err %d, aq_err %d\n",
1642 aq_ret, pf->hw.aq.asq_last_status);
1643 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1647 dev_info(&pf->pdev->dev,
1648 "set brdcast promisc failed, err %d, aq_err %d\n",
1649 aq_ret, pf->hw.aq.asq_last_status);
1652 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1657 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1658 * @pf: board private structure
1660 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1664 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1666 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1668 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
1670 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1671 i40e_sync_vsi_filters(pf->vsi[v]);
1676 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1677 * @netdev: network interface device structure
1678 * @new_mtu: new value for maximum frame size
1680 * Returns 0 on success, negative on failure
1682 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1684 struct i40e_netdev_priv *np = netdev_priv(netdev);
1685 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1686 struct i40e_vsi *vsi = np->vsi;
1688 /* MTU < 68 is an error and causes problems on some kernels */
1689 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1692 netdev_info(netdev, "changing MTU from %d to %d\n",
1693 netdev->mtu, new_mtu);
1694 netdev->mtu = new_mtu;
1695 if (netif_running(netdev))
1696 i40e_vsi_reinit_locked(vsi);
1702 * i40e_ioctl - Access the hwtstamp interface
1703 * @netdev: network interface device structure
1704 * @ifr: interface request data
1705 * @cmd: ioctl command
1707 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1709 struct i40e_netdev_priv *np = netdev_priv(netdev);
1710 struct i40e_pf *pf = np->vsi->back;
1714 return i40e_ptp_get_ts_config(pf, ifr);
1716 return i40e_ptp_set_ts_config(pf, ifr);
1723 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1724 * @vsi: the vsi being adjusted
1726 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1728 struct i40e_vsi_context ctxt;
1731 if ((vsi->info.valid_sections &
1732 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1733 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1734 return; /* already enabled */
1736 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1737 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1738 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1740 ctxt.seid = vsi->seid;
1741 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1742 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1744 dev_info(&vsi->back->pdev->dev,
1745 "%s: update vsi failed, aq_err=%d\n",
1746 __func__, vsi->back->hw.aq.asq_last_status);
1751 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1752 * @vsi: the vsi being adjusted
1754 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1756 struct i40e_vsi_context ctxt;
1759 if ((vsi->info.valid_sections &
1760 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1761 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1762 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1763 return; /* already disabled */
1765 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1766 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1767 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1769 ctxt.seid = vsi->seid;
1770 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1771 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1773 dev_info(&vsi->back->pdev->dev,
1774 "%s: update vsi failed, aq_err=%d\n",
1775 __func__, vsi->back->hw.aq.asq_last_status);
1780 * i40e_vlan_rx_register - Setup or shutdown vlan offload
1781 * @netdev: network interface to be adjusted
1782 * @features: netdev features to test if VLAN offload is enabled or not
1784 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
1786 struct i40e_netdev_priv *np = netdev_priv(netdev);
1787 struct i40e_vsi *vsi = np->vsi;
1789 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1790 i40e_vlan_stripping_enable(vsi);
1792 i40e_vlan_stripping_disable(vsi);
1796 * i40e_vsi_add_vlan - Add vsi membership for given vlan
1797 * @vsi: the vsi being configured
1798 * @vid: vlan id to be added (0 = untagged only , -1 = any)
1800 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
1802 struct i40e_mac_filter *f, *add_f;
1803 bool is_netdev, is_vf;
1805 is_vf = (vsi->type == I40E_VSI_SRIOV);
1806 is_netdev = !!(vsi->netdev);
1809 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
1812 dev_info(&vsi->back->pdev->dev,
1813 "Could not add vlan filter %d for %pM\n",
1814 vid, vsi->netdev->dev_addr);
1819 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1820 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1822 dev_info(&vsi->back->pdev->dev,
1823 "Could not add vlan filter %d for %pM\n",
1829 /* Now if we add a vlan tag, make sure to check if it is the first
1830 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
1831 * with 0, so we now accept untagged and specified tagged traffic
1832 * (and not any taged and untagged)
1835 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
1837 is_vf, is_netdev)) {
1838 i40e_del_filter(vsi, vsi->netdev->dev_addr,
1839 I40E_VLAN_ANY, is_vf, is_netdev);
1840 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
1843 dev_info(&vsi->back->pdev->dev,
1844 "Could not add filter 0 for %pM\n",
1845 vsi->netdev->dev_addr);
1851 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
1852 if (vid > 0 && !vsi->info.pvid) {
1853 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1854 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1855 is_vf, is_netdev)) {
1856 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1858 add_f = i40e_add_filter(vsi, f->macaddr,
1859 0, is_vf, is_netdev);
1861 dev_info(&vsi->back->pdev->dev,
1862 "Could not add filter 0 for %pM\n",
1870 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1871 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1874 return i40e_sync_vsi_filters(vsi);
1878 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
1879 * @vsi: the vsi being configured
1880 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
1882 * Return: 0 on success or negative otherwise
1884 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
1886 struct net_device *netdev = vsi->netdev;
1887 struct i40e_mac_filter *f, *add_f;
1888 bool is_vf, is_netdev;
1889 int filter_count = 0;
1891 is_vf = (vsi->type == I40E_VSI_SRIOV);
1892 is_netdev = !!(netdev);
1895 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
1897 list_for_each_entry(f, &vsi->mac_filter_list, list)
1898 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1900 /* go through all the filters for this VSI and if there is only
1901 * vid == 0 it means there are no other filters, so vid 0 must
1902 * be replaced with -1. This signifies that we should from now
1903 * on accept any traffic (with any tag present, or untagged)
1905 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1908 ether_addr_equal(netdev->dev_addr, f->macaddr))
1916 if (!filter_count && is_netdev) {
1917 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
1918 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1921 dev_info(&vsi->back->pdev->dev,
1922 "Could not add filter %d for %pM\n",
1923 I40E_VLAN_ANY, netdev->dev_addr);
1928 if (!filter_count) {
1929 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1930 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
1931 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1934 dev_info(&vsi->back->pdev->dev,
1935 "Could not add filter %d for %pM\n",
1936 I40E_VLAN_ANY, f->macaddr);
1942 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1943 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1946 return i40e_sync_vsi_filters(vsi);
1950 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
1951 * @netdev: network interface to be adjusted
1952 * @vid: vlan id to be added
1954 * net_device_ops implementation for adding vlan ids
1956 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
1957 __always_unused __be16 proto, u16 vid)
1959 struct i40e_netdev_priv *np = netdev_priv(netdev);
1960 struct i40e_vsi *vsi = np->vsi;
1966 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
1968 /* If the network stack called us with vid = 0 then
1969 * it is asking to receive priority tagged packets with
1970 * vlan id 0. Our HW receives them by default when configured
1971 * to receive untagged packets so there is no need to add an
1972 * extra filter for vlan 0 tagged packets.
1975 ret = i40e_vsi_add_vlan(vsi, vid);
1977 if (!ret && (vid < VLAN_N_VID))
1978 set_bit(vid, vsi->active_vlans);
1984 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
1985 * @netdev: network interface to be adjusted
1986 * @vid: vlan id to be removed
1988 * net_device_ops implementation for removing vlan ids
1990 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
1991 __always_unused __be16 proto, u16 vid)
1993 struct i40e_netdev_priv *np = netdev_priv(netdev);
1994 struct i40e_vsi *vsi = np->vsi;
1996 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
1998 /* return code is ignored as there is nothing a user
1999 * can do about failure to remove and a log message was
2000 * already printed from the other function
2002 i40e_vsi_kill_vlan(vsi, vid);
2004 clear_bit(vid, vsi->active_vlans);
2010 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2011 * @vsi: the vsi being brought back up
2013 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2020 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2022 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2023 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2028 * i40e_vsi_add_pvid - Add pvid for the VSI
2029 * @vsi: the vsi being adjusted
2030 * @vid: the vlan id to set as a PVID
2032 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2034 struct i40e_vsi_context ctxt;
2037 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2038 vsi->info.pvid = cpu_to_le16(vid);
2039 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2040 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2041 I40E_AQ_VSI_PVLAN_EMOD_STR;
2043 ctxt.seid = vsi->seid;
2044 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2045 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2047 dev_info(&vsi->back->pdev->dev,
2048 "%s: update vsi failed, aq_err=%d\n",
2049 __func__, vsi->back->hw.aq.asq_last_status);
2057 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2058 * @vsi: the vsi being adjusted
2060 * Just use the vlan_rx_register() service to put it back to normal
2062 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2064 i40e_vlan_stripping_disable(vsi);
2070 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2071 * @vsi: ptr to the VSI
2073 * If this function returns with an error, then it's possible one or
2074 * more of the rings is populated (while the rest are not). It is the
2075 * callers duty to clean those orphaned rings.
2077 * Return 0 on success, negative on failure
2079 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2083 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2084 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2090 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2091 * @vsi: ptr to the VSI
2093 * Free VSI's transmit software resources
2095 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2102 for (i = 0; i < vsi->num_queue_pairs; i++)
2103 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2104 i40e_free_tx_resources(vsi->tx_rings[i]);
2108 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2109 * @vsi: ptr to the VSI
2111 * If this function returns with an error, then it's possible one or
2112 * more of the rings is populated (while the rest are not). It is the
2113 * callers duty to clean those orphaned rings.
2115 * Return 0 on success, negative on failure
2117 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2121 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2122 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2127 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2128 * @vsi: ptr to the VSI
2130 * Free all receive software resources
2132 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2139 for (i = 0; i < vsi->num_queue_pairs; i++)
2140 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2141 i40e_free_rx_resources(vsi->rx_rings[i]);
2145 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2146 * @ring: The Tx ring to configure
2148 * Configure the Tx descriptor ring in the HMC context.
2150 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2152 struct i40e_vsi *vsi = ring->vsi;
2153 u16 pf_q = vsi->base_queue + ring->queue_index;
2154 struct i40e_hw *hw = &vsi->back->hw;
2155 struct i40e_hmc_obj_txq tx_ctx;
2156 i40e_status err = 0;
2159 /* some ATR related tx ring init */
2160 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2161 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2162 ring->atr_count = 0;
2164 ring->atr_sample_rate = 0;
2167 /* initialize XPS */
2168 if (ring->q_vector && ring->netdev &&
2169 vsi->tc_config.numtc <= 1 &&
2170 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2171 netif_set_xps_queue(ring->netdev,
2172 &ring->q_vector->affinity_mask,
2175 /* clear the context structure first */
2176 memset(&tx_ctx, 0, sizeof(tx_ctx));
2178 tx_ctx.new_context = 1;
2179 tx_ctx.base = (ring->dma / 128);
2180 tx_ctx.qlen = ring->count;
2181 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2182 I40E_FLAG_FD_ATR_ENABLED));
2183 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2184 /* FDIR VSI tx ring can still use RS bit and writebacks */
2185 if (vsi->type != I40E_VSI_FDIR)
2186 tx_ctx.head_wb_ena = 1;
2187 tx_ctx.head_wb_addr = ring->dma +
2188 (ring->count * sizeof(struct i40e_tx_desc));
2190 /* As part of VSI creation/update, FW allocates certain
2191 * Tx arbitration queue sets for each TC enabled for
2192 * the VSI. The FW returns the handles to these queue
2193 * sets as part of the response buffer to Add VSI,
2194 * Update VSI, etc. AQ commands. It is expected that
2195 * these queue set handles be associated with the Tx
2196 * queues by the driver as part of the TX queue context
2197 * initialization. This has to be done regardless of
2198 * DCB as by default everything is mapped to TC0.
2200 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2201 tx_ctx.rdylist_act = 0;
2203 /* clear the context in the HMC */
2204 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2206 dev_info(&vsi->back->pdev->dev,
2207 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2208 ring->queue_index, pf_q, err);
2212 /* set the context in the HMC */
2213 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2215 dev_info(&vsi->back->pdev->dev,
2216 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2217 ring->queue_index, pf_q, err);
2221 /* Now associate this queue with this PCI function */
2222 if (vsi->type == I40E_VSI_VMDQ2)
2223 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2225 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2226 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2227 I40E_QTX_CTL_PF_INDX_MASK);
2228 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2231 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2233 /* cache tail off for easier writes later */
2234 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2240 * i40e_configure_rx_ring - Configure a receive ring context
2241 * @ring: The Rx ring to configure
2243 * Configure the Rx descriptor ring in the HMC context.
2245 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2247 struct i40e_vsi *vsi = ring->vsi;
2248 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2249 u16 pf_q = vsi->base_queue + ring->queue_index;
2250 struct i40e_hw *hw = &vsi->back->hw;
2251 struct i40e_hmc_obj_rxq rx_ctx;
2252 i40e_status err = 0;
2256 /* clear the context structure first */
2257 memset(&rx_ctx, 0, sizeof(rx_ctx));
2259 ring->rx_buf_len = vsi->rx_buf_len;
2260 ring->rx_hdr_len = vsi->rx_hdr_len;
2262 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2263 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2265 rx_ctx.base = (ring->dma / 128);
2266 rx_ctx.qlen = ring->count;
2268 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2269 set_ring_16byte_desc_enabled(ring);
2275 rx_ctx.dtype = vsi->dtype;
2277 set_ring_ps_enabled(ring);
2278 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2280 I40E_RX_SPLIT_TCP_UDP |
2283 rx_ctx.hsplit_0 = 0;
2286 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2287 (chain_len * ring->rx_buf_len));
2288 rx_ctx.tphrdesc_ena = 1;
2289 rx_ctx.tphwdesc_ena = 1;
2290 rx_ctx.tphdata_ena = 1;
2291 rx_ctx.tphhead_ena = 1;
2292 if (hw->revision_id == 0)
2293 rx_ctx.lrxqthresh = 0;
2295 rx_ctx.lrxqthresh = 2;
2296 rx_ctx.crcstrip = 1;
2300 /* clear the context in the HMC */
2301 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2303 dev_info(&vsi->back->pdev->dev,
2304 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2305 ring->queue_index, pf_q, err);
2309 /* set the context in the HMC */
2310 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2312 dev_info(&vsi->back->pdev->dev,
2313 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2314 ring->queue_index, pf_q, err);
2318 /* cache tail for quicker writes, and clear the reg before use */
2319 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2320 writel(0, ring->tail);
2322 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2328 * i40e_vsi_configure_tx - Configure the VSI for Tx
2329 * @vsi: VSI structure describing this set of rings and resources
2331 * Configure the Tx VSI for operation.
2333 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2338 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2339 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2345 * i40e_vsi_configure_rx - Configure the VSI for Rx
2346 * @vsi: the VSI being configured
2348 * Configure the Rx VSI for operation.
2350 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2355 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2356 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2357 + ETH_FCS_LEN + VLAN_HLEN;
2359 vsi->max_frame = I40E_RXBUFFER_2048;
2361 /* figure out correct receive buffer length */
2362 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2363 I40E_FLAG_RX_PS_ENABLED)) {
2364 case I40E_FLAG_RX_1BUF_ENABLED:
2365 vsi->rx_hdr_len = 0;
2366 vsi->rx_buf_len = vsi->max_frame;
2367 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2369 case I40E_FLAG_RX_PS_ENABLED:
2370 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2371 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2372 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2375 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2376 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2377 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2381 /* round up for the chip's needs */
2382 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2383 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2384 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2385 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2387 /* set up individual rings */
2388 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2389 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2395 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2396 * @vsi: ptr to the VSI
2398 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2400 u16 qoffset, qcount;
2403 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2406 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2407 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2410 qoffset = vsi->tc_config.tc_info[n].qoffset;
2411 qcount = vsi->tc_config.tc_info[n].qcount;
2412 for (i = qoffset; i < (qoffset + qcount); i++) {
2413 struct i40e_ring *rx_ring = vsi->rx_rings[i];
2414 struct i40e_ring *tx_ring = vsi->tx_rings[i];
2415 rx_ring->dcb_tc = n;
2416 tx_ring->dcb_tc = n;
2422 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2423 * @vsi: ptr to the VSI
2425 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2428 i40e_set_rx_mode(vsi->netdev);
2432 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2433 * @vsi: Pointer to the targeted VSI
2435 * This function replays the hlist on the hw where all the SB Flow Director
2436 * filters were saved.
2438 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2440 struct i40e_fdir_filter *filter;
2441 struct i40e_pf *pf = vsi->back;
2442 struct hlist_node *node;
2444 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2447 hlist_for_each_entry_safe(filter, node,
2448 &pf->fdir_filter_list, fdir_node) {
2449 i40e_add_del_fdir(vsi, filter, true);
2454 * i40e_vsi_configure - Set up the VSI for action
2455 * @vsi: the VSI being configured
2457 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2461 i40e_set_vsi_rx_mode(vsi);
2462 i40e_restore_vlan(vsi);
2463 i40e_vsi_config_dcb_rings(vsi);
2464 err = i40e_vsi_configure_tx(vsi);
2466 err = i40e_vsi_configure_rx(vsi);
2472 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2473 * @vsi: the VSI being configured
2475 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2477 struct i40e_pf *pf = vsi->back;
2478 struct i40e_q_vector *q_vector;
2479 struct i40e_hw *hw = &pf->hw;
2485 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2486 * and PFINT_LNKLSTn registers, e.g.:
2487 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2489 qp = vsi->base_queue;
2490 vector = vsi->base_vector;
2491 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2492 q_vector = vsi->q_vectors[i];
2493 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2494 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2495 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2497 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2498 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2499 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2502 /* Linked list for the queuepairs assigned to this vector */
2503 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2504 for (q = 0; q < q_vector->num_ringpairs; q++) {
2505 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2506 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2507 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2508 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2510 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2512 wr32(hw, I40E_QINT_RQCTL(qp), val);
2514 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2515 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2516 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2517 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2519 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2521 /* Terminate the linked list */
2522 if (q == (q_vector->num_ringpairs - 1))
2523 val |= (I40E_QUEUE_END_OF_LIST
2524 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2526 wr32(hw, I40E_QINT_TQCTL(qp), val);
2535 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2536 * @hw: ptr to the hardware info
2538 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2542 /* clear things first */
2543 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2544 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2546 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2547 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2548 I40E_PFINT_ICR0_ENA_GRST_MASK |
2549 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2550 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2551 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2552 I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK |
2553 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2554 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2555 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2557 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2559 /* SW_ITR_IDX = 0, but don't change INTENA */
2560 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2561 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2563 /* OTHER_ITR_IDX = 0 */
2564 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2568 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2569 * @vsi: the VSI being configured
2571 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2573 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2574 struct i40e_pf *pf = vsi->back;
2575 struct i40e_hw *hw = &pf->hw;
2578 /* set the ITR configuration */
2579 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2580 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2581 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2582 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2583 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2584 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2586 i40e_enable_misc_int_causes(hw);
2588 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2589 wr32(hw, I40E_PFINT_LNKLST0, 0);
2591 /* Associate the queue pair to the vector and enable the queue int */
2592 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2593 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2594 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2596 wr32(hw, I40E_QINT_RQCTL(0), val);
2598 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2599 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2600 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2602 wr32(hw, I40E_QINT_TQCTL(0), val);
2607 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2608 * @pf: board private structure
2610 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2612 struct i40e_hw *hw = &pf->hw;
2614 wr32(hw, I40E_PFINT_DYN_CTL0,
2615 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2620 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2621 * @pf: board private structure
2623 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2625 struct i40e_hw *hw = &pf->hw;
2628 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2629 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2630 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2632 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2637 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2638 * @vsi: pointer to a vsi
2639 * @vector: enable a particular Hw Interrupt vector
2641 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2643 struct i40e_pf *pf = vsi->back;
2644 struct i40e_hw *hw = &pf->hw;
2647 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2648 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2649 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2650 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2651 /* skip the flush */
2655 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2656 * @irq: interrupt number
2657 * @data: pointer to a q_vector
2659 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2661 struct i40e_q_vector *q_vector = data;
2663 if (!q_vector->tx.ring && !q_vector->rx.ring)
2666 napi_schedule(&q_vector->napi);
2672 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2673 * @vsi: the VSI being configured
2674 * @basename: name for the vector
2676 * Allocates MSI-X vectors and requests interrupts from the kernel.
2678 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2680 int q_vectors = vsi->num_q_vectors;
2681 struct i40e_pf *pf = vsi->back;
2682 int base = vsi->base_vector;
2687 for (vector = 0; vector < q_vectors; vector++) {
2688 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2690 if (q_vector->tx.ring && q_vector->rx.ring) {
2691 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2692 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2694 } else if (q_vector->rx.ring) {
2695 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2696 "%s-%s-%d", basename, "rx", rx_int_idx++);
2697 } else if (q_vector->tx.ring) {
2698 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2699 "%s-%s-%d", basename, "tx", tx_int_idx++);
2701 /* skip this unused q_vector */
2704 err = request_irq(pf->msix_entries[base + vector].vector,
2710 dev_info(&pf->pdev->dev,
2711 "%s: request_irq failed, error: %d\n",
2713 goto free_queue_irqs;
2715 /* assign the mask for this irq */
2716 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2717 &q_vector->affinity_mask);
2725 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2727 free_irq(pf->msix_entries[base + vector].vector,
2728 &(vsi->q_vectors[vector]));
2734 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
2735 * @vsi: the VSI being un-configured
2737 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
2739 struct i40e_pf *pf = vsi->back;
2740 struct i40e_hw *hw = &pf->hw;
2741 int base = vsi->base_vector;
2744 for (i = 0; i < vsi->num_queue_pairs; i++) {
2745 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
2746 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
2749 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2750 for (i = vsi->base_vector;
2751 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2752 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
2755 for (i = 0; i < vsi->num_q_vectors; i++)
2756 synchronize_irq(pf->msix_entries[i + base].vector);
2758 /* Legacy and MSI mode - this stops all interrupt handling */
2759 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
2760 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
2762 synchronize_irq(pf->pdev->irq);
2767 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
2768 * @vsi: the VSI being configured
2770 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
2772 struct i40e_pf *pf = vsi->back;
2775 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2776 for (i = vsi->base_vector;
2777 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2778 i40e_irq_dynamic_enable(vsi, i);
2780 i40e_irq_dynamic_enable_icr0(pf);
2783 i40e_flush(&pf->hw);
2788 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
2789 * @pf: board private structure
2791 static void i40e_stop_misc_vector(struct i40e_pf *pf)
2794 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
2795 i40e_flush(&pf->hw);
2799 * i40e_intr - MSI/Legacy and non-queue interrupt handler
2800 * @irq: interrupt number
2801 * @data: pointer to a q_vector
2803 * This is the handler used for all MSI/Legacy interrupts, and deals
2804 * with both queue and non-queue interrupts. This is also used in
2805 * MSIX mode to handle the non-queue interrupts.
2807 static irqreturn_t i40e_intr(int irq, void *data)
2809 struct i40e_pf *pf = (struct i40e_pf *)data;
2810 struct i40e_hw *hw = &pf->hw;
2811 irqreturn_t ret = IRQ_NONE;
2812 u32 icr0, icr0_remaining;
2815 icr0 = rd32(hw, I40E_PFINT_ICR0);
2816 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
2818 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
2819 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
2822 /* if interrupt but no bits showing, must be SWINT */
2823 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
2824 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
2827 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
2828 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
2830 /* temporarily disable queue cause for NAPI processing */
2831 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
2832 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
2833 wr32(hw, I40E_QINT_RQCTL(0), qval);
2835 qval = rd32(hw, I40E_QINT_TQCTL(0));
2836 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
2837 wr32(hw, I40E_QINT_TQCTL(0), qval);
2839 if (!test_bit(__I40E_DOWN, &pf->state))
2840 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
2843 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
2844 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2845 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
2848 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
2849 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
2850 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
2853 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
2854 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
2855 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2858 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
2859 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
2860 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
2861 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
2862 val = rd32(hw, I40E_GLGEN_RSTAT);
2863 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
2864 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
2865 if (val == I40E_RESET_CORER)
2867 else if (val == I40E_RESET_GLOBR)
2869 else if (val == I40E_RESET_EMPR)
2873 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
2874 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
2875 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
2878 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
2879 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
2881 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
2882 ena_mask &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2883 i40e_ptp_tx_hwtstamp(pf);
2884 prttsyn_stat &= ~I40E_PRTTSYN_STAT_0_TXTIME_MASK;
2887 wr32(hw, I40E_PRTTSYN_STAT_0, prttsyn_stat);
2890 /* If a critical error is pending we have no choice but to reset the
2892 * Report and mask out any remaining unexpected interrupts.
2894 icr0_remaining = icr0 & ena_mask;
2895 if (icr0_remaining) {
2896 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
2898 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
2899 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
2900 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
2901 dev_info(&pf->pdev->dev, "device will be reset\n");
2902 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2903 i40e_service_event_schedule(pf);
2905 ena_mask &= ~icr0_remaining;
2910 /* re-enable interrupt causes */
2911 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
2912 if (!test_bit(__I40E_DOWN, &pf->state)) {
2913 i40e_service_event_schedule(pf);
2914 i40e_irq_dynamic_enable_icr0(pf);
2921 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
2922 * @tx_ring: tx ring to clean
2923 * @budget: how many cleans we're allowed
2925 * Returns true if there's any budget left (e.g. the clean is finished)
2927 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
2929 struct i40e_vsi *vsi = tx_ring->vsi;
2930 u16 i = tx_ring->next_to_clean;
2931 struct i40e_tx_buffer *tx_buf;
2932 struct i40e_tx_desc *tx_desc;
2934 tx_buf = &tx_ring->tx_bi[i];
2935 tx_desc = I40E_TX_DESC(tx_ring, i);
2936 i -= tx_ring->count;
2939 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
2941 /* if next_to_watch is not set then there is no work pending */
2945 /* prevent any other reads prior to eop_desc */
2946 read_barrier_depends();
2948 /* if the descriptor isn't done, no work yet to do */
2949 if (!(eop_desc->cmd_type_offset_bsz &
2950 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
2953 /* clear next_to_watch to prevent false hangs */
2954 tx_buf->next_to_watch = NULL;
2956 /* unmap skb header data */
2957 dma_unmap_single(tx_ring->dev,
2958 dma_unmap_addr(tx_buf, dma),
2959 dma_unmap_len(tx_buf, len),
2962 dma_unmap_len_set(tx_buf, len, 0);
2965 /* move to the next desc and buffer to clean */
2970 i -= tx_ring->count;
2971 tx_buf = tx_ring->tx_bi;
2972 tx_desc = I40E_TX_DESC(tx_ring, 0);
2975 /* update budget accounting */
2977 } while (likely(budget));
2979 i += tx_ring->count;
2980 tx_ring->next_to_clean = i;
2982 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
2983 i40e_irq_dynamic_enable(vsi,
2984 tx_ring->q_vector->v_idx + vsi->base_vector);
2990 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
2991 * @irq: interrupt number
2992 * @data: pointer to a q_vector
2994 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
2996 struct i40e_q_vector *q_vector = data;
2997 struct i40e_vsi *vsi;
2999 if (!q_vector->tx.ring)
3002 vsi = q_vector->tx.ring->vsi;
3003 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3009 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3010 * @vsi: the VSI being configured
3011 * @v_idx: vector index
3012 * @qp_idx: queue pair index
3014 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3016 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3017 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3018 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3020 tx_ring->q_vector = q_vector;
3021 tx_ring->next = q_vector->tx.ring;
3022 q_vector->tx.ring = tx_ring;
3023 q_vector->tx.count++;
3025 rx_ring->q_vector = q_vector;
3026 rx_ring->next = q_vector->rx.ring;
3027 q_vector->rx.ring = rx_ring;
3028 q_vector->rx.count++;
3032 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3033 * @vsi: the VSI being configured
3035 * This function maps descriptor rings to the queue-specific vectors
3036 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3037 * one vector per queue pair, but on a constrained vector budget, we
3038 * group the queue pairs as "efficiently" as possible.
3040 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3042 int qp_remaining = vsi->num_queue_pairs;
3043 int q_vectors = vsi->num_q_vectors;
3048 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3049 * group them so there are multiple queues per vector.
3051 for (; v_start < q_vectors && qp_remaining; v_start++) {
3052 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3054 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3056 q_vector->num_ringpairs = num_ringpairs;
3058 q_vector->rx.count = 0;
3059 q_vector->tx.count = 0;
3060 q_vector->rx.ring = NULL;
3061 q_vector->tx.ring = NULL;
3063 while (num_ringpairs--) {
3064 map_vector_to_qp(vsi, v_start, qp_idx);
3072 * i40e_vsi_request_irq - Request IRQ from the OS
3073 * @vsi: the VSI being configured
3074 * @basename: name for the vector
3076 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3078 struct i40e_pf *pf = vsi->back;
3081 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3082 err = i40e_vsi_request_irq_msix(vsi, basename);
3083 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3084 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3085 pf->misc_int_name, pf);
3087 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3088 pf->misc_int_name, pf);
3091 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3096 #ifdef CONFIG_NET_POLL_CONTROLLER
3098 * i40e_netpoll - A Polling 'interrupt'handler
3099 * @netdev: network interface device structure
3101 * This is used by netconsole to send skbs without having to re-enable
3102 * interrupts. It's not called while the normal interrupt routine is executing.
3104 static void i40e_netpoll(struct net_device *netdev)
3106 struct i40e_netdev_priv *np = netdev_priv(netdev);
3107 struct i40e_vsi *vsi = np->vsi;
3108 struct i40e_pf *pf = vsi->back;
3111 /* if interface is down do nothing */
3112 if (test_bit(__I40E_DOWN, &vsi->state))
3115 pf->flags |= I40E_FLAG_IN_NETPOLL;
3116 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3117 for (i = 0; i < vsi->num_q_vectors; i++)
3118 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3120 i40e_intr(pf->pdev->irq, netdev);
3122 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3127 * i40e_vsi_control_tx - Start or stop a VSI's rings
3128 * @vsi: the VSI being configured
3129 * @enable: start or stop the rings
3131 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3133 struct i40e_pf *pf = vsi->back;
3134 struct i40e_hw *hw = &pf->hw;
3138 pf_q = vsi->base_queue;
3139 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3140 for (j = 0; j < 50; j++) {
3141 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3142 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3143 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3145 usleep_range(1000, 2000);
3147 /* Skip if the queue is already in the requested state */
3148 if (enable && (tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3150 if (!enable && !(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3153 /* turn on/off the queue */
3155 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3156 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3158 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3161 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3163 /* wait for the change to finish */
3164 for (j = 0; j < 10; j++) {
3165 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3167 if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3170 if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3177 dev_info(&pf->pdev->dev, "Tx ring %d %sable timeout\n",
3178 pf_q, (enable ? "en" : "dis"));
3183 if (hw->revision_id == 0)
3190 * i40e_vsi_control_rx - Start or stop a VSI's rings
3191 * @vsi: the VSI being configured
3192 * @enable: start or stop the rings
3194 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3196 struct i40e_pf *pf = vsi->back;
3197 struct i40e_hw *hw = &pf->hw;
3201 pf_q = vsi->base_queue;
3202 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3203 for (j = 0; j < 50; j++) {
3204 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3205 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3206 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3208 usleep_range(1000, 2000);
3213 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3216 /* is !STAT set ? */
3217 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3221 /* turn on/off the queue */
3223 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3225 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3226 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3228 /* wait for the change to finish */
3229 for (j = 0; j < 10; j++) {
3230 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3233 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3236 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3243 dev_info(&pf->pdev->dev, "Rx ring %d %sable timeout\n",
3244 pf_q, (enable ? "en" : "dis"));
3253 * i40e_vsi_control_rings - Start or stop a VSI's rings
3254 * @vsi: the VSI being configured
3255 * @enable: start or stop the rings
3257 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3261 /* do rx first for enable and last for disable */
3263 ret = i40e_vsi_control_rx(vsi, request);
3266 ret = i40e_vsi_control_tx(vsi, request);
3268 /* Ignore return value, we need to shutdown whatever we can */
3269 i40e_vsi_control_tx(vsi, request);
3270 i40e_vsi_control_rx(vsi, request);
3277 * i40e_vsi_free_irq - Free the irq association with the OS
3278 * @vsi: the VSI being configured
3280 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3282 struct i40e_pf *pf = vsi->back;
3283 struct i40e_hw *hw = &pf->hw;
3284 int base = vsi->base_vector;
3288 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3289 if (!vsi->q_vectors)
3292 for (i = 0; i < vsi->num_q_vectors; i++) {
3293 u16 vector = i + base;
3295 /* free only the irqs that were actually requested */
3296 if (!vsi->q_vectors[i] ||
3297 !vsi->q_vectors[i]->num_ringpairs)
3300 /* clear the affinity_mask in the IRQ descriptor */
3301 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3303 free_irq(pf->msix_entries[vector].vector,
3306 /* Tear down the interrupt queue link list
3308 * We know that they come in pairs and always
3309 * the Rx first, then the Tx. To clear the
3310 * link list, stick the EOL value into the
3311 * next_q field of the registers.
3313 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3314 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3315 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3316 val |= I40E_QUEUE_END_OF_LIST
3317 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3318 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3320 while (qp != I40E_QUEUE_END_OF_LIST) {
3323 val = rd32(hw, I40E_QINT_RQCTL(qp));
3325 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3326 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3327 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3328 I40E_QINT_RQCTL_INTEVENT_MASK);
3330 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3331 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3333 wr32(hw, I40E_QINT_RQCTL(qp), val);
3335 val = rd32(hw, I40E_QINT_TQCTL(qp));
3337 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3338 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3340 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3341 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3342 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3343 I40E_QINT_TQCTL_INTEVENT_MASK);
3345 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3346 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3348 wr32(hw, I40E_QINT_TQCTL(qp), val);
3353 free_irq(pf->pdev->irq, pf);
3355 val = rd32(hw, I40E_PFINT_LNKLST0);
3356 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3357 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3358 val |= I40E_QUEUE_END_OF_LIST
3359 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3360 wr32(hw, I40E_PFINT_LNKLST0, val);
3362 val = rd32(hw, I40E_QINT_RQCTL(qp));
3363 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3364 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3365 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3366 I40E_QINT_RQCTL_INTEVENT_MASK);
3368 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3369 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3371 wr32(hw, I40E_QINT_RQCTL(qp), val);
3373 val = rd32(hw, I40E_QINT_TQCTL(qp));
3375 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3376 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3377 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3378 I40E_QINT_TQCTL_INTEVENT_MASK);
3380 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3381 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3383 wr32(hw, I40E_QINT_TQCTL(qp), val);
3388 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3389 * @vsi: the VSI being configured
3390 * @v_idx: Index of vector to be freed
3392 * This function frees the memory allocated to the q_vector. In addition if
3393 * NAPI is enabled it will delete any references to the NAPI struct prior
3394 * to freeing the q_vector.
3396 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3398 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3399 struct i40e_ring *ring;
3404 /* disassociate q_vector from rings */
3405 i40e_for_each_ring(ring, q_vector->tx)
3406 ring->q_vector = NULL;
3408 i40e_for_each_ring(ring, q_vector->rx)
3409 ring->q_vector = NULL;
3411 /* only VSI w/ an associated netdev is set up w/ NAPI */
3413 netif_napi_del(&q_vector->napi);
3415 vsi->q_vectors[v_idx] = NULL;
3417 kfree_rcu(q_vector, rcu);
3421 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3422 * @vsi: the VSI being un-configured
3424 * This frees the memory allocated to the q_vectors and
3425 * deletes references to the NAPI struct.
3427 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3431 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3432 i40e_free_q_vector(vsi, v_idx);
3436 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3437 * @pf: board private structure
3439 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3441 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3442 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3443 pci_disable_msix(pf->pdev);
3444 kfree(pf->msix_entries);
3445 pf->msix_entries = NULL;
3446 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3447 pci_disable_msi(pf->pdev);
3449 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3453 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3454 * @pf: board private structure
3456 * We go through and clear interrupt specific resources and reset the structure
3457 * to pre-load conditions
3459 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3463 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3464 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
3466 i40e_vsi_free_q_vectors(pf->vsi[i]);
3467 i40e_reset_interrupt_capability(pf);
3471 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3472 * @vsi: the VSI being configured
3474 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3481 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3482 napi_enable(&vsi->q_vectors[q_idx]->napi);
3486 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3487 * @vsi: the VSI being configured
3489 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3496 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3497 napi_disable(&vsi->q_vectors[q_idx]->napi);
3501 * i40e_quiesce_vsi - Pause a given VSI
3502 * @vsi: the VSI being paused
3504 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3506 if (test_bit(__I40E_DOWN, &vsi->state))
3509 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3510 if (vsi->netdev && netif_running(vsi->netdev)) {
3511 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3513 set_bit(__I40E_DOWN, &vsi->state);
3519 * i40e_unquiesce_vsi - Resume a given VSI
3520 * @vsi: the VSI being resumed
3522 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3524 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3527 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3528 if (vsi->netdev && netif_running(vsi->netdev))
3529 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3531 i40e_up(vsi); /* this clears the DOWN bit */
3535 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3538 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3542 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3544 i40e_quiesce_vsi(pf->vsi[v]);
3549 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3552 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3556 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3558 i40e_unquiesce_vsi(pf->vsi[v]);
3563 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3564 * @dcbcfg: the corresponding DCBx configuration structure
3566 * Return the number of TCs from given DCBx configuration
3568 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3573 /* Scan the ETS Config Priority Table to find
3574 * traffic class enabled for a given priority
3575 * and use the traffic class index to get the
3576 * number of traffic classes enabled
3578 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3579 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3580 num_tc = dcbcfg->etscfg.prioritytable[i];
3583 /* Traffic class index starts from zero so
3584 * increment to return the actual count
3590 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3591 * @dcbcfg: the corresponding DCBx configuration structure
3593 * Query the current DCB configuration and return the number of
3594 * traffic classes enabled from the given DCBX config
3596 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3598 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3602 for (i = 0; i < num_tc; i++)
3603 enabled_tc |= 1 << i;
3609 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3610 * @pf: PF being queried
3612 * Return number of traffic classes enabled for the given PF
3614 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3616 struct i40e_hw *hw = &pf->hw;
3619 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3621 /* If DCB is not enabled then always in single TC */
3622 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3625 /* MFP mode return count of enabled TCs for this PF */
3626 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3627 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3628 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3629 if (enabled_tc & (1 << i))
3635 /* SFP mode will be enabled for all TCs on port */
3636 return i40e_dcb_get_num_tc(dcbcfg);
3640 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3641 * @pf: PF being queried
3643 * Return a bitmap for first enabled traffic class for this PF.
3645 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3647 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3651 return 0x1; /* TC0 */
3653 /* Find the first enabled TC */
3654 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3655 if (enabled_tc & (1 << i))
3663 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
3664 * @pf: PF being queried
3666 * Return a bitmap for enabled traffic classes for this PF.
3668 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
3670 /* If DCB is not enabled for this PF then just return default TC */
3671 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3672 return i40e_pf_get_default_tc(pf);
3674 /* MFP mode will have enabled TCs set by FW */
3675 if (pf->flags & I40E_FLAG_MFP_ENABLED)
3676 return pf->hw.func_caps.enabled_tcmap;
3678 /* SFP mode we want PF to be enabled for all TCs */
3679 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
3683 * i40e_vsi_get_bw_info - Query VSI BW Information
3684 * @vsi: the VSI being queried
3686 * Returns 0 on success, negative value on failure
3688 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
3690 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
3691 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
3692 struct i40e_pf *pf = vsi->back;
3693 struct i40e_hw *hw = &pf->hw;
3698 /* Get the VSI level BW configuration */
3699 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
3701 dev_info(&pf->pdev->dev,
3702 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
3703 aq_ret, pf->hw.aq.asq_last_status);
3707 /* Get the VSI level BW configuration per TC */
3708 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
3711 dev_info(&pf->pdev->dev,
3712 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
3713 aq_ret, pf->hw.aq.asq_last_status);
3717 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
3718 dev_info(&pf->pdev->dev,
3719 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
3720 bw_config.tc_valid_bits,
3721 bw_ets_config.tc_valid_bits);
3722 /* Still continuing */
3725 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
3726 vsi->bw_max_quanta = bw_config.max_bw;
3727 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
3728 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
3729 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3730 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
3731 vsi->bw_ets_limit_credits[i] =
3732 le16_to_cpu(bw_ets_config.credits[i]);
3733 /* 3 bits out of 4 for each TC */
3734 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
3741 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
3742 * @vsi: the VSI being configured
3743 * @enabled_tc: TC bitmap
3744 * @bw_credits: BW shared credits per TC
3746 * Returns 0 on success, negative value on failure
3748 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
3751 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
3755 bw_data.tc_valid_bits = enabled_tc;
3756 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3757 bw_data.tc_bw_credits[i] = bw_share[i];
3759 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
3762 dev_info(&vsi->back->pdev->dev,
3763 "AQ command Config VSI BW allocation per TC failed = %d\n",
3764 vsi->back->hw.aq.asq_last_status);
3768 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3769 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
3775 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
3776 * @vsi: the VSI being configured
3777 * @enabled_tc: TC map to be enabled
3780 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3782 struct net_device *netdev = vsi->netdev;
3783 struct i40e_pf *pf = vsi->back;
3784 struct i40e_hw *hw = &pf->hw;
3787 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3793 netdev_reset_tc(netdev);
3797 /* Set up actual enabled TCs on the VSI */
3798 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
3801 /* set per TC queues for the VSI */
3802 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3803 /* Only set TC queues for enabled tcs
3805 * e.g. For a VSI that has TC0 and TC3 enabled the
3806 * enabled_tc bitmap would be 0x00001001; the driver
3807 * will set the numtc for netdev as 2 that will be
3808 * referenced by the netdev layer as TC 0 and 1.
3810 if (vsi->tc_config.enabled_tc & (1 << i))
3811 netdev_set_tc_queue(netdev,
3812 vsi->tc_config.tc_info[i].netdev_tc,
3813 vsi->tc_config.tc_info[i].qcount,
3814 vsi->tc_config.tc_info[i].qoffset);
3817 /* Assign UP2TC map for the VSI */
3818 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3819 /* Get the actual TC# for the UP */
3820 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
3821 /* Get the mapped netdev TC# for the UP */
3822 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
3823 netdev_set_prio_tc_map(netdev, i, netdev_tc);
3828 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
3829 * @vsi: the VSI being configured
3830 * @ctxt: the ctxt buffer returned from AQ VSI update param command
3832 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
3833 struct i40e_vsi_context *ctxt)
3835 /* copy just the sections touched not the entire info
3836 * since not all sections are valid as returned by
3839 vsi->info.mapping_flags = ctxt->info.mapping_flags;
3840 memcpy(&vsi->info.queue_mapping,
3841 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
3842 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
3843 sizeof(vsi->info.tc_mapping));
3847 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
3848 * @vsi: VSI to be configured
3849 * @enabled_tc: TC bitmap
3851 * This configures a particular VSI for TCs that are mapped to the
3852 * given TC bitmap. It uses default bandwidth share for TCs across
3853 * VSIs to configure TC for a particular VSI.
3856 * It is expected that the VSI queues have been quisced before calling
3859 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3861 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
3862 struct i40e_vsi_context ctxt;
3866 /* Check if enabled_tc is same as existing or new TCs */
3867 if (vsi->tc_config.enabled_tc == enabled_tc)
3870 /* Enable ETS TCs with equal BW Share for now across all VSIs */
3871 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3872 if (enabled_tc & (1 << i))
3876 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
3878 dev_info(&vsi->back->pdev->dev,
3879 "Failed configuring TC map %d for VSI %d\n",
3880 enabled_tc, vsi->seid);
3884 /* Update Queue Pairs Mapping for currently enabled UPs */
3885 ctxt.seid = vsi->seid;
3886 ctxt.pf_num = vsi->back->hw.pf_id;
3888 ctxt.uplink_seid = vsi->uplink_seid;
3889 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
3890 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
3892 /* Update the VSI after updating the VSI queue-mapping information */
3893 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3895 dev_info(&vsi->back->pdev->dev,
3896 "update vsi failed, aq_err=%d\n",
3897 vsi->back->hw.aq.asq_last_status);
3900 /* update the local VSI info with updated queue map */
3901 i40e_vsi_update_queue_map(vsi, &ctxt);
3902 vsi->info.valid_sections = 0;
3904 /* Update current VSI BW information */
3905 ret = i40e_vsi_get_bw_info(vsi);
3907 dev_info(&vsi->back->pdev->dev,
3908 "Failed updating vsi bw info, aq_err=%d\n",
3909 vsi->back->hw.aq.asq_last_status);
3913 /* Update the netdev TC setup */
3914 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
3920 * i40e_veb_config_tc - Configure TCs for given VEB
3922 * @enabled_tc: TC bitmap
3924 * Configures given TC bitmap for VEB (switching) element
3926 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
3928 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
3929 struct i40e_pf *pf = veb->pf;
3933 /* No TCs or already enabled TCs just return */
3934 if (!enabled_tc || veb->enabled_tc == enabled_tc)
3937 bw_data.tc_valid_bits = enabled_tc;
3938 /* bw_data.absolute_credits is not set (relative) */
3940 /* Enable ETS TCs with equal BW Share for now */
3941 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3942 if (enabled_tc & (1 << i))
3943 bw_data.tc_bw_share_credits[i] = 1;
3946 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
3949 dev_info(&pf->pdev->dev,
3950 "veb bw config failed, aq_err=%d\n",
3951 pf->hw.aq.asq_last_status);
3955 /* Update the BW information */
3956 ret = i40e_veb_get_bw_info(veb);
3958 dev_info(&pf->pdev->dev,
3959 "Failed getting veb bw config, aq_err=%d\n",
3960 pf->hw.aq.asq_last_status);
3967 #ifdef CONFIG_I40E_DCB
3969 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
3972 * Reconfigure VEB/VSIs on a given PF; it is assumed that
3973 * the caller would've quiesce all the VSIs before calling
3976 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
3982 /* Enable the TCs available on PF to all VEBs */
3983 tc_map = i40e_pf_get_tc_map(pf);
3984 for (v = 0; v < I40E_MAX_VEB; v++) {
3987 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
3989 dev_info(&pf->pdev->dev,
3990 "Failed configuring TC for VEB seid=%d\n",
3992 /* Will try to configure as many components */
3996 /* Update each VSI */
3997 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4001 /* - Enable all TCs for the LAN VSI
4002 * - For all others keep them at TC0 for now
4004 if (v == pf->lan_vsi)
4005 tc_map = i40e_pf_get_tc_map(pf);
4007 tc_map = i40e_pf_get_default_tc(pf);
4009 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4011 dev_info(&pf->pdev->dev,
4012 "Failed configuring TC for VSI seid=%d\n",
4014 /* Will try to configure as many components */
4016 if (pf->vsi[v]->netdev)
4017 i40e_dcbnl_set_all(pf->vsi[v]);
4023 * i40e_init_pf_dcb - Initialize DCB configuration
4024 * @pf: PF being configured
4026 * Query the current DCB configuration and cache it
4027 * in the hardware structure
4029 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4031 struct i40e_hw *hw = &pf->hw;
4034 if (pf->hw.func_caps.npar_enable)
4037 /* Get the initial DCB configuration */
4038 err = i40e_init_dcb(hw);
4040 /* Device/Function is not DCBX capable */
4041 if ((!hw->func_caps.dcb) ||
4042 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4043 dev_info(&pf->pdev->dev,
4044 "DCBX offload is not supported or is disabled for this PF.\n");
4046 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4050 /* When status is not DISABLED then DCBX in FW */
4051 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4052 DCB_CAP_DCBX_VER_IEEE;
4053 pf->flags |= I40E_FLAG_DCB_ENABLED;
4060 #endif /* CONFIG_I40E_DCB */
4063 * i40e_up_complete - Finish the last steps of bringing up a connection
4064 * @vsi: the VSI being configured
4066 static int i40e_up_complete(struct i40e_vsi *vsi)
4068 struct i40e_pf *pf = vsi->back;
4071 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4072 i40e_vsi_configure_msix(vsi);
4074 i40e_configure_msi_and_legacy(vsi);
4077 err = i40e_vsi_control_rings(vsi, true);
4081 clear_bit(__I40E_DOWN, &vsi->state);
4082 i40e_napi_enable_all(vsi);
4083 i40e_vsi_enable_irq(vsi);
4085 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4087 netdev_info(vsi->netdev, "NIC Link is Up\n");
4088 netif_tx_start_all_queues(vsi->netdev);
4089 netif_carrier_on(vsi->netdev);
4090 } else if (vsi->netdev) {
4091 netdev_info(vsi->netdev, "NIC Link is Down\n");
4094 /* replay FDIR SB filters */
4095 if (vsi->type == I40E_VSI_FDIR)
4096 i40e_fdir_filter_restore(vsi);
4097 i40e_service_event_schedule(pf);
4103 * i40e_vsi_reinit_locked - Reset the VSI
4104 * @vsi: the VSI being configured
4106 * Rebuild the ring structs after some configuration
4107 * has changed, e.g. MTU size.
4109 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4111 struct i40e_pf *pf = vsi->back;
4113 WARN_ON(in_interrupt());
4114 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4115 usleep_range(1000, 2000);
4118 /* Give a VF some time to respond to the reset. The
4119 * two second wait is based upon the watchdog cycle in
4122 if (vsi->type == I40E_VSI_SRIOV)
4125 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4129 * i40e_up - Bring the connection back up after being down
4130 * @vsi: the VSI being configured
4132 int i40e_up(struct i40e_vsi *vsi)
4136 err = i40e_vsi_configure(vsi);
4138 err = i40e_up_complete(vsi);
4144 * i40e_down - Shutdown the connection processing
4145 * @vsi: the VSI being stopped
4147 void i40e_down(struct i40e_vsi *vsi)
4151 /* It is assumed that the caller of this function
4152 * sets the vsi->state __I40E_DOWN bit.
4155 netif_carrier_off(vsi->netdev);
4156 netif_tx_disable(vsi->netdev);
4158 i40e_vsi_disable_irq(vsi);
4159 i40e_vsi_control_rings(vsi, false);
4160 i40e_napi_disable_all(vsi);
4162 for (i = 0; i < vsi->num_queue_pairs; i++) {
4163 i40e_clean_tx_ring(vsi->tx_rings[i]);
4164 i40e_clean_rx_ring(vsi->rx_rings[i]);
4169 * i40e_setup_tc - configure multiple traffic classes
4170 * @netdev: net device to configure
4171 * @tc: number of traffic classes to enable
4173 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4175 struct i40e_netdev_priv *np = netdev_priv(netdev);
4176 struct i40e_vsi *vsi = np->vsi;
4177 struct i40e_pf *pf = vsi->back;
4182 /* Check if DCB enabled to continue */
4183 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4184 netdev_info(netdev, "DCB is not enabled for adapter\n");
4188 /* Check if MFP enabled */
4189 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4190 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4194 /* Check whether tc count is within enabled limit */
4195 if (tc > i40e_pf_get_num_tc(pf)) {
4196 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4200 /* Generate TC map for number of tc requested */
4201 for (i = 0; i < tc; i++)
4202 enabled_tc |= (1 << i);
4204 /* Requesting same TC configuration as already enabled */
4205 if (enabled_tc == vsi->tc_config.enabled_tc)
4208 /* Quiesce VSI queues */
4209 i40e_quiesce_vsi(vsi);
4211 /* Configure VSI for enabled TCs */
4212 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4214 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4220 i40e_unquiesce_vsi(vsi);
4227 * i40e_open - Called when a network interface is made active
4228 * @netdev: network interface device structure
4230 * The open entry point is called when a network interface is made
4231 * active by the system (IFF_UP). At this point all resources needed
4232 * for transmit and receive operations are allocated, the interrupt
4233 * handler is registered with the OS, the netdev watchdog subtask is
4234 * enabled, and the stack is notified that the interface is ready.
4236 * Returns 0 on success, negative value on failure
4238 static int i40e_open(struct net_device *netdev)
4240 struct i40e_netdev_priv *np = netdev_priv(netdev);
4241 struct i40e_vsi *vsi = np->vsi;
4242 struct i40e_pf *pf = vsi->back;
4245 /* disallow open during test */
4246 if (test_bit(__I40E_TESTING, &pf->state))
4249 netif_carrier_off(netdev);
4251 err = i40e_vsi_open(vsi);
4255 #ifdef CONFIG_I40E_VXLAN
4256 vxlan_get_rx_port(netdev);
4264 * @vsi: the VSI to open
4266 * Finish initialization of the VSI.
4268 * Returns 0 on success, negative value on failure
4270 int i40e_vsi_open(struct i40e_vsi *vsi)
4272 struct i40e_pf *pf = vsi->back;
4273 char int_name[IFNAMSIZ];
4276 /* allocate descriptors */
4277 err = i40e_vsi_setup_tx_resources(vsi);
4280 err = i40e_vsi_setup_rx_resources(vsi);
4284 err = i40e_vsi_configure(vsi);
4292 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4293 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4294 err = i40e_vsi_request_irq(vsi, int_name);
4298 /* Notify the stack of the actual queue counts. */
4299 err = netif_set_real_num_tx_queues(vsi->netdev, vsi->num_queue_pairs);
4301 goto err_set_queues;
4303 err = netif_set_real_num_rx_queues(vsi->netdev, vsi->num_queue_pairs);
4305 goto err_set_queues;
4307 err = i40e_up_complete(vsi);
4309 goto err_up_complete;
4316 i40e_vsi_free_irq(vsi);
4318 i40e_vsi_free_rx_resources(vsi);
4320 i40e_vsi_free_tx_resources(vsi);
4321 if (vsi == pf->vsi[pf->lan_vsi])
4322 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4328 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4329 * @pf: Pointer to pf
4331 * This function destroys the hlist where all the Flow Director
4332 * filters were saved.
4334 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4336 struct i40e_fdir_filter *filter;
4337 struct hlist_node *node2;
4339 hlist_for_each_entry_safe(filter, node2,
4340 &pf->fdir_filter_list, fdir_node) {
4341 hlist_del(&filter->fdir_node);
4344 pf->fdir_pf_active_filters = 0;
4348 * i40e_close - Disables a network interface
4349 * @netdev: network interface device structure
4351 * The close entry point is called when an interface is de-activated
4352 * by the OS. The hardware is still under the driver's control, but
4353 * this netdev interface is disabled.
4355 * Returns 0, this is not allowed to fail
4357 static int i40e_close(struct net_device *netdev)
4359 struct i40e_netdev_priv *np = netdev_priv(netdev);
4360 struct i40e_vsi *vsi = np->vsi;
4362 if (test_and_set_bit(__I40E_DOWN, &vsi->state))
4366 i40e_vsi_free_irq(vsi);
4368 i40e_vsi_free_tx_resources(vsi);
4369 i40e_vsi_free_rx_resources(vsi);
4375 * i40e_do_reset - Start a PF or Core Reset sequence
4376 * @pf: board private structure
4377 * @reset_flags: which reset is requested
4379 * The essential difference in resets is that the PF Reset
4380 * doesn't clear the packet buffers, doesn't reset the PE
4381 * firmware, and doesn't bother the other PFs on the chip.
4383 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4387 WARN_ON(in_interrupt());
4389 /* do the biggest reset indicated */
4390 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4392 /* Request a Global Reset
4394 * This will start the chip's countdown to the actual full
4395 * chip reset event, and a warning interrupt to be sent
4396 * to all PFs, including the requestor. Our handler
4397 * for the warning interrupt will deal with the shutdown
4398 * and recovery of the switch setup.
4400 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
4401 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4402 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4403 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4405 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4407 /* Request a Core Reset
4409 * Same as Global Reset, except does *not* include the MAC/PHY
4411 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
4412 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4413 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4414 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4415 i40e_flush(&pf->hw);
4417 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4419 /* Request a Firmware Reset
4421 * Same as Global reset, plus restarting the
4422 * embedded firmware engine.
4424 /* enable EMP Reset */
4425 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4426 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4427 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4429 /* force the reset */
4430 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4431 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4432 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4433 i40e_flush(&pf->hw);
4435 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4437 /* Request a PF Reset
4439 * Resets only the PF-specific registers
4441 * This goes directly to the tear-down and rebuild of
4442 * the switch, since we need to do all the recovery as
4443 * for the Core Reset.
4445 dev_dbg(&pf->pdev->dev, "PFR requested\n");
4446 i40e_handle_reset_warning(pf);
4448 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4451 /* Find the VSI(s) that requested a re-init */
4452 dev_info(&pf->pdev->dev,
4453 "VSI reinit requested\n");
4454 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4455 struct i40e_vsi *vsi = pf->vsi[v];
4457 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4458 i40e_vsi_reinit_locked(pf->vsi[v]);
4459 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4463 /* no further action needed, so return now */
4466 dev_info(&pf->pdev->dev,
4467 "bad reset request 0x%08x\n", reset_flags);
4472 #ifdef CONFIG_I40E_DCB
4474 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
4475 * @pf: board private structure
4476 * @old_cfg: current DCB config
4477 * @new_cfg: new DCB config
4479 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
4480 struct i40e_dcbx_config *old_cfg,
4481 struct i40e_dcbx_config *new_cfg)
4483 bool need_reconfig = false;
4485 /* Check if ETS configuration has changed */
4486 if (memcmp(&new_cfg->etscfg,
4488 sizeof(new_cfg->etscfg))) {
4489 /* If Priority Table has changed reconfig is needed */
4490 if (memcmp(&new_cfg->etscfg.prioritytable,
4491 &old_cfg->etscfg.prioritytable,
4492 sizeof(new_cfg->etscfg.prioritytable))) {
4493 need_reconfig = true;
4494 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
4497 if (memcmp(&new_cfg->etscfg.tcbwtable,
4498 &old_cfg->etscfg.tcbwtable,
4499 sizeof(new_cfg->etscfg.tcbwtable)))
4500 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
4502 if (memcmp(&new_cfg->etscfg.tsatable,
4503 &old_cfg->etscfg.tsatable,
4504 sizeof(new_cfg->etscfg.tsatable)))
4505 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
4508 /* Check if PFC configuration has changed */
4509 if (memcmp(&new_cfg->pfc,
4511 sizeof(new_cfg->pfc))) {
4512 need_reconfig = true;
4513 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
4516 /* Check if APP Table has changed */
4517 if (memcmp(&new_cfg->app,
4519 sizeof(new_cfg->app))) {
4520 need_reconfig = true;
4521 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
4524 return need_reconfig;
4528 * i40e_handle_lldp_event - Handle LLDP Change MIB event
4529 * @pf: board private structure
4530 * @e: event info posted on ARQ
4532 static int i40e_handle_lldp_event(struct i40e_pf *pf,
4533 struct i40e_arq_event_info *e)
4535 struct i40e_aqc_lldp_get_mib *mib =
4536 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
4537 struct i40e_hw *hw = &pf->hw;
4538 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
4539 struct i40e_dcbx_config tmp_dcbx_cfg;
4540 bool need_reconfig = false;
4544 /* Ignore if event is not for Nearest Bridge */
4545 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
4546 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
4547 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
4550 /* Check MIB Type and return if event for Remote MIB update */
4551 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
4552 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
4553 /* Update the remote cached instance and return */
4554 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
4555 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
4556 &hw->remote_dcbx_config);
4560 /* Convert/store the DCBX data from LLDPDU temporarily */
4561 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
4562 ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg);
4564 /* Error in LLDPDU parsing return */
4565 dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n");
4569 /* No change detected in DCBX configs */
4570 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
4571 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
4575 need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg);
4577 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg);
4579 /* Overwrite the new configuration */
4580 *dcbx_cfg = tmp_dcbx_cfg;
4585 /* Reconfiguration needed quiesce all VSIs */
4586 i40e_pf_quiesce_all_vsi(pf);
4588 /* Changes in configuration update VEB/VSI */
4589 i40e_dcb_reconfigure(pf);
4591 i40e_pf_unquiesce_all_vsi(pf);
4595 #endif /* CONFIG_I40E_DCB */
4598 * i40e_do_reset_safe - Protected reset path for userland calls.
4599 * @pf: board private structure
4600 * @reset_flags: which reset is requested
4603 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
4606 i40e_do_reset(pf, reset_flags);
4611 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
4612 * @pf: board private structure
4613 * @e: event info posted on ARQ
4615 * Handler for LAN Queue Overflow Event generated by the firmware for PF
4618 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
4619 struct i40e_arq_event_info *e)
4621 struct i40e_aqc_lan_overflow *data =
4622 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
4623 u32 queue = le32_to_cpu(data->prtdcb_rupto);
4624 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
4625 struct i40e_hw *hw = &pf->hw;
4629 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
4632 /* Queue belongs to VF, find the VF and issue VF reset */
4633 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
4634 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
4635 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
4636 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
4637 vf_id -= hw->func_caps.vf_base_id;
4638 vf = &pf->vf[vf_id];
4639 i40e_vc_notify_vf_reset(vf);
4640 /* Allow VF to process pending reset notification */
4642 i40e_reset_vf(vf, false);
4647 * i40e_service_event_complete - Finish up the service event
4648 * @pf: board private structure
4650 static void i40e_service_event_complete(struct i40e_pf *pf)
4652 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
4654 /* flush memory to make sure state is correct before next watchog */
4655 smp_mb__before_clear_bit();
4656 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
4660 * i40e_get_current_fd_count - Get the count of FD filters programmed in the HW
4661 * @pf: board private structure
4663 int i40e_get_current_fd_count(struct i40e_pf *pf)
4666 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
4667 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
4668 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
4669 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
4674 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
4675 * @pf: board private structure
4677 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
4679 u32 fcnt_prog, fcnt_avail;
4681 /* Check if, FD SB or ATR was auto disabled and if there is enough room
4684 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4685 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4687 fcnt_prog = i40e_get_current_fd_count(pf);
4688 fcnt_avail = pf->hw.fdir_shared_filter_count +
4689 pf->fdir_pf_filter_count;
4690 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) {
4691 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
4692 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
4693 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
4694 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
4697 /* Wait for some more space to be available to turn on ATR */
4698 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
4699 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4700 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
4701 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4702 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
4708 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
4709 * @pf: board private structure
4711 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
4713 if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT))
4716 /* if interface is down do nothing */
4717 if (test_bit(__I40E_DOWN, &pf->state))
4719 i40e_fdir_check_and_reenable(pf);
4721 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4722 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4723 pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT;
4727 * i40e_vsi_link_event - notify VSI of a link event
4728 * @vsi: vsi to be notified
4729 * @link_up: link up or down
4731 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
4736 switch (vsi->type) {
4738 if (!vsi->netdev || !vsi->netdev_registered)
4742 netif_carrier_on(vsi->netdev);
4743 netif_tx_wake_all_queues(vsi->netdev);
4745 netif_carrier_off(vsi->netdev);
4746 netif_tx_stop_all_queues(vsi->netdev);
4750 case I40E_VSI_SRIOV:
4753 case I40E_VSI_VMDQ2:
4755 case I40E_VSI_MIRROR:
4757 /* there is no notification for other VSIs */
4763 * i40e_veb_link_event - notify elements on the veb of a link event
4764 * @veb: veb to be notified
4765 * @link_up: link up or down
4767 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
4772 if (!veb || !veb->pf)
4776 /* depth first... */
4777 for (i = 0; i < I40E_MAX_VEB; i++)
4778 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
4779 i40e_veb_link_event(pf->veb[i], link_up);
4781 /* ... now the local VSIs */
4782 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4783 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
4784 i40e_vsi_link_event(pf->vsi[i], link_up);
4788 * i40e_link_event - Update netif_carrier status
4789 * @pf: board private structure
4791 static void i40e_link_event(struct i40e_pf *pf)
4793 bool new_link, old_link;
4795 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
4796 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
4798 if (new_link == old_link)
4801 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
4802 netdev_info(pf->vsi[pf->lan_vsi]->netdev,
4803 "NIC Link is %s\n", (new_link ? "Up" : "Down"));
4805 /* Notify the base of the switch tree connected to
4806 * the link. Floating VEBs are not notified.
4808 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
4809 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
4811 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
4814 i40e_vc_notify_link_state(pf);
4816 if (pf->flags & I40E_FLAG_PTP)
4817 i40e_ptp_set_increment(pf);
4821 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
4822 * @pf: board private structure
4824 * Set the per-queue flags to request a check for stuck queues in the irq
4825 * clean functions, then force interrupts to be sure the irq clean is called.
4827 static void i40e_check_hang_subtask(struct i40e_pf *pf)
4831 /* If we're down or resetting, just bail */
4832 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
4835 /* for each VSI/netdev
4837 * set the check flag
4839 * force an interrupt
4841 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4842 struct i40e_vsi *vsi = pf->vsi[v];
4846 test_bit(__I40E_DOWN, &vsi->state) ||
4847 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
4850 for (i = 0; i < vsi->num_queue_pairs; i++) {
4851 set_check_for_tx_hang(vsi->tx_rings[i]);
4852 if (test_bit(__I40E_HANG_CHECK_ARMED,
4853 &vsi->tx_rings[i]->state))
4858 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
4859 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
4860 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
4861 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
4863 u16 vec = vsi->base_vector - 1;
4864 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
4865 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
4866 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
4867 wr32(&vsi->back->hw,
4868 I40E_PFINT_DYN_CTLN(vec), val);
4870 i40e_flush(&vsi->back->hw);
4876 * i40e_watchdog_subtask - Check and bring link up
4877 * @pf: board private structure
4879 static void i40e_watchdog_subtask(struct i40e_pf *pf)
4883 /* if interface is down do nothing */
4884 if (test_bit(__I40E_DOWN, &pf->state) ||
4885 test_bit(__I40E_CONFIG_BUSY, &pf->state))
4888 /* Update the stats for active netdevs so the network stack
4889 * can look at updated numbers whenever it cares to
4891 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4892 if (pf->vsi[i] && pf->vsi[i]->netdev)
4893 i40e_update_stats(pf->vsi[i]);
4895 /* Update the stats for the active switching components */
4896 for (i = 0; i < I40E_MAX_VEB; i++)
4898 i40e_update_veb_stats(pf->veb[i]);
4900 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
4904 * i40e_reset_subtask - Set up for resetting the device and driver
4905 * @pf: board private structure
4907 static void i40e_reset_subtask(struct i40e_pf *pf)
4909 u32 reset_flags = 0;
4912 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
4913 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
4914 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
4916 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
4917 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
4918 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4920 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
4921 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
4922 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
4924 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
4925 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
4926 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
4929 /* If there's a recovery already waiting, it takes
4930 * precedence before starting a new reset sequence.
4932 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
4933 i40e_handle_reset_warning(pf);
4937 /* If we're already down or resetting, just bail */
4939 !test_bit(__I40E_DOWN, &pf->state) &&
4940 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
4941 i40e_do_reset(pf, reset_flags);
4948 * i40e_handle_link_event - Handle link event
4949 * @pf: board private structure
4950 * @e: event info posted on ARQ
4952 static void i40e_handle_link_event(struct i40e_pf *pf,
4953 struct i40e_arq_event_info *e)
4955 struct i40e_hw *hw = &pf->hw;
4956 struct i40e_aqc_get_link_status *status =
4957 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
4958 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
4960 /* save off old link status information */
4961 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
4962 sizeof(pf->hw.phy.link_info_old));
4964 /* update link status */
4965 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
4966 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
4967 hw_link_info->link_info = status->link_info;
4968 hw_link_info->an_info = status->an_info;
4969 hw_link_info->ext_info = status->ext_info;
4970 hw_link_info->lse_enable =
4971 le16_to_cpu(status->command_flags) &
4974 /* process the event */
4975 i40e_link_event(pf);
4977 /* Do a new status request to re-enable LSE reporting
4978 * and load new status information into the hw struct,
4979 * then see if the status changed while processing the
4982 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
4983 i40e_link_event(pf);
4987 * i40e_clean_adminq_subtask - Clean the AdminQ rings
4988 * @pf: board private structure
4990 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
4992 struct i40e_arq_event_info event;
4993 struct i40e_hw *hw = &pf->hw;
4999 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
5002 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
5003 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
5008 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
5009 ret = i40e_clean_arq_element(hw, &event, &pending);
5010 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) {
5011 dev_info(&pf->pdev->dev, "No ARQ event found\n");
5014 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5018 opcode = le16_to_cpu(event.desc.opcode);
5021 case i40e_aqc_opc_get_link_status:
5022 i40e_handle_link_event(pf, &event);
5024 case i40e_aqc_opc_send_msg_to_pf:
5025 ret = i40e_vc_process_vf_msg(pf,
5026 le16_to_cpu(event.desc.retval),
5027 le32_to_cpu(event.desc.cookie_high),
5028 le32_to_cpu(event.desc.cookie_low),
5032 case i40e_aqc_opc_lldp_update_mib:
5033 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5034 #ifdef CONFIG_I40E_DCB
5036 ret = i40e_handle_lldp_event(pf, &event);
5038 #endif /* CONFIG_I40E_DCB */
5040 case i40e_aqc_opc_event_lan_overflow:
5041 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5042 i40e_handle_lan_overflow_event(pf, &event);
5044 case i40e_aqc_opc_send_msg_to_peer:
5045 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5048 dev_info(&pf->pdev->dev,
5049 "ARQ Error: Unknown event 0x%04x received\n",
5053 } while (pending && (i++ < pf->adminq_work_limit));
5055 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5056 /* re-enable Admin queue interrupt cause */
5057 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5058 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5059 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5062 kfree(event.msg_buf);
5066 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5067 * @veb: pointer to the VEB instance
5069 * This is a recursive function that first builds the attached VSIs then
5070 * recurses in to build the next layer of VEB. We track the connections
5071 * through our own index numbers because the seid's from the HW could
5072 * change across the reset.
5074 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5076 struct i40e_vsi *ctl_vsi = NULL;
5077 struct i40e_pf *pf = veb->pf;
5081 /* build VSI that owns this VEB, temporarily attached to base VEB */
5082 for (v = 0; v < pf->hw.func_caps.num_vsis && !ctl_vsi; v++) {
5084 pf->vsi[v]->veb_idx == veb->idx &&
5085 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5086 ctl_vsi = pf->vsi[v];
5091 dev_info(&pf->pdev->dev,
5092 "missing owner VSI for veb_idx %d\n", veb->idx);
5094 goto end_reconstitute;
5096 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5097 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5098 ret = i40e_add_vsi(ctl_vsi);
5100 dev_info(&pf->pdev->dev,
5101 "rebuild of owner VSI failed: %d\n", ret);
5102 goto end_reconstitute;
5104 i40e_vsi_reset_stats(ctl_vsi);
5106 /* create the VEB in the switch and move the VSI onto the VEB */
5107 ret = i40e_add_veb(veb, ctl_vsi);
5109 goto end_reconstitute;
5111 /* create the remaining VSIs attached to this VEB */
5112 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5113 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5116 if (pf->vsi[v]->veb_idx == veb->idx) {
5117 struct i40e_vsi *vsi = pf->vsi[v];
5118 vsi->uplink_seid = veb->seid;
5119 ret = i40e_add_vsi(vsi);
5121 dev_info(&pf->pdev->dev,
5122 "rebuild of vsi_idx %d failed: %d\n",
5124 goto end_reconstitute;
5126 i40e_vsi_reset_stats(vsi);
5130 /* create any VEBs attached to this VEB - RECURSION */
5131 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5132 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5133 pf->veb[veb_idx]->uplink_seid = veb->seid;
5134 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5145 * i40e_get_capabilities - get info about the HW
5146 * @pf: the PF struct
5148 static int i40e_get_capabilities(struct i40e_pf *pf)
5150 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5155 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5157 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5161 /* this loads the data into the hw struct for us */
5162 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5164 i40e_aqc_opc_list_func_capabilities,
5166 /* data loaded, buffer no longer needed */
5169 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5170 /* retry with a larger buffer */
5171 buf_len = data_size;
5172 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5173 dev_info(&pf->pdev->dev,
5174 "capability discovery failed: aq=%d\n",
5175 pf->hw.aq.asq_last_status);
5180 /* increment MSI-X count because current FW skips one */
5181 pf->hw.func_caps.num_msix_vectors++;
5183 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5184 (pf->hw.aq.fw_maj_ver < 2)) {
5185 pf->hw.func_caps.num_msix_vectors++;
5186 pf->hw.func_caps.num_msix_vectors_vf++;
5189 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5190 dev_info(&pf->pdev->dev,
5191 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5192 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5193 pf->hw.func_caps.num_msix_vectors,
5194 pf->hw.func_caps.num_msix_vectors_vf,
5195 pf->hw.func_caps.fd_filters_guaranteed,
5196 pf->hw.func_caps.fd_filters_best_effort,
5197 pf->hw.func_caps.num_tx_qp,
5198 pf->hw.func_caps.num_vsis);
5200 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5201 + pf->hw.func_caps.num_vfs)
5202 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5203 dev_info(&pf->pdev->dev,
5204 "got num_vsis %d, setting num_vsis to %d\n",
5205 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5206 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5212 static int i40e_vsi_clear(struct i40e_vsi *vsi);
5215 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5216 * @pf: board private structure
5218 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5220 struct i40e_vsi *vsi;
5221 bool new_vsi = false;
5224 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5227 /* find existing VSI and see if it needs configuring */
5229 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
5230 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5236 /* create a new VSI if none exists */
5238 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
5239 pf->vsi[pf->lan_vsi]->seid, 0);
5241 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5246 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5248 err = i40e_vsi_setup_tx_resources(vsi);
5251 err = i40e_vsi_setup_rx_resources(vsi);
5256 char int_name[IFNAMSIZ + 9];
5257 err = i40e_vsi_configure(vsi);
5260 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
5261 dev_driver_string(&pf->pdev->dev));
5262 err = i40e_vsi_request_irq(vsi, int_name);
5265 err = i40e_up_complete(vsi);
5267 goto err_up_complete;
5268 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
5275 i40e_vsi_free_irq(vsi);
5277 i40e_vsi_free_rx_resources(vsi);
5279 i40e_vsi_free_tx_resources(vsi);
5281 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5282 i40e_vsi_clear(vsi);
5286 * i40e_fdir_teardown - release the Flow Director resources
5287 * @pf: board private structure
5289 static void i40e_fdir_teardown(struct i40e_pf *pf)
5293 i40e_fdir_filter_exit(pf);
5294 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
5295 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5296 i40e_vsi_release(pf->vsi[i]);
5303 * i40e_prep_for_reset - prep for the core to reset
5304 * @pf: board private structure
5306 * Close up the VFs and other things in prep for pf Reset.
5308 static int i40e_prep_for_reset(struct i40e_pf *pf)
5310 struct i40e_hw *hw = &pf->hw;
5314 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
5315 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
5318 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5320 if (i40e_check_asq_alive(hw))
5321 i40e_vc_notify_reset(pf);
5323 /* quiesce the VSIs and their queues that are not already DOWN */
5324 i40e_pf_quiesce_all_vsi(pf);
5326 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5328 pf->vsi[v]->seid = 0;
5331 i40e_shutdown_adminq(&pf->hw);
5333 /* call shutdown HMC */
5334 ret = i40e_shutdown_lan_hmc(hw);
5336 dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret);
5337 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5343 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5344 * @pf: board private structure
5345 * @reinit: if the Main VSI needs to re-initialized.
5347 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5349 struct i40e_driver_version dv;
5350 struct i40e_hw *hw = &pf->hw;
5354 /* Now we wait for GRST to settle out.
5355 * We don't have to delete the VEBs or VSIs from the hw switch
5356 * because the reset will make them disappear.
5358 ret = i40e_pf_reset(hw);
5360 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5363 if (test_bit(__I40E_DOWN, &pf->state))
5364 goto end_core_reset;
5365 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
5367 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
5368 ret = i40e_init_adminq(&pf->hw);
5370 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
5371 goto end_core_reset;
5374 ret = i40e_get_capabilities(pf);
5376 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
5378 goto end_core_reset;
5381 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
5382 hw->func_caps.num_rx_qp,
5383 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
5385 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
5386 goto end_core_reset;
5388 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
5390 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
5391 goto end_core_reset;
5394 #ifdef CONFIG_I40E_DCB
5395 ret = i40e_init_pf_dcb(pf);
5397 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
5398 goto end_core_reset;
5400 #endif /* CONFIG_I40E_DCB */
5402 /* do basic switch setup */
5403 ret = i40e_setup_pf_switch(pf, reinit);
5405 goto end_core_reset;
5407 /* Rebuild the VSIs and VEBs that existed before reset.
5408 * They are still in our local switch element arrays, so only
5409 * need to rebuild the switch model in the HW.
5411 * If there were VEBs but the reconstitution failed, we'll try
5412 * try to recover minimal use by getting the basic PF VSI working.
5414 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
5415 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
5416 /* find the one VEB connected to the MAC, and find orphans */
5417 for (v = 0; v < I40E_MAX_VEB; v++) {
5421 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
5422 pf->veb[v]->uplink_seid == 0) {
5423 ret = i40e_reconstitute_veb(pf->veb[v]);
5428 /* If Main VEB failed, we're in deep doodoo,
5429 * so give up rebuilding the switch and set up
5430 * for minimal rebuild of PF VSI.
5431 * If orphan failed, we'll report the error
5432 * but try to keep going.
5434 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
5435 dev_info(&pf->pdev->dev,
5436 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
5438 pf->vsi[pf->lan_vsi]->uplink_seid
5441 } else if (pf->veb[v]->uplink_seid == 0) {
5442 dev_info(&pf->pdev->dev,
5443 "rebuild of orphan VEB failed: %d\n",
5450 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
5451 dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
5452 /* no VEB, so rebuild only the Main VSI */
5453 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
5455 dev_info(&pf->pdev->dev,
5456 "rebuild of Main VSI failed: %d\n", ret);
5457 goto end_core_reset;
5461 /* reinit the misc interrupt */
5462 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5463 ret = i40e_setup_misc_vector(pf);
5465 /* restart the VSIs that were rebuilt and running before the reset */
5466 i40e_pf_unquiesce_all_vsi(pf);
5468 if (pf->num_alloc_vfs) {
5469 for (v = 0; v < pf->num_alloc_vfs; v++)
5470 i40e_reset_vf(&pf->vf[v], true);
5473 /* tell the firmware that we're starting */
5474 dv.major_version = DRV_VERSION_MAJOR;
5475 dv.minor_version = DRV_VERSION_MINOR;
5476 dv.build_version = DRV_VERSION_BUILD;
5477 dv.subbuild_version = 0;
5478 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5480 dev_info(&pf->pdev->dev, "reset complete\n");
5483 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5487 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
5488 * @pf: board private structure
5490 * Close up the VFs and other things in prep for a Core Reset,
5491 * then get ready to rebuild the world.
5493 static void i40e_handle_reset_warning(struct i40e_pf *pf)
5497 ret = i40e_prep_for_reset(pf);
5499 i40e_reset_and_rebuild(pf, false);
5503 * i40e_handle_mdd_event
5504 * @pf: pointer to the pf structure
5506 * Called from the MDD irq handler to identify possibly malicious vfs
5508 static void i40e_handle_mdd_event(struct i40e_pf *pf)
5510 struct i40e_hw *hw = &pf->hw;
5511 bool mdd_detected = false;
5516 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
5519 /* find what triggered the MDD event */
5520 reg = rd32(hw, I40E_GL_MDET_TX);
5521 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
5522 u8 func = (reg & I40E_GL_MDET_TX_FUNCTION_MASK)
5523 >> I40E_GL_MDET_TX_FUNCTION_SHIFT;
5524 u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT)
5525 >> I40E_GL_MDET_TX_EVENT_SHIFT;
5526 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK)
5527 >> I40E_GL_MDET_TX_QUEUE_SHIFT;
5528 dev_info(&pf->pdev->dev,
5529 "Malicious Driver Detection event 0x%02x on TX queue %d of function 0x%02x\n",
5530 event, queue, func);
5531 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
5532 mdd_detected = true;
5534 reg = rd32(hw, I40E_GL_MDET_RX);
5535 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
5536 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK)
5537 >> I40E_GL_MDET_RX_FUNCTION_SHIFT;
5538 u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT)
5539 >> I40E_GL_MDET_RX_EVENT_SHIFT;
5540 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK)
5541 >> I40E_GL_MDET_RX_QUEUE_SHIFT;
5542 dev_info(&pf->pdev->dev,
5543 "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
5544 event, queue, func);
5545 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
5546 mdd_detected = true;
5549 /* see if one of the VFs needs its hand slapped */
5550 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
5552 reg = rd32(hw, I40E_VP_MDET_TX(i));
5553 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
5554 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
5555 vf->num_mdd_events++;
5556 dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i);
5559 reg = rd32(hw, I40E_VP_MDET_RX(i));
5560 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
5561 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
5562 vf->num_mdd_events++;
5563 dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i);
5566 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
5567 dev_info(&pf->pdev->dev,
5568 "Too many MDD events on VF %d, disabled\n", i);
5569 dev_info(&pf->pdev->dev,
5570 "Use PF Control I/F to re-enable the VF\n");
5571 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
5575 /* re-enable mdd interrupt cause */
5576 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
5577 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
5578 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
5579 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
5583 #ifdef CONFIG_I40E_VXLAN
5585 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
5586 * @pf: board private structure
5588 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5590 const int vxlan_hdr_qwords = 4;
5591 struct i40e_hw *hw = &pf->hw;
5597 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
5600 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
5602 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
5603 if (pf->pending_vxlan_bitmap & (1 << i)) {
5604 pf->pending_vxlan_bitmap &= ~(1 << i);
5605 port = pf->vxlan_ports[i];
5607 i40e_aq_add_udp_tunnel(hw, ntohs(port),
5609 I40E_AQC_TUNNEL_TYPE_VXLAN,
5610 &filter_index, NULL)
5611 : i40e_aq_del_udp_tunnel(hw, i, NULL);
5614 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
5615 port ? "adding" : "deleting",
5616 ntohs(port), port ? i : i);
5618 pf->vxlan_ports[i] = 0;
5620 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
5621 port ? "Added" : "Deleted",
5622 ntohs(port), port ? i : filter_index);
5630 * i40e_service_task - Run the driver's async subtasks
5631 * @work: pointer to work_struct containing our data
5633 static void i40e_service_task(struct work_struct *work)
5635 struct i40e_pf *pf = container_of(work,
5638 unsigned long start_time = jiffies;
5640 i40e_reset_subtask(pf);
5641 i40e_handle_mdd_event(pf);
5642 i40e_vc_process_vflr_event(pf);
5643 i40e_watchdog_subtask(pf);
5644 i40e_fdir_reinit_subtask(pf);
5645 i40e_check_hang_subtask(pf);
5646 i40e_sync_filters_subtask(pf);
5647 #ifdef CONFIG_I40E_VXLAN
5648 i40e_sync_vxlan_filters_subtask(pf);
5650 i40e_clean_adminq_subtask(pf);
5652 i40e_service_event_complete(pf);
5654 /* If the tasks have taken longer than one timer cycle or there
5655 * is more work to be done, reschedule the service task now
5656 * rather than wait for the timer to tick again.
5658 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
5659 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
5660 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
5661 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
5662 i40e_service_event_schedule(pf);
5666 * i40e_service_timer - timer callback
5667 * @data: pointer to PF struct
5669 static void i40e_service_timer(unsigned long data)
5671 struct i40e_pf *pf = (struct i40e_pf *)data;
5673 mod_timer(&pf->service_timer,
5674 round_jiffies(jiffies + pf->service_timer_period));
5675 i40e_service_event_schedule(pf);
5679 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
5680 * @vsi: the VSI being configured
5682 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
5684 struct i40e_pf *pf = vsi->back;
5686 switch (vsi->type) {
5688 vsi->alloc_queue_pairs = pf->num_lan_qps;
5689 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5690 I40E_REQ_DESCRIPTOR_MULTIPLE);
5691 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5692 vsi->num_q_vectors = pf->num_lan_msix;
5694 vsi->num_q_vectors = 1;
5699 vsi->alloc_queue_pairs = 1;
5700 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
5701 I40E_REQ_DESCRIPTOR_MULTIPLE);
5702 vsi->num_q_vectors = 1;
5705 case I40E_VSI_VMDQ2:
5706 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
5707 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5708 I40E_REQ_DESCRIPTOR_MULTIPLE);
5709 vsi->num_q_vectors = pf->num_vmdq_msix;
5712 case I40E_VSI_SRIOV:
5713 vsi->alloc_queue_pairs = pf->num_vf_qps;
5714 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5715 I40E_REQ_DESCRIPTOR_MULTIPLE);
5727 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
5728 * @type: VSI pointer
5729 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
5731 * On error: returns error code (negative)
5732 * On success: returns 0
5734 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
5739 /* allocate memory for both Tx and Rx ring pointers */
5740 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
5741 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
5744 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
5746 if (alloc_qvectors) {
5747 /* allocate memory for q_vector pointers */
5748 size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors;
5749 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
5750 if (!vsi->q_vectors) {
5758 kfree(vsi->tx_rings);
5763 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
5764 * @pf: board private structure
5765 * @type: type of VSI
5767 * On error: returns error code (negative)
5768 * On success: returns vsi index in PF (positive)
5770 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
5773 struct i40e_vsi *vsi;
5777 /* Need to protect the allocation of the VSIs at the PF level */
5778 mutex_lock(&pf->switch_mutex);
5780 /* VSI list may be fragmented if VSI creation/destruction has
5781 * been happening. We can afford to do a quick scan to look
5782 * for any free VSIs in the list.
5784 * find next empty vsi slot, looping back around if necessary
5787 while (i < pf->hw.func_caps.num_vsis && pf->vsi[i])
5789 if (i >= pf->hw.func_caps.num_vsis) {
5791 while (i < pf->next_vsi && pf->vsi[i])
5795 if (i < pf->hw.func_caps.num_vsis && !pf->vsi[i]) {
5796 vsi_idx = i; /* Found one! */
5799 goto unlock_pf; /* out of VSI slots! */
5803 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
5810 set_bit(__I40E_DOWN, &vsi->state);
5813 vsi->rx_itr_setting = pf->rx_itr_default;
5814 vsi->tx_itr_setting = pf->tx_itr_default;
5815 vsi->netdev_registered = false;
5816 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
5817 INIT_LIST_HEAD(&vsi->mac_filter_list);
5819 ret = i40e_set_num_rings_in_vsi(vsi);
5823 ret = i40e_vsi_alloc_arrays(vsi, true);
5827 /* Setup default MSIX irq handler for VSI */
5828 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
5830 pf->vsi[vsi_idx] = vsi;
5835 pf->next_vsi = i - 1;
5838 mutex_unlock(&pf->switch_mutex);
5843 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
5844 * @type: VSI pointer
5845 * @free_qvectors: a bool to specify if q_vectors need to be freed.
5847 * On error: returns error code (negative)
5848 * On success: returns 0
5850 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
5852 /* free the ring and vector containers */
5853 if (free_qvectors) {
5854 kfree(vsi->q_vectors);
5855 vsi->q_vectors = NULL;
5857 kfree(vsi->tx_rings);
5858 vsi->tx_rings = NULL;
5859 vsi->rx_rings = NULL;
5863 * i40e_vsi_clear - Deallocate the VSI provided
5864 * @vsi: the VSI being un-configured
5866 static int i40e_vsi_clear(struct i40e_vsi *vsi)
5877 mutex_lock(&pf->switch_mutex);
5878 if (!pf->vsi[vsi->idx]) {
5879 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
5880 vsi->idx, vsi->idx, vsi, vsi->type);
5884 if (pf->vsi[vsi->idx] != vsi) {
5885 dev_err(&pf->pdev->dev,
5886 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
5887 pf->vsi[vsi->idx]->idx,
5889 pf->vsi[vsi->idx]->type,
5890 vsi->idx, vsi, vsi->type);
5894 /* updates the pf for this cleared vsi */
5895 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
5896 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
5898 i40e_vsi_free_arrays(vsi, true);
5900 pf->vsi[vsi->idx] = NULL;
5901 if (vsi->idx < pf->next_vsi)
5902 pf->next_vsi = vsi->idx;
5905 mutex_unlock(&pf->switch_mutex);
5913 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
5914 * @vsi: the VSI being cleaned
5916 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
5920 if (vsi->tx_rings && vsi->tx_rings[0]) {
5921 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5922 kfree_rcu(vsi->tx_rings[i], rcu);
5923 vsi->tx_rings[i] = NULL;
5924 vsi->rx_rings[i] = NULL;
5930 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
5931 * @vsi: the VSI being configured
5933 static int i40e_alloc_rings(struct i40e_vsi *vsi)
5935 struct i40e_pf *pf = vsi->back;
5938 /* Set basic values in the rings to be used later during open() */
5939 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5940 struct i40e_ring *tx_ring;
5941 struct i40e_ring *rx_ring;
5943 /* allocate space for both Tx and Rx in one shot */
5944 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
5948 tx_ring->queue_index = i;
5949 tx_ring->reg_idx = vsi->base_queue + i;
5950 tx_ring->ring_active = false;
5952 tx_ring->netdev = vsi->netdev;
5953 tx_ring->dev = &pf->pdev->dev;
5954 tx_ring->count = vsi->num_desc;
5956 tx_ring->dcb_tc = 0;
5957 vsi->tx_rings[i] = tx_ring;
5959 rx_ring = &tx_ring[1];
5960 rx_ring->queue_index = i;
5961 rx_ring->reg_idx = vsi->base_queue + i;
5962 rx_ring->ring_active = false;
5964 rx_ring->netdev = vsi->netdev;
5965 rx_ring->dev = &pf->pdev->dev;
5966 rx_ring->count = vsi->num_desc;
5968 rx_ring->dcb_tc = 0;
5969 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
5970 set_ring_16byte_desc_enabled(rx_ring);
5972 clear_ring_16byte_desc_enabled(rx_ring);
5973 vsi->rx_rings[i] = rx_ring;
5979 i40e_vsi_clear_rings(vsi);
5984 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
5985 * @pf: board private structure
5986 * @vectors: the number of MSI-X vectors to request
5988 * Returns the number of vectors reserved, or error
5990 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
5992 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
5993 I40E_MIN_MSIX, vectors);
5995 dev_info(&pf->pdev->dev,
5996 "MSI-X vector reservation failed: %d\n", vectors);
6000 pf->num_msix_entries = vectors;
6006 * i40e_init_msix - Setup the MSIX capability
6007 * @pf: board private structure
6009 * Work with the OS to set up the MSIX vectors needed.
6011 * Returns 0 on success, negative on failure
6013 static int i40e_init_msix(struct i40e_pf *pf)
6015 i40e_status err = 0;
6016 struct i40e_hw *hw = &pf->hw;
6020 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6023 /* The number of vectors we'll request will be comprised of:
6024 * - Add 1 for "other" cause for Admin Queue events, etc.
6025 * - The number of LAN queue pairs
6026 * - Queues being used for RSS.
6027 * We don't need as many as max_rss_size vectors.
6028 * use rss_size instead in the calculation since that
6029 * is governed by number of cpus in the system.
6030 * - assumes symmetric Tx/Rx pairing
6031 * - The number of VMDq pairs
6032 * Once we count this up, try the request.
6034 * If we can't get what we want, we'll simplify to nearly nothing
6035 * and try again. If that still fails, we punt.
6037 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
6038 pf->num_vmdq_msix = pf->num_vmdq_qps;
6039 v_budget = 1 + pf->num_lan_msix;
6040 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6041 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6044 /* Scale down if necessary, and the rings will share vectors */
6045 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
6047 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6049 if (!pf->msix_entries)
6052 for (i = 0; i < v_budget; i++)
6053 pf->msix_entries[i].entry = i;
6054 vec = i40e_reserve_msix_vectors(pf, v_budget);
6055 if (vec < I40E_MIN_MSIX) {
6056 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6057 kfree(pf->msix_entries);
6058 pf->msix_entries = NULL;
6061 } else if (vec == I40E_MIN_MSIX) {
6062 /* Adjust for minimal MSIX use */
6063 dev_info(&pf->pdev->dev, "Features disabled, not enough MSI-X vectors\n");
6064 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6065 pf->num_vmdq_vsis = 0;
6066 pf->num_vmdq_qps = 0;
6067 pf->num_vmdq_msix = 0;
6068 pf->num_lan_qps = 1;
6069 pf->num_lan_msix = 1;
6071 } else if (vec != v_budget) {
6072 /* Scale vector usage down */
6073 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6074 vec--; /* reserve the misc vector */
6076 /* partition out the remaining vectors */
6079 pf->num_vmdq_vsis = 1;
6080 pf->num_lan_msix = 1;
6083 pf->num_vmdq_vsis = 1;
6084 pf->num_lan_msix = 2;
6087 pf->num_lan_msix = min_t(int, (vec / 2),
6089 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
6090 I40E_DEFAULT_NUM_VMDQ_VSI);
6099 * i40e_alloc_q_vector - Allocate memory for a single interrupt vector
6100 * @vsi: the VSI being configured
6101 * @v_idx: index of the vector in the vsi struct
6103 * We allocate one q_vector. If allocation fails we return -ENOMEM.
6105 static int i40e_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6107 struct i40e_q_vector *q_vector;
6109 /* allocate q_vector */
6110 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
6114 q_vector->vsi = vsi;
6115 q_vector->v_idx = v_idx;
6116 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6118 netif_napi_add(vsi->netdev, &q_vector->napi,
6119 i40e_napi_poll, vsi->work_limit);
6121 q_vector->rx.latency_range = I40E_LOW_LATENCY;
6122 q_vector->tx.latency_range = I40E_LOW_LATENCY;
6124 /* tie q_vector and vsi together */
6125 vsi->q_vectors[v_idx] = q_vector;
6131 * i40e_alloc_q_vectors - Allocate memory for interrupt vectors
6132 * @vsi: the VSI being configured
6134 * We allocate one q_vector per queue interrupt. If allocation fails we
6137 static int i40e_alloc_q_vectors(struct i40e_vsi *vsi)
6139 struct i40e_pf *pf = vsi->back;
6140 int v_idx, num_q_vectors;
6143 /* if not MSIX, give the one vector only to the LAN VSI */
6144 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6145 num_q_vectors = vsi->num_q_vectors;
6146 else if (vsi == pf->vsi[pf->lan_vsi])
6151 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
6152 err = i40e_alloc_q_vector(vsi, v_idx);
6161 i40e_free_q_vector(vsi, v_idx);
6167 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
6168 * @pf: board private structure to initialize
6170 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6174 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
6175 err = i40e_init_msix(pf);
6177 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6178 I40E_FLAG_RSS_ENABLED |
6179 I40E_FLAG_DCB_ENABLED |
6180 I40E_FLAG_SRIOV_ENABLED |
6181 I40E_FLAG_FD_SB_ENABLED |
6182 I40E_FLAG_FD_ATR_ENABLED |
6183 I40E_FLAG_VMDQ_ENABLED);
6185 /* rework the queue expectations without MSIX */
6186 i40e_determine_queue_usage(pf);
6190 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6191 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
6192 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
6193 err = pci_enable_msi(pf->pdev);
6195 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
6196 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
6200 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
6201 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
6203 /* track first vector for misc interrupts */
6204 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
6208 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
6209 * @pf: board private structure
6211 * This sets up the handler for MSIX 0, which is used to manage the
6212 * non-queue interrupts, e.g. AdminQ and errors. This is not used
6213 * when in MSI or Legacy interrupt mode.
6215 static int i40e_setup_misc_vector(struct i40e_pf *pf)
6217 struct i40e_hw *hw = &pf->hw;
6220 /* Only request the irq if this is the first time through, and
6221 * not when we're rebuilding after a Reset
6223 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6224 err = request_irq(pf->msix_entries[0].vector,
6225 i40e_intr, 0, pf->misc_int_name, pf);
6227 dev_info(&pf->pdev->dev,
6228 "request_irq for %s failed: %d\n",
6229 pf->misc_int_name, err);
6234 i40e_enable_misc_int_causes(hw);
6236 /* associate no queues to the misc vector */
6237 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
6238 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
6242 i40e_irq_dynamic_enable_icr0(pf);
6248 * i40e_config_rss - Prepare for RSS if used
6249 * @pf: board private structure
6251 static int i40e_config_rss(struct i40e_pf *pf)
6253 /* Set of random keys generated using kernel random number generator */
6254 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
6255 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
6256 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
6257 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
6258 struct i40e_hw *hw = &pf->hw;
6263 /* Fill out hash function seed */
6264 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
6265 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
6267 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
6268 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
6269 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
6270 hena |= I40E_DEFAULT_RSS_HENA;
6271 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
6272 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
6274 /* Populate the LUT with max no. of queues in round robin fashion */
6275 for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) {
6277 /* The assumption is that lan qp count will be the highest
6278 * qp count for any PF VSI that needs RSS.
6279 * If multiple VSIs need RSS support, all the qp counts
6280 * for those VSIs should be a power of 2 for RSS to work.
6281 * If LAN VSI is the only consumer for RSS then this requirement
6284 if (j == pf->rss_size)
6286 /* lut = 4-byte sliding window of 4 lut entries */
6287 lut = (lut << 8) | (j &
6288 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
6289 /* On i = 3, we have 4 entries in lut; write to the register */
6291 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
6299 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
6300 * @pf: board private structure
6301 * @queue_count: the requested queue count for rss.
6303 * returns 0 if rss is not enabled, if enabled returns the final rss queue
6304 * count which may be different from the requested queue count.
6306 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
6308 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
6311 queue_count = min_t(int, queue_count, pf->rss_size_max);
6312 queue_count = rounddown_pow_of_two(queue_count);
6314 if (queue_count != pf->rss_size) {
6315 i40e_prep_for_reset(pf);
6317 pf->rss_size = queue_count;
6319 i40e_reset_and_rebuild(pf, true);
6320 i40e_config_rss(pf);
6322 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
6323 return pf->rss_size;
6327 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
6328 * @pf: board private structure to initialize
6330 * i40e_sw_init initializes the Adapter private data structure.
6331 * Fields are initialized based on PCI device information and
6332 * OS network device settings (MTU size).
6334 static int i40e_sw_init(struct i40e_pf *pf)
6339 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
6340 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
6341 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
6342 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
6343 if (I40E_DEBUG_USER & debug)
6344 pf->hw.debug_mask = debug;
6345 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
6346 I40E_DEFAULT_MSG_ENABLE);
6349 /* Set default capability flags */
6350 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
6351 I40E_FLAG_MSI_ENABLED |
6352 I40E_FLAG_MSIX_ENABLED |
6353 I40E_FLAG_RX_1BUF_ENABLED;
6355 /* Depending on PF configurations, it is possible that the RSS
6356 * maximum might end up larger than the available queues
6358 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
6359 pf->rss_size_max = min_t(int, pf->rss_size_max,
6360 pf->hw.func_caps.num_tx_qp);
6361 if (pf->hw.func_caps.rss) {
6362 pf->flags |= I40E_FLAG_RSS_ENABLED;
6363 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
6364 pf->rss_size = rounddown_pow_of_two(pf->rss_size);
6369 /* MFP mode enabled */
6370 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
6371 pf->flags |= I40E_FLAG_MFP_ENABLED;
6372 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
6375 /* FW/NVM is not yet fixed in this regard */
6376 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
6377 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
6378 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6379 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
6380 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
6381 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6383 dev_info(&pf->pdev->dev,
6384 "Flow Director Side Band mode Disabled in MFP mode\n");
6386 pf->fdir_pf_filter_count =
6387 pf->hw.func_caps.fd_filters_guaranteed;
6388 pf->hw.fdir_shared_filter_count =
6389 pf->hw.func_caps.fd_filters_best_effort;
6392 if (pf->hw.func_caps.vmdq) {
6393 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
6394 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
6395 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
6398 #ifdef CONFIG_PCI_IOV
6399 if (pf->hw.func_caps.num_vfs) {
6400 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
6401 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
6402 pf->num_req_vfs = min_t(int,
6403 pf->hw.func_caps.num_vfs,
6406 #endif /* CONFIG_PCI_IOV */
6407 pf->eeprom_version = 0xDEAD;
6408 pf->lan_veb = I40E_NO_VEB;
6409 pf->lan_vsi = I40E_NO_VSI;
6411 /* set up queue assignment tracking */
6412 size = sizeof(struct i40e_lump_tracking)
6413 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
6414 pf->qp_pile = kzalloc(size, GFP_KERNEL);
6419 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
6420 pf->qp_pile->search_hint = 0;
6422 /* set up vector assignment tracking */
6423 size = sizeof(struct i40e_lump_tracking)
6424 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
6425 pf->irq_pile = kzalloc(size, GFP_KERNEL);
6426 if (!pf->irq_pile) {
6431 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
6432 pf->irq_pile->search_hint = 0;
6434 mutex_init(&pf->switch_mutex);
6441 * i40e_set_ntuple - set the ntuple feature flag and take action
6442 * @pf: board private structure to initialize
6443 * @features: the feature set that the stack is suggesting
6445 * returns a bool to indicate if reset needs to happen
6447 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
6449 bool need_reset = false;
6451 /* Check if Flow Director n-tuple support was enabled or disabled. If
6452 * the state changed, we need to reset.
6454 if (features & NETIF_F_NTUPLE) {
6455 /* Enable filters and mark for reset */
6456 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6458 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6460 /* turn off filters, mark for reset and clear SW filter list */
6461 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
6463 i40e_fdir_filter_exit(pf);
6465 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6466 /* if ATR was disabled it can be re-enabled. */
6467 if (!(pf->flags & I40E_FLAG_FD_ATR_ENABLED))
6468 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6474 * i40e_set_features - set the netdev feature flags
6475 * @netdev: ptr to the netdev being adjusted
6476 * @features: the feature set that the stack is suggesting
6478 static int i40e_set_features(struct net_device *netdev,
6479 netdev_features_t features)
6481 struct i40e_netdev_priv *np = netdev_priv(netdev);
6482 struct i40e_vsi *vsi = np->vsi;
6483 struct i40e_pf *pf = vsi->back;
6486 if (features & NETIF_F_HW_VLAN_CTAG_RX)
6487 i40e_vlan_stripping_enable(vsi);
6489 i40e_vlan_stripping_disable(vsi);
6491 need_reset = i40e_set_ntuple(pf, features);
6494 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
6499 #ifdef CONFIG_I40E_VXLAN
6501 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
6502 * @pf: board private structure
6503 * @port: The UDP port to look up
6505 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
6507 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
6511 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6512 if (pf->vxlan_ports[i] == port)
6520 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
6521 * @netdev: This physical port's netdev
6522 * @sa_family: Socket Family that VXLAN is notifying us about
6523 * @port: New UDP port number that VXLAN started listening to
6525 static void i40e_add_vxlan_port(struct net_device *netdev,
6526 sa_family_t sa_family, __be16 port)
6528 struct i40e_netdev_priv *np = netdev_priv(netdev);
6529 struct i40e_vsi *vsi = np->vsi;
6530 struct i40e_pf *pf = vsi->back;
6534 if (sa_family == AF_INET6)
6537 idx = i40e_get_vxlan_port_idx(pf, port);
6539 /* Check if port already exists */
6540 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6541 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
6545 /* Now check if there is space to add the new port */
6546 next_idx = i40e_get_vxlan_port_idx(pf, 0);
6548 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6549 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
6554 /* New port: add it and mark its index in the bitmap */
6555 pf->vxlan_ports[next_idx] = port;
6556 pf->pending_vxlan_bitmap |= (1 << next_idx);
6558 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6562 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
6563 * @netdev: This physical port's netdev
6564 * @sa_family: Socket Family that VXLAN is notifying us about
6565 * @port: UDP port number that VXLAN stopped listening to
6567 static void i40e_del_vxlan_port(struct net_device *netdev,
6568 sa_family_t sa_family, __be16 port)
6570 struct i40e_netdev_priv *np = netdev_priv(netdev);
6571 struct i40e_vsi *vsi = np->vsi;
6572 struct i40e_pf *pf = vsi->back;
6575 if (sa_family == AF_INET6)
6578 idx = i40e_get_vxlan_port_idx(pf, port);
6580 /* Check if port already exists */
6581 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6582 /* if port exists, set it to 0 (mark for deletion)
6583 * and make it pending
6585 pf->vxlan_ports[idx] = 0;
6587 pf->pending_vxlan_bitmap |= (1 << idx);
6589 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6591 netdev_warn(netdev, "Port %d was not found, not deleting\n",
6597 static const struct net_device_ops i40e_netdev_ops = {
6598 .ndo_open = i40e_open,
6599 .ndo_stop = i40e_close,
6600 .ndo_start_xmit = i40e_lan_xmit_frame,
6601 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
6602 .ndo_set_rx_mode = i40e_set_rx_mode,
6603 .ndo_validate_addr = eth_validate_addr,
6604 .ndo_set_mac_address = i40e_set_mac,
6605 .ndo_change_mtu = i40e_change_mtu,
6606 .ndo_do_ioctl = i40e_ioctl,
6607 .ndo_tx_timeout = i40e_tx_timeout,
6608 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
6609 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
6610 #ifdef CONFIG_NET_POLL_CONTROLLER
6611 .ndo_poll_controller = i40e_netpoll,
6613 .ndo_setup_tc = i40e_setup_tc,
6614 .ndo_set_features = i40e_set_features,
6615 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
6616 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
6617 .ndo_set_vf_tx_rate = i40e_ndo_set_vf_bw,
6618 .ndo_get_vf_config = i40e_ndo_get_vf_config,
6619 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
6620 #ifdef CONFIG_I40E_VXLAN
6621 .ndo_add_vxlan_port = i40e_add_vxlan_port,
6622 .ndo_del_vxlan_port = i40e_del_vxlan_port,
6627 * i40e_config_netdev - Setup the netdev flags
6628 * @vsi: the VSI being configured
6630 * Returns 0 on success, negative value on failure
6632 static int i40e_config_netdev(struct i40e_vsi *vsi)
6634 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
6635 struct i40e_pf *pf = vsi->back;
6636 struct i40e_hw *hw = &pf->hw;
6637 struct i40e_netdev_priv *np;
6638 struct net_device *netdev;
6639 u8 mac_addr[ETH_ALEN];
6642 etherdev_size = sizeof(struct i40e_netdev_priv);
6643 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
6647 vsi->netdev = netdev;
6648 np = netdev_priv(netdev);
6651 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
6652 NETIF_F_GSO_UDP_TUNNEL |
6655 netdev->features = NETIF_F_SG |
6659 NETIF_F_GSO_UDP_TUNNEL |
6660 NETIF_F_HW_VLAN_CTAG_TX |
6661 NETIF_F_HW_VLAN_CTAG_RX |
6662 NETIF_F_HW_VLAN_CTAG_FILTER |
6671 /* copy netdev features into list of user selectable features */
6672 netdev->hw_features |= netdev->features;
6674 if (vsi->type == I40E_VSI_MAIN) {
6675 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
6676 memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN);
6678 /* relate the VSI_VMDQ name to the VSI_MAIN name */
6679 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
6680 pf->vsi[pf->lan_vsi]->netdev->name);
6681 random_ether_addr(mac_addr);
6682 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
6684 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
6686 memcpy(netdev->dev_addr, mac_addr, ETH_ALEN);
6687 memcpy(netdev->perm_addr, mac_addr, ETH_ALEN);
6688 /* vlan gets same features (except vlan offload)
6689 * after any tweaks for specific VSI types
6691 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
6692 NETIF_F_HW_VLAN_CTAG_RX |
6693 NETIF_F_HW_VLAN_CTAG_FILTER);
6694 netdev->priv_flags |= IFF_UNICAST_FLT;
6695 netdev->priv_flags |= IFF_SUPP_NOFCS;
6696 /* Setup netdev TC information */
6697 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
6699 netdev->netdev_ops = &i40e_netdev_ops;
6700 netdev->watchdog_timeo = 5 * HZ;
6701 i40e_set_ethtool_ops(netdev);
6707 * i40e_vsi_delete - Delete a VSI from the switch
6708 * @vsi: the VSI being removed
6710 * Returns 0 on success, negative value on failure
6712 static void i40e_vsi_delete(struct i40e_vsi *vsi)
6714 /* remove default VSI is not allowed */
6715 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
6718 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
6723 * i40e_add_vsi - Add a VSI to the switch
6724 * @vsi: the VSI being configured
6726 * This initializes a VSI context depending on the VSI type to be added and
6727 * passes it down to the add_vsi aq command.
6729 static int i40e_add_vsi(struct i40e_vsi *vsi)
6732 struct i40e_mac_filter *f, *ftmp;
6733 struct i40e_pf *pf = vsi->back;
6734 struct i40e_hw *hw = &pf->hw;
6735 struct i40e_vsi_context ctxt;
6736 u8 enabled_tc = 0x1; /* TC0 enabled */
6739 memset(&ctxt, 0, sizeof(ctxt));
6740 switch (vsi->type) {
6742 /* The PF's main VSI is already setup as part of the
6743 * device initialization, so we'll not bother with
6744 * the add_vsi call, but we will retrieve the current
6747 ctxt.seid = pf->main_vsi_seid;
6748 ctxt.pf_num = pf->hw.pf_id;
6750 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6751 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6753 dev_info(&pf->pdev->dev,
6754 "couldn't get pf vsi config, err %d, aq_err %d\n",
6755 ret, pf->hw.aq.asq_last_status);
6758 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6759 vsi->info.valid_sections = 0;
6761 vsi->seid = ctxt.seid;
6762 vsi->id = ctxt.vsi_number;
6764 enabled_tc = i40e_pf_get_tc_map(pf);
6766 /* MFP mode setup queue map and update VSI */
6767 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
6768 memset(&ctxt, 0, sizeof(ctxt));
6769 ctxt.seid = pf->main_vsi_seid;
6770 ctxt.pf_num = pf->hw.pf_id;
6772 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
6773 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
6775 dev_info(&pf->pdev->dev,
6776 "update vsi failed, aq_err=%d\n",
6777 pf->hw.aq.asq_last_status);
6781 /* update the local VSI info queue map */
6782 i40e_vsi_update_queue_map(vsi, &ctxt);
6783 vsi->info.valid_sections = 0;
6785 /* Default/Main VSI is only enabled for TC0
6786 * reconfigure it to enable all TCs that are
6787 * available on the port in SFP mode.
6789 ret = i40e_vsi_config_tc(vsi, enabled_tc);
6791 dev_info(&pf->pdev->dev,
6792 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
6794 pf->hw.aq.asq_last_status);
6801 ctxt.pf_num = hw->pf_id;
6803 ctxt.uplink_seid = vsi->uplink_seid;
6804 ctxt.connection_type = 0x1; /* regular data port */
6805 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6806 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6809 case I40E_VSI_VMDQ2:
6810 ctxt.pf_num = hw->pf_id;
6812 ctxt.uplink_seid = vsi->uplink_seid;
6813 ctxt.connection_type = 0x1; /* regular data port */
6814 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6816 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6818 /* This VSI is connected to VEB so the switch_id
6819 * should be set to zero by default.
6821 ctxt.info.switch_id = 0;
6822 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
6823 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6825 /* Setup the VSI tx/rx queue map for TC0 only for now */
6826 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6829 case I40E_VSI_SRIOV:
6830 ctxt.pf_num = hw->pf_id;
6831 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
6832 ctxt.uplink_seid = vsi->uplink_seid;
6833 ctxt.connection_type = 0x1; /* regular data port */
6834 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
6836 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6838 /* This VSI is connected to VEB so the switch_id
6839 * should be set to zero by default.
6841 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6843 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
6844 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
6845 /* Setup the VSI tx/rx queue map for TC0 only for now */
6846 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6853 if (vsi->type != I40E_VSI_MAIN) {
6854 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6856 dev_info(&vsi->back->pdev->dev,
6857 "add vsi failed, aq_err=%d\n",
6858 vsi->back->hw.aq.asq_last_status);
6862 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6863 vsi->info.valid_sections = 0;
6864 vsi->seid = ctxt.seid;
6865 vsi->id = ctxt.vsi_number;
6868 /* If macvlan filters already exist, force them to get loaded */
6869 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
6874 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
6875 pf->flags |= I40E_FLAG_FILTER_SYNC;
6878 /* Update VSI BW information */
6879 ret = i40e_vsi_get_bw_info(vsi);
6881 dev_info(&pf->pdev->dev,
6882 "couldn't get vsi bw info, err %d, aq_err %d\n",
6883 ret, pf->hw.aq.asq_last_status);
6884 /* VSI is already added so not tearing that up */
6893 * i40e_vsi_release - Delete a VSI and free its resources
6894 * @vsi: the VSI being removed
6896 * Returns 0 on success or < 0 on error
6898 int i40e_vsi_release(struct i40e_vsi *vsi)
6900 struct i40e_mac_filter *f, *ftmp;
6901 struct i40e_veb *veb = NULL;
6908 /* release of a VEB-owner or last VSI is not allowed */
6909 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
6910 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
6911 vsi->seid, vsi->uplink_seid);
6914 if (vsi == pf->vsi[pf->lan_vsi] &&
6915 !test_bit(__I40E_DOWN, &pf->state)) {
6916 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
6920 uplink_seid = vsi->uplink_seid;
6921 if (vsi->type != I40E_VSI_SRIOV) {
6922 if (vsi->netdev_registered) {
6923 vsi->netdev_registered = false;
6925 /* results in a call to i40e_close() */
6926 unregister_netdev(vsi->netdev);
6929 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
6931 i40e_vsi_free_irq(vsi);
6932 i40e_vsi_free_tx_resources(vsi);
6933 i40e_vsi_free_rx_resources(vsi);
6935 i40e_vsi_disable_irq(vsi);
6938 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
6939 i40e_del_filter(vsi, f->macaddr, f->vlan,
6940 f->is_vf, f->is_netdev);
6941 i40e_sync_vsi_filters(vsi);
6943 i40e_vsi_delete(vsi);
6944 i40e_vsi_free_q_vectors(vsi);
6946 free_netdev(vsi->netdev);
6949 i40e_vsi_clear_rings(vsi);
6950 i40e_vsi_clear(vsi);
6952 /* If this was the last thing on the VEB, except for the
6953 * controlling VSI, remove the VEB, which puts the controlling
6954 * VSI onto the next level down in the switch.
6956 * Well, okay, there's one more exception here: don't remove
6957 * the orphan VEBs yet. We'll wait for an explicit remove request
6958 * from up the network stack.
6960 for (n = 0, i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6962 pf->vsi[i]->uplink_seid == uplink_seid &&
6963 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
6964 n++; /* count the VSIs */
6967 for (i = 0; i < I40E_MAX_VEB; i++) {
6970 if (pf->veb[i]->uplink_seid == uplink_seid)
6971 n++; /* count the VEBs */
6972 if (pf->veb[i]->seid == uplink_seid)
6975 if (n == 0 && veb && veb->uplink_seid != 0)
6976 i40e_veb_release(veb);
6982 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
6983 * @vsi: ptr to the VSI
6985 * This should only be called after i40e_vsi_mem_alloc() which allocates the
6986 * corresponding SW VSI structure and initializes num_queue_pairs for the
6987 * newly allocated VSI.
6989 * Returns 0 on success or negative on failure
6991 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
6994 struct i40e_pf *pf = vsi->back;
6996 if (vsi->q_vectors[0]) {
6997 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
7002 if (vsi->base_vector) {
7003 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
7004 vsi->seid, vsi->base_vector);
7008 ret = i40e_alloc_q_vectors(vsi);
7010 dev_info(&pf->pdev->dev,
7011 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
7012 vsi->num_q_vectors, vsi->seid, ret);
7013 vsi->num_q_vectors = 0;
7014 goto vector_setup_out;
7017 if (vsi->num_q_vectors)
7018 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
7019 vsi->num_q_vectors, vsi->idx);
7020 if (vsi->base_vector < 0) {
7021 dev_info(&pf->pdev->dev,
7022 "failed to get queue tracking for VSI %d, err=%d\n",
7023 vsi->seid, vsi->base_vector);
7024 i40e_vsi_free_q_vectors(vsi);
7026 goto vector_setup_out;
7034 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
7035 * @vsi: pointer to the vsi.
7037 * This re-allocates a vsi's queue resources.
7039 * Returns pointer to the successfully allocated and configured VSI sw struct
7040 * on success, otherwise returns NULL on failure.
7042 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
7044 struct i40e_pf *pf = vsi->back;
7048 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7049 i40e_vsi_clear_rings(vsi);
7051 i40e_vsi_free_arrays(vsi, false);
7052 i40e_set_num_rings_in_vsi(vsi);
7053 ret = i40e_vsi_alloc_arrays(vsi, false);
7057 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
7059 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7063 vsi->base_queue = ret;
7065 /* Update the FW view of the VSI. Force a reset of TC and queue
7066 * layout configurations.
7068 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7069 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7070 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7071 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7073 /* assign it some queues */
7074 ret = i40e_alloc_rings(vsi);
7078 /* map all of the rings to the q_vectors */
7079 i40e_vsi_map_rings_to_vectors(vsi);
7083 i40e_vsi_free_q_vectors(vsi);
7084 if (vsi->netdev_registered) {
7085 vsi->netdev_registered = false;
7086 unregister_netdev(vsi->netdev);
7087 free_netdev(vsi->netdev);
7090 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7092 i40e_vsi_clear(vsi);
7097 * i40e_vsi_setup - Set up a VSI by a given type
7098 * @pf: board private structure
7100 * @uplink_seid: the switch element to link to
7101 * @param1: usage depends upon VSI type. For VF types, indicates VF id
7103 * This allocates the sw VSI structure and its queue resources, then add a VSI
7104 * to the identified VEB.
7106 * Returns pointer to the successfully allocated and configure VSI sw struct on
7107 * success, otherwise returns NULL on failure.
7109 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
7110 u16 uplink_seid, u32 param1)
7112 struct i40e_vsi *vsi = NULL;
7113 struct i40e_veb *veb = NULL;
7117 /* The requested uplink_seid must be either
7118 * - the PF's port seid
7119 * no VEB is needed because this is the PF
7120 * or this is a Flow Director special case VSI
7121 * - seid of an existing VEB
7122 * - seid of a VSI that owns an existing VEB
7123 * - seid of a VSI that doesn't own a VEB
7124 * a new VEB is created and the VSI becomes the owner
7125 * - seid of the PF VSI, which is what creates the first VEB
7126 * this is a special case of the previous
7128 * Find which uplink_seid we were given and create a new VEB if needed
7130 for (i = 0; i < I40E_MAX_VEB; i++) {
7131 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
7137 if (!veb && uplink_seid != pf->mac_seid) {
7139 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7140 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
7146 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
7151 if (vsi->uplink_seid == pf->mac_seid)
7152 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
7153 vsi->tc_config.enabled_tc);
7154 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
7155 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7156 vsi->tc_config.enabled_tc);
7158 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7159 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7163 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
7167 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7168 uplink_seid = veb->seid;
7171 /* get vsi sw struct */
7172 v_idx = i40e_vsi_mem_alloc(pf, type);
7175 vsi = pf->vsi[v_idx];
7179 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
7181 if (type == I40E_VSI_MAIN)
7182 pf->lan_vsi = v_idx;
7183 else if (type == I40E_VSI_SRIOV)
7184 vsi->vf_id = param1;
7185 /* assign it some queues */
7186 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
7189 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7193 vsi->base_queue = ret;
7195 /* get a VSI from the hardware */
7196 vsi->uplink_seid = uplink_seid;
7197 ret = i40e_add_vsi(vsi);
7201 switch (vsi->type) {
7202 /* setup the netdev if needed */
7204 case I40E_VSI_VMDQ2:
7205 ret = i40e_config_netdev(vsi);
7208 ret = register_netdev(vsi->netdev);
7211 vsi->netdev_registered = true;
7212 netif_carrier_off(vsi->netdev);
7213 #ifdef CONFIG_I40E_DCB
7214 /* Setup DCB netlink interface */
7215 i40e_dcbnl_setup(vsi);
7216 #endif /* CONFIG_I40E_DCB */
7220 /* set up vectors and rings if needed */
7221 ret = i40e_vsi_setup_vectors(vsi);
7225 ret = i40e_alloc_rings(vsi);
7229 /* map all of the rings to the q_vectors */
7230 i40e_vsi_map_rings_to_vectors(vsi);
7232 i40e_vsi_reset_stats(vsi);
7236 /* no netdev or rings for the other VSI types */
7243 i40e_vsi_free_q_vectors(vsi);
7245 if (vsi->netdev_registered) {
7246 vsi->netdev_registered = false;
7247 unregister_netdev(vsi->netdev);
7248 free_netdev(vsi->netdev);
7252 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7254 i40e_vsi_clear(vsi);
7260 * i40e_veb_get_bw_info - Query VEB BW information
7261 * @veb: the veb to query
7263 * Query the Tx scheduler BW configuration data for given VEB
7265 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
7267 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
7268 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
7269 struct i40e_pf *pf = veb->pf;
7270 struct i40e_hw *hw = &pf->hw;
7275 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
7278 dev_info(&pf->pdev->dev,
7279 "query veb bw config failed, aq_err=%d\n",
7280 hw->aq.asq_last_status);
7284 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
7287 dev_info(&pf->pdev->dev,
7288 "query veb bw ets config failed, aq_err=%d\n",
7289 hw->aq.asq_last_status);
7293 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
7294 veb->bw_max_quanta = ets_data.tc_bw_max;
7295 veb->is_abs_credits = bw_data.absolute_credits_enable;
7296 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
7297 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
7298 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7299 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
7300 veb->bw_tc_limit_credits[i] =
7301 le16_to_cpu(bw_data.tc_bw_limits[i]);
7302 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
7310 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
7311 * @pf: board private structure
7313 * On error: returns error code (negative)
7314 * On success: returns vsi index in PF (positive)
7316 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
7319 struct i40e_veb *veb;
7322 /* Need to protect the allocation of switch elements at the PF level */
7323 mutex_lock(&pf->switch_mutex);
7325 /* VEB list may be fragmented if VEB creation/destruction has
7326 * been happening. We can afford to do a quick scan to look
7327 * for any free slots in the list.
7329 * find next empty veb slot, looping back around if necessary
7332 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
7334 if (i >= I40E_MAX_VEB) {
7336 goto err_alloc_veb; /* out of VEB slots! */
7339 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
7346 veb->enabled_tc = 1;
7351 mutex_unlock(&pf->switch_mutex);
7356 * i40e_switch_branch_release - Delete a branch of the switch tree
7357 * @branch: where to start deleting
7359 * This uses recursion to find the tips of the branch to be
7360 * removed, deleting until we get back to and can delete this VEB.
7362 static void i40e_switch_branch_release(struct i40e_veb *branch)
7364 struct i40e_pf *pf = branch->pf;
7365 u16 branch_seid = branch->seid;
7366 u16 veb_idx = branch->idx;
7369 /* release any VEBs on this VEB - RECURSION */
7370 for (i = 0; i < I40E_MAX_VEB; i++) {
7373 if (pf->veb[i]->uplink_seid == branch->seid)
7374 i40e_switch_branch_release(pf->veb[i]);
7377 /* Release the VSIs on this VEB, but not the owner VSI.
7379 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
7380 * the VEB itself, so don't use (*branch) after this loop.
7382 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7385 if (pf->vsi[i]->uplink_seid == branch_seid &&
7386 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7387 i40e_vsi_release(pf->vsi[i]);
7391 /* There's one corner case where the VEB might not have been
7392 * removed, so double check it here and remove it if needed.
7393 * This case happens if the veb was created from the debugfs
7394 * commands and no VSIs were added to it.
7396 if (pf->veb[veb_idx])
7397 i40e_veb_release(pf->veb[veb_idx]);
7401 * i40e_veb_clear - remove veb struct
7402 * @veb: the veb to remove
7404 static void i40e_veb_clear(struct i40e_veb *veb)
7410 struct i40e_pf *pf = veb->pf;
7412 mutex_lock(&pf->switch_mutex);
7413 if (pf->veb[veb->idx] == veb)
7414 pf->veb[veb->idx] = NULL;
7415 mutex_unlock(&pf->switch_mutex);
7422 * i40e_veb_release - Delete a VEB and free its resources
7423 * @veb: the VEB being removed
7425 void i40e_veb_release(struct i40e_veb *veb)
7427 struct i40e_vsi *vsi = NULL;
7433 /* find the remaining VSI and check for extras */
7434 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7435 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
7441 dev_info(&pf->pdev->dev,
7442 "can't remove VEB %d with %d VSIs left\n",
7447 /* move the remaining VSI to uplink veb */
7448 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
7449 if (veb->uplink_seid) {
7450 vsi->uplink_seid = veb->uplink_seid;
7451 if (veb->uplink_seid == pf->mac_seid)
7452 vsi->veb_idx = I40E_NO_VEB;
7454 vsi->veb_idx = veb->veb_idx;
7457 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
7458 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
7461 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
7462 i40e_veb_clear(veb);
7468 * i40e_add_veb - create the VEB in the switch
7469 * @veb: the VEB to be instantiated
7470 * @vsi: the controlling VSI
7472 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
7474 bool is_default = false;
7475 bool is_cloud = false;
7478 /* get a VEB from the hardware */
7479 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
7480 veb->enabled_tc, is_default,
7481 is_cloud, &veb->seid, NULL);
7483 dev_info(&veb->pf->pdev->dev,
7484 "couldn't add VEB, err %d, aq_err %d\n",
7485 ret, veb->pf->hw.aq.asq_last_status);
7489 /* get statistics counter */
7490 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
7491 &veb->stats_idx, NULL, NULL, NULL);
7493 dev_info(&veb->pf->pdev->dev,
7494 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
7495 ret, veb->pf->hw.aq.asq_last_status);
7498 ret = i40e_veb_get_bw_info(veb);
7500 dev_info(&veb->pf->pdev->dev,
7501 "couldn't get VEB bw info, err %d, aq_err %d\n",
7502 ret, veb->pf->hw.aq.asq_last_status);
7503 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
7507 vsi->uplink_seid = veb->seid;
7508 vsi->veb_idx = veb->idx;
7509 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7515 * i40e_veb_setup - Set up a VEB
7516 * @pf: board private structure
7517 * @flags: VEB setup flags
7518 * @uplink_seid: the switch element to link to
7519 * @vsi_seid: the initial VSI seid
7520 * @enabled_tc: Enabled TC bit-map
7522 * This allocates the sw VEB structure and links it into the switch
7523 * It is possible and legal for this to be a duplicate of an already
7524 * existing VEB. It is also possible for both uplink and vsi seids
7525 * to be zero, in order to create a floating VEB.
7527 * Returns pointer to the successfully allocated VEB sw struct on
7528 * success, otherwise returns NULL on failure.
7530 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
7531 u16 uplink_seid, u16 vsi_seid,
7534 struct i40e_veb *veb, *uplink_veb = NULL;
7535 int vsi_idx, veb_idx;
7538 /* if one seid is 0, the other must be 0 to create a floating relay */
7539 if ((uplink_seid == 0 || vsi_seid == 0) &&
7540 (uplink_seid + vsi_seid != 0)) {
7541 dev_info(&pf->pdev->dev,
7542 "one, not both seid's are 0: uplink=%d vsi=%d\n",
7543 uplink_seid, vsi_seid);
7547 /* make sure there is such a vsi and uplink */
7548 for (vsi_idx = 0; vsi_idx < pf->hw.func_caps.num_vsis; vsi_idx++)
7549 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
7551 if (vsi_idx >= pf->hw.func_caps.num_vsis && vsi_seid != 0) {
7552 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
7557 if (uplink_seid && uplink_seid != pf->mac_seid) {
7558 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
7559 if (pf->veb[veb_idx] &&
7560 pf->veb[veb_idx]->seid == uplink_seid) {
7561 uplink_veb = pf->veb[veb_idx];
7566 dev_info(&pf->pdev->dev,
7567 "uplink seid %d not found\n", uplink_seid);
7572 /* get veb sw struct */
7573 veb_idx = i40e_veb_mem_alloc(pf);
7576 veb = pf->veb[veb_idx];
7578 veb->uplink_seid = uplink_seid;
7579 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
7580 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
7582 /* create the VEB in the switch */
7583 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
7590 i40e_veb_clear(veb);
7596 * i40e_setup_pf_switch_element - set pf vars based on switch type
7597 * @pf: board private structure
7598 * @ele: element we are building info from
7599 * @num_reported: total number of elements
7600 * @printconfig: should we print the contents
7602 * helper function to assist in extracting a few useful SEID values.
7604 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
7605 struct i40e_aqc_switch_config_element_resp *ele,
7606 u16 num_reported, bool printconfig)
7608 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
7609 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
7610 u8 element_type = ele->element_type;
7611 u16 seid = le16_to_cpu(ele->seid);
7614 dev_info(&pf->pdev->dev,
7615 "type=%d seid=%d uplink=%d downlink=%d\n",
7616 element_type, seid, uplink_seid, downlink_seid);
7618 switch (element_type) {
7619 case I40E_SWITCH_ELEMENT_TYPE_MAC:
7620 pf->mac_seid = seid;
7622 case I40E_SWITCH_ELEMENT_TYPE_VEB:
7624 if (uplink_seid != pf->mac_seid)
7626 if (pf->lan_veb == I40E_NO_VEB) {
7629 /* find existing or else empty VEB */
7630 for (v = 0; v < I40E_MAX_VEB; v++) {
7631 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
7636 if (pf->lan_veb == I40E_NO_VEB) {
7637 v = i40e_veb_mem_alloc(pf);
7644 pf->veb[pf->lan_veb]->seid = seid;
7645 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
7646 pf->veb[pf->lan_veb]->pf = pf;
7647 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
7649 case I40E_SWITCH_ELEMENT_TYPE_VSI:
7650 if (num_reported != 1)
7652 /* This is immediately after a reset so we can assume this is
7655 pf->mac_seid = uplink_seid;
7656 pf->pf_seid = downlink_seid;
7657 pf->main_vsi_seid = seid;
7659 dev_info(&pf->pdev->dev,
7660 "pf_seid=%d main_vsi_seid=%d\n",
7661 pf->pf_seid, pf->main_vsi_seid);
7663 case I40E_SWITCH_ELEMENT_TYPE_PF:
7664 case I40E_SWITCH_ELEMENT_TYPE_VF:
7665 case I40E_SWITCH_ELEMENT_TYPE_EMP:
7666 case I40E_SWITCH_ELEMENT_TYPE_BMC:
7667 case I40E_SWITCH_ELEMENT_TYPE_PE:
7668 case I40E_SWITCH_ELEMENT_TYPE_PA:
7669 /* ignore these for now */
7672 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
7673 element_type, seid);
7679 * i40e_fetch_switch_configuration - Get switch config from firmware
7680 * @pf: board private structure
7681 * @printconfig: should we print the contents
7683 * Get the current switch configuration from the device and
7684 * extract a few useful SEID values.
7686 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
7688 struct i40e_aqc_get_switch_config_resp *sw_config;
7694 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
7698 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
7700 u16 num_reported, num_total;
7702 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
7706 dev_info(&pf->pdev->dev,
7707 "get switch config failed %d aq_err=%x\n",
7708 ret, pf->hw.aq.asq_last_status);
7713 num_reported = le16_to_cpu(sw_config->header.num_reported);
7714 num_total = le16_to_cpu(sw_config->header.num_total);
7717 dev_info(&pf->pdev->dev,
7718 "header: %d reported %d total\n",
7719 num_reported, num_total);
7722 int sz = sizeof(*sw_config) * num_reported;
7724 kfree(pf->sw_config);
7725 pf->sw_config = kzalloc(sz, GFP_KERNEL);
7727 memcpy(pf->sw_config, sw_config, sz);
7730 for (i = 0; i < num_reported; i++) {
7731 struct i40e_aqc_switch_config_element_resp *ele =
7732 &sw_config->element[i];
7734 i40e_setup_pf_switch_element(pf, ele, num_reported,
7737 } while (next_seid != 0);
7744 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
7745 * @pf: board private structure
7746 * @reinit: if the Main VSI needs to re-initialized.
7748 * Returns 0 on success, negative value on failure
7750 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
7752 u32 rxfc = 0, txfc = 0, rxfc_reg;
7755 /* find out what's out there already */
7756 ret = i40e_fetch_switch_configuration(pf, false);
7758 dev_info(&pf->pdev->dev,
7759 "couldn't fetch switch config, err %d, aq_err %d\n",
7760 ret, pf->hw.aq.asq_last_status);
7763 i40e_pf_reset_stats(pf);
7765 /* first time setup */
7766 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
7767 struct i40e_vsi *vsi = NULL;
7770 /* Set up the PF VSI associated with the PF's main VSI
7771 * that is already in the HW switch
7773 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
7774 uplink_seid = pf->veb[pf->lan_veb]->seid;
7776 uplink_seid = pf->mac_seid;
7777 if (pf->lan_vsi == I40E_NO_VSI)
7778 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
7780 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
7782 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
7783 i40e_fdir_teardown(pf);
7787 /* force a reset of TC and queue layout configurations */
7788 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7789 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7790 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7791 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7793 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
7795 i40e_fdir_sb_setup(pf);
7797 /* Setup static PF queue filter control settings */
7798 ret = i40e_setup_pf_filter_control(pf);
7800 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
7802 /* Failure here should not stop continuing other steps */
7805 /* enable RSS in the HW, even for only one queue, as the stack can use
7808 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
7809 i40e_config_rss(pf);
7811 /* fill in link information and enable LSE reporting */
7812 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
7813 i40e_link_event(pf);
7815 /* Initialize user-specific link properties */
7816 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
7817 I40E_AQ_AN_COMPLETED) ? true : false);
7818 /* requested_mode is set in probe or by ethtool */
7819 if (!pf->fc_autoneg_status)
7822 if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) &&
7823 (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX))
7824 pf->hw.fc.current_mode = I40E_FC_FULL;
7825 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
7826 pf->hw.fc.current_mode = I40E_FC_TX_PAUSE;
7827 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
7828 pf->hw.fc.current_mode = I40E_FC_RX_PAUSE;
7830 pf->hw.fc.current_mode = I40E_FC_NONE;
7832 /* sync the flow control settings with the auto-neg values */
7833 switch (pf->hw.fc.current_mode) {
7838 case I40E_FC_TX_PAUSE:
7842 case I40E_FC_RX_PAUSE:
7847 case I40E_FC_DEFAULT:
7854 /* no default case, we have to handle all possibilities here */
7857 wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT);
7859 rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7860 ~I40E_PRTDCB_MFLCN_RFCE_MASK;
7861 rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT);
7863 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg);
7868 /* disable L2 flow control, user can turn it on if they wish */
7869 wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0);
7870 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7871 ~I40E_PRTDCB_MFLCN_RFCE_MASK);
7880 * i40e_determine_queue_usage - Work out queue distribution
7881 * @pf: board private structure
7883 static void i40e_determine_queue_usage(struct i40e_pf *pf)
7887 pf->num_lan_qps = 0;
7889 /* Find the max queues to be put into basic use. We'll always be
7890 * using TC0, whether or not DCB is running, and TC0 will get the
7893 queues_left = pf->hw.func_caps.num_tx_qp;
7895 if ((queues_left == 1) ||
7896 !(pf->flags & I40E_FLAG_MSIX_ENABLED) ||
7897 !(pf->flags & (I40E_FLAG_RSS_ENABLED | I40E_FLAG_FD_SB_ENABLED |
7898 I40E_FLAG_DCB_ENABLED))) {
7899 /* one qp for PF, no queues for anything else */
7901 pf->rss_size = pf->num_lan_qps = 1;
7903 /* make sure all the fancies are disabled */
7904 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
7905 I40E_FLAG_FD_SB_ENABLED |
7906 I40E_FLAG_FD_ATR_ENABLED |
7907 I40E_FLAG_DCB_ENABLED |
7908 I40E_FLAG_SRIOV_ENABLED |
7909 I40E_FLAG_VMDQ_ENABLED);
7911 /* Not enough queues for all TCs */
7912 if ((pf->flags & I40E_FLAG_DCB_ENABLED) &&
7913 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
7914 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7915 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
7917 pf->num_lan_qps = pf->rss_size_max;
7918 queues_left -= pf->num_lan_qps;
7921 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7922 if (queues_left > 1) {
7923 queues_left -= 1; /* save 1 queue for FD */
7925 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7926 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
7930 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
7931 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
7932 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
7933 (queues_left / pf->num_vf_qps));
7934 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
7937 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7938 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
7939 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
7940 (queues_left / pf->num_vmdq_qps));
7941 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
7944 pf->queues_left = queues_left;
7949 * i40e_setup_pf_filter_control - Setup PF static filter control
7950 * @pf: PF to be setup
7952 * i40e_setup_pf_filter_control sets up a pf's initial filter control
7953 * settings. If PE/FCoE are enabled then it will also set the per PF
7954 * based filter sizes required for them. It also enables Flow director,
7955 * ethertype and macvlan type filter settings for the pf.
7957 * Returns 0 on success, negative on failure
7959 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
7961 struct i40e_filter_control_settings *settings = &pf->filter_settings;
7963 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
7965 /* Flow Director is enabled */
7966 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
7967 settings->enable_fdir = true;
7969 /* Ethtype and MACVLAN filters enabled for PF */
7970 settings->enable_ethtype = true;
7971 settings->enable_macvlan = true;
7973 if (i40e_set_filter_control(&pf->hw, settings))
7979 #define INFO_STRING_LEN 255
7980 static void i40e_print_features(struct i40e_pf *pf)
7982 struct i40e_hw *hw = &pf->hw;
7985 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
7987 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
7993 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
7994 #ifdef CONFIG_PCI_IOV
7995 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
7997 buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis,
7998 pf->vsi[pf->lan_vsi]->num_queue_pairs);
8000 if (pf->flags & I40E_FLAG_RSS_ENABLED)
8001 buf += sprintf(buf, "RSS ");
8002 buf += sprintf(buf, "FDir ");
8003 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
8004 buf += sprintf(buf, "ATR ");
8005 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
8006 buf += sprintf(buf, "NTUPLE ");
8007 if (pf->flags & I40E_FLAG_DCB_ENABLED)
8008 buf += sprintf(buf, "DCB ");
8009 if (pf->flags & I40E_FLAG_PTP)
8010 buf += sprintf(buf, "PTP ");
8012 BUG_ON(buf > (string + INFO_STRING_LEN));
8013 dev_info(&pf->pdev->dev, "%s\n", string);
8018 * i40e_probe - Device initialization routine
8019 * @pdev: PCI device information struct
8020 * @ent: entry in i40e_pci_tbl
8022 * i40e_probe initializes a pf identified by a pci_dev structure.
8023 * The OS initialization, configuring of the pf private structure,
8024 * and a hardware reset occur.
8026 * Returns 0 on success, negative on failure
8028 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8030 struct i40e_driver_version dv;
8033 static u16 pfs_found;
8038 err = pci_enable_device_mem(pdev);
8042 /* set up for high or low dma */
8043 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
8045 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8048 "DMA configuration failed: 0x%x\n", err);
8052 /* set up pci connections */
8053 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8054 IORESOURCE_MEM), i40e_driver_name);
8056 dev_info(&pdev->dev,
8057 "pci_request_selected_regions failed %d\n", err);
8061 pci_enable_pcie_error_reporting(pdev);
8062 pci_set_master(pdev);
8064 /* Now that we have a PCI connection, we need to do the
8065 * low level device setup. This is primarily setting up
8066 * the Admin Queue structures and then querying for the
8067 * device's current profile information.
8069 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
8076 set_bit(__I40E_DOWN, &pf->state);
8080 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8081 pci_resource_len(pdev, 0));
8084 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
8085 (unsigned int)pci_resource_start(pdev, 0),
8086 (unsigned int)pci_resource_len(pdev, 0), err);
8089 hw->vendor_id = pdev->vendor;
8090 hw->device_id = pdev->device;
8091 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
8092 hw->subsystem_vendor_id = pdev->subsystem_vendor;
8093 hw->subsystem_device_id = pdev->subsystem_device;
8094 hw->bus.device = PCI_SLOT(pdev->devfn);
8095 hw->bus.func = PCI_FUNC(pdev->devfn);
8096 pf->instance = pfs_found;
8098 /* do a special CORER for clearing PXE mode once at init */
8099 if (hw->revision_id == 0 &&
8100 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
8101 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
8106 i40e_clear_pxe_mode(hw);
8109 /* Reset here to make sure all is clean and to define PF 'n' */
8110 err = i40e_pf_reset(hw);
8112 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
8117 hw->aq.num_arq_entries = I40E_AQ_LEN;
8118 hw->aq.num_asq_entries = I40E_AQ_LEN;
8119 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8120 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8121 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
8122 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
8124 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
8126 err = i40e_init_shared_code(hw);
8128 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
8132 /* set up a default setting for link flow control */
8133 pf->hw.fc.requested_mode = I40E_FC_NONE;
8135 err = i40e_init_adminq(hw);
8136 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
8138 dev_info(&pdev->dev,
8139 "init_adminq failed: %d expecting API %02x.%02x\n",
8141 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
8145 i40e_clear_pxe_mode(hw);
8146 err = i40e_get_capabilities(pf);
8148 goto err_adminq_setup;
8150 err = i40e_sw_init(pf);
8152 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
8156 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
8157 hw->func_caps.num_rx_qp,
8158 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
8160 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
8161 goto err_init_lan_hmc;
8164 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
8166 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
8168 goto err_configure_lan_hmc;
8171 i40e_get_mac_addr(hw, hw->mac.addr);
8172 if (!is_valid_ether_addr(hw->mac.addr)) {
8173 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
8177 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
8178 memcpy(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN);
8180 pci_set_drvdata(pdev, pf);
8181 pci_save_state(pdev);
8182 #ifdef CONFIG_I40E_DCB
8183 err = i40e_init_pf_dcb(pf);
8185 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
8186 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8189 #endif /* CONFIG_I40E_DCB */
8191 /* set up periodic task facility */
8192 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
8193 pf->service_timer_period = HZ;
8195 INIT_WORK(&pf->service_task, i40e_service_task);
8196 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
8197 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
8198 pf->link_check_timeout = jiffies;
8200 /* WoL defaults to disabled */
8202 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
8204 /* set up the main switch operations */
8205 i40e_determine_queue_usage(pf);
8206 i40e_init_interrupt_scheme(pf);
8208 /* Set up the *vsi struct based on the number of VSIs in the HW,
8209 * and set up our local tracking of the MAIN PF vsi.
8211 len = sizeof(struct i40e_vsi *) * pf->hw.func_caps.num_vsis;
8212 pf->vsi = kzalloc(len, GFP_KERNEL);
8215 goto err_switch_setup;
8218 err = i40e_setup_pf_switch(pf, false);
8220 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
8224 /* The main driver is (mostly) up and happy. We need to set this state
8225 * before setting up the misc vector or we get a race and the vector
8226 * ends up disabled forever.
8228 clear_bit(__I40E_DOWN, &pf->state);
8230 /* In case of MSIX we are going to setup the misc vector right here
8231 * to handle admin queue events etc. In case of legacy and MSI
8232 * the misc functionality and queue processing is combined in
8233 * the same vector and that gets setup at open.
8235 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8236 err = i40e_setup_misc_vector(pf);
8238 dev_info(&pdev->dev,
8239 "setup of misc vector failed: %d\n", err);
8244 /* prep for VF support */
8245 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8246 (pf->flags & I40E_FLAG_MSIX_ENABLED)) {
8249 /* disable link interrupts for VFs */
8250 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
8251 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
8252 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
8255 if (pci_num_vf(pdev)) {
8256 dev_info(&pdev->dev,
8257 "Active VFs found, allocating resources.\n");
8258 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
8260 dev_info(&pdev->dev,
8261 "Error %d allocating resources for existing VFs\n",
8268 i40e_dbg_pf_init(pf);
8270 /* tell the firmware that we're starting */
8271 dv.major_version = DRV_VERSION_MAJOR;
8272 dv.minor_version = DRV_VERSION_MINOR;
8273 dv.build_version = DRV_VERSION_BUILD;
8274 dv.subbuild_version = 0;
8275 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
8277 /* since everything's happy, start the service_task timer */
8278 mod_timer(&pf->service_timer,
8279 round_jiffies(jiffies + pf->service_timer_period));
8281 /* Get the negotiated link width and speed from PCI config space */
8282 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
8284 i40e_set_pci_config_data(hw, link_status);
8286 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
8287 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
8288 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
8289 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
8291 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
8292 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
8293 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
8294 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
8297 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
8298 hw->bus.speed < i40e_bus_speed_8000) {
8299 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
8300 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
8303 /* print a string summarizing features */
8304 i40e_print_features(pf);
8308 /* Unwind what we've done if something failed in the setup */
8310 set_bit(__I40E_DOWN, &pf->state);
8311 i40e_clear_interrupt_scheme(pf);
8314 i40e_reset_interrupt_capability(pf);
8315 del_timer_sync(&pf->service_timer);
8316 #ifdef CONFIG_I40E_DCB
8318 #endif /* CONFIG_I40E_DCB */
8320 err_configure_lan_hmc:
8321 (void)i40e_shutdown_lan_hmc(hw);
8324 kfree(pf->irq_pile);
8327 (void)i40e_shutdown_adminq(hw);
8329 iounmap(hw->hw_addr);
8333 pci_disable_pcie_error_reporting(pdev);
8334 pci_release_selected_regions(pdev,
8335 pci_select_bars(pdev, IORESOURCE_MEM));
8338 pci_disable_device(pdev);
8343 * i40e_remove - Device removal routine
8344 * @pdev: PCI device information struct
8346 * i40e_remove is called by the PCI subsystem to alert the driver
8347 * that is should release a PCI device. This could be caused by a
8348 * Hot-Plug event, or because the driver is going to be removed from
8351 static void i40e_remove(struct pci_dev *pdev)
8353 struct i40e_pf *pf = pci_get_drvdata(pdev);
8354 i40e_status ret_code;
8358 i40e_dbg_pf_exit(pf);
8362 /* no more scheduling of any task */
8363 set_bit(__I40E_DOWN, &pf->state);
8364 del_timer_sync(&pf->service_timer);
8365 cancel_work_sync(&pf->service_task);
8367 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
8369 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
8372 i40e_fdir_teardown(pf);
8374 /* If there is a switch structure or any orphans, remove them.
8375 * This will leave only the PF's VSI remaining.
8377 for (i = 0; i < I40E_MAX_VEB; i++) {
8381 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
8382 pf->veb[i]->uplink_seid == 0)
8383 i40e_switch_branch_release(pf->veb[i]);
8386 /* Now we can shutdown the PF's VSI, just before we kill
8389 if (pf->vsi[pf->lan_vsi])
8390 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
8392 i40e_stop_misc_vector(pf);
8393 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8394 synchronize_irq(pf->msix_entries[0].vector);
8395 free_irq(pf->msix_entries[0].vector, pf);
8398 /* shutdown and destroy the HMC */
8399 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
8401 dev_warn(&pdev->dev,
8402 "Failed to destroy the HMC resources: %d\n", ret_code);
8404 /* shutdown the adminq */
8405 ret_code = i40e_shutdown_adminq(&pf->hw);
8407 dev_warn(&pdev->dev,
8408 "Failed to destroy the Admin Queue resources: %d\n",
8411 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
8412 i40e_clear_interrupt_scheme(pf);
8413 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
8415 i40e_vsi_clear_rings(pf->vsi[i]);
8416 i40e_vsi_clear(pf->vsi[i]);
8421 for (i = 0; i < I40E_MAX_VEB; i++) {
8427 kfree(pf->irq_pile);
8428 kfree(pf->sw_config);
8431 /* force a PF reset to clean anything leftover */
8432 reg = rd32(&pf->hw, I40E_PFGEN_CTRL);
8433 wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
8434 i40e_flush(&pf->hw);
8436 iounmap(pf->hw.hw_addr);
8438 pci_release_selected_regions(pdev,
8439 pci_select_bars(pdev, IORESOURCE_MEM));
8441 pci_disable_pcie_error_reporting(pdev);
8442 pci_disable_device(pdev);
8446 * i40e_pci_error_detected - warning that something funky happened in PCI land
8447 * @pdev: PCI device information struct
8449 * Called to warn that something happened and the error handling steps
8450 * are in progress. Allows the driver to quiesce things, be ready for
8453 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
8454 enum pci_channel_state error)
8456 struct i40e_pf *pf = pci_get_drvdata(pdev);
8458 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
8460 /* shutdown all operations */
8461 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
8463 i40e_prep_for_reset(pf);
8467 /* Request a slot reset */
8468 return PCI_ERS_RESULT_NEED_RESET;
8472 * i40e_pci_error_slot_reset - a PCI slot reset just happened
8473 * @pdev: PCI device information struct
8475 * Called to find if the driver can work with the device now that
8476 * the pci slot has been reset. If a basic connection seems good
8477 * (registers are readable and have sane content) then return a
8478 * happy little PCI_ERS_RESULT_xxx.
8480 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
8482 struct i40e_pf *pf = pci_get_drvdata(pdev);
8483 pci_ers_result_t result;
8487 dev_info(&pdev->dev, "%s\n", __func__);
8488 if (pci_enable_device_mem(pdev)) {
8489 dev_info(&pdev->dev,
8490 "Cannot re-enable PCI device after reset.\n");
8491 result = PCI_ERS_RESULT_DISCONNECT;
8493 pci_set_master(pdev);
8494 pci_restore_state(pdev);
8495 pci_save_state(pdev);
8496 pci_wake_from_d3(pdev, false);
8498 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8500 result = PCI_ERS_RESULT_RECOVERED;
8502 result = PCI_ERS_RESULT_DISCONNECT;
8505 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8507 dev_info(&pdev->dev,
8508 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
8510 /* non-fatal, continue */
8517 * i40e_pci_error_resume - restart operations after PCI error recovery
8518 * @pdev: PCI device information struct
8520 * Called to allow the driver to bring things back up after PCI error
8521 * and/or reset recovery has finished.
8523 static void i40e_pci_error_resume(struct pci_dev *pdev)
8525 struct i40e_pf *pf = pci_get_drvdata(pdev);
8527 dev_info(&pdev->dev, "%s\n", __func__);
8528 if (test_bit(__I40E_SUSPENDED, &pf->state))
8532 i40e_handle_reset_warning(pf);
8537 * i40e_shutdown - PCI callback for shutting down
8538 * @pdev: PCI device information struct
8540 static void i40e_shutdown(struct pci_dev *pdev)
8542 struct i40e_pf *pf = pci_get_drvdata(pdev);
8543 struct i40e_hw *hw = &pf->hw;
8545 set_bit(__I40E_SUSPENDED, &pf->state);
8546 set_bit(__I40E_DOWN, &pf->state);
8548 i40e_prep_for_reset(pf);
8551 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8552 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8554 if (system_state == SYSTEM_POWER_OFF) {
8555 pci_wake_from_d3(pdev, pf->wol_en);
8556 pci_set_power_state(pdev, PCI_D3hot);
8562 * i40e_suspend - PCI callback for moving to D3
8563 * @pdev: PCI device information struct
8565 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
8567 struct i40e_pf *pf = pci_get_drvdata(pdev);
8568 struct i40e_hw *hw = &pf->hw;
8570 set_bit(__I40E_SUSPENDED, &pf->state);
8571 set_bit(__I40E_DOWN, &pf->state);
8573 i40e_prep_for_reset(pf);
8576 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8577 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8579 pci_wake_from_d3(pdev, pf->wol_en);
8580 pci_set_power_state(pdev, PCI_D3hot);
8586 * i40e_resume - PCI callback for waking up from D3
8587 * @pdev: PCI device information struct
8589 static int i40e_resume(struct pci_dev *pdev)
8591 struct i40e_pf *pf = pci_get_drvdata(pdev);
8594 pci_set_power_state(pdev, PCI_D0);
8595 pci_restore_state(pdev);
8596 /* pci_restore_state() clears dev->state_saves, so
8597 * call pci_save_state() again to restore it.
8599 pci_save_state(pdev);
8601 err = pci_enable_device_mem(pdev);
8604 "%s: Cannot enable PCI device from suspend\n",
8608 pci_set_master(pdev);
8610 /* no wakeup events while running */
8611 pci_wake_from_d3(pdev, false);
8613 /* handling the reset will rebuild the device state */
8614 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
8615 clear_bit(__I40E_DOWN, &pf->state);
8617 i40e_reset_and_rebuild(pf, false);
8625 static const struct pci_error_handlers i40e_err_handler = {
8626 .error_detected = i40e_pci_error_detected,
8627 .slot_reset = i40e_pci_error_slot_reset,
8628 .resume = i40e_pci_error_resume,
8631 static struct pci_driver i40e_driver = {
8632 .name = i40e_driver_name,
8633 .id_table = i40e_pci_tbl,
8634 .probe = i40e_probe,
8635 .remove = i40e_remove,
8637 .suspend = i40e_suspend,
8638 .resume = i40e_resume,
8640 .shutdown = i40e_shutdown,
8641 .err_handler = &i40e_err_handler,
8642 .sriov_configure = i40e_pci_sriov_configure,
8646 * i40e_init_module - Driver registration routine
8648 * i40e_init_module is the first routine called when the driver is
8649 * loaded. All it does is register with the PCI subsystem.
8651 static int __init i40e_init_module(void)
8653 pr_info("%s: %s - version %s\n", i40e_driver_name,
8654 i40e_driver_string, i40e_driver_version_str);
8655 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
8657 return pci_register_driver(&i40e_driver);
8659 module_init(i40e_init_module);
8662 * i40e_exit_module - Driver exit cleanup routine
8664 * i40e_exit_module is called just before the driver is removed
8667 static void __exit i40e_exit_module(void)
8669 pci_unregister_driver(&i40e_driver);
8672 module_exit(i40e_exit_module);