1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
36 const char i40e_driver_name[] = "i40e";
37 static const char i40e_driver_string[] =
38 "Intel(R) Ethernet Connection XL710 Network Driver";
42 #define DRV_VERSION_MAJOR 1
43 #define DRV_VERSION_MINOR 6
44 #define DRV_VERSION_BUILD 16
45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
46 __stringify(DRV_VERSION_MINOR) "." \
47 __stringify(DRV_VERSION_BUILD) DRV_KERN
48 const char i40e_driver_version_str[] = DRV_VERSION;
49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
51 /* a bit of forward declarations */
52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
53 static void i40e_handle_reset_warning(struct i40e_pf *pf);
54 static int i40e_add_vsi(struct i40e_vsi *vsi);
55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
57 static int i40e_setup_misc_vector(struct i40e_pf *pf);
58 static void i40e_determine_queue_usage(struct i40e_pf *pf);
59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
63 /* i40e_pci_tbl - PCI Device ID Table
65 * Last entry must be all 0s
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
89 /* required last entry */
92 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
94 #define I40E_MAX_VF_COUNT 128
95 static int debug = -1;
96 module_param(debug, int, 0);
97 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
99 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
100 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
101 MODULE_LICENSE("GPL");
102 MODULE_VERSION(DRV_VERSION);
104 static struct workqueue_struct *i40e_wq;
107 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
108 * @hw: pointer to the HW structure
109 * @mem: ptr to mem struct to fill out
110 * @size: size of memory requested
111 * @alignment: what to align the allocation to
113 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
114 u64 size, u32 alignment)
116 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
118 mem->size = ALIGN(size, alignment);
119 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
120 &mem->pa, GFP_KERNEL);
128 * i40e_free_dma_mem_d - OS specific memory free for shared code
129 * @hw: pointer to the HW structure
130 * @mem: ptr to mem struct to free
132 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
134 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
136 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
145 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
146 * @hw: pointer to the HW structure
147 * @mem: ptr to mem struct to fill out
148 * @size: size of memory requested
150 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
154 mem->va = kzalloc(size, GFP_KERNEL);
163 * i40e_free_virt_mem_d - OS specific memory free for shared code
164 * @hw: pointer to the HW structure
165 * @mem: ptr to mem struct to free
167 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
169 /* it's ok to kfree a NULL pointer */
178 * i40e_get_lump - find a lump of free generic resource
179 * @pf: board private structure
180 * @pile: the pile of resource to search
181 * @needed: the number of items needed
182 * @id: an owner id to stick on the items assigned
184 * Returns the base item index of the lump, or negative for error
186 * The search_hint trick and lack of advanced fit-finding only work
187 * because we're highly likely to have all the same size lump requests.
188 * Linear search time and any fragmentation should be minimal.
190 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
196 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
197 dev_info(&pf->pdev->dev,
198 "param err: pile=%p needed=%d id=0x%04x\n",
203 /* start the linear search with an imperfect hint */
204 i = pile->search_hint;
205 while (i < pile->num_entries) {
206 /* skip already allocated entries */
207 if (pile->list[i] & I40E_PILE_VALID_BIT) {
212 /* do we have enough in this lump? */
213 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
214 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
219 /* there was enough, so assign it to the requestor */
220 for (j = 0; j < needed; j++)
221 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
223 pile->search_hint = i + j;
227 /* not enough, so skip over it and continue looking */
235 * i40e_put_lump - return a lump of generic resource
236 * @pile: the pile of resource to search
237 * @index: the base item index
238 * @id: the owner id of the items assigned
240 * Returns the count of items in the lump
242 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
244 int valid_id = (id | I40E_PILE_VALID_BIT);
248 if (!pile || index >= pile->num_entries)
252 i < pile->num_entries && pile->list[i] == valid_id;
258 if (count && index < pile->search_hint)
259 pile->search_hint = index;
265 * i40e_find_vsi_from_id - searches for the vsi with the given id
266 * @pf - the pf structure to search for the vsi
267 * @id - id of the vsi it is searching for
269 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
273 for (i = 0; i < pf->num_alloc_vsi; i++)
274 if (pf->vsi[i] && (pf->vsi[i]->id == id))
281 * i40e_service_event_schedule - Schedule the service task to wake up
282 * @pf: board private structure
284 * If not already scheduled, this puts the task into the work queue
286 void i40e_service_event_schedule(struct i40e_pf *pf)
288 if (!test_bit(__I40E_DOWN, &pf->state) &&
289 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
290 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
291 queue_work(i40e_wq, &pf->service_task);
295 * i40e_tx_timeout - Respond to a Tx Hang
296 * @netdev: network interface device structure
298 * If any port has noticed a Tx timeout, it is likely that the whole
299 * device is munged, not just the one netdev port, so go for the full
303 void i40e_tx_timeout(struct net_device *netdev)
305 static void i40e_tx_timeout(struct net_device *netdev)
308 struct i40e_netdev_priv *np = netdev_priv(netdev);
309 struct i40e_vsi *vsi = np->vsi;
310 struct i40e_pf *pf = vsi->back;
311 struct i40e_ring *tx_ring = NULL;
312 unsigned int i, hung_queue = 0;
315 pf->tx_timeout_count++;
317 /* find the stopped queue the same way the stack does */
318 for (i = 0; i < netdev->num_tx_queues; i++) {
319 struct netdev_queue *q;
320 unsigned long trans_start;
322 q = netdev_get_tx_queue(netdev, i);
323 trans_start = q->trans_start;
324 if (netif_xmit_stopped(q) &&
326 (trans_start + netdev->watchdog_timeo))) {
332 if (i == netdev->num_tx_queues) {
333 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
335 /* now that we have an index, find the tx_ring struct */
336 for (i = 0; i < vsi->num_queue_pairs; i++) {
337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
339 vsi->tx_rings[i]->queue_index) {
340 tx_ring = vsi->tx_rings[i];
347 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
348 pf->tx_timeout_recovery_level = 1; /* reset after some time */
349 else if (time_before(jiffies,
350 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
351 return; /* don't do any new action before the next timeout */
354 head = i40e_get_head(tx_ring);
355 /* Read interrupt register */
356 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
358 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
359 tx_ring->vsi->base_vector - 1));
361 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
363 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
364 vsi->seid, hung_queue, tx_ring->next_to_clean,
365 head, tx_ring->next_to_use,
366 readl(tx_ring->tail), val);
369 pf->tx_timeout_last_recovery = jiffies;
370 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
371 pf->tx_timeout_recovery_level, hung_queue);
373 switch (pf->tx_timeout_recovery_level) {
375 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
378 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
381 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
384 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
388 i40e_service_event_schedule(pf);
389 pf->tx_timeout_recovery_level++;
393 * i40e_get_vsi_stats_struct - Get System Network Statistics
394 * @vsi: the VSI we care about
396 * Returns the address of the device statistics structure.
397 * The statistics are actually updated from the service task.
399 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
401 return &vsi->net_stats;
405 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
406 * @netdev: network interface device structure
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
412 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
413 struct net_device *netdev,
414 struct rtnl_link_stats64 *stats)
416 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
417 struct net_device *netdev,
418 struct rtnl_link_stats64 *stats)
421 struct i40e_netdev_priv *np = netdev_priv(netdev);
422 struct i40e_ring *tx_ring, *rx_ring;
423 struct i40e_vsi *vsi = np->vsi;
424 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
427 if (test_bit(__I40E_DOWN, &vsi->state))
434 for (i = 0; i < vsi->num_queue_pairs; i++) {
438 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
443 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
444 packets = tx_ring->stats.packets;
445 bytes = tx_ring->stats.bytes;
446 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
448 stats->tx_packets += packets;
449 stats->tx_bytes += bytes;
450 rx_ring = &tx_ring[1];
453 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
454 packets = rx_ring->stats.packets;
455 bytes = rx_ring->stats.bytes;
456 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
458 stats->rx_packets += packets;
459 stats->rx_bytes += bytes;
463 /* following stats updated by i40e_watchdog_subtask() */
464 stats->multicast = vsi_stats->multicast;
465 stats->tx_errors = vsi_stats->tx_errors;
466 stats->tx_dropped = vsi_stats->tx_dropped;
467 stats->rx_errors = vsi_stats->rx_errors;
468 stats->rx_dropped = vsi_stats->rx_dropped;
469 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
470 stats->rx_length_errors = vsi_stats->rx_length_errors;
476 * i40e_vsi_reset_stats - Resets all stats of the given vsi
477 * @vsi: the VSI to have its stats reset
479 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
481 struct rtnl_link_stats64 *ns;
487 ns = i40e_get_vsi_stats_struct(vsi);
488 memset(ns, 0, sizeof(*ns));
489 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
490 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
491 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
492 if (vsi->rx_rings && vsi->rx_rings[0]) {
493 for (i = 0; i < vsi->num_queue_pairs; i++) {
494 memset(&vsi->rx_rings[i]->stats, 0,
495 sizeof(vsi->rx_rings[i]->stats));
496 memset(&vsi->rx_rings[i]->rx_stats, 0,
497 sizeof(vsi->rx_rings[i]->rx_stats));
498 memset(&vsi->tx_rings[i]->stats, 0,
499 sizeof(vsi->tx_rings[i]->stats));
500 memset(&vsi->tx_rings[i]->tx_stats, 0,
501 sizeof(vsi->tx_rings[i]->tx_stats));
504 vsi->stat_offsets_loaded = false;
508 * i40e_pf_reset_stats - Reset all of the stats for the given PF
509 * @pf: the PF to be reset
511 void i40e_pf_reset_stats(struct i40e_pf *pf)
515 memset(&pf->stats, 0, sizeof(pf->stats));
516 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
517 pf->stat_offsets_loaded = false;
519 for (i = 0; i < I40E_MAX_VEB; i++) {
521 memset(&pf->veb[i]->stats, 0,
522 sizeof(pf->veb[i]->stats));
523 memset(&pf->veb[i]->stats_offsets, 0,
524 sizeof(pf->veb[i]->stats_offsets));
525 pf->veb[i]->stat_offsets_loaded = false;
528 pf->hw_csum_rx_error = 0;
532 * i40e_stat_update48 - read and update a 48 bit stat from the chip
533 * @hw: ptr to the hardware info
534 * @hireg: the high 32 bit reg to read
535 * @loreg: the low 32 bit reg to read
536 * @offset_loaded: has the initial offset been loaded yet
537 * @offset: ptr to current offset value
538 * @stat: ptr to the stat
540 * Since the device stats are not reset at PFReset, they likely will not
541 * be zeroed when the driver starts. We'll save the first values read
542 * and use them as offsets to be subtracted from the raw values in order
543 * to report stats that count from zero. In the process, we also manage
544 * the potential roll-over.
546 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
547 bool offset_loaded, u64 *offset, u64 *stat)
551 if (hw->device_id == I40E_DEV_ID_QEMU) {
552 new_data = rd32(hw, loreg);
553 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
555 new_data = rd64(hw, loreg);
559 if (likely(new_data >= *offset))
560 *stat = new_data - *offset;
562 *stat = (new_data + BIT_ULL(48)) - *offset;
563 *stat &= 0xFFFFFFFFFFFFULL;
567 * i40e_stat_update32 - read and update a 32 bit stat from the chip
568 * @hw: ptr to the hardware info
569 * @reg: the hw reg to read
570 * @offset_loaded: has the initial offset been loaded yet
571 * @offset: ptr to current offset value
572 * @stat: ptr to the stat
574 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
575 bool offset_loaded, u64 *offset, u64 *stat)
579 new_data = rd32(hw, reg);
582 if (likely(new_data >= *offset))
583 *stat = (u32)(new_data - *offset);
585 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
589 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
590 * @vsi: the VSI to be updated
592 void i40e_update_eth_stats(struct i40e_vsi *vsi)
594 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
595 struct i40e_pf *pf = vsi->back;
596 struct i40e_hw *hw = &pf->hw;
597 struct i40e_eth_stats *oes;
598 struct i40e_eth_stats *es; /* device's eth stats */
600 es = &vsi->eth_stats;
601 oes = &vsi->eth_stats_offsets;
603 /* Gather up the stats that the hw collects */
604 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
605 vsi->stat_offsets_loaded,
606 &oes->tx_errors, &es->tx_errors);
607 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
608 vsi->stat_offsets_loaded,
609 &oes->rx_discards, &es->rx_discards);
610 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
611 vsi->stat_offsets_loaded,
612 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
613 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
614 vsi->stat_offsets_loaded,
615 &oes->tx_errors, &es->tx_errors);
617 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
618 I40E_GLV_GORCL(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_bytes, &es->rx_bytes);
621 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
622 I40E_GLV_UPRCL(stat_idx),
623 vsi->stat_offsets_loaded,
624 &oes->rx_unicast, &es->rx_unicast);
625 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
626 I40E_GLV_MPRCL(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->rx_multicast, &es->rx_multicast);
629 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
630 I40E_GLV_BPRCL(stat_idx),
631 vsi->stat_offsets_loaded,
632 &oes->rx_broadcast, &es->rx_broadcast);
634 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
635 I40E_GLV_GOTCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->tx_bytes, &es->tx_bytes);
638 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
639 I40E_GLV_UPTCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->tx_unicast, &es->tx_unicast);
642 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
643 I40E_GLV_MPTCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->tx_multicast, &es->tx_multicast);
646 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
647 I40E_GLV_BPTCL(stat_idx),
648 vsi->stat_offsets_loaded,
649 &oes->tx_broadcast, &es->tx_broadcast);
650 vsi->stat_offsets_loaded = true;
654 * i40e_update_veb_stats - Update Switch component statistics
655 * @veb: the VEB being updated
657 static void i40e_update_veb_stats(struct i40e_veb *veb)
659 struct i40e_pf *pf = veb->pf;
660 struct i40e_hw *hw = &pf->hw;
661 struct i40e_eth_stats *oes;
662 struct i40e_eth_stats *es; /* device's eth stats */
663 struct i40e_veb_tc_stats *veb_oes;
664 struct i40e_veb_tc_stats *veb_es;
667 idx = veb->stats_idx;
669 oes = &veb->stats_offsets;
670 veb_es = &veb->tc_stats;
671 veb_oes = &veb->tc_stats_offsets;
673 /* Gather up the stats that the hw collects */
674 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
675 veb->stat_offsets_loaded,
676 &oes->tx_discards, &es->tx_discards);
677 if (hw->revision_id > 0)
678 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
679 veb->stat_offsets_loaded,
680 &oes->rx_unknown_protocol,
681 &es->rx_unknown_protocol);
682 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
683 veb->stat_offsets_loaded,
684 &oes->rx_bytes, &es->rx_bytes);
685 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
686 veb->stat_offsets_loaded,
687 &oes->rx_unicast, &es->rx_unicast);
688 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
689 veb->stat_offsets_loaded,
690 &oes->rx_multicast, &es->rx_multicast);
691 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
692 veb->stat_offsets_loaded,
693 &oes->rx_broadcast, &es->rx_broadcast);
695 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->tx_bytes, &es->tx_bytes);
698 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->tx_unicast, &es->tx_unicast);
701 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->tx_multicast, &es->tx_multicast);
704 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
705 veb->stat_offsets_loaded,
706 &oes->tx_broadcast, &es->tx_broadcast);
707 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
708 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
709 I40E_GLVEBTC_RPCL(i, idx),
710 veb->stat_offsets_loaded,
711 &veb_oes->tc_rx_packets[i],
712 &veb_es->tc_rx_packets[i]);
713 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
714 I40E_GLVEBTC_RBCL(i, idx),
715 veb->stat_offsets_loaded,
716 &veb_oes->tc_rx_bytes[i],
717 &veb_es->tc_rx_bytes[i]);
718 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
719 I40E_GLVEBTC_TPCL(i, idx),
720 veb->stat_offsets_loaded,
721 &veb_oes->tc_tx_packets[i],
722 &veb_es->tc_tx_packets[i]);
723 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
724 I40E_GLVEBTC_TBCL(i, idx),
725 veb->stat_offsets_loaded,
726 &veb_oes->tc_tx_bytes[i],
727 &veb_es->tc_tx_bytes[i]);
729 veb->stat_offsets_loaded = true;
734 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
735 * @vsi: the VSI that is capable of doing FCoE
737 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
739 struct i40e_pf *pf = vsi->back;
740 struct i40e_hw *hw = &pf->hw;
741 struct i40e_fcoe_stats *ofs;
742 struct i40e_fcoe_stats *fs; /* device's eth stats */
745 if (vsi->type != I40E_VSI_FCOE)
748 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
749 fs = &vsi->fcoe_stats;
750 ofs = &vsi->fcoe_stats_offsets;
752 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
753 vsi->fcoe_stat_offsets_loaded,
754 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
755 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
756 vsi->fcoe_stat_offsets_loaded,
757 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
758 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
759 vsi->fcoe_stat_offsets_loaded,
760 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
761 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
762 vsi->fcoe_stat_offsets_loaded,
763 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
764 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
765 vsi->fcoe_stat_offsets_loaded,
766 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
767 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
768 vsi->fcoe_stat_offsets_loaded,
769 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
770 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
771 vsi->fcoe_stat_offsets_loaded,
772 &ofs->fcoe_last_error, &fs->fcoe_last_error);
773 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
774 vsi->fcoe_stat_offsets_loaded,
775 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
777 vsi->fcoe_stat_offsets_loaded = true;
782 * i40e_update_vsi_stats - Update the vsi statistics counters.
783 * @vsi: the VSI to be updated
785 * There are a few instances where we store the same stat in a
786 * couple of different structs. This is partly because we have
787 * the netdev stats that need to be filled out, which is slightly
788 * different from the "eth_stats" defined by the chip and used in
789 * VF communications. We sort it out here.
791 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
793 struct i40e_pf *pf = vsi->back;
794 struct rtnl_link_stats64 *ons;
795 struct rtnl_link_stats64 *ns; /* netdev stats */
796 struct i40e_eth_stats *oes;
797 struct i40e_eth_stats *es; /* device's eth stats */
798 u32 tx_restart, tx_busy;
799 u64 tx_lost_interrupt;
810 if (test_bit(__I40E_DOWN, &vsi->state) ||
811 test_bit(__I40E_CONFIG_BUSY, &pf->state))
814 ns = i40e_get_vsi_stats_struct(vsi);
815 ons = &vsi->net_stats_offsets;
816 es = &vsi->eth_stats;
817 oes = &vsi->eth_stats_offsets;
819 /* Gather up the netdev and vsi stats that the driver collects
820 * on the fly during packet processing
824 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
825 tx_lost_interrupt = 0;
829 for (q = 0; q < vsi->num_queue_pairs; q++) {
831 p = ACCESS_ONCE(vsi->tx_rings[q]);
834 start = u64_stats_fetch_begin_irq(&p->syncp);
835 packets = p->stats.packets;
836 bytes = p->stats.bytes;
837 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
840 tx_restart += p->tx_stats.restart_queue;
841 tx_busy += p->tx_stats.tx_busy;
842 tx_linearize += p->tx_stats.tx_linearize;
843 tx_force_wb += p->tx_stats.tx_force_wb;
844 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
846 /* Rx queue is part of the same block as Tx queue */
849 start = u64_stats_fetch_begin_irq(&p->syncp);
850 packets = p->stats.packets;
851 bytes = p->stats.bytes;
852 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
855 rx_buf += p->rx_stats.alloc_buff_failed;
856 rx_page += p->rx_stats.alloc_page_failed;
859 vsi->tx_restart = tx_restart;
860 vsi->tx_busy = tx_busy;
861 vsi->tx_linearize = tx_linearize;
862 vsi->tx_force_wb = tx_force_wb;
863 vsi->tx_lost_interrupt = tx_lost_interrupt;
864 vsi->rx_page_failed = rx_page;
865 vsi->rx_buf_failed = rx_buf;
867 ns->rx_packets = rx_p;
869 ns->tx_packets = tx_p;
872 /* update netdev stats from eth stats */
873 i40e_update_eth_stats(vsi);
874 ons->tx_errors = oes->tx_errors;
875 ns->tx_errors = es->tx_errors;
876 ons->multicast = oes->rx_multicast;
877 ns->multicast = es->rx_multicast;
878 ons->rx_dropped = oes->rx_discards;
879 ns->rx_dropped = es->rx_discards;
880 ons->tx_dropped = oes->tx_discards;
881 ns->tx_dropped = es->tx_discards;
883 /* pull in a couple PF stats if this is the main vsi */
884 if (vsi == pf->vsi[pf->lan_vsi]) {
885 ns->rx_crc_errors = pf->stats.crc_errors;
886 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
887 ns->rx_length_errors = pf->stats.rx_length_errors;
892 * i40e_update_pf_stats - Update the PF statistics counters.
893 * @pf: the PF to be updated
895 static void i40e_update_pf_stats(struct i40e_pf *pf)
897 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
898 struct i40e_hw_port_stats *nsd = &pf->stats;
899 struct i40e_hw *hw = &pf->hw;
903 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
904 I40E_GLPRT_GORCL(hw->port),
905 pf->stat_offsets_loaded,
906 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
907 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
908 I40E_GLPRT_GOTCL(hw->port),
909 pf->stat_offsets_loaded,
910 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
911 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_discards,
914 &nsd->eth.rx_discards);
915 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
916 I40E_GLPRT_UPRCL(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->eth.rx_unicast,
919 &nsd->eth.rx_unicast);
920 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
921 I40E_GLPRT_MPRCL(hw->port),
922 pf->stat_offsets_loaded,
923 &osd->eth.rx_multicast,
924 &nsd->eth.rx_multicast);
925 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
926 I40E_GLPRT_BPRCL(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->eth.rx_broadcast,
929 &nsd->eth.rx_broadcast);
930 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
931 I40E_GLPRT_UPTCL(hw->port),
932 pf->stat_offsets_loaded,
933 &osd->eth.tx_unicast,
934 &nsd->eth.tx_unicast);
935 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
936 I40E_GLPRT_MPTCL(hw->port),
937 pf->stat_offsets_loaded,
938 &osd->eth.tx_multicast,
939 &nsd->eth.tx_multicast);
940 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
941 I40E_GLPRT_BPTCL(hw->port),
942 pf->stat_offsets_loaded,
943 &osd->eth.tx_broadcast,
944 &nsd->eth.tx_broadcast);
946 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
947 pf->stat_offsets_loaded,
948 &osd->tx_dropped_link_down,
949 &nsd->tx_dropped_link_down);
951 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
952 pf->stat_offsets_loaded,
953 &osd->crc_errors, &nsd->crc_errors);
955 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->illegal_bytes, &nsd->illegal_bytes);
959 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
960 pf->stat_offsets_loaded,
961 &osd->mac_local_faults,
962 &nsd->mac_local_faults);
963 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->mac_remote_faults,
966 &nsd->mac_remote_faults);
968 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
969 pf->stat_offsets_loaded,
970 &osd->rx_length_errors,
971 &nsd->rx_length_errors);
973 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->link_xon_rx, &nsd->link_xon_rx);
976 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->link_xon_tx, &nsd->link_xon_tx);
979 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->link_xoff_rx, &nsd->link_xoff_rx);
982 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->link_xoff_tx, &nsd->link_xoff_tx);
986 for (i = 0; i < 8; i++) {
987 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
988 pf->stat_offsets_loaded,
989 &osd->priority_xoff_rx[i],
990 &nsd->priority_xoff_rx[i]);
991 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
992 pf->stat_offsets_loaded,
993 &osd->priority_xon_rx[i],
994 &nsd->priority_xon_rx[i]);
995 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
996 pf->stat_offsets_loaded,
997 &osd->priority_xon_tx[i],
998 &nsd->priority_xon_tx[i]);
999 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1000 pf->stat_offsets_loaded,
1001 &osd->priority_xoff_tx[i],
1002 &nsd->priority_xoff_tx[i]);
1003 i40e_stat_update32(hw,
1004 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1005 pf->stat_offsets_loaded,
1006 &osd->priority_xon_2_xoff[i],
1007 &nsd->priority_xon_2_xoff[i]);
1010 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1011 I40E_GLPRT_PRC64L(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->rx_size_64, &nsd->rx_size_64);
1014 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1015 I40E_GLPRT_PRC127L(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->rx_size_127, &nsd->rx_size_127);
1018 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1019 I40E_GLPRT_PRC255L(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->rx_size_255, &nsd->rx_size_255);
1022 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1023 I40E_GLPRT_PRC511L(hw->port),
1024 pf->stat_offsets_loaded,
1025 &osd->rx_size_511, &nsd->rx_size_511);
1026 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1027 I40E_GLPRT_PRC1023L(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->rx_size_1023, &nsd->rx_size_1023);
1030 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1031 I40E_GLPRT_PRC1522L(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->rx_size_1522, &nsd->rx_size_1522);
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1035 I40E_GLPRT_PRC9522L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_big, &nsd->rx_size_big);
1039 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1040 I40E_GLPRT_PTC64L(hw->port),
1041 pf->stat_offsets_loaded,
1042 &osd->tx_size_64, &nsd->tx_size_64);
1043 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1044 I40E_GLPRT_PTC127L(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->tx_size_127, &nsd->tx_size_127);
1047 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1048 I40E_GLPRT_PTC255L(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->tx_size_255, &nsd->tx_size_255);
1051 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1052 I40E_GLPRT_PTC511L(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->tx_size_511, &nsd->tx_size_511);
1055 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1056 I40E_GLPRT_PTC1023L(hw->port),
1057 pf->stat_offsets_loaded,
1058 &osd->tx_size_1023, &nsd->tx_size_1023);
1059 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1060 I40E_GLPRT_PTC1522L(hw->port),
1061 pf->stat_offsets_loaded,
1062 &osd->tx_size_1522, &nsd->tx_size_1522);
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1064 I40E_GLPRT_PTC9522L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_big, &nsd->tx_size_big);
1068 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->rx_undersize, &nsd->rx_undersize);
1071 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->rx_fragments, &nsd->rx_fragments);
1074 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_oversize, &nsd->rx_oversize);
1077 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_jabber, &nsd->rx_jabber);
1082 i40e_stat_update32(hw,
1083 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1084 pf->stat_offsets_loaded,
1085 &osd->fd_atr_match, &nsd->fd_atr_match);
1086 i40e_stat_update32(hw,
1087 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1088 pf->stat_offsets_loaded,
1089 &osd->fd_sb_match, &nsd->fd_sb_match);
1090 i40e_stat_update32(hw,
1091 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1092 pf->stat_offsets_loaded,
1093 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1095 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1096 nsd->tx_lpi_status =
1097 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1098 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1099 nsd->rx_lpi_status =
1100 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1101 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1102 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1103 pf->stat_offsets_loaded,
1104 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1105 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1106 pf->stat_offsets_loaded,
1107 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1109 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1110 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1111 nsd->fd_sb_status = true;
1113 nsd->fd_sb_status = false;
1115 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1116 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1117 nsd->fd_atr_status = true;
1119 nsd->fd_atr_status = false;
1121 pf->stat_offsets_loaded = true;
1125 * i40e_update_stats - Update the various statistics counters.
1126 * @vsi: the VSI to be updated
1128 * Update the various stats for this VSI and its related entities.
1130 void i40e_update_stats(struct i40e_vsi *vsi)
1132 struct i40e_pf *pf = vsi->back;
1134 if (vsi == pf->vsi[pf->lan_vsi])
1135 i40e_update_pf_stats(pf);
1137 i40e_update_vsi_stats(vsi);
1139 i40e_update_fcoe_stats(vsi);
1144 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1145 * @vsi: the VSI to be searched
1146 * @macaddr: the MAC address
1148 * @is_vf: make sure its a VF filter, else doesn't matter
1149 * @is_netdev: make sure its a netdev filter, else doesn't matter
1151 * Returns ptr to the filter object or NULL
1153 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1154 u8 *macaddr, s16 vlan,
1155 bool is_vf, bool is_netdev)
1157 struct i40e_mac_filter *f;
1159 if (!vsi || !macaddr)
1162 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1163 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1164 (vlan == f->vlan) &&
1165 (!is_vf || f->is_vf) &&
1166 (!is_netdev || f->is_netdev))
1173 * i40e_find_mac - Find a mac addr in the macvlan filters list
1174 * @vsi: the VSI to be searched
1175 * @macaddr: the MAC address we are searching for
1176 * @is_vf: make sure its a VF filter, else doesn't matter
1177 * @is_netdev: make sure its a netdev filter, else doesn't matter
1179 * Returns the first filter with the provided MAC address or NULL if
1180 * MAC address was not found
1182 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1183 bool is_vf, bool is_netdev)
1185 struct i40e_mac_filter *f;
1187 if (!vsi || !macaddr)
1190 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1191 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1192 (!is_vf || f->is_vf) &&
1193 (!is_netdev || f->is_netdev))
1200 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1201 * @vsi: the VSI to be searched
1203 * Returns true if VSI is in vlan mode or false otherwise
1205 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1207 struct i40e_mac_filter *f;
1209 /* Only -1 for all the filters denotes not in vlan mode
1210 * so we have to go through all the list in order to make sure
1212 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1213 if (f->vlan >= 0 || vsi->info.pvid)
1221 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1222 * @vsi: the VSI to be searched
1223 * @macaddr: the mac address to be filtered
1224 * @is_vf: true if it is a VF
1225 * @is_netdev: true if it is a netdev
1227 * Goes through all the macvlan filters and adds a
1228 * macvlan filter for each unique vlan that already exists
1230 * Returns first filter found on success, else NULL
1232 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1233 bool is_vf, bool is_netdev)
1235 struct i40e_mac_filter *f;
1237 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1239 f->vlan = le16_to_cpu(vsi->info.pvid);
1240 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1241 is_vf, is_netdev)) {
1242 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1248 return list_first_entry_or_null(&vsi->mac_filter_list,
1249 struct i40e_mac_filter, list);
1253 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1254 * @vsi: the VSI to be searched
1255 * @macaddr: the mac address to be removed
1256 * @is_vf: true if it is a VF
1257 * @is_netdev: true if it is a netdev
1259 * Removes a given MAC address from a VSI, regardless of VLAN
1261 * Returns 0 for success, or error
1263 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1264 bool is_vf, bool is_netdev)
1266 struct i40e_mac_filter *f = NULL;
1269 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1270 "Missing mac_filter_list_lock\n");
1271 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1272 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1273 (is_vf == f->is_vf) &&
1274 (is_netdev == f->is_netdev)) {
1277 if (f->counter == 0)
1278 f->state = I40E_FILTER_REMOVE;
1282 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1283 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1290 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1291 * @vsi: the PF Main VSI - inappropriate for any other VSI
1292 * @macaddr: the MAC address
1294 * Remove whatever filter the firmware set up so the driver can manage
1295 * its own filtering intelligently.
1297 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1299 struct i40e_aqc_remove_macvlan_element_data element;
1300 struct i40e_pf *pf = vsi->back;
1302 /* Only appropriate for the PF main VSI */
1303 if (vsi->type != I40E_VSI_MAIN)
1306 memset(&element, 0, sizeof(element));
1307 ether_addr_copy(element.mac_addr, macaddr);
1308 element.vlan_tag = 0;
1309 /* Ignore error returns, some firmware does it this way... */
1310 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1311 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1313 memset(&element, 0, sizeof(element));
1314 ether_addr_copy(element.mac_addr, macaddr);
1315 element.vlan_tag = 0;
1316 /* ...and some firmware does it this way. */
1317 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1318 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1319 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1323 * i40e_add_filter - Add a mac/vlan filter to the VSI
1324 * @vsi: the VSI to be searched
1325 * @macaddr: the MAC address
1327 * @is_vf: make sure its a VF filter, else doesn't matter
1328 * @is_netdev: make sure its a netdev filter, else doesn't matter
1330 * Returns ptr to the filter object or NULL when no memory available.
1332 * NOTE: This function is expected to be called with mac_filter_list_lock
1335 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1336 u8 *macaddr, s16 vlan,
1337 bool is_vf, bool is_netdev)
1339 struct i40e_mac_filter *f;
1340 int changed = false;
1342 if (!vsi || !macaddr)
1345 /* Do not allow broadcast filter to be added since broadcast filter
1346 * is added as part of add VSI for any newly created VSI except
1349 if (is_broadcast_ether_addr(macaddr))
1352 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1354 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1356 goto add_filter_out;
1358 ether_addr_copy(f->macaddr, macaddr);
1360 /* If we're in overflow promisc mode, set the state directly
1361 * to failed, so we don't bother to try sending the filter
1364 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))
1365 f->state = I40E_FILTER_FAILED;
1367 f->state = I40E_FILTER_NEW;
1369 INIT_LIST_HEAD(&f->list);
1370 list_add_tail(&f->list, &vsi->mac_filter_list);
1373 /* increment counter and add a new flag if needed */
1379 } else if (is_netdev) {
1380 if (!f->is_netdev) {
1381 f->is_netdev = true;
1389 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1390 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1398 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1399 * @vsi: the VSI to be searched
1400 * @macaddr: the MAC address
1402 * @is_vf: make sure it's a VF filter, else doesn't matter
1403 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1405 * NOTE: This function is expected to be called with mac_filter_list_lock
1407 * ANOTHER NOTE: This function MUST be called from within the context of
1408 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1409 * instead of list_for_each_entry().
1411 void i40e_del_filter(struct i40e_vsi *vsi,
1412 u8 *macaddr, s16 vlan,
1413 bool is_vf, bool is_netdev)
1415 struct i40e_mac_filter *f;
1417 if (!vsi || !macaddr)
1420 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1421 if (!f || f->counter == 0)
1429 } else if (is_netdev) {
1431 f->is_netdev = false;
1435 /* make sure we don't remove a filter in use by VF or netdev */
1438 min_f += (f->is_vf ? 1 : 0);
1439 min_f += (f->is_netdev ? 1 : 0);
1441 if (f->counter > min_f)
1445 /* counter == 0 tells sync_filters_subtask to
1446 * remove the filter from the firmware's list
1448 if (f->counter == 0) {
1449 if ((f->state == I40E_FILTER_FAILED) ||
1450 (f->state == I40E_FILTER_NEW)) {
1451 /* this one never got added by the FW. Just remove it,
1452 * no need to sync anything.
1457 f->state = I40E_FILTER_REMOVE;
1458 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1459 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1465 * i40e_set_mac - NDO callback to set mac address
1466 * @netdev: network interface device structure
1467 * @p: pointer to an address structure
1469 * Returns 0 on success, negative on failure
1472 int i40e_set_mac(struct net_device *netdev, void *p)
1474 static int i40e_set_mac(struct net_device *netdev, void *p)
1477 struct i40e_netdev_priv *np = netdev_priv(netdev);
1478 struct i40e_vsi *vsi = np->vsi;
1479 struct i40e_pf *pf = vsi->back;
1480 struct i40e_hw *hw = &pf->hw;
1481 struct sockaddr *addr = p;
1483 if (!is_valid_ether_addr(addr->sa_data))
1484 return -EADDRNOTAVAIL;
1486 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1487 netdev_info(netdev, "already using mac address %pM\n",
1492 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1493 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1494 return -EADDRNOTAVAIL;
1496 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1497 netdev_info(netdev, "returning to hw mac address %pM\n",
1500 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1502 spin_lock_bh(&vsi->mac_filter_list_lock);
1503 i40e_del_mac_all_vlan(vsi, netdev->dev_addr, false, true);
1504 i40e_put_mac_in_vlan(vsi, addr->sa_data, false, true);
1505 spin_unlock_bh(&vsi->mac_filter_list_lock);
1506 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1507 if (vsi->type == I40E_VSI_MAIN) {
1510 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1511 I40E_AQC_WRITE_TYPE_LAA_WOL,
1512 addr->sa_data, NULL);
1514 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1515 i40e_stat_str(hw, ret),
1516 i40e_aq_str(hw, hw->aq.asq_last_status));
1519 /* schedule our worker thread which will take care of
1520 * applying the new filter changes
1522 i40e_service_event_schedule(vsi->back);
1527 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1528 * @vsi: the VSI being setup
1529 * @ctxt: VSI context structure
1530 * @enabled_tc: Enabled TCs bitmap
1531 * @is_add: True if called before Add VSI
1533 * Setup VSI queue mapping for enabled traffic classes.
1536 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1537 struct i40e_vsi_context *ctxt,
1541 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1542 struct i40e_vsi_context *ctxt,
1547 struct i40e_pf *pf = vsi->back;
1557 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1560 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1561 /* Find numtc from enabled TC bitmap */
1562 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1563 if (enabled_tc & BIT(i)) /* TC is enabled */
1567 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1571 /* At least TC0 is enabled in case of non-DCB case */
1575 vsi->tc_config.numtc = numtc;
1576 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1577 /* Number of queues per enabled TC */
1578 qcount = vsi->alloc_queue_pairs;
1580 num_tc_qps = qcount / numtc;
1581 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1583 /* Setup queue offset/count for all TCs for given VSI */
1584 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1585 /* See if the given TC is enabled for the given VSI */
1586 if (vsi->tc_config.enabled_tc & BIT(i)) {
1590 switch (vsi->type) {
1592 qcount = min_t(int, pf->alloc_rss_size,
1597 qcount = num_tc_qps;
1601 case I40E_VSI_SRIOV:
1602 case I40E_VSI_VMDQ2:
1604 qcount = num_tc_qps;
1608 vsi->tc_config.tc_info[i].qoffset = offset;
1609 vsi->tc_config.tc_info[i].qcount = qcount;
1611 /* find the next higher power-of-2 of num queue pairs */
1614 while (num_qps && (BIT_ULL(pow) < qcount)) {
1619 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1621 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1622 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1626 /* TC is not enabled so set the offset to
1627 * default queue and allocate one queue
1630 vsi->tc_config.tc_info[i].qoffset = 0;
1631 vsi->tc_config.tc_info[i].qcount = 1;
1632 vsi->tc_config.tc_info[i].netdev_tc = 0;
1636 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1639 /* Set actual Tx/Rx queue pairs */
1640 vsi->num_queue_pairs = offset;
1641 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1642 if (vsi->req_queue_pairs > 0)
1643 vsi->num_queue_pairs = vsi->req_queue_pairs;
1644 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1645 vsi->num_queue_pairs = pf->num_lan_msix;
1648 /* Scheduler section valid can only be set for ADD VSI */
1650 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1652 ctxt->info.up_enable_bits = enabled_tc;
1654 if (vsi->type == I40E_VSI_SRIOV) {
1655 ctxt->info.mapping_flags |=
1656 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1657 for (i = 0; i < vsi->num_queue_pairs; i++)
1658 ctxt->info.queue_mapping[i] =
1659 cpu_to_le16(vsi->base_queue + i);
1661 ctxt->info.mapping_flags |=
1662 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1663 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1665 ctxt->info.valid_sections |= cpu_to_le16(sections);
1669 * i40e_set_rx_mode - NDO callback to set the netdev filters
1670 * @netdev: network interface device structure
1673 void i40e_set_rx_mode(struct net_device *netdev)
1675 static void i40e_set_rx_mode(struct net_device *netdev)
1678 struct i40e_netdev_priv *np = netdev_priv(netdev);
1679 struct i40e_mac_filter *f, *ftmp;
1680 struct i40e_vsi *vsi = np->vsi;
1681 struct netdev_hw_addr *uca;
1682 struct netdev_hw_addr *mca;
1683 struct netdev_hw_addr *ha;
1685 spin_lock_bh(&vsi->mac_filter_list_lock);
1687 /* add addr if not already in the filter list */
1688 netdev_for_each_uc_addr(uca, netdev) {
1689 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1690 if (i40e_is_vsi_in_vlan(vsi))
1691 i40e_put_mac_in_vlan(vsi, uca->addr,
1694 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1699 netdev_for_each_mc_addr(mca, netdev) {
1700 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1701 if (i40e_is_vsi_in_vlan(vsi))
1702 i40e_put_mac_in_vlan(vsi, mca->addr,
1705 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1710 /* remove filter if not in netdev list */
1711 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1716 netdev_for_each_mc_addr(mca, netdev)
1717 if (ether_addr_equal(mca->addr, f->macaddr))
1718 goto bottom_of_search_loop;
1720 netdev_for_each_uc_addr(uca, netdev)
1721 if (ether_addr_equal(uca->addr, f->macaddr))
1722 goto bottom_of_search_loop;
1724 for_each_dev_addr(netdev, ha)
1725 if (ether_addr_equal(ha->addr, f->macaddr))
1726 goto bottom_of_search_loop;
1728 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1729 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1731 bottom_of_search_loop:
1734 spin_unlock_bh(&vsi->mac_filter_list_lock);
1736 /* check for other flag changes */
1737 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1738 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1739 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1742 /* schedule our worker thread which will take care of
1743 * applying the new filter changes
1745 i40e_service_event_schedule(vsi->back);
1749 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1750 * @vsi: pointer to vsi struct
1751 * @from: Pointer to list which contains MAC filter entries - changes to
1752 * those entries needs to be undone.
1754 * MAC filter entries from list were slated to be removed from device.
1756 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1757 struct list_head *from)
1759 struct i40e_mac_filter *f, *ftmp;
1761 list_for_each_entry_safe(f, ftmp, from, list) {
1762 /* Move the element back into MAC filter list*/
1763 list_move_tail(&f->list, &vsi->mac_filter_list);
1768 * i40e_update_filter_state - Update filter state based on return data
1770 * @count: Number of filters added
1771 * @add_list: return data from fw
1772 * @head: pointer to first filter in current batch
1773 * @aq_err: status from fw
1775 * MAC filter entries from list were slated to be added to device. Returns
1776 * number of successful filters. Note that 0 does NOT mean success!
1779 i40e_update_filter_state(int count,
1780 struct i40e_aqc_add_macvlan_element_data *add_list,
1781 struct i40e_mac_filter *add_head, int aq_err)
1789 /* Everything's good, mark all filters active. */
1790 for (i = 0; i < count ; i++) {
1791 add_head->state = I40E_FILTER_ACTIVE;
1792 add_head = list_next_entry(add_head, list);
1794 } else if (aq_err == I40E_AQ_RC_ENOSPC) {
1795 /* Device ran out of filter space. Check the return value
1796 * for each filter to see which ones are active.
1798 for (i = 0; i < count ; i++) {
1799 if (add_list[i].match_method ==
1800 I40E_AQC_MM_ERR_NO_RES) {
1801 add_head->state = I40E_FILTER_FAILED;
1803 add_head->state = I40E_FILTER_ACTIVE;
1806 add_head = list_next_entry(add_head, list);
1809 /* Some other horrible thing happened, fail all filters */
1811 for (i = 0; i < count ; i++) {
1812 add_head->state = I40E_FILTER_FAILED;
1813 add_head = list_next_entry(add_head, list);
1820 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1821 * @vsi: ptr to the VSI
1823 * Push any outstanding VSI filter changes through the AdminQ.
1825 * Returns 0 or error value
1827 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1829 struct i40e_mac_filter *f, *ftmp, *add_head = NULL;
1830 struct list_head tmp_add_list, tmp_del_list;
1831 struct i40e_hw *hw = &vsi->back->hw;
1832 bool promisc_changed = false;
1833 char vsi_name[16] = "PF";
1834 int filter_list_len = 0;
1835 u32 changed_flags = 0;
1836 i40e_status aq_ret = 0;
1846 /* empty array typed pointers, kcalloc later */
1847 struct i40e_aqc_add_macvlan_element_data *add_list;
1848 struct i40e_aqc_remove_macvlan_element_data *del_list;
1850 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1851 usleep_range(1000, 2000);
1855 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1856 vsi->current_netdev_flags = vsi->netdev->flags;
1859 INIT_LIST_HEAD(&tmp_add_list);
1860 INIT_LIST_HEAD(&tmp_del_list);
1862 if (vsi->type == I40E_VSI_SRIOV)
1863 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
1864 else if (vsi->type != I40E_VSI_MAIN)
1865 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
1867 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1868 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1870 spin_lock_bh(&vsi->mac_filter_list_lock);
1871 /* Create a list of filters to delete. */
1872 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1873 if (f->state == I40E_FILTER_REMOVE) {
1874 WARN_ON(f->counter != 0);
1875 /* Move the element into temporary del_list */
1876 list_move_tail(&f->list, &tmp_del_list);
1877 vsi->active_filters--;
1879 if (f->state == I40E_FILTER_NEW) {
1880 WARN_ON(f->counter == 0);
1881 /* Move the element into temporary add_list */
1882 list_move_tail(&f->list, &tmp_add_list);
1885 spin_unlock_bh(&vsi->mac_filter_list_lock);
1888 /* Now process 'del_list' outside the lock */
1889 if (!list_empty(&tmp_del_list)) {
1890 filter_list_len = hw->aq.asq_buf_size /
1891 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1892 list_size = filter_list_len *
1893 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1894 del_list = kzalloc(list_size, GFP_ATOMIC);
1896 /* Undo VSI's MAC filter entry element updates */
1897 spin_lock_bh(&vsi->mac_filter_list_lock);
1898 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1899 spin_unlock_bh(&vsi->mac_filter_list_lock);
1904 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1907 /* add to delete list */
1908 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1909 if (f->vlan == I40E_VLAN_ANY) {
1910 del_list[num_del].vlan_tag = 0;
1911 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1913 del_list[num_del].vlan_tag =
1914 cpu_to_le16((u16)(f->vlan));
1917 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1918 del_list[num_del].flags = cmd_flags;
1921 /* flush a full buffer */
1922 if (num_del == filter_list_len) {
1923 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid,
1926 aq_err = hw->aq.asq_last_status;
1928 memset(del_list, 0, list_size);
1930 /* Explicitly ignore and do not report when
1931 * firmware returns ENOENT.
1933 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1935 dev_info(&pf->pdev->dev,
1936 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
1938 i40e_stat_str(hw, aq_ret),
1939 i40e_aq_str(hw, aq_err));
1942 /* Release memory for MAC filter entries which were
1943 * synced up with HW.
1950 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, del_list,
1952 aq_err = hw->aq.asq_last_status;
1955 /* Explicitly ignore and do not report when firmware
1958 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1960 dev_info(&pf->pdev->dev,
1961 "ignoring delete macvlan error on %s, err %s aq_err %s\n",
1963 i40e_stat_str(hw, aq_ret),
1964 i40e_aq_str(hw, aq_err));
1972 if (!list_empty(&tmp_add_list)) {
1973 /* Do all the adds now. */
1974 filter_list_len = hw->aq.asq_buf_size /
1975 sizeof(struct i40e_aqc_add_macvlan_element_data);
1976 list_size = filter_list_len *
1977 sizeof(struct i40e_aqc_add_macvlan_element_data);
1978 add_list = kzalloc(list_size, GFP_ATOMIC);
1984 list_for_each_entry(f, &tmp_add_list, list) {
1985 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1987 f->state = I40E_FILTER_FAILED;
1990 /* add to add array */
1994 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1995 if (f->vlan == I40E_VLAN_ANY) {
1996 add_list[num_add].vlan_tag = 0;
1997 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
1999 add_list[num_add].vlan_tag =
2000 cpu_to_le16((u16)(f->vlan));
2002 add_list[num_add].queue_number = 0;
2003 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2004 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2007 /* flush a full buffer */
2008 if (num_add == filter_list_len) {
2009 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2012 aq_err = hw->aq.asq_last_status;
2013 fcnt = i40e_update_filter_state(num_add,
2017 vsi->active_filters += fcnt;
2019 if (fcnt != num_add) {
2020 promisc_changed = true;
2021 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2023 vsi->promisc_threshold =
2024 (vsi->active_filters * 3) / 4;
2025 dev_warn(&pf->pdev->dev,
2026 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2027 i40e_aq_str(hw, aq_err),
2030 memset(add_list, 0, list_size);
2035 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2036 add_list, num_add, NULL);
2037 aq_err = hw->aq.asq_last_status;
2038 fcnt = i40e_update_filter_state(num_add, add_list,
2040 vsi->active_filters += fcnt;
2041 if (fcnt != num_add) {
2042 promisc_changed = true;
2043 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2045 vsi->promisc_threshold =
2046 (vsi->active_filters * 3) / 4;
2047 dev_warn(&pf->pdev->dev,
2048 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2049 i40e_aq_str(hw, aq_err), vsi_name);
2052 /* Now move all of the filters from the temp add list back to
2055 spin_lock_bh(&vsi->mac_filter_list_lock);
2056 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2057 list_move_tail(&f->list, &vsi->mac_filter_list);
2059 spin_unlock_bh(&vsi->mac_filter_list_lock);
2064 /* Check to see if we can drop out of overflow promiscuous mode. */
2065 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) &&
2066 (vsi->active_filters < vsi->promisc_threshold)) {
2067 int failed_count = 0;
2068 /* See if we have any failed filters. We can't drop out of
2069 * promiscuous until these have all been deleted.
2071 spin_lock_bh(&vsi->mac_filter_list_lock);
2072 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2073 if (f->state == I40E_FILTER_FAILED)
2076 spin_unlock_bh(&vsi->mac_filter_list_lock);
2077 if (!failed_count) {
2078 dev_info(&pf->pdev->dev,
2079 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2081 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2082 promisc_changed = true;
2083 vsi->promisc_threshold = 0;
2087 /* if the VF is not trusted do not do promisc */
2088 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2089 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2093 /* check for changes in promiscuous modes */
2094 if (changed_flags & IFF_ALLMULTI) {
2095 bool cur_multipromisc;
2097 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2098 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2103 retval = i40e_aq_rc_to_posix(aq_ret,
2104 hw->aq.asq_last_status);
2105 dev_info(&pf->pdev->dev,
2106 "set multi promisc failed on %s, err %s aq_err %s\n",
2108 i40e_stat_str(hw, aq_ret),
2109 i40e_aq_str(hw, hw->aq.asq_last_status));
2112 if ((changed_flags & IFF_PROMISC) ||
2114 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) {
2117 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2118 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2120 if ((vsi->type == I40E_VSI_MAIN) &&
2121 (pf->lan_veb != I40E_NO_VEB) &&
2122 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2123 /* set defport ON for Main VSI instead of true promisc
2124 * this way we will get all unicast/multicast and VLAN
2125 * promisc behavior but will not get VF or VMDq traffic
2126 * replicated on the Main VSI.
2128 if (pf->cur_promisc != cur_promisc) {
2129 pf->cur_promisc = cur_promisc;
2132 i40e_aq_set_default_vsi(hw,
2137 i40e_aq_clear_default_vsi(hw,
2141 retval = i40e_aq_rc_to_posix(aq_ret,
2142 hw->aq.asq_last_status);
2143 dev_info(&pf->pdev->dev,
2144 "Set default VSI failed on %s, err %s, aq_err %s\n",
2146 i40e_stat_str(hw, aq_ret),
2148 hw->aq.asq_last_status));
2152 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2159 i40e_aq_rc_to_posix(aq_ret,
2160 hw->aq.asq_last_status);
2161 dev_info(&pf->pdev->dev,
2162 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2164 i40e_stat_str(hw, aq_ret),
2166 hw->aq.asq_last_status));
2168 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2174 i40e_aq_rc_to_posix(aq_ret,
2175 hw->aq.asq_last_status);
2176 dev_info(&pf->pdev->dev,
2177 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2179 i40e_stat_str(hw, aq_ret),
2181 hw->aq.asq_last_status));
2184 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2188 retval = i40e_aq_rc_to_posix(aq_ret,
2189 pf->hw.aq.asq_last_status);
2190 dev_info(&pf->pdev->dev,
2191 "set brdcast promisc failed, err %s, aq_err %s\n",
2192 i40e_stat_str(hw, aq_ret),
2194 hw->aq.asq_last_status));
2198 /* if something went wrong then set the changed flag so we try again */
2200 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2202 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2207 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2208 * @pf: board private structure
2210 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2214 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2216 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2218 for (v = 0; v < pf->num_alloc_vsi; v++) {
2220 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2221 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2224 /* come back and try again later */
2225 pf->flags |= I40E_FLAG_FILTER_SYNC;
2233 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2234 * @netdev: network interface device structure
2235 * @new_mtu: new value for maximum frame size
2237 * Returns 0 on success, negative on failure
2239 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2241 struct i40e_netdev_priv *np = netdev_priv(netdev);
2242 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2243 struct i40e_vsi *vsi = np->vsi;
2245 /* MTU < 68 is an error and causes problems on some kernels */
2246 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2249 netdev_info(netdev, "changing MTU from %d to %d\n",
2250 netdev->mtu, new_mtu);
2251 netdev->mtu = new_mtu;
2252 if (netif_running(netdev))
2253 i40e_vsi_reinit_locked(vsi);
2254 i40e_notify_client_of_l2_param_changes(vsi);
2259 * i40e_ioctl - Access the hwtstamp interface
2260 * @netdev: network interface device structure
2261 * @ifr: interface request data
2262 * @cmd: ioctl command
2264 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2266 struct i40e_netdev_priv *np = netdev_priv(netdev);
2267 struct i40e_pf *pf = np->vsi->back;
2271 return i40e_ptp_get_ts_config(pf, ifr);
2273 return i40e_ptp_set_ts_config(pf, ifr);
2280 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2281 * @vsi: the vsi being adjusted
2283 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2285 struct i40e_vsi_context ctxt;
2288 if ((vsi->info.valid_sections &
2289 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2290 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2291 return; /* already enabled */
2293 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2294 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2295 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2297 ctxt.seid = vsi->seid;
2298 ctxt.info = vsi->info;
2299 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2301 dev_info(&vsi->back->pdev->dev,
2302 "update vlan stripping failed, err %s aq_err %s\n",
2303 i40e_stat_str(&vsi->back->hw, ret),
2304 i40e_aq_str(&vsi->back->hw,
2305 vsi->back->hw.aq.asq_last_status));
2310 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2311 * @vsi: the vsi being adjusted
2313 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2315 struct i40e_vsi_context ctxt;
2318 if ((vsi->info.valid_sections &
2319 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2320 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2321 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2322 return; /* already disabled */
2324 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2325 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2326 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2328 ctxt.seid = vsi->seid;
2329 ctxt.info = vsi->info;
2330 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2332 dev_info(&vsi->back->pdev->dev,
2333 "update vlan stripping failed, err %s aq_err %s\n",
2334 i40e_stat_str(&vsi->back->hw, ret),
2335 i40e_aq_str(&vsi->back->hw,
2336 vsi->back->hw.aq.asq_last_status));
2341 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2342 * @netdev: network interface to be adjusted
2343 * @features: netdev features to test if VLAN offload is enabled or not
2345 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2347 struct i40e_netdev_priv *np = netdev_priv(netdev);
2348 struct i40e_vsi *vsi = np->vsi;
2350 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2351 i40e_vlan_stripping_enable(vsi);
2353 i40e_vlan_stripping_disable(vsi);
2357 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2358 * @vsi: the vsi being configured
2359 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2361 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2363 struct i40e_mac_filter *f, *ftmp, *add_f;
2364 bool is_netdev, is_vf;
2366 is_vf = (vsi->type == I40E_VSI_SRIOV);
2367 is_netdev = !!(vsi->netdev);
2369 /* Locked once because all functions invoked below iterates list*/
2370 spin_lock_bh(&vsi->mac_filter_list_lock);
2373 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2376 dev_info(&vsi->back->pdev->dev,
2377 "Could not add vlan filter %d for %pM\n",
2378 vid, vsi->netdev->dev_addr);
2379 spin_unlock_bh(&vsi->mac_filter_list_lock);
2384 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2385 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2387 dev_info(&vsi->back->pdev->dev,
2388 "Could not add vlan filter %d for %pM\n",
2390 spin_unlock_bh(&vsi->mac_filter_list_lock);
2395 /* Now if we add a vlan tag, make sure to check if it is the first
2396 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2397 * with 0, so we now accept untagged and specified tagged traffic
2398 * (and not all tags along with untagged)
2401 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2403 is_vf, is_netdev)) {
2404 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2405 I40E_VLAN_ANY, is_vf, is_netdev);
2406 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2409 dev_info(&vsi->back->pdev->dev,
2410 "Could not add filter 0 for %pM\n",
2411 vsi->netdev->dev_addr);
2412 spin_unlock_bh(&vsi->mac_filter_list_lock);
2418 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2419 if (vid > 0 && !vsi->info.pvid) {
2420 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2421 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2424 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2426 add_f = i40e_add_filter(vsi, f->macaddr,
2427 0, is_vf, is_netdev);
2429 dev_info(&vsi->back->pdev->dev,
2430 "Could not add filter 0 for %pM\n",
2432 spin_unlock_bh(&vsi->mac_filter_list_lock);
2438 spin_unlock_bh(&vsi->mac_filter_list_lock);
2440 /* schedule our worker thread which will take care of
2441 * applying the new filter changes
2443 i40e_service_event_schedule(vsi->back);
2448 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2449 * @vsi: the vsi being configured
2450 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2452 * Return: 0 on success or negative otherwise
2454 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2456 struct net_device *netdev = vsi->netdev;
2457 struct i40e_mac_filter *f, *ftmp, *add_f;
2458 bool is_vf, is_netdev;
2459 int filter_count = 0;
2461 is_vf = (vsi->type == I40E_VSI_SRIOV);
2462 is_netdev = !!(netdev);
2464 /* Locked once because all functions invoked below iterates list */
2465 spin_lock_bh(&vsi->mac_filter_list_lock);
2468 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2470 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
2471 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2473 /* go through all the filters for this VSI and if there is only
2474 * vid == 0 it means there are no other filters, so vid 0 must
2475 * be replaced with -1. This signifies that we should from now
2476 * on accept any traffic (with any tag present, or untagged)
2478 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2481 ether_addr_equal(netdev->dev_addr, f->macaddr))
2489 if (!filter_count && is_netdev) {
2490 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2491 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2494 dev_info(&vsi->back->pdev->dev,
2495 "Could not add filter %d for %pM\n",
2496 I40E_VLAN_ANY, netdev->dev_addr);
2497 spin_unlock_bh(&vsi->mac_filter_list_lock);
2502 if (!filter_count) {
2503 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2504 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2505 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2508 dev_info(&vsi->back->pdev->dev,
2509 "Could not add filter %d for %pM\n",
2510 I40E_VLAN_ANY, f->macaddr);
2511 spin_unlock_bh(&vsi->mac_filter_list_lock);
2517 spin_unlock_bh(&vsi->mac_filter_list_lock);
2519 /* schedule our worker thread which will take care of
2520 * applying the new filter changes
2522 i40e_service_event_schedule(vsi->back);
2527 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2528 * @netdev: network interface to be adjusted
2529 * @vid: vlan id to be added
2531 * net_device_ops implementation for adding vlan ids
2534 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2535 __always_unused __be16 proto, u16 vid)
2537 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2538 __always_unused __be16 proto, u16 vid)
2541 struct i40e_netdev_priv *np = netdev_priv(netdev);
2542 struct i40e_vsi *vsi = np->vsi;
2548 /* If the network stack called us with vid = 0 then
2549 * it is asking to receive priority tagged packets with
2550 * vlan id 0. Our HW receives them by default when configured
2551 * to receive untagged packets so there is no need to add an
2552 * extra filter for vlan 0 tagged packets.
2555 ret = i40e_vsi_add_vlan(vsi, vid);
2557 if (!ret && (vid < VLAN_N_VID))
2558 set_bit(vid, vsi->active_vlans);
2564 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2565 * @netdev: network interface to be adjusted
2566 * @vid: vlan id to be removed
2568 * net_device_ops implementation for removing vlan ids
2571 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2572 __always_unused __be16 proto, u16 vid)
2574 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2575 __always_unused __be16 proto, u16 vid)
2578 struct i40e_netdev_priv *np = netdev_priv(netdev);
2579 struct i40e_vsi *vsi = np->vsi;
2581 /* return code is ignored as there is nothing a user
2582 * can do about failure to remove and a log message was
2583 * already printed from the other function
2585 i40e_vsi_kill_vlan(vsi, vid);
2587 clear_bit(vid, vsi->active_vlans);
2593 * i40e_macaddr_init - explicitly write the mac address filters
2595 * @vsi: pointer to the vsi
2596 * @macaddr: the MAC address
2598 * This is needed when the macaddr has been obtained by other
2599 * means than the default, e.g., from Open Firmware or IDPROM.
2600 * Returns 0 on success, negative on failure
2602 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
2605 struct i40e_aqc_add_macvlan_element_data element;
2607 ret = i40e_aq_mac_address_write(&vsi->back->hw,
2608 I40E_AQC_WRITE_TYPE_LAA_WOL,
2611 dev_info(&vsi->back->pdev->dev,
2612 "Addr change for VSI failed: %d\n", ret);
2613 return -EADDRNOTAVAIL;
2616 memset(&element, 0, sizeof(element));
2617 ether_addr_copy(element.mac_addr, macaddr);
2618 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
2619 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
2621 dev_info(&vsi->back->pdev->dev,
2622 "add filter failed err %s aq_err %s\n",
2623 i40e_stat_str(&vsi->back->hw, ret),
2624 i40e_aq_str(&vsi->back->hw,
2625 vsi->back->hw.aq.asq_last_status));
2631 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2632 * @vsi: the vsi being brought back up
2634 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2641 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2643 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2644 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2649 * i40e_vsi_add_pvid - Add pvid for the VSI
2650 * @vsi: the vsi being adjusted
2651 * @vid: the vlan id to set as a PVID
2653 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2655 struct i40e_vsi_context ctxt;
2658 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2659 vsi->info.pvid = cpu_to_le16(vid);
2660 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2661 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2662 I40E_AQ_VSI_PVLAN_EMOD_STR;
2664 ctxt.seid = vsi->seid;
2665 ctxt.info = vsi->info;
2666 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2668 dev_info(&vsi->back->pdev->dev,
2669 "add pvid failed, err %s aq_err %s\n",
2670 i40e_stat_str(&vsi->back->hw, ret),
2671 i40e_aq_str(&vsi->back->hw,
2672 vsi->back->hw.aq.asq_last_status));
2680 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2681 * @vsi: the vsi being adjusted
2683 * Just use the vlan_rx_register() service to put it back to normal
2685 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2687 i40e_vlan_stripping_disable(vsi);
2693 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2694 * @vsi: ptr to the VSI
2696 * If this function returns with an error, then it's possible one or
2697 * more of the rings is populated (while the rest are not). It is the
2698 * callers duty to clean those orphaned rings.
2700 * Return 0 on success, negative on failure
2702 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2706 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2707 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2713 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2714 * @vsi: ptr to the VSI
2716 * Free VSI's transmit software resources
2718 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2725 for (i = 0; i < vsi->num_queue_pairs; i++)
2726 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2727 i40e_free_tx_resources(vsi->tx_rings[i]);
2731 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2732 * @vsi: ptr to the VSI
2734 * If this function returns with an error, then it's possible one or
2735 * more of the rings is populated (while the rest are not). It is the
2736 * callers duty to clean those orphaned rings.
2738 * Return 0 on success, negative on failure
2740 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2744 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2745 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2747 i40e_fcoe_setup_ddp_resources(vsi);
2753 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2754 * @vsi: ptr to the VSI
2756 * Free all receive software resources
2758 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2765 for (i = 0; i < vsi->num_queue_pairs; i++)
2766 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2767 i40e_free_rx_resources(vsi->rx_rings[i]);
2769 i40e_fcoe_free_ddp_resources(vsi);
2774 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2775 * @ring: The Tx ring to configure
2777 * This enables/disables XPS for a given Tx descriptor ring
2778 * based on the TCs enabled for the VSI that ring belongs to.
2780 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2782 struct i40e_vsi *vsi = ring->vsi;
2785 if (!ring->q_vector || !ring->netdev)
2788 /* Single TC mode enable XPS */
2789 if (vsi->tc_config.numtc <= 1) {
2790 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2791 netif_set_xps_queue(ring->netdev,
2792 &ring->q_vector->affinity_mask,
2794 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2795 /* Disable XPS to allow selection based on TC */
2796 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2797 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2798 free_cpumask_var(mask);
2801 /* schedule our worker thread which will take care of
2802 * applying the new filter changes
2804 i40e_service_event_schedule(vsi->back);
2808 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2809 * @ring: The Tx ring to configure
2811 * Configure the Tx descriptor ring in the HMC context.
2813 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2815 struct i40e_vsi *vsi = ring->vsi;
2816 u16 pf_q = vsi->base_queue + ring->queue_index;
2817 struct i40e_hw *hw = &vsi->back->hw;
2818 struct i40e_hmc_obj_txq tx_ctx;
2819 i40e_status err = 0;
2822 /* some ATR related tx ring init */
2823 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2824 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2825 ring->atr_count = 0;
2827 ring->atr_sample_rate = 0;
2831 i40e_config_xps_tx_ring(ring);
2833 /* clear the context structure first */
2834 memset(&tx_ctx, 0, sizeof(tx_ctx));
2836 tx_ctx.new_context = 1;
2837 tx_ctx.base = (ring->dma / 128);
2838 tx_ctx.qlen = ring->count;
2839 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2840 I40E_FLAG_FD_ATR_ENABLED));
2842 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2844 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2845 /* FDIR VSI tx ring can still use RS bit and writebacks */
2846 if (vsi->type != I40E_VSI_FDIR)
2847 tx_ctx.head_wb_ena = 1;
2848 tx_ctx.head_wb_addr = ring->dma +
2849 (ring->count * sizeof(struct i40e_tx_desc));
2851 /* As part of VSI creation/update, FW allocates certain
2852 * Tx arbitration queue sets for each TC enabled for
2853 * the VSI. The FW returns the handles to these queue
2854 * sets as part of the response buffer to Add VSI,
2855 * Update VSI, etc. AQ commands. It is expected that
2856 * these queue set handles be associated with the Tx
2857 * queues by the driver as part of the TX queue context
2858 * initialization. This has to be done regardless of
2859 * DCB as by default everything is mapped to TC0.
2861 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2862 tx_ctx.rdylist_act = 0;
2864 /* clear the context in the HMC */
2865 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2867 dev_info(&vsi->back->pdev->dev,
2868 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2869 ring->queue_index, pf_q, err);
2873 /* set the context in the HMC */
2874 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2876 dev_info(&vsi->back->pdev->dev,
2877 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2878 ring->queue_index, pf_q, err);
2882 /* Now associate this queue with this PCI function */
2883 if (vsi->type == I40E_VSI_VMDQ2) {
2884 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2885 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2886 I40E_QTX_CTL_VFVM_INDX_MASK;
2888 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2891 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2892 I40E_QTX_CTL_PF_INDX_MASK);
2893 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2896 /* cache tail off for easier writes later */
2897 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2903 * i40e_configure_rx_ring - Configure a receive ring context
2904 * @ring: The Rx ring to configure
2906 * Configure the Rx descriptor ring in the HMC context.
2908 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2910 struct i40e_vsi *vsi = ring->vsi;
2911 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2912 u16 pf_q = vsi->base_queue + ring->queue_index;
2913 struct i40e_hw *hw = &vsi->back->hw;
2914 struct i40e_hmc_obj_rxq rx_ctx;
2915 i40e_status err = 0;
2919 /* clear the context structure first */
2920 memset(&rx_ctx, 0, sizeof(rx_ctx));
2922 ring->rx_buf_len = vsi->rx_buf_len;
2924 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2926 rx_ctx.base = (ring->dma / 128);
2927 rx_ctx.qlen = ring->count;
2929 /* use 32 byte descriptors */
2932 /* descriptor type is always zero
2935 rx_ctx.hsplit_0 = 0;
2937 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
2938 if (hw->revision_id == 0)
2939 rx_ctx.lrxqthresh = 0;
2941 rx_ctx.lrxqthresh = 2;
2942 rx_ctx.crcstrip = 1;
2944 /* this controls whether VLAN is stripped from inner headers */
2947 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2949 /* set the prefena field to 1 because the manual says to */
2952 /* clear the context in the HMC */
2953 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2955 dev_info(&vsi->back->pdev->dev,
2956 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2957 ring->queue_index, pf_q, err);
2961 /* set the context in the HMC */
2962 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2964 dev_info(&vsi->back->pdev->dev,
2965 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2966 ring->queue_index, pf_q, err);
2970 /* cache tail for quicker writes, and clear the reg before use */
2971 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2972 writel(0, ring->tail);
2974 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2980 * i40e_vsi_configure_tx - Configure the VSI for Tx
2981 * @vsi: VSI structure describing this set of rings and resources
2983 * Configure the Tx VSI for operation.
2985 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2990 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2991 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2997 * i40e_vsi_configure_rx - Configure the VSI for Rx
2998 * @vsi: the VSI being configured
3000 * Configure the Rx VSI for operation.
3002 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3007 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
3008 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
3009 + ETH_FCS_LEN + VLAN_HLEN;
3011 vsi->max_frame = I40E_RXBUFFER_2048;
3013 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3016 /* setup rx buffer for FCoE */
3017 if ((vsi->type == I40E_VSI_FCOE) &&
3018 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
3019 vsi->rx_buf_len = I40E_RXBUFFER_3072;
3020 vsi->max_frame = I40E_RXBUFFER_3072;
3023 #endif /* I40E_FCOE */
3024 /* round up for the chip's needs */
3025 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3026 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3028 /* set up individual rings */
3029 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3030 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3036 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3037 * @vsi: ptr to the VSI
3039 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3041 struct i40e_ring *tx_ring, *rx_ring;
3042 u16 qoffset, qcount;
3045 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3046 /* Reset the TC information */
3047 for (i = 0; i < vsi->num_queue_pairs; i++) {
3048 rx_ring = vsi->rx_rings[i];
3049 tx_ring = vsi->tx_rings[i];
3050 rx_ring->dcb_tc = 0;
3051 tx_ring->dcb_tc = 0;
3055 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3056 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3059 qoffset = vsi->tc_config.tc_info[n].qoffset;
3060 qcount = vsi->tc_config.tc_info[n].qcount;
3061 for (i = qoffset; i < (qoffset + qcount); i++) {
3062 rx_ring = vsi->rx_rings[i];
3063 tx_ring = vsi->tx_rings[i];
3064 rx_ring->dcb_tc = n;
3065 tx_ring->dcb_tc = n;
3071 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3072 * @vsi: ptr to the VSI
3074 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3076 struct i40e_pf *pf = vsi->back;
3080 i40e_set_rx_mode(vsi->netdev);
3082 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
3083 err = i40e_macaddr_init(vsi, pf->hw.mac.addr);
3085 dev_warn(&pf->pdev->dev,
3086 "could not set up macaddr; err %d\n", err);
3092 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3093 * @vsi: Pointer to the targeted VSI
3095 * This function replays the hlist on the hw where all the SB Flow Director
3096 * filters were saved.
3098 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3100 struct i40e_fdir_filter *filter;
3101 struct i40e_pf *pf = vsi->back;
3102 struct hlist_node *node;
3104 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3107 hlist_for_each_entry_safe(filter, node,
3108 &pf->fdir_filter_list, fdir_node) {
3109 i40e_add_del_fdir(vsi, filter, true);
3114 * i40e_vsi_configure - Set up the VSI for action
3115 * @vsi: the VSI being configured
3117 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3121 i40e_set_vsi_rx_mode(vsi);
3122 i40e_restore_vlan(vsi);
3123 i40e_vsi_config_dcb_rings(vsi);
3124 err = i40e_vsi_configure_tx(vsi);
3126 err = i40e_vsi_configure_rx(vsi);
3132 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3133 * @vsi: the VSI being configured
3135 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3137 struct i40e_pf *pf = vsi->back;
3138 struct i40e_hw *hw = &pf->hw;
3143 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3144 * and PFINT_LNKLSTn registers, e.g.:
3145 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3147 qp = vsi->base_queue;
3148 vector = vsi->base_vector;
3149 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3150 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3152 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3153 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3154 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3155 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3157 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3158 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3159 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3161 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3162 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3164 /* Linked list for the queuepairs assigned to this vector */
3165 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3166 for (q = 0; q < q_vector->num_ringpairs; q++) {
3169 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3170 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3171 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3172 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3174 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3176 wr32(hw, I40E_QINT_RQCTL(qp), val);
3178 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3179 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3180 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3181 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3183 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3185 /* Terminate the linked list */
3186 if (q == (q_vector->num_ringpairs - 1))
3187 val |= (I40E_QUEUE_END_OF_LIST
3188 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3190 wr32(hw, I40E_QINT_TQCTL(qp), val);
3199 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3200 * @hw: ptr to the hardware info
3202 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3204 struct i40e_hw *hw = &pf->hw;
3207 /* clear things first */
3208 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3209 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3211 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3212 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3213 I40E_PFINT_ICR0_ENA_GRST_MASK |
3214 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3215 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3216 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3217 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3218 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3220 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3221 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3223 if (pf->flags & I40E_FLAG_PTP)
3224 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3226 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3228 /* SW_ITR_IDX = 0, but don't change INTENA */
3229 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3230 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3232 /* OTHER_ITR_IDX = 0 */
3233 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3237 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3238 * @vsi: the VSI being configured
3240 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3242 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3243 struct i40e_pf *pf = vsi->back;
3244 struct i40e_hw *hw = &pf->hw;
3247 /* set the ITR configuration */
3248 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3249 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3250 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3251 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3252 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3253 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3254 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3256 i40e_enable_misc_int_causes(pf);
3258 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3259 wr32(hw, I40E_PFINT_LNKLST0, 0);
3261 /* Associate the queue pair to the vector and enable the queue int */
3262 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3263 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3264 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3266 wr32(hw, I40E_QINT_RQCTL(0), val);
3268 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3269 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3270 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3272 wr32(hw, I40E_QINT_TQCTL(0), val);
3277 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3278 * @pf: board private structure
3280 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3282 struct i40e_hw *hw = &pf->hw;
3284 wr32(hw, I40E_PFINT_DYN_CTL0,
3285 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3290 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3291 * @pf: board private structure
3292 * @clearpba: true when all pending interrupt events should be cleared
3294 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3296 struct i40e_hw *hw = &pf->hw;
3299 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3300 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3301 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3303 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3308 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3309 * @irq: interrupt number
3310 * @data: pointer to a q_vector
3312 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3314 struct i40e_q_vector *q_vector = data;
3316 if (!q_vector->tx.ring && !q_vector->rx.ring)
3319 napi_schedule_irqoff(&q_vector->napi);
3325 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3326 * @vsi: the VSI being configured
3327 * @basename: name for the vector
3329 * Allocates MSI-X vectors and requests interrupts from the kernel.
3331 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3333 int q_vectors = vsi->num_q_vectors;
3334 struct i40e_pf *pf = vsi->back;
3335 int base = vsi->base_vector;
3340 for (vector = 0; vector < q_vectors; vector++) {
3341 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3343 if (q_vector->tx.ring && q_vector->rx.ring) {
3344 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3345 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3347 } else if (q_vector->rx.ring) {
3348 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3349 "%s-%s-%d", basename, "rx", rx_int_idx++);
3350 } else if (q_vector->tx.ring) {
3351 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3352 "%s-%s-%d", basename, "tx", tx_int_idx++);
3354 /* skip this unused q_vector */
3357 err = request_irq(pf->msix_entries[base + vector].vector,
3363 dev_info(&pf->pdev->dev,
3364 "MSIX request_irq failed, error: %d\n", err);
3365 goto free_queue_irqs;
3367 /* assign the mask for this irq */
3368 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3369 &q_vector->affinity_mask);
3372 vsi->irqs_ready = true;
3378 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3380 free_irq(pf->msix_entries[base + vector].vector,
3381 &(vsi->q_vectors[vector]));
3387 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3388 * @vsi: the VSI being un-configured
3390 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3392 struct i40e_pf *pf = vsi->back;
3393 struct i40e_hw *hw = &pf->hw;
3394 int base = vsi->base_vector;
3397 for (i = 0; i < vsi->num_queue_pairs; i++) {
3398 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3399 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3402 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3403 for (i = vsi->base_vector;
3404 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3405 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3408 for (i = 0; i < vsi->num_q_vectors; i++)
3409 synchronize_irq(pf->msix_entries[i + base].vector);
3411 /* Legacy and MSI mode - this stops all interrupt handling */
3412 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3413 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3415 synchronize_irq(pf->pdev->irq);
3420 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3421 * @vsi: the VSI being configured
3423 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3425 struct i40e_pf *pf = vsi->back;
3428 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3429 for (i = 0; i < vsi->num_q_vectors; i++)
3430 i40e_irq_dynamic_enable(vsi, i);
3432 i40e_irq_dynamic_enable_icr0(pf, true);
3435 i40e_flush(&pf->hw);
3440 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3441 * @pf: board private structure
3443 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3446 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3447 i40e_flush(&pf->hw);
3451 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3452 * @irq: interrupt number
3453 * @data: pointer to a q_vector
3455 * This is the handler used for all MSI/Legacy interrupts, and deals
3456 * with both queue and non-queue interrupts. This is also used in
3457 * MSIX mode to handle the non-queue interrupts.
3459 static irqreturn_t i40e_intr(int irq, void *data)
3461 struct i40e_pf *pf = (struct i40e_pf *)data;
3462 struct i40e_hw *hw = &pf->hw;
3463 irqreturn_t ret = IRQ_NONE;
3464 u32 icr0, icr0_remaining;
3467 icr0 = rd32(hw, I40E_PFINT_ICR0);
3468 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3470 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3471 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3474 /* if interrupt but no bits showing, must be SWINT */
3475 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3476 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3479 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3480 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3481 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3482 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3483 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3486 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3487 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3488 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3489 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3491 /* We do not have a way to disarm Queue causes while leaving
3492 * interrupt enabled for all other causes, ideally
3493 * interrupt should be disabled while we are in NAPI but
3494 * this is not a performance path and napi_schedule()
3495 * can deal with rescheduling.
3497 if (!test_bit(__I40E_DOWN, &pf->state))
3498 napi_schedule_irqoff(&q_vector->napi);
3501 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3502 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3503 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3504 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3507 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3508 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3509 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3512 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3513 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3514 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3517 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3518 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3519 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3520 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3521 val = rd32(hw, I40E_GLGEN_RSTAT);
3522 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3523 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3524 if (val == I40E_RESET_CORER) {
3526 } else if (val == I40E_RESET_GLOBR) {
3528 } else if (val == I40E_RESET_EMPR) {
3530 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3534 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3535 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3536 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3537 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3538 rd32(hw, I40E_PFHMC_ERRORINFO),
3539 rd32(hw, I40E_PFHMC_ERRORDATA));
3542 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3543 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3545 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3546 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3547 i40e_ptp_tx_hwtstamp(pf);
3551 /* If a critical error is pending we have no choice but to reset the
3553 * Report and mask out any remaining unexpected interrupts.
3555 icr0_remaining = icr0 & ena_mask;
3556 if (icr0_remaining) {
3557 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3559 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3560 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3561 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3562 dev_info(&pf->pdev->dev, "device will be reset\n");
3563 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3564 i40e_service_event_schedule(pf);
3566 ena_mask &= ~icr0_remaining;
3571 /* re-enable interrupt causes */
3572 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3573 if (!test_bit(__I40E_DOWN, &pf->state)) {
3574 i40e_service_event_schedule(pf);
3575 i40e_irq_dynamic_enable_icr0(pf, false);
3582 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3583 * @tx_ring: tx ring to clean
3584 * @budget: how many cleans we're allowed
3586 * Returns true if there's any budget left (e.g. the clean is finished)
3588 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3590 struct i40e_vsi *vsi = tx_ring->vsi;
3591 u16 i = tx_ring->next_to_clean;
3592 struct i40e_tx_buffer *tx_buf;
3593 struct i40e_tx_desc *tx_desc;
3595 tx_buf = &tx_ring->tx_bi[i];
3596 tx_desc = I40E_TX_DESC(tx_ring, i);
3597 i -= tx_ring->count;
3600 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3602 /* if next_to_watch is not set then there is no work pending */
3606 /* prevent any other reads prior to eop_desc */
3607 read_barrier_depends();
3609 /* if the descriptor isn't done, no work yet to do */
3610 if (!(eop_desc->cmd_type_offset_bsz &
3611 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3614 /* clear next_to_watch to prevent false hangs */
3615 tx_buf->next_to_watch = NULL;
3617 tx_desc->buffer_addr = 0;
3618 tx_desc->cmd_type_offset_bsz = 0;
3619 /* move past filter desc */
3624 i -= tx_ring->count;
3625 tx_buf = tx_ring->tx_bi;
3626 tx_desc = I40E_TX_DESC(tx_ring, 0);
3628 /* unmap skb header data */
3629 dma_unmap_single(tx_ring->dev,
3630 dma_unmap_addr(tx_buf, dma),
3631 dma_unmap_len(tx_buf, len),
3633 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3634 kfree(tx_buf->raw_buf);
3636 tx_buf->raw_buf = NULL;
3637 tx_buf->tx_flags = 0;
3638 tx_buf->next_to_watch = NULL;
3639 dma_unmap_len_set(tx_buf, len, 0);
3640 tx_desc->buffer_addr = 0;
3641 tx_desc->cmd_type_offset_bsz = 0;
3643 /* move us past the eop_desc for start of next FD desc */
3648 i -= tx_ring->count;
3649 tx_buf = tx_ring->tx_bi;
3650 tx_desc = I40E_TX_DESC(tx_ring, 0);
3653 /* update budget accounting */
3655 } while (likely(budget));
3657 i += tx_ring->count;
3658 tx_ring->next_to_clean = i;
3660 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3661 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3667 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3668 * @irq: interrupt number
3669 * @data: pointer to a q_vector
3671 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3673 struct i40e_q_vector *q_vector = data;
3674 struct i40e_vsi *vsi;
3676 if (!q_vector->tx.ring)
3679 vsi = q_vector->tx.ring->vsi;
3680 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3686 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3687 * @vsi: the VSI being configured
3688 * @v_idx: vector index
3689 * @qp_idx: queue pair index
3691 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3693 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3694 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3695 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3697 tx_ring->q_vector = q_vector;
3698 tx_ring->next = q_vector->tx.ring;
3699 q_vector->tx.ring = tx_ring;
3700 q_vector->tx.count++;
3702 rx_ring->q_vector = q_vector;
3703 rx_ring->next = q_vector->rx.ring;
3704 q_vector->rx.ring = rx_ring;
3705 q_vector->rx.count++;
3709 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3710 * @vsi: the VSI being configured
3712 * This function maps descriptor rings to the queue-specific vectors
3713 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3714 * one vector per queue pair, but on a constrained vector budget, we
3715 * group the queue pairs as "efficiently" as possible.
3717 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3719 int qp_remaining = vsi->num_queue_pairs;
3720 int q_vectors = vsi->num_q_vectors;
3725 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3726 * group them so there are multiple queues per vector.
3727 * It is also important to go through all the vectors available to be
3728 * sure that if we don't use all the vectors, that the remaining vectors
3729 * are cleared. This is especially important when decreasing the
3730 * number of queues in use.
3732 for (; v_start < q_vectors; v_start++) {
3733 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3735 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3737 q_vector->num_ringpairs = num_ringpairs;
3739 q_vector->rx.count = 0;
3740 q_vector->tx.count = 0;
3741 q_vector->rx.ring = NULL;
3742 q_vector->tx.ring = NULL;
3744 while (num_ringpairs--) {
3745 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3753 * i40e_vsi_request_irq - Request IRQ from the OS
3754 * @vsi: the VSI being configured
3755 * @basename: name for the vector
3757 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3759 struct i40e_pf *pf = vsi->back;
3762 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3763 err = i40e_vsi_request_irq_msix(vsi, basename);
3764 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3765 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3768 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3772 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3777 #ifdef CONFIG_NET_POLL_CONTROLLER
3779 * i40e_netpoll - A Polling 'interrupt' handler
3780 * @netdev: network interface device structure
3782 * This is used by netconsole to send skbs without having to re-enable
3783 * interrupts. It's not called while the normal interrupt routine is executing.
3786 void i40e_netpoll(struct net_device *netdev)
3788 static void i40e_netpoll(struct net_device *netdev)
3791 struct i40e_netdev_priv *np = netdev_priv(netdev);
3792 struct i40e_vsi *vsi = np->vsi;
3793 struct i40e_pf *pf = vsi->back;
3796 /* if interface is down do nothing */
3797 if (test_bit(__I40E_DOWN, &vsi->state))
3800 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3801 for (i = 0; i < vsi->num_q_vectors; i++)
3802 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3804 i40e_intr(pf->pdev->irq, netdev);
3810 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3811 * @pf: the PF being configured
3812 * @pf_q: the PF queue
3813 * @enable: enable or disable state of the queue
3815 * This routine will wait for the given Tx queue of the PF to reach the
3816 * enabled or disabled state.
3817 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3818 * multiple retries; else will return 0 in case of success.
3820 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3825 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3826 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3827 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3830 usleep_range(10, 20);
3832 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3839 * i40e_vsi_control_tx - Start or stop a VSI's rings
3840 * @vsi: the VSI being configured
3841 * @enable: start or stop the rings
3843 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3845 struct i40e_pf *pf = vsi->back;
3846 struct i40e_hw *hw = &pf->hw;
3847 int i, j, pf_q, ret = 0;
3850 pf_q = vsi->base_queue;
3851 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3853 /* warn the TX unit of coming changes */
3854 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3856 usleep_range(10, 20);
3858 for (j = 0; j < 50; j++) {
3859 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3860 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3861 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3863 usleep_range(1000, 2000);
3865 /* Skip if the queue is already in the requested state */
3866 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3869 /* turn on/off the queue */
3871 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3872 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3874 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3877 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3878 /* No waiting for the Tx queue to disable */
3879 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3882 /* wait for the change to finish */
3883 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3885 dev_info(&pf->pdev->dev,
3886 "VSI seid %d Tx ring %d %sable timeout\n",
3887 vsi->seid, pf_q, (enable ? "en" : "dis"));
3892 if (hw->revision_id == 0)
3898 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3899 * @pf: the PF being configured
3900 * @pf_q: the PF queue
3901 * @enable: enable or disable state of the queue
3903 * This routine will wait for the given Rx queue of the PF to reach the
3904 * enabled or disabled state.
3905 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3906 * multiple retries; else will return 0 in case of success.
3908 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3913 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3914 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3915 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3918 usleep_range(10, 20);
3920 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3927 * i40e_vsi_control_rx - Start or stop a VSI's rings
3928 * @vsi: the VSI being configured
3929 * @enable: start or stop the rings
3931 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3933 struct i40e_pf *pf = vsi->back;
3934 struct i40e_hw *hw = &pf->hw;
3935 int i, j, pf_q, ret = 0;
3938 pf_q = vsi->base_queue;
3939 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3940 for (j = 0; j < 50; j++) {
3941 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3942 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3943 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3945 usleep_range(1000, 2000);
3948 /* Skip if the queue is already in the requested state */
3949 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3952 /* turn on/off the queue */
3954 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3956 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3957 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3958 /* No waiting for the Tx queue to disable */
3959 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3962 /* wait for the change to finish */
3963 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3965 dev_info(&pf->pdev->dev,
3966 "VSI seid %d Rx ring %d %sable timeout\n",
3967 vsi->seid, pf_q, (enable ? "en" : "dis"));
3976 * i40e_vsi_control_rings - Start or stop a VSI's rings
3977 * @vsi: the VSI being configured
3978 * @enable: start or stop the rings
3980 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3984 /* do rx first for enable and last for disable */
3986 ret = i40e_vsi_control_rx(vsi, request);
3989 ret = i40e_vsi_control_tx(vsi, request);
3991 /* Ignore return value, we need to shutdown whatever we can */
3992 i40e_vsi_control_tx(vsi, request);
3993 i40e_vsi_control_rx(vsi, request);
4000 * i40e_vsi_free_irq - Free the irq association with the OS
4001 * @vsi: the VSI being configured
4003 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4005 struct i40e_pf *pf = vsi->back;
4006 struct i40e_hw *hw = &pf->hw;
4007 int base = vsi->base_vector;
4011 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4012 if (!vsi->q_vectors)
4015 if (!vsi->irqs_ready)
4018 vsi->irqs_ready = false;
4019 for (i = 0; i < vsi->num_q_vectors; i++) {
4020 u16 vector = i + base;
4022 /* free only the irqs that were actually requested */
4023 if (!vsi->q_vectors[i] ||
4024 !vsi->q_vectors[i]->num_ringpairs)
4027 /* clear the affinity_mask in the IRQ descriptor */
4028 irq_set_affinity_hint(pf->msix_entries[vector].vector,
4030 synchronize_irq(pf->msix_entries[vector].vector);
4031 free_irq(pf->msix_entries[vector].vector,
4034 /* Tear down the interrupt queue link list
4036 * We know that they come in pairs and always
4037 * the Rx first, then the Tx. To clear the
4038 * link list, stick the EOL value into the
4039 * next_q field of the registers.
4041 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4042 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4043 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4044 val |= I40E_QUEUE_END_OF_LIST
4045 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4046 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4048 while (qp != I40E_QUEUE_END_OF_LIST) {
4051 val = rd32(hw, I40E_QINT_RQCTL(qp));
4053 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4054 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4055 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4056 I40E_QINT_RQCTL_INTEVENT_MASK);
4058 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4059 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4061 wr32(hw, I40E_QINT_RQCTL(qp), val);
4063 val = rd32(hw, I40E_QINT_TQCTL(qp));
4065 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4066 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4068 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4069 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4070 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4071 I40E_QINT_TQCTL_INTEVENT_MASK);
4073 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4074 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4076 wr32(hw, I40E_QINT_TQCTL(qp), val);
4081 free_irq(pf->pdev->irq, pf);
4083 val = rd32(hw, I40E_PFINT_LNKLST0);
4084 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4085 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4086 val |= I40E_QUEUE_END_OF_LIST
4087 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4088 wr32(hw, I40E_PFINT_LNKLST0, val);
4090 val = rd32(hw, I40E_QINT_RQCTL(qp));
4091 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4092 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4093 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4094 I40E_QINT_RQCTL_INTEVENT_MASK);
4096 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4097 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4099 wr32(hw, I40E_QINT_RQCTL(qp), val);
4101 val = rd32(hw, I40E_QINT_TQCTL(qp));
4103 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4104 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4105 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4106 I40E_QINT_TQCTL_INTEVENT_MASK);
4108 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4109 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4111 wr32(hw, I40E_QINT_TQCTL(qp), val);
4116 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4117 * @vsi: the VSI being configured
4118 * @v_idx: Index of vector to be freed
4120 * This function frees the memory allocated to the q_vector. In addition if
4121 * NAPI is enabled it will delete any references to the NAPI struct prior
4122 * to freeing the q_vector.
4124 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4126 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4127 struct i40e_ring *ring;
4132 /* disassociate q_vector from rings */
4133 i40e_for_each_ring(ring, q_vector->tx)
4134 ring->q_vector = NULL;
4136 i40e_for_each_ring(ring, q_vector->rx)
4137 ring->q_vector = NULL;
4139 /* only VSI w/ an associated netdev is set up w/ NAPI */
4141 netif_napi_del(&q_vector->napi);
4143 vsi->q_vectors[v_idx] = NULL;
4145 kfree_rcu(q_vector, rcu);
4149 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4150 * @vsi: the VSI being un-configured
4152 * This frees the memory allocated to the q_vectors and
4153 * deletes references to the NAPI struct.
4155 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4159 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4160 i40e_free_q_vector(vsi, v_idx);
4164 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4165 * @pf: board private structure
4167 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4169 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4170 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4171 pci_disable_msix(pf->pdev);
4172 kfree(pf->msix_entries);
4173 pf->msix_entries = NULL;
4174 kfree(pf->irq_pile);
4175 pf->irq_pile = NULL;
4176 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4177 pci_disable_msi(pf->pdev);
4179 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4183 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4184 * @pf: board private structure
4186 * We go through and clear interrupt specific resources and reset the structure
4187 * to pre-load conditions
4189 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4193 i40e_stop_misc_vector(pf);
4194 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4195 synchronize_irq(pf->msix_entries[0].vector);
4196 free_irq(pf->msix_entries[0].vector, pf);
4199 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4200 I40E_IWARP_IRQ_PILE_ID);
4202 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4203 for (i = 0; i < pf->num_alloc_vsi; i++)
4205 i40e_vsi_free_q_vectors(pf->vsi[i]);
4206 i40e_reset_interrupt_capability(pf);
4210 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4211 * @vsi: the VSI being configured
4213 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4220 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4221 napi_enable(&vsi->q_vectors[q_idx]->napi);
4225 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4226 * @vsi: the VSI being configured
4228 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4235 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4236 napi_disable(&vsi->q_vectors[q_idx]->napi);
4240 * i40e_vsi_close - Shut down a VSI
4241 * @vsi: the vsi to be quelled
4243 static void i40e_vsi_close(struct i40e_vsi *vsi)
4247 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4249 i40e_vsi_free_irq(vsi);
4250 i40e_vsi_free_tx_resources(vsi);
4251 i40e_vsi_free_rx_resources(vsi);
4252 vsi->current_netdev_flags = 0;
4253 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4255 i40e_notify_client_of_netdev_close(vsi, reset);
4259 * i40e_quiesce_vsi - Pause a given VSI
4260 * @vsi: the VSI being paused
4262 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4264 if (test_bit(__I40E_DOWN, &vsi->state))
4267 /* No need to disable FCoE VSI when Tx suspended */
4268 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4269 vsi->type == I40E_VSI_FCOE) {
4270 dev_dbg(&vsi->back->pdev->dev,
4271 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4275 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4276 if (vsi->netdev && netif_running(vsi->netdev))
4277 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4279 i40e_vsi_close(vsi);
4283 * i40e_unquiesce_vsi - Resume a given VSI
4284 * @vsi: the VSI being resumed
4286 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4288 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4291 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4292 if (vsi->netdev && netif_running(vsi->netdev))
4293 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4295 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4299 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4302 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4306 for (v = 0; v < pf->num_alloc_vsi; v++) {
4308 i40e_quiesce_vsi(pf->vsi[v]);
4313 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4316 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4320 for (v = 0; v < pf->num_alloc_vsi; v++) {
4322 i40e_unquiesce_vsi(pf->vsi[v]);
4326 #ifdef CONFIG_I40E_DCB
4328 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4329 * @vsi: the VSI being configured
4331 * This function waits for the given VSI's queues to be disabled.
4333 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4335 struct i40e_pf *pf = vsi->back;
4338 pf_q = vsi->base_queue;
4339 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4340 /* Check and wait for the disable status of the queue */
4341 ret = i40e_pf_txq_wait(pf, pf_q, false);
4343 dev_info(&pf->pdev->dev,
4344 "VSI seid %d Tx ring %d disable timeout\n",
4350 pf_q = vsi->base_queue;
4351 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4352 /* Check and wait for the disable status of the queue */
4353 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4355 dev_info(&pf->pdev->dev,
4356 "VSI seid %d Rx ring %d disable timeout\n",
4366 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4369 * This function waits for the queues to be in disabled state for all the
4370 * VSIs that are managed by this PF.
4372 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4376 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4377 /* No need to wait for FCoE VSI queues */
4378 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4379 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4391 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4392 * @q_idx: TX queue number
4393 * @vsi: Pointer to VSI struct
4395 * This function checks specified queue for given VSI. Detects hung condition.
4396 * Sets hung bit since it is two step process. Before next run of service task
4397 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4398 * hung condition remain unchanged and during subsequent run, this function
4399 * issues SW interrupt to recover from hung condition.
4401 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4403 struct i40e_ring *tx_ring = NULL;
4405 u32 head, val, tx_pending_hw;
4410 /* now that we have an index, find the tx_ring struct */
4411 for (i = 0; i < vsi->num_queue_pairs; i++) {
4412 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4413 if (q_idx == vsi->tx_rings[i]->queue_index) {
4414 tx_ring = vsi->tx_rings[i];
4423 /* Read interrupt register */
4424 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4426 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4427 tx_ring->vsi->base_vector - 1));
4429 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4431 head = i40e_get_head(tx_ring);
4433 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4435 /* HW is done executing descriptors, updated HEAD write back,
4436 * but SW hasn't processed those descriptors. If interrupt is
4437 * not generated from this point ON, it could result into
4438 * dev_watchdog detecting timeout on those netdev_queue,
4439 * hence proactively trigger SW interrupt.
4441 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4442 /* NAPI Poll didn't run and clear since it was set */
4443 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4444 &tx_ring->q_vector->hung_detected)) {
4445 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4446 vsi->seid, q_idx, tx_pending_hw,
4447 tx_ring->next_to_clean, head,
4448 tx_ring->next_to_use,
4449 readl(tx_ring->tail));
4450 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4451 vsi->seid, q_idx, val);
4452 i40e_force_wb(vsi, tx_ring->q_vector);
4454 /* First Chance - detected possible hung */
4455 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4456 &tx_ring->q_vector->hung_detected);
4460 /* This is the case where we have interrupts missing,
4461 * so the tx_pending in HW will most likely be 0, but we
4462 * will have tx_pending in SW since the WB happened but the
4463 * interrupt got lost.
4465 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4466 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4467 if (napi_reschedule(&tx_ring->q_vector->napi))
4468 tx_ring->tx_stats.tx_lost_interrupt++;
4473 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4474 * @pf: pointer to PF struct
4476 * LAN VSI has netdev and netdev has TX queues. This function is to check
4477 * each of those TX queues if they are hung, trigger recovery by issuing
4480 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4482 struct net_device *netdev;
4483 struct i40e_vsi *vsi;
4486 /* Only for LAN VSI */
4487 vsi = pf->vsi[pf->lan_vsi];
4492 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4493 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4494 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4497 /* Make sure type is MAIN VSI */
4498 if (vsi->type != I40E_VSI_MAIN)
4501 netdev = vsi->netdev;
4505 /* Bail out if netif_carrier is not OK */
4506 if (!netif_carrier_ok(netdev))
4509 /* Go thru' TX queues for netdev */
4510 for (i = 0; i < netdev->num_tx_queues; i++) {
4511 struct netdev_queue *q;
4513 q = netdev_get_tx_queue(netdev, i);
4515 i40e_detect_recover_hung_queue(i, vsi);
4520 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4521 * @pf: pointer to PF
4523 * Get TC map for ISCSI PF type that will include iSCSI TC
4526 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4528 struct i40e_dcb_app_priority_table app;
4529 struct i40e_hw *hw = &pf->hw;
4530 u8 enabled_tc = 1; /* TC0 is always enabled */
4532 /* Get the iSCSI APP TLV */
4533 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4535 for (i = 0; i < dcbcfg->numapps; i++) {
4536 app = dcbcfg->app[i];
4537 if (app.selector == I40E_APP_SEL_TCPIP &&
4538 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4539 tc = dcbcfg->etscfg.prioritytable[app.priority];
4540 enabled_tc |= BIT(tc);
4549 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4550 * @dcbcfg: the corresponding DCBx configuration structure
4552 * Return the number of TCs from given DCBx configuration
4554 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4556 int i, tc_unused = 0;
4560 /* Scan the ETS Config Priority Table to find
4561 * traffic class enabled for a given priority
4562 * and create a bitmask of enabled TCs
4564 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4565 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4567 /* Now scan the bitmask to check for
4568 * contiguous TCs starting with TC0
4570 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4571 if (num_tc & BIT(i)) {
4575 pr_err("Non-contiguous TC - Disabling DCB\n");
4583 /* There is always at least TC0 */
4591 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4592 * @dcbcfg: the corresponding DCBx configuration structure
4594 * Query the current DCB configuration and return the number of
4595 * traffic classes enabled from the given DCBX config
4597 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4599 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4603 for (i = 0; i < num_tc; i++)
4604 enabled_tc |= BIT(i);
4610 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4611 * @pf: PF being queried
4613 * Return number of traffic classes enabled for the given PF
4615 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4617 struct i40e_hw *hw = &pf->hw;
4618 u8 i, enabled_tc = 1;
4620 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4622 /* If DCB is not enabled then always in single TC */
4623 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4626 /* SFP mode will be enabled for all TCs on port */
4627 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4628 return i40e_dcb_get_num_tc(dcbcfg);
4630 /* MFP mode return count of enabled TCs for this PF */
4631 if (pf->hw.func_caps.iscsi)
4632 enabled_tc = i40e_get_iscsi_tc_map(pf);
4634 return 1; /* Only TC0 */
4636 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4637 if (enabled_tc & BIT(i))
4644 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4645 * @pf: PF being queried
4647 * Return a bitmap for first enabled traffic class for this PF.
4649 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4651 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4655 return 0x1; /* TC0 */
4657 /* Find the first enabled TC */
4658 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4659 if (enabled_tc & BIT(i))
4667 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4668 * @pf: PF being queried
4670 * Return a bitmap for enabled traffic classes for this PF.
4672 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4674 /* If DCB is not enabled for this PF then just return default TC */
4675 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4676 return i40e_pf_get_default_tc(pf);
4678 /* SFP mode we want PF to be enabled for all TCs */
4679 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4680 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4682 /* MFP enabled and iSCSI PF type */
4683 if (pf->hw.func_caps.iscsi)
4684 return i40e_get_iscsi_tc_map(pf);
4686 return i40e_pf_get_default_tc(pf);
4690 * i40e_vsi_get_bw_info - Query VSI BW Information
4691 * @vsi: the VSI being queried
4693 * Returns 0 on success, negative value on failure
4695 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4697 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4698 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4699 struct i40e_pf *pf = vsi->back;
4700 struct i40e_hw *hw = &pf->hw;
4705 /* Get the VSI level BW configuration */
4706 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4708 dev_info(&pf->pdev->dev,
4709 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4710 i40e_stat_str(&pf->hw, ret),
4711 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4715 /* Get the VSI level BW configuration per TC */
4716 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4719 dev_info(&pf->pdev->dev,
4720 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4721 i40e_stat_str(&pf->hw, ret),
4722 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4726 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4727 dev_info(&pf->pdev->dev,
4728 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4729 bw_config.tc_valid_bits,
4730 bw_ets_config.tc_valid_bits);
4731 /* Still continuing */
4734 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4735 vsi->bw_max_quanta = bw_config.max_bw;
4736 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4737 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4738 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4739 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4740 vsi->bw_ets_limit_credits[i] =
4741 le16_to_cpu(bw_ets_config.credits[i]);
4742 /* 3 bits out of 4 for each TC */
4743 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4750 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4751 * @vsi: the VSI being configured
4752 * @enabled_tc: TC bitmap
4753 * @bw_credits: BW shared credits per TC
4755 * Returns 0 on success, negative value on failure
4757 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4760 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4764 bw_data.tc_valid_bits = enabled_tc;
4765 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4766 bw_data.tc_bw_credits[i] = bw_share[i];
4768 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4771 dev_info(&vsi->back->pdev->dev,
4772 "AQ command Config VSI BW allocation per TC failed = %d\n",
4773 vsi->back->hw.aq.asq_last_status);
4777 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4778 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4784 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4785 * @vsi: the VSI being configured
4786 * @enabled_tc: TC map to be enabled
4789 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4791 struct net_device *netdev = vsi->netdev;
4792 struct i40e_pf *pf = vsi->back;
4793 struct i40e_hw *hw = &pf->hw;
4796 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4802 netdev_reset_tc(netdev);
4806 /* Set up actual enabled TCs on the VSI */
4807 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4810 /* set per TC queues for the VSI */
4811 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4812 /* Only set TC queues for enabled tcs
4814 * e.g. For a VSI that has TC0 and TC3 enabled the
4815 * enabled_tc bitmap would be 0x00001001; the driver
4816 * will set the numtc for netdev as 2 that will be
4817 * referenced by the netdev layer as TC 0 and 1.
4819 if (vsi->tc_config.enabled_tc & BIT(i))
4820 netdev_set_tc_queue(netdev,
4821 vsi->tc_config.tc_info[i].netdev_tc,
4822 vsi->tc_config.tc_info[i].qcount,
4823 vsi->tc_config.tc_info[i].qoffset);
4826 /* Assign UP2TC map for the VSI */
4827 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4828 /* Get the actual TC# for the UP */
4829 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4830 /* Get the mapped netdev TC# for the UP */
4831 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4832 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4837 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4838 * @vsi: the VSI being configured
4839 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4841 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4842 struct i40e_vsi_context *ctxt)
4844 /* copy just the sections touched not the entire info
4845 * since not all sections are valid as returned by
4848 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4849 memcpy(&vsi->info.queue_mapping,
4850 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4851 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4852 sizeof(vsi->info.tc_mapping));
4856 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4857 * @vsi: VSI to be configured
4858 * @enabled_tc: TC bitmap
4860 * This configures a particular VSI for TCs that are mapped to the
4861 * given TC bitmap. It uses default bandwidth share for TCs across
4862 * VSIs to configure TC for a particular VSI.
4865 * It is expected that the VSI queues have been quisced before calling
4868 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4870 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4871 struct i40e_vsi_context ctxt;
4875 /* Check if enabled_tc is same as existing or new TCs */
4876 if (vsi->tc_config.enabled_tc == enabled_tc)
4879 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4880 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4881 if (enabled_tc & BIT(i))
4885 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4887 dev_info(&vsi->back->pdev->dev,
4888 "Failed configuring TC map %d for VSI %d\n",
4889 enabled_tc, vsi->seid);
4893 /* Update Queue Pairs Mapping for currently enabled UPs */
4894 ctxt.seid = vsi->seid;
4895 ctxt.pf_num = vsi->back->hw.pf_id;
4897 ctxt.uplink_seid = vsi->uplink_seid;
4898 ctxt.info = vsi->info;
4899 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4901 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
4902 ctxt.info.valid_sections |=
4903 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
4904 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
4907 /* Update the VSI after updating the VSI queue-mapping information */
4908 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4910 dev_info(&vsi->back->pdev->dev,
4911 "Update vsi tc config failed, err %s aq_err %s\n",
4912 i40e_stat_str(&vsi->back->hw, ret),
4913 i40e_aq_str(&vsi->back->hw,
4914 vsi->back->hw.aq.asq_last_status));
4917 /* update the local VSI info with updated queue map */
4918 i40e_vsi_update_queue_map(vsi, &ctxt);
4919 vsi->info.valid_sections = 0;
4921 /* Update current VSI BW information */
4922 ret = i40e_vsi_get_bw_info(vsi);
4924 dev_info(&vsi->back->pdev->dev,
4925 "Failed updating vsi bw info, err %s aq_err %s\n",
4926 i40e_stat_str(&vsi->back->hw, ret),
4927 i40e_aq_str(&vsi->back->hw,
4928 vsi->back->hw.aq.asq_last_status));
4932 /* Update the netdev TC setup */
4933 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4939 * i40e_veb_config_tc - Configure TCs for given VEB
4941 * @enabled_tc: TC bitmap
4943 * Configures given TC bitmap for VEB (switching) element
4945 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4947 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4948 struct i40e_pf *pf = veb->pf;
4952 /* No TCs or already enabled TCs just return */
4953 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4956 bw_data.tc_valid_bits = enabled_tc;
4957 /* bw_data.absolute_credits is not set (relative) */
4959 /* Enable ETS TCs with equal BW Share for now */
4960 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4961 if (enabled_tc & BIT(i))
4962 bw_data.tc_bw_share_credits[i] = 1;
4965 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4968 dev_info(&pf->pdev->dev,
4969 "VEB bw config failed, err %s aq_err %s\n",
4970 i40e_stat_str(&pf->hw, ret),
4971 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4975 /* Update the BW information */
4976 ret = i40e_veb_get_bw_info(veb);
4978 dev_info(&pf->pdev->dev,
4979 "Failed getting veb bw config, err %s aq_err %s\n",
4980 i40e_stat_str(&pf->hw, ret),
4981 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4988 #ifdef CONFIG_I40E_DCB
4990 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4993 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4994 * the caller would've quiesce all the VSIs before calling
4997 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
5003 /* Enable the TCs available on PF to all VEBs */
5004 tc_map = i40e_pf_get_tc_map(pf);
5005 for (v = 0; v < I40E_MAX_VEB; v++) {
5008 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
5010 dev_info(&pf->pdev->dev,
5011 "Failed configuring TC for VEB seid=%d\n",
5013 /* Will try to configure as many components */
5017 /* Update each VSI */
5018 for (v = 0; v < pf->num_alloc_vsi; v++) {
5022 /* - Enable all TCs for the LAN VSI
5024 * - For FCoE VSI only enable the TC configured
5025 * as per the APP TLV
5027 * - For all others keep them at TC0 for now
5029 if (v == pf->lan_vsi)
5030 tc_map = i40e_pf_get_tc_map(pf);
5032 tc_map = i40e_pf_get_default_tc(pf);
5034 if (pf->vsi[v]->type == I40E_VSI_FCOE)
5035 tc_map = i40e_get_fcoe_tc_map(pf);
5036 #endif /* #ifdef I40E_FCOE */
5038 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
5040 dev_info(&pf->pdev->dev,
5041 "Failed configuring TC for VSI seid=%d\n",
5043 /* Will try to configure as many components */
5045 /* Re-configure VSI vectors based on updated TC map */
5046 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
5047 if (pf->vsi[v]->netdev)
5048 i40e_dcbnl_set_all(pf->vsi[v]);
5054 * i40e_resume_port_tx - Resume port Tx
5057 * Resume a port's Tx and issue a PF reset in case of failure to
5060 static int i40e_resume_port_tx(struct i40e_pf *pf)
5062 struct i40e_hw *hw = &pf->hw;
5065 ret = i40e_aq_resume_port_tx(hw, NULL);
5067 dev_info(&pf->pdev->dev,
5068 "Resume Port Tx failed, err %s aq_err %s\n",
5069 i40e_stat_str(&pf->hw, ret),
5070 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5071 /* Schedule PF reset to recover */
5072 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5073 i40e_service_event_schedule(pf);
5080 * i40e_init_pf_dcb - Initialize DCB configuration
5081 * @pf: PF being configured
5083 * Query the current DCB configuration and cache it
5084 * in the hardware structure
5086 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5088 struct i40e_hw *hw = &pf->hw;
5091 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5092 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5095 /* Get the initial DCB configuration */
5096 err = i40e_init_dcb(hw);
5098 /* Device/Function is not DCBX capable */
5099 if ((!hw->func_caps.dcb) ||
5100 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5101 dev_info(&pf->pdev->dev,
5102 "DCBX offload is not supported or is disabled for this PF.\n");
5104 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5108 /* When status is not DISABLED then DCBX in FW */
5109 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5110 DCB_CAP_DCBX_VER_IEEE;
5112 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5113 /* Enable DCB tagging only when more than one TC
5114 * or explicitly disable if only one TC
5116 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5117 pf->flags |= I40E_FLAG_DCB_ENABLED;
5119 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5120 dev_dbg(&pf->pdev->dev,
5121 "DCBX offload is supported for this PF.\n");
5124 dev_info(&pf->pdev->dev,
5125 "Query for DCB configuration failed, err %s aq_err %s\n",
5126 i40e_stat_str(&pf->hw, err),
5127 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5133 #endif /* CONFIG_I40E_DCB */
5134 #define SPEED_SIZE 14
5137 * i40e_print_link_message - print link up or down
5138 * @vsi: the VSI for which link needs a message
5140 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5142 char *speed = "Unknown";
5143 char *fc = "Unknown";
5145 if (vsi->current_isup == isup)
5147 vsi->current_isup = isup;
5149 netdev_info(vsi->netdev, "NIC Link is Down\n");
5153 /* Warn user if link speed on NPAR enabled partition is not at
5156 if (vsi->back->hw.func_caps.npar_enable &&
5157 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5158 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5159 netdev_warn(vsi->netdev,
5160 "The partition detected link speed that is less than 10Gbps\n");
5162 switch (vsi->back->hw.phy.link_info.link_speed) {
5163 case I40E_LINK_SPEED_40GB:
5166 case I40E_LINK_SPEED_20GB:
5169 case I40E_LINK_SPEED_10GB:
5172 case I40E_LINK_SPEED_1GB:
5175 case I40E_LINK_SPEED_100MB:
5182 switch (vsi->back->hw.fc.current_mode) {
5186 case I40E_FC_TX_PAUSE:
5189 case I40E_FC_RX_PAUSE:
5197 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5202 * i40e_up_complete - Finish the last steps of bringing up a connection
5203 * @vsi: the VSI being configured
5205 static int i40e_up_complete(struct i40e_vsi *vsi)
5207 struct i40e_pf *pf = vsi->back;
5210 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5211 i40e_vsi_configure_msix(vsi);
5213 i40e_configure_msi_and_legacy(vsi);
5216 err = i40e_vsi_control_rings(vsi, true);
5220 clear_bit(__I40E_DOWN, &vsi->state);
5221 i40e_napi_enable_all(vsi);
5222 i40e_vsi_enable_irq(vsi);
5224 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5226 i40e_print_link_message(vsi, true);
5227 netif_tx_start_all_queues(vsi->netdev);
5228 netif_carrier_on(vsi->netdev);
5229 } else if (vsi->netdev) {
5230 i40e_print_link_message(vsi, false);
5231 /* need to check for qualified module here*/
5232 if ((pf->hw.phy.link_info.link_info &
5233 I40E_AQ_MEDIA_AVAILABLE) &&
5234 (!(pf->hw.phy.link_info.an_info &
5235 I40E_AQ_QUALIFIED_MODULE)))
5236 netdev_err(vsi->netdev,
5237 "the driver failed to link because an unqualified module was detected.");
5240 /* replay FDIR SB filters */
5241 if (vsi->type == I40E_VSI_FDIR) {
5242 /* reset fd counters */
5243 pf->fd_add_err = pf->fd_atr_cnt = 0;
5244 if (pf->fd_tcp_rule > 0) {
5245 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
5246 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5247 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5248 pf->fd_tcp_rule = 0;
5250 i40e_fdir_filter_restore(vsi);
5253 /* On the next run of the service_task, notify any clients of the new
5256 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5257 i40e_service_event_schedule(pf);
5263 * i40e_vsi_reinit_locked - Reset the VSI
5264 * @vsi: the VSI being configured
5266 * Rebuild the ring structs after some configuration
5267 * has changed, e.g. MTU size.
5269 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5271 struct i40e_pf *pf = vsi->back;
5273 WARN_ON(in_interrupt());
5274 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5275 usleep_range(1000, 2000);
5279 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5283 * i40e_up - Bring the connection back up after being down
5284 * @vsi: the VSI being configured
5286 int i40e_up(struct i40e_vsi *vsi)
5290 err = i40e_vsi_configure(vsi);
5292 err = i40e_up_complete(vsi);
5298 * i40e_down - Shutdown the connection processing
5299 * @vsi: the VSI being stopped
5301 void i40e_down(struct i40e_vsi *vsi)
5305 /* It is assumed that the caller of this function
5306 * sets the vsi->state __I40E_DOWN bit.
5309 netif_carrier_off(vsi->netdev);
5310 netif_tx_disable(vsi->netdev);
5312 i40e_vsi_disable_irq(vsi);
5313 i40e_vsi_control_rings(vsi, false);
5314 i40e_napi_disable_all(vsi);
5316 for (i = 0; i < vsi->num_queue_pairs; i++) {
5317 i40e_clean_tx_ring(vsi->tx_rings[i]);
5318 i40e_clean_rx_ring(vsi->rx_rings[i]);
5321 i40e_notify_client_of_netdev_close(vsi, false);
5326 * i40e_setup_tc - configure multiple traffic classes
5327 * @netdev: net device to configure
5328 * @tc: number of traffic classes to enable
5330 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5332 struct i40e_netdev_priv *np = netdev_priv(netdev);
5333 struct i40e_vsi *vsi = np->vsi;
5334 struct i40e_pf *pf = vsi->back;
5339 /* Check if DCB enabled to continue */
5340 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5341 netdev_info(netdev, "DCB is not enabled for adapter\n");
5345 /* Check if MFP enabled */
5346 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5347 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5351 /* Check whether tc count is within enabled limit */
5352 if (tc > i40e_pf_get_num_tc(pf)) {
5353 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5357 /* Generate TC map for number of tc requested */
5358 for (i = 0; i < tc; i++)
5359 enabled_tc |= BIT(i);
5361 /* Requesting same TC configuration as already enabled */
5362 if (enabled_tc == vsi->tc_config.enabled_tc)
5365 /* Quiesce VSI queues */
5366 i40e_quiesce_vsi(vsi);
5368 /* Configure VSI for enabled TCs */
5369 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5371 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5377 i40e_unquiesce_vsi(vsi);
5384 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5385 struct tc_to_netdev *tc)
5387 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5388 struct tc_to_netdev *tc)
5391 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5393 return i40e_setup_tc(netdev, tc->tc);
5397 * i40e_open - Called when a network interface is made active
5398 * @netdev: network interface device structure
5400 * The open entry point is called when a network interface is made
5401 * active by the system (IFF_UP). At this point all resources needed
5402 * for transmit and receive operations are allocated, the interrupt
5403 * handler is registered with the OS, the netdev watchdog subtask is
5404 * enabled, and the stack is notified that the interface is ready.
5406 * Returns 0 on success, negative value on failure
5408 int i40e_open(struct net_device *netdev)
5410 struct i40e_netdev_priv *np = netdev_priv(netdev);
5411 struct i40e_vsi *vsi = np->vsi;
5412 struct i40e_pf *pf = vsi->back;
5415 /* disallow open during test or if eeprom is broken */
5416 if (test_bit(__I40E_TESTING, &pf->state) ||
5417 test_bit(__I40E_BAD_EEPROM, &pf->state))
5420 netif_carrier_off(netdev);
5422 err = i40e_vsi_open(vsi);
5426 /* configure global TSO hardware offload settings */
5427 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5428 TCP_FLAG_FIN) >> 16);
5429 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5431 TCP_FLAG_CWR) >> 16);
5432 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5434 udp_tunnel_get_rx_info(netdev);
5441 * @vsi: the VSI to open
5443 * Finish initialization of the VSI.
5445 * Returns 0 on success, negative value on failure
5447 int i40e_vsi_open(struct i40e_vsi *vsi)
5449 struct i40e_pf *pf = vsi->back;
5450 char int_name[I40E_INT_NAME_STR_LEN];
5453 /* allocate descriptors */
5454 err = i40e_vsi_setup_tx_resources(vsi);
5457 err = i40e_vsi_setup_rx_resources(vsi);
5461 err = i40e_vsi_configure(vsi);
5466 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5467 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5468 err = i40e_vsi_request_irq(vsi, int_name);
5472 /* Notify the stack of the actual queue counts. */
5473 err = netif_set_real_num_tx_queues(vsi->netdev,
5474 vsi->num_queue_pairs);
5476 goto err_set_queues;
5478 err = netif_set_real_num_rx_queues(vsi->netdev,
5479 vsi->num_queue_pairs);
5481 goto err_set_queues;
5483 } else if (vsi->type == I40E_VSI_FDIR) {
5484 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5485 dev_driver_string(&pf->pdev->dev),
5486 dev_name(&pf->pdev->dev));
5487 err = i40e_vsi_request_irq(vsi, int_name);
5494 err = i40e_up_complete(vsi);
5496 goto err_up_complete;
5503 i40e_vsi_free_irq(vsi);
5505 i40e_vsi_free_rx_resources(vsi);
5507 i40e_vsi_free_tx_resources(vsi);
5508 if (vsi == pf->vsi[pf->lan_vsi])
5509 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5515 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5516 * @pf: Pointer to PF
5518 * This function destroys the hlist where all the Flow Director
5519 * filters were saved.
5521 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5523 struct i40e_fdir_filter *filter;
5524 struct hlist_node *node2;
5526 hlist_for_each_entry_safe(filter, node2,
5527 &pf->fdir_filter_list, fdir_node) {
5528 hlist_del(&filter->fdir_node);
5531 pf->fdir_pf_active_filters = 0;
5535 * i40e_close - Disables a network interface
5536 * @netdev: network interface device structure
5538 * The close entry point is called when an interface is de-activated
5539 * by the OS. The hardware is still under the driver's control, but
5540 * this netdev interface is disabled.
5542 * Returns 0, this is not allowed to fail
5544 int i40e_close(struct net_device *netdev)
5546 struct i40e_netdev_priv *np = netdev_priv(netdev);
5547 struct i40e_vsi *vsi = np->vsi;
5549 i40e_vsi_close(vsi);
5555 * i40e_do_reset - Start a PF or Core Reset sequence
5556 * @pf: board private structure
5557 * @reset_flags: which reset is requested
5559 * The essential difference in resets is that the PF Reset
5560 * doesn't clear the packet buffers, doesn't reset the PE
5561 * firmware, and doesn't bother the other PFs on the chip.
5563 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5567 WARN_ON(in_interrupt());
5570 /* do the biggest reset indicated */
5571 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5573 /* Request a Global Reset
5575 * This will start the chip's countdown to the actual full
5576 * chip reset event, and a warning interrupt to be sent
5577 * to all PFs, including the requestor. Our handler
5578 * for the warning interrupt will deal with the shutdown
5579 * and recovery of the switch setup.
5581 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5582 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5583 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5584 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5586 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5588 /* Request a Core Reset
5590 * Same as Global Reset, except does *not* include the MAC/PHY
5592 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5593 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5594 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5595 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5596 i40e_flush(&pf->hw);
5598 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5600 /* Request a PF Reset
5602 * Resets only the PF-specific registers
5604 * This goes directly to the tear-down and rebuild of
5605 * the switch, since we need to do all the recovery as
5606 * for the Core Reset.
5608 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5609 i40e_handle_reset_warning(pf);
5611 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5614 /* Find the VSI(s) that requested a re-init */
5615 dev_info(&pf->pdev->dev,
5616 "VSI reinit requested\n");
5617 for (v = 0; v < pf->num_alloc_vsi; v++) {
5618 struct i40e_vsi *vsi = pf->vsi[v];
5621 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5622 i40e_vsi_reinit_locked(pf->vsi[v]);
5623 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5626 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5629 /* Find the VSI(s) that needs to be brought down */
5630 dev_info(&pf->pdev->dev, "VSI down requested\n");
5631 for (v = 0; v < pf->num_alloc_vsi; v++) {
5632 struct i40e_vsi *vsi = pf->vsi[v];
5635 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5636 set_bit(__I40E_DOWN, &vsi->state);
5638 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5642 dev_info(&pf->pdev->dev,
5643 "bad reset request 0x%08x\n", reset_flags);
5647 #ifdef CONFIG_I40E_DCB
5649 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5650 * @pf: board private structure
5651 * @old_cfg: current DCB config
5652 * @new_cfg: new DCB config
5654 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5655 struct i40e_dcbx_config *old_cfg,
5656 struct i40e_dcbx_config *new_cfg)
5658 bool need_reconfig = false;
5660 /* Check if ETS configuration has changed */
5661 if (memcmp(&new_cfg->etscfg,
5663 sizeof(new_cfg->etscfg))) {
5664 /* If Priority Table has changed reconfig is needed */
5665 if (memcmp(&new_cfg->etscfg.prioritytable,
5666 &old_cfg->etscfg.prioritytable,
5667 sizeof(new_cfg->etscfg.prioritytable))) {
5668 need_reconfig = true;
5669 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5672 if (memcmp(&new_cfg->etscfg.tcbwtable,
5673 &old_cfg->etscfg.tcbwtable,
5674 sizeof(new_cfg->etscfg.tcbwtable)))
5675 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5677 if (memcmp(&new_cfg->etscfg.tsatable,
5678 &old_cfg->etscfg.tsatable,
5679 sizeof(new_cfg->etscfg.tsatable)))
5680 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5683 /* Check if PFC configuration has changed */
5684 if (memcmp(&new_cfg->pfc,
5686 sizeof(new_cfg->pfc))) {
5687 need_reconfig = true;
5688 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5691 /* Check if APP Table has changed */
5692 if (memcmp(&new_cfg->app,
5694 sizeof(new_cfg->app))) {
5695 need_reconfig = true;
5696 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5699 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5700 return need_reconfig;
5704 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5705 * @pf: board private structure
5706 * @e: event info posted on ARQ
5708 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5709 struct i40e_arq_event_info *e)
5711 struct i40e_aqc_lldp_get_mib *mib =
5712 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5713 struct i40e_hw *hw = &pf->hw;
5714 struct i40e_dcbx_config tmp_dcbx_cfg;
5715 bool need_reconfig = false;
5719 /* Not DCB capable or capability disabled */
5720 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5723 /* Ignore if event is not for Nearest Bridge */
5724 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5725 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5726 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5727 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5730 /* Check MIB Type and return if event for Remote MIB update */
5731 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5732 dev_dbg(&pf->pdev->dev,
5733 "LLDP event mib type %s\n", type ? "remote" : "local");
5734 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5735 /* Update the remote cached instance and return */
5736 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5737 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5738 &hw->remote_dcbx_config);
5742 /* Store the old configuration */
5743 tmp_dcbx_cfg = hw->local_dcbx_config;
5745 /* Reset the old DCBx configuration data */
5746 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5747 /* Get updated DCBX data from firmware */
5748 ret = i40e_get_dcb_config(&pf->hw);
5750 dev_info(&pf->pdev->dev,
5751 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5752 i40e_stat_str(&pf->hw, ret),
5753 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5757 /* No change detected in DCBX configs */
5758 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5759 sizeof(tmp_dcbx_cfg))) {
5760 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5764 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5765 &hw->local_dcbx_config);
5767 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5772 /* Enable DCB tagging only when more than one TC */
5773 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5774 pf->flags |= I40E_FLAG_DCB_ENABLED;
5776 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5778 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5779 /* Reconfiguration needed quiesce all VSIs */
5780 i40e_pf_quiesce_all_vsi(pf);
5782 /* Changes in configuration update VEB/VSI */
5783 i40e_dcb_reconfigure(pf);
5785 ret = i40e_resume_port_tx(pf);
5787 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5788 /* In case of error no point in resuming VSIs */
5792 /* Wait for the PF's queues to be disabled */
5793 ret = i40e_pf_wait_queues_disabled(pf);
5795 /* Schedule PF reset to recover */
5796 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5797 i40e_service_event_schedule(pf);
5799 i40e_pf_unquiesce_all_vsi(pf);
5800 /* Notify the client for the DCB changes */
5801 i40e_notify_client_of_l2_param_changes(pf->vsi[pf->lan_vsi]);
5807 #endif /* CONFIG_I40E_DCB */
5810 * i40e_do_reset_safe - Protected reset path for userland calls.
5811 * @pf: board private structure
5812 * @reset_flags: which reset is requested
5815 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5818 i40e_do_reset(pf, reset_flags);
5823 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5824 * @pf: board private structure
5825 * @e: event info posted on ARQ
5827 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5830 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5831 struct i40e_arq_event_info *e)
5833 struct i40e_aqc_lan_overflow *data =
5834 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5835 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5836 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5837 struct i40e_hw *hw = &pf->hw;
5841 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5844 /* Queue belongs to VF, find the VF and issue VF reset */
5845 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5846 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5847 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5848 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5849 vf_id -= hw->func_caps.vf_base_id;
5850 vf = &pf->vf[vf_id];
5851 i40e_vc_notify_vf_reset(vf);
5852 /* Allow VF to process pending reset notification */
5854 i40e_reset_vf(vf, false);
5859 * i40e_service_event_complete - Finish up the service event
5860 * @pf: board private structure
5862 static void i40e_service_event_complete(struct i40e_pf *pf)
5864 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5866 /* flush memory to make sure state is correct before next watchog */
5867 smp_mb__before_atomic();
5868 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5872 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5873 * @pf: board private structure
5875 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5879 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5880 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5885 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5886 * @pf: board private structure
5888 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5892 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5893 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5894 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5895 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5900 * i40e_get_global_fd_count - Get total FD filters programmed on device
5901 * @pf: board private structure
5903 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5907 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5908 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5909 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5910 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5915 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5916 * @pf: board private structure
5918 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5920 struct i40e_fdir_filter *filter;
5921 u32 fcnt_prog, fcnt_avail;
5922 struct hlist_node *node;
5924 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5927 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5930 fcnt_prog = i40e_get_global_fd_count(pf);
5931 fcnt_avail = pf->fdir_pf_filter_count;
5932 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5933 (pf->fd_add_err == 0) ||
5934 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5935 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5936 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5937 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5938 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5939 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5943 /* Wait for some more space to be available to turn on ATR. We also
5944 * must check that no existing ntuple rules for TCP are in effect
5946 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5947 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5948 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED) &&
5949 (pf->fd_tcp_rule == 0)) {
5950 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5951 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5952 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
5956 /* if hw had a problem adding a filter, delete it */
5957 if (pf->fd_inv > 0) {
5958 hlist_for_each_entry_safe(filter, node,
5959 &pf->fdir_filter_list, fdir_node) {
5960 if (filter->fd_id == pf->fd_inv) {
5961 hlist_del(&filter->fdir_node);
5963 pf->fdir_pf_active_filters--;
5969 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5970 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5972 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5973 * @pf: board private structure
5975 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5977 unsigned long min_flush_time;
5978 int flush_wait_retry = 50;
5979 bool disable_atr = false;
5983 if (!time_after(jiffies, pf->fd_flush_timestamp +
5984 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5987 /* If the flush is happening too quick and we have mostly SB rules we
5988 * should not re-enable ATR for some time.
5990 min_flush_time = pf->fd_flush_timestamp +
5991 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5992 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5994 if (!(time_after(jiffies, min_flush_time)) &&
5995 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5996 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5997 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
6001 pf->fd_flush_timestamp = jiffies;
6002 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
6003 /* flush all filters */
6004 wr32(&pf->hw, I40E_PFQF_CTL_1,
6005 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
6006 i40e_flush(&pf->hw);
6010 /* Check FD flush status every 5-6msec */
6011 usleep_range(5000, 6000);
6012 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
6013 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
6015 } while (flush_wait_retry--);
6016 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
6017 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
6019 /* replay sideband filters */
6020 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
6022 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6023 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
6024 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6025 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
6030 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
6031 * @pf: board private structure
6033 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
6035 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
6038 /* We can see up to 256 filter programming desc in transit if the filters are
6039 * being applied really fast; before we see the first
6040 * filter miss error on Rx queue 0. Accumulating enough error messages before
6041 * reacting will make sure we don't cause flush too often.
6043 #define I40E_MAX_FD_PROGRAM_ERROR 256
6046 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6047 * @pf: board private structure
6049 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6052 /* if interface is down do nothing */
6053 if (test_bit(__I40E_DOWN, &pf->state))
6056 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6057 i40e_fdir_flush_and_replay(pf);
6059 i40e_fdir_check_and_reenable(pf);
6064 * i40e_vsi_link_event - notify VSI of a link event
6065 * @vsi: vsi to be notified
6066 * @link_up: link up or down
6068 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6070 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6073 switch (vsi->type) {
6078 if (!vsi->netdev || !vsi->netdev_registered)
6082 netif_carrier_on(vsi->netdev);
6083 netif_tx_wake_all_queues(vsi->netdev);
6085 netif_carrier_off(vsi->netdev);
6086 netif_tx_stop_all_queues(vsi->netdev);
6090 case I40E_VSI_SRIOV:
6091 case I40E_VSI_VMDQ2:
6093 case I40E_VSI_IWARP:
6094 case I40E_VSI_MIRROR:
6096 /* there is no notification for other VSIs */
6102 * i40e_veb_link_event - notify elements on the veb of a link event
6103 * @veb: veb to be notified
6104 * @link_up: link up or down
6106 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6111 if (!veb || !veb->pf)
6115 /* depth first... */
6116 for (i = 0; i < I40E_MAX_VEB; i++)
6117 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6118 i40e_veb_link_event(pf->veb[i], link_up);
6120 /* ... now the local VSIs */
6121 for (i = 0; i < pf->num_alloc_vsi; i++)
6122 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6123 i40e_vsi_link_event(pf->vsi[i], link_up);
6127 * i40e_link_event - Update netif_carrier status
6128 * @pf: board private structure
6130 static void i40e_link_event(struct i40e_pf *pf)
6132 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6133 u8 new_link_speed, old_link_speed;
6135 bool new_link, old_link;
6137 /* save off old link status information */
6138 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6140 /* set this to force the get_link_status call to refresh state */
6141 pf->hw.phy.get_link_info = true;
6143 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6145 status = i40e_get_link_status(&pf->hw, &new_link);
6147 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6152 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6153 new_link_speed = pf->hw.phy.link_info.link_speed;
6155 if (new_link == old_link &&
6156 new_link_speed == old_link_speed &&
6157 (test_bit(__I40E_DOWN, &vsi->state) ||
6158 new_link == netif_carrier_ok(vsi->netdev)))
6161 if (!test_bit(__I40E_DOWN, &vsi->state))
6162 i40e_print_link_message(vsi, new_link);
6164 /* Notify the base of the switch tree connected to
6165 * the link. Floating VEBs are not notified.
6167 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6168 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6170 i40e_vsi_link_event(vsi, new_link);
6173 i40e_vc_notify_link_state(pf);
6175 if (pf->flags & I40E_FLAG_PTP)
6176 i40e_ptp_set_increment(pf);
6180 * i40e_watchdog_subtask - periodic checks not using event driven response
6181 * @pf: board private structure
6183 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6187 /* if interface is down do nothing */
6188 if (test_bit(__I40E_DOWN, &pf->state) ||
6189 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6192 /* make sure we don't do these things too often */
6193 if (time_before(jiffies, (pf->service_timer_previous +
6194 pf->service_timer_period)))
6196 pf->service_timer_previous = jiffies;
6198 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6199 i40e_link_event(pf);
6201 /* Update the stats for active netdevs so the network stack
6202 * can look at updated numbers whenever it cares to
6204 for (i = 0; i < pf->num_alloc_vsi; i++)
6205 if (pf->vsi[i] && pf->vsi[i]->netdev)
6206 i40e_update_stats(pf->vsi[i]);
6208 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6209 /* Update the stats for the active switching components */
6210 for (i = 0; i < I40E_MAX_VEB; i++)
6212 i40e_update_veb_stats(pf->veb[i]);
6215 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6219 * i40e_reset_subtask - Set up for resetting the device and driver
6220 * @pf: board private structure
6222 static void i40e_reset_subtask(struct i40e_pf *pf)
6224 u32 reset_flags = 0;
6227 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6228 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6229 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6231 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6232 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6233 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6235 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6236 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6237 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6239 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6240 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6241 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6243 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6244 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6245 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6248 /* If there's a recovery already waiting, it takes
6249 * precedence before starting a new reset sequence.
6251 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6252 i40e_handle_reset_warning(pf);
6256 /* If we're already down or resetting, just bail */
6258 !test_bit(__I40E_DOWN, &pf->state) &&
6259 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6260 i40e_do_reset(pf, reset_flags);
6267 * i40e_handle_link_event - Handle link event
6268 * @pf: board private structure
6269 * @e: event info posted on ARQ
6271 static void i40e_handle_link_event(struct i40e_pf *pf,
6272 struct i40e_arq_event_info *e)
6274 struct i40e_aqc_get_link_status *status =
6275 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6277 /* Do a new status request to re-enable LSE reporting
6278 * and load new status information into the hw struct
6279 * This completely ignores any state information
6280 * in the ARQ event info, instead choosing to always
6281 * issue the AQ update link status command.
6283 i40e_link_event(pf);
6285 /* check for unqualified module, if link is down */
6286 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6287 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6288 (!(status->link_info & I40E_AQ_LINK_UP)))
6289 dev_err(&pf->pdev->dev,
6290 "The driver failed to link because an unqualified module was detected.\n");
6294 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6295 * @pf: board private structure
6297 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6299 struct i40e_arq_event_info event;
6300 struct i40e_hw *hw = &pf->hw;
6307 /* Do not run clean AQ when PF reset fails */
6308 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6311 /* check for error indications */
6312 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6314 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6315 if (hw->debug_mask & I40E_DEBUG_AQ)
6316 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6317 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6319 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6320 if (hw->debug_mask & I40E_DEBUG_AQ)
6321 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6322 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6323 pf->arq_overflows++;
6325 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6326 if (hw->debug_mask & I40E_DEBUG_AQ)
6327 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6328 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6331 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6333 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6335 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6336 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6337 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6338 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6340 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6341 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6342 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6343 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6345 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6346 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6347 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6348 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6351 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6353 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6354 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6359 ret = i40e_clean_arq_element(hw, &event, &pending);
6360 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6363 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6367 opcode = le16_to_cpu(event.desc.opcode);
6370 case i40e_aqc_opc_get_link_status:
6371 i40e_handle_link_event(pf, &event);
6373 case i40e_aqc_opc_send_msg_to_pf:
6374 ret = i40e_vc_process_vf_msg(pf,
6375 le16_to_cpu(event.desc.retval),
6376 le32_to_cpu(event.desc.cookie_high),
6377 le32_to_cpu(event.desc.cookie_low),
6381 case i40e_aqc_opc_lldp_update_mib:
6382 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6383 #ifdef CONFIG_I40E_DCB
6385 ret = i40e_handle_lldp_event(pf, &event);
6387 #endif /* CONFIG_I40E_DCB */
6389 case i40e_aqc_opc_event_lan_overflow:
6390 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6391 i40e_handle_lan_overflow_event(pf, &event);
6393 case i40e_aqc_opc_send_msg_to_peer:
6394 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6396 case i40e_aqc_opc_nvm_erase:
6397 case i40e_aqc_opc_nvm_update:
6398 case i40e_aqc_opc_oem_post_update:
6399 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6400 "ARQ NVM operation 0x%04x completed\n",
6404 dev_info(&pf->pdev->dev,
6405 "ARQ: Unknown event 0x%04x ignored\n",
6409 } while (pending && (i++ < pf->adminq_work_limit));
6411 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6412 /* re-enable Admin queue interrupt cause */
6413 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6414 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6415 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6418 kfree(event.msg_buf);
6422 * i40e_verify_eeprom - make sure eeprom is good to use
6423 * @pf: board private structure
6425 static void i40e_verify_eeprom(struct i40e_pf *pf)
6429 err = i40e_diag_eeprom_test(&pf->hw);
6431 /* retry in case of garbage read */
6432 err = i40e_diag_eeprom_test(&pf->hw);
6434 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6436 set_bit(__I40E_BAD_EEPROM, &pf->state);
6440 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6441 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6442 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6447 * i40e_enable_pf_switch_lb
6448 * @pf: pointer to the PF structure
6450 * enable switch loop back or die - no point in a return value
6452 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6454 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6455 struct i40e_vsi_context ctxt;
6458 ctxt.seid = pf->main_vsi_seid;
6459 ctxt.pf_num = pf->hw.pf_id;
6461 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6463 dev_info(&pf->pdev->dev,
6464 "couldn't get PF vsi config, err %s aq_err %s\n",
6465 i40e_stat_str(&pf->hw, ret),
6466 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6469 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6470 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6471 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6473 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6475 dev_info(&pf->pdev->dev,
6476 "update vsi switch failed, err %s aq_err %s\n",
6477 i40e_stat_str(&pf->hw, ret),
6478 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6483 * i40e_disable_pf_switch_lb
6484 * @pf: pointer to the PF structure
6486 * disable switch loop back or die - no point in a return value
6488 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6490 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6491 struct i40e_vsi_context ctxt;
6494 ctxt.seid = pf->main_vsi_seid;
6495 ctxt.pf_num = pf->hw.pf_id;
6497 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6499 dev_info(&pf->pdev->dev,
6500 "couldn't get PF vsi config, err %s aq_err %s\n",
6501 i40e_stat_str(&pf->hw, ret),
6502 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6505 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6506 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6507 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6509 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6511 dev_info(&pf->pdev->dev,
6512 "update vsi switch failed, err %s aq_err %s\n",
6513 i40e_stat_str(&pf->hw, ret),
6514 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6519 * i40e_config_bridge_mode - Configure the HW bridge mode
6520 * @veb: pointer to the bridge instance
6522 * Configure the loop back mode for the LAN VSI that is downlink to the
6523 * specified HW bridge instance. It is expected this function is called
6524 * when a new HW bridge is instantiated.
6526 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6528 struct i40e_pf *pf = veb->pf;
6530 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6531 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6532 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6533 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6534 i40e_disable_pf_switch_lb(pf);
6536 i40e_enable_pf_switch_lb(pf);
6540 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6541 * @veb: pointer to the VEB instance
6543 * This is a recursive function that first builds the attached VSIs then
6544 * recurses in to build the next layer of VEB. We track the connections
6545 * through our own index numbers because the seid's from the HW could
6546 * change across the reset.
6548 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6550 struct i40e_vsi *ctl_vsi = NULL;
6551 struct i40e_pf *pf = veb->pf;
6555 /* build VSI that owns this VEB, temporarily attached to base VEB */
6556 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6558 pf->vsi[v]->veb_idx == veb->idx &&
6559 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6560 ctl_vsi = pf->vsi[v];
6565 dev_info(&pf->pdev->dev,
6566 "missing owner VSI for veb_idx %d\n", veb->idx);
6568 goto end_reconstitute;
6570 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6571 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6572 ret = i40e_add_vsi(ctl_vsi);
6574 dev_info(&pf->pdev->dev,
6575 "rebuild of veb_idx %d owner VSI failed: %d\n",
6577 goto end_reconstitute;
6579 i40e_vsi_reset_stats(ctl_vsi);
6581 /* create the VEB in the switch and move the VSI onto the VEB */
6582 ret = i40e_add_veb(veb, ctl_vsi);
6584 goto end_reconstitute;
6586 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6587 veb->bridge_mode = BRIDGE_MODE_VEB;
6589 veb->bridge_mode = BRIDGE_MODE_VEPA;
6590 i40e_config_bridge_mode(veb);
6592 /* create the remaining VSIs attached to this VEB */
6593 for (v = 0; v < pf->num_alloc_vsi; v++) {
6594 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6597 if (pf->vsi[v]->veb_idx == veb->idx) {
6598 struct i40e_vsi *vsi = pf->vsi[v];
6600 vsi->uplink_seid = veb->seid;
6601 ret = i40e_add_vsi(vsi);
6603 dev_info(&pf->pdev->dev,
6604 "rebuild of vsi_idx %d failed: %d\n",
6606 goto end_reconstitute;
6608 i40e_vsi_reset_stats(vsi);
6612 /* create any VEBs attached to this VEB - RECURSION */
6613 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6614 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6615 pf->veb[veb_idx]->uplink_seid = veb->seid;
6616 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6627 * i40e_get_capabilities - get info about the HW
6628 * @pf: the PF struct
6630 static int i40e_get_capabilities(struct i40e_pf *pf)
6632 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6637 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6639 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6643 /* this loads the data into the hw struct for us */
6644 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6646 i40e_aqc_opc_list_func_capabilities,
6648 /* data loaded, buffer no longer needed */
6651 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6652 /* retry with a larger buffer */
6653 buf_len = data_size;
6654 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6655 dev_info(&pf->pdev->dev,
6656 "capability discovery failed, err %s aq_err %s\n",
6657 i40e_stat_str(&pf->hw, err),
6658 i40e_aq_str(&pf->hw,
6659 pf->hw.aq.asq_last_status));
6664 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6665 dev_info(&pf->pdev->dev,
6666 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6667 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6668 pf->hw.func_caps.num_msix_vectors,
6669 pf->hw.func_caps.num_msix_vectors_vf,
6670 pf->hw.func_caps.fd_filters_guaranteed,
6671 pf->hw.func_caps.fd_filters_best_effort,
6672 pf->hw.func_caps.num_tx_qp,
6673 pf->hw.func_caps.num_vsis);
6675 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6676 + pf->hw.func_caps.num_vfs)
6677 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6678 dev_info(&pf->pdev->dev,
6679 "got num_vsis %d, setting num_vsis to %d\n",
6680 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6681 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6687 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6690 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6691 * @pf: board private structure
6693 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6695 struct i40e_vsi *vsi;
6698 /* quick workaround for an NVM issue that leaves a critical register
6701 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6702 static const u32 hkey[] = {
6703 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6704 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6705 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6708 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6709 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6712 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6715 /* find existing VSI and see if it needs configuring */
6717 for (i = 0; i < pf->num_alloc_vsi; i++) {
6718 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6724 /* create a new VSI if none exists */
6726 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6727 pf->vsi[pf->lan_vsi]->seid, 0);
6729 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6730 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6735 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6739 * i40e_fdir_teardown - release the Flow Director resources
6740 * @pf: board private structure
6742 static void i40e_fdir_teardown(struct i40e_pf *pf)
6746 i40e_fdir_filter_exit(pf);
6747 for (i = 0; i < pf->num_alloc_vsi; i++) {
6748 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6749 i40e_vsi_release(pf->vsi[i]);
6756 * i40e_prep_for_reset - prep for the core to reset
6757 * @pf: board private structure
6759 * Close up the VFs and other things in prep for PF Reset.
6761 static void i40e_prep_for_reset(struct i40e_pf *pf)
6763 struct i40e_hw *hw = &pf->hw;
6764 i40e_status ret = 0;
6767 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6768 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6770 if (i40e_check_asq_alive(&pf->hw))
6771 i40e_vc_notify_reset(pf);
6773 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6775 /* quiesce the VSIs and their queues that are not already DOWN */
6776 i40e_pf_quiesce_all_vsi(pf);
6778 for (v = 0; v < pf->num_alloc_vsi; v++) {
6780 pf->vsi[v]->seid = 0;
6783 i40e_shutdown_adminq(&pf->hw);
6785 /* call shutdown HMC */
6786 if (hw->hmc.hmc_obj) {
6787 ret = i40e_shutdown_lan_hmc(hw);
6789 dev_warn(&pf->pdev->dev,
6790 "shutdown_lan_hmc failed: %d\n", ret);
6795 * i40e_send_version - update firmware with driver version
6798 static void i40e_send_version(struct i40e_pf *pf)
6800 struct i40e_driver_version dv;
6802 dv.major_version = DRV_VERSION_MAJOR;
6803 dv.minor_version = DRV_VERSION_MINOR;
6804 dv.build_version = DRV_VERSION_BUILD;
6805 dv.subbuild_version = 0;
6806 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6807 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6811 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6812 * @pf: board private structure
6813 * @reinit: if the Main VSI needs to re-initialized.
6815 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6817 struct i40e_hw *hw = &pf->hw;
6818 u8 set_fc_aq_fail = 0;
6823 /* Now we wait for GRST to settle out.
6824 * We don't have to delete the VEBs or VSIs from the hw switch
6825 * because the reset will make them disappear.
6827 ret = i40e_pf_reset(hw);
6829 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6830 set_bit(__I40E_RESET_FAILED, &pf->state);
6831 goto clear_recovery;
6835 if (test_bit(__I40E_DOWN, &pf->state))
6836 goto clear_recovery;
6837 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6839 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6840 ret = i40e_init_adminq(&pf->hw);
6842 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6843 i40e_stat_str(&pf->hw, ret),
6844 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6845 goto clear_recovery;
6848 /* re-verify the eeprom if we just had an EMP reset */
6849 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6850 i40e_verify_eeprom(pf);
6852 i40e_clear_pxe_mode(hw);
6853 ret = i40e_get_capabilities(pf);
6855 goto end_core_reset;
6857 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6858 hw->func_caps.num_rx_qp,
6859 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6861 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6862 goto end_core_reset;
6864 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6866 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6867 goto end_core_reset;
6870 #ifdef CONFIG_I40E_DCB
6871 ret = i40e_init_pf_dcb(pf);
6873 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6874 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6875 /* Continue without DCB enabled */
6877 #endif /* CONFIG_I40E_DCB */
6879 i40e_init_pf_fcoe(pf);
6882 /* do basic switch setup */
6883 ret = i40e_setup_pf_switch(pf, reinit);
6885 goto end_core_reset;
6887 /* The driver only wants link up/down and module qualification
6888 * reports from firmware. Note the negative logic.
6890 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6891 ~(I40E_AQ_EVENT_LINK_UPDOWN |
6892 I40E_AQ_EVENT_MEDIA_NA |
6893 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
6895 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6896 i40e_stat_str(&pf->hw, ret),
6897 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6899 /* make sure our flow control settings are restored */
6900 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6902 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6903 i40e_stat_str(&pf->hw, ret),
6904 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6906 /* Rebuild the VSIs and VEBs that existed before reset.
6907 * They are still in our local switch element arrays, so only
6908 * need to rebuild the switch model in the HW.
6910 * If there were VEBs but the reconstitution failed, we'll try
6911 * try to recover minimal use by getting the basic PF VSI working.
6913 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6914 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6915 /* find the one VEB connected to the MAC, and find orphans */
6916 for (v = 0; v < I40E_MAX_VEB; v++) {
6920 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6921 pf->veb[v]->uplink_seid == 0) {
6922 ret = i40e_reconstitute_veb(pf->veb[v]);
6927 /* If Main VEB failed, we're in deep doodoo,
6928 * so give up rebuilding the switch and set up
6929 * for minimal rebuild of PF VSI.
6930 * If orphan failed, we'll report the error
6931 * but try to keep going.
6933 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6934 dev_info(&pf->pdev->dev,
6935 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6937 pf->vsi[pf->lan_vsi]->uplink_seid
6940 } else if (pf->veb[v]->uplink_seid == 0) {
6941 dev_info(&pf->pdev->dev,
6942 "rebuild of orphan VEB failed: %d\n",
6949 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6950 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6951 /* no VEB, so rebuild only the Main VSI */
6952 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6954 dev_info(&pf->pdev->dev,
6955 "rebuild of Main VSI failed: %d\n", ret);
6956 goto end_core_reset;
6960 /* Reconfigure hardware for allowing smaller MSS in the case
6961 * of TSO, so that we avoid the MDD being fired and causing
6962 * a reset in the case of small MSS+TSO.
6964 #define I40E_REG_MSS 0x000E64DC
6965 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6966 #define I40E_64BYTE_MSS 0x400000
6967 val = rd32(hw, I40E_REG_MSS);
6968 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6969 val &= ~I40E_REG_MSS_MIN_MASK;
6970 val |= I40E_64BYTE_MSS;
6971 wr32(hw, I40E_REG_MSS, val);
6974 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6976 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6978 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6979 i40e_stat_str(&pf->hw, ret),
6980 i40e_aq_str(&pf->hw,
6981 pf->hw.aq.asq_last_status));
6983 /* reinit the misc interrupt */
6984 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6985 ret = i40e_setup_misc_vector(pf);
6987 /* Add a filter to drop all Flow control frames from any VSI from being
6988 * transmitted. By doing so we stop a malicious VF from sending out
6989 * PAUSE or PFC frames and potentially controlling traffic for other
6991 * The FW can still send Flow control frames if enabled.
6993 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6996 /* restart the VSIs that were rebuilt and running before the reset */
6997 i40e_pf_unquiesce_all_vsi(pf);
6999 if (pf->num_alloc_vfs) {
7000 for (v = 0; v < pf->num_alloc_vfs; v++)
7001 i40e_reset_vf(&pf->vf[v], true);
7004 /* tell the firmware that we're starting */
7005 i40e_send_version(pf);
7008 clear_bit(__I40E_RESET_FAILED, &pf->state);
7010 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
7014 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
7015 * @pf: board private structure
7017 * Close up the VFs and other things in prep for a Core Reset,
7018 * then get ready to rebuild the world.
7020 static void i40e_handle_reset_warning(struct i40e_pf *pf)
7022 i40e_prep_for_reset(pf);
7023 i40e_reset_and_rebuild(pf, false);
7027 * i40e_handle_mdd_event
7028 * @pf: pointer to the PF structure
7030 * Called from the MDD irq handler to identify possibly malicious vfs
7032 static void i40e_handle_mdd_event(struct i40e_pf *pf)
7034 struct i40e_hw *hw = &pf->hw;
7035 bool mdd_detected = false;
7036 bool pf_mdd_detected = false;
7041 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7044 /* find what triggered the MDD event */
7045 reg = rd32(hw, I40E_GL_MDET_TX);
7046 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7047 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7048 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7049 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7050 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7051 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7052 I40E_GL_MDET_TX_EVENT_SHIFT;
7053 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7054 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7055 pf->hw.func_caps.base_queue;
7056 if (netif_msg_tx_err(pf))
7057 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7058 event, queue, pf_num, vf_num);
7059 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7060 mdd_detected = true;
7062 reg = rd32(hw, I40E_GL_MDET_RX);
7063 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7064 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7065 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7066 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7067 I40E_GL_MDET_RX_EVENT_SHIFT;
7068 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7069 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7070 pf->hw.func_caps.base_queue;
7071 if (netif_msg_rx_err(pf))
7072 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7073 event, queue, func);
7074 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7075 mdd_detected = true;
7079 reg = rd32(hw, I40E_PF_MDET_TX);
7080 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7081 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7082 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7083 pf_mdd_detected = true;
7085 reg = rd32(hw, I40E_PF_MDET_RX);
7086 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7087 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7088 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7089 pf_mdd_detected = true;
7091 /* Queue belongs to the PF, initiate a reset */
7092 if (pf_mdd_detected) {
7093 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7094 i40e_service_event_schedule(pf);
7098 /* see if one of the VFs needs its hand slapped */
7099 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7101 reg = rd32(hw, I40E_VP_MDET_TX(i));
7102 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7103 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7104 vf->num_mdd_events++;
7105 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7109 reg = rd32(hw, I40E_VP_MDET_RX(i));
7110 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7111 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7112 vf->num_mdd_events++;
7113 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7117 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7118 dev_info(&pf->pdev->dev,
7119 "Too many MDD events on VF %d, disabled\n", i);
7120 dev_info(&pf->pdev->dev,
7121 "Use PF Control I/F to re-enable the VF\n");
7122 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7126 /* re-enable mdd interrupt cause */
7127 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7128 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7129 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7130 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7135 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7136 * @pf: board private structure
7138 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7140 struct i40e_hw *hw = &pf->hw;
7145 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7148 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7150 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7151 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7152 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7153 port = pf->udp_ports[i].index;
7155 ret = i40e_aq_add_udp_tunnel(hw, port,
7156 pf->udp_ports[i].type,
7159 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7162 dev_dbg(&pf->pdev->dev,
7163 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7164 pf->udp_ports[i].type ? "vxlan" : "geneve",
7165 port ? "add" : "delete",
7167 i40e_stat_str(&pf->hw, ret),
7168 i40e_aq_str(&pf->hw,
7169 pf->hw.aq.asq_last_status));
7170 pf->udp_ports[i].index = 0;
7177 * i40e_service_task - Run the driver's async subtasks
7178 * @work: pointer to work_struct containing our data
7180 static void i40e_service_task(struct work_struct *work)
7182 struct i40e_pf *pf = container_of(work,
7185 unsigned long start_time = jiffies;
7187 /* don't bother with service tasks if a reset is in progress */
7188 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7189 i40e_service_event_complete(pf);
7193 i40e_detect_recover_hung(pf);
7194 i40e_sync_filters_subtask(pf);
7195 i40e_reset_subtask(pf);
7196 i40e_handle_mdd_event(pf);
7197 i40e_vc_process_vflr_event(pf);
7198 i40e_watchdog_subtask(pf);
7199 i40e_fdir_reinit_subtask(pf);
7200 i40e_client_subtask(pf);
7201 i40e_sync_filters_subtask(pf);
7202 i40e_sync_udp_filters_subtask(pf);
7203 i40e_clean_adminq_subtask(pf);
7205 i40e_service_event_complete(pf);
7207 /* If the tasks have taken longer than one timer cycle or there
7208 * is more work to be done, reschedule the service task now
7209 * rather than wait for the timer to tick again.
7211 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7212 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7213 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7214 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7215 i40e_service_event_schedule(pf);
7219 * i40e_service_timer - timer callback
7220 * @data: pointer to PF struct
7222 static void i40e_service_timer(unsigned long data)
7224 struct i40e_pf *pf = (struct i40e_pf *)data;
7226 mod_timer(&pf->service_timer,
7227 round_jiffies(jiffies + pf->service_timer_period));
7228 i40e_service_event_schedule(pf);
7232 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7233 * @vsi: the VSI being configured
7235 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7237 struct i40e_pf *pf = vsi->back;
7239 switch (vsi->type) {
7241 vsi->alloc_queue_pairs = pf->num_lan_qps;
7242 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7243 I40E_REQ_DESCRIPTOR_MULTIPLE);
7244 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7245 vsi->num_q_vectors = pf->num_lan_msix;
7247 vsi->num_q_vectors = 1;
7252 vsi->alloc_queue_pairs = 1;
7253 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7254 I40E_REQ_DESCRIPTOR_MULTIPLE);
7255 vsi->num_q_vectors = pf->num_fdsb_msix;
7258 case I40E_VSI_VMDQ2:
7259 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7260 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7261 I40E_REQ_DESCRIPTOR_MULTIPLE);
7262 vsi->num_q_vectors = pf->num_vmdq_msix;
7265 case I40E_VSI_SRIOV:
7266 vsi->alloc_queue_pairs = pf->num_vf_qps;
7267 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7268 I40E_REQ_DESCRIPTOR_MULTIPLE);
7273 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7274 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7275 I40E_REQ_DESCRIPTOR_MULTIPLE);
7276 vsi->num_q_vectors = pf->num_fcoe_msix;
7279 #endif /* I40E_FCOE */
7289 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7290 * @type: VSI pointer
7291 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7293 * On error: returns error code (negative)
7294 * On success: returns 0
7296 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7301 /* allocate memory for both Tx and Rx ring pointers */
7302 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7303 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7306 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7308 if (alloc_qvectors) {
7309 /* allocate memory for q_vector pointers */
7310 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7311 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7312 if (!vsi->q_vectors) {
7320 kfree(vsi->tx_rings);
7325 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7326 * @pf: board private structure
7327 * @type: type of VSI
7329 * On error: returns error code (negative)
7330 * On success: returns vsi index in PF (positive)
7332 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7335 struct i40e_vsi *vsi;
7339 /* Need to protect the allocation of the VSIs at the PF level */
7340 mutex_lock(&pf->switch_mutex);
7342 /* VSI list may be fragmented if VSI creation/destruction has
7343 * been happening. We can afford to do a quick scan to look
7344 * for any free VSIs in the list.
7346 * find next empty vsi slot, looping back around if necessary
7349 while (i < pf->num_alloc_vsi && pf->vsi[i])
7351 if (i >= pf->num_alloc_vsi) {
7353 while (i < pf->next_vsi && pf->vsi[i])
7357 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7358 vsi_idx = i; /* Found one! */
7361 goto unlock_pf; /* out of VSI slots! */
7365 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7372 set_bit(__I40E_DOWN, &vsi->state);
7375 vsi->int_rate_limit = 0;
7376 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7377 pf->rss_table_size : 64;
7378 vsi->netdev_registered = false;
7379 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7380 INIT_LIST_HEAD(&vsi->mac_filter_list);
7381 vsi->irqs_ready = false;
7383 ret = i40e_set_num_rings_in_vsi(vsi);
7387 ret = i40e_vsi_alloc_arrays(vsi, true);
7391 /* Setup default MSIX irq handler for VSI */
7392 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7394 /* Initialize VSI lock */
7395 spin_lock_init(&vsi->mac_filter_list_lock);
7396 pf->vsi[vsi_idx] = vsi;
7401 pf->next_vsi = i - 1;
7404 mutex_unlock(&pf->switch_mutex);
7409 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7410 * @type: VSI pointer
7411 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7413 * On error: returns error code (negative)
7414 * On success: returns 0
7416 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7418 /* free the ring and vector containers */
7419 if (free_qvectors) {
7420 kfree(vsi->q_vectors);
7421 vsi->q_vectors = NULL;
7423 kfree(vsi->tx_rings);
7424 vsi->tx_rings = NULL;
7425 vsi->rx_rings = NULL;
7429 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7431 * @vsi: Pointer to VSI structure
7433 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7438 kfree(vsi->rss_hkey_user);
7439 vsi->rss_hkey_user = NULL;
7441 kfree(vsi->rss_lut_user);
7442 vsi->rss_lut_user = NULL;
7446 * i40e_vsi_clear - Deallocate the VSI provided
7447 * @vsi: the VSI being un-configured
7449 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7460 mutex_lock(&pf->switch_mutex);
7461 if (!pf->vsi[vsi->idx]) {
7462 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7463 vsi->idx, vsi->idx, vsi, vsi->type);
7467 if (pf->vsi[vsi->idx] != vsi) {
7468 dev_err(&pf->pdev->dev,
7469 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7470 pf->vsi[vsi->idx]->idx,
7472 pf->vsi[vsi->idx]->type,
7473 vsi->idx, vsi, vsi->type);
7477 /* updates the PF for this cleared vsi */
7478 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7479 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7481 i40e_vsi_free_arrays(vsi, true);
7482 i40e_clear_rss_config_user(vsi);
7484 pf->vsi[vsi->idx] = NULL;
7485 if (vsi->idx < pf->next_vsi)
7486 pf->next_vsi = vsi->idx;
7489 mutex_unlock(&pf->switch_mutex);
7497 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7498 * @vsi: the VSI being cleaned
7500 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7504 if (vsi->tx_rings && vsi->tx_rings[0]) {
7505 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7506 kfree_rcu(vsi->tx_rings[i], rcu);
7507 vsi->tx_rings[i] = NULL;
7508 vsi->rx_rings[i] = NULL;
7514 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7515 * @vsi: the VSI being configured
7517 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7519 struct i40e_ring *tx_ring, *rx_ring;
7520 struct i40e_pf *pf = vsi->back;
7523 /* Set basic values in the rings to be used later during open() */
7524 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7525 /* allocate space for both Tx and Rx in one shot */
7526 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7530 tx_ring->queue_index = i;
7531 tx_ring->reg_idx = vsi->base_queue + i;
7532 tx_ring->ring_active = false;
7534 tx_ring->netdev = vsi->netdev;
7535 tx_ring->dev = &pf->pdev->dev;
7536 tx_ring->count = vsi->num_desc;
7538 tx_ring->dcb_tc = 0;
7539 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7540 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7541 tx_ring->tx_itr_setting = pf->tx_itr_default;
7542 vsi->tx_rings[i] = tx_ring;
7544 rx_ring = &tx_ring[1];
7545 rx_ring->queue_index = i;
7546 rx_ring->reg_idx = vsi->base_queue + i;
7547 rx_ring->ring_active = false;
7549 rx_ring->netdev = vsi->netdev;
7550 rx_ring->dev = &pf->pdev->dev;
7551 rx_ring->count = vsi->num_desc;
7553 rx_ring->dcb_tc = 0;
7554 rx_ring->rx_itr_setting = pf->rx_itr_default;
7555 vsi->rx_rings[i] = rx_ring;
7561 i40e_vsi_clear_rings(vsi);
7566 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7567 * @pf: board private structure
7568 * @vectors: the number of MSI-X vectors to request
7570 * Returns the number of vectors reserved, or error
7572 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7574 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7575 I40E_MIN_MSIX, vectors);
7577 dev_info(&pf->pdev->dev,
7578 "MSI-X vector reservation failed: %d\n", vectors);
7586 * i40e_init_msix - Setup the MSIX capability
7587 * @pf: board private structure
7589 * Work with the OS to set up the MSIX vectors needed.
7591 * Returns the number of vectors reserved or negative on failure
7593 static int i40e_init_msix(struct i40e_pf *pf)
7595 struct i40e_hw *hw = &pf->hw;
7599 int iwarp_requested = 0;
7601 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7604 /* The number of vectors we'll request will be comprised of:
7605 * - Add 1 for "other" cause for Admin Queue events, etc.
7606 * - The number of LAN queue pairs
7607 * - Queues being used for RSS.
7608 * We don't need as many as max_rss_size vectors.
7609 * use rss_size instead in the calculation since that
7610 * is governed by number of cpus in the system.
7611 * - assumes symmetric Tx/Rx pairing
7612 * - The number of VMDq pairs
7613 * - The CPU count within the NUMA node if iWARP is enabled
7615 * - The number of FCOE qps.
7617 * Once we count this up, try the request.
7619 * If we can't get what we want, we'll simplify to nearly nothing
7620 * and try again. If that still fails, we punt.
7622 vectors_left = hw->func_caps.num_msix_vectors;
7625 /* reserve one vector for miscellaneous handler */
7631 /* reserve vectors for the main PF traffic queues */
7632 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7633 vectors_left -= pf->num_lan_msix;
7634 v_budget += pf->num_lan_msix;
7636 /* reserve one vector for sideband flow director */
7637 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7639 pf->num_fdsb_msix = 1;
7643 pf->num_fdsb_msix = 0;
7644 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7649 /* can we reserve enough for FCoE? */
7650 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7652 pf->num_fcoe_msix = 0;
7653 else if (vectors_left >= pf->num_fcoe_qps)
7654 pf->num_fcoe_msix = pf->num_fcoe_qps;
7656 pf->num_fcoe_msix = 1;
7657 v_budget += pf->num_fcoe_msix;
7658 vectors_left -= pf->num_fcoe_msix;
7662 /* can we reserve enough for iWARP? */
7663 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7665 pf->num_iwarp_msix = 0;
7666 else if (vectors_left < pf->num_iwarp_msix)
7667 pf->num_iwarp_msix = 1;
7668 v_budget += pf->num_iwarp_msix;
7669 vectors_left -= pf->num_iwarp_msix;
7672 /* any vectors left over go for VMDq support */
7673 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7674 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7675 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7677 /* if we're short on vectors for what's desired, we limit
7678 * the queues per vmdq. If this is still more than are
7679 * available, the user will need to change the number of
7680 * queues/vectors used by the PF later with the ethtool
7683 if (vmdq_vecs < vmdq_vecs_wanted)
7684 pf->num_vmdq_qps = 1;
7685 pf->num_vmdq_msix = pf->num_vmdq_qps;
7687 v_budget += vmdq_vecs;
7688 vectors_left -= vmdq_vecs;
7691 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7693 if (!pf->msix_entries)
7696 for (i = 0; i < v_budget; i++)
7697 pf->msix_entries[i].entry = i;
7698 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7700 if (v_actual != v_budget) {
7701 /* If we have limited resources, we will start with no vectors
7702 * for the special features and then allocate vectors to some
7703 * of these features based on the policy and at the end disable
7704 * the features that did not get any vectors.
7706 iwarp_requested = pf->num_iwarp_msix;
7707 pf->num_iwarp_msix = 0;
7709 pf->num_fcoe_qps = 0;
7710 pf->num_fcoe_msix = 0;
7712 pf->num_vmdq_msix = 0;
7715 if (v_actual < I40E_MIN_MSIX) {
7716 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7717 kfree(pf->msix_entries);
7718 pf->msix_entries = NULL;
7721 } else if (v_actual == I40E_MIN_MSIX) {
7722 /* Adjust for minimal MSIX use */
7723 pf->num_vmdq_vsis = 0;
7724 pf->num_vmdq_qps = 0;
7725 pf->num_lan_qps = 1;
7726 pf->num_lan_msix = 1;
7728 } else if (v_actual != v_budget) {
7731 /* reserve the misc vector */
7734 /* Scale vector usage down */
7735 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7736 pf->num_vmdq_vsis = 1;
7737 pf->num_vmdq_qps = 1;
7738 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7740 /* partition out the remaining vectors */
7743 pf->num_lan_msix = 1;
7746 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7747 pf->num_lan_msix = 1;
7748 pf->num_iwarp_msix = 1;
7750 pf->num_lan_msix = 2;
7753 /* give one vector to FCoE */
7754 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7755 pf->num_lan_msix = 1;
7756 pf->num_fcoe_msix = 1;
7761 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7762 pf->num_iwarp_msix = min_t(int, (vec / 3),
7764 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7765 I40E_DEFAULT_NUM_VMDQ_VSI);
7767 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7768 I40E_DEFAULT_NUM_VMDQ_VSI);
7770 pf->num_lan_msix = min_t(int,
7771 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7774 /* give one vector to FCoE */
7775 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7776 pf->num_fcoe_msix = 1;
7784 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7785 (pf->num_vmdq_msix == 0)) {
7786 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7787 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7790 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7791 (pf->num_iwarp_msix == 0)) {
7792 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7793 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
7797 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7798 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7799 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7806 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7807 * @vsi: the VSI being configured
7808 * @v_idx: index of the vector in the vsi struct
7809 * @cpu: cpu to be used on affinity_mask
7811 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7813 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
7815 struct i40e_q_vector *q_vector;
7817 /* allocate q_vector */
7818 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7822 q_vector->vsi = vsi;
7823 q_vector->v_idx = v_idx;
7824 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
7827 netif_napi_add(vsi->netdev, &q_vector->napi,
7828 i40e_napi_poll, NAPI_POLL_WEIGHT);
7830 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7831 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7833 /* tie q_vector and vsi together */
7834 vsi->q_vectors[v_idx] = q_vector;
7840 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7841 * @vsi: the VSI being configured
7843 * We allocate one q_vector per queue interrupt. If allocation fails we
7846 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7848 struct i40e_pf *pf = vsi->back;
7849 int err, v_idx, num_q_vectors, current_cpu;
7851 /* if not MSIX, give the one vector only to the LAN VSI */
7852 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7853 num_q_vectors = vsi->num_q_vectors;
7854 else if (vsi == pf->vsi[pf->lan_vsi])
7859 current_cpu = cpumask_first(cpu_online_mask);
7861 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7862 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
7865 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
7866 if (unlikely(current_cpu >= nr_cpu_ids))
7867 current_cpu = cpumask_first(cpu_online_mask);
7874 i40e_free_q_vector(vsi, v_idx);
7880 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7881 * @pf: board private structure to initialize
7883 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7888 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7889 vectors = i40e_init_msix(pf);
7891 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7892 I40E_FLAG_IWARP_ENABLED |
7894 I40E_FLAG_FCOE_ENABLED |
7896 I40E_FLAG_RSS_ENABLED |
7897 I40E_FLAG_DCB_CAPABLE |
7898 I40E_FLAG_DCB_ENABLED |
7899 I40E_FLAG_SRIOV_ENABLED |
7900 I40E_FLAG_FD_SB_ENABLED |
7901 I40E_FLAG_FD_ATR_ENABLED |
7902 I40E_FLAG_VMDQ_ENABLED);
7904 /* rework the queue expectations without MSIX */
7905 i40e_determine_queue_usage(pf);
7909 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7910 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7911 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7912 vectors = pci_enable_msi(pf->pdev);
7914 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7916 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7918 vectors = 1; /* one MSI or Legacy vector */
7921 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7922 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7924 /* set up vector assignment tracking */
7925 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7926 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7927 if (!pf->irq_pile) {
7928 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7931 pf->irq_pile->num_entries = vectors;
7932 pf->irq_pile->search_hint = 0;
7934 /* track first vector for misc interrupts, ignore return */
7935 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7941 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7942 * @pf: board private structure
7944 * This sets up the handler for MSIX 0, which is used to manage the
7945 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7946 * when in MSI or Legacy interrupt mode.
7948 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7950 struct i40e_hw *hw = &pf->hw;
7953 /* Only request the irq if this is the first time through, and
7954 * not when we're rebuilding after a Reset
7956 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7957 err = request_irq(pf->msix_entries[0].vector,
7958 i40e_intr, 0, pf->int_name, pf);
7960 dev_info(&pf->pdev->dev,
7961 "request_irq for %s failed: %d\n",
7967 i40e_enable_misc_int_causes(pf);
7969 /* associate no queues to the misc vector */
7970 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7971 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7975 i40e_irq_dynamic_enable_icr0(pf, true);
7981 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7982 * @vsi: vsi structure
7983 * @seed: RSS hash seed
7985 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7986 u8 *lut, u16 lut_size)
7988 struct i40e_pf *pf = vsi->back;
7989 struct i40e_hw *hw = &pf->hw;
7993 struct i40e_aqc_get_set_rss_key_data *seed_dw =
7994 (struct i40e_aqc_get_set_rss_key_data *)seed;
7995 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
7997 dev_info(&pf->pdev->dev,
7998 "Cannot set RSS key, err %s aq_err %s\n",
7999 i40e_stat_str(hw, ret),
8000 i40e_aq_str(hw, hw->aq.asq_last_status));
8005 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8007 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8009 dev_info(&pf->pdev->dev,
8010 "Cannot set RSS lut, err %s aq_err %s\n",
8011 i40e_stat_str(hw, ret),
8012 i40e_aq_str(hw, hw->aq.asq_last_status));
8020 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8021 * @vsi: Pointer to vsi structure
8022 * @seed: Buffter to store the hash keys
8023 * @lut: Buffer to store the lookup table entries
8024 * @lut_size: Size of buffer to store the lookup table entries
8026 * Return 0 on success, negative on failure
8028 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8029 u8 *lut, u16 lut_size)
8031 struct i40e_pf *pf = vsi->back;
8032 struct i40e_hw *hw = &pf->hw;
8036 ret = i40e_aq_get_rss_key(hw, vsi->id,
8037 (struct i40e_aqc_get_set_rss_key_data *)seed);
8039 dev_info(&pf->pdev->dev,
8040 "Cannot get RSS key, err %s aq_err %s\n",
8041 i40e_stat_str(&pf->hw, ret),
8042 i40e_aq_str(&pf->hw,
8043 pf->hw.aq.asq_last_status));
8049 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8051 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8053 dev_info(&pf->pdev->dev,
8054 "Cannot get RSS lut, err %s aq_err %s\n",
8055 i40e_stat_str(&pf->hw, ret),
8056 i40e_aq_str(&pf->hw,
8057 pf->hw.aq.asq_last_status));
8066 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
8067 * @vsi: VSI structure
8069 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
8071 u8 seed[I40E_HKEY_ARRAY_SIZE];
8072 struct i40e_pf *pf = vsi->back;
8076 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8080 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8081 vsi->num_queue_pairs);
8085 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8088 /* Use the user configured hash keys and lookup table if there is one,
8089 * otherwise use default
8091 if (vsi->rss_lut_user)
8092 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8094 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8095 if (vsi->rss_hkey_user)
8096 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8098 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8099 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8106 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8107 * @vsi: Pointer to vsi structure
8108 * @seed: RSS hash seed
8109 * @lut: Lookup table
8110 * @lut_size: Lookup table size
8112 * Returns 0 on success, negative on failure
8114 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8115 const u8 *lut, u16 lut_size)
8117 struct i40e_pf *pf = vsi->back;
8118 struct i40e_hw *hw = &pf->hw;
8119 u16 vf_id = vsi->vf_id;
8122 /* Fill out hash function seed */
8124 u32 *seed_dw = (u32 *)seed;
8126 if (vsi->type == I40E_VSI_MAIN) {
8127 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8128 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i),
8130 } else if (vsi->type == I40E_VSI_SRIOV) {
8131 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8132 i40e_write_rx_ctl(hw,
8133 I40E_VFQF_HKEY1(i, vf_id),
8136 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8141 u32 *lut_dw = (u32 *)lut;
8143 if (vsi->type == I40E_VSI_MAIN) {
8144 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8146 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8147 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8148 } else if (vsi->type == I40E_VSI_SRIOV) {
8149 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8151 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8152 i40e_write_rx_ctl(hw,
8153 I40E_VFQF_HLUT1(i, vf_id),
8156 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8165 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8166 * @vsi: Pointer to VSI structure
8167 * @seed: Buffer to store the keys
8168 * @lut: Buffer to store the lookup table entries
8169 * @lut_size: Size of buffer to store the lookup table entries
8171 * Returns 0 on success, negative on failure
8173 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8174 u8 *lut, u16 lut_size)
8176 struct i40e_pf *pf = vsi->back;
8177 struct i40e_hw *hw = &pf->hw;
8181 u32 *seed_dw = (u32 *)seed;
8183 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8184 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8187 u32 *lut_dw = (u32 *)lut;
8189 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8191 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8192 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8199 * i40e_config_rss - Configure RSS keys and lut
8200 * @vsi: Pointer to VSI structure
8201 * @seed: RSS hash seed
8202 * @lut: Lookup table
8203 * @lut_size: Lookup table size
8205 * Returns 0 on success, negative on failure
8207 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8209 struct i40e_pf *pf = vsi->back;
8211 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8212 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8214 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8218 * i40e_get_rss - Get RSS keys and lut
8219 * @vsi: Pointer to VSI structure
8220 * @seed: Buffer to store the keys
8221 * @lut: Buffer to store the lookup table entries
8222 * lut_size: Size of buffer to store the lookup table entries
8224 * Returns 0 on success, negative on failure
8226 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8228 struct i40e_pf *pf = vsi->back;
8230 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8231 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8233 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8237 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8238 * @pf: Pointer to board private structure
8239 * @lut: Lookup table
8240 * @rss_table_size: Lookup table size
8241 * @rss_size: Range of queue number for hashing
8243 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8244 u16 rss_table_size, u16 rss_size)
8248 for (i = 0; i < rss_table_size; i++)
8249 lut[i] = i % rss_size;
8253 * i40e_pf_config_rss - Prepare for RSS if used
8254 * @pf: board private structure
8256 static int i40e_pf_config_rss(struct i40e_pf *pf)
8258 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8259 u8 seed[I40E_HKEY_ARRAY_SIZE];
8261 struct i40e_hw *hw = &pf->hw;
8266 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8267 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8268 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8269 hena |= i40e_pf_get_default_rss_hena(pf);
8271 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8272 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8274 /* Determine the RSS table size based on the hardware capabilities */
8275 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8276 reg_val = (pf->rss_table_size == 512) ?
8277 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8278 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8279 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8281 /* Determine the RSS size of the VSI */
8283 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8284 vsi->num_queue_pairs);
8288 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8292 /* Use user configured lut if there is one, otherwise use default */
8293 if (vsi->rss_lut_user)
8294 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8296 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8298 /* Use user configured hash key if there is one, otherwise
8301 if (vsi->rss_hkey_user)
8302 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8304 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8305 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8312 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8313 * @pf: board private structure
8314 * @queue_count: the requested queue count for rss.
8316 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8317 * count which may be different from the requested queue count.
8319 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8321 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8324 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8327 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8329 if (queue_count != vsi->num_queue_pairs) {
8330 vsi->req_queue_pairs = queue_count;
8331 i40e_prep_for_reset(pf);
8333 pf->alloc_rss_size = new_rss_size;
8335 i40e_reset_and_rebuild(pf, true);
8337 /* Discard the user configured hash keys and lut, if less
8338 * queues are enabled.
8340 if (queue_count < vsi->rss_size) {
8341 i40e_clear_rss_config_user(vsi);
8342 dev_dbg(&pf->pdev->dev,
8343 "discard user configured hash keys and lut\n");
8346 /* Reset vsi->rss_size, as number of enabled queues changed */
8347 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8348 vsi->num_queue_pairs);
8350 i40e_pf_config_rss(pf);
8352 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8353 pf->alloc_rss_size, pf->rss_size_max);
8354 return pf->alloc_rss_size;
8358 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8359 * @pf: board private structure
8361 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8364 bool min_valid, max_valid;
8367 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8368 &min_valid, &max_valid);
8372 pf->npar_min_bw = min_bw;
8374 pf->npar_max_bw = max_bw;
8381 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8382 * @pf: board private structure
8384 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8386 struct i40e_aqc_configure_partition_bw_data bw_data;
8389 /* Set the valid bit for this PF */
8390 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8391 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8392 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8394 /* Set the new bandwidths */
8395 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8401 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8402 * @pf: board private structure
8404 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8406 /* Commit temporary BW setting to permanent NVM image */
8407 enum i40e_admin_queue_err last_aq_status;
8411 if (pf->hw.partition_id != 1) {
8412 dev_info(&pf->pdev->dev,
8413 "Commit BW only works on partition 1! This is partition %d",
8414 pf->hw.partition_id);
8415 ret = I40E_NOT_SUPPORTED;
8419 /* Acquire NVM for read access */
8420 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8421 last_aq_status = pf->hw.aq.asq_last_status;
8423 dev_info(&pf->pdev->dev,
8424 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8425 i40e_stat_str(&pf->hw, ret),
8426 i40e_aq_str(&pf->hw, last_aq_status));
8430 /* Read word 0x10 of NVM - SW compatibility word 1 */
8431 ret = i40e_aq_read_nvm(&pf->hw,
8432 I40E_SR_NVM_CONTROL_WORD,
8433 0x10, sizeof(nvm_word), &nvm_word,
8435 /* Save off last admin queue command status before releasing
8438 last_aq_status = pf->hw.aq.asq_last_status;
8439 i40e_release_nvm(&pf->hw);
8441 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8442 i40e_stat_str(&pf->hw, ret),
8443 i40e_aq_str(&pf->hw, last_aq_status));
8447 /* Wait a bit for NVM release to complete */
8450 /* Acquire NVM for write access */
8451 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8452 last_aq_status = pf->hw.aq.asq_last_status;
8454 dev_info(&pf->pdev->dev,
8455 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8456 i40e_stat_str(&pf->hw, ret),
8457 i40e_aq_str(&pf->hw, last_aq_status));
8460 /* Write it back out unchanged to initiate update NVM,
8461 * which will force a write of the shadow (alt) RAM to
8462 * the NVM - thus storing the bandwidth values permanently.
8464 ret = i40e_aq_update_nvm(&pf->hw,
8465 I40E_SR_NVM_CONTROL_WORD,
8466 0x10, sizeof(nvm_word),
8467 &nvm_word, true, NULL);
8468 /* Save off last admin queue command status before releasing
8471 last_aq_status = pf->hw.aq.asq_last_status;
8472 i40e_release_nvm(&pf->hw);
8474 dev_info(&pf->pdev->dev,
8475 "BW settings NOT SAVED, err %s aq_err %s\n",
8476 i40e_stat_str(&pf->hw, ret),
8477 i40e_aq_str(&pf->hw, last_aq_status));
8484 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8485 * @pf: board private structure to initialize
8487 * i40e_sw_init initializes the Adapter private data structure.
8488 * Fields are initialized based on PCI device information and
8489 * OS network device settings (MTU size).
8491 static int i40e_sw_init(struct i40e_pf *pf)
8496 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8497 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8498 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8499 if (I40E_DEBUG_USER & debug)
8500 pf->hw.debug_mask = debug;
8501 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8502 I40E_DEFAULT_MSG_ENABLE);
8505 /* Set default capability flags */
8506 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8507 I40E_FLAG_MSI_ENABLED |
8508 I40E_FLAG_MSIX_ENABLED;
8510 /* Set default ITR */
8511 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8512 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8514 /* Depending on PF configurations, it is possible that the RSS
8515 * maximum might end up larger than the available queues
8517 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8518 pf->alloc_rss_size = 1;
8519 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8520 pf->rss_size_max = min_t(int, pf->rss_size_max,
8521 pf->hw.func_caps.num_tx_qp);
8522 if (pf->hw.func_caps.rss) {
8523 pf->flags |= I40E_FLAG_RSS_ENABLED;
8524 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8528 /* MFP mode enabled */
8529 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8530 pf->flags |= I40E_FLAG_MFP_ENABLED;
8531 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8532 if (i40e_get_npar_bw_setting(pf))
8533 dev_warn(&pf->pdev->dev,
8534 "Could not get NPAR bw settings\n");
8536 dev_info(&pf->pdev->dev,
8537 "Min BW = %8.8x, Max BW = %8.8x\n",
8538 pf->npar_min_bw, pf->npar_max_bw);
8541 /* FW/NVM is not yet fixed in this regard */
8542 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8543 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8544 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8545 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8546 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8547 pf->hw.num_partitions > 1)
8548 dev_info(&pf->pdev->dev,
8549 "Flow Director Sideband mode Disabled in MFP mode\n");
8551 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8552 pf->fdir_pf_filter_count =
8553 pf->hw.func_caps.fd_filters_guaranteed;
8554 pf->hw.fdir_shared_filter_count =
8555 pf->hw.func_caps.fd_filters_best_effort;
8558 if (i40e_is_mac_710(&pf->hw) &&
8559 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8560 (pf->hw.aq.fw_maj_ver < 4))) {
8561 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8562 /* No DCB support for FW < v4.33 */
8563 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8566 /* Disable FW LLDP if FW < v4.3 */
8567 if (i40e_is_mac_710(&pf->hw) &&
8568 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8569 (pf->hw.aq.fw_maj_ver < 4)))
8570 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8572 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8573 if (i40e_is_mac_710(&pf->hw) &&
8574 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8575 (pf->hw.aq.fw_maj_ver >= 5)))
8576 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8578 if (pf->hw.func_caps.vmdq) {
8579 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8580 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8581 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8584 if (pf->hw.func_caps.iwarp) {
8585 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8586 /* IWARP needs one extra vector for CQP just like MISC.*/
8587 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8591 i40e_init_pf_fcoe(pf);
8593 #endif /* I40E_FCOE */
8594 #ifdef CONFIG_PCI_IOV
8595 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8596 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8597 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8598 pf->num_req_vfs = min_t(int,
8599 pf->hw.func_caps.num_vfs,
8602 #endif /* CONFIG_PCI_IOV */
8603 if (pf->hw.mac.type == I40E_MAC_X722) {
8604 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8605 I40E_FLAG_128_QP_RSS_CAPABLE |
8606 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8607 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8608 I40E_FLAG_WB_ON_ITR_CAPABLE |
8609 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8610 I40E_FLAG_NO_PCI_LINK_CHECK |
8611 I40E_FLAG_USE_SET_LLDP_MIB |
8612 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8613 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8614 ((pf->hw.aq.api_maj_ver == 1) &&
8615 (pf->hw.aq.api_min_ver > 4))) {
8616 /* Supported in FW API version higher than 1.4 */
8617 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8618 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8620 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8623 pf->eeprom_version = 0xDEAD;
8624 pf->lan_veb = I40E_NO_VEB;
8625 pf->lan_vsi = I40E_NO_VSI;
8627 /* By default FW has this off for performance reasons */
8628 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8630 /* set up queue assignment tracking */
8631 size = sizeof(struct i40e_lump_tracking)
8632 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8633 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8638 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8639 pf->qp_pile->search_hint = 0;
8641 pf->tx_timeout_recovery_level = 1;
8643 mutex_init(&pf->switch_mutex);
8645 /* If NPAR is enabled nudge the Tx scheduler */
8646 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8647 i40e_set_npar_bw_setting(pf);
8654 * i40e_set_ntuple - set the ntuple feature flag and take action
8655 * @pf: board private structure to initialize
8656 * @features: the feature set that the stack is suggesting
8658 * returns a bool to indicate if reset needs to happen
8660 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8662 bool need_reset = false;
8664 /* Check if Flow Director n-tuple support was enabled or disabled. If
8665 * the state changed, we need to reset.
8667 if (features & NETIF_F_NTUPLE) {
8668 /* Enable filters and mark for reset */
8669 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8671 /* enable FD_SB only if there is MSI-X vector */
8672 if (pf->num_fdsb_msix > 0)
8673 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8675 /* turn off filters, mark for reset and clear SW filter list */
8676 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8678 i40e_fdir_filter_exit(pf);
8680 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8681 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8682 /* reset fd counters */
8683 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8684 pf->fdir_pf_active_filters = 0;
8685 /* if ATR was auto disabled it can be re-enabled. */
8686 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8687 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
8688 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8689 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8690 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8697 * i40e_clear_rss_lut - clear the rx hash lookup table
8698 * @vsi: the VSI being configured
8700 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
8702 struct i40e_pf *pf = vsi->back;
8703 struct i40e_hw *hw = &pf->hw;
8704 u16 vf_id = vsi->vf_id;
8707 if (vsi->type == I40E_VSI_MAIN) {
8708 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8709 wr32(hw, I40E_PFQF_HLUT(i), 0);
8710 } else if (vsi->type == I40E_VSI_SRIOV) {
8711 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8712 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
8714 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8719 * i40e_set_features - set the netdev feature flags
8720 * @netdev: ptr to the netdev being adjusted
8721 * @features: the feature set that the stack is suggesting
8723 static int i40e_set_features(struct net_device *netdev,
8724 netdev_features_t features)
8726 struct i40e_netdev_priv *np = netdev_priv(netdev);
8727 struct i40e_vsi *vsi = np->vsi;
8728 struct i40e_pf *pf = vsi->back;
8731 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
8732 i40e_pf_config_rss(pf);
8733 else if (!(features & NETIF_F_RXHASH) &&
8734 netdev->features & NETIF_F_RXHASH)
8735 i40e_clear_rss_lut(vsi);
8737 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8738 i40e_vlan_stripping_enable(vsi);
8740 i40e_vlan_stripping_disable(vsi);
8742 need_reset = i40e_set_ntuple(pf, features);
8745 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8751 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8752 * @pf: board private structure
8753 * @port: The UDP port to look up
8755 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8757 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8761 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8762 if (pf->udp_ports[i].index == port)
8770 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
8771 * @netdev: This physical port's netdev
8772 * @ti: Tunnel endpoint information
8774 static void i40e_udp_tunnel_add(struct net_device *netdev,
8775 struct udp_tunnel_info *ti)
8777 struct i40e_netdev_priv *np = netdev_priv(netdev);
8778 struct i40e_vsi *vsi = np->vsi;
8779 struct i40e_pf *pf = vsi->back;
8780 __be16 port = ti->port;
8784 idx = i40e_get_udp_port_idx(pf, port);
8786 /* Check if port already exists */
8787 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8788 netdev_info(netdev, "port %d already offloaded\n",
8793 /* Now check if there is space to add the new port */
8794 next_idx = i40e_get_udp_port_idx(pf, 0);
8796 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8797 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
8803 case UDP_TUNNEL_TYPE_VXLAN:
8804 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8806 case UDP_TUNNEL_TYPE_GENEVE:
8807 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8809 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8815 /* New port: add it and mark its index in the bitmap */
8816 pf->udp_ports[next_idx].index = port;
8817 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8818 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8822 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
8823 * @netdev: This physical port's netdev
8824 * @ti: Tunnel endpoint information
8826 static void i40e_udp_tunnel_del(struct net_device *netdev,
8827 struct udp_tunnel_info *ti)
8829 struct i40e_netdev_priv *np = netdev_priv(netdev);
8830 struct i40e_vsi *vsi = np->vsi;
8831 struct i40e_pf *pf = vsi->back;
8832 __be16 port = ti->port;
8835 idx = i40e_get_udp_port_idx(pf, port);
8837 /* Check if port already exists */
8838 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
8842 case UDP_TUNNEL_TYPE_VXLAN:
8843 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
8846 case UDP_TUNNEL_TYPE_GENEVE:
8847 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
8854 /* if port exists, set it to 0 (mark for deletion)
8855 * and make it pending
8857 pf->udp_ports[idx].index = 0;
8858 pf->pending_udp_bitmap |= BIT_ULL(idx);
8859 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8863 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
8867 static int i40e_get_phys_port_id(struct net_device *netdev,
8868 struct netdev_phys_item_id *ppid)
8870 struct i40e_netdev_priv *np = netdev_priv(netdev);
8871 struct i40e_pf *pf = np->vsi->back;
8872 struct i40e_hw *hw = &pf->hw;
8874 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8877 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8878 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8884 * i40e_ndo_fdb_add - add an entry to the hardware database
8885 * @ndm: the input from the stack
8886 * @tb: pointer to array of nladdr (unused)
8887 * @dev: the net device pointer
8888 * @addr: the MAC address entry being added
8889 * @flags: instructions from stack about fdb operation
8891 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8892 struct net_device *dev,
8893 const unsigned char *addr, u16 vid,
8896 struct i40e_netdev_priv *np = netdev_priv(dev);
8897 struct i40e_pf *pf = np->vsi->back;
8900 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8904 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8908 /* Hardware does not support aging addresses so if a
8909 * ndm_state is given only allow permanent addresses
8911 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8912 netdev_info(dev, "FDB only supports static addresses\n");
8916 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8917 err = dev_uc_add_excl(dev, addr);
8918 else if (is_multicast_ether_addr(addr))
8919 err = dev_mc_add_excl(dev, addr);
8923 /* Only return duplicate errors if NLM_F_EXCL is set */
8924 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8931 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8932 * @dev: the netdev being configured
8933 * @nlh: RTNL message
8935 * Inserts a new hardware bridge if not already created and
8936 * enables the bridging mode requested (VEB or VEPA). If the
8937 * hardware bridge has already been inserted and the request
8938 * is to change the mode then that requires a PF reset to
8939 * allow rebuild of the components with required hardware
8940 * bridge mode enabled.
8942 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8943 struct nlmsghdr *nlh,
8946 struct i40e_netdev_priv *np = netdev_priv(dev);
8947 struct i40e_vsi *vsi = np->vsi;
8948 struct i40e_pf *pf = vsi->back;
8949 struct i40e_veb *veb = NULL;
8950 struct nlattr *attr, *br_spec;
8953 /* Only for PF VSI for now */
8954 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8957 /* Find the HW bridge for PF VSI */
8958 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8959 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8963 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8965 nla_for_each_nested(attr, br_spec, rem) {
8968 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8971 mode = nla_get_u16(attr);
8972 if ((mode != BRIDGE_MODE_VEPA) &&
8973 (mode != BRIDGE_MODE_VEB))
8976 /* Insert a new HW bridge */
8978 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8979 vsi->tc_config.enabled_tc);
8981 veb->bridge_mode = mode;
8982 i40e_config_bridge_mode(veb);
8984 /* No Bridge HW offload available */
8988 } else if (mode != veb->bridge_mode) {
8989 /* Existing HW bridge but different mode needs reset */
8990 veb->bridge_mode = mode;
8991 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8992 if (mode == BRIDGE_MODE_VEB)
8993 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8995 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8996 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9005 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
9008 * @seq: RTNL message seq #
9009 * @dev: the netdev being configured
9010 * @filter_mask: unused
9011 * @nlflags: netlink flags passed in
9013 * Return the mode in which the hardware bridge is operating in
9016 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9017 struct net_device *dev,
9018 u32 __always_unused filter_mask,
9021 struct i40e_netdev_priv *np = netdev_priv(dev);
9022 struct i40e_vsi *vsi = np->vsi;
9023 struct i40e_pf *pf = vsi->back;
9024 struct i40e_veb *veb = NULL;
9027 /* Only for PF VSI for now */
9028 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9031 /* Find the HW bridge for the PF VSI */
9032 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9033 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9040 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9041 nlflags, 0, 0, filter_mask, NULL);
9044 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
9045 * inner mac plus all inner ethertypes.
9047 #define I40E_MAX_TUNNEL_HDR_LEN 128
9049 * i40e_features_check - Validate encapsulated packet conforms to limits
9051 * @dev: This physical port's netdev
9052 * @features: Offload features that the stack believes apply
9054 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9055 struct net_device *dev,
9056 netdev_features_t features)
9058 if (skb->encapsulation &&
9059 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
9060 I40E_MAX_TUNNEL_HDR_LEN))
9061 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9066 static const struct net_device_ops i40e_netdev_ops = {
9067 .ndo_open = i40e_open,
9068 .ndo_stop = i40e_close,
9069 .ndo_start_xmit = i40e_lan_xmit_frame,
9070 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9071 .ndo_set_rx_mode = i40e_set_rx_mode,
9072 .ndo_validate_addr = eth_validate_addr,
9073 .ndo_set_mac_address = i40e_set_mac,
9074 .ndo_change_mtu = i40e_change_mtu,
9075 .ndo_do_ioctl = i40e_ioctl,
9076 .ndo_tx_timeout = i40e_tx_timeout,
9077 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9078 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9079 #ifdef CONFIG_NET_POLL_CONTROLLER
9080 .ndo_poll_controller = i40e_netpoll,
9082 .ndo_setup_tc = __i40e_setup_tc,
9084 .ndo_fcoe_enable = i40e_fcoe_enable,
9085 .ndo_fcoe_disable = i40e_fcoe_disable,
9087 .ndo_set_features = i40e_set_features,
9088 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9089 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9090 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9091 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9092 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9093 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9094 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9095 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9096 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9097 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9098 .ndo_fdb_add = i40e_ndo_fdb_add,
9099 .ndo_features_check = i40e_features_check,
9100 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9101 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9105 * i40e_config_netdev - Setup the netdev flags
9106 * @vsi: the VSI being configured
9108 * Returns 0 on success, negative value on failure
9110 static int i40e_config_netdev(struct i40e_vsi *vsi)
9112 struct i40e_pf *pf = vsi->back;
9113 struct i40e_hw *hw = &pf->hw;
9114 struct i40e_netdev_priv *np;
9115 struct net_device *netdev;
9116 u8 mac_addr[ETH_ALEN];
9119 etherdev_size = sizeof(struct i40e_netdev_priv);
9120 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9124 vsi->netdev = netdev;
9125 np = netdev_priv(netdev);
9128 netdev->hw_enc_features |= NETIF_F_SG |
9132 NETIF_F_SOFT_FEATURES |
9137 NETIF_F_GSO_GRE_CSUM |
9138 NETIF_F_GSO_IPXIP4 |
9139 NETIF_F_GSO_IPXIP6 |
9140 NETIF_F_GSO_UDP_TUNNEL |
9141 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9142 NETIF_F_GSO_PARTIAL |
9148 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9149 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9151 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9153 /* record features VLANs can make use of */
9154 netdev->vlan_features |= netdev->hw_enc_features |
9155 NETIF_F_TSO_MANGLEID;
9157 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9158 netdev->hw_features |= NETIF_F_NTUPLE;
9160 netdev->hw_features |= netdev->hw_enc_features |
9161 NETIF_F_HW_VLAN_CTAG_TX |
9162 NETIF_F_HW_VLAN_CTAG_RX;
9164 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9165 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9167 if (vsi->type == I40E_VSI_MAIN) {
9168 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9169 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9170 /* The following steps are necessary to prevent reception
9171 * of tagged packets - some older NVM configurations load a
9172 * default a MAC-VLAN filter that accepts any tagged packet
9173 * which must be replaced by a normal filter.
9175 i40e_rm_default_mac_filter(vsi, mac_addr);
9176 spin_lock_bh(&vsi->mac_filter_list_lock);
9177 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, true);
9178 spin_unlock_bh(&vsi->mac_filter_list_lock);
9180 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9181 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9182 pf->vsi[pf->lan_vsi]->netdev->name);
9183 random_ether_addr(mac_addr);
9185 spin_lock_bh(&vsi->mac_filter_list_lock);
9186 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9187 spin_unlock_bh(&vsi->mac_filter_list_lock);
9190 ether_addr_copy(netdev->dev_addr, mac_addr);
9191 ether_addr_copy(netdev->perm_addr, mac_addr);
9193 netdev->priv_flags |= IFF_UNICAST_FLT;
9194 netdev->priv_flags |= IFF_SUPP_NOFCS;
9195 /* Setup netdev TC information */
9196 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9198 netdev->netdev_ops = &i40e_netdev_ops;
9199 netdev->watchdog_timeo = 5 * HZ;
9200 i40e_set_ethtool_ops(netdev);
9202 i40e_fcoe_config_netdev(netdev, vsi);
9209 * i40e_vsi_delete - Delete a VSI from the switch
9210 * @vsi: the VSI being removed
9212 * Returns 0 on success, negative value on failure
9214 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9216 /* remove default VSI is not allowed */
9217 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9220 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9224 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9225 * @vsi: the VSI being queried
9227 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9229 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9231 struct i40e_veb *veb;
9232 struct i40e_pf *pf = vsi->back;
9234 /* Uplink is not a bridge so default to VEB */
9235 if (vsi->veb_idx == I40E_NO_VEB)
9238 veb = pf->veb[vsi->veb_idx];
9240 dev_info(&pf->pdev->dev,
9241 "There is no veb associated with the bridge\n");
9245 /* Uplink is a bridge in VEPA mode */
9246 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9249 /* Uplink is a bridge in VEB mode */
9253 /* VEPA is now default bridge, so return 0 */
9258 * i40e_add_vsi - Add a VSI to the switch
9259 * @vsi: the VSI being configured
9261 * This initializes a VSI context depending on the VSI type to be added and
9262 * passes it down to the add_vsi aq command.
9264 static int i40e_add_vsi(struct i40e_vsi *vsi)
9267 i40e_status aq_ret = 0;
9268 struct i40e_pf *pf = vsi->back;
9269 struct i40e_hw *hw = &pf->hw;
9270 struct i40e_vsi_context ctxt;
9271 struct i40e_mac_filter *f, *ftmp;
9273 u8 enabled_tc = 0x1; /* TC0 enabled */
9276 memset(&ctxt, 0, sizeof(ctxt));
9277 switch (vsi->type) {
9279 /* The PF's main VSI is already setup as part of the
9280 * device initialization, so we'll not bother with
9281 * the add_vsi call, but we will retrieve the current
9284 ctxt.seid = pf->main_vsi_seid;
9285 ctxt.pf_num = pf->hw.pf_id;
9287 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9288 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9290 dev_info(&pf->pdev->dev,
9291 "couldn't get PF vsi config, err %s aq_err %s\n",
9292 i40e_stat_str(&pf->hw, ret),
9293 i40e_aq_str(&pf->hw,
9294 pf->hw.aq.asq_last_status));
9297 vsi->info = ctxt.info;
9298 vsi->info.valid_sections = 0;
9300 vsi->seid = ctxt.seid;
9301 vsi->id = ctxt.vsi_number;
9303 enabled_tc = i40e_pf_get_tc_map(pf);
9305 /* MFP mode setup queue map and update VSI */
9306 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9307 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9308 memset(&ctxt, 0, sizeof(ctxt));
9309 ctxt.seid = pf->main_vsi_seid;
9310 ctxt.pf_num = pf->hw.pf_id;
9312 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9313 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9315 dev_info(&pf->pdev->dev,
9316 "update vsi failed, err %s aq_err %s\n",
9317 i40e_stat_str(&pf->hw, ret),
9318 i40e_aq_str(&pf->hw,
9319 pf->hw.aq.asq_last_status));
9323 /* update the local VSI info queue map */
9324 i40e_vsi_update_queue_map(vsi, &ctxt);
9325 vsi->info.valid_sections = 0;
9327 /* Default/Main VSI is only enabled for TC0
9328 * reconfigure it to enable all TCs that are
9329 * available on the port in SFP mode.
9330 * For MFP case the iSCSI PF would use this
9331 * flow to enable LAN+iSCSI TC.
9333 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9335 dev_info(&pf->pdev->dev,
9336 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9338 i40e_stat_str(&pf->hw, ret),
9339 i40e_aq_str(&pf->hw,
9340 pf->hw.aq.asq_last_status));
9347 ctxt.pf_num = hw->pf_id;
9349 ctxt.uplink_seid = vsi->uplink_seid;
9350 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9351 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9352 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9353 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9354 ctxt.info.valid_sections |=
9355 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9356 ctxt.info.switch_id =
9357 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9359 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9362 case I40E_VSI_VMDQ2:
9363 ctxt.pf_num = hw->pf_id;
9365 ctxt.uplink_seid = vsi->uplink_seid;
9366 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9367 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9369 /* This VSI is connected to VEB so the switch_id
9370 * should be set to zero by default.
9372 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9373 ctxt.info.valid_sections |=
9374 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9375 ctxt.info.switch_id =
9376 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9379 /* Setup the VSI tx/rx queue map for TC0 only for now */
9380 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9383 case I40E_VSI_SRIOV:
9384 ctxt.pf_num = hw->pf_id;
9385 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9386 ctxt.uplink_seid = vsi->uplink_seid;
9387 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9388 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9390 /* This VSI is connected to VEB so the switch_id
9391 * should be set to zero by default.
9393 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9394 ctxt.info.valid_sections |=
9395 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9396 ctxt.info.switch_id =
9397 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9400 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9401 ctxt.info.valid_sections |=
9402 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9403 ctxt.info.queueing_opt_flags |=
9404 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9405 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9408 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9409 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9410 if (pf->vf[vsi->vf_id].spoofchk) {
9411 ctxt.info.valid_sections |=
9412 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9413 ctxt.info.sec_flags |=
9414 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9415 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9417 /* Setup the VSI tx/rx queue map for TC0 only for now */
9418 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9423 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9425 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9430 #endif /* I40E_FCOE */
9431 case I40E_VSI_IWARP:
9432 /* send down message to iWARP */
9439 if (vsi->type != I40E_VSI_MAIN) {
9440 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9442 dev_info(&vsi->back->pdev->dev,
9443 "add vsi failed, err %s aq_err %s\n",
9444 i40e_stat_str(&pf->hw, ret),
9445 i40e_aq_str(&pf->hw,
9446 pf->hw.aq.asq_last_status));
9450 vsi->info = ctxt.info;
9451 vsi->info.valid_sections = 0;
9452 vsi->seid = ctxt.seid;
9453 vsi->id = ctxt.vsi_number;
9455 /* Except FDIR VSI, for all othet VSI set the broadcast filter */
9456 if (vsi->type != I40E_VSI_FDIR) {
9457 aq_ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL);
9459 ret = i40e_aq_rc_to_posix(aq_ret,
9460 hw->aq.asq_last_status);
9461 dev_info(&pf->pdev->dev,
9462 "set brdcast promisc failed, err %s, aq_err %s\n",
9463 i40e_stat_str(hw, aq_ret),
9464 i40e_aq_str(hw, hw->aq.asq_last_status));
9468 vsi->active_filters = 0;
9469 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
9470 spin_lock_bh(&vsi->mac_filter_list_lock);
9471 /* If macvlan filters already exist, force them to get loaded */
9472 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9473 f->state = I40E_FILTER_NEW;
9476 spin_unlock_bh(&vsi->mac_filter_list_lock);
9479 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9480 pf->flags |= I40E_FLAG_FILTER_SYNC;
9483 /* Update VSI BW information */
9484 ret = i40e_vsi_get_bw_info(vsi);
9486 dev_info(&pf->pdev->dev,
9487 "couldn't get vsi bw info, err %s aq_err %s\n",
9488 i40e_stat_str(&pf->hw, ret),
9489 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9490 /* VSI is already added so not tearing that up */
9499 * i40e_vsi_release - Delete a VSI and free its resources
9500 * @vsi: the VSI being removed
9502 * Returns 0 on success or < 0 on error
9504 int i40e_vsi_release(struct i40e_vsi *vsi)
9506 struct i40e_mac_filter *f, *ftmp;
9507 struct i40e_veb *veb = NULL;
9514 /* release of a VEB-owner or last VSI is not allowed */
9515 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9516 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9517 vsi->seid, vsi->uplink_seid);
9520 if (vsi == pf->vsi[pf->lan_vsi] &&
9521 !test_bit(__I40E_DOWN, &pf->state)) {
9522 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9526 uplink_seid = vsi->uplink_seid;
9527 if (vsi->type != I40E_VSI_SRIOV) {
9528 if (vsi->netdev_registered) {
9529 vsi->netdev_registered = false;
9531 /* results in a call to i40e_close() */
9532 unregister_netdev(vsi->netdev);
9535 i40e_vsi_close(vsi);
9537 i40e_vsi_disable_irq(vsi);
9540 spin_lock_bh(&vsi->mac_filter_list_lock);
9541 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9542 i40e_del_filter(vsi, f->macaddr, f->vlan,
9543 f->is_vf, f->is_netdev);
9544 spin_unlock_bh(&vsi->mac_filter_list_lock);
9546 i40e_sync_vsi_filters(vsi);
9548 i40e_vsi_delete(vsi);
9549 i40e_vsi_free_q_vectors(vsi);
9551 free_netdev(vsi->netdev);
9554 i40e_vsi_clear_rings(vsi);
9555 i40e_vsi_clear(vsi);
9557 /* If this was the last thing on the VEB, except for the
9558 * controlling VSI, remove the VEB, which puts the controlling
9559 * VSI onto the next level down in the switch.
9561 * Well, okay, there's one more exception here: don't remove
9562 * the orphan VEBs yet. We'll wait for an explicit remove request
9563 * from up the network stack.
9565 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9567 pf->vsi[i]->uplink_seid == uplink_seid &&
9568 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9569 n++; /* count the VSIs */
9572 for (i = 0; i < I40E_MAX_VEB; i++) {
9575 if (pf->veb[i]->uplink_seid == uplink_seid)
9576 n++; /* count the VEBs */
9577 if (pf->veb[i]->seid == uplink_seid)
9580 if (n == 0 && veb && veb->uplink_seid != 0)
9581 i40e_veb_release(veb);
9587 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9588 * @vsi: ptr to the VSI
9590 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9591 * corresponding SW VSI structure and initializes num_queue_pairs for the
9592 * newly allocated VSI.
9594 * Returns 0 on success or negative on failure
9596 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9599 struct i40e_pf *pf = vsi->back;
9601 if (vsi->q_vectors[0]) {
9602 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9607 if (vsi->base_vector) {
9608 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9609 vsi->seid, vsi->base_vector);
9613 ret = i40e_vsi_alloc_q_vectors(vsi);
9615 dev_info(&pf->pdev->dev,
9616 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9617 vsi->num_q_vectors, vsi->seid, ret);
9618 vsi->num_q_vectors = 0;
9619 goto vector_setup_out;
9622 /* In Legacy mode, we do not have to get any other vector since we
9623 * piggyback on the misc/ICR0 for queue interrupts.
9625 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9627 if (vsi->num_q_vectors)
9628 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9629 vsi->num_q_vectors, vsi->idx);
9630 if (vsi->base_vector < 0) {
9631 dev_info(&pf->pdev->dev,
9632 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9633 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9634 i40e_vsi_free_q_vectors(vsi);
9636 goto vector_setup_out;
9644 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9645 * @vsi: pointer to the vsi.
9647 * This re-allocates a vsi's queue resources.
9649 * Returns pointer to the successfully allocated and configured VSI sw struct
9650 * on success, otherwise returns NULL on failure.
9652 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9663 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9664 i40e_vsi_clear_rings(vsi);
9666 i40e_vsi_free_arrays(vsi, false);
9667 i40e_set_num_rings_in_vsi(vsi);
9668 ret = i40e_vsi_alloc_arrays(vsi, false);
9672 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9674 dev_info(&pf->pdev->dev,
9675 "failed to get tracking for %d queues for VSI %d err %d\n",
9676 vsi->alloc_queue_pairs, vsi->seid, ret);
9679 vsi->base_queue = ret;
9681 /* Update the FW view of the VSI. Force a reset of TC and queue
9682 * layout configurations.
9684 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9685 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9686 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9687 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9688 if (vsi->type == I40E_VSI_MAIN)
9689 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
9691 /* assign it some queues */
9692 ret = i40e_alloc_rings(vsi);
9696 /* map all of the rings to the q_vectors */
9697 i40e_vsi_map_rings_to_vectors(vsi);
9701 i40e_vsi_free_q_vectors(vsi);
9702 if (vsi->netdev_registered) {
9703 vsi->netdev_registered = false;
9704 unregister_netdev(vsi->netdev);
9705 free_netdev(vsi->netdev);
9708 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9710 i40e_vsi_clear(vsi);
9715 * i40e_vsi_setup - Set up a VSI by a given type
9716 * @pf: board private structure
9718 * @uplink_seid: the switch element to link to
9719 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9721 * This allocates the sw VSI structure and its queue resources, then add a VSI
9722 * to the identified VEB.
9724 * Returns pointer to the successfully allocated and configure VSI sw struct on
9725 * success, otherwise returns NULL on failure.
9727 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9728 u16 uplink_seid, u32 param1)
9730 struct i40e_vsi *vsi = NULL;
9731 struct i40e_veb *veb = NULL;
9735 /* The requested uplink_seid must be either
9736 * - the PF's port seid
9737 * no VEB is needed because this is the PF
9738 * or this is a Flow Director special case VSI
9739 * - seid of an existing VEB
9740 * - seid of a VSI that owns an existing VEB
9741 * - seid of a VSI that doesn't own a VEB
9742 * a new VEB is created and the VSI becomes the owner
9743 * - seid of the PF VSI, which is what creates the first VEB
9744 * this is a special case of the previous
9746 * Find which uplink_seid we were given and create a new VEB if needed
9748 for (i = 0; i < I40E_MAX_VEB; i++) {
9749 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9755 if (!veb && uplink_seid != pf->mac_seid) {
9757 for (i = 0; i < pf->num_alloc_vsi; i++) {
9758 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9764 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9769 if (vsi->uplink_seid == pf->mac_seid)
9770 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9771 vsi->tc_config.enabled_tc);
9772 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9773 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9774 vsi->tc_config.enabled_tc);
9776 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9777 dev_info(&vsi->back->pdev->dev,
9778 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9781 /* We come up by default in VEPA mode if SRIOV is not
9782 * already enabled, in which case we can't force VEPA
9785 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9786 veb->bridge_mode = BRIDGE_MODE_VEPA;
9787 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9789 i40e_config_bridge_mode(veb);
9791 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9792 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9796 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9800 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9801 uplink_seid = veb->seid;
9804 /* get vsi sw struct */
9805 v_idx = i40e_vsi_mem_alloc(pf, type);
9808 vsi = pf->vsi[v_idx];
9812 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9814 if (type == I40E_VSI_MAIN)
9815 pf->lan_vsi = v_idx;
9816 else if (type == I40E_VSI_SRIOV)
9817 vsi->vf_id = param1;
9818 /* assign it some queues */
9819 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9822 dev_info(&pf->pdev->dev,
9823 "failed to get tracking for %d queues for VSI %d err=%d\n",
9824 vsi->alloc_queue_pairs, vsi->seid, ret);
9827 vsi->base_queue = ret;
9829 /* get a VSI from the hardware */
9830 vsi->uplink_seid = uplink_seid;
9831 ret = i40e_add_vsi(vsi);
9835 switch (vsi->type) {
9836 /* setup the netdev if needed */
9838 /* Apply relevant filters if a platform-specific mac
9839 * address was selected.
9841 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9842 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9844 dev_warn(&pf->pdev->dev,
9845 "could not set up macaddr; err %d\n",
9849 case I40E_VSI_VMDQ2:
9851 ret = i40e_config_netdev(vsi);
9854 ret = register_netdev(vsi->netdev);
9857 vsi->netdev_registered = true;
9858 netif_carrier_off(vsi->netdev);
9859 #ifdef CONFIG_I40E_DCB
9860 /* Setup DCB netlink interface */
9861 i40e_dcbnl_setup(vsi);
9862 #endif /* CONFIG_I40E_DCB */
9866 /* set up vectors and rings if needed */
9867 ret = i40e_vsi_setup_vectors(vsi);
9871 ret = i40e_alloc_rings(vsi);
9875 /* map all of the rings to the q_vectors */
9876 i40e_vsi_map_rings_to_vectors(vsi);
9878 i40e_vsi_reset_stats(vsi);
9882 /* no netdev or rings for the other VSI types */
9886 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9887 (vsi->type == I40E_VSI_VMDQ2)) {
9888 ret = i40e_vsi_config_rss(vsi);
9893 i40e_vsi_free_q_vectors(vsi);
9895 if (vsi->netdev_registered) {
9896 vsi->netdev_registered = false;
9897 unregister_netdev(vsi->netdev);
9898 free_netdev(vsi->netdev);
9902 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9904 i40e_vsi_clear(vsi);
9910 * i40e_veb_get_bw_info - Query VEB BW information
9911 * @veb: the veb to query
9913 * Query the Tx scheduler BW configuration data for given VEB
9915 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9917 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9918 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9919 struct i40e_pf *pf = veb->pf;
9920 struct i40e_hw *hw = &pf->hw;
9925 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9928 dev_info(&pf->pdev->dev,
9929 "query veb bw config failed, err %s aq_err %s\n",
9930 i40e_stat_str(&pf->hw, ret),
9931 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9935 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9938 dev_info(&pf->pdev->dev,
9939 "query veb bw ets config failed, err %s aq_err %s\n",
9940 i40e_stat_str(&pf->hw, ret),
9941 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9945 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9946 veb->bw_max_quanta = ets_data.tc_bw_max;
9947 veb->is_abs_credits = bw_data.absolute_credits_enable;
9948 veb->enabled_tc = ets_data.tc_valid_bits;
9949 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9950 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9951 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9952 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9953 veb->bw_tc_limit_credits[i] =
9954 le16_to_cpu(bw_data.tc_bw_limits[i]);
9955 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9963 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9964 * @pf: board private structure
9966 * On error: returns error code (negative)
9967 * On success: returns vsi index in PF (positive)
9969 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9972 struct i40e_veb *veb;
9975 /* Need to protect the allocation of switch elements at the PF level */
9976 mutex_lock(&pf->switch_mutex);
9978 /* VEB list may be fragmented if VEB creation/destruction has
9979 * been happening. We can afford to do a quick scan to look
9980 * for any free slots in the list.
9982 * find next empty veb slot, looping back around if necessary
9985 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9987 if (i >= I40E_MAX_VEB) {
9989 goto err_alloc_veb; /* out of VEB slots! */
9992 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9999 veb->enabled_tc = 1;
10004 mutex_unlock(&pf->switch_mutex);
10009 * i40e_switch_branch_release - Delete a branch of the switch tree
10010 * @branch: where to start deleting
10012 * This uses recursion to find the tips of the branch to be
10013 * removed, deleting until we get back to and can delete this VEB.
10015 static void i40e_switch_branch_release(struct i40e_veb *branch)
10017 struct i40e_pf *pf = branch->pf;
10018 u16 branch_seid = branch->seid;
10019 u16 veb_idx = branch->idx;
10022 /* release any VEBs on this VEB - RECURSION */
10023 for (i = 0; i < I40E_MAX_VEB; i++) {
10026 if (pf->veb[i]->uplink_seid == branch->seid)
10027 i40e_switch_branch_release(pf->veb[i]);
10030 /* Release the VSIs on this VEB, but not the owner VSI.
10032 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10033 * the VEB itself, so don't use (*branch) after this loop.
10035 for (i = 0; i < pf->num_alloc_vsi; i++) {
10038 if (pf->vsi[i]->uplink_seid == branch_seid &&
10039 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10040 i40e_vsi_release(pf->vsi[i]);
10044 /* There's one corner case where the VEB might not have been
10045 * removed, so double check it here and remove it if needed.
10046 * This case happens if the veb was created from the debugfs
10047 * commands and no VSIs were added to it.
10049 if (pf->veb[veb_idx])
10050 i40e_veb_release(pf->veb[veb_idx]);
10054 * i40e_veb_clear - remove veb struct
10055 * @veb: the veb to remove
10057 static void i40e_veb_clear(struct i40e_veb *veb)
10063 struct i40e_pf *pf = veb->pf;
10065 mutex_lock(&pf->switch_mutex);
10066 if (pf->veb[veb->idx] == veb)
10067 pf->veb[veb->idx] = NULL;
10068 mutex_unlock(&pf->switch_mutex);
10075 * i40e_veb_release - Delete a VEB and free its resources
10076 * @veb: the VEB being removed
10078 void i40e_veb_release(struct i40e_veb *veb)
10080 struct i40e_vsi *vsi = NULL;
10081 struct i40e_pf *pf;
10086 /* find the remaining VSI and check for extras */
10087 for (i = 0; i < pf->num_alloc_vsi; i++) {
10088 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10094 dev_info(&pf->pdev->dev,
10095 "can't remove VEB %d with %d VSIs left\n",
10100 /* move the remaining VSI to uplink veb */
10101 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10102 if (veb->uplink_seid) {
10103 vsi->uplink_seid = veb->uplink_seid;
10104 if (veb->uplink_seid == pf->mac_seid)
10105 vsi->veb_idx = I40E_NO_VEB;
10107 vsi->veb_idx = veb->veb_idx;
10110 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10111 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10114 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10115 i40e_veb_clear(veb);
10119 * i40e_add_veb - create the VEB in the switch
10120 * @veb: the VEB to be instantiated
10121 * @vsi: the controlling VSI
10123 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10125 struct i40e_pf *pf = veb->pf;
10126 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10129 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10130 veb->enabled_tc, false,
10131 &veb->seid, enable_stats, NULL);
10133 /* get a VEB from the hardware */
10135 dev_info(&pf->pdev->dev,
10136 "couldn't add VEB, err %s aq_err %s\n",
10137 i40e_stat_str(&pf->hw, ret),
10138 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10142 /* get statistics counter */
10143 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10144 &veb->stats_idx, NULL, NULL, NULL);
10146 dev_info(&pf->pdev->dev,
10147 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10148 i40e_stat_str(&pf->hw, ret),
10149 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10152 ret = i40e_veb_get_bw_info(veb);
10154 dev_info(&pf->pdev->dev,
10155 "couldn't get VEB bw info, err %s aq_err %s\n",
10156 i40e_stat_str(&pf->hw, ret),
10157 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10158 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10162 vsi->uplink_seid = veb->seid;
10163 vsi->veb_idx = veb->idx;
10164 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10170 * i40e_veb_setup - Set up a VEB
10171 * @pf: board private structure
10172 * @flags: VEB setup flags
10173 * @uplink_seid: the switch element to link to
10174 * @vsi_seid: the initial VSI seid
10175 * @enabled_tc: Enabled TC bit-map
10177 * This allocates the sw VEB structure and links it into the switch
10178 * It is possible and legal for this to be a duplicate of an already
10179 * existing VEB. It is also possible for both uplink and vsi seids
10180 * to be zero, in order to create a floating VEB.
10182 * Returns pointer to the successfully allocated VEB sw struct on
10183 * success, otherwise returns NULL on failure.
10185 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10186 u16 uplink_seid, u16 vsi_seid,
10189 struct i40e_veb *veb, *uplink_veb = NULL;
10190 int vsi_idx, veb_idx;
10193 /* if one seid is 0, the other must be 0 to create a floating relay */
10194 if ((uplink_seid == 0 || vsi_seid == 0) &&
10195 (uplink_seid + vsi_seid != 0)) {
10196 dev_info(&pf->pdev->dev,
10197 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10198 uplink_seid, vsi_seid);
10202 /* make sure there is such a vsi and uplink */
10203 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10204 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10206 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10207 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10212 if (uplink_seid && uplink_seid != pf->mac_seid) {
10213 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10214 if (pf->veb[veb_idx] &&
10215 pf->veb[veb_idx]->seid == uplink_seid) {
10216 uplink_veb = pf->veb[veb_idx];
10221 dev_info(&pf->pdev->dev,
10222 "uplink seid %d not found\n", uplink_seid);
10227 /* get veb sw struct */
10228 veb_idx = i40e_veb_mem_alloc(pf);
10231 veb = pf->veb[veb_idx];
10232 veb->flags = flags;
10233 veb->uplink_seid = uplink_seid;
10234 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10235 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10237 /* create the VEB in the switch */
10238 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10241 if (vsi_idx == pf->lan_vsi)
10242 pf->lan_veb = veb->idx;
10247 i40e_veb_clear(veb);
10253 * i40e_setup_pf_switch_element - set PF vars based on switch type
10254 * @pf: board private structure
10255 * @ele: element we are building info from
10256 * @num_reported: total number of elements
10257 * @printconfig: should we print the contents
10259 * helper function to assist in extracting a few useful SEID values.
10261 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10262 struct i40e_aqc_switch_config_element_resp *ele,
10263 u16 num_reported, bool printconfig)
10265 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10266 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10267 u8 element_type = ele->element_type;
10268 u16 seid = le16_to_cpu(ele->seid);
10271 dev_info(&pf->pdev->dev,
10272 "type=%d seid=%d uplink=%d downlink=%d\n",
10273 element_type, seid, uplink_seid, downlink_seid);
10275 switch (element_type) {
10276 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10277 pf->mac_seid = seid;
10279 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10281 if (uplink_seid != pf->mac_seid)
10283 if (pf->lan_veb == I40E_NO_VEB) {
10286 /* find existing or else empty VEB */
10287 for (v = 0; v < I40E_MAX_VEB; v++) {
10288 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10293 if (pf->lan_veb == I40E_NO_VEB) {
10294 v = i40e_veb_mem_alloc(pf);
10301 pf->veb[pf->lan_veb]->seid = seid;
10302 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10303 pf->veb[pf->lan_veb]->pf = pf;
10304 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10306 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10307 if (num_reported != 1)
10309 /* This is immediately after a reset so we can assume this is
10312 pf->mac_seid = uplink_seid;
10313 pf->pf_seid = downlink_seid;
10314 pf->main_vsi_seid = seid;
10316 dev_info(&pf->pdev->dev,
10317 "pf_seid=%d main_vsi_seid=%d\n",
10318 pf->pf_seid, pf->main_vsi_seid);
10320 case I40E_SWITCH_ELEMENT_TYPE_PF:
10321 case I40E_SWITCH_ELEMENT_TYPE_VF:
10322 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10323 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10324 case I40E_SWITCH_ELEMENT_TYPE_PE:
10325 case I40E_SWITCH_ELEMENT_TYPE_PA:
10326 /* ignore these for now */
10329 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10330 element_type, seid);
10336 * i40e_fetch_switch_configuration - Get switch config from firmware
10337 * @pf: board private structure
10338 * @printconfig: should we print the contents
10340 * Get the current switch configuration from the device and
10341 * extract a few useful SEID values.
10343 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10345 struct i40e_aqc_get_switch_config_resp *sw_config;
10351 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10355 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10357 u16 num_reported, num_total;
10359 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10363 dev_info(&pf->pdev->dev,
10364 "get switch config failed err %s aq_err %s\n",
10365 i40e_stat_str(&pf->hw, ret),
10366 i40e_aq_str(&pf->hw,
10367 pf->hw.aq.asq_last_status));
10372 num_reported = le16_to_cpu(sw_config->header.num_reported);
10373 num_total = le16_to_cpu(sw_config->header.num_total);
10376 dev_info(&pf->pdev->dev,
10377 "header: %d reported %d total\n",
10378 num_reported, num_total);
10380 for (i = 0; i < num_reported; i++) {
10381 struct i40e_aqc_switch_config_element_resp *ele =
10382 &sw_config->element[i];
10384 i40e_setup_pf_switch_element(pf, ele, num_reported,
10387 } while (next_seid != 0);
10394 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10395 * @pf: board private structure
10396 * @reinit: if the Main VSI needs to re-initialized.
10398 * Returns 0 on success, negative value on failure
10400 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10405 /* find out what's out there already */
10406 ret = i40e_fetch_switch_configuration(pf, false);
10408 dev_info(&pf->pdev->dev,
10409 "couldn't fetch switch config, err %s aq_err %s\n",
10410 i40e_stat_str(&pf->hw, ret),
10411 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10414 i40e_pf_reset_stats(pf);
10416 /* set the switch config bit for the whole device to
10417 * support limited promisc or true promisc
10418 * when user requests promisc. The default is limited
10422 if ((pf->hw.pf_id == 0) &&
10423 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10424 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10426 if (pf->hw.pf_id == 0) {
10429 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10430 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10432 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10433 dev_info(&pf->pdev->dev,
10434 "couldn't set switch config bits, err %s aq_err %s\n",
10435 i40e_stat_str(&pf->hw, ret),
10436 i40e_aq_str(&pf->hw,
10437 pf->hw.aq.asq_last_status));
10438 /* not a fatal problem, just keep going */
10442 /* first time setup */
10443 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10444 struct i40e_vsi *vsi = NULL;
10447 /* Set up the PF VSI associated with the PF's main VSI
10448 * that is already in the HW switch
10450 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10451 uplink_seid = pf->veb[pf->lan_veb]->seid;
10453 uplink_seid = pf->mac_seid;
10454 if (pf->lan_vsi == I40E_NO_VSI)
10455 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10457 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10459 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10460 i40e_fdir_teardown(pf);
10464 /* force a reset of TC and queue layout configurations */
10465 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10467 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10468 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10469 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10471 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10473 i40e_fdir_sb_setup(pf);
10475 /* Setup static PF queue filter control settings */
10476 ret = i40e_setup_pf_filter_control(pf);
10478 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10480 /* Failure here should not stop continuing other steps */
10483 /* enable RSS in the HW, even for only one queue, as the stack can use
10486 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10487 i40e_pf_config_rss(pf);
10489 /* fill in link information and enable LSE reporting */
10490 i40e_update_link_info(&pf->hw);
10491 i40e_link_event(pf);
10493 /* Initialize user-specific link properties */
10494 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10495 I40E_AQ_AN_COMPLETED) ? true : false);
10503 * i40e_determine_queue_usage - Work out queue distribution
10504 * @pf: board private structure
10506 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10510 pf->num_lan_qps = 0;
10512 pf->num_fcoe_qps = 0;
10515 /* Find the max queues to be put into basic use. We'll always be
10516 * using TC0, whether or not DCB is running, and TC0 will get the
10519 queues_left = pf->hw.func_caps.num_tx_qp;
10521 if ((queues_left == 1) ||
10522 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10523 /* one qp for PF, no queues for anything else */
10525 pf->alloc_rss_size = pf->num_lan_qps = 1;
10527 /* make sure all the fancies are disabled */
10528 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10529 I40E_FLAG_IWARP_ENABLED |
10531 I40E_FLAG_FCOE_ENABLED |
10533 I40E_FLAG_FD_SB_ENABLED |
10534 I40E_FLAG_FD_ATR_ENABLED |
10535 I40E_FLAG_DCB_CAPABLE |
10536 I40E_FLAG_DCB_ENABLED |
10537 I40E_FLAG_SRIOV_ENABLED |
10538 I40E_FLAG_VMDQ_ENABLED);
10539 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10540 I40E_FLAG_FD_SB_ENABLED |
10541 I40E_FLAG_FD_ATR_ENABLED |
10542 I40E_FLAG_DCB_CAPABLE))) {
10543 /* one qp for PF */
10544 pf->alloc_rss_size = pf->num_lan_qps = 1;
10545 queues_left -= pf->num_lan_qps;
10547 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10548 I40E_FLAG_IWARP_ENABLED |
10550 I40E_FLAG_FCOE_ENABLED |
10552 I40E_FLAG_FD_SB_ENABLED |
10553 I40E_FLAG_FD_ATR_ENABLED |
10554 I40E_FLAG_DCB_ENABLED |
10555 I40E_FLAG_VMDQ_ENABLED);
10557 /* Not enough queues for all TCs */
10558 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10559 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10560 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10561 I40E_FLAG_DCB_ENABLED);
10562 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10564 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10565 num_online_cpus());
10566 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10567 pf->hw.func_caps.num_tx_qp);
10569 queues_left -= pf->num_lan_qps;
10573 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10574 if (I40E_DEFAULT_FCOE <= queues_left) {
10575 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10576 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10577 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10579 pf->num_fcoe_qps = 0;
10580 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10581 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10584 queues_left -= pf->num_fcoe_qps;
10588 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10589 if (queues_left > 1) {
10590 queues_left -= 1; /* save 1 queue for FD */
10592 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10593 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10597 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10598 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10599 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10600 (queues_left / pf->num_vf_qps));
10601 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10604 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10605 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10606 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10607 (queues_left / pf->num_vmdq_qps));
10608 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10611 pf->queues_left = queues_left;
10612 dev_dbg(&pf->pdev->dev,
10613 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10614 pf->hw.func_caps.num_tx_qp,
10615 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10616 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10617 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10620 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10625 * i40e_setup_pf_filter_control - Setup PF static filter control
10626 * @pf: PF to be setup
10628 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10629 * settings. If PE/FCoE are enabled then it will also set the per PF
10630 * based filter sizes required for them. It also enables Flow director,
10631 * ethertype and macvlan type filter settings for the pf.
10633 * Returns 0 on success, negative on failure
10635 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10637 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10639 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10641 /* Flow Director is enabled */
10642 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10643 settings->enable_fdir = true;
10645 /* Ethtype and MACVLAN filters enabled for PF */
10646 settings->enable_ethtype = true;
10647 settings->enable_macvlan = true;
10649 if (i40e_set_filter_control(&pf->hw, settings))
10655 #define INFO_STRING_LEN 255
10656 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10657 static void i40e_print_features(struct i40e_pf *pf)
10659 struct i40e_hw *hw = &pf->hw;
10663 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10667 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10668 #ifdef CONFIG_PCI_IOV
10669 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10671 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10672 pf->hw.func_caps.num_vsis,
10673 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10674 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10675 i += snprintf(&buf[i], REMAIN(i), " RSS");
10676 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10677 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10678 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10679 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10680 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10682 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10683 i += snprintf(&buf[i], REMAIN(i), " DCB");
10684 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10685 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10686 if (pf->flags & I40E_FLAG_PTP)
10687 i += snprintf(&buf[i], REMAIN(i), " PTP");
10689 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10690 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10692 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10693 i += snprintf(&buf[i], REMAIN(i), " VEB");
10695 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10697 dev_info(&pf->pdev->dev, "%s\n", buf);
10699 WARN_ON(i > INFO_STRING_LEN);
10703 * i40e_get_platform_mac_addr - get platform-specific MAC address
10705 * @pdev: PCI device information struct
10706 * @pf: board private structure
10708 * Look up the MAC address in Open Firmware on systems that support it,
10709 * and use IDPROM on SPARC if no OF address is found. On return, the
10710 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10711 * has been selected.
10713 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10715 pf->flags &= ~I40E_FLAG_PF_MAC;
10716 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10717 pf->flags |= I40E_FLAG_PF_MAC;
10721 * i40e_probe - Device initialization routine
10722 * @pdev: PCI device information struct
10723 * @ent: entry in i40e_pci_tbl
10725 * i40e_probe initializes a PF identified by a pci_dev structure.
10726 * The OS initialization, configuring of the PF private structure,
10727 * and a hardware reset occur.
10729 * Returns 0 on success, negative on failure
10731 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10733 struct i40e_aq_get_phy_abilities_resp abilities;
10734 struct i40e_pf *pf;
10735 struct i40e_hw *hw;
10736 static u16 pfs_found;
10744 err = pci_enable_device_mem(pdev);
10748 /* set up for high or low dma */
10749 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10751 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10753 dev_err(&pdev->dev,
10754 "DMA configuration failed: 0x%x\n", err);
10759 /* set up pci connections */
10760 err = pci_request_mem_regions(pdev, i40e_driver_name);
10762 dev_info(&pdev->dev,
10763 "pci_request_selected_regions failed %d\n", err);
10767 pci_enable_pcie_error_reporting(pdev);
10768 pci_set_master(pdev);
10770 /* Now that we have a PCI connection, we need to do the
10771 * low level device setup. This is primarily setting up
10772 * the Admin Queue structures and then querying for the
10773 * device's current profile information.
10775 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10782 set_bit(__I40E_DOWN, &pf->state);
10787 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10788 I40E_MAX_CSR_SPACE);
10790 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10791 if (!hw->hw_addr) {
10793 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10794 (unsigned int)pci_resource_start(pdev, 0),
10795 pf->ioremap_len, err);
10798 hw->vendor_id = pdev->vendor;
10799 hw->device_id = pdev->device;
10800 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10801 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10802 hw->subsystem_device_id = pdev->subsystem_device;
10803 hw->bus.device = PCI_SLOT(pdev->devfn);
10804 hw->bus.func = PCI_FUNC(pdev->devfn);
10805 pf->instance = pfs_found;
10807 /* set up the locks for the AQ, do this only once in probe
10808 * and destroy them only once in remove
10810 mutex_init(&hw->aq.asq_mutex);
10811 mutex_init(&hw->aq.arq_mutex);
10814 pf->msg_enable = pf->hw.debug_mask;
10815 pf->msg_enable = debug;
10818 /* do a special CORER for clearing PXE mode once at init */
10819 if (hw->revision_id == 0 &&
10820 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10821 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10826 i40e_clear_pxe_mode(hw);
10829 /* Reset here to make sure all is clean and to define PF 'n' */
10831 err = i40e_pf_reset(hw);
10833 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10838 hw->aq.num_arq_entries = I40E_AQ_LEN;
10839 hw->aq.num_asq_entries = I40E_AQ_LEN;
10840 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10841 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10842 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10844 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10846 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10848 err = i40e_init_shared_code(hw);
10850 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10855 /* set up a default setting for link flow control */
10856 pf->hw.fc.requested_mode = I40E_FC_NONE;
10858 err = i40e_init_adminq(hw);
10860 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10861 dev_info(&pdev->dev,
10862 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10864 dev_info(&pdev->dev,
10865 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10870 /* provide nvm, fw, api versions */
10871 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10872 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10873 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10874 i40e_nvm_version_str(hw));
10876 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10877 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10878 dev_info(&pdev->dev,
10879 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10880 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10881 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10882 dev_info(&pdev->dev,
10883 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10885 i40e_verify_eeprom(pf);
10887 /* Rev 0 hardware was never productized */
10888 if (hw->revision_id < 1)
10889 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10891 i40e_clear_pxe_mode(hw);
10892 err = i40e_get_capabilities(pf);
10894 goto err_adminq_setup;
10896 err = i40e_sw_init(pf);
10898 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10902 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10903 hw->func_caps.num_rx_qp,
10904 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10906 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10907 goto err_init_lan_hmc;
10910 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10912 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10914 goto err_configure_lan_hmc;
10917 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10918 * Ignore error return codes because if it was already disabled via
10919 * hardware settings this will fail
10921 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
10922 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10923 i40e_aq_stop_lldp(hw, true, NULL);
10926 i40e_get_mac_addr(hw, hw->mac.addr);
10927 /* allow a platform config to override the HW addr */
10928 i40e_get_platform_mac_addr(pdev, pf);
10929 if (!is_valid_ether_addr(hw->mac.addr)) {
10930 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10934 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10935 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10936 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10937 if (is_valid_ether_addr(hw->mac.port_addr))
10938 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10940 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10942 dev_info(&pdev->dev,
10943 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10944 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10945 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10947 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10949 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10950 #endif /* I40E_FCOE */
10952 pci_set_drvdata(pdev, pf);
10953 pci_save_state(pdev);
10954 #ifdef CONFIG_I40E_DCB
10955 err = i40e_init_pf_dcb(pf);
10957 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10958 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE & I40E_FLAG_DCB_ENABLED);
10959 /* Continue without DCB enabled */
10961 #endif /* CONFIG_I40E_DCB */
10963 /* set up periodic task facility */
10964 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10965 pf->service_timer_period = HZ;
10967 INIT_WORK(&pf->service_task, i40e_service_task);
10968 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10969 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10971 /* NVM bit on means WoL disabled for the port */
10972 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10973 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10974 pf->wol_en = false;
10977 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10979 /* set up the main switch operations */
10980 i40e_determine_queue_usage(pf);
10981 err = i40e_init_interrupt_scheme(pf);
10983 goto err_switch_setup;
10985 /* The number of VSIs reported by the FW is the minimum guaranteed
10986 * to us; HW supports far more and we share the remaining pool with
10987 * the other PFs. We allocate space for more than the guarantee with
10988 * the understanding that we might not get them all later.
10990 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10991 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10993 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10995 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10996 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
11000 goto err_switch_setup;
11003 #ifdef CONFIG_PCI_IOV
11004 /* prep for VF support */
11005 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11006 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11007 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11008 if (pci_num_vf(pdev))
11009 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11012 err = i40e_setup_pf_switch(pf, false);
11014 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11018 /* Make sure flow control is set according to current settings */
11019 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11020 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11021 dev_dbg(&pf->pdev->dev,
11022 "Set fc with err %s aq_err %s on get_phy_cap\n",
11023 i40e_stat_str(hw, err),
11024 i40e_aq_str(hw, hw->aq.asq_last_status));
11025 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11026 dev_dbg(&pf->pdev->dev,
11027 "Set fc with err %s aq_err %s on set_phy_config\n",
11028 i40e_stat_str(hw, err),
11029 i40e_aq_str(hw, hw->aq.asq_last_status));
11030 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11031 dev_dbg(&pf->pdev->dev,
11032 "Set fc with err %s aq_err %s on get_link_info\n",
11033 i40e_stat_str(hw, err),
11034 i40e_aq_str(hw, hw->aq.asq_last_status));
11036 /* if FDIR VSI was set up, start it now */
11037 for (i = 0; i < pf->num_alloc_vsi; i++) {
11038 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11039 i40e_vsi_open(pf->vsi[i]);
11044 /* The driver only wants link up/down and module qualification
11045 * reports from firmware. Note the negative logic.
11047 err = i40e_aq_set_phy_int_mask(&pf->hw,
11048 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11049 I40E_AQ_EVENT_MEDIA_NA |
11050 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11052 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11053 i40e_stat_str(&pf->hw, err),
11054 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11056 /* Reconfigure hardware for allowing smaller MSS in the case
11057 * of TSO, so that we avoid the MDD being fired and causing
11058 * a reset in the case of small MSS+TSO.
11060 val = rd32(hw, I40E_REG_MSS);
11061 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11062 val &= ~I40E_REG_MSS_MIN_MASK;
11063 val |= I40E_64BYTE_MSS;
11064 wr32(hw, I40E_REG_MSS, val);
11067 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11069 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11071 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11072 i40e_stat_str(&pf->hw, err),
11073 i40e_aq_str(&pf->hw,
11074 pf->hw.aq.asq_last_status));
11076 /* The main driver is (mostly) up and happy. We need to set this state
11077 * before setting up the misc vector or we get a race and the vector
11078 * ends up disabled forever.
11080 clear_bit(__I40E_DOWN, &pf->state);
11082 /* In case of MSIX we are going to setup the misc vector right here
11083 * to handle admin queue events etc. In case of legacy and MSI
11084 * the misc functionality and queue processing is combined in
11085 * the same vector and that gets setup at open.
11087 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11088 err = i40e_setup_misc_vector(pf);
11090 dev_info(&pdev->dev,
11091 "setup of misc vector failed: %d\n", err);
11096 #ifdef CONFIG_PCI_IOV
11097 /* prep for VF support */
11098 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11099 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11100 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11101 /* disable link interrupts for VFs */
11102 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11103 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11104 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11107 if (pci_num_vf(pdev)) {
11108 dev_info(&pdev->dev,
11109 "Active VFs found, allocating resources.\n");
11110 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11112 dev_info(&pdev->dev,
11113 "Error %d allocating resources for existing VFs\n",
11117 #endif /* CONFIG_PCI_IOV */
11119 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11120 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11121 pf->num_iwarp_msix,
11122 I40E_IWARP_IRQ_PILE_ID);
11123 if (pf->iwarp_base_vector < 0) {
11124 dev_info(&pdev->dev,
11125 "failed to get tracking for %d vectors for IWARP err=%d\n",
11126 pf->num_iwarp_msix, pf->iwarp_base_vector);
11127 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11131 i40e_dbg_pf_init(pf);
11133 /* tell the firmware that we're starting */
11134 i40e_send_version(pf);
11136 /* since everything's happy, start the service_task timer */
11137 mod_timer(&pf->service_timer,
11138 round_jiffies(jiffies + pf->service_timer_period));
11140 /* add this PF to client device list and launch a client service task */
11141 err = i40e_lan_add_device(pf);
11143 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11147 /* create FCoE interface */
11148 i40e_fcoe_vsi_setup(pf);
11151 #define PCI_SPEED_SIZE 8
11152 #define PCI_WIDTH_SIZE 8
11153 /* Devices on the IOSF bus do not have this information
11154 * and will report PCI Gen 1 x 1 by default so don't bother
11157 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11158 char speed[PCI_SPEED_SIZE] = "Unknown";
11159 char width[PCI_WIDTH_SIZE] = "Unknown";
11161 /* Get the negotiated link width and speed from PCI config
11164 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11167 i40e_set_pci_config_data(hw, link_status);
11169 switch (hw->bus.speed) {
11170 case i40e_bus_speed_8000:
11171 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11172 case i40e_bus_speed_5000:
11173 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11174 case i40e_bus_speed_2500:
11175 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11179 switch (hw->bus.width) {
11180 case i40e_bus_width_pcie_x8:
11181 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11182 case i40e_bus_width_pcie_x4:
11183 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11184 case i40e_bus_width_pcie_x2:
11185 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11186 case i40e_bus_width_pcie_x1:
11187 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11192 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11195 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11196 hw->bus.speed < i40e_bus_speed_8000) {
11197 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11198 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11202 /* get the requested speeds from the fw */
11203 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11205 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11206 i40e_stat_str(&pf->hw, err),
11207 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11208 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11210 /* get the supported phy types from the fw */
11211 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11213 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11214 i40e_stat_str(&pf->hw, err),
11215 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11216 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11218 /* Add a filter to drop all Flow control frames from any VSI from being
11219 * transmitted. By doing so we stop a malicious VF from sending out
11220 * PAUSE or PFC frames and potentially controlling traffic for other
11222 * The FW can still send Flow control frames if enabled.
11224 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11225 pf->main_vsi_seid);
11227 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11228 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11229 pf->flags |= I40E_FLAG_HAVE_10GBASET_PHY;
11231 /* print a string summarizing features */
11232 i40e_print_features(pf);
11236 /* Unwind what we've done if something failed in the setup */
11238 set_bit(__I40E_DOWN, &pf->state);
11239 i40e_clear_interrupt_scheme(pf);
11242 i40e_reset_interrupt_capability(pf);
11243 del_timer_sync(&pf->service_timer);
11245 err_configure_lan_hmc:
11246 (void)i40e_shutdown_lan_hmc(hw);
11248 kfree(pf->qp_pile);
11252 iounmap(hw->hw_addr);
11256 pci_disable_pcie_error_reporting(pdev);
11257 pci_release_mem_regions(pdev);
11260 pci_disable_device(pdev);
11265 * i40e_remove - Device removal routine
11266 * @pdev: PCI device information struct
11268 * i40e_remove is called by the PCI subsystem to alert the driver
11269 * that is should release a PCI device. This could be caused by a
11270 * Hot-Plug event, or because the driver is going to be removed from
11273 static void i40e_remove(struct pci_dev *pdev)
11275 struct i40e_pf *pf = pci_get_drvdata(pdev);
11276 struct i40e_hw *hw = &pf->hw;
11277 i40e_status ret_code;
11280 i40e_dbg_pf_exit(pf);
11284 /* Disable RSS in hw */
11285 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11286 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11288 /* no more scheduling of any task */
11289 set_bit(__I40E_SUSPENDED, &pf->state);
11290 set_bit(__I40E_DOWN, &pf->state);
11291 if (pf->service_timer.data)
11292 del_timer_sync(&pf->service_timer);
11293 if (pf->service_task.func)
11294 cancel_work_sync(&pf->service_task);
11296 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11298 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11301 i40e_fdir_teardown(pf);
11303 /* If there is a switch structure or any orphans, remove them.
11304 * This will leave only the PF's VSI remaining.
11306 for (i = 0; i < I40E_MAX_VEB; i++) {
11310 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11311 pf->veb[i]->uplink_seid == 0)
11312 i40e_switch_branch_release(pf->veb[i]);
11315 /* Now we can shutdown the PF's VSI, just before we kill
11318 if (pf->vsi[pf->lan_vsi])
11319 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11321 /* remove attached clients */
11322 ret_code = i40e_lan_del_device(pf);
11324 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11328 /* shutdown and destroy the HMC */
11329 if (hw->hmc.hmc_obj) {
11330 ret_code = i40e_shutdown_lan_hmc(hw);
11332 dev_warn(&pdev->dev,
11333 "Failed to destroy the HMC resources: %d\n",
11337 /* shutdown the adminq */
11338 i40e_shutdown_adminq(hw);
11340 /* destroy the locks only once, here */
11341 mutex_destroy(&hw->aq.arq_mutex);
11342 mutex_destroy(&hw->aq.asq_mutex);
11344 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11345 i40e_clear_interrupt_scheme(pf);
11346 for (i = 0; i < pf->num_alloc_vsi; i++) {
11348 i40e_vsi_clear_rings(pf->vsi[i]);
11349 i40e_vsi_clear(pf->vsi[i]);
11354 for (i = 0; i < I40E_MAX_VEB; i++) {
11359 kfree(pf->qp_pile);
11362 iounmap(hw->hw_addr);
11364 pci_release_mem_regions(pdev);
11366 pci_disable_pcie_error_reporting(pdev);
11367 pci_disable_device(pdev);
11371 * i40e_pci_error_detected - warning that something funky happened in PCI land
11372 * @pdev: PCI device information struct
11374 * Called to warn that something happened and the error handling steps
11375 * are in progress. Allows the driver to quiesce things, be ready for
11378 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11379 enum pci_channel_state error)
11381 struct i40e_pf *pf = pci_get_drvdata(pdev);
11383 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11385 /* shutdown all operations */
11386 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11388 i40e_prep_for_reset(pf);
11392 /* Request a slot reset */
11393 return PCI_ERS_RESULT_NEED_RESET;
11397 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11398 * @pdev: PCI device information struct
11400 * Called to find if the driver can work with the device now that
11401 * the pci slot has been reset. If a basic connection seems good
11402 * (registers are readable and have sane content) then return a
11403 * happy little PCI_ERS_RESULT_xxx.
11405 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11407 struct i40e_pf *pf = pci_get_drvdata(pdev);
11408 pci_ers_result_t result;
11412 dev_dbg(&pdev->dev, "%s\n", __func__);
11413 if (pci_enable_device_mem(pdev)) {
11414 dev_info(&pdev->dev,
11415 "Cannot re-enable PCI device after reset.\n");
11416 result = PCI_ERS_RESULT_DISCONNECT;
11418 pci_set_master(pdev);
11419 pci_restore_state(pdev);
11420 pci_save_state(pdev);
11421 pci_wake_from_d3(pdev, false);
11423 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11425 result = PCI_ERS_RESULT_RECOVERED;
11427 result = PCI_ERS_RESULT_DISCONNECT;
11430 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11432 dev_info(&pdev->dev,
11433 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11435 /* non-fatal, continue */
11442 * i40e_pci_error_resume - restart operations after PCI error recovery
11443 * @pdev: PCI device information struct
11445 * Called to allow the driver to bring things back up after PCI error
11446 * and/or reset recovery has finished.
11448 static void i40e_pci_error_resume(struct pci_dev *pdev)
11450 struct i40e_pf *pf = pci_get_drvdata(pdev);
11452 dev_dbg(&pdev->dev, "%s\n", __func__);
11453 if (test_bit(__I40E_SUSPENDED, &pf->state))
11457 i40e_handle_reset_warning(pf);
11462 * i40e_shutdown - PCI callback for shutting down
11463 * @pdev: PCI device information struct
11465 static void i40e_shutdown(struct pci_dev *pdev)
11467 struct i40e_pf *pf = pci_get_drvdata(pdev);
11468 struct i40e_hw *hw = &pf->hw;
11470 set_bit(__I40E_SUSPENDED, &pf->state);
11471 set_bit(__I40E_DOWN, &pf->state);
11473 i40e_prep_for_reset(pf);
11476 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11477 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11479 del_timer_sync(&pf->service_timer);
11480 cancel_work_sync(&pf->service_task);
11481 i40e_fdir_teardown(pf);
11484 i40e_prep_for_reset(pf);
11487 wr32(hw, I40E_PFPM_APM,
11488 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11489 wr32(hw, I40E_PFPM_WUFC,
11490 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11492 i40e_clear_interrupt_scheme(pf);
11494 if (system_state == SYSTEM_POWER_OFF) {
11495 pci_wake_from_d3(pdev, pf->wol_en);
11496 pci_set_power_state(pdev, PCI_D3hot);
11502 * i40e_suspend - PCI callback for moving to D3
11503 * @pdev: PCI device information struct
11505 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11507 struct i40e_pf *pf = pci_get_drvdata(pdev);
11508 struct i40e_hw *hw = &pf->hw;
11511 set_bit(__I40E_SUSPENDED, &pf->state);
11512 set_bit(__I40E_DOWN, &pf->state);
11515 i40e_prep_for_reset(pf);
11518 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11519 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11521 i40e_stop_misc_vector(pf);
11523 retval = pci_save_state(pdev);
11527 pci_wake_from_d3(pdev, pf->wol_en);
11528 pci_set_power_state(pdev, PCI_D3hot);
11534 * i40e_resume - PCI callback for waking up from D3
11535 * @pdev: PCI device information struct
11537 static int i40e_resume(struct pci_dev *pdev)
11539 struct i40e_pf *pf = pci_get_drvdata(pdev);
11542 pci_set_power_state(pdev, PCI_D0);
11543 pci_restore_state(pdev);
11544 /* pci_restore_state() clears dev->state_saves, so
11545 * call pci_save_state() again to restore it.
11547 pci_save_state(pdev);
11549 err = pci_enable_device_mem(pdev);
11551 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11554 pci_set_master(pdev);
11556 /* no wakeup events while running */
11557 pci_wake_from_d3(pdev, false);
11559 /* handling the reset will rebuild the device state */
11560 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11561 clear_bit(__I40E_DOWN, &pf->state);
11563 i40e_reset_and_rebuild(pf, false);
11571 static const struct pci_error_handlers i40e_err_handler = {
11572 .error_detected = i40e_pci_error_detected,
11573 .slot_reset = i40e_pci_error_slot_reset,
11574 .resume = i40e_pci_error_resume,
11577 static struct pci_driver i40e_driver = {
11578 .name = i40e_driver_name,
11579 .id_table = i40e_pci_tbl,
11580 .probe = i40e_probe,
11581 .remove = i40e_remove,
11583 .suspend = i40e_suspend,
11584 .resume = i40e_resume,
11586 .shutdown = i40e_shutdown,
11587 .err_handler = &i40e_err_handler,
11588 .sriov_configure = i40e_pci_sriov_configure,
11592 * i40e_init_module - Driver registration routine
11594 * i40e_init_module is the first routine called when the driver is
11595 * loaded. All it does is register with the PCI subsystem.
11597 static int __init i40e_init_module(void)
11599 pr_info("%s: %s - version %s\n", i40e_driver_name,
11600 i40e_driver_string, i40e_driver_version_str);
11601 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11603 /* we will see if single thread per module is enough for now,
11604 * it can't be any worse than using the system workqueue which
11605 * was already single threaded
11607 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1,
11610 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11615 return pci_register_driver(&i40e_driver);
11617 module_init(i40e_init_module);
11620 * i40e_exit_module - Driver exit cleanup routine
11622 * i40e_exit_module is called just before the driver is removed
11625 static void __exit i40e_exit_module(void)
11627 pci_unregister_driver(&i40e_driver);
11628 destroy_workqueue(i40e_wq);
11631 module_exit(i40e_exit_module);