1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
33 #include "i40e_diag.h"
34 #if IS_ENABLED(CONFIG_VXLAN)
35 #include <net/vxlan.h>
37 #if IS_ENABLED(CONFIG_GENEVE)
38 #include <net/geneve.h>
41 const char i40e_driver_name[] = "i40e";
42 static const char i40e_driver_string[] =
43 "Intel(R) Ethernet Connection XL710 Network Driver";
47 #define DRV_VERSION_MAJOR 1
48 #define DRV_VERSION_MINOR 5
49 #define DRV_VERSION_BUILD 10
50 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
51 __stringify(DRV_VERSION_MINOR) "." \
52 __stringify(DRV_VERSION_BUILD) DRV_KERN
53 const char i40e_driver_version_str[] = DRV_VERSION;
54 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
56 /* a bit of forward declarations */
57 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
58 static void i40e_handle_reset_warning(struct i40e_pf *pf);
59 static int i40e_add_vsi(struct i40e_vsi *vsi);
60 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
61 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
62 static int i40e_setup_misc_vector(struct i40e_pf *pf);
63 static void i40e_determine_queue_usage(struct i40e_pf *pf);
64 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
65 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
66 u16 rss_table_size, u16 rss_size);
67 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
68 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
70 /* i40e_pci_tbl - PCI Device ID Table
72 * Last entry must be all 0s
74 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
75 * Class, Class Mask, private data (not used) }
77 static const struct pci_device_id i40e_pci_tbl[] = {
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_I_X722), 0},
95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
97 /* required last entry */
100 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
102 #define I40E_MAX_VF_COUNT 128
103 static int debug = -1;
104 module_param(debug, int, 0);
105 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
107 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
108 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
109 MODULE_LICENSE("GPL");
110 MODULE_VERSION(DRV_VERSION);
112 static struct workqueue_struct *i40e_wq;
115 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
116 * @hw: pointer to the HW structure
117 * @mem: ptr to mem struct to fill out
118 * @size: size of memory requested
119 * @alignment: what to align the allocation to
121 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
122 u64 size, u32 alignment)
124 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
126 mem->size = ALIGN(size, alignment);
127 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
128 &mem->pa, GFP_KERNEL);
136 * i40e_free_dma_mem_d - OS specific memory free for shared code
137 * @hw: pointer to the HW structure
138 * @mem: ptr to mem struct to free
140 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
142 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
144 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
153 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
154 * @hw: pointer to the HW structure
155 * @mem: ptr to mem struct to fill out
156 * @size: size of memory requested
158 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
162 mem->va = kzalloc(size, GFP_KERNEL);
171 * i40e_free_virt_mem_d - OS specific memory free for shared code
172 * @hw: pointer to the HW structure
173 * @mem: ptr to mem struct to free
175 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
177 /* it's ok to kfree a NULL pointer */
186 * i40e_get_lump - find a lump of free generic resource
187 * @pf: board private structure
188 * @pile: the pile of resource to search
189 * @needed: the number of items needed
190 * @id: an owner id to stick on the items assigned
192 * Returns the base item index of the lump, or negative for error
194 * The search_hint trick and lack of advanced fit-finding only work
195 * because we're highly likely to have all the same size lump requests.
196 * Linear search time and any fragmentation should be minimal.
198 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
204 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
205 dev_info(&pf->pdev->dev,
206 "param err: pile=%p needed=%d id=0x%04x\n",
211 /* start the linear search with an imperfect hint */
212 i = pile->search_hint;
213 while (i < pile->num_entries) {
214 /* skip already allocated entries */
215 if (pile->list[i] & I40E_PILE_VALID_BIT) {
220 /* do we have enough in this lump? */
221 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
222 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
227 /* there was enough, so assign it to the requestor */
228 for (j = 0; j < needed; j++)
229 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
231 pile->search_hint = i + j;
235 /* not enough, so skip over it and continue looking */
243 * i40e_put_lump - return a lump of generic resource
244 * @pile: the pile of resource to search
245 * @index: the base item index
246 * @id: the owner id of the items assigned
248 * Returns the count of items in the lump
250 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
252 int valid_id = (id | I40E_PILE_VALID_BIT);
256 if (!pile || index >= pile->num_entries)
260 i < pile->num_entries && pile->list[i] == valid_id;
266 if (count && index < pile->search_hint)
267 pile->search_hint = index;
273 * i40e_find_vsi_from_id - searches for the vsi with the given id
274 * @pf - the pf structure to search for the vsi
275 * @id - id of the vsi it is searching for
277 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
281 for (i = 0; i < pf->num_alloc_vsi; i++)
282 if (pf->vsi[i] && (pf->vsi[i]->id == id))
289 * i40e_service_event_schedule - Schedule the service task to wake up
290 * @pf: board private structure
292 * If not already scheduled, this puts the task into the work queue
294 void i40e_service_event_schedule(struct i40e_pf *pf)
296 if (!test_bit(__I40E_DOWN, &pf->state) &&
297 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
298 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
299 queue_work(i40e_wq, &pf->service_task);
303 * i40e_tx_timeout - Respond to a Tx Hang
304 * @netdev: network interface device structure
306 * If any port has noticed a Tx timeout, it is likely that the whole
307 * device is munged, not just the one netdev port, so go for the full
311 void i40e_tx_timeout(struct net_device *netdev)
313 static void i40e_tx_timeout(struct net_device *netdev)
316 struct i40e_netdev_priv *np = netdev_priv(netdev);
317 struct i40e_vsi *vsi = np->vsi;
318 struct i40e_pf *pf = vsi->back;
319 struct i40e_ring *tx_ring = NULL;
320 unsigned int i, hung_queue = 0;
323 pf->tx_timeout_count++;
325 /* find the stopped queue the same way the stack does */
326 for (i = 0; i < netdev->num_tx_queues; i++) {
327 struct netdev_queue *q;
328 unsigned long trans_start;
330 q = netdev_get_tx_queue(netdev, i);
331 trans_start = q->trans_start ? : netdev->trans_start;
332 if (netif_xmit_stopped(q) &&
334 (trans_start + netdev->watchdog_timeo))) {
340 if (i == netdev->num_tx_queues) {
341 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
343 /* now that we have an index, find the tx_ring struct */
344 for (i = 0; i < vsi->num_queue_pairs; i++) {
345 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
347 vsi->tx_rings[i]->queue_index) {
348 tx_ring = vsi->tx_rings[i];
355 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
356 pf->tx_timeout_recovery_level = 1; /* reset after some time */
357 else if (time_before(jiffies,
358 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
359 return; /* don't do any new action before the next timeout */
362 head = i40e_get_head(tx_ring);
363 /* Read interrupt register */
364 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
366 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
367 tx_ring->vsi->base_vector - 1));
369 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
371 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
372 vsi->seid, hung_queue, tx_ring->next_to_clean,
373 head, tx_ring->next_to_use,
374 readl(tx_ring->tail), val);
377 pf->tx_timeout_last_recovery = jiffies;
378 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
379 pf->tx_timeout_recovery_level, hung_queue);
381 switch (pf->tx_timeout_recovery_level) {
383 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
386 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
389 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
392 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
396 i40e_service_event_schedule(pf);
397 pf->tx_timeout_recovery_level++;
401 * i40e_get_vsi_stats_struct - Get System Network Statistics
402 * @vsi: the VSI we care about
404 * Returns the address of the device statistics structure.
405 * The statistics are actually updated from the service task.
407 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
409 return &vsi->net_stats;
413 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
414 * @netdev: network interface device structure
416 * Returns the address of the device statistics structure.
417 * The statistics are actually updated from the service task.
420 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
421 struct net_device *netdev,
422 struct rtnl_link_stats64 *stats)
424 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
429 struct i40e_netdev_priv *np = netdev_priv(netdev);
430 struct i40e_ring *tx_ring, *rx_ring;
431 struct i40e_vsi *vsi = np->vsi;
432 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
435 if (test_bit(__I40E_DOWN, &vsi->state))
442 for (i = 0; i < vsi->num_queue_pairs; i++) {
446 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
451 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
452 packets = tx_ring->stats.packets;
453 bytes = tx_ring->stats.bytes;
454 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
456 stats->tx_packets += packets;
457 stats->tx_bytes += bytes;
458 rx_ring = &tx_ring[1];
461 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
462 packets = rx_ring->stats.packets;
463 bytes = rx_ring->stats.bytes;
464 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
466 stats->rx_packets += packets;
467 stats->rx_bytes += bytes;
471 /* following stats updated by i40e_watchdog_subtask() */
472 stats->multicast = vsi_stats->multicast;
473 stats->tx_errors = vsi_stats->tx_errors;
474 stats->tx_dropped = vsi_stats->tx_dropped;
475 stats->rx_errors = vsi_stats->rx_errors;
476 stats->rx_dropped = vsi_stats->rx_dropped;
477 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
478 stats->rx_length_errors = vsi_stats->rx_length_errors;
484 * i40e_vsi_reset_stats - Resets all stats of the given vsi
485 * @vsi: the VSI to have its stats reset
487 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
489 struct rtnl_link_stats64 *ns;
495 ns = i40e_get_vsi_stats_struct(vsi);
496 memset(ns, 0, sizeof(*ns));
497 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
498 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
499 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
500 if (vsi->rx_rings && vsi->rx_rings[0]) {
501 for (i = 0; i < vsi->num_queue_pairs; i++) {
502 memset(&vsi->rx_rings[i]->stats, 0,
503 sizeof(vsi->rx_rings[i]->stats));
504 memset(&vsi->rx_rings[i]->rx_stats, 0,
505 sizeof(vsi->rx_rings[i]->rx_stats));
506 memset(&vsi->tx_rings[i]->stats, 0,
507 sizeof(vsi->tx_rings[i]->stats));
508 memset(&vsi->tx_rings[i]->tx_stats, 0,
509 sizeof(vsi->tx_rings[i]->tx_stats));
512 vsi->stat_offsets_loaded = false;
516 * i40e_pf_reset_stats - Reset all of the stats for the given PF
517 * @pf: the PF to be reset
519 void i40e_pf_reset_stats(struct i40e_pf *pf)
523 memset(&pf->stats, 0, sizeof(pf->stats));
524 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
525 pf->stat_offsets_loaded = false;
527 for (i = 0; i < I40E_MAX_VEB; i++) {
529 memset(&pf->veb[i]->stats, 0,
530 sizeof(pf->veb[i]->stats));
531 memset(&pf->veb[i]->stats_offsets, 0,
532 sizeof(pf->veb[i]->stats_offsets));
533 pf->veb[i]->stat_offsets_loaded = false;
539 * i40e_stat_update48 - read and update a 48 bit stat from the chip
540 * @hw: ptr to the hardware info
541 * @hireg: the high 32 bit reg to read
542 * @loreg: the low 32 bit reg to read
543 * @offset_loaded: has the initial offset been loaded yet
544 * @offset: ptr to current offset value
545 * @stat: ptr to the stat
547 * Since the device stats are not reset at PFReset, they likely will not
548 * be zeroed when the driver starts. We'll save the first values read
549 * and use them as offsets to be subtracted from the raw values in order
550 * to report stats that count from zero. In the process, we also manage
551 * the potential roll-over.
553 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
554 bool offset_loaded, u64 *offset, u64 *stat)
558 if (hw->device_id == I40E_DEV_ID_QEMU) {
559 new_data = rd32(hw, loreg);
560 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
562 new_data = rd64(hw, loreg);
566 if (likely(new_data >= *offset))
567 *stat = new_data - *offset;
569 *stat = (new_data + BIT_ULL(48)) - *offset;
570 *stat &= 0xFFFFFFFFFFFFULL;
574 * i40e_stat_update32 - read and update a 32 bit stat from the chip
575 * @hw: ptr to the hardware info
576 * @reg: the hw reg to read
577 * @offset_loaded: has the initial offset been loaded yet
578 * @offset: ptr to current offset value
579 * @stat: ptr to the stat
581 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
582 bool offset_loaded, u64 *offset, u64 *stat)
586 new_data = rd32(hw, reg);
589 if (likely(new_data >= *offset))
590 *stat = (u32)(new_data - *offset);
592 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
596 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
597 * @vsi: the VSI to be updated
599 void i40e_update_eth_stats(struct i40e_vsi *vsi)
601 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
602 struct i40e_pf *pf = vsi->back;
603 struct i40e_hw *hw = &pf->hw;
604 struct i40e_eth_stats *oes;
605 struct i40e_eth_stats *es; /* device's eth stats */
607 es = &vsi->eth_stats;
608 oes = &vsi->eth_stats_offsets;
610 /* Gather up the stats that the hw collects */
611 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
612 vsi->stat_offsets_loaded,
613 &oes->tx_errors, &es->tx_errors);
614 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
615 vsi->stat_offsets_loaded,
616 &oes->rx_discards, &es->rx_discards);
617 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
618 vsi->stat_offsets_loaded,
619 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
620 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->tx_errors, &es->tx_errors);
624 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
625 I40E_GLV_GORCL(stat_idx),
626 vsi->stat_offsets_loaded,
627 &oes->rx_bytes, &es->rx_bytes);
628 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
629 I40E_GLV_UPRCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_unicast, &es->rx_unicast);
632 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
633 I40E_GLV_MPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_multicast, &es->rx_multicast);
636 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
637 I40E_GLV_BPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_broadcast, &es->rx_broadcast);
641 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
642 I40E_GLV_GOTCL(stat_idx),
643 vsi->stat_offsets_loaded,
644 &oes->tx_bytes, &es->tx_bytes);
645 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
646 I40E_GLV_UPTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_unicast, &es->tx_unicast);
649 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
650 I40E_GLV_MPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_multicast, &es->tx_multicast);
653 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
654 I40E_GLV_BPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_broadcast, &es->tx_broadcast);
657 vsi->stat_offsets_loaded = true;
661 * i40e_update_veb_stats - Update Switch component statistics
662 * @veb: the VEB being updated
664 static void i40e_update_veb_stats(struct i40e_veb *veb)
666 struct i40e_pf *pf = veb->pf;
667 struct i40e_hw *hw = &pf->hw;
668 struct i40e_eth_stats *oes;
669 struct i40e_eth_stats *es; /* device's eth stats */
670 struct i40e_veb_tc_stats *veb_oes;
671 struct i40e_veb_tc_stats *veb_es;
674 idx = veb->stats_idx;
676 oes = &veb->stats_offsets;
677 veb_es = &veb->tc_stats;
678 veb_oes = &veb->tc_stats_offsets;
680 /* Gather up the stats that the hw collects */
681 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
682 veb->stat_offsets_loaded,
683 &oes->tx_discards, &es->tx_discards);
684 if (hw->revision_id > 0)
685 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
686 veb->stat_offsets_loaded,
687 &oes->rx_unknown_protocol,
688 &es->rx_unknown_protocol);
689 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_bytes, &es->rx_bytes);
692 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
693 veb->stat_offsets_loaded,
694 &oes->rx_unicast, &es->rx_unicast);
695 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->rx_multicast, &es->rx_multicast);
698 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->rx_broadcast, &es->rx_broadcast);
702 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->tx_bytes, &es->tx_bytes);
705 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
706 veb->stat_offsets_loaded,
707 &oes->tx_unicast, &es->tx_unicast);
708 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->tx_multicast, &es->tx_multicast);
711 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_broadcast, &es->tx_broadcast);
714 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
715 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
716 I40E_GLVEBTC_RPCL(i, idx),
717 veb->stat_offsets_loaded,
718 &veb_oes->tc_rx_packets[i],
719 &veb_es->tc_rx_packets[i]);
720 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
721 I40E_GLVEBTC_RBCL(i, idx),
722 veb->stat_offsets_loaded,
723 &veb_oes->tc_rx_bytes[i],
724 &veb_es->tc_rx_bytes[i]);
725 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
726 I40E_GLVEBTC_TPCL(i, idx),
727 veb->stat_offsets_loaded,
728 &veb_oes->tc_tx_packets[i],
729 &veb_es->tc_tx_packets[i]);
730 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
731 I40E_GLVEBTC_TBCL(i, idx),
732 veb->stat_offsets_loaded,
733 &veb_oes->tc_tx_bytes[i],
734 &veb_es->tc_tx_bytes[i]);
736 veb->stat_offsets_loaded = true;
741 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
742 * @vsi: the VSI that is capable of doing FCoE
744 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
746 struct i40e_pf *pf = vsi->back;
747 struct i40e_hw *hw = &pf->hw;
748 struct i40e_fcoe_stats *ofs;
749 struct i40e_fcoe_stats *fs; /* device's eth stats */
752 if (vsi->type != I40E_VSI_FCOE)
755 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
756 fs = &vsi->fcoe_stats;
757 ofs = &vsi->fcoe_stats_offsets;
759 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
760 vsi->fcoe_stat_offsets_loaded,
761 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
762 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
763 vsi->fcoe_stat_offsets_loaded,
764 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
765 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
766 vsi->fcoe_stat_offsets_loaded,
767 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
768 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
769 vsi->fcoe_stat_offsets_loaded,
770 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
771 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
772 vsi->fcoe_stat_offsets_loaded,
773 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
774 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
775 vsi->fcoe_stat_offsets_loaded,
776 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
777 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
778 vsi->fcoe_stat_offsets_loaded,
779 &ofs->fcoe_last_error, &fs->fcoe_last_error);
780 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
784 vsi->fcoe_stat_offsets_loaded = true;
789 * i40e_update_vsi_stats - Update the vsi statistics counters.
790 * @vsi: the VSI to be updated
792 * There are a few instances where we store the same stat in a
793 * couple of different structs. This is partly because we have
794 * the netdev stats that need to be filled out, which is slightly
795 * different from the "eth_stats" defined by the chip and used in
796 * VF communications. We sort it out here.
798 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
800 struct i40e_pf *pf = vsi->back;
801 struct rtnl_link_stats64 *ons;
802 struct rtnl_link_stats64 *ns; /* netdev stats */
803 struct i40e_eth_stats *oes;
804 struct i40e_eth_stats *es; /* device's eth stats */
805 u32 tx_restart, tx_busy;
806 u64 tx_lost_interrupt;
817 if (test_bit(__I40E_DOWN, &vsi->state) ||
818 test_bit(__I40E_CONFIG_BUSY, &pf->state))
821 ns = i40e_get_vsi_stats_struct(vsi);
822 ons = &vsi->net_stats_offsets;
823 es = &vsi->eth_stats;
824 oes = &vsi->eth_stats_offsets;
826 /* Gather up the netdev and vsi stats that the driver collects
827 * on the fly during packet processing
831 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
832 tx_lost_interrupt = 0;
836 for (q = 0; q < vsi->num_queue_pairs; q++) {
838 p = ACCESS_ONCE(vsi->tx_rings[q]);
841 start = u64_stats_fetch_begin_irq(&p->syncp);
842 packets = p->stats.packets;
843 bytes = p->stats.bytes;
844 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
847 tx_restart += p->tx_stats.restart_queue;
848 tx_busy += p->tx_stats.tx_busy;
849 tx_linearize += p->tx_stats.tx_linearize;
850 tx_force_wb += p->tx_stats.tx_force_wb;
851 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
853 /* Rx queue is part of the same block as Tx queue */
856 start = u64_stats_fetch_begin_irq(&p->syncp);
857 packets = p->stats.packets;
858 bytes = p->stats.bytes;
859 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
862 rx_buf += p->rx_stats.alloc_buff_failed;
863 rx_page += p->rx_stats.alloc_page_failed;
866 vsi->tx_restart = tx_restart;
867 vsi->tx_busy = tx_busy;
868 vsi->tx_linearize = tx_linearize;
869 vsi->tx_force_wb = tx_force_wb;
870 vsi->tx_lost_interrupt = tx_lost_interrupt;
871 vsi->rx_page_failed = rx_page;
872 vsi->rx_buf_failed = rx_buf;
874 ns->rx_packets = rx_p;
876 ns->tx_packets = tx_p;
879 /* update netdev stats from eth stats */
880 i40e_update_eth_stats(vsi);
881 ons->tx_errors = oes->tx_errors;
882 ns->tx_errors = es->tx_errors;
883 ons->multicast = oes->rx_multicast;
884 ns->multicast = es->rx_multicast;
885 ons->rx_dropped = oes->rx_discards;
886 ns->rx_dropped = es->rx_discards;
887 ons->tx_dropped = oes->tx_discards;
888 ns->tx_dropped = es->tx_discards;
890 /* pull in a couple PF stats if this is the main vsi */
891 if (vsi == pf->vsi[pf->lan_vsi]) {
892 ns->rx_crc_errors = pf->stats.crc_errors;
893 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
894 ns->rx_length_errors = pf->stats.rx_length_errors;
899 * i40e_update_pf_stats - Update the PF statistics counters.
900 * @pf: the PF to be updated
902 static void i40e_update_pf_stats(struct i40e_pf *pf)
904 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
905 struct i40e_hw_port_stats *nsd = &pf->stats;
906 struct i40e_hw *hw = &pf->hw;
910 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
911 I40E_GLPRT_GORCL(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
914 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
915 I40E_GLPRT_GOTCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
918 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_discards,
921 &nsd->eth.rx_discards);
922 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
923 I40E_GLPRT_UPRCL(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->eth.rx_unicast,
926 &nsd->eth.rx_unicast);
927 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
928 I40E_GLPRT_MPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_multicast,
931 &nsd->eth.rx_multicast);
932 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
933 I40E_GLPRT_BPRCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.rx_broadcast,
936 &nsd->eth.rx_broadcast);
937 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
938 I40E_GLPRT_UPTCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.tx_unicast,
941 &nsd->eth.tx_unicast);
942 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
943 I40E_GLPRT_MPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_multicast,
946 &nsd->eth.tx_multicast);
947 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
948 I40E_GLPRT_BPTCL(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->eth.tx_broadcast,
951 &nsd->eth.tx_broadcast);
953 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->tx_dropped_link_down,
956 &nsd->tx_dropped_link_down);
958 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->crc_errors, &nsd->crc_errors);
962 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->illegal_bytes, &nsd->illegal_bytes);
966 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->mac_local_faults,
969 &nsd->mac_local_faults);
970 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->mac_remote_faults,
973 &nsd->mac_remote_faults);
975 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->rx_length_errors,
978 &nsd->rx_length_errors);
980 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->link_xon_rx, &nsd->link_xon_rx);
983 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->link_xon_tx, &nsd->link_xon_tx);
986 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
987 pf->stat_offsets_loaded,
988 &osd->link_xoff_rx, &nsd->link_xoff_rx);
989 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
990 pf->stat_offsets_loaded,
991 &osd->link_xoff_tx, &nsd->link_xoff_tx);
993 for (i = 0; i < 8; i++) {
994 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
995 pf->stat_offsets_loaded,
996 &osd->priority_xoff_rx[i],
997 &nsd->priority_xoff_rx[i]);
998 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
999 pf->stat_offsets_loaded,
1000 &osd->priority_xon_rx[i],
1001 &nsd->priority_xon_rx[i]);
1002 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1003 pf->stat_offsets_loaded,
1004 &osd->priority_xon_tx[i],
1005 &nsd->priority_xon_tx[i]);
1006 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1007 pf->stat_offsets_loaded,
1008 &osd->priority_xoff_tx[i],
1009 &nsd->priority_xoff_tx[i]);
1010 i40e_stat_update32(hw,
1011 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1012 pf->stat_offsets_loaded,
1013 &osd->priority_xon_2_xoff[i],
1014 &nsd->priority_xon_2_xoff[i]);
1017 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1018 I40E_GLPRT_PRC64L(hw->port),
1019 pf->stat_offsets_loaded,
1020 &osd->rx_size_64, &nsd->rx_size_64);
1021 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1022 I40E_GLPRT_PRC127L(hw->port),
1023 pf->stat_offsets_loaded,
1024 &osd->rx_size_127, &nsd->rx_size_127);
1025 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1026 I40E_GLPRT_PRC255L(hw->port),
1027 pf->stat_offsets_loaded,
1028 &osd->rx_size_255, &nsd->rx_size_255);
1029 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1030 I40E_GLPRT_PRC511L(hw->port),
1031 pf->stat_offsets_loaded,
1032 &osd->rx_size_511, &nsd->rx_size_511);
1033 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1034 I40E_GLPRT_PRC1023L(hw->port),
1035 pf->stat_offsets_loaded,
1036 &osd->rx_size_1023, &nsd->rx_size_1023);
1037 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1038 I40E_GLPRT_PRC1522L(hw->port),
1039 pf->stat_offsets_loaded,
1040 &osd->rx_size_1522, &nsd->rx_size_1522);
1041 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1042 I40E_GLPRT_PRC9522L(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->rx_size_big, &nsd->rx_size_big);
1046 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1047 I40E_GLPRT_PTC64L(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->tx_size_64, &nsd->tx_size_64);
1050 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1051 I40E_GLPRT_PTC127L(hw->port),
1052 pf->stat_offsets_loaded,
1053 &osd->tx_size_127, &nsd->tx_size_127);
1054 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1055 I40E_GLPRT_PTC255L(hw->port),
1056 pf->stat_offsets_loaded,
1057 &osd->tx_size_255, &nsd->tx_size_255);
1058 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1059 I40E_GLPRT_PTC511L(hw->port),
1060 pf->stat_offsets_loaded,
1061 &osd->tx_size_511, &nsd->tx_size_511);
1062 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1063 I40E_GLPRT_PTC1023L(hw->port),
1064 pf->stat_offsets_loaded,
1065 &osd->tx_size_1023, &nsd->tx_size_1023);
1066 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1067 I40E_GLPRT_PTC1522L(hw->port),
1068 pf->stat_offsets_loaded,
1069 &osd->tx_size_1522, &nsd->tx_size_1522);
1070 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1071 I40E_GLPRT_PTC9522L(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->tx_size_big, &nsd->tx_size_big);
1075 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->rx_undersize, &nsd->rx_undersize);
1078 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_fragments, &nsd->rx_fragments);
1081 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1082 pf->stat_offsets_loaded,
1083 &osd->rx_oversize, &nsd->rx_oversize);
1084 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1085 pf->stat_offsets_loaded,
1086 &osd->rx_jabber, &nsd->rx_jabber);
1089 i40e_stat_update32(hw,
1090 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1091 pf->stat_offsets_loaded,
1092 &osd->fd_atr_match, &nsd->fd_atr_match);
1093 i40e_stat_update32(hw,
1094 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1095 pf->stat_offsets_loaded,
1096 &osd->fd_sb_match, &nsd->fd_sb_match);
1097 i40e_stat_update32(hw,
1098 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1099 pf->stat_offsets_loaded,
1100 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1102 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1103 nsd->tx_lpi_status =
1104 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1105 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1106 nsd->rx_lpi_status =
1107 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1108 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1109 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1110 pf->stat_offsets_loaded,
1111 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1112 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1113 pf->stat_offsets_loaded,
1114 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1116 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1117 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1118 nsd->fd_sb_status = true;
1120 nsd->fd_sb_status = false;
1122 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1123 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1124 nsd->fd_atr_status = true;
1126 nsd->fd_atr_status = false;
1128 pf->stat_offsets_loaded = true;
1132 * i40e_update_stats - Update the various statistics counters.
1133 * @vsi: the VSI to be updated
1135 * Update the various stats for this VSI and its related entities.
1137 void i40e_update_stats(struct i40e_vsi *vsi)
1139 struct i40e_pf *pf = vsi->back;
1141 if (vsi == pf->vsi[pf->lan_vsi])
1142 i40e_update_pf_stats(pf);
1144 i40e_update_vsi_stats(vsi);
1146 i40e_update_fcoe_stats(vsi);
1151 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1152 * @vsi: the VSI to be searched
1153 * @macaddr: the MAC address
1155 * @is_vf: make sure its a VF filter, else doesn't matter
1156 * @is_netdev: make sure its a netdev filter, else doesn't matter
1158 * Returns ptr to the filter object or NULL
1160 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1161 u8 *macaddr, s16 vlan,
1162 bool is_vf, bool is_netdev)
1164 struct i40e_mac_filter *f;
1166 if (!vsi || !macaddr)
1169 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1170 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1171 (vlan == f->vlan) &&
1172 (!is_vf || f->is_vf) &&
1173 (!is_netdev || f->is_netdev))
1180 * i40e_find_mac - Find a mac addr in the macvlan filters list
1181 * @vsi: the VSI to be searched
1182 * @macaddr: the MAC address we are searching for
1183 * @is_vf: make sure its a VF filter, else doesn't matter
1184 * @is_netdev: make sure its a netdev filter, else doesn't matter
1186 * Returns the first filter with the provided MAC address or NULL if
1187 * MAC address was not found
1189 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1190 bool is_vf, bool is_netdev)
1192 struct i40e_mac_filter *f;
1194 if (!vsi || !macaddr)
1197 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1198 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1199 (!is_vf || f->is_vf) &&
1200 (!is_netdev || f->is_netdev))
1207 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1208 * @vsi: the VSI to be searched
1210 * Returns true if VSI is in vlan mode or false otherwise
1212 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1214 struct i40e_mac_filter *f;
1216 /* Only -1 for all the filters denotes not in vlan mode
1217 * so we have to go through all the list in order to make sure
1219 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1220 if (f->vlan >= 0 || vsi->info.pvid)
1228 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1229 * @vsi: the VSI to be searched
1230 * @macaddr: the mac address to be filtered
1231 * @is_vf: true if it is a VF
1232 * @is_netdev: true if it is a netdev
1234 * Goes through all the macvlan filters and adds a
1235 * macvlan filter for each unique vlan that already exists
1237 * Returns first filter found on success, else NULL
1239 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1240 bool is_vf, bool is_netdev)
1242 struct i40e_mac_filter *f;
1244 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1246 f->vlan = le16_to_cpu(vsi->info.pvid);
1247 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1248 is_vf, is_netdev)) {
1249 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1255 return list_first_entry_or_null(&vsi->mac_filter_list,
1256 struct i40e_mac_filter, list);
1260 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1261 * @vsi: the VSI to be searched
1262 * @macaddr: the mac address to be removed
1263 * @is_vf: true if it is a VF
1264 * @is_netdev: true if it is a netdev
1266 * Removes a given MAC address from a VSI, regardless of VLAN
1268 * Returns 0 for success, or error
1270 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1271 bool is_vf, bool is_netdev)
1273 struct i40e_mac_filter *f = NULL;
1276 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1277 "Missing mac_filter_list_lock\n");
1278 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1279 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1280 (is_vf == f->is_vf) &&
1281 (is_netdev == f->is_netdev)) {
1288 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1289 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1296 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1297 * @vsi: the PF Main VSI - inappropriate for any other VSI
1298 * @macaddr: the MAC address
1300 * Some older firmware configurations set up a default promiscuous VLAN
1301 * filter that needs to be removed.
1303 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1305 struct i40e_aqc_remove_macvlan_element_data element;
1306 struct i40e_pf *pf = vsi->back;
1309 /* Only appropriate for the PF main VSI */
1310 if (vsi->type != I40E_VSI_MAIN)
1313 memset(&element, 0, sizeof(element));
1314 ether_addr_copy(element.mac_addr, macaddr);
1315 element.vlan_tag = 0;
1316 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1317 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1318 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1326 * i40e_add_filter - Add a mac/vlan filter to the VSI
1327 * @vsi: the VSI to be searched
1328 * @macaddr: the MAC address
1330 * @is_vf: make sure its a VF filter, else doesn't matter
1331 * @is_netdev: make sure its a netdev filter, else doesn't matter
1333 * Returns ptr to the filter object or NULL when no memory available.
1335 * NOTE: This function is expected to be called with mac_filter_list_lock
1338 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1339 u8 *macaddr, s16 vlan,
1340 bool is_vf, bool is_netdev)
1342 struct i40e_mac_filter *f;
1344 if (!vsi || !macaddr)
1347 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1349 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1351 goto add_filter_out;
1353 ether_addr_copy(f->macaddr, macaddr);
1357 INIT_LIST_HEAD(&f->list);
1358 list_add_tail(&f->list, &vsi->mac_filter_list);
1361 /* increment counter and add a new flag if needed */
1367 } else if (is_netdev) {
1368 if (!f->is_netdev) {
1369 f->is_netdev = true;
1376 /* changed tells sync_filters_subtask to
1377 * push the filter down to the firmware
1380 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1381 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1389 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1390 * @vsi: the VSI to be searched
1391 * @macaddr: the MAC address
1393 * @is_vf: make sure it's a VF filter, else doesn't matter
1394 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1396 * NOTE: This function is expected to be called with mac_filter_list_lock
1399 void i40e_del_filter(struct i40e_vsi *vsi,
1400 u8 *macaddr, s16 vlan,
1401 bool is_vf, bool is_netdev)
1403 struct i40e_mac_filter *f;
1405 if (!vsi || !macaddr)
1408 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1409 if (!f || f->counter == 0)
1417 } else if (is_netdev) {
1419 f->is_netdev = false;
1423 /* make sure we don't remove a filter in use by VF or netdev */
1426 min_f += (f->is_vf ? 1 : 0);
1427 min_f += (f->is_netdev ? 1 : 0);
1429 if (f->counter > min_f)
1433 /* counter == 0 tells sync_filters_subtask to
1434 * remove the filter from the firmware's list
1436 if (f->counter == 0) {
1438 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1439 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1444 * i40e_set_mac - NDO callback to set mac address
1445 * @netdev: network interface device structure
1446 * @p: pointer to an address structure
1448 * Returns 0 on success, negative on failure
1451 int i40e_set_mac(struct net_device *netdev, void *p)
1453 static int i40e_set_mac(struct net_device *netdev, void *p)
1456 struct i40e_netdev_priv *np = netdev_priv(netdev);
1457 struct i40e_vsi *vsi = np->vsi;
1458 struct i40e_pf *pf = vsi->back;
1459 struct i40e_hw *hw = &pf->hw;
1460 struct sockaddr *addr = p;
1461 struct i40e_mac_filter *f;
1463 if (!is_valid_ether_addr(addr->sa_data))
1464 return -EADDRNOTAVAIL;
1466 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1467 netdev_info(netdev, "already using mac address %pM\n",
1472 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1473 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1474 return -EADDRNOTAVAIL;
1476 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1477 netdev_info(netdev, "returning to hw mac address %pM\n",
1480 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1482 if (vsi->type == I40E_VSI_MAIN) {
1485 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1486 I40E_AQC_WRITE_TYPE_LAA_WOL,
1487 addr->sa_data, NULL);
1490 "Addr change for Main VSI failed: %d\n",
1492 return -EADDRNOTAVAIL;
1496 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1497 struct i40e_aqc_remove_macvlan_element_data element;
1499 memset(&element, 0, sizeof(element));
1500 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1501 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1502 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1504 spin_lock_bh(&vsi->mac_filter_list_lock);
1505 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1507 spin_unlock_bh(&vsi->mac_filter_list_lock);
1510 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1511 struct i40e_aqc_add_macvlan_element_data element;
1513 memset(&element, 0, sizeof(element));
1514 ether_addr_copy(element.mac_addr, hw->mac.addr);
1515 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1516 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1518 spin_lock_bh(&vsi->mac_filter_list_lock);
1519 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1523 spin_unlock_bh(&vsi->mac_filter_list_lock);
1526 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1528 /* schedule our worker thread which will take care of
1529 * applying the new filter changes
1531 i40e_service_event_schedule(vsi->back);
1536 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1537 * @vsi: the VSI being setup
1538 * @ctxt: VSI context structure
1539 * @enabled_tc: Enabled TCs bitmap
1540 * @is_add: True if called before Add VSI
1542 * Setup VSI queue mapping for enabled traffic classes.
1545 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1546 struct i40e_vsi_context *ctxt,
1550 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1551 struct i40e_vsi_context *ctxt,
1556 struct i40e_pf *pf = vsi->back;
1566 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1569 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1570 /* Find numtc from enabled TC bitmap */
1571 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1572 if (enabled_tc & BIT(i)) /* TC is enabled */
1576 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1580 /* At least TC0 is enabled in case of non-DCB case */
1584 vsi->tc_config.numtc = numtc;
1585 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1586 /* Number of queues per enabled TC */
1587 /* In MFP case we can have a much lower count of MSIx
1588 * vectors available and so we need to lower the used
1591 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1592 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1594 qcount = vsi->alloc_queue_pairs;
1595 num_tc_qps = qcount / numtc;
1596 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1598 /* Setup queue offset/count for all TCs for given VSI */
1599 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1600 /* See if the given TC is enabled for the given VSI */
1601 if (vsi->tc_config.enabled_tc & BIT(i)) {
1605 switch (vsi->type) {
1607 qcount = min_t(int, pf->alloc_rss_size,
1612 qcount = num_tc_qps;
1616 case I40E_VSI_SRIOV:
1617 case I40E_VSI_VMDQ2:
1619 qcount = num_tc_qps;
1623 vsi->tc_config.tc_info[i].qoffset = offset;
1624 vsi->tc_config.tc_info[i].qcount = qcount;
1626 /* find the next higher power-of-2 of num queue pairs */
1629 while (num_qps && (BIT_ULL(pow) < qcount)) {
1634 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1636 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1637 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1641 /* TC is not enabled so set the offset to
1642 * default queue and allocate one queue
1645 vsi->tc_config.tc_info[i].qoffset = 0;
1646 vsi->tc_config.tc_info[i].qcount = 1;
1647 vsi->tc_config.tc_info[i].netdev_tc = 0;
1651 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1654 /* Set actual Tx/Rx queue pairs */
1655 vsi->num_queue_pairs = offset;
1656 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1657 if (vsi->req_queue_pairs > 0)
1658 vsi->num_queue_pairs = vsi->req_queue_pairs;
1659 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1660 vsi->num_queue_pairs = pf->num_lan_msix;
1663 /* Scheduler section valid can only be set for ADD VSI */
1665 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1667 ctxt->info.up_enable_bits = enabled_tc;
1669 if (vsi->type == I40E_VSI_SRIOV) {
1670 ctxt->info.mapping_flags |=
1671 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1672 for (i = 0; i < vsi->num_queue_pairs; i++)
1673 ctxt->info.queue_mapping[i] =
1674 cpu_to_le16(vsi->base_queue + i);
1676 ctxt->info.mapping_flags |=
1677 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1678 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1680 ctxt->info.valid_sections |= cpu_to_le16(sections);
1684 * i40e_set_rx_mode - NDO callback to set the netdev filters
1685 * @netdev: network interface device structure
1688 void i40e_set_rx_mode(struct net_device *netdev)
1690 static void i40e_set_rx_mode(struct net_device *netdev)
1693 struct i40e_netdev_priv *np = netdev_priv(netdev);
1694 struct i40e_mac_filter *f, *ftmp;
1695 struct i40e_vsi *vsi = np->vsi;
1696 struct netdev_hw_addr *uca;
1697 struct netdev_hw_addr *mca;
1698 struct netdev_hw_addr *ha;
1700 spin_lock_bh(&vsi->mac_filter_list_lock);
1702 /* add addr if not already in the filter list */
1703 netdev_for_each_uc_addr(uca, netdev) {
1704 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1705 if (i40e_is_vsi_in_vlan(vsi))
1706 i40e_put_mac_in_vlan(vsi, uca->addr,
1709 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1714 netdev_for_each_mc_addr(mca, netdev) {
1715 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1716 if (i40e_is_vsi_in_vlan(vsi))
1717 i40e_put_mac_in_vlan(vsi, mca->addr,
1720 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1725 /* remove filter if not in netdev list */
1726 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1731 netdev_for_each_mc_addr(mca, netdev)
1732 if (ether_addr_equal(mca->addr, f->macaddr))
1733 goto bottom_of_search_loop;
1735 netdev_for_each_uc_addr(uca, netdev)
1736 if (ether_addr_equal(uca->addr, f->macaddr))
1737 goto bottom_of_search_loop;
1739 for_each_dev_addr(netdev, ha)
1740 if (ether_addr_equal(ha->addr, f->macaddr))
1741 goto bottom_of_search_loop;
1743 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1744 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1746 bottom_of_search_loop:
1749 spin_unlock_bh(&vsi->mac_filter_list_lock);
1751 /* check for other flag changes */
1752 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1753 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1754 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1757 /* schedule our worker thread which will take care of
1758 * applying the new filter changes
1760 i40e_service_event_schedule(vsi->back);
1764 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1765 * @src: source MAC filter entry to be clones
1767 * Returns the pointer to newly cloned MAC filter entry or NULL
1770 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1771 struct i40e_mac_filter *src)
1773 struct i40e_mac_filter *f;
1775 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1780 INIT_LIST_HEAD(&f->list);
1786 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1787 * @vsi: pointer to vsi struct
1788 * @from: Pointer to list which contains MAC filter entries - changes to
1789 * those entries needs to be undone.
1791 * MAC filter entries from list were slated to be removed from device.
1793 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1794 struct list_head *from)
1796 struct i40e_mac_filter *f, *ftmp;
1798 list_for_each_entry_safe(f, ftmp, from, list) {
1800 /* Move the element back into MAC filter list*/
1801 list_move_tail(&f->list, &vsi->mac_filter_list);
1806 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1807 * @vsi: pointer to vsi struct
1809 * MAC filter entries from list were slated to be added from device.
1811 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1813 struct i40e_mac_filter *f, *ftmp;
1815 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1816 if (!f->changed && f->counter)
1822 * i40e_cleanup_add_list - Deletes the element from add list and release
1824 * @add_list: Pointer to list which contains MAC filter entries
1826 static void i40e_cleanup_add_list(struct list_head *add_list)
1828 struct i40e_mac_filter *f, *ftmp;
1830 list_for_each_entry_safe(f, ftmp, add_list, list) {
1837 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1838 * @vsi: ptr to the VSI
1840 * Push any outstanding VSI filter changes through the AdminQ.
1842 * Returns 0 or error value
1844 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1846 struct list_head tmp_del_list, tmp_add_list;
1847 struct i40e_mac_filter *f, *ftmp, *fclone;
1848 bool promisc_forced_on = false;
1849 bool add_happened = false;
1850 int filter_list_len = 0;
1851 u32 changed_flags = 0;
1852 i40e_status aq_ret = 0;
1853 bool err_cond = false;
1861 /* empty array typed pointers, kcalloc later */
1862 struct i40e_aqc_add_macvlan_element_data *add_list;
1863 struct i40e_aqc_remove_macvlan_element_data *del_list;
1865 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1866 usleep_range(1000, 2000);
1870 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1871 vsi->current_netdev_flags = vsi->netdev->flags;
1874 INIT_LIST_HEAD(&tmp_del_list);
1875 INIT_LIST_HEAD(&tmp_add_list);
1877 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1878 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1880 spin_lock_bh(&vsi->mac_filter_list_lock);
1881 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1885 if (f->counter != 0)
1889 /* Move the element into temporary del_list */
1890 list_move_tail(&f->list, &tmp_del_list);
1893 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1897 if (f->counter == 0)
1901 /* Clone MAC filter entry and add into temporary list */
1902 fclone = i40e_mac_filter_entry_clone(f);
1907 list_add_tail(&fclone->list, &tmp_add_list);
1910 /* if failed to clone MAC filter entry - undo */
1912 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1913 i40e_undo_add_filter_entries(vsi);
1915 spin_unlock_bh(&vsi->mac_filter_list_lock);
1918 i40e_cleanup_add_list(&tmp_add_list);
1924 /* Now process 'del_list' outside the lock */
1925 if (!list_empty(&tmp_del_list)) {
1928 filter_list_len = pf->hw.aq.asq_buf_size /
1929 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1930 del_list_size = filter_list_len *
1931 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1932 del_list = kzalloc(del_list_size, GFP_ATOMIC);
1934 i40e_cleanup_add_list(&tmp_add_list);
1936 /* Undo VSI's MAC filter entry element updates */
1937 spin_lock_bh(&vsi->mac_filter_list_lock);
1938 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1939 i40e_undo_add_filter_entries(vsi);
1940 spin_unlock_bh(&vsi->mac_filter_list_lock);
1945 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1948 /* add to delete list */
1949 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1950 del_list[num_del].vlan_tag =
1951 cpu_to_le16((u16)(f->vlan ==
1952 I40E_VLAN_ANY ? 0 : f->vlan));
1954 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1955 del_list[num_del].flags = cmd_flags;
1958 /* flush a full buffer */
1959 if (num_del == filter_list_len) {
1960 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1965 aq_err = pf->hw.aq.asq_last_status;
1967 memset(del_list, 0, del_list_size);
1969 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1971 dev_err(&pf->pdev->dev,
1972 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1973 i40e_stat_str(&pf->hw, aq_ret),
1974 i40e_aq_str(&pf->hw, aq_err));
1977 /* Release memory for MAC filter entries which were
1978 * synced up with HW.
1985 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1988 aq_err = pf->hw.aq.asq_last_status;
1991 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
1992 dev_info(&pf->pdev->dev,
1993 "ignoring delete macvlan error, err %s aq_err %s\n",
1994 i40e_stat_str(&pf->hw, aq_ret),
1995 i40e_aq_str(&pf->hw, aq_err));
2002 if (!list_empty(&tmp_add_list)) {
2005 /* do all the adds now */
2006 filter_list_len = pf->hw.aq.asq_buf_size /
2007 sizeof(struct i40e_aqc_add_macvlan_element_data),
2008 add_list_size = filter_list_len *
2009 sizeof(struct i40e_aqc_add_macvlan_element_data);
2010 add_list = kzalloc(add_list_size, GFP_ATOMIC);
2012 /* Purge element from temporary lists */
2013 i40e_cleanup_add_list(&tmp_add_list);
2015 /* Undo add filter entries from VSI MAC filter list */
2016 spin_lock_bh(&vsi->mac_filter_list_lock);
2017 i40e_undo_add_filter_entries(vsi);
2018 spin_unlock_bh(&vsi->mac_filter_list_lock);
2023 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2025 add_happened = true;
2028 /* add to add array */
2029 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2030 add_list[num_add].vlan_tag =
2032 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2033 add_list[num_add].queue_number = 0;
2035 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2036 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2039 /* flush a full buffer */
2040 if (num_add == filter_list_len) {
2041 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2044 aq_err = pf->hw.aq.asq_last_status;
2049 memset(add_list, 0, add_list_size);
2051 /* Entries from tmp_add_list were cloned from MAC
2052 * filter list, hence clean those cloned entries
2059 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2060 add_list, num_add, NULL);
2061 aq_err = pf->hw.aq.asq_last_status;
2067 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2068 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2069 dev_info(&pf->pdev->dev,
2070 "add filter failed, err %s aq_err %s\n",
2071 i40e_stat_str(&pf->hw, aq_ret),
2072 i40e_aq_str(&pf->hw, aq_err));
2073 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2074 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2076 promisc_forced_on = true;
2077 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2079 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2084 /* if the VF is not trusted do not do promisc */
2085 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2086 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2090 /* check for changes in promiscuous modes */
2091 if (changed_flags & IFF_ALLMULTI) {
2092 bool cur_multipromisc;
2094 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2095 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2100 retval = i40e_aq_rc_to_posix(aq_ret,
2101 pf->hw.aq.asq_last_status);
2102 dev_info(&pf->pdev->dev,
2103 "set multi promisc failed, err %s aq_err %s\n",
2104 i40e_stat_str(&pf->hw, aq_ret),
2105 i40e_aq_str(&pf->hw,
2106 pf->hw.aq.asq_last_status));
2109 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2112 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2113 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2115 if ((vsi->type == I40E_VSI_MAIN) &&
2116 (pf->lan_veb != I40E_NO_VEB) &&
2117 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2118 /* set defport ON for Main VSI instead of true promisc
2119 * this way we will get all unicast/multicast and VLAN
2120 * promisc behavior but will not get VF or VMDq traffic
2121 * replicated on the Main VSI.
2123 if (pf->cur_promisc != cur_promisc) {
2124 pf->cur_promisc = cur_promisc;
2125 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2128 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2134 i40e_aq_rc_to_posix(aq_ret,
2135 pf->hw.aq.asq_last_status);
2136 dev_info(&pf->pdev->dev,
2137 "set unicast promisc failed, err %d, aq_err %d\n",
2138 aq_ret, pf->hw.aq.asq_last_status);
2140 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2146 i40e_aq_rc_to_posix(aq_ret,
2147 pf->hw.aq.asq_last_status);
2148 dev_info(&pf->pdev->dev,
2149 "set multicast promisc failed, err %d, aq_err %d\n",
2150 aq_ret, pf->hw.aq.asq_last_status);
2153 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2157 retval = i40e_aq_rc_to_posix(aq_ret,
2158 pf->hw.aq.asq_last_status);
2159 dev_info(&pf->pdev->dev,
2160 "set brdcast promisc failed, err %s, aq_err %s\n",
2161 i40e_stat_str(&pf->hw, aq_ret),
2162 i40e_aq_str(&pf->hw,
2163 pf->hw.aq.asq_last_status));
2167 /* if something went wrong then set the changed flag so we try again */
2169 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2171 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2176 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2177 * @pf: board private structure
2179 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2183 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2185 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2187 for (v = 0; v < pf->num_alloc_vsi; v++) {
2189 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2190 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2193 /* come back and try again later */
2194 pf->flags |= I40E_FLAG_FILTER_SYNC;
2202 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2203 * @netdev: network interface device structure
2204 * @new_mtu: new value for maximum frame size
2206 * Returns 0 on success, negative on failure
2208 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2210 struct i40e_netdev_priv *np = netdev_priv(netdev);
2211 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2212 struct i40e_vsi *vsi = np->vsi;
2214 /* MTU < 68 is an error and causes problems on some kernels */
2215 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2218 netdev_info(netdev, "changing MTU from %d to %d\n",
2219 netdev->mtu, new_mtu);
2220 netdev->mtu = new_mtu;
2221 if (netif_running(netdev))
2222 i40e_vsi_reinit_locked(vsi);
2223 i40e_notify_client_of_l2_param_changes(vsi);
2228 * i40e_ioctl - Access the hwtstamp interface
2229 * @netdev: network interface device structure
2230 * @ifr: interface request data
2231 * @cmd: ioctl command
2233 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2235 struct i40e_netdev_priv *np = netdev_priv(netdev);
2236 struct i40e_pf *pf = np->vsi->back;
2240 return i40e_ptp_get_ts_config(pf, ifr);
2242 return i40e_ptp_set_ts_config(pf, ifr);
2249 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2250 * @vsi: the vsi being adjusted
2252 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2254 struct i40e_vsi_context ctxt;
2257 if ((vsi->info.valid_sections &
2258 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2259 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2260 return; /* already enabled */
2262 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2263 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2264 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2266 ctxt.seid = vsi->seid;
2267 ctxt.info = vsi->info;
2268 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2270 dev_info(&vsi->back->pdev->dev,
2271 "update vlan stripping failed, err %s aq_err %s\n",
2272 i40e_stat_str(&vsi->back->hw, ret),
2273 i40e_aq_str(&vsi->back->hw,
2274 vsi->back->hw.aq.asq_last_status));
2279 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2280 * @vsi: the vsi being adjusted
2282 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2284 struct i40e_vsi_context ctxt;
2287 if ((vsi->info.valid_sections &
2288 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2289 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2290 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2291 return; /* already disabled */
2293 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2294 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2295 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2297 ctxt.seid = vsi->seid;
2298 ctxt.info = vsi->info;
2299 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2301 dev_info(&vsi->back->pdev->dev,
2302 "update vlan stripping failed, err %s aq_err %s\n",
2303 i40e_stat_str(&vsi->back->hw, ret),
2304 i40e_aq_str(&vsi->back->hw,
2305 vsi->back->hw.aq.asq_last_status));
2310 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2311 * @netdev: network interface to be adjusted
2312 * @features: netdev features to test if VLAN offload is enabled or not
2314 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2316 struct i40e_netdev_priv *np = netdev_priv(netdev);
2317 struct i40e_vsi *vsi = np->vsi;
2319 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2320 i40e_vlan_stripping_enable(vsi);
2322 i40e_vlan_stripping_disable(vsi);
2326 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2327 * @vsi: the vsi being configured
2328 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2330 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2332 struct i40e_mac_filter *f, *add_f;
2333 bool is_netdev, is_vf;
2335 is_vf = (vsi->type == I40E_VSI_SRIOV);
2336 is_netdev = !!(vsi->netdev);
2338 /* Locked once because all functions invoked below iterates list*/
2339 spin_lock_bh(&vsi->mac_filter_list_lock);
2342 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2345 dev_info(&vsi->back->pdev->dev,
2346 "Could not add vlan filter %d for %pM\n",
2347 vid, vsi->netdev->dev_addr);
2348 spin_unlock_bh(&vsi->mac_filter_list_lock);
2353 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2354 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2356 dev_info(&vsi->back->pdev->dev,
2357 "Could not add vlan filter %d for %pM\n",
2359 spin_unlock_bh(&vsi->mac_filter_list_lock);
2364 /* Now if we add a vlan tag, make sure to check if it is the first
2365 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2366 * with 0, so we now accept untagged and specified tagged traffic
2367 * (and not any taged and untagged)
2370 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2372 is_vf, is_netdev)) {
2373 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2374 I40E_VLAN_ANY, is_vf, is_netdev);
2375 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2378 dev_info(&vsi->back->pdev->dev,
2379 "Could not add filter 0 for %pM\n",
2380 vsi->netdev->dev_addr);
2381 spin_unlock_bh(&vsi->mac_filter_list_lock);
2387 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2388 if (vid > 0 && !vsi->info.pvid) {
2389 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2390 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2393 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2395 add_f = i40e_add_filter(vsi, f->macaddr,
2396 0, is_vf, is_netdev);
2398 dev_info(&vsi->back->pdev->dev,
2399 "Could not add filter 0 for %pM\n",
2401 spin_unlock_bh(&vsi->mac_filter_list_lock);
2407 spin_unlock_bh(&vsi->mac_filter_list_lock);
2409 /* schedule our worker thread which will take care of
2410 * applying the new filter changes
2412 i40e_service_event_schedule(vsi->back);
2417 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2418 * @vsi: the vsi being configured
2419 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2421 * Return: 0 on success or negative otherwise
2423 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2425 struct net_device *netdev = vsi->netdev;
2426 struct i40e_mac_filter *f, *add_f;
2427 bool is_vf, is_netdev;
2428 int filter_count = 0;
2430 is_vf = (vsi->type == I40E_VSI_SRIOV);
2431 is_netdev = !!(netdev);
2433 /* Locked once because all functions invoked below iterates list */
2434 spin_lock_bh(&vsi->mac_filter_list_lock);
2437 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2439 list_for_each_entry(f, &vsi->mac_filter_list, list)
2440 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2442 /* go through all the filters for this VSI and if there is only
2443 * vid == 0 it means there are no other filters, so vid 0 must
2444 * be replaced with -1. This signifies that we should from now
2445 * on accept any traffic (with any tag present, or untagged)
2447 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2450 ether_addr_equal(netdev->dev_addr, f->macaddr))
2458 if (!filter_count && is_netdev) {
2459 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2460 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2463 dev_info(&vsi->back->pdev->dev,
2464 "Could not add filter %d for %pM\n",
2465 I40E_VLAN_ANY, netdev->dev_addr);
2466 spin_unlock_bh(&vsi->mac_filter_list_lock);
2471 if (!filter_count) {
2472 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2473 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2474 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2477 dev_info(&vsi->back->pdev->dev,
2478 "Could not add filter %d for %pM\n",
2479 I40E_VLAN_ANY, f->macaddr);
2480 spin_unlock_bh(&vsi->mac_filter_list_lock);
2486 spin_unlock_bh(&vsi->mac_filter_list_lock);
2488 /* schedule our worker thread which will take care of
2489 * applying the new filter changes
2491 i40e_service_event_schedule(vsi->back);
2496 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2497 * @netdev: network interface to be adjusted
2498 * @vid: vlan id to be added
2500 * net_device_ops implementation for adding vlan ids
2503 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2504 __always_unused __be16 proto, u16 vid)
2506 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2507 __always_unused __be16 proto, u16 vid)
2510 struct i40e_netdev_priv *np = netdev_priv(netdev);
2511 struct i40e_vsi *vsi = np->vsi;
2517 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2519 /* If the network stack called us with vid = 0 then
2520 * it is asking to receive priority tagged packets with
2521 * vlan id 0. Our HW receives them by default when configured
2522 * to receive untagged packets so there is no need to add an
2523 * extra filter for vlan 0 tagged packets.
2526 ret = i40e_vsi_add_vlan(vsi, vid);
2528 if (!ret && (vid < VLAN_N_VID))
2529 set_bit(vid, vsi->active_vlans);
2535 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2536 * @netdev: network interface to be adjusted
2537 * @vid: vlan id to be removed
2539 * net_device_ops implementation for removing vlan ids
2542 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2543 __always_unused __be16 proto, u16 vid)
2545 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2546 __always_unused __be16 proto, u16 vid)
2549 struct i40e_netdev_priv *np = netdev_priv(netdev);
2550 struct i40e_vsi *vsi = np->vsi;
2552 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2554 /* return code is ignored as there is nothing a user
2555 * can do about failure to remove and a log message was
2556 * already printed from the other function
2558 i40e_vsi_kill_vlan(vsi, vid);
2560 clear_bit(vid, vsi->active_vlans);
2566 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2567 * @vsi: the vsi being brought back up
2569 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2576 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2578 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2579 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2584 * i40e_vsi_add_pvid - Add pvid for the VSI
2585 * @vsi: the vsi being adjusted
2586 * @vid: the vlan id to set as a PVID
2588 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2590 struct i40e_vsi_context ctxt;
2593 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2594 vsi->info.pvid = cpu_to_le16(vid);
2595 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2596 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2597 I40E_AQ_VSI_PVLAN_EMOD_STR;
2599 ctxt.seid = vsi->seid;
2600 ctxt.info = vsi->info;
2601 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2603 dev_info(&vsi->back->pdev->dev,
2604 "add pvid failed, err %s aq_err %s\n",
2605 i40e_stat_str(&vsi->back->hw, ret),
2606 i40e_aq_str(&vsi->back->hw,
2607 vsi->back->hw.aq.asq_last_status));
2615 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2616 * @vsi: the vsi being adjusted
2618 * Just use the vlan_rx_register() service to put it back to normal
2620 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2622 i40e_vlan_stripping_disable(vsi);
2628 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2629 * @vsi: ptr to the VSI
2631 * If this function returns with an error, then it's possible one or
2632 * more of the rings is populated (while the rest are not). It is the
2633 * callers duty to clean those orphaned rings.
2635 * Return 0 on success, negative on failure
2637 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2641 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2642 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2648 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2649 * @vsi: ptr to the VSI
2651 * Free VSI's transmit software resources
2653 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2660 for (i = 0; i < vsi->num_queue_pairs; i++)
2661 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2662 i40e_free_tx_resources(vsi->tx_rings[i]);
2666 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2667 * @vsi: ptr to the VSI
2669 * If this function returns with an error, then it's possible one or
2670 * more of the rings is populated (while the rest are not). It is the
2671 * callers duty to clean those orphaned rings.
2673 * Return 0 on success, negative on failure
2675 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2679 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2680 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2682 i40e_fcoe_setup_ddp_resources(vsi);
2688 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2689 * @vsi: ptr to the VSI
2691 * Free all receive software resources
2693 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2700 for (i = 0; i < vsi->num_queue_pairs; i++)
2701 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2702 i40e_free_rx_resources(vsi->rx_rings[i]);
2704 i40e_fcoe_free_ddp_resources(vsi);
2709 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2710 * @ring: The Tx ring to configure
2712 * This enables/disables XPS for a given Tx descriptor ring
2713 * based on the TCs enabled for the VSI that ring belongs to.
2715 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2717 struct i40e_vsi *vsi = ring->vsi;
2720 if (!ring->q_vector || !ring->netdev)
2723 /* Single TC mode enable XPS */
2724 if (vsi->tc_config.numtc <= 1) {
2725 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2726 netif_set_xps_queue(ring->netdev,
2727 &ring->q_vector->affinity_mask,
2729 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2730 /* Disable XPS to allow selection based on TC */
2731 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2732 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2733 free_cpumask_var(mask);
2736 /* schedule our worker thread which will take care of
2737 * applying the new filter changes
2739 i40e_service_event_schedule(vsi->back);
2743 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2744 * @ring: The Tx ring to configure
2746 * Configure the Tx descriptor ring in the HMC context.
2748 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2750 struct i40e_vsi *vsi = ring->vsi;
2751 u16 pf_q = vsi->base_queue + ring->queue_index;
2752 struct i40e_hw *hw = &vsi->back->hw;
2753 struct i40e_hmc_obj_txq tx_ctx;
2754 i40e_status err = 0;
2757 /* some ATR related tx ring init */
2758 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2759 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2760 ring->atr_count = 0;
2762 ring->atr_sample_rate = 0;
2766 i40e_config_xps_tx_ring(ring);
2768 /* clear the context structure first */
2769 memset(&tx_ctx, 0, sizeof(tx_ctx));
2771 tx_ctx.new_context = 1;
2772 tx_ctx.base = (ring->dma / 128);
2773 tx_ctx.qlen = ring->count;
2774 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2775 I40E_FLAG_FD_ATR_ENABLED));
2777 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2779 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2780 /* FDIR VSI tx ring can still use RS bit and writebacks */
2781 if (vsi->type != I40E_VSI_FDIR)
2782 tx_ctx.head_wb_ena = 1;
2783 tx_ctx.head_wb_addr = ring->dma +
2784 (ring->count * sizeof(struct i40e_tx_desc));
2786 /* As part of VSI creation/update, FW allocates certain
2787 * Tx arbitration queue sets for each TC enabled for
2788 * the VSI. The FW returns the handles to these queue
2789 * sets as part of the response buffer to Add VSI,
2790 * Update VSI, etc. AQ commands. It is expected that
2791 * these queue set handles be associated with the Tx
2792 * queues by the driver as part of the TX queue context
2793 * initialization. This has to be done regardless of
2794 * DCB as by default everything is mapped to TC0.
2796 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2797 tx_ctx.rdylist_act = 0;
2799 /* clear the context in the HMC */
2800 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2802 dev_info(&vsi->back->pdev->dev,
2803 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2804 ring->queue_index, pf_q, err);
2808 /* set the context in the HMC */
2809 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2811 dev_info(&vsi->back->pdev->dev,
2812 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2813 ring->queue_index, pf_q, err);
2817 /* Now associate this queue with this PCI function */
2818 if (vsi->type == I40E_VSI_VMDQ2) {
2819 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2820 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2821 I40E_QTX_CTL_VFVM_INDX_MASK;
2823 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2826 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2827 I40E_QTX_CTL_PF_INDX_MASK);
2828 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2831 /* cache tail off for easier writes later */
2832 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2838 * i40e_configure_rx_ring - Configure a receive ring context
2839 * @ring: The Rx ring to configure
2841 * Configure the Rx descriptor ring in the HMC context.
2843 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2845 struct i40e_vsi *vsi = ring->vsi;
2846 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2847 u16 pf_q = vsi->base_queue + ring->queue_index;
2848 struct i40e_hw *hw = &vsi->back->hw;
2849 struct i40e_hmc_obj_rxq rx_ctx;
2850 i40e_status err = 0;
2854 /* clear the context structure first */
2855 memset(&rx_ctx, 0, sizeof(rx_ctx));
2857 ring->rx_buf_len = vsi->rx_buf_len;
2858 ring->rx_hdr_len = vsi->rx_hdr_len;
2860 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2861 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2863 rx_ctx.base = (ring->dma / 128);
2864 rx_ctx.qlen = ring->count;
2866 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2867 set_ring_16byte_desc_enabled(ring);
2873 rx_ctx.dtype = vsi->dtype;
2875 set_ring_ps_enabled(ring);
2876 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2878 I40E_RX_SPLIT_TCP_UDP |
2881 rx_ctx.hsplit_0 = 0;
2884 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2885 (chain_len * ring->rx_buf_len));
2886 if (hw->revision_id == 0)
2887 rx_ctx.lrxqthresh = 0;
2889 rx_ctx.lrxqthresh = 2;
2890 rx_ctx.crcstrip = 1;
2892 /* this controls whether VLAN is stripped from inner headers */
2895 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2897 /* set the prefena field to 1 because the manual says to */
2900 /* clear the context in the HMC */
2901 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2903 dev_info(&vsi->back->pdev->dev,
2904 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2905 ring->queue_index, pf_q, err);
2909 /* set the context in the HMC */
2910 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2912 dev_info(&vsi->back->pdev->dev,
2913 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2914 ring->queue_index, pf_q, err);
2918 /* cache tail for quicker writes, and clear the reg before use */
2919 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2920 writel(0, ring->tail);
2922 if (ring_is_ps_enabled(ring)) {
2923 i40e_alloc_rx_headers(ring);
2924 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2926 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2933 * i40e_vsi_configure_tx - Configure the VSI for Tx
2934 * @vsi: VSI structure describing this set of rings and resources
2936 * Configure the Tx VSI for operation.
2938 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2943 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2944 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2950 * i40e_vsi_configure_rx - Configure the VSI for Rx
2951 * @vsi: the VSI being configured
2953 * Configure the Rx VSI for operation.
2955 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2960 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2961 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2962 + ETH_FCS_LEN + VLAN_HLEN;
2964 vsi->max_frame = I40E_RXBUFFER_2048;
2966 /* figure out correct receive buffer length */
2967 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2968 I40E_FLAG_RX_PS_ENABLED)) {
2969 case I40E_FLAG_RX_1BUF_ENABLED:
2970 vsi->rx_hdr_len = 0;
2971 vsi->rx_buf_len = vsi->max_frame;
2972 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2974 case I40E_FLAG_RX_PS_ENABLED:
2975 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2976 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2977 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2980 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2981 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2982 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2987 /* setup rx buffer for FCoE */
2988 if ((vsi->type == I40E_VSI_FCOE) &&
2989 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2990 vsi->rx_hdr_len = 0;
2991 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2992 vsi->max_frame = I40E_RXBUFFER_3072;
2993 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2996 #endif /* I40E_FCOE */
2997 /* round up for the chip's needs */
2998 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2999 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
3000 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3001 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3003 /* set up individual rings */
3004 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3005 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3011 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3012 * @vsi: ptr to the VSI
3014 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3016 struct i40e_ring *tx_ring, *rx_ring;
3017 u16 qoffset, qcount;
3020 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3021 /* Reset the TC information */
3022 for (i = 0; i < vsi->num_queue_pairs; i++) {
3023 rx_ring = vsi->rx_rings[i];
3024 tx_ring = vsi->tx_rings[i];
3025 rx_ring->dcb_tc = 0;
3026 tx_ring->dcb_tc = 0;
3030 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3031 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3034 qoffset = vsi->tc_config.tc_info[n].qoffset;
3035 qcount = vsi->tc_config.tc_info[n].qcount;
3036 for (i = qoffset; i < (qoffset + qcount); i++) {
3037 rx_ring = vsi->rx_rings[i];
3038 tx_ring = vsi->tx_rings[i];
3039 rx_ring->dcb_tc = n;
3040 tx_ring->dcb_tc = n;
3046 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3047 * @vsi: ptr to the VSI
3049 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3052 i40e_set_rx_mode(vsi->netdev);
3056 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3057 * @vsi: Pointer to the targeted VSI
3059 * This function replays the hlist on the hw where all the SB Flow Director
3060 * filters were saved.
3062 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3064 struct i40e_fdir_filter *filter;
3065 struct i40e_pf *pf = vsi->back;
3066 struct hlist_node *node;
3068 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3071 hlist_for_each_entry_safe(filter, node,
3072 &pf->fdir_filter_list, fdir_node) {
3073 i40e_add_del_fdir(vsi, filter, true);
3078 * i40e_vsi_configure - Set up the VSI for action
3079 * @vsi: the VSI being configured
3081 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3085 i40e_set_vsi_rx_mode(vsi);
3086 i40e_restore_vlan(vsi);
3087 i40e_vsi_config_dcb_rings(vsi);
3088 err = i40e_vsi_configure_tx(vsi);
3090 err = i40e_vsi_configure_rx(vsi);
3096 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3097 * @vsi: the VSI being configured
3099 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3101 struct i40e_pf *pf = vsi->back;
3102 struct i40e_hw *hw = &pf->hw;
3107 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3108 * and PFINT_LNKLSTn registers, e.g.:
3109 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3111 qp = vsi->base_queue;
3112 vector = vsi->base_vector;
3113 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3114 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3116 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3117 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3118 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3119 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3121 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3122 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3123 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3125 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3126 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3128 /* Linked list for the queuepairs assigned to this vector */
3129 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3130 for (q = 0; q < q_vector->num_ringpairs; q++) {
3133 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3134 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3135 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3136 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3138 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3140 wr32(hw, I40E_QINT_RQCTL(qp), val);
3142 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3143 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3144 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3145 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3147 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3149 /* Terminate the linked list */
3150 if (q == (q_vector->num_ringpairs - 1))
3151 val |= (I40E_QUEUE_END_OF_LIST
3152 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3154 wr32(hw, I40E_QINT_TQCTL(qp), val);
3163 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3164 * @hw: ptr to the hardware info
3166 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3168 struct i40e_hw *hw = &pf->hw;
3171 /* clear things first */
3172 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3173 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3175 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3176 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3177 I40E_PFINT_ICR0_ENA_GRST_MASK |
3178 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3179 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3180 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3181 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3182 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3184 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3185 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3187 if (pf->flags & I40E_FLAG_PTP)
3188 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3190 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3192 /* SW_ITR_IDX = 0, but don't change INTENA */
3193 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3194 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3196 /* OTHER_ITR_IDX = 0 */
3197 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3201 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3202 * @vsi: the VSI being configured
3204 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3206 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3207 struct i40e_pf *pf = vsi->back;
3208 struct i40e_hw *hw = &pf->hw;
3211 /* set the ITR configuration */
3212 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3213 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3214 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3215 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3216 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3217 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3218 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3220 i40e_enable_misc_int_causes(pf);
3222 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3223 wr32(hw, I40E_PFINT_LNKLST0, 0);
3225 /* Associate the queue pair to the vector and enable the queue int */
3226 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3227 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3228 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3230 wr32(hw, I40E_QINT_RQCTL(0), val);
3232 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3233 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3234 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3236 wr32(hw, I40E_QINT_TQCTL(0), val);
3241 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3242 * @pf: board private structure
3244 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3246 struct i40e_hw *hw = &pf->hw;
3248 wr32(hw, I40E_PFINT_DYN_CTL0,
3249 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3254 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3255 * @pf: board private structure
3256 * @clearpba: true when all pending interrupt events should be cleared
3258 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3260 struct i40e_hw *hw = &pf->hw;
3263 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3264 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3265 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3267 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3272 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3273 * @irq: interrupt number
3274 * @data: pointer to a q_vector
3276 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3278 struct i40e_q_vector *q_vector = data;
3280 if (!q_vector->tx.ring && !q_vector->rx.ring)
3283 napi_schedule_irqoff(&q_vector->napi);
3289 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3290 * @vsi: the VSI being configured
3291 * @basename: name for the vector
3293 * Allocates MSI-X vectors and requests interrupts from the kernel.
3295 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3297 int q_vectors = vsi->num_q_vectors;
3298 struct i40e_pf *pf = vsi->back;
3299 int base = vsi->base_vector;
3304 for (vector = 0; vector < q_vectors; vector++) {
3305 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3307 if (q_vector->tx.ring && q_vector->rx.ring) {
3308 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3309 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3311 } else if (q_vector->rx.ring) {
3312 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3313 "%s-%s-%d", basename, "rx", rx_int_idx++);
3314 } else if (q_vector->tx.ring) {
3315 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3316 "%s-%s-%d", basename, "tx", tx_int_idx++);
3318 /* skip this unused q_vector */
3321 err = request_irq(pf->msix_entries[base + vector].vector,
3327 dev_info(&pf->pdev->dev,
3328 "MSIX request_irq failed, error: %d\n", err);
3329 goto free_queue_irqs;
3331 /* assign the mask for this irq */
3332 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3333 &q_vector->affinity_mask);
3336 vsi->irqs_ready = true;
3342 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3344 free_irq(pf->msix_entries[base + vector].vector,
3345 &(vsi->q_vectors[vector]));
3351 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3352 * @vsi: the VSI being un-configured
3354 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3356 struct i40e_pf *pf = vsi->back;
3357 struct i40e_hw *hw = &pf->hw;
3358 int base = vsi->base_vector;
3361 for (i = 0; i < vsi->num_queue_pairs; i++) {
3362 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3363 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3366 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3367 for (i = vsi->base_vector;
3368 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3369 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3372 for (i = 0; i < vsi->num_q_vectors; i++)
3373 synchronize_irq(pf->msix_entries[i + base].vector);
3375 /* Legacy and MSI mode - this stops all interrupt handling */
3376 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3377 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3379 synchronize_irq(pf->pdev->irq);
3384 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3385 * @vsi: the VSI being configured
3387 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3389 struct i40e_pf *pf = vsi->back;
3392 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3393 for (i = 0; i < vsi->num_q_vectors; i++)
3394 i40e_irq_dynamic_enable(vsi, i);
3396 i40e_irq_dynamic_enable_icr0(pf, true);
3399 i40e_flush(&pf->hw);
3404 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3405 * @pf: board private structure
3407 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3410 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3411 i40e_flush(&pf->hw);
3415 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3416 * @irq: interrupt number
3417 * @data: pointer to a q_vector
3419 * This is the handler used for all MSI/Legacy interrupts, and deals
3420 * with both queue and non-queue interrupts. This is also used in
3421 * MSIX mode to handle the non-queue interrupts.
3423 static irqreturn_t i40e_intr(int irq, void *data)
3425 struct i40e_pf *pf = (struct i40e_pf *)data;
3426 struct i40e_hw *hw = &pf->hw;
3427 irqreturn_t ret = IRQ_NONE;
3428 u32 icr0, icr0_remaining;
3431 icr0 = rd32(hw, I40E_PFINT_ICR0);
3432 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3434 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3435 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3438 /* if interrupt but no bits showing, must be SWINT */
3439 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3440 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3443 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3444 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3445 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3446 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3447 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3450 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3451 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3452 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3453 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3455 /* We do not have a way to disarm Queue causes while leaving
3456 * interrupt enabled for all other causes, ideally
3457 * interrupt should be disabled while we are in NAPI but
3458 * this is not a performance path and napi_schedule()
3459 * can deal with rescheduling.
3461 if (!test_bit(__I40E_DOWN, &pf->state))
3462 napi_schedule_irqoff(&q_vector->napi);
3465 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3466 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3467 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3468 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3471 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3472 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3473 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3476 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3477 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3478 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3481 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3482 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3483 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3484 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3485 val = rd32(hw, I40E_GLGEN_RSTAT);
3486 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3487 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3488 if (val == I40E_RESET_CORER) {
3490 } else if (val == I40E_RESET_GLOBR) {
3492 } else if (val == I40E_RESET_EMPR) {
3494 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3498 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3499 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3500 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3501 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3502 rd32(hw, I40E_PFHMC_ERRORINFO),
3503 rd32(hw, I40E_PFHMC_ERRORDATA));
3506 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3507 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3509 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3510 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3511 i40e_ptp_tx_hwtstamp(pf);
3515 /* If a critical error is pending we have no choice but to reset the
3517 * Report and mask out any remaining unexpected interrupts.
3519 icr0_remaining = icr0 & ena_mask;
3520 if (icr0_remaining) {
3521 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3523 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3524 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3525 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3526 dev_info(&pf->pdev->dev, "device will be reset\n");
3527 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3528 i40e_service_event_schedule(pf);
3530 ena_mask &= ~icr0_remaining;
3535 /* re-enable interrupt causes */
3536 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3537 if (!test_bit(__I40E_DOWN, &pf->state)) {
3538 i40e_service_event_schedule(pf);
3539 i40e_irq_dynamic_enable_icr0(pf, false);
3546 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3547 * @tx_ring: tx ring to clean
3548 * @budget: how many cleans we're allowed
3550 * Returns true if there's any budget left (e.g. the clean is finished)
3552 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3554 struct i40e_vsi *vsi = tx_ring->vsi;
3555 u16 i = tx_ring->next_to_clean;
3556 struct i40e_tx_buffer *tx_buf;
3557 struct i40e_tx_desc *tx_desc;
3559 tx_buf = &tx_ring->tx_bi[i];
3560 tx_desc = I40E_TX_DESC(tx_ring, i);
3561 i -= tx_ring->count;
3564 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3566 /* if next_to_watch is not set then there is no work pending */
3570 /* prevent any other reads prior to eop_desc */
3571 read_barrier_depends();
3573 /* if the descriptor isn't done, no work yet to do */
3574 if (!(eop_desc->cmd_type_offset_bsz &
3575 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3578 /* clear next_to_watch to prevent false hangs */
3579 tx_buf->next_to_watch = NULL;
3581 tx_desc->buffer_addr = 0;
3582 tx_desc->cmd_type_offset_bsz = 0;
3583 /* move past filter desc */
3588 i -= tx_ring->count;
3589 tx_buf = tx_ring->tx_bi;
3590 tx_desc = I40E_TX_DESC(tx_ring, 0);
3592 /* unmap skb header data */
3593 dma_unmap_single(tx_ring->dev,
3594 dma_unmap_addr(tx_buf, dma),
3595 dma_unmap_len(tx_buf, len),
3597 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3598 kfree(tx_buf->raw_buf);
3600 tx_buf->raw_buf = NULL;
3601 tx_buf->tx_flags = 0;
3602 tx_buf->next_to_watch = NULL;
3603 dma_unmap_len_set(tx_buf, len, 0);
3604 tx_desc->buffer_addr = 0;
3605 tx_desc->cmd_type_offset_bsz = 0;
3607 /* move us past the eop_desc for start of next FD desc */
3612 i -= tx_ring->count;
3613 tx_buf = tx_ring->tx_bi;
3614 tx_desc = I40E_TX_DESC(tx_ring, 0);
3617 /* update budget accounting */
3619 } while (likely(budget));
3621 i += tx_ring->count;
3622 tx_ring->next_to_clean = i;
3624 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3625 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3631 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3632 * @irq: interrupt number
3633 * @data: pointer to a q_vector
3635 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3637 struct i40e_q_vector *q_vector = data;
3638 struct i40e_vsi *vsi;
3640 if (!q_vector->tx.ring)
3643 vsi = q_vector->tx.ring->vsi;
3644 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3650 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3651 * @vsi: the VSI being configured
3652 * @v_idx: vector index
3653 * @qp_idx: queue pair index
3655 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3657 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3658 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3659 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3661 tx_ring->q_vector = q_vector;
3662 tx_ring->next = q_vector->tx.ring;
3663 q_vector->tx.ring = tx_ring;
3664 q_vector->tx.count++;
3666 rx_ring->q_vector = q_vector;
3667 rx_ring->next = q_vector->rx.ring;
3668 q_vector->rx.ring = rx_ring;
3669 q_vector->rx.count++;
3673 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3674 * @vsi: the VSI being configured
3676 * This function maps descriptor rings to the queue-specific vectors
3677 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3678 * one vector per queue pair, but on a constrained vector budget, we
3679 * group the queue pairs as "efficiently" as possible.
3681 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3683 int qp_remaining = vsi->num_queue_pairs;
3684 int q_vectors = vsi->num_q_vectors;
3689 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3690 * group them so there are multiple queues per vector.
3691 * It is also important to go through all the vectors available to be
3692 * sure that if we don't use all the vectors, that the remaining vectors
3693 * are cleared. This is especially important when decreasing the
3694 * number of queues in use.
3696 for (; v_start < q_vectors; v_start++) {
3697 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3699 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3701 q_vector->num_ringpairs = num_ringpairs;
3703 q_vector->rx.count = 0;
3704 q_vector->tx.count = 0;
3705 q_vector->rx.ring = NULL;
3706 q_vector->tx.ring = NULL;
3708 while (num_ringpairs--) {
3709 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3717 * i40e_vsi_request_irq - Request IRQ from the OS
3718 * @vsi: the VSI being configured
3719 * @basename: name for the vector
3721 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3723 struct i40e_pf *pf = vsi->back;
3726 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3727 err = i40e_vsi_request_irq_msix(vsi, basename);
3728 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3729 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3732 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3736 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3741 #ifdef CONFIG_NET_POLL_CONTROLLER
3743 * i40e_netpoll - A Polling 'interrupt' handler
3744 * @netdev: network interface device structure
3746 * This is used by netconsole to send skbs without having to re-enable
3747 * interrupts. It's not called while the normal interrupt routine is executing.
3750 void i40e_netpoll(struct net_device *netdev)
3752 static void i40e_netpoll(struct net_device *netdev)
3755 struct i40e_netdev_priv *np = netdev_priv(netdev);
3756 struct i40e_vsi *vsi = np->vsi;
3757 struct i40e_pf *pf = vsi->back;
3760 /* if interface is down do nothing */
3761 if (test_bit(__I40E_DOWN, &vsi->state))
3764 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3765 for (i = 0; i < vsi->num_q_vectors; i++)
3766 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3768 i40e_intr(pf->pdev->irq, netdev);
3774 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3775 * @pf: the PF being configured
3776 * @pf_q: the PF queue
3777 * @enable: enable or disable state of the queue
3779 * This routine will wait for the given Tx queue of the PF to reach the
3780 * enabled or disabled state.
3781 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3782 * multiple retries; else will return 0 in case of success.
3784 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3789 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3790 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3791 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3794 usleep_range(10, 20);
3796 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3803 * i40e_vsi_control_tx - Start or stop a VSI's rings
3804 * @vsi: the VSI being configured
3805 * @enable: start or stop the rings
3807 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3809 struct i40e_pf *pf = vsi->back;
3810 struct i40e_hw *hw = &pf->hw;
3811 int i, j, pf_q, ret = 0;
3814 pf_q = vsi->base_queue;
3815 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3817 /* warn the TX unit of coming changes */
3818 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3820 usleep_range(10, 20);
3822 for (j = 0; j < 50; j++) {
3823 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3824 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3825 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3827 usleep_range(1000, 2000);
3829 /* Skip if the queue is already in the requested state */
3830 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3833 /* turn on/off the queue */
3835 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3836 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3838 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3841 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3842 /* No waiting for the Tx queue to disable */
3843 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3846 /* wait for the change to finish */
3847 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3849 dev_info(&pf->pdev->dev,
3850 "VSI seid %d Tx ring %d %sable timeout\n",
3851 vsi->seid, pf_q, (enable ? "en" : "dis"));
3856 if (hw->revision_id == 0)
3862 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3863 * @pf: the PF being configured
3864 * @pf_q: the PF queue
3865 * @enable: enable or disable state of the queue
3867 * This routine will wait for the given Rx queue of the PF to reach the
3868 * enabled or disabled state.
3869 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3870 * multiple retries; else will return 0 in case of success.
3872 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3877 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3878 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3879 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3882 usleep_range(10, 20);
3884 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3891 * i40e_vsi_control_rx - Start or stop a VSI's rings
3892 * @vsi: the VSI being configured
3893 * @enable: start or stop the rings
3895 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3897 struct i40e_pf *pf = vsi->back;
3898 struct i40e_hw *hw = &pf->hw;
3899 int i, j, pf_q, ret = 0;
3902 pf_q = vsi->base_queue;
3903 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3904 for (j = 0; j < 50; j++) {
3905 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3906 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3907 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3909 usleep_range(1000, 2000);
3912 /* Skip if the queue is already in the requested state */
3913 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3916 /* turn on/off the queue */
3918 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3920 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3921 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3922 /* No waiting for the Tx queue to disable */
3923 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3926 /* wait for the change to finish */
3927 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3929 dev_info(&pf->pdev->dev,
3930 "VSI seid %d Rx ring %d %sable timeout\n",
3931 vsi->seid, pf_q, (enable ? "en" : "dis"));
3940 * i40e_vsi_control_rings - Start or stop a VSI's rings
3941 * @vsi: the VSI being configured
3942 * @enable: start or stop the rings
3944 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3948 /* do rx first for enable and last for disable */
3950 ret = i40e_vsi_control_rx(vsi, request);
3953 ret = i40e_vsi_control_tx(vsi, request);
3955 /* Ignore return value, we need to shutdown whatever we can */
3956 i40e_vsi_control_tx(vsi, request);
3957 i40e_vsi_control_rx(vsi, request);
3964 * i40e_vsi_free_irq - Free the irq association with the OS
3965 * @vsi: the VSI being configured
3967 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3969 struct i40e_pf *pf = vsi->back;
3970 struct i40e_hw *hw = &pf->hw;
3971 int base = vsi->base_vector;
3975 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3976 if (!vsi->q_vectors)
3979 if (!vsi->irqs_ready)
3982 vsi->irqs_ready = false;
3983 for (i = 0; i < vsi->num_q_vectors; i++) {
3984 u16 vector = i + base;
3986 /* free only the irqs that were actually requested */
3987 if (!vsi->q_vectors[i] ||
3988 !vsi->q_vectors[i]->num_ringpairs)
3991 /* clear the affinity_mask in the IRQ descriptor */
3992 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3994 free_irq(pf->msix_entries[vector].vector,
3997 /* Tear down the interrupt queue link list
3999 * We know that they come in pairs and always
4000 * the Rx first, then the Tx. To clear the
4001 * link list, stick the EOL value into the
4002 * next_q field of the registers.
4004 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4005 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4006 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4007 val |= I40E_QUEUE_END_OF_LIST
4008 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4009 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4011 while (qp != I40E_QUEUE_END_OF_LIST) {
4014 val = rd32(hw, I40E_QINT_RQCTL(qp));
4016 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4017 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4018 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4019 I40E_QINT_RQCTL_INTEVENT_MASK);
4021 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4022 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4024 wr32(hw, I40E_QINT_RQCTL(qp), val);
4026 val = rd32(hw, I40E_QINT_TQCTL(qp));
4028 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4029 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4031 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4032 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4033 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4034 I40E_QINT_TQCTL_INTEVENT_MASK);
4036 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4037 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4039 wr32(hw, I40E_QINT_TQCTL(qp), val);
4044 free_irq(pf->pdev->irq, pf);
4046 val = rd32(hw, I40E_PFINT_LNKLST0);
4047 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4048 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4049 val |= I40E_QUEUE_END_OF_LIST
4050 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4051 wr32(hw, I40E_PFINT_LNKLST0, val);
4053 val = rd32(hw, I40E_QINT_RQCTL(qp));
4054 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4055 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4056 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4057 I40E_QINT_RQCTL_INTEVENT_MASK);
4059 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4060 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4062 wr32(hw, I40E_QINT_RQCTL(qp), val);
4064 val = rd32(hw, I40E_QINT_TQCTL(qp));
4066 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4067 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4068 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4069 I40E_QINT_TQCTL_INTEVENT_MASK);
4071 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4072 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4074 wr32(hw, I40E_QINT_TQCTL(qp), val);
4079 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4080 * @vsi: the VSI being configured
4081 * @v_idx: Index of vector to be freed
4083 * This function frees the memory allocated to the q_vector. In addition if
4084 * NAPI is enabled it will delete any references to the NAPI struct prior
4085 * to freeing the q_vector.
4087 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4089 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4090 struct i40e_ring *ring;
4095 /* disassociate q_vector from rings */
4096 i40e_for_each_ring(ring, q_vector->tx)
4097 ring->q_vector = NULL;
4099 i40e_for_each_ring(ring, q_vector->rx)
4100 ring->q_vector = NULL;
4102 /* only VSI w/ an associated netdev is set up w/ NAPI */
4104 netif_napi_del(&q_vector->napi);
4106 vsi->q_vectors[v_idx] = NULL;
4108 kfree_rcu(q_vector, rcu);
4112 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4113 * @vsi: the VSI being un-configured
4115 * This frees the memory allocated to the q_vectors and
4116 * deletes references to the NAPI struct.
4118 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4122 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4123 i40e_free_q_vector(vsi, v_idx);
4127 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4128 * @pf: board private structure
4130 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4132 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4133 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4134 pci_disable_msix(pf->pdev);
4135 kfree(pf->msix_entries);
4136 pf->msix_entries = NULL;
4137 kfree(pf->irq_pile);
4138 pf->irq_pile = NULL;
4139 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4140 pci_disable_msi(pf->pdev);
4142 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4146 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4147 * @pf: board private structure
4149 * We go through and clear interrupt specific resources and reset the structure
4150 * to pre-load conditions
4152 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4156 i40e_stop_misc_vector(pf);
4157 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4158 synchronize_irq(pf->msix_entries[0].vector);
4159 free_irq(pf->msix_entries[0].vector, pf);
4162 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4163 I40E_IWARP_IRQ_PILE_ID);
4165 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4166 for (i = 0; i < pf->num_alloc_vsi; i++)
4168 i40e_vsi_free_q_vectors(pf->vsi[i]);
4169 i40e_reset_interrupt_capability(pf);
4173 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4174 * @vsi: the VSI being configured
4176 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4183 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4184 napi_enable(&vsi->q_vectors[q_idx]->napi);
4188 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4189 * @vsi: the VSI being configured
4191 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4198 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4199 napi_disable(&vsi->q_vectors[q_idx]->napi);
4203 * i40e_vsi_close - Shut down a VSI
4204 * @vsi: the vsi to be quelled
4206 static void i40e_vsi_close(struct i40e_vsi *vsi)
4210 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4212 i40e_vsi_free_irq(vsi);
4213 i40e_vsi_free_tx_resources(vsi);
4214 i40e_vsi_free_rx_resources(vsi);
4215 vsi->current_netdev_flags = 0;
4216 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4218 i40e_notify_client_of_netdev_close(vsi, reset);
4222 * i40e_quiesce_vsi - Pause a given VSI
4223 * @vsi: the VSI being paused
4225 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4227 if (test_bit(__I40E_DOWN, &vsi->state))
4230 /* No need to disable FCoE VSI when Tx suspended */
4231 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4232 vsi->type == I40E_VSI_FCOE) {
4233 dev_dbg(&vsi->back->pdev->dev,
4234 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4238 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4239 if (vsi->netdev && netif_running(vsi->netdev))
4240 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4242 i40e_vsi_close(vsi);
4246 * i40e_unquiesce_vsi - Resume a given VSI
4247 * @vsi: the VSI being resumed
4249 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4251 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4254 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4255 if (vsi->netdev && netif_running(vsi->netdev))
4256 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4258 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4262 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4265 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4269 for (v = 0; v < pf->num_alloc_vsi; v++) {
4271 i40e_quiesce_vsi(pf->vsi[v]);
4276 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4279 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4283 for (v = 0; v < pf->num_alloc_vsi; v++) {
4285 i40e_unquiesce_vsi(pf->vsi[v]);
4289 #ifdef CONFIG_I40E_DCB
4291 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4292 * @vsi: the VSI being configured
4294 * This function waits for the given VSI's queues to be disabled.
4296 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4298 struct i40e_pf *pf = vsi->back;
4301 pf_q = vsi->base_queue;
4302 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4303 /* Check and wait for the disable status of the queue */
4304 ret = i40e_pf_txq_wait(pf, pf_q, false);
4306 dev_info(&pf->pdev->dev,
4307 "VSI seid %d Tx ring %d disable timeout\n",
4313 pf_q = vsi->base_queue;
4314 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4315 /* Check and wait for the disable status of the queue */
4316 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4318 dev_info(&pf->pdev->dev,
4319 "VSI seid %d Rx ring %d disable timeout\n",
4329 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4332 * This function waits for the queues to be in disabled state for all the
4333 * VSIs that are managed by this PF.
4335 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4339 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4340 /* No need to wait for FCoE VSI queues */
4341 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4342 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4354 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4355 * @q_idx: TX queue number
4356 * @vsi: Pointer to VSI struct
4358 * This function checks specified queue for given VSI. Detects hung condition.
4359 * Sets hung bit since it is two step process. Before next run of service task
4360 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4361 * hung condition remain unchanged and during subsequent run, this function
4362 * issues SW interrupt to recover from hung condition.
4364 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4366 struct i40e_ring *tx_ring = NULL;
4368 u32 head, val, tx_pending_hw;
4373 /* now that we have an index, find the tx_ring struct */
4374 for (i = 0; i < vsi->num_queue_pairs; i++) {
4375 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4376 if (q_idx == vsi->tx_rings[i]->queue_index) {
4377 tx_ring = vsi->tx_rings[i];
4386 /* Read interrupt register */
4387 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4389 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4390 tx_ring->vsi->base_vector - 1));
4392 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4394 head = i40e_get_head(tx_ring);
4396 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4398 /* HW is done executing descriptors, updated HEAD write back,
4399 * but SW hasn't processed those descriptors. If interrupt is
4400 * not generated from this point ON, it could result into
4401 * dev_watchdog detecting timeout on those netdev_queue,
4402 * hence proactively trigger SW interrupt.
4404 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4405 /* NAPI Poll didn't run and clear since it was set */
4406 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4407 &tx_ring->q_vector->hung_detected)) {
4408 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4409 vsi->seid, q_idx, tx_pending_hw,
4410 tx_ring->next_to_clean, head,
4411 tx_ring->next_to_use,
4412 readl(tx_ring->tail));
4413 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4414 vsi->seid, q_idx, val);
4415 i40e_force_wb(vsi, tx_ring->q_vector);
4417 /* First Chance - detected possible hung */
4418 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4419 &tx_ring->q_vector->hung_detected);
4423 /* This is the case where we have interrupts missing,
4424 * so the tx_pending in HW will most likely be 0, but we
4425 * will have tx_pending in SW since the WB happened but the
4426 * interrupt got lost.
4428 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4429 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4430 if (napi_reschedule(&tx_ring->q_vector->napi))
4431 tx_ring->tx_stats.tx_lost_interrupt++;
4436 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4437 * @pf: pointer to PF struct
4439 * LAN VSI has netdev and netdev has TX queues. This function is to check
4440 * each of those TX queues if they are hung, trigger recovery by issuing
4443 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4445 struct net_device *netdev;
4446 struct i40e_vsi *vsi;
4449 /* Only for LAN VSI */
4450 vsi = pf->vsi[pf->lan_vsi];
4455 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4456 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4457 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4460 /* Make sure type is MAIN VSI */
4461 if (vsi->type != I40E_VSI_MAIN)
4464 netdev = vsi->netdev;
4468 /* Bail out if netif_carrier is not OK */
4469 if (!netif_carrier_ok(netdev))
4472 /* Go thru' TX queues for netdev */
4473 for (i = 0; i < netdev->num_tx_queues; i++) {
4474 struct netdev_queue *q;
4476 q = netdev_get_tx_queue(netdev, i);
4478 i40e_detect_recover_hung_queue(i, vsi);
4483 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4484 * @pf: pointer to PF
4486 * Get TC map for ISCSI PF type that will include iSCSI TC
4489 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4491 struct i40e_dcb_app_priority_table app;
4492 struct i40e_hw *hw = &pf->hw;
4493 u8 enabled_tc = 1; /* TC0 is always enabled */
4495 /* Get the iSCSI APP TLV */
4496 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4498 for (i = 0; i < dcbcfg->numapps; i++) {
4499 app = dcbcfg->app[i];
4500 if (app.selector == I40E_APP_SEL_TCPIP &&
4501 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4502 tc = dcbcfg->etscfg.prioritytable[app.priority];
4503 enabled_tc |= BIT(tc);
4512 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4513 * @dcbcfg: the corresponding DCBx configuration structure
4515 * Return the number of TCs from given DCBx configuration
4517 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4522 /* Scan the ETS Config Priority Table to find
4523 * traffic class enabled for a given priority
4524 * and use the traffic class index to get the
4525 * number of traffic classes enabled
4527 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4528 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4529 num_tc = dcbcfg->etscfg.prioritytable[i];
4532 /* Traffic class index starts from zero so
4533 * increment to return the actual count
4539 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4540 * @dcbcfg: the corresponding DCBx configuration structure
4542 * Query the current DCB configuration and return the number of
4543 * traffic classes enabled from the given DCBX config
4545 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4547 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4551 for (i = 0; i < num_tc; i++)
4552 enabled_tc |= BIT(i);
4558 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4559 * @pf: PF being queried
4561 * Return number of traffic classes enabled for the given PF
4563 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4565 struct i40e_hw *hw = &pf->hw;
4568 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4570 /* If DCB is not enabled then always in single TC */
4571 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4574 /* SFP mode will be enabled for all TCs on port */
4575 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4576 return i40e_dcb_get_num_tc(dcbcfg);
4578 /* MFP mode return count of enabled TCs for this PF */
4579 if (pf->hw.func_caps.iscsi)
4580 enabled_tc = i40e_get_iscsi_tc_map(pf);
4582 return 1; /* Only TC0 */
4584 /* At least have TC0 */
4585 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4586 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4587 if (enabled_tc & BIT(i))
4594 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4595 * @pf: PF being queried
4597 * Return a bitmap for first enabled traffic class for this PF.
4599 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4601 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4605 return 0x1; /* TC0 */
4607 /* Find the first enabled TC */
4608 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4609 if (enabled_tc & BIT(i))
4617 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4618 * @pf: PF being queried
4620 * Return a bitmap for enabled traffic classes for this PF.
4622 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4624 /* If DCB is not enabled for this PF then just return default TC */
4625 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4626 return i40e_pf_get_default_tc(pf);
4628 /* SFP mode we want PF to be enabled for all TCs */
4629 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4630 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4632 /* MFP enabled and iSCSI PF type */
4633 if (pf->hw.func_caps.iscsi)
4634 return i40e_get_iscsi_tc_map(pf);
4636 return i40e_pf_get_default_tc(pf);
4640 * i40e_vsi_get_bw_info - Query VSI BW Information
4641 * @vsi: the VSI being queried
4643 * Returns 0 on success, negative value on failure
4645 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4647 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4648 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4649 struct i40e_pf *pf = vsi->back;
4650 struct i40e_hw *hw = &pf->hw;
4655 /* Get the VSI level BW configuration */
4656 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4658 dev_info(&pf->pdev->dev,
4659 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4660 i40e_stat_str(&pf->hw, ret),
4661 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4665 /* Get the VSI level BW configuration per TC */
4666 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4669 dev_info(&pf->pdev->dev,
4670 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4671 i40e_stat_str(&pf->hw, ret),
4672 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4676 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4677 dev_info(&pf->pdev->dev,
4678 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4679 bw_config.tc_valid_bits,
4680 bw_ets_config.tc_valid_bits);
4681 /* Still continuing */
4684 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4685 vsi->bw_max_quanta = bw_config.max_bw;
4686 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4687 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4688 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4689 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4690 vsi->bw_ets_limit_credits[i] =
4691 le16_to_cpu(bw_ets_config.credits[i]);
4692 /* 3 bits out of 4 for each TC */
4693 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4700 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4701 * @vsi: the VSI being configured
4702 * @enabled_tc: TC bitmap
4703 * @bw_credits: BW shared credits per TC
4705 * Returns 0 on success, negative value on failure
4707 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4710 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4714 bw_data.tc_valid_bits = enabled_tc;
4715 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4716 bw_data.tc_bw_credits[i] = bw_share[i];
4718 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4721 dev_info(&vsi->back->pdev->dev,
4722 "AQ command Config VSI BW allocation per TC failed = %d\n",
4723 vsi->back->hw.aq.asq_last_status);
4727 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4728 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4734 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4735 * @vsi: the VSI being configured
4736 * @enabled_tc: TC map to be enabled
4739 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4741 struct net_device *netdev = vsi->netdev;
4742 struct i40e_pf *pf = vsi->back;
4743 struct i40e_hw *hw = &pf->hw;
4746 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4752 netdev_reset_tc(netdev);
4756 /* Set up actual enabled TCs on the VSI */
4757 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4760 /* set per TC queues for the VSI */
4761 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4762 /* Only set TC queues for enabled tcs
4764 * e.g. For a VSI that has TC0 and TC3 enabled the
4765 * enabled_tc bitmap would be 0x00001001; the driver
4766 * will set the numtc for netdev as 2 that will be
4767 * referenced by the netdev layer as TC 0 and 1.
4769 if (vsi->tc_config.enabled_tc & BIT(i))
4770 netdev_set_tc_queue(netdev,
4771 vsi->tc_config.tc_info[i].netdev_tc,
4772 vsi->tc_config.tc_info[i].qcount,
4773 vsi->tc_config.tc_info[i].qoffset);
4776 /* Assign UP2TC map for the VSI */
4777 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4778 /* Get the actual TC# for the UP */
4779 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4780 /* Get the mapped netdev TC# for the UP */
4781 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4782 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4787 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4788 * @vsi: the VSI being configured
4789 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4791 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4792 struct i40e_vsi_context *ctxt)
4794 /* copy just the sections touched not the entire info
4795 * since not all sections are valid as returned by
4798 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4799 memcpy(&vsi->info.queue_mapping,
4800 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4801 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4802 sizeof(vsi->info.tc_mapping));
4806 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4807 * @vsi: VSI to be configured
4808 * @enabled_tc: TC bitmap
4810 * This configures a particular VSI for TCs that are mapped to the
4811 * given TC bitmap. It uses default bandwidth share for TCs across
4812 * VSIs to configure TC for a particular VSI.
4815 * It is expected that the VSI queues have been quisced before calling
4818 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4820 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4821 struct i40e_vsi_context ctxt;
4825 /* Check if enabled_tc is same as existing or new TCs */
4826 if (vsi->tc_config.enabled_tc == enabled_tc)
4829 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4830 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4831 if (enabled_tc & BIT(i))
4835 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4837 dev_info(&vsi->back->pdev->dev,
4838 "Failed configuring TC map %d for VSI %d\n",
4839 enabled_tc, vsi->seid);
4843 /* Update Queue Pairs Mapping for currently enabled UPs */
4844 ctxt.seid = vsi->seid;
4845 ctxt.pf_num = vsi->back->hw.pf_id;
4847 ctxt.uplink_seid = vsi->uplink_seid;
4848 ctxt.info = vsi->info;
4849 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4851 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
4852 ctxt.info.valid_sections |=
4853 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
4854 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
4857 /* Update the VSI after updating the VSI queue-mapping information */
4858 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4860 dev_info(&vsi->back->pdev->dev,
4861 "Update vsi tc config failed, err %s aq_err %s\n",
4862 i40e_stat_str(&vsi->back->hw, ret),
4863 i40e_aq_str(&vsi->back->hw,
4864 vsi->back->hw.aq.asq_last_status));
4867 /* update the local VSI info with updated queue map */
4868 i40e_vsi_update_queue_map(vsi, &ctxt);
4869 vsi->info.valid_sections = 0;
4871 /* Update current VSI BW information */
4872 ret = i40e_vsi_get_bw_info(vsi);
4874 dev_info(&vsi->back->pdev->dev,
4875 "Failed updating vsi bw info, err %s aq_err %s\n",
4876 i40e_stat_str(&vsi->back->hw, ret),
4877 i40e_aq_str(&vsi->back->hw,
4878 vsi->back->hw.aq.asq_last_status));
4882 /* Update the netdev TC setup */
4883 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4889 * i40e_veb_config_tc - Configure TCs for given VEB
4891 * @enabled_tc: TC bitmap
4893 * Configures given TC bitmap for VEB (switching) element
4895 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4897 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4898 struct i40e_pf *pf = veb->pf;
4902 /* No TCs or already enabled TCs just return */
4903 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4906 bw_data.tc_valid_bits = enabled_tc;
4907 /* bw_data.absolute_credits is not set (relative) */
4909 /* Enable ETS TCs with equal BW Share for now */
4910 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4911 if (enabled_tc & BIT(i))
4912 bw_data.tc_bw_share_credits[i] = 1;
4915 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4918 dev_info(&pf->pdev->dev,
4919 "VEB bw config failed, err %s aq_err %s\n",
4920 i40e_stat_str(&pf->hw, ret),
4921 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4925 /* Update the BW information */
4926 ret = i40e_veb_get_bw_info(veb);
4928 dev_info(&pf->pdev->dev,
4929 "Failed getting veb bw config, err %s aq_err %s\n",
4930 i40e_stat_str(&pf->hw, ret),
4931 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4938 #ifdef CONFIG_I40E_DCB
4940 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4943 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4944 * the caller would've quiesce all the VSIs before calling
4947 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4953 /* Enable the TCs available on PF to all VEBs */
4954 tc_map = i40e_pf_get_tc_map(pf);
4955 for (v = 0; v < I40E_MAX_VEB; v++) {
4958 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4960 dev_info(&pf->pdev->dev,
4961 "Failed configuring TC for VEB seid=%d\n",
4963 /* Will try to configure as many components */
4967 /* Update each VSI */
4968 for (v = 0; v < pf->num_alloc_vsi; v++) {
4972 /* - Enable all TCs for the LAN VSI
4974 * - For FCoE VSI only enable the TC configured
4975 * as per the APP TLV
4977 * - For all others keep them at TC0 for now
4979 if (v == pf->lan_vsi)
4980 tc_map = i40e_pf_get_tc_map(pf);
4982 tc_map = i40e_pf_get_default_tc(pf);
4984 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4985 tc_map = i40e_get_fcoe_tc_map(pf);
4986 #endif /* #ifdef I40E_FCOE */
4988 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4990 dev_info(&pf->pdev->dev,
4991 "Failed configuring TC for VSI seid=%d\n",
4993 /* Will try to configure as many components */
4995 /* Re-configure VSI vectors based on updated TC map */
4996 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4997 if (pf->vsi[v]->netdev)
4998 i40e_dcbnl_set_all(pf->vsi[v]);
5000 i40e_notify_client_of_l2_param_changes(pf->vsi[v]);
5005 * i40e_resume_port_tx - Resume port Tx
5008 * Resume a port's Tx and issue a PF reset in case of failure to
5011 static int i40e_resume_port_tx(struct i40e_pf *pf)
5013 struct i40e_hw *hw = &pf->hw;
5016 ret = i40e_aq_resume_port_tx(hw, NULL);
5018 dev_info(&pf->pdev->dev,
5019 "Resume Port Tx failed, err %s aq_err %s\n",
5020 i40e_stat_str(&pf->hw, ret),
5021 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5022 /* Schedule PF reset to recover */
5023 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5024 i40e_service_event_schedule(pf);
5031 * i40e_init_pf_dcb - Initialize DCB configuration
5032 * @pf: PF being configured
5034 * Query the current DCB configuration and cache it
5035 * in the hardware structure
5037 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5039 struct i40e_hw *hw = &pf->hw;
5042 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5043 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5046 /* Get the initial DCB configuration */
5047 err = i40e_init_dcb(hw);
5049 /* Device/Function is not DCBX capable */
5050 if ((!hw->func_caps.dcb) ||
5051 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5052 dev_info(&pf->pdev->dev,
5053 "DCBX offload is not supported or is disabled for this PF.\n");
5055 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5059 /* When status is not DISABLED then DCBX in FW */
5060 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5061 DCB_CAP_DCBX_VER_IEEE;
5063 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5064 /* Enable DCB tagging only when more than one TC */
5065 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5066 pf->flags |= I40E_FLAG_DCB_ENABLED;
5067 dev_dbg(&pf->pdev->dev,
5068 "DCBX offload is supported for this PF.\n");
5071 dev_info(&pf->pdev->dev,
5072 "Query for DCB configuration failed, err %s aq_err %s\n",
5073 i40e_stat_str(&pf->hw, err),
5074 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5080 #endif /* CONFIG_I40E_DCB */
5081 #define SPEED_SIZE 14
5084 * i40e_print_link_message - print link up or down
5085 * @vsi: the VSI for which link needs a message
5087 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5089 char *speed = "Unknown";
5090 char *fc = "Unknown";
5092 if (vsi->current_isup == isup)
5094 vsi->current_isup = isup;
5096 netdev_info(vsi->netdev, "NIC Link is Down\n");
5100 /* Warn user if link speed on NPAR enabled partition is not at
5103 if (vsi->back->hw.func_caps.npar_enable &&
5104 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5105 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5106 netdev_warn(vsi->netdev,
5107 "The partition detected link speed that is less than 10Gbps\n");
5109 switch (vsi->back->hw.phy.link_info.link_speed) {
5110 case I40E_LINK_SPEED_40GB:
5113 case I40E_LINK_SPEED_20GB:
5116 case I40E_LINK_SPEED_10GB:
5119 case I40E_LINK_SPEED_1GB:
5122 case I40E_LINK_SPEED_100MB:
5129 switch (vsi->back->hw.fc.current_mode) {
5133 case I40E_FC_TX_PAUSE:
5136 case I40E_FC_RX_PAUSE:
5144 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5149 * i40e_up_complete - Finish the last steps of bringing up a connection
5150 * @vsi: the VSI being configured
5152 static int i40e_up_complete(struct i40e_vsi *vsi)
5154 struct i40e_pf *pf = vsi->back;
5157 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5158 i40e_vsi_configure_msix(vsi);
5160 i40e_configure_msi_and_legacy(vsi);
5163 err = i40e_vsi_control_rings(vsi, true);
5167 clear_bit(__I40E_DOWN, &vsi->state);
5168 i40e_napi_enable_all(vsi);
5169 i40e_vsi_enable_irq(vsi);
5171 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5173 i40e_print_link_message(vsi, true);
5174 netif_tx_start_all_queues(vsi->netdev);
5175 netif_carrier_on(vsi->netdev);
5176 } else if (vsi->netdev) {
5177 i40e_print_link_message(vsi, false);
5178 /* need to check for qualified module here*/
5179 if ((pf->hw.phy.link_info.link_info &
5180 I40E_AQ_MEDIA_AVAILABLE) &&
5181 (!(pf->hw.phy.link_info.an_info &
5182 I40E_AQ_QUALIFIED_MODULE)))
5183 netdev_err(vsi->netdev,
5184 "the driver failed to link because an unqualified module was detected.");
5187 /* replay FDIR SB filters */
5188 if (vsi->type == I40E_VSI_FDIR) {
5189 /* reset fd counters */
5190 pf->fd_add_err = pf->fd_atr_cnt = 0;
5191 if (pf->fd_tcp_rule > 0) {
5192 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5193 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5194 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5195 pf->fd_tcp_rule = 0;
5197 i40e_fdir_filter_restore(vsi);
5200 /* On the next run of the service_task, notify any clients of the new
5203 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5204 i40e_service_event_schedule(pf);
5210 * i40e_vsi_reinit_locked - Reset the VSI
5211 * @vsi: the VSI being configured
5213 * Rebuild the ring structs after some configuration
5214 * has changed, e.g. MTU size.
5216 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5218 struct i40e_pf *pf = vsi->back;
5220 WARN_ON(in_interrupt());
5221 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5222 usleep_range(1000, 2000);
5225 /* Give a VF some time to respond to the reset. The
5226 * two second wait is based upon the watchdog cycle in
5229 if (vsi->type == I40E_VSI_SRIOV)
5232 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5236 * i40e_up - Bring the connection back up after being down
5237 * @vsi: the VSI being configured
5239 int i40e_up(struct i40e_vsi *vsi)
5243 err = i40e_vsi_configure(vsi);
5245 err = i40e_up_complete(vsi);
5251 * i40e_down - Shutdown the connection processing
5252 * @vsi: the VSI being stopped
5254 void i40e_down(struct i40e_vsi *vsi)
5258 /* It is assumed that the caller of this function
5259 * sets the vsi->state __I40E_DOWN bit.
5262 netif_carrier_off(vsi->netdev);
5263 netif_tx_disable(vsi->netdev);
5265 i40e_vsi_disable_irq(vsi);
5266 i40e_vsi_control_rings(vsi, false);
5267 i40e_napi_disable_all(vsi);
5269 for (i = 0; i < vsi->num_queue_pairs; i++) {
5270 i40e_clean_tx_ring(vsi->tx_rings[i]);
5271 i40e_clean_rx_ring(vsi->rx_rings[i]);
5276 * i40e_setup_tc - configure multiple traffic classes
5277 * @netdev: net device to configure
5278 * @tc: number of traffic classes to enable
5280 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5282 struct i40e_netdev_priv *np = netdev_priv(netdev);
5283 struct i40e_vsi *vsi = np->vsi;
5284 struct i40e_pf *pf = vsi->back;
5289 /* Check if DCB enabled to continue */
5290 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5291 netdev_info(netdev, "DCB is not enabled for adapter\n");
5295 /* Check if MFP enabled */
5296 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5297 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5301 /* Check whether tc count is within enabled limit */
5302 if (tc > i40e_pf_get_num_tc(pf)) {
5303 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5307 /* Generate TC map for number of tc requested */
5308 for (i = 0; i < tc; i++)
5309 enabled_tc |= BIT(i);
5311 /* Requesting same TC configuration as already enabled */
5312 if (enabled_tc == vsi->tc_config.enabled_tc)
5315 /* Quiesce VSI queues */
5316 i40e_quiesce_vsi(vsi);
5318 /* Configure VSI for enabled TCs */
5319 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5321 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5327 i40e_unquiesce_vsi(vsi);
5334 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5335 struct tc_to_netdev *tc)
5337 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5338 struct tc_to_netdev *tc)
5341 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5343 return i40e_setup_tc(netdev, tc->tc);
5347 * i40e_open - Called when a network interface is made active
5348 * @netdev: network interface device structure
5350 * The open entry point is called when a network interface is made
5351 * active by the system (IFF_UP). At this point all resources needed
5352 * for transmit and receive operations are allocated, the interrupt
5353 * handler is registered with the OS, the netdev watchdog subtask is
5354 * enabled, and the stack is notified that the interface is ready.
5356 * Returns 0 on success, negative value on failure
5358 int i40e_open(struct net_device *netdev)
5360 struct i40e_netdev_priv *np = netdev_priv(netdev);
5361 struct i40e_vsi *vsi = np->vsi;
5362 struct i40e_pf *pf = vsi->back;
5365 /* disallow open during test or if eeprom is broken */
5366 if (test_bit(__I40E_TESTING, &pf->state) ||
5367 test_bit(__I40E_BAD_EEPROM, &pf->state))
5370 netif_carrier_off(netdev);
5372 err = i40e_vsi_open(vsi);
5376 /* configure global TSO hardware offload settings */
5377 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5378 TCP_FLAG_FIN) >> 16);
5379 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5381 TCP_FLAG_CWR) >> 16);
5382 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5384 #ifdef CONFIG_I40E_VXLAN
5385 vxlan_get_rx_port(netdev);
5387 #ifdef CONFIG_I40E_GENEVE
5388 if (pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE)
5389 geneve_get_rx_port(netdev);
5392 i40e_notify_client_of_netdev_open(vsi);
5399 * @vsi: the VSI to open
5401 * Finish initialization of the VSI.
5403 * Returns 0 on success, negative value on failure
5405 int i40e_vsi_open(struct i40e_vsi *vsi)
5407 struct i40e_pf *pf = vsi->back;
5408 char int_name[I40E_INT_NAME_STR_LEN];
5411 /* allocate descriptors */
5412 err = i40e_vsi_setup_tx_resources(vsi);
5415 err = i40e_vsi_setup_rx_resources(vsi);
5419 err = i40e_vsi_configure(vsi);
5424 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5425 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5426 err = i40e_vsi_request_irq(vsi, int_name);
5430 /* Notify the stack of the actual queue counts. */
5431 err = netif_set_real_num_tx_queues(vsi->netdev,
5432 vsi->num_queue_pairs);
5434 goto err_set_queues;
5436 err = netif_set_real_num_rx_queues(vsi->netdev,
5437 vsi->num_queue_pairs);
5439 goto err_set_queues;
5441 } else if (vsi->type == I40E_VSI_FDIR) {
5442 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5443 dev_driver_string(&pf->pdev->dev),
5444 dev_name(&pf->pdev->dev));
5445 err = i40e_vsi_request_irq(vsi, int_name);
5452 err = i40e_up_complete(vsi);
5454 goto err_up_complete;
5461 i40e_vsi_free_irq(vsi);
5463 i40e_vsi_free_rx_resources(vsi);
5465 i40e_vsi_free_tx_resources(vsi);
5466 if (vsi == pf->vsi[pf->lan_vsi])
5467 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5473 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5474 * @pf: Pointer to PF
5476 * This function destroys the hlist where all the Flow Director
5477 * filters were saved.
5479 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5481 struct i40e_fdir_filter *filter;
5482 struct hlist_node *node2;
5484 hlist_for_each_entry_safe(filter, node2,
5485 &pf->fdir_filter_list, fdir_node) {
5486 hlist_del(&filter->fdir_node);
5489 pf->fdir_pf_active_filters = 0;
5493 * i40e_close - Disables a network interface
5494 * @netdev: network interface device structure
5496 * The close entry point is called when an interface is de-activated
5497 * by the OS. The hardware is still under the driver's control, but
5498 * this netdev interface is disabled.
5500 * Returns 0, this is not allowed to fail
5502 int i40e_close(struct net_device *netdev)
5504 struct i40e_netdev_priv *np = netdev_priv(netdev);
5505 struct i40e_vsi *vsi = np->vsi;
5507 i40e_vsi_close(vsi);
5513 * i40e_do_reset - Start a PF or Core Reset sequence
5514 * @pf: board private structure
5515 * @reset_flags: which reset is requested
5517 * The essential difference in resets is that the PF Reset
5518 * doesn't clear the packet buffers, doesn't reset the PE
5519 * firmware, and doesn't bother the other PFs on the chip.
5521 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5525 WARN_ON(in_interrupt());
5528 /* do the biggest reset indicated */
5529 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5531 /* Request a Global Reset
5533 * This will start the chip's countdown to the actual full
5534 * chip reset event, and a warning interrupt to be sent
5535 * to all PFs, including the requestor. Our handler
5536 * for the warning interrupt will deal with the shutdown
5537 * and recovery of the switch setup.
5539 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5540 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5541 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5542 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5544 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5546 /* Request a Core Reset
5548 * Same as Global Reset, except does *not* include the MAC/PHY
5550 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5551 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5552 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5553 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5554 i40e_flush(&pf->hw);
5556 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5558 /* Request a PF Reset
5560 * Resets only the PF-specific registers
5562 * This goes directly to the tear-down and rebuild of
5563 * the switch, since we need to do all the recovery as
5564 * for the Core Reset.
5566 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5567 i40e_handle_reset_warning(pf);
5569 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5572 /* Find the VSI(s) that requested a re-init */
5573 dev_info(&pf->pdev->dev,
5574 "VSI reinit requested\n");
5575 for (v = 0; v < pf->num_alloc_vsi; v++) {
5576 struct i40e_vsi *vsi = pf->vsi[v];
5579 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5580 i40e_vsi_reinit_locked(pf->vsi[v]);
5581 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5584 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5587 /* Find the VSI(s) that needs to be brought down */
5588 dev_info(&pf->pdev->dev, "VSI down requested\n");
5589 for (v = 0; v < pf->num_alloc_vsi; v++) {
5590 struct i40e_vsi *vsi = pf->vsi[v];
5593 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5594 set_bit(__I40E_DOWN, &vsi->state);
5596 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5600 dev_info(&pf->pdev->dev,
5601 "bad reset request 0x%08x\n", reset_flags);
5605 #ifdef CONFIG_I40E_DCB
5607 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5608 * @pf: board private structure
5609 * @old_cfg: current DCB config
5610 * @new_cfg: new DCB config
5612 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5613 struct i40e_dcbx_config *old_cfg,
5614 struct i40e_dcbx_config *new_cfg)
5616 bool need_reconfig = false;
5618 /* Check if ETS configuration has changed */
5619 if (memcmp(&new_cfg->etscfg,
5621 sizeof(new_cfg->etscfg))) {
5622 /* If Priority Table has changed reconfig is needed */
5623 if (memcmp(&new_cfg->etscfg.prioritytable,
5624 &old_cfg->etscfg.prioritytable,
5625 sizeof(new_cfg->etscfg.prioritytable))) {
5626 need_reconfig = true;
5627 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5630 if (memcmp(&new_cfg->etscfg.tcbwtable,
5631 &old_cfg->etscfg.tcbwtable,
5632 sizeof(new_cfg->etscfg.tcbwtable)))
5633 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5635 if (memcmp(&new_cfg->etscfg.tsatable,
5636 &old_cfg->etscfg.tsatable,
5637 sizeof(new_cfg->etscfg.tsatable)))
5638 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5641 /* Check if PFC configuration has changed */
5642 if (memcmp(&new_cfg->pfc,
5644 sizeof(new_cfg->pfc))) {
5645 need_reconfig = true;
5646 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5649 /* Check if APP Table has changed */
5650 if (memcmp(&new_cfg->app,
5652 sizeof(new_cfg->app))) {
5653 need_reconfig = true;
5654 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5657 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5658 return need_reconfig;
5662 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5663 * @pf: board private structure
5664 * @e: event info posted on ARQ
5666 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5667 struct i40e_arq_event_info *e)
5669 struct i40e_aqc_lldp_get_mib *mib =
5670 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5671 struct i40e_hw *hw = &pf->hw;
5672 struct i40e_dcbx_config tmp_dcbx_cfg;
5673 bool need_reconfig = false;
5677 /* Not DCB capable or capability disabled */
5678 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5681 /* Ignore if event is not for Nearest Bridge */
5682 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5683 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5684 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5685 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5688 /* Check MIB Type and return if event for Remote MIB update */
5689 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5690 dev_dbg(&pf->pdev->dev,
5691 "LLDP event mib type %s\n", type ? "remote" : "local");
5692 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5693 /* Update the remote cached instance and return */
5694 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5695 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5696 &hw->remote_dcbx_config);
5700 /* Store the old configuration */
5701 tmp_dcbx_cfg = hw->local_dcbx_config;
5703 /* Reset the old DCBx configuration data */
5704 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5705 /* Get updated DCBX data from firmware */
5706 ret = i40e_get_dcb_config(&pf->hw);
5708 dev_info(&pf->pdev->dev,
5709 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5710 i40e_stat_str(&pf->hw, ret),
5711 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5715 /* No change detected in DCBX configs */
5716 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5717 sizeof(tmp_dcbx_cfg))) {
5718 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5722 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5723 &hw->local_dcbx_config);
5725 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5730 /* Enable DCB tagging only when more than one TC */
5731 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5732 pf->flags |= I40E_FLAG_DCB_ENABLED;
5734 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5736 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5737 /* Reconfiguration needed quiesce all VSIs */
5738 i40e_pf_quiesce_all_vsi(pf);
5740 /* Changes in configuration update VEB/VSI */
5741 i40e_dcb_reconfigure(pf);
5743 ret = i40e_resume_port_tx(pf);
5745 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5746 /* In case of error no point in resuming VSIs */
5750 /* Wait for the PF's queues to be disabled */
5751 ret = i40e_pf_wait_queues_disabled(pf);
5753 /* Schedule PF reset to recover */
5754 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5755 i40e_service_event_schedule(pf);
5757 i40e_pf_unquiesce_all_vsi(pf);
5763 #endif /* CONFIG_I40E_DCB */
5766 * i40e_do_reset_safe - Protected reset path for userland calls.
5767 * @pf: board private structure
5768 * @reset_flags: which reset is requested
5771 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5774 i40e_do_reset(pf, reset_flags);
5779 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5780 * @pf: board private structure
5781 * @e: event info posted on ARQ
5783 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5786 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5787 struct i40e_arq_event_info *e)
5789 struct i40e_aqc_lan_overflow *data =
5790 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5791 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5792 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5793 struct i40e_hw *hw = &pf->hw;
5797 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5800 /* Queue belongs to VF, find the VF and issue VF reset */
5801 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5802 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5803 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5804 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5805 vf_id -= hw->func_caps.vf_base_id;
5806 vf = &pf->vf[vf_id];
5807 i40e_vc_notify_vf_reset(vf);
5808 /* Allow VF to process pending reset notification */
5810 i40e_reset_vf(vf, false);
5815 * i40e_service_event_complete - Finish up the service event
5816 * @pf: board private structure
5818 static void i40e_service_event_complete(struct i40e_pf *pf)
5820 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5822 /* flush memory to make sure state is correct before next watchog */
5823 smp_mb__before_atomic();
5824 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5828 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5829 * @pf: board private structure
5831 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5835 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5836 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5841 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5842 * @pf: board private structure
5844 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5848 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5849 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5850 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5851 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5856 * i40e_get_global_fd_count - Get total FD filters programmed on device
5857 * @pf: board private structure
5859 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5863 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5864 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5865 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5866 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5871 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5872 * @pf: board private structure
5874 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5876 struct i40e_fdir_filter *filter;
5877 u32 fcnt_prog, fcnt_avail;
5878 struct hlist_node *node;
5880 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5883 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5886 fcnt_prog = i40e_get_global_fd_count(pf);
5887 fcnt_avail = pf->fdir_pf_filter_count;
5888 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5889 (pf->fd_add_err == 0) ||
5890 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5891 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5892 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5893 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5894 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5895 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5898 /* Wait for some more space to be available to turn on ATR */
5899 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5900 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5901 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5902 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5903 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5904 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5908 /* if hw had a problem adding a filter, delete it */
5909 if (pf->fd_inv > 0) {
5910 hlist_for_each_entry_safe(filter, node,
5911 &pf->fdir_filter_list, fdir_node) {
5912 if (filter->fd_id == pf->fd_inv) {
5913 hlist_del(&filter->fdir_node);
5915 pf->fdir_pf_active_filters--;
5921 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5922 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5924 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5925 * @pf: board private structure
5927 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5929 unsigned long min_flush_time;
5930 int flush_wait_retry = 50;
5931 bool disable_atr = false;
5935 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5938 if (!time_after(jiffies, pf->fd_flush_timestamp +
5939 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5942 /* If the flush is happening too quick and we have mostly SB rules we
5943 * should not re-enable ATR for some time.
5945 min_flush_time = pf->fd_flush_timestamp +
5946 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5947 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5949 if (!(time_after(jiffies, min_flush_time)) &&
5950 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5951 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5952 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5956 pf->fd_flush_timestamp = jiffies;
5957 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5958 /* flush all filters */
5959 wr32(&pf->hw, I40E_PFQF_CTL_1,
5960 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5961 i40e_flush(&pf->hw);
5965 /* Check FD flush status every 5-6msec */
5966 usleep_range(5000, 6000);
5967 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5968 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5970 } while (flush_wait_retry--);
5971 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5972 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5974 /* replay sideband filters */
5975 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5977 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5978 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5979 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5980 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5986 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5987 * @pf: board private structure
5989 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5991 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5994 /* We can see up to 256 filter programming desc in transit if the filters are
5995 * being applied really fast; before we see the first
5996 * filter miss error on Rx queue 0. Accumulating enough error messages before
5997 * reacting will make sure we don't cause flush too often.
5999 #define I40E_MAX_FD_PROGRAM_ERROR 256
6002 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6003 * @pf: board private structure
6005 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6008 /* if interface is down do nothing */
6009 if (test_bit(__I40E_DOWN, &pf->state))
6012 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
6015 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6016 i40e_fdir_flush_and_replay(pf);
6018 i40e_fdir_check_and_reenable(pf);
6023 * i40e_vsi_link_event - notify VSI of a link event
6024 * @vsi: vsi to be notified
6025 * @link_up: link up or down
6027 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6029 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6032 switch (vsi->type) {
6037 if (!vsi->netdev || !vsi->netdev_registered)
6041 netif_carrier_on(vsi->netdev);
6042 netif_tx_wake_all_queues(vsi->netdev);
6044 netif_carrier_off(vsi->netdev);
6045 netif_tx_stop_all_queues(vsi->netdev);
6049 case I40E_VSI_SRIOV:
6050 case I40E_VSI_VMDQ2:
6052 case I40E_VSI_IWARP:
6053 case I40E_VSI_MIRROR:
6055 /* there is no notification for other VSIs */
6061 * i40e_veb_link_event - notify elements on the veb of a link event
6062 * @veb: veb to be notified
6063 * @link_up: link up or down
6065 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6070 if (!veb || !veb->pf)
6074 /* depth first... */
6075 for (i = 0; i < I40E_MAX_VEB; i++)
6076 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6077 i40e_veb_link_event(pf->veb[i], link_up);
6079 /* ... now the local VSIs */
6080 for (i = 0; i < pf->num_alloc_vsi; i++)
6081 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6082 i40e_vsi_link_event(pf->vsi[i], link_up);
6086 * i40e_link_event - Update netif_carrier status
6087 * @pf: board private structure
6089 static void i40e_link_event(struct i40e_pf *pf)
6091 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6092 u8 new_link_speed, old_link_speed;
6094 bool new_link, old_link;
6096 /* save off old link status information */
6097 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6099 /* set this to force the get_link_status call to refresh state */
6100 pf->hw.phy.get_link_info = true;
6102 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6104 status = i40e_get_link_status(&pf->hw, &new_link);
6106 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6111 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6112 new_link_speed = pf->hw.phy.link_info.link_speed;
6114 if (new_link == old_link &&
6115 new_link_speed == old_link_speed &&
6116 (test_bit(__I40E_DOWN, &vsi->state) ||
6117 new_link == netif_carrier_ok(vsi->netdev)))
6120 if (!test_bit(__I40E_DOWN, &vsi->state))
6121 i40e_print_link_message(vsi, new_link);
6123 /* Notify the base of the switch tree connected to
6124 * the link. Floating VEBs are not notified.
6126 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6127 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6129 i40e_vsi_link_event(vsi, new_link);
6132 i40e_vc_notify_link_state(pf);
6134 if (pf->flags & I40E_FLAG_PTP)
6135 i40e_ptp_set_increment(pf);
6139 * i40e_watchdog_subtask - periodic checks not using event driven response
6140 * @pf: board private structure
6142 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6146 /* if interface is down do nothing */
6147 if (test_bit(__I40E_DOWN, &pf->state) ||
6148 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6151 /* make sure we don't do these things too often */
6152 if (time_before(jiffies, (pf->service_timer_previous +
6153 pf->service_timer_period)))
6155 pf->service_timer_previous = jiffies;
6157 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6158 i40e_link_event(pf);
6160 /* Update the stats for active netdevs so the network stack
6161 * can look at updated numbers whenever it cares to
6163 for (i = 0; i < pf->num_alloc_vsi; i++)
6164 if (pf->vsi[i] && pf->vsi[i]->netdev)
6165 i40e_update_stats(pf->vsi[i]);
6167 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6168 /* Update the stats for the active switching components */
6169 for (i = 0; i < I40E_MAX_VEB; i++)
6171 i40e_update_veb_stats(pf->veb[i]);
6174 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6178 * i40e_reset_subtask - Set up for resetting the device and driver
6179 * @pf: board private structure
6181 static void i40e_reset_subtask(struct i40e_pf *pf)
6183 u32 reset_flags = 0;
6186 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6187 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6188 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6190 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6191 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6192 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6194 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6195 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6196 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6198 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6199 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6200 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6202 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6203 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6204 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6207 /* If there's a recovery already waiting, it takes
6208 * precedence before starting a new reset sequence.
6210 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6211 i40e_handle_reset_warning(pf);
6215 /* If we're already down or resetting, just bail */
6217 !test_bit(__I40E_DOWN, &pf->state) &&
6218 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6219 i40e_do_reset(pf, reset_flags);
6226 * i40e_handle_link_event - Handle link event
6227 * @pf: board private structure
6228 * @e: event info posted on ARQ
6230 static void i40e_handle_link_event(struct i40e_pf *pf,
6231 struct i40e_arq_event_info *e)
6233 struct i40e_aqc_get_link_status *status =
6234 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6236 /* Do a new status request to re-enable LSE reporting
6237 * and load new status information into the hw struct
6238 * This completely ignores any state information
6239 * in the ARQ event info, instead choosing to always
6240 * issue the AQ update link status command.
6242 i40e_link_event(pf);
6244 /* check for unqualified module, if link is down */
6245 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6246 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6247 (!(status->link_info & I40E_AQ_LINK_UP)))
6248 dev_err(&pf->pdev->dev,
6249 "The driver failed to link because an unqualified module was detected.\n");
6253 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6254 * @pf: board private structure
6256 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6258 struct i40e_arq_event_info event;
6259 struct i40e_hw *hw = &pf->hw;
6266 /* Do not run clean AQ when PF reset fails */
6267 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6270 /* check for error indications */
6271 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6273 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6274 if (hw->debug_mask & I40E_DEBUG_AQ)
6275 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6276 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6278 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6279 if (hw->debug_mask & I40E_DEBUG_AQ)
6280 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6281 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6282 pf->arq_overflows++;
6284 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6285 if (hw->debug_mask & I40E_DEBUG_AQ)
6286 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6287 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6290 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6292 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6294 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6295 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6296 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6297 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6299 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6300 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6301 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6302 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6304 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6305 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6306 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6307 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6310 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6312 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6313 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6318 ret = i40e_clean_arq_element(hw, &event, &pending);
6319 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6322 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6326 opcode = le16_to_cpu(event.desc.opcode);
6329 case i40e_aqc_opc_get_link_status:
6330 i40e_handle_link_event(pf, &event);
6332 case i40e_aqc_opc_send_msg_to_pf:
6333 ret = i40e_vc_process_vf_msg(pf,
6334 le16_to_cpu(event.desc.retval),
6335 le32_to_cpu(event.desc.cookie_high),
6336 le32_to_cpu(event.desc.cookie_low),
6340 case i40e_aqc_opc_lldp_update_mib:
6341 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6342 #ifdef CONFIG_I40E_DCB
6344 ret = i40e_handle_lldp_event(pf, &event);
6346 #endif /* CONFIG_I40E_DCB */
6348 case i40e_aqc_opc_event_lan_overflow:
6349 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6350 i40e_handle_lan_overflow_event(pf, &event);
6352 case i40e_aqc_opc_send_msg_to_peer:
6353 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6355 case i40e_aqc_opc_nvm_erase:
6356 case i40e_aqc_opc_nvm_update:
6357 case i40e_aqc_opc_oem_post_update:
6358 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6359 "ARQ NVM operation 0x%04x completed\n",
6363 dev_info(&pf->pdev->dev,
6364 "ARQ: Unknown event 0x%04x ignored\n",
6368 } while (pending && (i++ < pf->adminq_work_limit));
6370 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6371 /* re-enable Admin queue interrupt cause */
6372 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6373 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6374 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6377 kfree(event.msg_buf);
6381 * i40e_verify_eeprom - make sure eeprom is good to use
6382 * @pf: board private structure
6384 static void i40e_verify_eeprom(struct i40e_pf *pf)
6388 err = i40e_diag_eeprom_test(&pf->hw);
6390 /* retry in case of garbage read */
6391 err = i40e_diag_eeprom_test(&pf->hw);
6393 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6395 set_bit(__I40E_BAD_EEPROM, &pf->state);
6399 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6400 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6401 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6406 * i40e_enable_pf_switch_lb
6407 * @pf: pointer to the PF structure
6409 * enable switch loop back or die - no point in a return value
6411 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6413 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6414 struct i40e_vsi_context ctxt;
6417 ctxt.seid = pf->main_vsi_seid;
6418 ctxt.pf_num = pf->hw.pf_id;
6420 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6422 dev_info(&pf->pdev->dev,
6423 "couldn't get PF vsi config, err %s aq_err %s\n",
6424 i40e_stat_str(&pf->hw, ret),
6425 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6428 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6429 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6430 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6432 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6434 dev_info(&pf->pdev->dev,
6435 "update vsi switch failed, err %s aq_err %s\n",
6436 i40e_stat_str(&pf->hw, ret),
6437 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6442 * i40e_disable_pf_switch_lb
6443 * @pf: pointer to the PF structure
6445 * disable switch loop back or die - no point in a return value
6447 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6449 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6450 struct i40e_vsi_context ctxt;
6453 ctxt.seid = pf->main_vsi_seid;
6454 ctxt.pf_num = pf->hw.pf_id;
6456 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6458 dev_info(&pf->pdev->dev,
6459 "couldn't get PF vsi config, err %s aq_err %s\n",
6460 i40e_stat_str(&pf->hw, ret),
6461 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6464 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6465 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6466 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6468 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6470 dev_info(&pf->pdev->dev,
6471 "update vsi switch failed, err %s aq_err %s\n",
6472 i40e_stat_str(&pf->hw, ret),
6473 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6478 * i40e_config_bridge_mode - Configure the HW bridge mode
6479 * @veb: pointer to the bridge instance
6481 * Configure the loop back mode for the LAN VSI that is downlink to the
6482 * specified HW bridge instance. It is expected this function is called
6483 * when a new HW bridge is instantiated.
6485 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6487 struct i40e_pf *pf = veb->pf;
6489 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6490 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6491 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6492 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6493 i40e_disable_pf_switch_lb(pf);
6495 i40e_enable_pf_switch_lb(pf);
6499 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6500 * @veb: pointer to the VEB instance
6502 * This is a recursive function that first builds the attached VSIs then
6503 * recurses in to build the next layer of VEB. We track the connections
6504 * through our own index numbers because the seid's from the HW could
6505 * change across the reset.
6507 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6509 struct i40e_vsi *ctl_vsi = NULL;
6510 struct i40e_pf *pf = veb->pf;
6514 /* build VSI that owns this VEB, temporarily attached to base VEB */
6515 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6517 pf->vsi[v]->veb_idx == veb->idx &&
6518 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6519 ctl_vsi = pf->vsi[v];
6524 dev_info(&pf->pdev->dev,
6525 "missing owner VSI for veb_idx %d\n", veb->idx);
6527 goto end_reconstitute;
6529 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6530 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6531 ret = i40e_add_vsi(ctl_vsi);
6533 dev_info(&pf->pdev->dev,
6534 "rebuild of veb_idx %d owner VSI failed: %d\n",
6536 goto end_reconstitute;
6538 i40e_vsi_reset_stats(ctl_vsi);
6540 /* create the VEB in the switch and move the VSI onto the VEB */
6541 ret = i40e_add_veb(veb, ctl_vsi);
6543 goto end_reconstitute;
6545 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6546 veb->bridge_mode = BRIDGE_MODE_VEB;
6548 veb->bridge_mode = BRIDGE_MODE_VEPA;
6549 i40e_config_bridge_mode(veb);
6551 /* create the remaining VSIs attached to this VEB */
6552 for (v = 0; v < pf->num_alloc_vsi; v++) {
6553 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6556 if (pf->vsi[v]->veb_idx == veb->idx) {
6557 struct i40e_vsi *vsi = pf->vsi[v];
6559 vsi->uplink_seid = veb->seid;
6560 ret = i40e_add_vsi(vsi);
6562 dev_info(&pf->pdev->dev,
6563 "rebuild of vsi_idx %d failed: %d\n",
6565 goto end_reconstitute;
6567 i40e_vsi_reset_stats(vsi);
6571 /* create any VEBs attached to this VEB - RECURSION */
6572 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6573 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6574 pf->veb[veb_idx]->uplink_seid = veb->seid;
6575 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6586 * i40e_get_capabilities - get info about the HW
6587 * @pf: the PF struct
6589 static int i40e_get_capabilities(struct i40e_pf *pf)
6591 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6596 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6598 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6602 /* this loads the data into the hw struct for us */
6603 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6605 i40e_aqc_opc_list_func_capabilities,
6607 /* data loaded, buffer no longer needed */
6610 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6611 /* retry with a larger buffer */
6612 buf_len = data_size;
6613 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6614 dev_info(&pf->pdev->dev,
6615 "capability discovery failed, err %s aq_err %s\n",
6616 i40e_stat_str(&pf->hw, err),
6617 i40e_aq_str(&pf->hw,
6618 pf->hw.aq.asq_last_status));
6623 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6624 dev_info(&pf->pdev->dev,
6625 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6626 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6627 pf->hw.func_caps.num_msix_vectors,
6628 pf->hw.func_caps.num_msix_vectors_vf,
6629 pf->hw.func_caps.fd_filters_guaranteed,
6630 pf->hw.func_caps.fd_filters_best_effort,
6631 pf->hw.func_caps.num_tx_qp,
6632 pf->hw.func_caps.num_vsis);
6634 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6635 + pf->hw.func_caps.num_vfs)
6636 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6637 dev_info(&pf->pdev->dev,
6638 "got num_vsis %d, setting num_vsis to %d\n",
6639 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6640 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6646 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6649 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6650 * @pf: board private structure
6652 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6654 struct i40e_vsi *vsi;
6657 /* quick workaround for an NVM issue that leaves a critical register
6660 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6661 static const u32 hkey[] = {
6662 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6663 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6664 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6667 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6668 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6671 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6674 /* find existing VSI and see if it needs configuring */
6676 for (i = 0; i < pf->num_alloc_vsi; i++) {
6677 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6683 /* create a new VSI if none exists */
6685 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6686 pf->vsi[pf->lan_vsi]->seid, 0);
6688 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6689 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6694 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6698 * i40e_fdir_teardown - release the Flow Director resources
6699 * @pf: board private structure
6701 static void i40e_fdir_teardown(struct i40e_pf *pf)
6705 i40e_fdir_filter_exit(pf);
6706 for (i = 0; i < pf->num_alloc_vsi; i++) {
6707 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6708 i40e_vsi_release(pf->vsi[i]);
6715 * i40e_prep_for_reset - prep for the core to reset
6716 * @pf: board private structure
6718 * Close up the VFs and other things in prep for PF Reset.
6720 static void i40e_prep_for_reset(struct i40e_pf *pf)
6722 struct i40e_hw *hw = &pf->hw;
6723 i40e_status ret = 0;
6726 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6727 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6729 if (i40e_check_asq_alive(&pf->hw))
6730 i40e_vc_notify_reset(pf);
6732 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6734 /* quiesce the VSIs and their queues that are not already DOWN */
6735 i40e_pf_quiesce_all_vsi(pf);
6737 for (v = 0; v < pf->num_alloc_vsi; v++) {
6739 pf->vsi[v]->seid = 0;
6742 i40e_shutdown_adminq(&pf->hw);
6744 /* call shutdown HMC */
6745 if (hw->hmc.hmc_obj) {
6746 ret = i40e_shutdown_lan_hmc(hw);
6748 dev_warn(&pf->pdev->dev,
6749 "shutdown_lan_hmc failed: %d\n", ret);
6754 * i40e_send_version - update firmware with driver version
6757 static void i40e_send_version(struct i40e_pf *pf)
6759 struct i40e_driver_version dv;
6761 dv.major_version = DRV_VERSION_MAJOR;
6762 dv.minor_version = DRV_VERSION_MINOR;
6763 dv.build_version = DRV_VERSION_BUILD;
6764 dv.subbuild_version = 0;
6765 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6766 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6770 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6771 * @pf: board private structure
6772 * @reinit: if the Main VSI needs to re-initialized.
6774 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6776 struct i40e_hw *hw = &pf->hw;
6777 u8 set_fc_aq_fail = 0;
6782 /* Now we wait for GRST to settle out.
6783 * We don't have to delete the VEBs or VSIs from the hw switch
6784 * because the reset will make them disappear.
6786 ret = i40e_pf_reset(hw);
6788 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6789 set_bit(__I40E_RESET_FAILED, &pf->state);
6790 goto clear_recovery;
6794 if (test_bit(__I40E_DOWN, &pf->state))
6795 goto clear_recovery;
6796 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6798 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6799 ret = i40e_init_adminq(&pf->hw);
6801 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6802 i40e_stat_str(&pf->hw, ret),
6803 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6804 goto clear_recovery;
6807 /* re-verify the eeprom if we just had an EMP reset */
6808 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6809 i40e_verify_eeprom(pf);
6811 i40e_clear_pxe_mode(hw);
6812 ret = i40e_get_capabilities(pf);
6814 goto end_core_reset;
6816 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6817 hw->func_caps.num_rx_qp,
6818 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6820 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6821 goto end_core_reset;
6823 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6825 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6826 goto end_core_reset;
6829 #ifdef CONFIG_I40E_DCB
6830 ret = i40e_init_pf_dcb(pf);
6832 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6833 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6834 /* Continue without DCB enabled */
6836 #endif /* CONFIG_I40E_DCB */
6838 i40e_init_pf_fcoe(pf);
6841 /* do basic switch setup */
6842 ret = i40e_setup_pf_switch(pf, reinit);
6844 goto end_core_reset;
6846 /* The driver only wants link up/down and module qualification
6847 * reports from firmware. Note the negative logic.
6849 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6850 ~(I40E_AQ_EVENT_LINK_UPDOWN |
6851 I40E_AQ_EVENT_MEDIA_NA |
6852 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
6854 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6855 i40e_stat_str(&pf->hw, ret),
6856 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6858 /* make sure our flow control settings are restored */
6859 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6861 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6862 i40e_stat_str(&pf->hw, ret),
6863 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6865 /* Rebuild the VSIs and VEBs that existed before reset.
6866 * They are still in our local switch element arrays, so only
6867 * need to rebuild the switch model in the HW.
6869 * If there were VEBs but the reconstitution failed, we'll try
6870 * try to recover minimal use by getting the basic PF VSI working.
6872 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6873 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6874 /* find the one VEB connected to the MAC, and find orphans */
6875 for (v = 0; v < I40E_MAX_VEB; v++) {
6879 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6880 pf->veb[v]->uplink_seid == 0) {
6881 ret = i40e_reconstitute_veb(pf->veb[v]);
6886 /* If Main VEB failed, we're in deep doodoo,
6887 * so give up rebuilding the switch and set up
6888 * for minimal rebuild of PF VSI.
6889 * If orphan failed, we'll report the error
6890 * but try to keep going.
6892 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6893 dev_info(&pf->pdev->dev,
6894 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6896 pf->vsi[pf->lan_vsi]->uplink_seid
6899 } else if (pf->veb[v]->uplink_seid == 0) {
6900 dev_info(&pf->pdev->dev,
6901 "rebuild of orphan VEB failed: %d\n",
6908 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6909 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6910 /* no VEB, so rebuild only the Main VSI */
6911 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6913 dev_info(&pf->pdev->dev,
6914 "rebuild of Main VSI failed: %d\n", ret);
6915 goto end_core_reset;
6919 /* Reconfigure hardware for allowing smaller MSS in the case
6920 * of TSO, so that we avoid the MDD being fired and causing
6921 * a reset in the case of small MSS+TSO.
6923 #define I40E_REG_MSS 0x000E64DC
6924 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6925 #define I40E_64BYTE_MSS 0x400000
6926 val = rd32(hw, I40E_REG_MSS);
6927 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6928 val &= ~I40E_REG_MSS_MIN_MASK;
6929 val |= I40E_64BYTE_MSS;
6930 wr32(hw, I40E_REG_MSS, val);
6933 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6935 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6937 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6938 i40e_stat_str(&pf->hw, ret),
6939 i40e_aq_str(&pf->hw,
6940 pf->hw.aq.asq_last_status));
6942 /* reinit the misc interrupt */
6943 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6944 ret = i40e_setup_misc_vector(pf);
6946 /* Add a filter to drop all Flow control frames from any VSI from being
6947 * transmitted. By doing so we stop a malicious VF from sending out
6948 * PAUSE or PFC frames and potentially controlling traffic for other
6950 * The FW can still send Flow control frames if enabled.
6952 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6955 /* restart the VSIs that were rebuilt and running before the reset */
6956 i40e_pf_unquiesce_all_vsi(pf);
6958 if (pf->num_alloc_vfs) {
6959 for (v = 0; v < pf->num_alloc_vfs; v++)
6960 i40e_reset_vf(&pf->vf[v], true);
6963 /* tell the firmware that we're starting */
6964 i40e_send_version(pf);
6967 clear_bit(__I40E_RESET_FAILED, &pf->state);
6969 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6973 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6974 * @pf: board private structure
6976 * Close up the VFs and other things in prep for a Core Reset,
6977 * then get ready to rebuild the world.
6979 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6981 i40e_prep_for_reset(pf);
6982 i40e_reset_and_rebuild(pf, false);
6986 * i40e_handle_mdd_event
6987 * @pf: pointer to the PF structure
6989 * Called from the MDD irq handler to identify possibly malicious vfs
6991 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6993 struct i40e_hw *hw = &pf->hw;
6994 bool mdd_detected = false;
6995 bool pf_mdd_detected = false;
7000 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7003 /* find what triggered the MDD event */
7004 reg = rd32(hw, I40E_GL_MDET_TX);
7005 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7006 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7007 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7008 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7009 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7010 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7011 I40E_GL_MDET_TX_EVENT_SHIFT;
7012 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7013 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7014 pf->hw.func_caps.base_queue;
7015 if (netif_msg_tx_err(pf))
7016 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7017 event, queue, pf_num, vf_num);
7018 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7019 mdd_detected = true;
7021 reg = rd32(hw, I40E_GL_MDET_RX);
7022 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7023 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7024 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7025 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7026 I40E_GL_MDET_RX_EVENT_SHIFT;
7027 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7028 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7029 pf->hw.func_caps.base_queue;
7030 if (netif_msg_rx_err(pf))
7031 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7032 event, queue, func);
7033 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7034 mdd_detected = true;
7038 reg = rd32(hw, I40E_PF_MDET_TX);
7039 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7040 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7041 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7042 pf_mdd_detected = true;
7044 reg = rd32(hw, I40E_PF_MDET_RX);
7045 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7046 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7047 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7048 pf_mdd_detected = true;
7050 /* Queue belongs to the PF, initiate a reset */
7051 if (pf_mdd_detected) {
7052 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7053 i40e_service_event_schedule(pf);
7057 /* see if one of the VFs needs its hand slapped */
7058 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7060 reg = rd32(hw, I40E_VP_MDET_TX(i));
7061 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7062 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7063 vf->num_mdd_events++;
7064 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7068 reg = rd32(hw, I40E_VP_MDET_RX(i));
7069 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7070 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7071 vf->num_mdd_events++;
7072 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7076 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7077 dev_info(&pf->pdev->dev,
7078 "Too many MDD events on VF %d, disabled\n", i);
7079 dev_info(&pf->pdev->dev,
7080 "Use PF Control I/F to re-enable the VF\n");
7081 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7085 /* re-enable mdd interrupt cause */
7086 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7087 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7088 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7089 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7094 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7095 * @pf: board private structure
7097 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7099 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
7100 struct i40e_hw *hw = &pf->hw;
7105 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7108 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7110 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7111 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7112 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7113 port = pf->udp_ports[i].index;
7115 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7116 pf->udp_ports[i].type,
7119 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7122 dev_dbg(&pf->pdev->dev,
7123 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7124 pf->udp_ports[i].type ? "vxlan" : "geneve",
7125 port ? "add" : "delete",
7127 i40e_stat_str(&pf->hw, ret),
7128 i40e_aq_str(&pf->hw,
7129 pf->hw.aq.asq_last_status));
7130 pf->udp_ports[i].index = 0;
7138 * i40e_service_task - Run the driver's async subtasks
7139 * @work: pointer to work_struct containing our data
7141 static void i40e_service_task(struct work_struct *work)
7143 struct i40e_pf *pf = container_of(work,
7146 unsigned long start_time = jiffies;
7148 /* don't bother with service tasks if a reset is in progress */
7149 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7150 i40e_service_event_complete(pf);
7154 i40e_detect_recover_hung(pf);
7155 i40e_sync_filters_subtask(pf);
7156 i40e_reset_subtask(pf);
7157 i40e_handle_mdd_event(pf);
7158 i40e_vc_process_vflr_event(pf);
7159 i40e_watchdog_subtask(pf);
7160 i40e_fdir_reinit_subtask(pf);
7161 i40e_client_subtask(pf);
7162 i40e_sync_filters_subtask(pf);
7163 i40e_sync_udp_filters_subtask(pf);
7164 i40e_clean_adminq_subtask(pf);
7166 i40e_service_event_complete(pf);
7168 /* If the tasks have taken longer than one timer cycle or there
7169 * is more work to be done, reschedule the service task now
7170 * rather than wait for the timer to tick again.
7172 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7173 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7174 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7175 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7176 i40e_service_event_schedule(pf);
7180 * i40e_service_timer - timer callback
7181 * @data: pointer to PF struct
7183 static void i40e_service_timer(unsigned long data)
7185 struct i40e_pf *pf = (struct i40e_pf *)data;
7187 mod_timer(&pf->service_timer,
7188 round_jiffies(jiffies + pf->service_timer_period));
7189 i40e_service_event_schedule(pf);
7193 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7194 * @vsi: the VSI being configured
7196 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7198 struct i40e_pf *pf = vsi->back;
7200 switch (vsi->type) {
7202 vsi->alloc_queue_pairs = pf->num_lan_qps;
7203 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7204 I40E_REQ_DESCRIPTOR_MULTIPLE);
7205 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7206 vsi->num_q_vectors = pf->num_lan_msix;
7208 vsi->num_q_vectors = 1;
7213 vsi->alloc_queue_pairs = 1;
7214 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7215 I40E_REQ_DESCRIPTOR_MULTIPLE);
7216 vsi->num_q_vectors = 1;
7219 case I40E_VSI_VMDQ2:
7220 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7221 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7222 I40E_REQ_DESCRIPTOR_MULTIPLE);
7223 vsi->num_q_vectors = pf->num_vmdq_msix;
7226 case I40E_VSI_SRIOV:
7227 vsi->alloc_queue_pairs = pf->num_vf_qps;
7228 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7229 I40E_REQ_DESCRIPTOR_MULTIPLE);
7234 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7235 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7236 I40E_REQ_DESCRIPTOR_MULTIPLE);
7237 vsi->num_q_vectors = pf->num_fcoe_msix;
7240 #endif /* I40E_FCOE */
7250 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7251 * @type: VSI pointer
7252 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7254 * On error: returns error code (negative)
7255 * On success: returns 0
7257 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7262 /* allocate memory for both Tx and Rx ring pointers */
7263 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7264 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7267 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7269 if (alloc_qvectors) {
7270 /* allocate memory for q_vector pointers */
7271 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7272 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7273 if (!vsi->q_vectors) {
7281 kfree(vsi->tx_rings);
7286 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7287 * @pf: board private structure
7288 * @type: type of VSI
7290 * On error: returns error code (negative)
7291 * On success: returns vsi index in PF (positive)
7293 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7296 struct i40e_vsi *vsi;
7300 /* Need to protect the allocation of the VSIs at the PF level */
7301 mutex_lock(&pf->switch_mutex);
7303 /* VSI list may be fragmented if VSI creation/destruction has
7304 * been happening. We can afford to do a quick scan to look
7305 * for any free VSIs in the list.
7307 * find next empty vsi slot, looping back around if necessary
7310 while (i < pf->num_alloc_vsi && pf->vsi[i])
7312 if (i >= pf->num_alloc_vsi) {
7314 while (i < pf->next_vsi && pf->vsi[i])
7318 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7319 vsi_idx = i; /* Found one! */
7322 goto unlock_pf; /* out of VSI slots! */
7326 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7333 set_bit(__I40E_DOWN, &vsi->state);
7336 vsi->int_rate_limit = 0;
7337 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7338 pf->rss_table_size : 64;
7339 vsi->netdev_registered = false;
7340 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7341 INIT_LIST_HEAD(&vsi->mac_filter_list);
7342 vsi->irqs_ready = false;
7344 ret = i40e_set_num_rings_in_vsi(vsi);
7348 ret = i40e_vsi_alloc_arrays(vsi, true);
7352 /* Setup default MSIX irq handler for VSI */
7353 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7355 /* Initialize VSI lock */
7356 spin_lock_init(&vsi->mac_filter_list_lock);
7357 pf->vsi[vsi_idx] = vsi;
7362 pf->next_vsi = i - 1;
7365 mutex_unlock(&pf->switch_mutex);
7370 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7371 * @type: VSI pointer
7372 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7374 * On error: returns error code (negative)
7375 * On success: returns 0
7377 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7379 /* free the ring and vector containers */
7380 if (free_qvectors) {
7381 kfree(vsi->q_vectors);
7382 vsi->q_vectors = NULL;
7384 kfree(vsi->tx_rings);
7385 vsi->tx_rings = NULL;
7386 vsi->rx_rings = NULL;
7390 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7392 * @vsi: Pointer to VSI structure
7394 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7399 kfree(vsi->rss_hkey_user);
7400 vsi->rss_hkey_user = NULL;
7402 kfree(vsi->rss_lut_user);
7403 vsi->rss_lut_user = NULL;
7407 * i40e_vsi_clear - Deallocate the VSI provided
7408 * @vsi: the VSI being un-configured
7410 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7421 mutex_lock(&pf->switch_mutex);
7422 if (!pf->vsi[vsi->idx]) {
7423 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7424 vsi->idx, vsi->idx, vsi, vsi->type);
7428 if (pf->vsi[vsi->idx] != vsi) {
7429 dev_err(&pf->pdev->dev,
7430 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7431 pf->vsi[vsi->idx]->idx,
7433 pf->vsi[vsi->idx]->type,
7434 vsi->idx, vsi, vsi->type);
7438 /* updates the PF for this cleared vsi */
7439 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7440 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7442 i40e_vsi_free_arrays(vsi, true);
7443 i40e_clear_rss_config_user(vsi);
7445 pf->vsi[vsi->idx] = NULL;
7446 if (vsi->idx < pf->next_vsi)
7447 pf->next_vsi = vsi->idx;
7450 mutex_unlock(&pf->switch_mutex);
7458 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7459 * @vsi: the VSI being cleaned
7461 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7465 if (vsi->tx_rings && vsi->tx_rings[0]) {
7466 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7467 kfree_rcu(vsi->tx_rings[i], rcu);
7468 vsi->tx_rings[i] = NULL;
7469 vsi->rx_rings[i] = NULL;
7475 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7476 * @vsi: the VSI being configured
7478 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7480 struct i40e_ring *tx_ring, *rx_ring;
7481 struct i40e_pf *pf = vsi->back;
7484 /* Set basic values in the rings to be used later during open() */
7485 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7486 /* allocate space for both Tx and Rx in one shot */
7487 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7491 tx_ring->queue_index = i;
7492 tx_ring->reg_idx = vsi->base_queue + i;
7493 tx_ring->ring_active = false;
7495 tx_ring->netdev = vsi->netdev;
7496 tx_ring->dev = &pf->pdev->dev;
7497 tx_ring->count = vsi->num_desc;
7499 tx_ring->dcb_tc = 0;
7500 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7501 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7502 tx_ring->tx_itr_setting = pf->tx_itr_default;
7503 vsi->tx_rings[i] = tx_ring;
7505 rx_ring = &tx_ring[1];
7506 rx_ring->queue_index = i;
7507 rx_ring->reg_idx = vsi->base_queue + i;
7508 rx_ring->ring_active = false;
7510 rx_ring->netdev = vsi->netdev;
7511 rx_ring->dev = &pf->pdev->dev;
7512 rx_ring->count = vsi->num_desc;
7514 rx_ring->dcb_tc = 0;
7515 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7516 set_ring_16byte_desc_enabled(rx_ring);
7518 clear_ring_16byte_desc_enabled(rx_ring);
7519 rx_ring->rx_itr_setting = pf->rx_itr_default;
7520 vsi->rx_rings[i] = rx_ring;
7526 i40e_vsi_clear_rings(vsi);
7531 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7532 * @pf: board private structure
7533 * @vectors: the number of MSI-X vectors to request
7535 * Returns the number of vectors reserved, or error
7537 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7539 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7540 I40E_MIN_MSIX, vectors);
7542 dev_info(&pf->pdev->dev,
7543 "MSI-X vector reservation failed: %d\n", vectors);
7551 * i40e_init_msix - Setup the MSIX capability
7552 * @pf: board private structure
7554 * Work with the OS to set up the MSIX vectors needed.
7556 * Returns the number of vectors reserved or negative on failure
7558 static int i40e_init_msix(struct i40e_pf *pf)
7560 struct i40e_hw *hw = &pf->hw;
7564 int iwarp_requested = 0;
7566 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7569 /* The number of vectors we'll request will be comprised of:
7570 * - Add 1 for "other" cause for Admin Queue events, etc.
7571 * - The number of LAN queue pairs
7572 * - Queues being used for RSS.
7573 * We don't need as many as max_rss_size vectors.
7574 * use rss_size instead in the calculation since that
7575 * is governed by number of cpus in the system.
7576 * - assumes symmetric Tx/Rx pairing
7577 * - The number of VMDq pairs
7578 * - The CPU count within the NUMA node if iWARP is enabled
7580 * - The number of FCOE qps.
7582 * Once we count this up, try the request.
7584 * If we can't get what we want, we'll simplify to nearly nothing
7585 * and try again. If that still fails, we punt.
7587 vectors_left = hw->func_caps.num_msix_vectors;
7590 /* reserve one vector for miscellaneous handler */
7596 /* reserve vectors for the main PF traffic queues */
7597 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7598 vectors_left -= pf->num_lan_msix;
7599 v_budget += pf->num_lan_msix;
7601 /* reserve one vector for sideband flow director */
7602 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7607 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7612 /* can we reserve enough for FCoE? */
7613 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7615 pf->num_fcoe_msix = 0;
7616 else if (vectors_left >= pf->num_fcoe_qps)
7617 pf->num_fcoe_msix = pf->num_fcoe_qps;
7619 pf->num_fcoe_msix = 1;
7620 v_budget += pf->num_fcoe_msix;
7621 vectors_left -= pf->num_fcoe_msix;
7625 /* can we reserve enough for iWARP? */
7626 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7628 pf->num_iwarp_msix = 0;
7629 else if (vectors_left < pf->num_iwarp_msix)
7630 pf->num_iwarp_msix = 1;
7631 v_budget += pf->num_iwarp_msix;
7632 vectors_left -= pf->num_iwarp_msix;
7635 /* any vectors left over go for VMDq support */
7636 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7637 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7638 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7640 /* if we're short on vectors for what's desired, we limit
7641 * the queues per vmdq. If this is still more than are
7642 * available, the user will need to change the number of
7643 * queues/vectors used by the PF later with the ethtool
7646 if (vmdq_vecs < vmdq_vecs_wanted)
7647 pf->num_vmdq_qps = 1;
7648 pf->num_vmdq_msix = pf->num_vmdq_qps;
7650 v_budget += vmdq_vecs;
7651 vectors_left -= vmdq_vecs;
7654 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7656 if (!pf->msix_entries)
7659 for (i = 0; i < v_budget; i++)
7660 pf->msix_entries[i].entry = i;
7661 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7663 if (v_actual != v_budget) {
7664 /* If we have limited resources, we will start with no vectors
7665 * for the special features and then allocate vectors to some
7666 * of these features based on the policy and at the end disable
7667 * the features that did not get any vectors.
7669 iwarp_requested = pf->num_iwarp_msix;
7670 pf->num_iwarp_msix = 0;
7672 pf->num_fcoe_qps = 0;
7673 pf->num_fcoe_msix = 0;
7675 pf->num_vmdq_msix = 0;
7678 if (v_actual < I40E_MIN_MSIX) {
7679 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7680 kfree(pf->msix_entries);
7681 pf->msix_entries = NULL;
7684 } else if (v_actual == I40E_MIN_MSIX) {
7685 /* Adjust for minimal MSIX use */
7686 pf->num_vmdq_vsis = 0;
7687 pf->num_vmdq_qps = 0;
7688 pf->num_lan_qps = 1;
7689 pf->num_lan_msix = 1;
7691 } else if (v_actual != v_budget) {
7694 /* reserve the misc vector */
7697 /* Scale vector usage down */
7698 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7699 pf->num_vmdq_vsis = 1;
7700 pf->num_vmdq_qps = 1;
7701 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7703 /* partition out the remaining vectors */
7706 pf->num_lan_msix = 1;
7709 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7710 pf->num_lan_msix = 1;
7711 pf->num_iwarp_msix = 1;
7713 pf->num_lan_msix = 2;
7716 /* give one vector to FCoE */
7717 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7718 pf->num_lan_msix = 1;
7719 pf->num_fcoe_msix = 1;
7724 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7725 pf->num_iwarp_msix = min_t(int, (vec / 3),
7727 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7728 I40E_DEFAULT_NUM_VMDQ_VSI);
7730 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7731 I40E_DEFAULT_NUM_VMDQ_VSI);
7733 pf->num_lan_msix = min_t(int,
7734 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7737 /* give one vector to FCoE */
7738 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7739 pf->num_fcoe_msix = 1;
7747 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7748 (pf->num_vmdq_msix == 0)) {
7749 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7750 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7753 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7754 (pf->num_iwarp_msix == 0)) {
7755 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7756 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
7760 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7761 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7762 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7769 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7770 * @vsi: the VSI being configured
7771 * @v_idx: index of the vector in the vsi struct
7773 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7775 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7777 struct i40e_q_vector *q_vector;
7779 /* allocate q_vector */
7780 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7784 q_vector->vsi = vsi;
7785 q_vector->v_idx = v_idx;
7786 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7788 netif_napi_add(vsi->netdev, &q_vector->napi,
7789 i40e_napi_poll, NAPI_POLL_WEIGHT);
7791 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7792 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7794 /* tie q_vector and vsi together */
7795 vsi->q_vectors[v_idx] = q_vector;
7801 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7802 * @vsi: the VSI being configured
7804 * We allocate one q_vector per queue interrupt. If allocation fails we
7807 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7809 struct i40e_pf *pf = vsi->back;
7810 int v_idx, num_q_vectors;
7813 /* if not MSIX, give the one vector only to the LAN VSI */
7814 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7815 num_q_vectors = vsi->num_q_vectors;
7816 else if (vsi == pf->vsi[pf->lan_vsi])
7821 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7822 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7831 i40e_free_q_vector(vsi, v_idx);
7837 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7838 * @pf: board private structure to initialize
7840 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7845 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7846 vectors = i40e_init_msix(pf);
7848 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7849 I40E_FLAG_IWARP_ENABLED |
7851 I40E_FLAG_FCOE_ENABLED |
7853 I40E_FLAG_RSS_ENABLED |
7854 I40E_FLAG_DCB_CAPABLE |
7855 I40E_FLAG_SRIOV_ENABLED |
7856 I40E_FLAG_FD_SB_ENABLED |
7857 I40E_FLAG_FD_ATR_ENABLED |
7858 I40E_FLAG_VMDQ_ENABLED);
7860 /* rework the queue expectations without MSIX */
7861 i40e_determine_queue_usage(pf);
7865 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7866 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7867 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7868 vectors = pci_enable_msi(pf->pdev);
7870 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7872 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7874 vectors = 1; /* one MSI or Legacy vector */
7877 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7878 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7880 /* set up vector assignment tracking */
7881 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7882 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7883 if (!pf->irq_pile) {
7884 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7887 pf->irq_pile->num_entries = vectors;
7888 pf->irq_pile->search_hint = 0;
7890 /* track first vector for misc interrupts, ignore return */
7891 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7897 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7898 * @pf: board private structure
7900 * This sets up the handler for MSIX 0, which is used to manage the
7901 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7902 * when in MSI or Legacy interrupt mode.
7904 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7906 struct i40e_hw *hw = &pf->hw;
7909 /* Only request the irq if this is the first time through, and
7910 * not when we're rebuilding after a Reset
7912 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7913 err = request_irq(pf->msix_entries[0].vector,
7914 i40e_intr, 0, pf->int_name, pf);
7916 dev_info(&pf->pdev->dev,
7917 "request_irq for %s failed: %d\n",
7923 i40e_enable_misc_int_causes(pf);
7925 /* associate no queues to the misc vector */
7926 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7927 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7931 i40e_irq_dynamic_enable_icr0(pf, true);
7937 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7938 * @vsi: vsi structure
7939 * @seed: RSS hash seed
7941 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7942 u8 *lut, u16 lut_size)
7944 struct i40e_aqc_get_set_rss_key_data rss_key;
7945 struct i40e_pf *pf = vsi->back;
7946 struct i40e_hw *hw = &pf->hw;
7947 bool pf_lut = false;
7951 memset(&rss_key, 0, sizeof(rss_key));
7952 memcpy(&rss_key, seed, sizeof(rss_key));
7954 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7958 /* Populate the LUT with max no. of queues in round robin fashion */
7959 for (i = 0; i < vsi->rss_table_size; i++)
7960 rss_lut[i] = i % vsi->rss_size;
7962 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7964 dev_info(&pf->pdev->dev,
7965 "Cannot set RSS key, err %s aq_err %s\n",
7966 i40e_stat_str(&pf->hw, ret),
7967 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7968 goto config_rss_aq_out;
7971 if (vsi->type == I40E_VSI_MAIN)
7974 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7975 vsi->rss_table_size);
7977 dev_info(&pf->pdev->dev,
7978 "Cannot set RSS lut, err %s aq_err %s\n",
7979 i40e_stat_str(&pf->hw, ret),
7980 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7988 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7989 * @vsi: VSI structure
7991 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7993 u8 seed[I40E_HKEY_ARRAY_SIZE];
7994 struct i40e_pf *pf = vsi->back;
7998 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8001 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8005 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8006 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8007 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
8008 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8015 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8016 * @vsi: Pointer to vsi structure
8017 * @seed: Buffter to store the hash keys
8018 * @lut: Buffer to store the lookup table entries
8019 * @lut_size: Size of buffer to store the lookup table entries
8021 * Return 0 on success, negative on failure
8023 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8024 u8 *lut, u16 lut_size)
8026 struct i40e_pf *pf = vsi->back;
8027 struct i40e_hw *hw = &pf->hw;
8031 ret = i40e_aq_get_rss_key(hw, vsi->id,
8032 (struct i40e_aqc_get_set_rss_key_data *)seed);
8034 dev_info(&pf->pdev->dev,
8035 "Cannot get RSS key, err %s aq_err %s\n",
8036 i40e_stat_str(&pf->hw, ret),
8037 i40e_aq_str(&pf->hw,
8038 pf->hw.aq.asq_last_status));
8044 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8046 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8048 dev_info(&pf->pdev->dev,
8049 "Cannot get RSS lut, err %s aq_err %s\n",
8050 i40e_stat_str(&pf->hw, ret),
8051 i40e_aq_str(&pf->hw,
8052 pf->hw.aq.asq_last_status));
8061 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8062 * @vsi: Pointer to vsi structure
8063 * @seed: RSS hash seed
8064 * @lut: Lookup table
8065 * @lut_size: Lookup table size
8067 * Returns 0 on success, negative on failure
8069 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8070 const u8 *lut, u16 lut_size)
8072 struct i40e_pf *pf = vsi->back;
8073 struct i40e_hw *hw = &pf->hw;
8074 u16 vf_id = vsi->vf_id;
8077 /* Fill out hash function seed */
8079 u32 *seed_dw = (u32 *)seed;
8081 if (vsi->type == I40E_VSI_MAIN) {
8082 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8083 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i),
8085 } else if (vsi->type == I40E_VSI_SRIOV) {
8086 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8087 i40e_write_rx_ctl(hw,
8088 I40E_VFQF_HKEY1(i, vf_id),
8091 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8096 u32 *lut_dw = (u32 *)lut;
8098 if (vsi->type == I40E_VSI_MAIN) {
8099 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8101 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8102 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8103 } else if (vsi->type == I40E_VSI_SRIOV) {
8104 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8106 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8107 i40e_write_rx_ctl(hw,
8108 I40E_VFQF_HLUT1(i, vf_id),
8111 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8120 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8121 * @vsi: Pointer to VSI structure
8122 * @seed: Buffer to store the keys
8123 * @lut: Buffer to store the lookup table entries
8124 * @lut_size: Size of buffer to store the lookup table entries
8126 * Returns 0 on success, negative on failure
8128 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8129 u8 *lut, u16 lut_size)
8131 struct i40e_pf *pf = vsi->back;
8132 struct i40e_hw *hw = &pf->hw;
8136 u32 *seed_dw = (u32 *)seed;
8138 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8139 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8142 u32 *lut_dw = (u32 *)lut;
8144 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8146 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8147 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8154 * i40e_config_rss - Configure RSS keys and lut
8155 * @vsi: Pointer to VSI structure
8156 * @seed: RSS hash seed
8157 * @lut: Lookup table
8158 * @lut_size: Lookup table size
8160 * Returns 0 on success, negative on failure
8162 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8164 struct i40e_pf *pf = vsi->back;
8166 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8167 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8169 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8173 * i40e_get_rss - Get RSS keys and lut
8174 * @vsi: Pointer to VSI structure
8175 * @seed: Buffer to store the keys
8176 * @lut: Buffer to store the lookup table entries
8177 * lut_size: Size of buffer to store the lookup table entries
8179 * Returns 0 on success, negative on failure
8181 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8183 struct i40e_pf *pf = vsi->back;
8185 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8186 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8188 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8192 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8193 * @pf: Pointer to board private structure
8194 * @lut: Lookup table
8195 * @rss_table_size: Lookup table size
8196 * @rss_size: Range of queue number for hashing
8198 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8199 u16 rss_table_size, u16 rss_size)
8203 for (i = 0; i < rss_table_size; i++)
8204 lut[i] = i % rss_size;
8208 * i40e_pf_config_rss - Prepare for RSS if used
8209 * @pf: board private structure
8211 static int i40e_pf_config_rss(struct i40e_pf *pf)
8213 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8214 u8 seed[I40E_HKEY_ARRAY_SIZE];
8216 struct i40e_hw *hw = &pf->hw;
8221 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8222 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8223 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8224 hena |= i40e_pf_get_default_rss_hena(pf);
8226 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8227 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8229 /* Determine the RSS table size based on the hardware capabilities */
8230 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8231 reg_val = (pf->rss_table_size == 512) ?
8232 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8233 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8234 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8236 /* Determine the RSS size of the VSI */
8238 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8239 vsi->num_queue_pairs);
8241 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8245 /* Use user configured lut if there is one, otherwise use default */
8246 if (vsi->rss_lut_user)
8247 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8249 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8251 /* Use user configured hash key if there is one, otherwise
8254 if (vsi->rss_hkey_user)
8255 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8257 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8258 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8265 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8266 * @pf: board private structure
8267 * @queue_count: the requested queue count for rss.
8269 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8270 * count which may be different from the requested queue count.
8272 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8274 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8277 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8280 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8282 if (queue_count != vsi->num_queue_pairs) {
8283 vsi->req_queue_pairs = queue_count;
8284 i40e_prep_for_reset(pf);
8286 pf->alloc_rss_size = new_rss_size;
8288 i40e_reset_and_rebuild(pf, true);
8290 /* Discard the user configured hash keys and lut, if less
8291 * queues are enabled.
8293 if (queue_count < vsi->rss_size) {
8294 i40e_clear_rss_config_user(vsi);
8295 dev_dbg(&pf->pdev->dev,
8296 "discard user configured hash keys and lut\n");
8299 /* Reset vsi->rss_size, as number of enabled queues changed */
8300 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8301 vsi->num_queue_pairs);
8303 i40e_pf_config_rss(pf);
8305 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8306 pf->alloc_rss_size, pf->rss_size_max);
8307 return pf->alloc_rss_size;
8311 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8312 * @pf: board private structure
8314 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8317 bool min_valid, max_valid;
8320 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8321 &min_valid, &max_valid);
8325 pf->npar_min_bw = min_bw;
8327 pf->npar_max_bw = max_bw;
8334 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8335 * @pf: board private structure
8337 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8339 struct i40e_aqc_configure_partition_bw_data bw_data;
8342 /* Set the valid bit for this PF */
8343 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8344 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8345 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8347 /* Set the new bandwidths */
8348 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8354 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8355 * @pf: board private structure
8357 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8359 /* Commit temporary BW setting to permanent NVM image */
8360 enum i40e_admin_queue_err last_aq_status;
8364 if (pf->hw.partition_id != 1) {
8365 dev_info(&pf->pdev->dev,
8366 "Commit BW only works on partition 1! This is partition %d",
8367 pf->hw.partition_id);
8368 ret = I40E_NOT_SUPPORTED;
8372 /* Acquire NVM for read access */
8373 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8374 last_aq_status = pf->hw.aq.asq_last_status;
8376 dev_info(&pf->pdev->dev,
8377 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8378 i40e_stat_str(&pf->hw, ret),
8379 i40e_aq_str(&pf->hw, last_aq_status));
8383 /* Read word 0x10 of NVM - SW compatibility word 1 */
8384 ret = i40e_aq_read_nvm(&pf->hw,
8385 I40E_SR_NVM_CONTROL_WORD,
8386 0x10, sizeof(nvm_word), &nvm_word,
8388 /* Save off last admin queue command status before releasing
8391 last_aq_status = pf->hw.aq.asq_last_status;
8392 i40e_release_nvm(&pf->hw);
8394 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8395 i40e_stat_str(&pf->hw, ret),
8396 i40e_aq_str(&pf->hw, last_aq_status));
8400 /* Wait a bit for NVM release to complete */
8403 /* Acquire NVM for write access */
8404 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8405 last_aq_status = pf->hw.aq.asq_last_status;
8407 dev_info(&pf->pdev->dev,
8408 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8409 i40e_stat_str(&pf->hw, ret),
8410 i40e_aq_str(&pf->hw, last_aq_status));
8413 /* Write it back out unchanged to initiate update NVM,
8414 * which will force a write of the shadow (alt) RAM to
8415 * the NVM - thus storing the bandwidth values permanently.
8417 ret = i40e_aq_update_nvm(&pf->hw,
8418 I40E_SR_NVM_CONTROL_WORD,
8419 0x10, sizeof(nvm_word),
8420 &nvm_word, true, NULL);
8421 /* Save off last admin queue command status before releasing
8424 last_aq_status = pf->hw.aq.asq_last_status;
8425 i40e_release_nvm(&pf->hw);
8427 dev_info(&pf->pdev->dev,
8428 "BW settings NOT SAVED, err %s aq_err %s\n",
8429 i40e_stat_str(&pf->hw, ret),
8430 i40e_aq_str(&pf->hw, last_aq_status));
8437 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8438 * @pf: board private structure to initialize
8440 * i40e_sw_init initializes the Adapter private data structure.
8441 * Fields are initialized based on PCI device information and
8442 * OS network device settings (MTU size).
8444 static int i40e_sw_init(struct i40e_pf *pf)
8449 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8450 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8451 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8452 if (I40E_DEBUG_USER & debug)
8453 pf->hw.debug_mask = debug;
8454 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8455 I40E_DEFAULT_MSG_ENABLE);
8458 /* Set default capability flags */
8459 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8460 I40E_FLAG_MSI_ENABLED |
8461 I40E_FLAG_MSIX_ENABLED;
8463 if (iommu_present(&pci_bus_type))
8464 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8466 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8468 /* Set default ITR */
8469 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8470 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8472 /* Depending on PF configurations, it is possible that the RSS
8473 * maximum might end up larger than the available queues
8475 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8476 pf->alloc_rss_size = 1;
8477 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8478 pf->rss_size_max = min_t(int, pf->rss_size_max,
8479 pf->hw.func_caps.num_tx_qp);
8480 if (pf->hw.func_caps.rss) {
8481 pf->flags |= I40E_FLAG_RSS_ENABLED;
8482 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8486 /* MFP mode enabled */
8487 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8488 pf->flags |= I40E_FLAG_MFP_ENABLED;
8489 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8490 if (i40e_get_npar_bw_setting(pf))
8491 dev_warn(&pf->pdev->dev,
8492 "Could not get NPAR bw settings\n");
8494 dev_info(&pf->pdev->dev,
8495 "Min BW = %8.8x, Max BW = %8.8x\n",
8496 pf->npar_min_bw, pf->npar_max_bw);
8499 /* FW/NVM is not yet fixed in this regard */
8500 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8501 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8502 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8503 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8504 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8505 pf->hw.num_partitions > 1)
8506 dev_info(&pf->pdev->dev,
8507 "Flow Director Sideband mode Disabled in MFP mode\n");
8509 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8510 pf->fdir_pf_filter_count =
8511 pf->hw.func_caps.fd_filters_guaranteed;
8512 pf->hw.fdir_shared_filter_count =
8513 pf->hw.func_caps.fd_filters_best_effort;
8516 if (i40e_is_mac_710(&pf->hw) &&
8517 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8518 (pf->hw.aq.fw_maj_ver < 4))) {
8519 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8520 /* No DCB support for FW < v4.33 */
8521 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8524 /* Disable FW LLDP if FW < v4.3 */
8525 if (i40e_is_mac_710(&pf->hw) &&
8526 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8527 (pf->hw.aq.fw_maj_ver < 4)))
8528 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8530 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8531 if (i40e_is_mac_710(&pf->hw) &&
8532 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8533 (pf->hw.aq.fw_maj_ver >= 5)))
8534 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8536 if (pf->hw.func_caps.vmdq) {
8537 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8538 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8539 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8542 if (pf->hw.func_caps.iwarp) {
8543 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8544 /* IWARP needs one extra vector for CQP just like MISC.*/
8545 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8549 i40e_init_pf_fcoe(pf);
8551 #endif /* I40E_FCOE */
8552 #ifdef CONFIG_PCI_IOV
8553 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8554 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8555 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8556 pf->num_req_vfs = min_t(int,
8557 pf->hw.func_caps.num_vfs,
8560 #endif /* CONFIG_PCI_IOV */
8561 if (pf->hw.mac.type == I40E_MAC_X722) {
8562 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8563 I40E_FLAG_128_QP_RSS_CAPABLE |
8564 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8565 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8566 I40E_FLAG_WB_ON_ITR_CAPABLE |
8567 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8568 I40E_FLAG_NO_PCI_LINK_CHECK |
8569 I40E_FLAG_100M_SGMII_CAPABLE |
8570 I40E_FLAG_USE_SET_LLDP_MIB |
8571 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8572 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8573 ((pf->hw.aq.api_maj_ver == 1) &&
8574 (pf->hw.aq.api_min_ver > 4))) {
8575 /* Supported in FW API version higher than 1.4 */
8576 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8577 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8579 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8582 pf->eeprom_version = 0xDEAD;
8583 pf->lan_veb = I40E_NO_VEB;
8584 pf->lan_vsi = I40E_NO_VSI;
8586 /* By default FW has this off for performance reasons */
8587 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8589 /* set up queue assignment tracking */
8590 size = sizeof(struct i40e_lump_tracking)
8591 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8592 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8597 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8598 pf->qp_pile->search_hint = 0;
8600 pf->tx_timeout_recovery_level = 1;
8602 mutex_init(&pf->switch_mutex);
8604 /* If NPAR is enabled nudge the Tx scheduler */
8605 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8606 i40e_set_npar_bw_setting(pf);
8613 * i40e_set_ntuple - set the ntuple feature flag and take action
8614 * @pf: board private structure to initialize
8615 * @features: the feature set that the stack is suggesting
8617 * returns a bool to indicate if reset needs to happen
8619 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8621 bool need_reset = false;
8623 /* Check if Flow Director n-tuple support was enabled or disabled. If
8624 * the state changed, we need to reset.
8626 if (features & NETIF_F_NTUPLE) {
8627 /* Enable filters and mark for reset */
8628 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8630 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8632 /* turn off filters, mark for reset and clear SW filter list */
8633 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8635 i40e_fdir_filter_exit(pf);
8637 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8638 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8639 /* reset fd counters */
8640 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8641 pf->fdir_pf_active_filters = 0;
8642 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8643 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8644 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8645 /* if ATR was auto disabled it can be re-enabled. */
8646 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8647 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8648 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8654 * i40e_set_features - set the netdev feature flags
8655 * @netdev: ptr to the netdev being adjusted
8656 * @features: the feature set that the stack is suggesting
8658 static int i40e_set_features(struct net_device *netdev,
8659 netdev_features_t features)
8661 struct i40e_netdev_priv *np = netdev_priv(netdev);
8662 struct i40e_vsi *vsi = np->vsi;
8663 struct i40e_pf *pf = vsi->back;
8666 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8667 i40e_vlan_stripping_enable(vsi);
8669 i40e_vlan_stripping_disable(vsi);
8671 need_reset = i40e_set_ntuple(pf, features);
8674 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8679 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
8681 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8682 * @pf: board private structure
8683 * @port: The UDP port to look up
8685 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8687 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8691 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8692 if (pf->udp_ports[i].index == port)
8701 #if IS_ENABLED(CONFIG_VXLAN)
8703 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8704 * @netdev: This physical port's netdev
8705 * @sa_family: Socket Family that VXLAN is notifying us about
8706 * @port: New UDP port number that VXLAN started listening to
8708 static void i40e_add_vxlan_port(struct net_device *netdev,
8709 sa_family_t sa_family, __be16 port)
8711 struct i40e_netdev_priv *np = netdev_priv(netdev);
8712 struct i40e_vsi *vsi = np->vsi;
8713 struct i40e_pf *pf = vsi->back;
8717 idx = i40e_get_udp_port_idx(pf, port);
8719 /* Check if port already exists */
8720 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8721 netdev_info(netdev, "vxlan port %d already offloaded\n",
8726 /* Now check if there is space to add the new port */
8727 next_idx = i40e_get_udp_port_idx(pf, 0);
8729 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8730 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8735 /* New port: add it and mark its index in the bitmap */
8736 pf->udp_ports[next_idx].index = port;
8737 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8738 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8739 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8743 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8744 * @netdev: This physical port's netdev
8745 * @sa_family: Socket Family that VXLAN is notifying us about
8746 * @port: UDP port number that VXLAN stopped listening to
8748 static void i40e_del_vxlan_port(struct net_device *netdev,
8749 sa_family_t sa_family, __be16 port)
8751 struct i40e_netdev_priv *np = netdev_priv(netdev);
8752 struct i40e_vsi *vsi = np->vsi;
8753 struct i40e_pf *pf = vsi->back;
8756 idx = i40e_get_udp_port_idx(pf, port);
8758 /* Check if port already exists */
8759 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8760 /* if port exists, set it to 0 (mark for deletion)
8761 * and make it pending
8763 pf->udp_ports[idx].index = 0;
8764 pf->pending_udp_bitmap |= BIT_ULL(idx);
8765 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8767 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8773 #if IS_ENABLED(CONFIG_GENEVE)
8775 * i40e_add_geneve_port - Get notifications about GENEVE ports that come up
8776 * @netdev: This physical port's netdev
8777 * @sa_family: Socket Family that GENEVE is notifying us about
8778 * @port: New UDP port number that GENEVE started listening to
8780 static void i40e_add_geneve_port(struct net_device *netdev,
8781 sa_family_t sa_family, __be16 port)
8783 struct i40e_netdev_priv *np = netdev_priv(netdev);
8784 struct i40e_vsi *vsi = np->vsi;
8785 struct i40e_pf *pf = vsi->back;
8789 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8792 idx = i40e_get_udp_port_idx(pf, port);
8794 /* Check if port already exists */
8795 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8796 netdev_info(netdev, "udp port %d already offloaded\n",
8801 /* Now check if there is space to add the new port */
8802 next_idx = i40e_get_udp_port_idx(pf, 0);
8804 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8805 netdev_info(netdev, "maximum number of UDP ports reached, not adding port %d\n",
8810 /* New port: add it and mark its index in the bitmap */
8811 pf->udp_ports[next_idx].index = port;
8812 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8813 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8814 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8816 dev_info(&pf->pdev->dev, "adding geneve port %d\n", ntohs(port));
8820 * i40e_del_geneve_port - Get notifications about GENEVE ports that go away
8821 * @netdev: This physical port's netdev
8822 * @sa_family: Socket Family that GENEVE is notifying us about
8823 * @port: UDP port number that GENEVE stopped listening to
8825 static void i40e_del_geneve_port(struct net_device *netdev,
8826 sa_family_t sa_family, __be16 port)
8828 struct i40e_netdev_priv *np = netdev_priv(netdev);
8829 struct i40e_vsi *vsi = np->vsi;
8830 struct i40e_pf *pf = vsi->back;
8833 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8836 idx = i40e_get_udp_port_idx(pf, port);
8838 /* Check if port already exists */
8839 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8840 /* if port exists, set it to 0 (mark for deletion)
8841 * and make it pending
8843 pf->udp_ports[idx].index = 0;
8844 pf->pending_udp_bitmap |= BIT_ULL(idx);
8845 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8847 dev_info(&pf->pdev->dev, "deleting geneve port %d\n",
8850 netdev_warn(netdev, "geneve port %d was not found, not deleting\n",
8856 static int i40e_get_phys_port_id(struct net_device *netdev,
8857 struct netdev_phys_item_id *ppid)
8859 struct i40e_netdev_priv *np = netdev_priv(netdev);
8860 struct i40e_pf *pf = np->vsi->back;
8861 struct i40e_hw *hw = &pf->hw;
8863 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8866 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8867 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8873 * i40e_ndo_fdb_add - add an entry to the hardware database
8874 * @ndm: the input from the stack
8875 * @tb: pointer to array of nladdr (unused)
8876 * @dev: the net device pointer
8877 * @addr: the MAC address entry being added
8878 * @flags: instructions from stack about fdb operation
8880 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8881 struct net_device *dev,
8882 const unsigned char *addr, u16 vid,
8885 struct i40e_netdev_priv *np = netdev_priv(dev);
8886 struct i40e_pf *pf = np->vsi->back;
8889 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8893 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8897 /* Hardware does not support aging addresses so if a
8898 * ndm_state is given only allow permanent addresses
8900 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8901 netdev_info(dev, "FDB only supports static addresses\n");
8905 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8906 err = dev_uc_add_excl(dev, addr);
8907 else if (is_multicast_ether_addr(addr))
8908 err = dev_mc_add_excl(dev, addr);
8912 /* Only return duplicate errors if NLM_F_EXCL is set */
8913 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8920 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8921 * @dev: the netdev being configured
8922 * @nlh: RTNL message
8924 * Inserts a new hardware bridge if not already created and
8925 * enables the bridging mode requested (VEB or VEPA). If the
8926 * hardware bridge has already been inserted and the request
8927 * is to change the mode then that requires a PF reset to
8928 * allow rebuild of the components with required hardware
8929 * bridge mode enabled.
8931 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8932 struct nlmsghdr *nlh,
8935 struct i40e_netdev_priv *np = netdev_priv(dev);
8936 struct i40e_vsi *vsi = np->vsi;
8937 struct i40e_pf *pf = vsi->back;
8938 struct i40e_veb *veb = NULL;
8939 struct nlattr *attr, *br_spec;
8942 /* Only for PF VSI for now */
8943 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8946 /* Find the HW bridge for PF VSI */
8947 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8948 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8952 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8954 nla_for_each_nested(attr, br_spec, rem) {
8957 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8960 mode = nla_get_u16(attr);
8961 if ((mode != BRIDGE_MODE_VEPA) &&
8962 (mode != BRIDGE_MODE_VEB))
8965 /* Insert a new HW bridge */
8967 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8968 vsi->tc_config.enabled_tc);
8970 veb->bridge_mode = mode;
8971 i40e_config_bridge_mode(veb);
8973 /* No Bridge HW offload available */
8977 } else if (mode != veb->bridge_mode) {
8978 /* Existing HW bridge but different mode needs reset */
8979 veb->bridge_mode = mode;
8980 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8981 if (mode == BRIDGE_MODE_VEB)
8982 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8984 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8985 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8994 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8997 * @seq: RTNL message seq #
8998 * @dev: the netdev being configured
8999 * @filter_mask: unused
9000 * @nlflags: netlink flags passed in
9002 * Return the mode in which the hardware bridge is operating in
9005 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9006 struct net_device *dev,
9007 u32 __always_unused filter_mask,
9010 struct i40e_netdev_priv *np = netdev_priv(dev);
9011 struct i40e_vsi *vsi = np->vsi;
9012 struct i40e_pf *pf = vsi->back;
9013 struct i40e_veb *veb = NULL;
9016 /* Only for PF VSI for now */
9017 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9020 /* Find the HW bridge for the PF VSI */
9021 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9022 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9029 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9030 nlflags, 0, 0, filter_mask, NULL);
9033 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
9034 * inner mac plus all inner ethertypes.
9036 #define I40E_MAX_TUNNEL_HDR_LEN 128
9038 * i40e_features_check - Validate encapsulated packet conforms to limits
9040 * @dev: This physical port's netdev
9041 * @features: Offload features that the stack believes apply
9043 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9044 struct net_device *dev,
9045 netdev_features_t features)
9047 if (skb->encapsulation &&
9048 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
9049 I40E_MAX_TUNNEL_HDR_LEN))
9050 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9055 static const struct net_device_ops i40e_netdev_ops = {
9056 .ndo_open = i40e_open,
9057 .ndo_stop = i40e_close,
9058 .ndo_start_xmit = i40e_lan_xmit_frame,
9059 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9060 .ndo_set_rx_mode = i40e_set_rx_mode,
9061 .ndo_validate_addr = eth_validate_addr,
9062 .ndo_set_mac_address = i40e_set_mac,
9063 .ndo_change_mtu = i40e_change_mtu,
9064 .ndo_do_ioctl = i40e_ioctl,
9065 .ndo_tx_timeout = i40e_tx_timeout,
9066 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9067 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9068 #ifdef CONFIG_NET_POLL_CONTROLLER
9069 .ndo_poll_controller = i40e_netpoll,
9071 .ndo_setup_tc = __i40e_setup_tc,
9073 .ndo_fcoe_enable = i40e_fcoe_enable,
9074 .ndo_fcoe_disable = i40e_fcoe_disable,
9076 .ndo_set_features = i40e_set_features,
9077 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9078 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9079 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9080 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9081 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9082 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9083 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9084 #if IS_ENABLED(CONFIG_VXLAN)
9085 .ndo_add_vxlan_port = i40e_add_vxlan_port,
9086 .ndo_del_vxlan_port = i40e_del_vxlan_port,
9088 #if IS_ENABLED(CONFIG_GENEVE)
9089 .ndo_add_geneve_port = i40e_add_geneve_port,
9090 .ndo_del_geneve_port = i40e_del_geneve_port,
9092 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9093 .ndo_fdb_add = i40e_ndo_fdb_add,
9094 .ndo_features_check = i40e_features_check,
9095 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9096 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9100 * i40e_config_netdev - Setup the netdev flags
9101 * @vsi: the VSI being configured
9103 * Returns 0 on success, negative value on failure
9105 static int i40e_config_netdev(struct i40e_vsi *vsi)
9107 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
9108 struct i40e_pf *pf = vsi->back;
9109 struct i40e_hw *hw = &pf->hw;
9110 struct i40e_netdev_priv *np;
9111 struct net_device *netdev;
9112 u8 mac_addr[ETH_ALEN];
9115 etherdev_size = sizeof(struct i40e_netdev_priv);
9116 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9120 vsi->netdev = netdev;
9121 np = netdev_priv(netdev);
9124 netdev->hw_enc_features |= NETIF_F_SG |
9128 NETIF_F_SOFT_FEATURES |
9133 NETIF_F_GSO_GRE_CSUM |
9136 NETIF_F_GSO_UDP_TUNNEL |
9137 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9138 NETIF_F_GSO_PARTIAL |
9144 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9145 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9147 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9149 /* record features VLANs can make use of */
9150 netdev->vlan_features |= netdev->hw_enc_features |
9151 NETIF_F_TSO_MANGLEID;
9153 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9154 netdev->hw_features |= NETIF_F_NTUPLE;
9156 netdev->hw_features |= netdev->hw_enc_features |
9157 NETIF_F_HW_VLAN_CTAG_TX |
9158 NETIF_F_HW_VLAN_CTAG_RX;
9160 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9161 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9163 if (vsi->type == I40E_VSI_MAIN) {
9164 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9165 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9166 /* The following steps are necessary to prevent reception
9167 * of tagged packets - some older NVM configurations load a
9168 * default a MAC-VLAN filter that accepts any tagged packet
9169 * which must be replaced by a normal filter.
9171 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
9172 spin_lock_bh(&vsi->mac_filter_list_lock);
9173 i40e_add_filter(vsi, mac_addr,
9174 I40E_VLAN_ANY, false, true);
9175 spin_unlock_bh(&vsi->mac_filter_list_lock);
9177 } else if ((pf->hw.aq.api_maj_ver > 1) ||
9178 ((pf->hw.aq.api_maj_ver == 1) &&
9179 (pf->hw.aq.api_min_ver > 4))) {
9180 /* Supported in FW API version higher than 1.4 */
9181 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
9182 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
9184 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9185 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9186 pf->vsi[pf->lan_vsi]->netdev->name);
9187 random_ether_addr(mac_addr);
9189 spin_lock_bh(&vsi->mac_filter_list_lock);
9190 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9191 spin_unlock_bh(&vsi->mac_filter_list_lock);
9194 spin_lock_bh(&vsi->mac_filter_list_lock);
9195 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
9196 spin_unlock_bh(&vsi->mac_filter_list_lock);
9198 ether_addr_copy(netdev->dev_addr, mac_addr);
9199 ether_addr_copy(netdev->perm_addr, mac_addr);
9201 netdev->priv_flags |= IFF_UNICAST_FLT;
9202 netdev->priv_flags |= IFF_SUPP_NOFCS;
9203 /* Setup netdev TC information */
9204 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9206 netdev->netdev_ops = &i40e_netdev_ops;
9207 netdev->watchdog_timeo = 5 * HZ;
9208 i40e_set_ethtool_ops(netdev);
9210 i40e_fcoe_config_netdev(netdev, vsi);
9217 * i40e_vsi_delete - Delete a VSI from the switch
9218 * @vsi: the VSI being removed
9220 * Returns 0 on success, negative value on failure
9222 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9224 /* remove default VSI is not allowed */
9225 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9228 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9232 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9233 * @vsi: the VSI being queried
9235 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9237 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9239 struct i40e_veb *veb;
9240 struct i40e_pf *pf = vsi->back;
9242 /* Uplink is not a bridge so default to VEB */
9243 if (vsi->veb_idx == I40E_NO_VEB)
9246 veb = pf->veb[vsi->veb_idx];
9248 dev_info(&pf->pdev->dev,
9249 "There is no veb associated with the bridge\n");
9253 /* Uplink is a bridge in VEPA mode */
9254 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9257 /* Uplink is a bridge in VEB mode */
9261 /* VEPA is now default bridge, so return 0 */
9266 * i40e_add_vsi - Add a VSI to the switch
9267 * @vsi: the VSI being configured
9269 * This initializes a VSI context depending on the VSI type to be added and
9270 * passes it down to the add_vsi aq command.
9272 static int i40e_add_vsi(struct i40e_vsi *vsi)
9275 u8 laa_macaddr[ETH_ALEN];
9276 bool found_laa_mac_filter = false;
9277 struct i40e_pf *pf = vsi->back;
9278 struct i40e_hw *hw = &pf->hw;
9279 struct i40e_vsi_context ctxt;
9280 struct i40e_mac_filter *f, *ftmp;
9282 u8 enabled_tc = 0x1; /* TC0 enabled */
9285 memset(&ctxt, 0, sizeof(ctxt));
9286 switch (vsi->type) {
9288 /* The PF's main VSI is already setup as part of the
9289 * device initialization, so we'll not bother with
9290 * the add_vsi call, but we will retrieve the current
9293 ctxt.seid = pf->main_vsi_seid;
9294 ctxt.pf_num = pf->hw.pf_id;
9296 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9297 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9299 dev_info(&pf->pdev->dev,
9300 "couldn't get PF vsi config, err %s aq_err %s\n",
9301 i40e_stat_str(&pf->hw, ret),
9302 i40e_aq_str(&pf->hw,
9303 pf->hw.aq.asq_last_status));
9306 vsi->info = ctxt.info;
9307 vsi->info.valid_sections = 0;
9309 vsi->seid = ctxt.seid;
9310 vsi->id = ctxt.vsi_number;
9312 enabled_tc = i40e_pf_get_tc_map(pf);
9314 /* MFP mode setup queue map and update VSI */
9315 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9316 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9317 memset(&ctxt, 0, sizeof(ctxt));
9318 ctxt.seid = pf->main_vsi_seid;
9319 ctxt.pf_num = pf->hw.pf_id;
9321 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9322 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9324 dev_info(&pf->pdev->dev,
9325 "update vsi failed, err %s aq_err %s\n",
9326 i40e_stat_str(&pf->hw, ret),
9327 i40e_aq_str(&pf->hw,
9328 pf->hw.aq.asq_last_status));
9332 /* update the local VSI info queue map */
9333 i40e_vsi_update_queue_map(vsi, &ctxt);
9334 vsi->info.valid_sections = 0;
9336 /* Default/Main VSI is only enabled for TC0
9337 * reconfigure it to enable all TCs that are
9338 * available on the port in SFP mode.
9339 * For MFP case the iSCSI PF would use this
9340 * flow to enable LAN+iSCSI TC.
9342 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9344 dev_info(&pf->pdev->dev,
9345 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9347 i40e_stat_str(&pf->hw, ret),
9348 i40e_aq_str(&pf->hw,
9349 pf->hw.aq.asq_last_status));
9356 ctxt.pf_num = hw->pf_id;
9358 ctxt.uplink_seid = vsi->uplink_seid;
9359 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9360 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9361 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9362 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9363 ctxt.info.valid_sections |=
9364 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9365 ctxt.info.switch_id =
9366 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9368 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9371 case I40E_VSI_VMDQ2:
9372 ctxt.pf_num = hw->pf_id;
9374 ctxt.uplink_seid = vsi->uplink_seid;
9375 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9376 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9378 /* This VSI is connected to VEB so the switch_id
9379 * should be set to zero by default.
9381 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9382 ctxt.info.valid_sections |=
9383 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9384 ctxt.info.switch_id =
9385 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9388 /* Setup the VSI tx/rx queue map for TC0 only for now */
9389 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9392 case I40E_VSI_SRIOV:
9393 ctxt.pf_num = hw->pf_id;
9394 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9395 ctxt.uplink_seid = vsi->uplink_seid;
9396 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9397 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9399 /* This VSI is connected to VEB so the switch_id
9400 * should be set to zero by default.
9402 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9403 ctxt.info.valid_sections |=
9404 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9405 ctxt.info.switch_id =
9406 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9409 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9410 ctxt.info.valid_sections |=
9411 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9412 ctxt.info.queueing_opt_flags |=
9413 I40E_AQ_VSI_QUE_OPT_TCP_ENA;
9416 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9417 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9418 if (pf->vf[vsi->vf_id].spoofchk) {
9419 ctxt.info.valid_sections |=
9420 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9421 ctxt.info.sec_flags |=
9422 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9423 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9425 /* Setup the VSI tx/rx queue map for TC0 only for now */
9426 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9431 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9433 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9438 #endif /* I40E_FCOE */
9439 case I40E_VSI_IWARP:
9440 /* send down message to iWARP */
9447 if (vsi->type != I40E_VSI_MAIN) {
9448 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9450 dev_info(&vsi->back->pdev->dev,
9451 "add vsi failed, err %s aq_err %s\n",
9452 i40e_stat_str(&pf->hw, ret),
9453 i40e_aq_str(&pf->hw,
9454 pf->hw.aq.asq_last_status));
9458 vsi->info = ctxt.info;
9459 vsi->info.valid_sections = 0;
9460 vsi->seid = ctxt.seid;
9461 vsi->id = ctxt.vsi_number;
9464 spin_lock_bh(&vsi->mac_filter_list_lock);
9465 /* If macvlan filters already exist, force them to get loaded */
9466 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9470 /* Expected to have only one MAC filter entry for LAA in list */
9471 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9472 ether_addr_copy(laa_macaddr, f->macaddr);
9473 found_laa_mac_filter = true;
9476 spin_unlock_bh(&vsi->mac_filter_list_lock);
9478 if (found_laa_mac_filter) {
9479 struct i40e_aqc_remove_macvlan_element_data element;
9481 memset(&element, 0, sizeof(element));
9482 ether_addr_copy(element.mac_addr, laa_macaddr);
9483 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9484 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9487 /* some older FW has a different default */
9489 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9490 i40e_aq_remove_macvlan(hw, vsi->seid,
9494 i40e_aq_mac_address_write(hw,
9495 I40E_AQC_WRITE_TYPE_LAA_WOL,
9500 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9501 pf->flags |= I40E_FLAG_FILTER_SYNC;
9504 /* Update VSI BW information */
9505 ret = i40e_vsi_get_bw_info(vsi);
9507 dev_info(&pf->pdev->dev,
9508 "couldn't get vsi bw info, err %s aq_err %s\n",
9509 i40e_stat_str(&pf->hw, ret),
9510 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9511 /* VSI is already added so not tearing that up */
9520 * i40e_vsi_release - Delete a VSI and free its resources
9521 * @vsi: the VSI being removed
9523 * Returns 0 on success or < 0 on error
9525 int i40e_vsi_release(struct i40e_vsi *vsi)
9527 struct i40e_mac_filter *f, *ftmp;
9528 struct i40e_veb *veb = NULL;
9535 /* release of a VEB-owner or last VSI is not allowed */
9536 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9537 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9538 vsi->seid, vsi->uplink_seid);
9541 if (vsi == pf->vsi[pf->lan_vsi] &&
9542 !test_bit(__I40E_DOWN, &pf->state)) {
9543 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9547 uplink_seid = vsi->uplink_seid;
9548 if (vsi->type != I40E_VSI_SRIOV) {
9549 if (vsi->netdev_registered) {
9550 vsi->netdev_registered = false;
9552 /* results in a call to i40e_close() */
9553 unregister_netdev(vsi->netdev);
9556 i40e_vsi_close(vsi);
9558 i40e_vsi_disable_irq(vsi);
9561 spin_lock_bh(&vsi->mac_filter_list_lock);
9562 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9563 i40e_del_filter(vsi, f->macaddr, f->vlan,
9564 f->is_vf, f->is_netdev);
9565 spin_unlock_bh(&vsi->mac_filter_list_lock);
9567 i40e_sync_vsi_filters(vsi);
9569 i40e_vsi_delete(vsi);
9570 i40e_vsi_free_q_vectors(vsi);
9572 free_netdev(vsi->netdev);
9575 i40e_vsi_clear_rings(vsi);
9576 i40e_vsi_clear(vsi);
9578 /* If this was the last thing on the VEB, except for the
9579 * controlling VSI, remove the VEB, which puts the controlling
9580 * VSI onto the next level down in the switch.
9582 * Well, okay, there's one more exception here: don't remove
9583 * the orphan VEBs yet. We'll wait for an explicit remove request
9584 * from up the network stack.
9586 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9588 pf->vsi[i]->uplink_seid == uplink_seid &&
9589 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9590 n++; /* count the VSIs */
9593 for (i = 0; i < I40E_MAX_VEB; i++) {
9596 if (pf->veb[i]->uplink_seid == uplink_seid)
9597 n++; /* count the VEBs */
9598 if (pf->veb[i]->seid == uplink_seid)
9601 if (n == 0 && veb && veb->uplink_seid != 0)
9602 i40e_veb_release(veb);
9608 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9609 * @vsi: ptr to the VSI
9611 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9612 * corresponding SW VSI structure and initializes num_queue_pairs for the
9613 * newly allocated VSI.
9615 * Returns 0 on success or negative on failure
9617 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9620 struct i40e_pf *pf = vsi->back;
9622 if (vsi->q_vectors[0]) {
9623 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9628 if (vsi->base_vector) {
9629 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9630 vsi->seid, vsi->base_vector);
9634 ret = i40e_vsi_alloc_q_vectors(vsi);
9636 dev_info(&pf->pdev->dev,
9637 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9638 vsi->num_q_vectors, vsi->seid, ret);
9639 vsi->num_q_vectors = 0;
9640 goto vector_setup_out;
9643 /* In Legacy mode, we do not have to get any other vector since we
9644 * piggyback on the misc/ICR0 for queue interrupts.
9646 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9648 if (vsi->num_q_vectors)
9649 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9650 vsi->num_q_vectors, vsi->idx);
9651 if (vsi->base_vector < 0) {
9652 dev_info(&pf->pdev->dev,
9653 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9654 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9655 i40e_vsi_free_q_vectors(vsi);
9657 goto vector_setup_out;
9665 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9666 * @vsi: pointer to the vsi.
9668 * This re-allocates a vsi's queue resources.
9670 * Returns pointer to the successfully allocated and configured VSI sw struct
9671 * on success, otherwise returns NULL on failure.
9673 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9684 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9685 i40e_vsi_clear_rings(vsi);
9687 i40e_vsi_free_arrays(vsi, false);
9688 i40e_set_num_rings_in_vsi(vsi);
9689 ret = i40e_vsi_alloc_arrays(vsi, false);
9693 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9695 dev_info(&pf->pdev->dev,
9696 "failed to get tracking for %d queues for VSI %d err %d\n",
9697 vsi->alloc_queue_pairs, vsi->seid, ret);
9700 vsi->base_queue = ret;
9702 /* Update the FW view of the VSI. Force a reset of TC and queue
9703 * layout configurations.
9705 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9706 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9707 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9708 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9710 /* assign it some queues */
9711 ret = i40e_alloc_rings(vsi);
9715 /* map all of the rings to the q_vectors */
9716 i40e_vsi_map_rings_to_vectors(vsi);
9720 i40e_vsi_free_q_vectors(vsi);
9721 if (vsi->netdev_registered) {
9722 vsi->netdev_registered = false;
9723 unregister_netdev(vsi->netdev);
9724 free_netdev(vsi->netdev);
9727 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9729 i40e_vsi_clear(vsi);
9734 * i40e_macaddr_init - explicitly write the mac address filters.
9736 * @vsi: pointer to the vsi.
9737 * @macaddr: the MAC address
9739 * This is needed when the macaddr has been obtained by other
9740 * means than the default, e.g., from Open Firmware or IDPROM.
9741 * Returns 0 on success, negative on failure
9743 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
9746 struct i40e_aqc_add_macvlan_element_data element;
9748 ret = i40e_aq_mac_address_write(&vsi->back->hw,
9749 I40E_AQC_WRITE_TYPE_LAA_WOL,
9752 dev_info(&vsi->back->pdev->dev,
9753 "Addr change for VSI failed: %d\n", ret);
9754 return -EADDRNOTAVAIL;
9757 memset(&element, 0, sizeof(element));
9758 ether_addr_copy(element.mac_addr, macaddr);
9759 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
9760 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
9762 dev_info(&vsi->back->pdev->dev,
9763 "add filter failed err %s aq_err %s\n",
9764 i40e_stat_str(&vsi->back->hw, ret),
9765 i40e_aq_str(&vsi->back->hw,
9766 vsi->back->hw.aq.asq_last_status));
9772 * i40e_vsi_setup - Set up a VSI by a given type
9773 * @pf: board private structure
9775 * @uplink_seid: the switch element to link to
9776 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9778 * This allocates the sw VSI structure and its queue resources, then add a VSI
9779 * to the identified VEB.
9781 * Returns pointer to the successfully allocated and configure VSI sw struct on
9782 * success, otherwise returns NULL on failure.
9784 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9785 u16 uplink_seid, u32 param1)
9787 struct i40e_vsi *vsi = NULL;
9788 struct i40e_veb *veb = NULL;
9792 /* The requested uplink_seid must be either
9793 * - the PF's port seid
9794 * no VEB is needed because this is the PF
9795 * or this is a Flow Director special case VSI
9796 * - seid of an existing VEB
9797 * - seid of a VSI that owns an existing VEB
9798 * - seid of a VSI that doesn't own a VEB
9799 * a new VEB is created and the VSI becomes the owner
9800 * - seid of the PF VSI, which is what creates the first VEB
9801 * this is a special case of the previous
9803 * Find which uplink_seid we were given and create a new VEB if needed
9805 for (i = 0; i < I40E_MAX_VEB; i++) {
9806 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9812 if (!veb && uplink_seid != pf->mac_seid) {
9814 for (i = 0; i < pf->num_alloc_vsi; i++) {
9815 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9821 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9826 if (vsi->uplink_seid == pf->mac_seid)
9827 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9828 vsi->tc_config.enabled_tc);
9829 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9830 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9831 vsi->tc_config.enabled_tc);
9833 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9834 dev_info(&vsi->back->pdev->dev,
9835 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9838 /* We come up by default in VEPA mode if SRIOV is not
9839 * already enabled, in which case we can't force VEPA
9842 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9843 veb->bridge_mode = BRIDGE_MODE_VEPA;
9844 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9846 i40e_config_bridge_mode(veb);
9848 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9849 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9853 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9857 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9858 uplink_seid = veb->seid;
9861 /* get vsi sw struct */
9862 v_idx = i40e_vsi_mem_alloc(pf, type);
9865 vsi = pf->vsi[v_idx];
9869 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9871 if (type == I40E_VSI_MAIN)
9872 pf->lan_vsi = v_idx;
9873 else if (type == I40E_VSI_SRIOV)
9874 vsi->vf_id = param1;
9875 /* assign it some queues */
9876 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9879 dev_info(&pf->pdev->dev,
9880 "failed to get tracking for %d queues for VSI %d err=%d\n",
9881 vsi->alloc_queue_pairs, vsi->seid, ret);
9884 vsi->base_queue = ret;
9886 /* get a VSI from the hardware */
9887 vsi->uplink_seid = uplink_seid;
9888 ret = i40e_add_vsi(vsi);
9892 switch (vsi->type) {
9893 /* setup the netdev if needed */
9895 /* Apply relevant filters if a platform-specific mac
9896 * address was selected.
9898 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9899 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9901 dev_warn(&pf->pdev->dev,
9902 "could not set up macaddr; err %d\n",
9906 case I40E_VSI_VMDQ2:
9908 ret = i40e_config_netdev(vsi);
9911 ret = register_netdev(vsi->netdev);
9914 vsi->netdev_registered = true;
9915 netif_carrier_off(vsi->netdev);
9916 #ifdef CONFIG_I40E_DCB
9917 /* Setup DCB netlink interface */
9918 i40e_dcbnl_setup(vsi);
9919 #endif /* CONFIG_I40E_DCB */
9923 /* set up vectors and rings if needed */
9924 ret = i40e_vsi_setup_vectors(vsi);
9928 ret = i40e_alloc_rings(vsi);
9932 /* map all of the rings to the q_vectors */
9933 i40e_vsi_map_rings_to_vectors(vsi);
9935 i40e_vsi_reset_stats(vsi);
9939 /* no netdev or rings for the other VSI types */
9943 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9944 (vsi->type == I40E_VSI_VMDQ2)) {
9945 ret = i40e_vsi_config_rss(vsi);
9950 i40e_vsi_free_q_vectors(vsi);
9952 if (vsi->netdev_registered) {
9953 vsi->netdev_registered = false;
9954 unregister_netdev(vsi->netdev);
9955 free_netdev(vsi->netdev);
9959 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9961 i40e_vsi_clear(vsi);
9967 * i40e_veb_get_bw_info - Query VEB BW information
9968 * @veb: the veb to query
9970 * Query the Tx scheduler BW configuration data for given VEB
9972 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9974 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9975 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9976 struct i40e_pf *pf = veb->pf;
9977 struct i40e_hw *hw = &pf->hw;
9982 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9985 dev_info(&pf->pdev->dev,
9986 "query veb bw config failed, err %s aq_err %s\n",
9987 i40e_stat_str(&pf->hw, ret),
9988 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9992 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9995 dev_info(&pf->pdev->dev,
9996 "query veb bw ets config failed, err %s aq_err %s\n",
9997 i40e_stat_str(&pf->hw, ret),
9998 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10002 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
10003 veb->bw_max_quanta = ets_data.tc_bw_max;
10004 veb->is_abs_credits = bw_data.absolute_credits_enable;
10005 veb->enabled_tc = ets_data.tc_valid_bits;
10006 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
10007 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
10008 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
10009 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
10010 veb->bw_tc_limit_credits[i] =
10011 le16_to_cpu(bw_data.tc_bw_limits[i]);
10012 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
10020 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
10021 * @pf: board private structure
10023 * On error: returns error code (negative)
10024 * On success: returns vsi index in PF (positive)
10026 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
10029 struct i40e_veb *veb;
10032 /* Need to protect the allocation of switch elements at the PF level */
10033 mutex_lock(&pf->switch_mutex);
10035 /* VEB list may be fragmented if VEB creation/destruction has
10036 * been happening. We can afford to do a quick scan to look
10037 * for any free slots in the list.
10039 * find next empty veb slot, looping back around if necessary
10042 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
10044 if (i >= I40E_MAX_VEB) {
10046 goto err_alloc_veb; /* out of VEB slots! */
10049 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
10052 goto err_alloc_veb;
10056 veb->enabled_tc = 1;
10061 mutex_unlock(&pf->switch_mutex);
10066 * i40e_switch_branch_release - Delete a branch of the switch tree
10067 * @branch: where to start deleting
10069 * This uses recursion to find the tips of the branch to be
10070 * removed, deleting until we get back to and can delete this VEB.
10072 static void i40e_switch_branch_release(struct i40e_veb *branch)
10074 struct i40e_pf *pf = branch->pf;
10075 u16 branch_seid = branch->seid;
10076 u16 veb_idx = branch->idx;
10079 /* release any VEBs on this VEB - RECURSION */
10080 for (i = 0; i < I40E_MAX_VEB; i++) {
10083 if (pf->veb[i]->uplink_seid == branch->seid)
10084 i40e_switch_branch_release(pf->veb[i]);
10087 /* Release the VSIs on this VEB, but not the owner VSI.
10089 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10090 * the VEB itself, so don't use (*branch) after this loop.
10092 for (i = 0; i < pf->num_alloc_vsi; i++) {
10095 if (pf->vsi[i]->uplink_seid == branch_seid &&
10096 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10097 i40e_vsi_release(pf->vsi[i]);
10101 /* There's one corner case where the VEB might not have been
10102 * removed, so double check it here and remove it if needed.
10103 * This case happens if the veb was created from the debugfs
10104 * commands and no VSIs were added to it.
10106 if (pf->veb[veb_idx])
10107 i40e_veb_release(pf->veb[veb_idx]);
10111 * i40e_veb_clear - remove veb struct
10112 * @veb: the veb to remove
10114 static void i40e_veb_clear(struct i40e_veb *veb)
10120 struct i40e_pf *pf = veb->pf;
10122 mutex_lock(&pf->switch_mutex);
10123 if (pf->veb[veb->idx] == veb)
10124 pf->veb[veb->idx] = NULL;
10125 mutex_unlock(&pf->switch_mutex);
10132 * i40e_veb_release - Delete a VEB and free its resources
10133 * @veb: the VEB being removed
10135 void i40e_veb_release(struct i40e_veb *veb)
10137 struct i40e_vsi *vsi = NULL;
10138 struct i40e_pf *pf;
10143 /* find the remaining VSI and check for extras */
10144 for (i = 0; i < pf->num_alloc_vsi; i++) {
10145 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10151 dev_info(&pf->pdev->dev,
10152 "can't remove VEB %d with %d VSIs left\n",
10157 /* move the remaining VSI to uplink veb */
10158 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10159 if (veb->uplink_seid) {
10160 vsi->uplink_seid = veb->uplink_seid;
10161 if (veb->uplink_seid == pf->mac_seid)
10162 vsi->veb_idx = I40E_NO_VEB;
10164 vsi->veb_idx = veb->veb_idx;
10167 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10168 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10171 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10172 i40e_veb_clear(veb);
10176 * i40e_add_veb - create the VEB in the switch
10177 * @veb: the VEB to be instantiated
10178 * @vsi: the controlling VSI
10180 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10182 struct i40e_pf *pf = veb->pf;
10183 bool is_default = veb->pf->cur_promisc;
10184 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10187 /* get a VEB from the hardware */
10188 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10189 veb->enabled_tc, is_default,
10190 &veb->seid, enable_stats, NULL);
10192 dev_info(&pf->pdev->dev,
10193 "couldn't add VEB, err %s aq_err %s\n",
10194 i40e_stat_str(&pf->hw, ret),
10195 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10199 /* get statistics counter */
10200 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10201 &veb->stats_idx, NULL, NULL, NULL);
10203 dev_info(&pf->pdev->dev,
10204 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10205 i40e_stat_str(&pf->hw, ret),
10206 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10209 ret = i40e_veb_get_bw_info(veb);
10211 dev_info(&pf->pdev->dev,
10212 "couldn't get VEB bw info, err %s aq_err %s\n",
10213 i40e_stat_str(&pf->hw, ret),
10214 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10215 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10219 vsi->uplink_seid = veb->seid;
10220 vsi->veb_idx = veb->idx;
10221 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10227 * i40e_veb_setup - Set up a VEB
10228 * @pf: board private structure
10229 * @flags: VEB setup flags
10230 * @uplink_seid: the switch element to link to
10231 * @vsi_seid: the initial VSI seid
10232 * @enabled_tc: Enabled TC bit-map
10234 * This allocates the sw VEB structure and links it into the switch
10235 * It is possible and legal for this to be a duplicate of an already
10236 * existing VEB. It is also possible for both uplink and vsi seids
10237 * to be zero, in order to create a floating VEB.
10239 * Returns pointer to the successfully allocated VEB sw struct on
10240 * success, otherwise returns NULL on failure.
10242 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10243 u16 uplink_seid, u16 vsi_seid,
10246 struct i40e_veb *veb, *uplink_veb = NULL;
10247 int vsi_idx, veb_idx;
10250 /* if one seid is 0, the other must be 0 to create a floating relay */
10251 if ((uplink_seid == 0 || vsi_seid == 0) &&
10252 (uplink_seid + vsi_seid != 0)) {
10253 dev_info(&pf->pdev->dev,
10254 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10255 uplink_seid, vsi_seid);
10259 /* make sure there is such a vsi and uplink */
10260 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10261 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10263 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10264 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10269 if (uplink_seid && uplink_seid != pf->mac_seid) {
10270 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10271 if (pf->veb[veb_idx] &&
10272 pf->veb[veb_idx]->seid == uplink_seid) {
10273 uplink_veb = pf->veb[veb_idx];
10278 dev_info(&pf->pdev->dev,
10279 "uplink seid %d not found\n", uplink_seid);
10284 /* get veb sw struct */
10285 veb_idx = i40e_veb_mem_alloc(pf);
10288 veb = pf->veb[veb_idx];
10289 veb->flags = flags;
10290 veb->uplink_seid = uplink_seid;
10291 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10292 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10294 /* create the VEB in the switch */
10295 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10298 if (vsi_idx == pf->lan_vsi)
10299 pf->lan_veb = veb->idx;
10304 i40e_veb_clear(veb);
10310 * i40e_setup_pf_switch_element - set PF vars based on switch type
10311 * @pf: board private structure
10312 * @ele: element we are building info from
10313 * @num_reported: total number of elements
10314 * @printconfig: should we print the contents
10316 * helper function to assist in extracting a few useful SEID values.
10318 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10319 struct i40e_aqc_switch_config_element_resp *ele,
10320 u16 num_reported, bool printconfig)
10322 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10323 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10324 u8 element_type = ele->element_type;
10325 u16 seid = le16_to_cpu(ele->seid);
10328 dev_info(&pf->pdev->dev,
10329 "type=%d seid=%d uplink=%d downlink=%d\n",
10330 element_type, seid, uplink_seid, downlink_seid);
10332 switch (element_type) {
10333 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10334 pf->mac_seid = seid;
10336 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10338 if (uplink_seid != pf->mac_seid)
10340 if (pf->lan_veb == I40E_NO_VEB) {
10343 /* find existing or else empty VEB */
10344 for (v = 0; v < I40E_MAX_VEB; v++) {
10345 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10350 if (pf->lan_veb == I40E_NO_VEB) {
10351 v = i40e_veb_mem_alloc(pf);
10358 pf->veb[pf->lan_veb]->seid = seid;
10359 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10360 pf->veb[pf->lan_veb]->pf = pf;
10361 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10363 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10364 if (num_reported != 1)
10366 /* This is immediately after a reset so we can assume this is
10369 pf->mac_seid = uplink_seid;
10370 pf->pf_seid = downlink_seid;
10371 pf->main_vsi_seid = seid;
10373 dev_info(&pf->pdev->dev,
10374 "pf_seid=%d main_vsi_seid=%d\n",
10375 pf->pf_seid, pf->main_vsi_seid);
10377 case I40E_SWITCH_ELEMENT_TYPE_PF:
10378 case I40E_SWITCH_ELEMENT_TYPE_VF:
10379 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10380 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10381 case I40E_SWITCH_ELEMENT_TYPE_PE:
10382 case I40E_SWITCH_ELEMENT_TYPE_PA:
10383 /* ignore these for now */
10386 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10387 element_type, seid);
10393 * i40e_fetch_switch_configuration - Get switch config from firmware
10394 * @pf: board private structure
10395 * @printconfig: should we print the contents
10397 * Get the current switch configuration from the device and
10398 * extract a few useful SEID values.
10400 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10402 struct i40e_aqc_get_switch_config_resp *sw_config;
10408 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10412 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10414 u16 num_reported, num_total;
10416 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10420 dev_info(&pf->pdev->dev,
10421 "get switch config failed err %s aq_err %s\n",
10422 i40e_stat_str(&pf->hw, ret),
10423 i40e_aq_str(&pf->hw,
10424 pf->hw.aq.asq_last_status));
10429 num_reported = le16_to_cpu(sw_config->header.num_reported);
10430 num_total = le16_to_cpu(sw_config->header.num_total);
10433 dev_info(&pf->pdev->dev,
10434 "header: %d reported %d total\n",
10435 num_reported, num_total);
10437 for (i = 0; i < num_reported; i++) {
10438 struct i40e_aqc_switch_config_element_resp *ele =
10439 &sw_config->element[i];
10441 i40e_setup_pf_switch_element(pf, ele, num_reported,
10444 } while (next_seid != 0);
10451 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10452 * @pf: board private structure
10453 * @reinit: if the Main VSI needs to re-initialized.
10455 * Returns 0 on success, negative value on failure
10457 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10461 /* find out what's out there already */
10462 ret = i40e_fetch_switch_configuration(pf, false);
10464 dev_info(&pf->pdev->dev,
10465 "couldn't fetch switch config, err %s aq_err %s\n",
10466 i40e_stat_str(&pf->hw, ret),
10467 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10470 i40e_pf_reset_stats(pf);
10472 /* first time setup */
10473 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10474 struct i40e_vsi *vsi = NULL;
10477 /* Set up the PF VSI associated with the PF's main VSI
10478 * that is already in the HW switch
10480 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10481 uplink_seid = pf->veb[pf->lan_veb]->seid;
10483 uplink_seid = pf->mac_seid;
10484 if (pf->lan_vsi == I40E_NO_VSI)
10485 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10487 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10489 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10490 i40e_fdir_teardown(pf);
10494 /* force a reset of TC and queue layout configurations */
10495 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10497 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10498 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10499 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10501 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10503 i40e_fdir_sb_setup(pf);
10505 /* Setup static PF queue filter control settings */
10506 ret = i40e_setup_pf_filter_control(pf);
10508 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10510 /* Failure here should not stop continuing other steps */
10513 /* enable RSS in the HW, even for only one queue, as the stack can use
10516 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10517 i40e_pf_config_rss(pf);
10519 /* fill in link information and enable LSE reporting */
10520 i40e_update_link_info(&pf->hw);
10521 i40e_link_event(pf);
10523 /* Initialize user-specific link properties */
10524 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10525 I40E_AQ_AN_COMPLETED) ? true : false);
10533 * i40e_determine_queue_usage - Work out queue distribution
10534 * @pf: board private structure
10536 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10540 pf->num_lan_qps = 0;
10542 pf->num_fcoe_qps = 0;
10545 /* Find the max queues to be put into basic use. We'll always be
10546 * using TC0, whether or not DCB is running, and TC0 will get the
10549 queues_left = pf->hw.func_caps.num_tx_qp;
10551 if ((queues_left == 1) ||
10552 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10553 /* one qp for PF, no queues for anything else */
10555 pf->alloc_rss_size = pf->num_lan_qps = 1;
10557 /* make sure all the fancies are disabled */
10558 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10559 I40E_FLAG_IWARP_ENABLED |
10561 I40E_FLAG_FCOE_ENABLED |
10563 I40E_FLAG_FD_SB_ENABLED |
10564 I40E_FLAG_FD_ATR_ENABLED |
10565 I40E_FLAG_DCB_CAPABLE |
10566 I40E_FLAG_SRIOV_ENABLED |
10567 I40E_FLAG_VMDQ_ENABLED);
10568 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10569 I40E_FLAG_FD_SB_ENABLED |
10570 I40E_FLAG_FD_ATR_ENABLED |
10571 I40E_FLAG_DCB_CAPABLE))) {
10572 /* one qp for PF */
10573 pf->alloc_rss_size = pf->num_lan_qps = 1;
10574 queues_left -= pf->num_lan_qps;
10576 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10577 I40E_FLAG_IWARP_ENABLED |
10579 I40E_FLAG_FCOE_ENABLED |
10581 I40E_FLAG_FD_SB_ENABLED |
10582 I40E_FLAG_FD_ATR_ENABLED |
10583 I40E_FLAG_DCB_ENABLED |
10584 I40E_FLAG_VMDQ_ENABLED);
10586 /* Not enough queues for all TCs */
10587 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10588 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10589 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10590 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10592 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10593 num_online_cpus());
10594 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10595 pf->hw.func_caps.num_tx_qp);
10597 queues_left -= pf->num_lan_qps;
10601 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10602 if (I40E_DEFAULT_FCOE <= queues_left) {
10603 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10604 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10605 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10607 pf->num_fcoe_qps = 0;
10608 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10609 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10612 queues_left -= pf->num_fcoe_qps;
10616 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10617 if (queues_left > 1) {
10618 queues_left -= 1; /* save 1 queue for FD */
10620 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10621 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10625 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10626 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10627 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10628 (queues_left / pf->num_vf_qps));
10629 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10632 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10633 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10634 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10635 (queues_left / pf->num_vmdq_qps));
10636 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10639 pf->queues_left = queues_left;
10640 dev_dbg(&pf->pdev->dev,
10641 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10642 pf->hw.func_caps.num_tx_qp,
10643 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10644 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10645 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10648 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10653 * i40e_setup_pf_filter_control - Setup PF static filter control
10654 * @pf: PF to be setup
10656 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10657 * settings. If PE/FCoE are enabled then it will also set the per PF
10658 * based filter sizes required for them. It also enables Flow director,
10659 * ethertype and macvlan type filter settings for the pf.
10661 * Returns 0 on success, negative on failure
10663 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10665 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10667 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10669 /* Flow Director is enabled */
10670 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10671 settings->enable_fdir = true;
10673 /* Ethtype and MACVLAN filters enabled for PF */
10674 settings->enable_ethtype = true;
10675 settings->enable_macvlan = true;
10677 if (i40e_set_filter_control(&pf->hw, settings))
10683 #define INFO_STRING_LEN 255
10684 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10685 static void i40e_print_features(struct i40e_pf *pf)
10687 struct i40e_hw *hw = &pf->hw;
10691 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10695 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10696 #ifdef CONFIG_PCI_IOV
10697 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10699 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d RX: %s",
10700 pf->hw.func_caps.num_vsis,
10701 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10702 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10704 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10705 i += snprintf(&buf[i], REMAIN(i), " RSS");
10706 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10707 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10708 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10709 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10710 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10712 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10713 i += snprintf(&buf[i], REMAIN(i), " DCB");
10714 #if IS_ENABLED(CONFIG_VXLAN)
10715 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10717 #if IS_ENABLED(CONFIG_GENEVE)
10718 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10720 if (pf->flags & I40E_FLAG_PTP)
10721 i += snprintf(&buf[i], REMAIN(i), " PTP");
10723 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10724 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10726 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10727 i += snprintf(&buf[i], REMAIN(i), " VEB");
10729 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10731 dev_info(&pf->pdev->dev, "%s\n", buf);
10733 WARN_ON(i > INFO_STRING_LEN);
10737 * i40e_get_platform_mac_addr - get platform-specific MAC address
10739 * @pdev: PCI device information struct
10740 * @pf: board private structure
10742 * Look up the MAC address in Open Firmware on systems that support it,
10743 * and use IDPROM on SPARC if no OF address is found. On return, the
10744 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10745 * has been selected.
10747 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10749 pf->flags &= ~I40E_FLAG_PF_MAC;
10750 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10751 pf->flags |= I40E_FLAG_PF_MAC;
10755 * i40e_probe - Device initialization routine
10756 * @pdev: PCI device information struct
10757 * @ent: entry in i40e_pci_tbl
10759 * i40e_probe initializes a PF identified by a pci_dev structure.
10760 * The OS initialization, configuring of the PF private structure,
10761 * and a hardware reset occur.
10763 * Returns 0 on success, negative on failure
10765 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10767 struct i40e_aq_get_phy_abilities_resp abilities;
10768 struct i40e_pf *pf;
10769 struct i40e_hw *hw;
10770 static u16 pfs_found;
10778 err = pci_enable_device_mem(pdev);
10782 /* set up for high or low dma */
10783 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10785 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10787 dev_err(&pdev->dev,
10788 "DMA configuration failed: 0x%x\n", err);
10793 /* set up pci connections */
10794 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10795 IORESOURCE_MEM), i40e_driver_name);
10797 dev_info(&pdev->dev,
10798 "pci_request_selected_regions failed %d\n", err);
10802 pci_enable_pcie_error_reporting(pdev);
10803 pci_set_master(pdev);
10805 /* Now that we have a PCI connection, we need to do the
10806 * low level device setup. This is primarily setting up
10807 * the Admin Queue structures and then querying for the
10808 * device's current profile information.
10810 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10817 set_bit(__I40E_DOWN, &pf->state);
10822 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10823 I40E_MAX_CSR_SPACE);
10825 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10826 if (!hw->hw_addr) {
10828 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10829 (unsigned int)pci_resource_start(pdev, 0),
10830 pf->ioremap_len, err);
10833 hw->vendor_id = pdev->vendor;
10834 hw->device_id = pdev->device;
10835 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10836 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10837 hw->subsystem_device_id = pdev->subsystem_device;
10838 hw->bus.device = PCI_SLOT(pdev->devfn);
10839 hw->bus.func = PCI_FUNC(pdev->devfn);
10840 pf->instance = pfs_found;
10842 /* set up the locks for the AQ, do this only once in probe
10843 * and destroy them only once in remove
10845 mutex_init(&hw->aq.asq_mutex);
10846 mutex_init(&hw->aq.arq_mutex);
10849 pf->msg_enable = pf->hw.debug_mask;
10850 pf->msg_enable = debug;
10853 /* do a special CORER for clearing PXE mode once at init */
10854 if (hw->revision_id == 0 &&
10855 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10856 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10861 i40e_clear_pxe_mode(hw);
10864 /* Reset here to make sure all is clean and to define PF 'n' */
10866 err = i40e_pf_reset(hw);
10868 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10873 hw->aq.num_arq_entries = I40E_AQ_LEN;
10874 hw->aq.num_asq_entries = I40E_AQ_LEN;
10875 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10876 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10877 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10879 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10881 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10883 err = i40e_init_shared_code(hw);
10885 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10890 /* set up a default setting for link flow control */
10891 pf->hw.fc.requested_mode = I40E_FC_NONE;
10893 err = i40e_init_adminq(hw);
10895 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10896 dev_info(&pdev->dev,
10897 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10899 dev_info(&pdev->dev,
10900 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10905 /* provide nvm, fw, api versions */
10906 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10907 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10908 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10909 i40e_nvm_version_str(hw));
10911 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10912 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10913 dev_info(&pdev->dev,
10914 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10915 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10916 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10917 dev_info(&pdev->dev,
10918 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10920 i40e_verify_eeprom(pf);
10922 /* Rev 0 hardware was never productized */
10923 if (hw->revision_id < 1)
10924 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10926 i40e_clear_pxe_mode(hw);
10927 err = i40e_get_capabilities(pf);
10929 goto err_adminq_setup;
10931 err = i40e_sw_init(pf);
10933 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10937 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10938 hw->func_caps.num_rx_qp,
10939 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10941 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10942 goto err_init_lan_hmc;
10945 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10947 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10949 goto err_configure_lan_hmc;
10952 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10953 * Ignore error return codes because if it was already disabled via
10954 * hardware settings this will fail
10956 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
10957 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10958 i40e_aq_stop_lldp(hw, true, NULL);
10961 i40e_get_mac_addr(hw, hw->mac.addr);
10962 /* allow a platform config to override the HW addr */
10963 i40e_get_platform_mac_addr(pdev, pf);
10964 if (!is_valid_ether_addr(hw->mac.addr)) {
10965 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10969 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10970 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10971 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10972 if (is_valid_ether_addr(hw->mac.port_addr))
10973 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10975 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10977 dev_info(&pdev->dev,
10978 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10979 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10980 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10982 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10984 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10985 #endif /* I40E_FCOE */
10987 pci_set_drvdata(pdev, pf);
10988 pci_save_state(pdev);
10989 #ifdef CONFIG_I40E_DCB
10990 err = i40e_init_pf_dcb(pf);
10992 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10993 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10994 /* Continue without DCB enabled */
10996 #endif /* CONFIG_I40E_DCB */
10998 /* set up periodic task facility */
10999 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
11000 pf->service_timer_period = HZ;
11002 INIT_WORK(&pf->service_task, i40e_service_task);
11003 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
11004 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
11006 /* NVM bit on means WoL disabled for the port */
11007 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
11008 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
11009 pf->wol_en = false;
11012 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
11014 /* set up the main switch operations */
11015 i40e_determine_queue_usage(pf);
11016 err = i40e_init_interrupt_scheme(pf);
11018 goto err_switch_setup;
11020 /* The number of VSIs reported by the FW is the minimum guaranteed
11021 * to us; HW supports far more and we share the remaining pool with
11022 * the other PFs. We allocate space for more than the guarantee with
11023 * the understanding that we might not get them all later.
11025 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
11026 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
11028 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
11030 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
11031 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
11035 goto err_switch_setup;
11038 #ifdef CONFIG_PCI_IOV
11039 /* prep for VF support */
11040 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11041 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11042 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11043 if (pci_num_vf(pdev))
11044 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11047 err = i40e_setup_pf_switch(pf, false);
11049 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11053 /* Make sure flow control is set according to current settings */
11054 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11055 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11056 dev_dbg(&pf->pdev->dev,
11057 "Set fc with err %s aq_err %s on get_phy_cap\n",
11058 i40e_stat_str(hw, err),
11059 i40e_aq_str(hw, hw->aq.asq_last_status));
11060 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11061 dev_dbg(&pf->pdev->dev,
11062 "Set fc with err %s aq_err %s on set_phy_config\n",
11063 i40e_stat_str(hw, err),
11064 i40e_aq_str(hw, hw->aq.asq_last_status));
11065 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11066 dev_dbg(&pf->pdev->dev,
11067 "Set fc with err %s aq_err %s on get_link_info\n",
11068 i40e_stat_str(hw, err),
11069 i40e_aq_str(hw, hw->aq.asq_last_status));
11071 /* if FDIR VSI was set up, start it now */
11072 for (i = 0; i < pf->num_alloc_vsi; i++) {
11073 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11074 i40e_vsi_open(pf->vsi[i]);
11079 /* The driver only wants link up/down and module qualification
11080 * reports from firmware. Note the negative logic.
11082 err = i40e_aq_set_phy_int_mask(&pf->hw,
11083 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11084 I40E_AQ_EVENT_MEDIA_NA |
11085 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11087 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11088 i40e_stat_str(&pf->hw, err),
11089 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11091 /* Reconfigure hardware for allowing smaller MSS in the case
11092 * of TSO, so that we avoid the MDD being fired and causing
11093 * a reset in the case of small MSS+TSO.
11095 val = rd32(hw, I40E_REG_MSS);
11096 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11097 val &= ~I40E_REG_MSS_MIN_MASK;
11098 val |= I40E_64BYTE_MSS;
11099 wr32(hw, I40E_REG_MSS, val);
11102 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11104 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11106 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11107 i40e_stat_str(&pf->hw, err),
11108 i40e_aq_str(&pf->hw,
11109 pf->hw.aq.asq_last_status));
11111 /* The main driver is (mostly) up and happy. We need to set this state
11112 * before setting up the misc vector or we get a race and the vector
11113 * ends up disabled forever.
11115 clear_bit(__I40E_DOWN, &pf->state);
11117 /* In case of MSIX we are going to setup the misc vector right here
11118 * to handle admin queue events etc. In case of legacy and MSI
11119 * the misc functionality and queue processing is combined in
11120 * the same vector and that gets setup at open.
11122 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11123 err = i40e_setup_misc_vector(pf);
11125 dev_info(&pdev->dev,
11126 "setup of misc vector failed: %d\n", err);
11131 #ifdef CONFIG_PCI_IOV
11132 /* prep for VF support */
11133 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11134 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11135 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11136 /* disable link interrupts for VFs */
11137 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11138 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11139 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11142 if (pci_num_vf(pdev)) {
11143 dev_info(&pdev->dev,
11144 "Active VFs found, allocating resources.\n");
11145 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11147 dev_info(&pdev->dev,
11148 "Error %d allocating resources for existing VFs\n",
11152 #endif /* CONFIG_PCI_IOV */
11154 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11155 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11156 pf->num_iwarp_msix,
11157 I40E_IWARP_IRQ_PILE_ID);
11158 if (pf->iwarp_base_vector < 0) {
11159 dev_info(&pdev->dev,
11160 "failed to get tracking for %d vectors for IWARP err=%d\n",
11161 pf->num_iwarp_msix, pf->iwarp_base_vector);
11162 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11166 i40e_dbg_pf_init(pf);
11168 /* tell the firmware that we're starting */
11169 i40e_send_version(pf);
11171 /* since everything's happy, start the service_task timer */
11172 mod_timer(&pf->service_timer,
11173 round_jiffies(jiffies + pf->service_timer_period));
11175 /* add this PF to client device list and launch a client service task */
11176 err = i40e_lan_add_device(pf);
11178 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11182 /* create FCoE interface */
11183 i40e_fcoe_vsi_setup(pf);
11186 #define PCI_SPEED_SIZE 8
11187 #define PCI_WIDTH_SIZE 8
11188 /* Devices on the IOSF bus do not have this information
11189 * and will report PCI Gen 1 x 1 by default so don't bother
11192 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11193 char speed[PCI_SPEED_SIZE] = "Unknown";
11194 char width[PCI_WIDTH_SIZE] = "Unknown";
11196 /* Get the negotiated link width and speed from PCI config
11199 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11202 i40e_set_pci_config_data(hw, link_status);
11204 switch (hw->bus.speed) {
11205 case i40e_bus_speed_8000:
11206 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11207 case i40e_bus_speed_5000:
11208 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11209 case i40e_bus_speed_2500:
11210 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11214 switch (hw->bus.width) {
11215 case i40e_bus_width_pcie_x8:
11216 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11217 case i40e_bus_width_pcie_x4:
11218 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11219 case i40e_bus_width_pcie_x2:
11220 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11221 case i40e_bus_width_pcie_x1:
11222 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11227 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11230 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11231 hw->bus.speed < i40e_bus_speed_8000) {
11232 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11233 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11237 /* get the requested speeds from the fw */
11238 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11240 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11241 i40e_stat_str(&pf->hw, err),
11242 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11243 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11245 /* get the supported phy types from the fw */
11246 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11248 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11249 i40e_stat_str(&pf->hw, err),
11250 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11251 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11253 /* Add a filter to drop all Flow control frames from any VSI from being
11254 * transmitted. By doing so we stop a malicious VF from sending out
11255 * PAUSE or PFC frames and potentially controlling traffic for other
11257 * The FW can still send Flow control frames if enabled.
11259 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11260 pf->main_vsi_seid);
11262 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11263 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11264 pf->flags |= I40E_FLAG_HAVE_10GBASET_PHY;
11266 /* print a string summarizing features */
11267 i40e_print_features(pf);
11271 /* Unwind what we've done if something failed in the setup */
11273 set_bit(__I40E_DOWN, &pf->state);
11274 i40e_clear_interrupt_scheme(pf);
11277 i40e_reset_interrupt_capability(pf);
11278 del_timer_sync(&pf->service_timer);
11280 err_configure_lan_hmc:
11281 (void)i40e_shutdown_lan_hmc(hw);
11283 kfree(pf->qp_pile);
11287 iounmap(hw->hw_addr);
11291 pci_disable_pcie_error_reporting(pdev);
11292 pci_release_selected_regions(pdev,
11293 pci_select_bars(pdev, IORESOURCE_MEM));
11296 pci_disable_device(pdev);
11301 * i40e_remove - Device removal routine
11302 * @pdev: PCI device information struct
11304 * i40e_remove is called by the PCI subsystem to alert the driver
11305 * that is should release a PCI device. This could be caused by a
11306 * Hot-Plug event, or because the driver is going to be removed from
11309 static void i40e_remove(struct pci_dev *pdev)
11311 struct i40e_pf *pf = pci_get_drvdata(pdev);
11312 struct i40e_hw *hw = &pf->hw;
11313 i40e_status ret_code;
11316 i40e_dbg_pf_exit(pf);
11320 /* Disable RSS in hw */
11321 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11322 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11324 /* no more scheduling of any task */
11325 set_bit(__I40E_SUSPENDED, &pf->state);
11326 set_bit(__I40E_DOWN, &pf->state);
11327 if (pf->service_timer.data)
11328 del_timer_sync(&pf->service_timer);
11329 if (pf->service_task.func)
11330 cancel_work_sync(&pf->service_task);
11332 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11334 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11337 i40e_fdir_teardown(pf);
11339 /* If there is a switch structure or any orphans, remove them.
11340 * This will leave only the PF's VSI remaining.
11342 for (i = 0; i < I40E_MAX_VEB; i++) {
11346 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11347 pf->veb[i]->uplink_seid == 0)
11348 i40e_switch_branch_release(pf->veb[i]);
11351 /* Now we can shutdown the PF's VSI, just before we kill
11354 if (pf->vsi[pf->lan_vsi])
11355 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11357 /* remove attached clients */
11358 ret_code = i40e_lan_del_device(pf);
11360 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11364 /* shutdown and destroy the HMC */
11365 if (hw->hmc.hmc_obj) {
11366 ret_code = i40e_shutdown_lan_hmc(hw);
11368 dev_warn(&pdev->dev,
11369 "Failed to destroy the HMC resources: %d\n",
11373 /* shutdown the adminq */
11374 ret_code = i40e_shutdown_adminq(hw);
11376 dev_warn(&pdev->dev,
11377 "Failed to destroy the Admin Queue resources: %d\n",
11380 /* destroy the locks only once, here */
11381 mutex_destroy(&hw->aq.arq_mutex);
11382 mutex_destroy(&hw->aq.asq_mutex);
11384 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11385 i40e_clear_interrupt_scheme(pf);
11386 for (i = 0; i < pf->num_alloc_vsi; i++) {
11388 i40e_vsi_clear_rings(pf->vsi[i]);
11389 i40e_vsi_clear(pf->vsi[i]);
11394 for (i = 0; i < I40E_MAX_VEB; i++) {
11399 kfree(pf->qp_pile);
11402 iounmap(hw->hw_addr);
11404 pci_release_selected_regions(pdev,
11405 pci_select_bars(pdev, IORESOURCE_MEM));
11407 pci_disable_pcie_error_reporting(pdev);
11408 pci_disable_device(pdev);
11412 * i40e_pci_error_detected - warning that something funky happened in PCI land
11413 * @pdev: PCI device information struct
11415 * Called to warn that something happened and the error handling steps
11416 * are in progress. Allows the driver to quiesce things, be ready for
11419 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11420 enum pci_channel_state error)
11422 struct i40e_pf *pf = pci_get_drvdata(pdev);
11424 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11426 /* shutdown all operations */
11427 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11429 i40e_prep_for_reset(pf);
11433 /* Request a slot reset */
11434 return PCI_ERS_RESULT_NEED_RESET;
11438 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11439 * @pdev: PCI device information struct
11441 * Called to find if the driver can work with the device now that
11442 * the pci slot has been reset. If a basic connection seems good
11443 * (registers are readable and have sane content) then return a
11444 * happy little PCI_ERS_RESULT_xxx.
11446 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11448 struct i40e_pf *pf = pci_get_drvdata(pdev);
11449 pci_ers_result_t result;
11453 dev_dbg(&pdev->dev, "%s\n", __func__);
11454 if (pci_enable_device_mem(pdev)) {
11455 dev_info(&pdev->dev,
11456 "Cannot re-enable PCI device after reset.\n");
11457 result = PCI_ERS_RESULT_DISCONNECT;
11459 pci_set_master(pdev);
11460 pci_restore_state(pdev);
11461 pci_save_state(pdev);
11462 pci_wake_from_d3(pdev, false);
11464 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11466 result = PCI_ERS_RESULT_RECOVERED;
11468 result = PCI_ERS_RESULT_DISCONNECT;
11471 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11473 dev_info(&pdev->dev,
11474 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11476 /* non-fatal, continue */
11483 * i40e_pci_error_resume - restart operations after PCI error recovery
11484 * @pdev: PCI device information struct
11486 * Called to allow the driver to bring things back up after PCI error
11487 * and/or reset recovery has finished.
11489 static void i40e_pci_error_resume(struct pci_dev *pdev)
11491 struct i40e_pf *pf = pci_get_drvdata(pdev);
11493 dev_dbg(&pdev->dev, "%s\n", __func__);
11494 if (test_bit(__I40E_SUSPENDED, &pf->state))
11498 i40e_handle_reset_warning(pf);
11503 * i40e_shutdown - PCI callback for shutting down
11504 * @pdev: PCI device information struct
11506 static void i40e_shutdown(struct pci_dev *pdev)
11508 struct i40e_pf *pf = pci_get_drvdata(pdev);
11509 struct i40e_hw *hw = &pf->hw;
11511 set_bit(__I40E_SUSPENDED, &pf->state);
11512 set_bit(__I40E_DOWN, &pf->state);
11514 i40e_prep_for_reset(pf);
11517 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11518 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11520 del_timer_sync(&pf->service_timer);
11521 cancel_work_sync(&pf->service_task);
11522 i40e_fdir_teardown(pf);
11525 i40e_prep_for_reset(pf);
11528 wr32(hw, I40E_PFPM_APM,
11529 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11530 wr32(hw, I40E_PFPM_WUFC,
11531 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11533 i40e_clear_interrupt_scheme(pf);
11535 if (system_state == SYSTEM_POWER_OFF) {
11536 pci_wake_from_d3(pdev, pf->wol_en);
11537 pci_set_power_state(pdev, PCI_D3hot);
11543 * i40e_suspend - PCI callback for moving to D3
11544 * @pdev: PCI device information struct
11546 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11548 struct i40e_pf *pf = pci_get_drvdata(pdev);
11549 struct i40e_hw *hw = &pf->hw;
11551 set_bit(__I40E_SUSPENDED, &pf->state);
11552 set_bit(__I40E_DOWN, &pf->state);
11555 i40e_prep_for_reset(pf);
11558 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11559 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11561 pci_wake_from_d3(pdev, pf->wol_en);
11562 pci_set_power_state(pdev, PCI_D3hot);
11568 * i40e_resume - PCI callback for waking up from D3
11569 * @pdev: PCI device information struct
11571 static int i40e_resume(struct pci_dev *pdev)
11573 struct i40e_pf *pf = pci_get_drvdata(pdev);
11576 pci_set_power_state(pdev, PCI_D0);
11577 pci_restore_state(pdev);
11578 /* pci_restore_state() clears dev->state_saves, so
11579 * call pci_save_state() again to restore it.
11581 pci_save_state(pdev);
11583 err = pci_enable_device_mem(pdev);
11585 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11588 pci_set_master(pdev);
11590 /* no wakeup events while running */
11591 pci_wake_from_d3(pdev, false);
11593 /* handling the reset will rebuild the device state */
11594 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11595 clear_bit(__I40E_DOWN, &pf->state);
11597 i40e_reset_and_rebuild(pf, false);
11605 static const struct pci_error_handlers i40e_err_handler = {
11606 .error_detected = i40e_pci_error_detected,
11607 .slot_reset = i40e_pci_error_slot_reset,
11608 .resume = i40e_pci_error_resume,
11611 static struct pci_driver i40e_driver = {
11612 .name = i40e_driver_name,
11613 .id_table = i40e_pci_tbl,
11614 .probe = i40e_probe,
11615 .remove = i40e_remove,
11617 .suspend = i40e_suspend,
11618 .resume = i40e_resume,
11620 .shutdown = i40e_shutdown,
11621 .err_handler = &i40e_err_handler,
11622 .sriov_configure = i40e_pci_sriov_configure,
11626 * i40e_init_module - Driver registration routine
11628 * i40e_init_module is the first routine called when the driver is
11629 * loaded. All it does is register with the PCI subsystem.
11631 static int __init i40e_init_module(void)
11633 pr_info("%s: %s - version %s\n", i40e_driver_name,
11634 i40e_driver_string, i40e_driver_version_str);
11635 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11637 /* we will see if single thread per module is enough for now,
11638 * it can't be any worse than using the system workqueue which
11639 * was already single threaded
11641 i40e_wq = create_singlethread_workqueue(i40e_driver_name);
11643 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11648 return pci_register_driver(&i40e_driver);
11650 module_init(i40e_init_module);
11653 * i40e_exit_module - Driver exit cleanup routine
11655 * i40e_exit_module is called just before the driver is removed
11658 static void __exit i40e_exit_module(void)
11660 pci_unregister_driver(&i40e_driver);
11661 destroy_workqueue(i40e_wq);
11664 module_exit(i40e_exit_module);