drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #include <linux/etherdevice.h>
  54 #ifdef CONFIG_IGB_DCA
  55 #include <linux/dca.h>
  56 #endif
  57 #include <linux/i2c.h>
  58 #include "igb.h"
  59
  60 #define MAJ 5
  61 #define MIN 3
  62 #define BUILD 0
  63 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  64 __stringify(BUILD) "-k"
  65 char igb_driver_name[] = "igb";
  66 char igb_driver_version[] = DRV_VERSION;
  67 static const char igb_driver_string[] =
  68                                 "Intel(R) Gigabit Ethernet Network Driver";
  69 static const char igb_copyright[] =
  70                                 "Copyright (c) 2007-2014 Intel Corporation.";
  71
  72 static const struct e1000_info *igb_info_tbl[] = {
  73         [board_82575] = &e1000_82575_info,
  74 };
  75
  76 static const struct pci_device_id igb_pci_tbl[] = {
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 112         /* required last entry */
 113         {0, }
 114 };
 115
 116 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 117
 118 static int igb_setup_all_tx_resources(struct igb_adapter *);
 119 static int igb_setup_all_rx_resources(struct igb_adapter *);
 120 static void igb_free_all_tx_resources(struct igb_adapter *);
 121 static void igb_free_all_rx_resources(struct igb_adapter *);
 122 static void igb_setup_mrqc(struct igb_adapter *);
 123 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 124 static void igb_remove(struct pci_dev *pdev);
 125 static int igb_sw_init(struct igb_adapter *);
 126 int igb_open(struct net_device *);
 127 int igb_close(struct net_device *);
 128 static void igb_configure(struct igb_adapter *);
 129 static void igb_configure_tx(struct igb_adapter *);
 130 static void igb_configure_rx(struct igb_adapter *);
 131 static void igb_clean_all_tx_rings(struct igb_adapter *);
 132 static void igb_clean_all_rx_rings(struct igb_adapter *);
 133 static void igb_clean_tx_ring(struct igb_ring *);
 134 static void igb_clean_rx_ring(struct igb_ring *);
 135 static void igb_set_rx_mode(struct net_device *);
 136 static void igb_update_phy_info(unsigned long);
 137 static void igb_watchdog(unsigned long);
 138 static void igb_watchdog_task(struct work_struct *);
 139 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 140 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 141                                           struct rtnl_link_stats64 *stats);
 142 static int igb_change_mtu(struct net_device *, int);
 143 static int igb_set_mac(struct net_device *, void *);
 144 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 145 static irqreturn_t igb_intr(int irq, void *);
 146 static irqreturn_t igb_intr_msi(int irq, void *);
 147 static irqreturn_t igb_msix_other(int irq, void *);
 148 static irqreturn_t igb_msix_ring(int irq, void *);
 149 #ifdef CONFIG_IGB_DCA
 150 static void igb_update_dca(struct igb_q_vector *);
 151 static void igb_setup_dca(struct igb_adapter *);
 152 #endif /* CONFIG_IGB_DCA */
 153 static int igb_poll(struct napi_struct *, int);
 154 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 155 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 156 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 157 static void igb_tx_timeout(struct net_device *);
 158 static void igb_reset_task(struct work_struct *);
 159 static void igb_vlan_mode(struct net_device *netdev,
 160                           netdev_features_t features);
 161 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 162 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 163 static void igb_restore_vlan(struct igb_adapter *);
 164 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 165 static void igb_ping_all_vfs(struct igb_adapter *);
 166 static void igb_msg_task(struct igb_adapter *);
 167 static void igb_vmm_control(struct igb_adapter *);
 168 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 169 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 170 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 171 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 172                                int vf, u16 vlan, u8 qos);
 173 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 174 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 175                                    bool setting);
 176 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 177                                  struct ifla_vf_info *ivi);
 178 static void igb_check_vf_rate_limit(struct igb_adapter *);
 179
 180 #ifdef CONFIG_PCI_IOV
 181 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 182 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 183 static int igb_disable_sriov(struct pci_dev *dev);
 184 static int igb_pci_disable_sriov(struct pci_dev *dev);
 185 #endif
 186
 187 #ifdef CONFIG_PM
 188 #ifdef CONFIG_PM_SLEEP
 189 static int igb_suspend(struct device *);
 190 #endif
 191 static int igb_resume(struct device *);
 192 static int igb_runtime_suspend(struct device *dev);
 193 static int igb_runtime_resume(struct device *dev);
 194 static int igb_runtime_idle(struct device *dev);
 195 static const struct dev_pm_ops igb_pm_ops = {
 196         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 197         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 198                         igb_runtime_idle)
 199 };
 200 #endif
 201 static void igb_shutdown(struct pci_dev *);
 202 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 203 #ifdef CONFIG_IGB_DCA
 204 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 205 static struct notifier_block dca_notifier = {
 206         .notifier_call  = igb_notify_dca,
 207         .next           = NULL,
 208         .priority       = 0
 209 };
 210 #endif
 211 #ifdef CONFIG_NET_POLL_CONTROLLER
 212 /* for netdump / net console */
 213 static void igb_netpoll(struct net_device *);
 214 #endif
 215 #ifdef CONFIG_PCI_IOV
 216 static unsigned int max_vfs;
 217 module_param(max_vfs, uint, 0);
 218 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 219 #endif /* CONFIG_PCI_IOV */
 220
 221 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 222                      pci_channel_state_t);
 223 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 224 static void igb_io_resume(struct pci_dev *);
 225
 226 static const struct pci_error_handlers igb_err_handler = {
 227         .error_detected = igb_io_error_detected,
 228         .slot_reset = igb_io_slot_reset,
 229         .resume = igb_io_resume,
 230 };
 231
 232 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 233
 234 static struct pci_driver igb_driver = {
 235         .name     = igb_driver_name,
 236         .id_table = igb_pci_tbl,
 237         .probe    = igb_probe,
 238         .remove   = igb_remove,
 239 #ifdef CONFIG_PM
 240         .driver.pm = &igb_pm_ops,
 241 #endif
 242         .shutdown = igb_shutdown,
 243         .sriov_configure = igb_pci_sriov_configure,
 244         .err_handler = &igb_err_handler
 245 };
 246
 247 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 248 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 249 MODULE_LICENSE("GPL");
 250 MODULE_VERSION(DRV_VERSION);
 251
 252 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 253 static int debug = -1;
 254 module_param(debug, int, 0);
 255 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 256
 257 struct igb_reg_info {
 258         u32 ofs;
 259         char *name;
 260 };
 261
 262 static const struct igb_reg_info igb_reg_info_tbl[] = {
 263
 264         /* General Registers */
 265         {E1000_CTRL, "CTRL"},
 266         {E1000_STATUS, "STATUS"},
 267         {E1000_CTRL_EXT, "CTRL_EXT"},
 268
 269         /* Interrupt Registers */
 270         {E1000_ICR, "ICR"},
 271
 272         /* RX Registers */
 273         {E1000_RCTL, "RCTL"},
 274         {E1000_RDLEN(0), "RDLEN"},
 275         {E1000_RDH(0), "RDH"},
 276         {E1000_RDT(0), "RDT"},
 277         {E1000_RXDCTL(0), "RXDCTL"},
 278         {E1000_RDBAL(0), "RDBAL"},
 279         {E1000_RDBAH(0), "RDBAH"},
 280
 281         /* TX Registers */
 282         {E1000_TCTL, "TCTL"},
 283         {E1000_TDBAL(0), "TDBAL"},
 284         {E1000_TDBAH(0), "TDBAH"},
 285         {E1000_TDLEN(0), "TDLEN"},
 286         {E1000_TDH(0), "TDH"},
 287         {E1000_TDT(0), "TDT"},
 288         {E1000_TXDCTL(0), "TXDCTL"},
 289         {E1000_TDFH, "TDFH"},
 290         {E1000_TDFT, "TDFT"},
 291         {E1000_TDFHS, "TDFHS"},
 292         {E1000_TDFPC, "TDFPC"},
 293
 294         /* List Terminator */
 295         {}
 296 };
 297
 298 /* igb_regdump - register printout routine */
 299 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 300 {
 301         int n = 0;
 302         char rname[16];
 303         u32 regs[8];
 304
 305         switch (reginfo->ofs) {
 306         case E1000_RDLEN(0):
 307                 for (n = 0; n < 4; n++)
 308                         regs[n] = rd32(E1000_RDLEN(n));
 309                 break;
 310         case E1000_RDH(0):
 311                 for (n = 0; n < 4; n++)
 312                         regs[n] = rd32(E1000_RDH(n));
 313                 break;
 314         case E1000_RDT(0):
 315                 for (n = 0; n < 4; n++)
 316                         regs[n] = rd32(E1000_RDT(n));
 317                 break;
 318         case E1000_RXDCTL(0):
 319                 for (n = 0; n < 4; n++)
 320                         regs[n] = rd32(E1000_RXDCTL(n));
 321                 break;
 322         case E1000_RDBAL(0):
 323                 for (n = 0; n < 4; n++)
 324                         regs[n] = rd32(E1000_RDBAL(n));
 325                 break;
 326         case E1000_RDBAH(0):
 327                 for (n = 0; n < 4; n++)
 328                         regs[n] = rd32(E1000_RDBAH(n));
 329                 break;
 330         case E1000_TDBAL(0):
 331                 for (n = 0; n < 4; n++)
 332                         regs[n] = rd32(E1000_RDBAL(n));
 333                 break;
 334         case E1000_TDBAH(0):
 335                 for (n = 0; n < 4; n++)
 336                         regs[n] = rd32(E1000_TDBAH(n));
 337                 break;
 338         case E1000_TDLEN(0):
 339                 for (n = 0; n < 4; n++)
 340                         regs[n] = rd32(E1000_TDLEN(n));
 341                 break;
 342         case E1000_TDH(0):
 343                 for (n = 0; n < 4; n++)
 344                         regs[n] = rd32(E1000_TDH(n));
 345                 break;
 346         case E1000_TDT(0):
 347                 for (n = 0; n < 4; n++)
 348                         regs[n] = rd32(E1000_TDT(n));
 349                 break;
 350         case E1000_TXDCTL(0):
 351                 for (n = 0; n < 4; n++)
 352                         regs[n] = rd32(E1000_TXDCTL(n));
 353                 break;
 354         default:
 355                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 356                 return;
 357         }
 358
 359         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 360         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 361                 regs[2], regs[3]);
 362 }
 363
 364 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 365 static void igb_dump(struct igb_adapter *adapter)
 366 {
 367         struct net_device *netdev = adapter->netdev;
 368         struct e1000_hw *hw = &adapter->hw;
 369         struct igb_reg_info *reginfo;
 370         struct igb_ring *tx_ring;
 371         union e1000_adv_tx_desc *tx_desc;
 372         struct my_u0 { u64 a; u64 b; } *u0;
 373         struct igb_ring *rx_ring;
 374         union e1000_adv_rx_desc *rx_desc;
 375         u32 staterr;
 376         u16 i, n;
 377
 378         if (!netif_msg_hw(adapter))
 379                 return;
 380
 381         /* Print netdevice Info */
 382         if (netdev) {
 383                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 384                 pr_info("Device Name     state            trans_start      last_rx\n");
 385                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 386                         netdev->state, dev_trans_start(netdev), netdev->last_rx);
 387         }
 388
 389         /* Print Registers */
 390         dev_info(&adapter->pdev->dev, "Register Dump\n");
 391         pr_info(" Register Name   Value\n");
 392         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 393              reginfo->name; reginfo++) {
 394                 igb_regdump(hw, reginfo);
 395         }
 396
 397         /* Print TX Ring Summary */
 398         if (!netdev || !netif_running(netdev))
 399                 goto exit;
 400
 401         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 402         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 403         for (n = 0; n < adapter->num_tx_queues; n++) {
 404                 struct igb_tx_buffer *buffer_info;
 405                 tx_ring = adapter->tx_ring[n];
 406                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 407                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 408                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 409                         (u64)dma_unmap_addr(buffer_info, dma),
 410                         dma_unmap_len(buffer_info, len),
 411                         buffer_info->next_to_watch,
 412                         (u64)buffer_info->time_stamp);
 413         }
 414
 415         /* Print TX Rings */
 416         if (!netif_msg_tx_done(adapter))
 417                 goto rx_ring_summary;
 418
 419         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 420
 421         /* Transmit Descriptor Formats
 422          *
 423          * Advanced Transmit Descriptor
 424          *   +--------------------------------------------------------------+
 425          * 0 |         Buffer Address [63:0]                                |
 426          *   +--------------------------------------------------------------+
 427          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 428          *   +--------------------------------------------------------------+
 429          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 430          */
 431
 432         for (n = 0; n < adapter->num_tx_queues; n++) {
 433                 tx_ring = adapter->tx_ring[n];
 434                 pr_info("------------------------------------\n");
 435                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 436                 pr_info("------------------------------------\n");
 437                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 438
 439                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 440                         const char *next_desc;
 441                         struct igb_tx_buffer *buffer_info;
 442                         tx_desc = IGB_TX_DESC(tx_ring, i);
 443                         buffer_info = &tx_ring->tx_buffer_info[i];
 444                         u0 = (struct my_u0 *)tx_desc;
 445                         if (i == tx_ring->next_to_use &&
 446                             i == tx_ring->next_to_clean)
 447                                 next_desc = " NTC/U";
 448                         else if (i == tx_ring->next_to_use)
 449                                 next_desc = " NTU";
 450                         else if (i == tx_ring->next_to_clean)
 451                                 next_desc = " NTC";
 452                         else
 453                                 next_desc = "";
 454
 455                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 456                                 i, le64_to_cpu(u0->a),
 457                                 le64_to_cpu(u0->b),
 458                                 (u64)dma_unmap_addr(buffer_info, dma),
 459                                 dma_unmap_len(buffer_info, len),
 460                                 buffer_info->next_to_watch,
 461                                 (u64)buffer_info->time_stamp,
 462                                 buffer_info->skb, next_desc);
 463
 464                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 465                                 print_hex_dump(KERN_INFO, "",
 466                                         DUMP_PREFIX_ADDRESS,
 467                                         16, 1, buffer_info->skb->data,
 468                                         dma_unmap_len(buffer_info, len),
 469                                         true);
 470                 }
 471         }
 472
 473         /* Print RX Rings Summary */
 474 rx_ring_summary:
 475         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 476         pr_info("Queue [NTU] [NTC]\n");
 477         for (n = 0; n < adapter->num_rx_queues; n++) {
 478                 rx_ring = adapter->rx_ring[n];
 479                 pr_info(" %5d %5X %5X\n",
 480                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 481         }
 482
 483         /* Print RX Rings */
 484         if (!netif_msg_rx_status(adapter))
 485                 goto exit;
 486
 487         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 488
 489         /* Advanced Receive Descriptor (Read) Format
 490          *    63                                           1        0
 491          *    +-----------------------------------------------------+
 492          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 493          *    +----------------------------------------------+------+
 494          *  8 |       Header Buffer Address [63:1]           |  DD  |
 495          *    +-----------------------------------------------------+
 496          *
 497          *
 498          * Advanced Receive Descriptor (Write-Back) Format
 499          *
 500          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 501          *   +------------------------------------------------------+
 502          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 503          *   | Checksum   Ident  |   |           |    | Type | Type |
 504          *   +------------------------------------------------------+
 505          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 506          *   +------------------------------------------------------+
 507          *   63       48 47    32 31            20 19               0
 508          */
 509
 510         for (n = 0; n < adapter->num_rx_queues; n++) {
 511                 rx_ring = adapter->rx_ring[n];
 512                 pr_info("------------------------------------\n");
 513                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 514                 pr_info("------------------------------------\n");
 515                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 516                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 517
 518                 for (i = 0; i < rx_ring->count; i++) {
 519                         const char *next_desc;
 520                         struct igb_rx_buffer *buffer_info;
 521                         buffer_info = &rx_ring->rx_buffer_info[i];
 522                         rx_desc = IGB_RX_DESC(rx_ring, i);
 523                         u0 = (struct my_u0 *)rx_desc;
 524                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 525
 526                         if (i == rx_ring->next_to_use)
 527                                 next_desc = " NTU";
 528                         else if (i == rx_ring->next_to_clean)
 529                                 next_desc = " NTC";
 530                         else
 531                                 next_desc = "";
 532
 533                         if (staterr & E1000_RXD_STAT_DD) {
 534                                 /* Descriptor Done */
 535                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 536                                         "RWB", i,
 537                                         le64_to_cpu(u0->a),
 538                                         le64_to_cpu(u0->b),
 539                                         next_desc);
 540                         } else {
 541                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 542                                         "R  ", i,
 543                                         le64_to_cpu(u0->a),
 544                                         le64_to_cpu(u0->b),
 545                                         (u64)buffer_info->dma,
 546                                         next_desc);
 547
 548                                 if (netif_msg_pktdata(adapter) &&
 549                                     buffer_info->dma && buffer_info->page) {
 550                                         print_hex_dump(KERN_INFO, "",
 551                                           DUMP_PREFIX_ADDRESS,
 552                                           16, 1,
 553                                           page_address(buffer_info->page) +
 554                                                       buffer_info->page_offset,
 555                                           IGB_RX_BUFSZ, true);
 556                                 }
 557                         }
 558                 }
 559         }
 560
 561 exit:
 562         return;
 563 }
 564
 565 /**
 566  *  igb_get_i2c_data - Reads the I2C SDA data bit
 567  *  @hw: pointer to hardware structure
 568  *  @i2cctl: Current value of I2CCTL register
 569  *
 570  *  Returns the I2C data bit value
 571  **/
 572 static int igb_get_i2c_data(void *data)
 573 {
 574         struct igb_adapter *adapter = (struct igb_adapter *)data;
 575         struct e1000_hw *hw = &adapter->hw;
 576         s32 i2cctl = rd32(E1000_I2CPARAMS);
 577
 578         return !!(i2cctl & E1000_I2C_DATA_IN);
 579 }
 580
 581 /**
 582  *  igb_set_i2c_data - Sets the I2C data bit
 583  *  @data: pointer to hardware structure
 584  *  @state: I2C data value (0 or 1) to set
 585  *
 586  *  Sets the I2C data bit
 587  **/
 588 static void igb_set_i2c_data(void *data, int state)
 589 {
 590         struct igb_adapter *adapter = (struct igb_adapter *)data;
 591         struct e1000_hw *hw = &adapter->hw;
 592         s32 i2cctl = rd32(E1000_I2CPARAMS);
 593
 594         if (state)
 595                 i2cctl |= E1000_I2C_DATA_OUT;
 596         else
 597                 i2cctl &= ~E1000_I2C_DATA_OUT;
 598
 599         i2cctl &= ~E1000_I2C_DATA_OE_N;
 600         i2cctl |= E1000_I2C_CLK_OE_N;
 601         wr32(E1000_I2CPARAMS, i2cctl);
 602         wrfl();
 603
 604 }
 605
 606 /**
 607  *  igb_set_i2c_clk - Sets the I2C SCL clock
 608  *  @data: pointer to hardware structure
 609  *  @state: state to set clock
 610  *
 611  *  Sets the I2C clock line to state
 612  **/
 613 static void igb_set_i2c_clk(void *data, int state)
 614 {
 615         struct igb_adapter *adapter = (struct igb_adapter *)data;
 616         struct e1000_hw *hw = &adapter->hw;
 617         s32 i2cctl = rd32(E1000_I2CPARAMS);
 618
 619         if (state) {
 620                 i2cctl |= E1000_I2C_CLK_OUT;
 621                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 622         } else {
 623                 i2cctl &= ~E1000_I2C_CLK_OUT;
 624                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 625         }
 626         wr32(E1000_I2CPARAMS, i2cctl);
 627         wrfl();
 628 }
 629
 630 /**
 631  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 632  *  @data: pointer to hardware structure
 633  *
 634  *  Gets the I2C clock state
 635  **/
 636 static int igb_get_i2c_clk(void *data)
 637 {
 638         struct igb_adapter *adapter = (struct igb_adapter *)data;
 639         struct e1000_hw *hw = &adapter->hw;
 640         s32 i2cctl = rd32(E1000_I2CPARAMS);
 641
 642         return !!(i2cctl & E1000_I2C_CLK_IN);
 643 }
 644
 645 static const struct i2c_algo_bit_data igb_i2c_algo = {
 646         .setsda         = igb_set_i2c_data,
 647         .setscl         = igb_set_i2c_clk,
 648         .getsda         = igb_get_i2c_data,
 649         .getscl         = igb_get_i2c_clk,
 650         .udelay         = 5,
 651         .timeout        = 20,
 652 };
 653
 654 /**
 655  *  igb_get_hw_dev - return device
 656  *  @hw: pointer to hardware structure
 657  *
 658  *  used by hardware layer to print debugging information
 659  **/
 660 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 661 {
 662         struct igb_adapter *adapter = hw->back;
 663         return adapter->netdev;
 664 }
 665
 666 /**
 667  *  igb_init_module - Driver Registration Routine
 668  *
 669  *  igb_init_module is the first routine called when the driver is
 670  *  loaded. All it does is register with the PCI subsystem.
 671  **/
 672 static int __init igb_init_module(void)
 673 {
 674         int ret;
 675
 676         pr_info("%s - version %s\n",
 677                igb_driver_string, igb_driver_version);
 678         pr_info("%s\n", igb_copyright);
 679
 680 #ifdef CONFIG_IGB_DCA
 681         dca_register_notify(&dca_notifier);
 682 #endif
 683         ret = pci_register_driver(&igb_driver);
 684         return ret;
 685 }
 686
 687 module_init(igb_init_module);
 688
 689 /**
 690  *  igb_exit_module - Driver Exit Cleanup Routine
 691  *
 692  *  igb_exit_module is called just before the driver is removed
 693  *  from memory.
 694  **/
 695 static void __exit igb_exit_module(void)
 696 {
 697 #ifdef CONFIG_IGB_DCA
 698         dca_unregister_notify(&dca_notifier);
 699 #endif
 700         pci_unregister_driver(&igb_driver);
 701 }
 702
 703 module_exit(igb_exit_module);
 704
 705 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 706 /**
 707  *  igb_cache_ring_register - Descriptor ring to register mapping
 708  *  @adapter: board private structure to initialize
 709  *
 710  *  Once we know the feature-set enabled for the device, we'll cache
 711  *  the register offset the descriptor ring is assigned to.
 712  **/
 713 static void igb_cache_ring_register(struct igb_adapter *adapter)
 714 {
 715         int i = 0, j = 0;
 716         u32 rbase_offset = adapter->vfs_allocated_count;
 717
 718         switch (adapter->hw.mac.type) {
 719         case e1000_82576:
 720                 /* The queues are allocated for virtualization such that VF 0
 721                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 722                  * In order to avoid collision we start at the first free queue
 723                  * and continue consuming queues in the same sequence
 724                  */
 725                 if (adapter->vfs_allocated_count) {
 726                         for (; i < adapter->rss_queues; i++)
 727                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 728                                                                Q_IDX_82576(i);
 729                 }
 730                 /* Fall through */
 731         case e1000_82575:
 732         case e1000_82580:
 733         case e1000_i350:
 734         case e1000_i354:
 735         case e1000_i210:
 736         case e1000_i211:
 737                 /* Fall through */
 738         default:
 739                 for (; i < adapter->num_rx_queues; i++)
 740                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 741                 for (; j < adapter->num_tx_queues; j++)
 742                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 743                 break;
 744         }
 745 }
 746
 747 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 748 {
 749         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 750         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 751         u32 value = 0;
 752
 753         if (E1000_REMOVED(hw_addr))
 754                 return ~value;
 755
 756         value = readl(&hw_addr[reg]);
 757
 758         /* reads should not return all F's */
 759         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 760                 struct net_device *netdev = igb->netdev;
 761                 hw->hw_addr = NULL;
 762                 netif_device_detach(netdev);
 763                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 764         }
 765
 766         return value;
 767 }
 768
 769 /**
 770  *  igb_write_ivar - configure ivar for given MSI-X vector
 771  *  @hw: pointer to the HW structure
 772  *  @msix_vector: vector number we are allocating to a given ring
 773  *  @index: row index of IVAR register to write within IVAR table
 774  *  @offset: column offset of in IVAR, should be multiple of 8
 775  *
 776  *  This function is intended to handle the writing of the IVAR register
 777  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 778  *  each containing an cause allocation for an Rx and Tx ring, and a
 779  *  variable number of rows depending on the number of queues supported.
 780  **/
 781 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 782                            int index, int offset)
 783 {
 784         u32 ivar = array_rd32(E1000_IVAR0, index);
 785
 786         /* clear any bits that are currently set */
 787         ivar &= ~((u32)0xFF << offset);
 788
 789         /* write vector and valid bit */
 790         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 791
 792         array_wr32(E1000_IVAR0, index, ivar);
 793 }
 794
 795 #define IGB_N0_QUEUE -1
 796 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 797 {
 798         struct igb_adapter *adapter = q_vector->adapter;
 799         struct e1000_hw *hw = &adapter->hw;
 800         int rx_queue = IGB_N0_QUEUE;
 801         int tx_queue = IGB_N0_QUEUE;
 802         u32 msixbm = 0;
 803
 804         if (q_vector->rx.ring)
 805                 rx_queue = q_vector->rx.ring->reg_idx;
 806         if (q_vector->tx.ring)
 807                 tx_queue = q_vector->tx.ring->reg_idx;
 808
 809         switch (hw->mac.type) {
 810         case e1000_82575:
 811                 /* The 82575 assigns vectors using a bitmask, which matches the
 812                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 813                  * or more queues to a vector, we write the appropriate bits
 814                  * into the MSIXBM register for that vector.
 815                  */
 816                 if (rx_queue > IGB_N0_QUEUE)
 817                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 818                 if (tx_queue > IGB_N0_QUEUE)
 819                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 820                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 821                         msixbm |= E1000_EIMS_OTHER;
 822                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 823                 q_vector->eims_value = msixbm;
 824                 break;
 825         case e1000_82576:
 826                 /* 82576 uses a table that essentially consists of 2 columns
 827                  * with 8 rows.  The ordering is column-major so we use the
 828                  * lower 3 bits as the row index, and the 4th bit as the
 829                  * column offset.
 830                  */
 831                 if (rx_queue > IGB_N0_QUEUE)
 832                         igb_write_ivar(hw, msix_vector,
 833                                        rx_queue & 0x7,
 834                                        (rx_queue & 0x8) << 1);
 835                 if (tx_queue > IGB_N0_QUEUE)
 836                         igb_write_ivar(hw, msix_vector,
 837                                        tx_queue & 0x7,
 838                                        ((tx_queue & 0x8) << 1) + 8);
 839                 q_vector->eims_value = BIT(msix_vector);
 840                 break;
 841         case e1000_82580:
 842         case e1000_i350:
 843         case e1000_i354:
 844         case e1000_i210:
 845         case e1000_i211:
 846                 /* On 82580 and newer adapters the scheme is similar to 82576
 847                  * however instead of ordering column-major we have things
 848                  * ordered row-major.  So we traverse the table by using
 849                  * bit 0 as the column offset, and the remaining bits as the
 850                  * row index.
 851                  */
 852                 if (rx_queue > IGB_N0_QUEUE)
 853                         igb_write_ivar(hw, msix_vector,
 854                                        rx_queue >> 1,
 855                                        (rx_queue & 0x1) << 4);
 856                 if (tx_queue > IGB_N0_QUEUE)
 857                         igb_write_ivar(hw, msix_vector,
 858                                        tx_queue >> 1,
 859                                        ((tx_queue & 0x1) << 4) + 8);
 860                 q_vector->eims_value = BIT(msix_vector);
 861                 break;
 862         default:
 863                 BUG();
 864                 break;
 865         }
 866
 867         /* add q_vector eims value to global eims_enable_mask */
 868         adapter->eims_enable_mask |= q_vector->eims_value;
 869
 870         /* configure q_vector to set itr on first interrupt */
 871         q_vector->set_itr = 1;
 872 }
 873
 874 /**
 875  *  igb_configure_msix - Configure MSI-X hardware
 876  *  @adapter: board private structure to initialize
 877  *
 878  *  igb_configure_msix sets up the hardware to properly
 879  *  generate MSI-X interrupts.
 880  **/
 881 static void igb_configure_msix(struct igb_adapter *adapter)
 882 {
 883         u32 tmp;
 884         int i, vector = 0;
 885         struct e1000_hw *hw = &adapter->hw;
 886
 887         adapter->eims_enable_mask = 0;
 888
 889         /* set vector for other causes, i.e. link changes */
 890         switch (hw->mac.type) {
 891         case e1000_82575:
 892                 tmp = rd32(E1000_CTRL_EXT);
 893                 /* enable MSI-X PBA support*/
 894                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 895
 896                 /* Auto-Mask interrupts upon ICR read. */
 897                 tmp |= E1000_CTRL_EXT_EIAME;
 898                 tmp |= E1000_CTRL_EXT_IRCA;
 899
 900                 wr32(E1000_CTRL_EXT, tmp);
 901
 902                 /* enable msix_other interrupt */
 903                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 904                 adapter->eims_other = E1000_EIMS_OTHER;
 905
 906                 break;
 907
 908         case e1000_82576:
 909         case e1000_82580:
 910         case e1000_i350:
 911         case e1000_i354:
 912         case e1000_i210:
 913         case e1000_i211:
 914                 /* Turn on MSI-X capability first, or our settings
 915                  * won't stick.  And it will take days to debug.
 916                  */
 917                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 918                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 919                      E1000_GPIE_NSICR);
 920
 921                 /* enable msix_other interrupt */
 922                 adapter->eims_other = BIT(vector);
 923                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 924
 925                 wr32(E1000_IVAR_MISC, tmp);
 926                 break;
 927         default:
 928                 /* do nothing, since nothing else supports MSI-X */
 929                 break;
 930         } /* switch (hw->mac.type) */
 931
 932         adapter->eims_enable_mask |= adapter->eims_other;
 933
 934         for (i = 0; i < adapter->num_q_vectors; i++)
 935                 igb_assign_vector(adapter->q_vector[i], vector++);
 936
 937         wrfl();
 938 }
 939
 940 /**
 941  *  igb_request_msix - Initialize MSI-X interrupts
 942  *  @adapter: board private structure to initialize
 943  *
 944  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 945  *  kernel.
 946  **/
 947 static int igb_request_msix(struct igb_adapter *adapter)
 948 {
 949         struct net_device *netdev = adapter->netdev;
 950         int i, err = 0, vector = 0, free_vector = 0;
 951
 952         err = request_irq(adapter->msix_entries[vector].vector,
 953                           igb_msix_other, 0, netdev->name, adapter);
 954         if (err)
 955                 goto err_out;
 956
 957         for (i = 0; i < adapter->num_q_vectors; i++) {
 958                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 959
 960                 vector++;
 961
 962                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 963
 964                 if (q_vector->rx.ring && q_vector->tx.ring)
 965                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 966                                 q_vector->rx.ring->queue_index);
 967                 else if (q_vector->tx.ring)
 968                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 969                                 q_vector->tx.ring->queue_index);
 970                 else if (q_vector->rx.ring)
 971                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 972                                 q_vector->rx.ring->queue_index);
 973                 else
 974                         sprintf(q_vector->name, "%s-unused", netdev->name);
 975
 976                 err = request_irq(adapter->msix_entries[vector].vector,
 977                                   igb_msix_ring, 0, q_vector->name,
 978                                   q_vector);
 979                 if (err)
 980                         goto err_free;
 981         }
 982
 983         igb_configure_msix(adapter);
 984         return 0;
 985
 986 err_free:
 987         /* free already assigned IRQs */
 988         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 989
 990         vector--;
 991         for (i = 0; i < vector; i++) {
 992                 free_irq(adapter->msix_entries[free_vector++].vector,
 993                          adapter->q_vector[i]);
 994         }
 995 err_out:
 996         return err;
 997 }
 998
 999 /**
1000  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1001  *  @adapter: board private structure to initialize
1002  *  @v_idx: Index of vector to be freed
1003  *
1004  *  This function frees the memory allocated to the q_vector.
1005  **/
1006 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1007 {
1008         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1009
1010         adapter->q_vector[v_idx] = NULL;
1011
1012         /* igb_get_stats64() might access the rings on this vector,
1013          * we must wait a grace period before freeing it.
1014          */
1015         if (q_vector)
1016                 kfree_rcu(q_vector, rcu);
1017 }
1018
1019 /**
1020  *  igb_reset_q_vector - Reset config for interrupt vector
1021  *  @adapter: board private structure to initialize
1022  *  @v_idx: Index of vector to be reset
1023  *
1024  *  If NAPI is enabled it will delete any references to the
1025  *  NAPI struct. This is preparation for igb_free_q_vector.
1026  **/
1027 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1028 {
1029         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1030
1031         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1032          * allocated. So, q_vector is NULL so we should stop here.
1033          */
1034         if (!q_vector)
1035                 return;
1036
1037         if (q_vector->tx.ring)
1038                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1039
1040         if (q_vector->rx.ring)
1041                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1042
1043         netif_napi_del(&q_vector->napi);
1044
1045 }
1046
1047 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1048 {
1049         int v_idx = adapter->num_q_vectors;
1050
1051         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1052                 pci_disable_msix(adapter->pdev);
1053         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1054                 pci_disable_msi(adapter->pdev);
1055
1056         while (v_idx--)
1057                 igb_reset_q_vector(adapter, v_idx);
1058 }
1059
1060 /**
1061  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1062  *  @adapter: board private structure to initialize
1063  *
1064  *  This function frees the memory allocated to the q_vectors.  In addition if
1065  *  NAPI is enabled it will delete any references to the NAPI struct prior
1066  *  to freeing the q_vector.
1067  **/
1068 static void igb_free_q_vectors(struct igb_adapter *adapter)
1069 {
1070         int v_idx = adapter->num_q_vectors;
1071
1072         adapter->num_tx_queues = 0;
1073         adapter->num_rx_queues = 0;
1074         adapter->num_q_vectors = 0;
1075
1076         while (v_idx--) {
1077                 igb_reset_q_vector(adapter, v_idx);
1078                 igb_free_q_vector(adapter, v_idx);
1079         }
1080 }
1081
1082 /**
1083  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1084  *  @adapter: board private structure to initialize
1085  *
1086  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1087  *  MSI-X interrupts allocated.
1088  */
1089 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1090 {
1091         igb_free_q_vectors(adapter);
1092         igb_reset_interrupt_capability(adapter);
1093 }
1094
1095 /**
1096  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1097  *  @adapter: board private structure to initialize
1098  *  @msix: boolean value of MSIX capability
1099  *
1100  *  Attempt to configure interrupts using the best available
1101  *  capabilities of the hardware and kernel.
1102  **/
1103 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1104 {
1105         int err;
1106         int numvecs, i;
1107
1108         if (!msix)
1109                 goto msi_only;
1110         adapter->flags |= IGB_FLAG_HAS_MSIX;
1111
1112         /* Number of supported queues. */
1113         adapter->num_rx_queues = adapter->rss_queues;
1114         if (adapter->vfs_allocated_count)
1115                 adapter->num_tx_queues = 1;
1116         else
1117                 adapter->num_tx_queues = adapter->rss_queues;
1118
1119         /* start with one vector for every Rx queue */
1120         numvecs = adapter->num_rx_queues;
1121
1122         /* if Tx handler is separate add 1 for every Tx queue */
1123         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1124                 numvecs += adapter->num_tx_queues;
1125
1126         /* store the number of vectors reserved for queues */
1127         adapter->num_q_vectors = numvecs;
1128
1129         /* add 1 vector for link status interrupts */
1130         numvecs++;
1131         for (i = 0; i < numvecs; i++)
1132                 adapter->msix_entries[i].entry = i;
1133
1134         err = pci_enable_msix_range(adapter->pdev,
1135                                     adapter->msix_entries,
1136                                     numvecs,
1137                                     numvecs);
1138         if (err > 0)
1139                 return;
1140
1141         igb_reset_interrupt_capability(adapter);
1142
1143         /* If we can't do MSI-X, try MSI */
1144 msi_only:
1145         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1146 #ifdef CONFIG_PCI_IOV
1147         /* disable SR-IOV for non MSI-X configurations */
1148         if (adapter->vf_data) {
1149                 struct e1000_hw *hw = &adapter->hw;
1150                 /* disable iov and allow time for transactions to clear */
1151                 pci_disable_sriov(adapter->pdev);
1152                 msleep(500);
1153
1154                 kfree(adapter->vf_data);
1155                 adapter->vf_data = NULL;
1156                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1157                 wrfl();
1158                 msleep(100);
1159                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1160         }
1161 #endif
1162         adapter->vfs_allocated_count = 0;
1163         adapter->rss_queues = 1;
1164         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1165         adapter->num_rx_queues = 1;
1166         adapter->num_tx_queues = 1;
1167         adapter->num_q_vectors = 1;
1168         if (!pci_enable_msi(adapter->pdev))
1169                 adapter->flags |= IGB_FLAG_HAS_MSI;
1170 }
1171
1172 static void igb_add_ring(struct igb_ring *ring,
1173                          struct igb_ring_container *head)
1174 {
1175         head->ring = ring;
1176         head->count++;
1177 }
1178
1179 /**
1180  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1181  *  @adapter: board private structure to initialize
1182  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1183  *  @v_idx: index of vector in adapter struct
1184  *  @txr_count: total number of Tx rings to allocate
1185  *  @txr_idx: index of first Tx ring to allocate
1186  *  @rxr_count: total number of Rx rings to allocate
1187  *  @rxr_idx: index of first Rx ring to allocate
1188  *
1189  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1190  **/
1191 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1192                               int v_count, int v_idx,
1193                               int txr_count, int txr_idx,
1194                               int rxr_count, int rxr_idx)
1195 {
1196         struct igb_q_vector *q_vector;
1197         struct igb_ring *ring;
1198         int ring_count, size;
1199
1200         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1201         if (txr_count > 1 || rxr_count > 1)
1202                 return -ENOMEM;
1203
1204         ring_count = txr_count + rxr_count;
1205         size = sizeof(struct igb_q_vector) +
1206                (sizeof(struct igb_ring) * ring_count);
1207
1208         /* allocate q_vector and rings */
1209         q_vector = adapter->q_vector[v_idx];
1210         if (!q_vector) {
1211                 q_vector = kzalloc(size, GFP_KERNEL);
1212         } else if (size > ksize(q_vector)) {
1213                 kfree_rcu(q_vector, rcu);
1214                 q_vector = kzalloc(size, GFP_KERNEL);
1215         } else {
1216                 memset(q_vector, 0, size);
1217         }
1218         if (!q_vector)
1219                 return -ENOMEM;
1220
1221         /* initialize NAPI */
1222         netif_napi_add(adapter->netdev, &q_vector->napi,
1223                        igb_poll, 64);
1224
1225         /* tie q_vector and adapter together */
1226         adapter->q_vector[v_idx] = q_vector;
1227         q_vector->adapter = adapter;
1228
1229         /* initialize work limits */
1230         q_vector->tx.work_limit = adapter->tx_work_limit;
1231
1232         /* initialize ITR configuration */
1233         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1234         q_vector->itr_val = IGB_START_ITR;
1235
1236         /* initialize pointer to rings */
1237         ring = q_vector->ring;
1238
1239         /* intialize ITR */
1240         if (rxr_count) {
1241                 /* rx or rx/tx vector */
1242                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1243                         q_vector->itr_val = adapter->rx_itr_setting;
1244         } else {
1245                 /* tx only vector */
1246                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1247                         q_vector->itr_val = adapter->tx_itr_setting;
1248         }
1249
1250         if (txr_count) {
1251                 /* assign generic ring traits */
1252                 ring->dev = &adapter->pdev->dev;
1253                 ring->netdev = adapter->netdev;
1254
1255                 /* configure backlink on ring */
1256                 ring->q_vector = q_vector;
1257
1258                 /* update q_vector Tx values */
1259                 igb_add_ring(ring, &q_vector->tx);
1260
1261                 /* For 82575, context index must be unique per ring. */
1262                 if (adapter->hw.mac.type == e1000_82575)
1263                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1264
1265                 /* apply Tx specific ring traits */
1266                 ring->count = adapter->tx_ring_count;
1267                 ring->queue_index = txr_idx;
1268
1269                 u64_stats_init(&ring->tx_syncp);
1270                 u64_stats_init(&ring->tx_syncp2);
1271
1272                 /* assign ring to adapter */
1273                 adapter->tx_ring[txr_idx] = ring;
1274
1275                 /* push pointer to next ring */
1276                 ring++;
1277         }
1278
1279         if (rxr_count) {
1280                 /* assign generic ring traits */
1281                 ring->dev = &adapter->pdev->dev;
1282                 ring->netdev = adapter->netdev;
1283
1284                 /* configure backlink on ring */
1285                 ring->q_vector = q_vector;
1286
1287                 /* update q_vector Rx values */
1288                 igb_add_ring(ring, &q_vector->rx);
1289
1290                 /* set flag indicating ring supports SCTP checksum offload */
1291                 if (adapter->hw.mac.type >= e1000_82576)
1292                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1293
1294                 /* On i350, i354, i210, and i211, loopback VLAN packets
1295                  * have the tag byte-swapped.
1296                  */
1297                 if (adapter->hw.mac.type >= e1000_i350)
1298                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1299
1300                 /* apply Rx specific ring traits */
1301                 ring->count = adapter->rx_ring_count;
1302                 ring->queue_index = rxr_idx;
1303
1304                 u64_stats_init(&ring->rx_syncp);
1305
1306                 /* assign ring to adapter */
1307                 adapter->rx_ring[rxr_idx] = ring;
1308         }
1309
1310         return 0;
1311 }
1312
1313
1314 /**
1315  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1316  *  @adapter: board private structure to initialize
1317  *
1318  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1319  *  return -ENOMEM.
1320  **/
1321 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1322 {
1323         int q_vectors = adapter->num_q_vectors;
1324         int rxr_remaining = adapter->num_rx_queues;
1325         int txr_remaining = adapter->num_tx_queues;
1326         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1327         int err;
1328
1329         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1330                 for (; rxr_remaining; v_idx++) {
1331                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1332                                                  0, 0, 1, rxr_idx);
1333
1334                         if (err)
1335                                 goto err_out;
1336
1337                         /* update counts and index */
1338                         rxr_remaining--;
1339                         rxr_idx++;
1340                 }
1341         }
1342
1343         for (; v_idx < q_vectors; v_idx++) {
1344                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1345                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1346
1347                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1348                                          tqpv, txr_idx, rqpv, rxr_idx);
1349
1350                 if (err)
1351                         goto err_out;
1352
1353                 /* update counts and index */
1354                 rxr_remaining -= rqpv;
1355                 txr_remaining -= tqpv;
1356                 rxr_idx++;
1357                 txr_idx++;
1358         }
1359
1360         return 0;
1361
1362 err_out:
1363         adapter->num_tx_queues = 0;
1364         adapter->num_rx_queues = 0;
1365         adapter->num_q_vectors = 0;
1366
1367         while (v_idx--)
1368                 igb_free_q_vector(adapter, v_idx);
1369
1370         return -ENOMEM;
1371 }
1372
1373 /**
1374  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1375  *  @adapter: board private structure to initialize
1376  *  @msix: boolean value of MSIX capability
1377  *
1378  *  This function initializes the interrupts and allocates all of the queues.
1379  **/
1380 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1381 {
1382         struct pci_dev *pdev = adapter->pdev;
1383         int err;
1384
1385         igb_set_interrupt_capability(adapter, msix);
1386
1387         err = igb_alloc_q_vectors(adapter);
1388         if (err) {
1389                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1390                 goto err_alloc_q_vectors;
1391         }
1392
1393         igb_cache_ring_register(adapter);
1394
1395         return 0;
1396
1397 err_alloc_q_vectors:
1398         igb_reset_interrupt_capability(adapter);
1399         return err;
1400 }
1401
1402 /**
1403  *  igb_request_irq - initialize interrupts
1404  *  @adapter: board private structure to initialize
1405  *
1406  *  Attempts to configure interrupts using the best available
1407  *  capabilities of the hardware and kernel.
1408  **/
1409 static int igb_request_irq(struct igb_adapter *adapter)
1410 {
1411         struct net_device *netdev = adapter->netdev;
1412         struct pci_dev *pdev = adapter->pdev;
1413         int err = 0;
1414
1415         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1416                 err = igb_request_msix(adapter);
1417                 if (!err)
1418                         goto request_done;
1419                 /* fall back to MSI */
1420                 igb_free_all_tx_resources(adapter);
1421                 igb_free_all_rx_resources(adapter);
1422
1423                 igb_clear_interrupt_scheme(adapter);
1424                 err = igb_init_interrupt_scheme(adapter, false);
1425                 if (err)
1426                         goto request_done;
1427
1428                 igb_setup_all_tx_resources(adapter);
1429                 igb_setup_all_rx_resources(adapter);
1430                 igb_configure(adapter);
1431         }
1432
1433         igb_assign_vector(adapter->q_vector[0], 0);
1434
1435         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1436                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1437                                   netdev->name, adapter);
1438                 if (!err)
1439                         goto request_done;
1440
1441                 /* fall back to legacy interrupts */
1442                 igb_reset_interrupt_capability(adapter);
1443                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1444         }
1445
1446         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1447                           netdev->name, adapter);
1448
1449         if (err)
1450                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1451                         err);
1452
1453 request_done:
1454         return err;
1455 }
1456
1457 static void igb_free_irq(struct igb_adapter *adapter)
1458 {
1459         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1460                 int vector = 0, i;
1461
1462                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1463
1464                 for (i = 0; i < adapter->num_q_vectors; i++)
1465                         free_irq(adapter->msix_entries[vector++].vector,
1466                                  adapter->q_vector[i]);
1467         } else {
1468                 free_irq(adapter->pdev->irq, adapter);
1469         }
1470 }
1471
1472 /**
1473  *  igb_irq_disable - Mask off interrupt generation on the NIC
1474  *  @adapter: board private structure
1475  **/
1476 static void igb_irq_disable(struct igb_adapter *adapter)
1477 {
1478         struct e1000_hw *hw = &adapter->hw;
1479
1480         /* we need to be careful when disabling interrupts.  The VFs are also
1481          * mapped into these registers and so clearing the bits can cause
1482          * issues on the VF drivers so we only need to clear what we set
1483          */
1484         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1485                 u32 regval = rd32(E1000_EIAM);
1486
1487                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1488                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1489                 regval = rd32(E1000_EIAC);
1490                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1491         }
1492
1493         wr32(E1000_IAM, 0);
1494         wr32(E1000_IMC, ~0);
1495         wrfl();
1496         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1497                 int i;
1498
1499                 for (i = 0; i < adapter->num_q_vectors; i++)
1500                         synchronize_irq(adapter->msix_entries[i].vector);
1501         } else {
1502                 synchronize_irq(adapter->pdev->irq);
1503         }
1504 }
1505
1506 /**
1507  *  igb_irq_enable - Enable default interrupt generation settings
1508  *  @adapter: board private structure
1509  **/
1510 static void igb_irq_enable(struct igb_adapter *adapter)
1511 {
1512         struct e1000_hw *hw = &adapter->hw;
1513
1514         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1515                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1516                 u32 regval = rd32(E1000_EIAC);
1517
1518                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1519                 regval = rd32(E1000_EIAM);
1520                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1521                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1522                 if (adapter->vfs_allocated_count) {
1523                         wr32(E1000_MBVFIMR, 0xFF);
1524                         ims |= E1000_IMS_VMMB;
1525                 }
1526                 wr32(E1000_IMS, ims);
1527         } else {
1528                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1529                                 E1000_IMS_DRSTA);
1530                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1531                                 E1000_IMS_DRSTA);
1532         }
1533 }
1534
1535 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1536 {
1537         struct e1000_hw *hw = &adapter->hw;
1538         u16 pf_id = adapter->vfs_allocated_count;
1539         u16 vid = adapter->hw.mng_cookie.vlan_id;
1540         u16 old_vid = adapter->mng_vlan_id;
1541
1542         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1543                 /* add VID to filter table */
1544                 igb_vfta_set(hw, vid, pf_id, true, true);
1545                 adapter->mng_vlan_id = vid;
1546         } else {
1547                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1548         }
1549
1550         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1551             (vid != old_vid) &&
1552             !test_bit(old_vid, adapter->active_vlans)) {
1553                 /* remove VID from filter table */
1554                 igb_vfta_set(hw, vid, pf_id, false, true);
1555         }
1556 }
1557
1558 /**
1559  *  igb_release_hw_control - release control of the h/w to f/w
1560  *  @adapter: address of board private structure
1561  *
1562  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1563  *  For ASF and Pass Through versions of f/w this means that the
1564  *  driver is no longer loaded.
1565  **/
1566 static void igb_release_hw_control(struct igb_adapter *adapter)
1567 {
1568         struct e1000_hw *hw = &adapter->hw;
1569         u32 ctrl_ext;
1570
1571         /* Let firmware take over control of h/w */
1572         ctrl_ext = rd32(E1000_CTRL_EXT);
1573         wr32(E1000_CTRL_EXT,
1574                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1575 }
1576
1577 /**
1578  *  igb_get_hw_control - get control of the h/w from f/w
1579  *  @adapter: address of board private structure
1580  *
1581  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1582  *  For ASF and Pass Through versions of f/w this means that
1583  *  the driver is loaded.
1584  **/
1585 static void igb_get_hw_control(struct igb_adapter *adapter)
1586 {
1587         struct e1000_hw *hw = &adapter->hw;
1588         u32 ctrl_ext;
1589
1590         /* Let firmware know the driver has taken over */
1591         ctrl_ext = rd32(E1000_CTRL_EXT);
1592         wr32(E1000_CTRL_EXT,
1593                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1594 }
1595
1596 /**
1597  *  igb_configure - configure the hardware for RX and TX
1598  *  @adapter: private board structure
1599  **/
1600 static void igb_configure(struct igb_adapter *adapter)
1601 {
1602         struct net_device *netdev = adapter->netdev;
1603         int i;
1604
1605         igb_get_hw_control(adapter);
1606         igb_set_rx_mode(netdev);
1607
1608         igb_restore_vlan(adapter);
1609
1610         igb_setup_tctl(adapter);
1611         igb_setup_mrqc(adapter);
1612         igb_setup_rctl(adapter);
1613
1614         igb_configure_tx(adapter);
1615         igb_configure_rx(adapter);
1616
1617         igb_rx_fifo_flush_82575(&adapter->hw);
1618
1619         /* call igb_desc_unused which always leaves
1620          * at least 1 descriptor unused to make sure
1621          * next_to_use != next_to_clean
1622          */
1623         for (i = 0; i < adapter->num_rx_queues; i++) {
1624                 struct igb_ring *ring = adapter->rx_ring[i];
1625                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1626         }
1627 }
1628
1629 /**
1630  *  igb_power_up_link - Power up the phy/serdes link
1631  *  @adapter: address of board private structure
1632  **/
1633 void igb_power_up_link(struct igb_adapter *adapter)
1634 {
1635         igb_reset_phy(&adapter->hw);
1636
1637         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1638                 igb_power_up_phy_copper(&adapter->hw);
1639         else
1640                 igb_power_up_serdes_link_82575(&adapter->hw);
1641
1642         igb_setup_link(&adapter->hw);
1643 }
1644
1645 /**
1646  *  igb_power_down_link - Power down the phy/serdes link
1647  *  @adapter: address of board private structure
1648  */
1649 static void igb_power_down_link(struct igb_adapter *adapter)
1650 {
1651         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1652                 igb_power_down_phy_copper_82575(&adapter->hw);
1653         else
1654                 igb_shutdown_serdes_link_82575(&adapter->hw);
1655 }
1656
1657 /**
1658  * Detect and switch function for Media Auto Sense
1659  * @adapter: address of the board private structure
1660  **/
1661 static void igb_check_swap_media(struct igb_adapter *adapter)
1662 {
1663         struct e1000_hw *hw = &adapter->hw;
1664         u32 ctrl_ext, connsw;
1665         bool swap_now = false;
1666
1667         ctrl_ext = rd32(E1000_CTRL_EXT);
1668         connsw = rd32(E1000_CONNSW);
1669
1670         /* need to live swap if current media is copper and we have fiber/serdes
1671          * to go to.
1672          */
1673
1674         if ((hw->phy.media_type == e1000_media_type_copper) &&
1675             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1676                 swap_now = true;
1677         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1678                 /* copper signal takes time to appear */
1679                 if (adapter->copper_tries < 4) {
1680                         adapter->copper_tries++;
1681                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1682                         wr32(E1000_CONNSW, connsw);
1683                         return;
1684                 } else {
1685                         adapter->copper_tries = 0;
1686                         if ((connsw & E1000_CONNSW_PHYSD) &&
1687                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1688                                 swap_now = true;
1689                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1690                                 wr32(E1000_CONNSW, connsw);
1691                         }
1692                 }
1693         }
1694
1695         if (!swap_now)
1696                 return;
1697
1698         switch (hw->phy.media_type) {
1699         case e1000_media_type_copper:
1700                 netdev_info(adapter->netdev,
1701                         "MAS: changing media to fiber/serdes\n");
1702                 ctrl_ext |=
1703                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1704                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1705                 adapter->copper_tries = 0;
1706                 break;
1707         case e1000_media_type_internal_serdes:
1708         case e1000_media_type_fiber:
1709                 netdev_info(adapter->netdev,
1710                         "MAS: changing media to copper\n");
1711                 ctrl_ext &=
1712                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1713                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1714                 break;
1715         default:
1716                 /* shouldn't get here during regular operation */
1717                 netdev_err(adapter->netdev,
1718                         "AMS: Invalid media type found, returning\n");
1719                 break;
1720         }
1721         wr32(E1000_CTRL_EXT, ctrl_ext);
1722 }
1723
1724 /**
1725  *  igb_up - Open the interface and prepare it to handle traffic
1726  *  @adapter: board private structure
1727  **/
1728 int igb_up(struct igb_adapter *adapter)
1729 {
1730         struct e1000_hw *hw = &adapter->hw;
1731         int i;
1732
1733         /* hardware has been reset, we need to reload some things */
1734         igb_configure(adapter);
1735
1736         clear_bit(__IGB_DOWN, &adapter->state);
1737
1738         for (i = 0; i < adapter->num_q_vectors; i++)
1739                 napi_enable(&(adapter->q_vector[i]->napi));
1740
1741         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1742                 igb_configure_msix(adapter);
1743         else
1744                 igb_assign_vector(adapter->q_vector[0], 0);
1745
1746         /* Clear any pending interrupts. */
1747         rd32(E1000_ICR);
1748         igb_irq_enable(adapter);
1749
1750         /* notify VFs that reset has been completed */
1751         if (adapter->vfs_allocated_count) {
1752                 u32 reg_data = rd32(E1000_CTRL_EXT);
1753
1754                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1755                 wr32(E1000_CTRL_EXT, reg_data);
1756         }
1757
1758         netif_tx_start_all_queues(adapter->netdev);
1759
1760         /* start the watchdog. */
1761         hw->mac.get_link_status = 1;
1762         schedule_work(&adapter->watchdog_task);
1763
1764         if ((adapter->flags & IGB_FLAG_EEE) &&
1765             (!hw->dev_spec._82575.eee_disable))
1766                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1767
1768         return 0;
1769 }
1770
1771 void igb_down(struct igb_adapter *adapter)
1772 {
1773         struct net_device *netdev = adapter->netdev;
1774         struct e1000_hw *hw = &adapter->hw;
1775         u32 tctl, rctl;
1776         int i;
1777
1778         /* signal that we're down so the interrupt handler does not
1779          * reschedule our watchdog timer
1780          */
1781         set_bit(__IGB_DOWN, &adapter->state);
1782
1783         /* disable receives in the hardware */
1784         rctl = rd32(E1000_RCTL);
1785         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1786         /* flush and sleep below */
1787
1788         netif_carrier_off(netdev);
1789         netif_tx_stop_all_queues(netdev);
1790
1791         /* disable transmits in the hardware */
1792         tctl = rd32(E1000_TCTL);
1793         tctl &= ~E1000_TCTL_EN;
1794         wr32(E1000_TCTL, tctl);
1795         /* flush both disables and wait for them to finish */
1796         wrfl();
1797         usleep_range(10000, 11000);
1798
1799         igb_irq_disable(adapter);
1800
1801         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1802
1803         for (i = 0; i < adapter->num_q_vectors; i++) {
1804                 if (adapter->q_vector[i]) {
1805                         napi_synchronize(&adapter->q_vector[i]->napi);
1806                         napi_disable(&adapter->q_vector[i]->napi);
1807                 }
1808         }
1809
1810         del_timer_sync(&adapter->watchdog_timer);
1811         del_timer_sync(&adapter->phy_info_timer);
1812
1813         /* record the stats before reset*/
1814         spin_lock(&adapter->stats64_lock);
1815         igb_update_stats(adapter, &adapter->stats64);
1816         spin_unlock(&adapter->stats64_lock);
1817
1818         adapter->link_speed = 0;
1819         adapter->link_duplex = 0;
1820
1821         if (!pci_channel_offline(adapter->pdev))
1822                 igb_reset(adapter);
1823
1824         /* clear VLAN promisc flag so VFTA will be updated if necessary */
1825         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
1826
1827         igb_clean_all_tx_rings(adapter);
1828         igb_clean_all_rx_rings(adapter);
1829 #ifdef CONFIG_IGB_DCA
1830
1831         /* since we reset the hardware DCA settings were cleared */
1832         igb_setup_dca(adapter);
1833 #endif
1834 }
1835
1836 void igb_reinit_locked(struct igb_adapter *adapter)
1837 {
1838         WARN_ON(in_interrupt());
1839         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1840                 usleep_range(1000, 2000);
1841         igb_down(adapter);
1842         igb_up(adapter);
1843         clear_bit(__IGB_RESETTING, &adapter->state);
1844 }
1845
1846 /** igb_enable_mas - Media Autosense re-enable after swap
1847  *
1848  * @adapter: adapter struct
1849  **/
1850 static void igb_enable_mas(struct igb_adapter *adapter)
1851 {
1852         struct e1000_hw *hw = &adapter->hw;
1853         u32 connsw = rd32(E1000_CONNSW);
1854
1855         /* configure for SerDes media detect */
1856         if ((hw->phy.media_type == e1000_media_type_copper) &&
1857             (!(connsw & E1000_CONNSW_SERDESD))) {
1858                 connsw |= E1000_CONNSW_ENRGSRC;
1859                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1860                 wr32(E1000_CONNSW, connsw);
1861                 wrfl();
1862         }
1863 }
1864
1865 void igb_reset(struct igb_adapter *adapter)
1866 {
1867         struct pci_dev *pdev = adapter->pdev;
1868         struct e1000_hw *hw = &adapter->hw;
1869         struct e1000_mac_info *mac = &hw->mac;
1870         struct e1000_fc_info *fc = &hw->fc;
1871         u32 pba, hwm;
1872
1873         /* Repartition Pba for greater than 9k mtu
1874          * To take effect CTRL.RST is required.
1875          */
1876         switch (mac->type) {
1877         case e1000_i350:
1878         case e1000_i354:
1879         case e1000_82580:
1880                 pba = rd32(E1000_RXPBS);
1881                 pba = igb_rxpbs_adjust_82580(pba);
1882                 break;
1883         case e1000_82576:
1884                 pba = rd32(E1000_RXPBS);
1885                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1886                 break;
1887         case e1000_82575:
1888         case e1000_i210:
1889         case e1000_i211:
1890         default:
1891                 pba = E1000_PBA_34K;
1892                 break;
1893         }
1894
1895         if (mac->type == e1000_82575) {
1896                 u32 min_rx_space, min_tx_space, needed_tx_space;
1897
1898                 /* write Rx PBA so that hardware can report correct Tx PBA */
1899                 wr32(E1000_PBA, pba);
1900
1901                 /* To maintain wire speed transmits, the Tx FIFO should be
1902                  * large enough to accommodate two full transmit packets,
1903                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1904                  * the Rx FIFO should be large enough to accommodate at least
1905                  * one full receive packet and is similarly rounded up and
1906                  * expressed in KB.
1907                  */
1908                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
1909
1910                 /* The Tx FIFO also stores 16 bytes of information about the Tx
1911                  * but don't include Ethernet FCS because hardware appends it.
1912                  * We only need to round down to the nearest 512 byte block
1913                  * count since the value we care about is 2 frames, not 1.
1914                  */
1915                 min_tx_space = adapter->max_frame_size;
1916                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
1917                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
1918
1919                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1920                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
1921
1922                 /* If current Tx allocation is less than the min Tx FIFO size,
1923                  * and the min Tx FIFO size is less than the current Rx FIFO
1924                  * allocation, take space away from current Rx allocation.
1925                  */
1926                 if (needed_tx_space < pba) {
1927                         pba -= needed_tx_space;
1928
1929                         /* if short on Rx space, Rx wins and must trump Tx
1930                          * adjustment
1931                          */
1932                         if (pba < min_rx_space)
1933                                 pba = min_rx_space;
1934                 }
1935
1936                 /* adjust PBA for jumbo frames */
1937                 wr32(E1000_PBA, pba);
1938         }
1939
1940         /* flow control settings
1941          * The high water mark must be low enough to fit one full frame
1942          * after transmitting the pause frame.  As such we must have enough
1943          * space to allow for us to complete our current transmit and then
1944          * receive the frame that is in progress from the link partner.
1945          * Set it to:
1946          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
1947          */
1948         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
1949
1950         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1951         fc->low_water = fc->high_water - 16;
1952         fc->pause_time = 0xFFFF;
1953         fc->send_xon = 1;
1954         fc->current_mode = fc->requested_mode;
1955
1956         /* disable receive for all VFs and wait one second */
1957         if (adapter->vfs_allocated_count) {
1958                 int i;
1959
1960                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1961                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1962
1963                 /* ping all the active vfs to let them know we are going down */
1964                 igb_ping_all_vfs(adapter);
1965
1966                 /* disable transmits and receives */
1967                 wr32(E1000_VFRE, 0);
1968                 wr32(E1000_VFTE, 0);
1969         }
1970
1971         /* Allow time for pending master requests to run */
1972         hw->mac.ops.reset_hw(hw);
1973         wr32(E1000_WUC, 0);
1974
1975         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1976                 /* need to resetup here after media swap */
1977                 adapter->ei.get_invariants(hw);
1978                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1979         }
1980         if ((mac->type == e1000_82575) &&
1981             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
1982                 igb_enable_mas(adapter);
1983         }
1984         if (hw->mac.ops.init_hw(hw))
1985                 dev_err(&pdev->dev, "Hardware Error\n");
1986
1987         /* Flow control settings reset on hardware reset, so guarantee flow
1988          * control is off when forcing speed.
1989          */
1990         if (!hw->mac.autoneg)
1991                 igb_force_mac_fc(hw);
1992
1993         igb_init_dmac(adapter, pba);
1994 #ifdef CONFIG_IGB_HWMON
1995         /* Re-initialize the thermal sensor on i350 devices. */
1996         if (!test_bit(__IGB_DOWN, &adapter->state)) {
1997                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1998                         /* If present, re-initialize the external thermal sensor
1999                          * interface.
2000                          */
2001                         if (adapter->ets)
2002                                 mac->ops.init_thermal_sensor_thresh(hw);
2003                 }
2004         }
2005 #endif
2006         /* Re-establish EEE setting */
2007         if (hw->phy.media_type == e1000_media_type_copper) {
2008                 switch (mac->type) {
2009                 case e1000_i350:
2010                 case e1000_i210:
2011                 case e1000_i211:
2012                         igb_set_eee_i350(hw, true, true);
2013                         break;
2014                 case e1000_i354:
2015                         igb_set_eee_i354(hw, true, true);
2016                         break;
2017                 default:
2018                         break;
2019                 }
2020         }
2021         if (!netif_running(adapter->netdev))
2022                 igb_power_down_link(adapter);
2023
2024         igb_update_mng_vlan(adapter);
2025
2026         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2027         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2028
2029         /* Re-enable PTP, where applicable. */
2030         igb_ptp_reset(adapter);
2031
2032         igb_get_phy_info(hw);
2033 }
2034
2035 static netdev_features_t igb_fix_features(struct net_device *netdev,
2036         netdev_features_t features)
2037 {
2038         /* Since there is no support for separate Rx/Tx vlan accel
2039          * enable/disable make sure Tx flag is always in same state as Rx.
2040          */
2041         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2042                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2043         else
2044                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2045
2046         return features;
2047 }
2048
2049 static int igb_set_features(struct net_device *netdev,
2050         netdev_features_t features)
2051 {
2052         netdev_features_t changed = netdev->features ^ features;
2053         struct igb_adapter *adapter = netdev_priv(netdev);
2054
2055         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2056                 igb_vlan_mode(netdev, features);
2057
2058         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2059                 return 0;
2060
2061         netdev->features = features;
2062
2063         if (netif_running(netdev))
2064                 igb_reinit_locked(adapter);
2065         else
2066                 igb_reset(adapter);
2067
2068         return 0;
2069 }
2070
2071 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2072                            struct net_device *dev,
2073                            const unsigned char *addr, u16 vid,
2074                            u16 flags)
2075 {
2076         /* guarantee we can provide a unique filter for the unicast address */
2077         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2078                 struct igb_adapter *adapter = netdev_priv(dev);
2079                 struct e1000_hw *hw = &adapter->hw;
2080                 int vfn = adapter->vfs_allocated_count;
2081                 int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
2082
2083                 if (netdev_uc_count(dev) >= rar_entries)
2084                         return -ENOMEM;
2085         }
2086
2087         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2088 }
2089
2090 static const struct net_device_ops igb_netdev_ops = {
2091         .ndo_open               = igb_open,
2092         .ndo_stop               = igb_close,
2093         .ndo_start_xmit         = igb_xmit_frame,
2094         .ndo_get_stats64        = igb_get_stats64,
2095         .ndo_set_rx_mode        = igb_set_rx_mode,
2096         .ndo_set_mac_address    = igb_set_mac,
2097         .ndo_change_mtu         = igb_change_mtu,
2098         .ndo_do_ioctl           = igb_ioctl,
2099         .ndo_tx_timeout         = igb_tx_timeout,
2100         .ndo_validate_addr      = eth_validate_addr,
2101         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2102         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2103         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2104         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2105         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2106         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2107         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2108 #ifdef CONFIG_NET_POLL_CONTROLLER
2109         .ndo_poll_controller    = igb_netpoll,
2110 #endif
2111         .ndo_fix_features       = igb_fix_features,
2112         .ndo_set_features       = igb_set_features,
2113         .ndo_fdb_add            = igb_ndo_fdb_add,
2114         .ndo_features_check     = passthru_features_check,
2115 };
2116
2117 /**
2118  * igb_set_fw_version - Configure version string for ethtool
2119  * @adapter: adapter struct
2120  **/
2121 void igb_set_fw_version(struct igb_adapter *adapter)
2122 {
2123         struct e1000_hw *hw = &adapter->hw;
2124         struct e1000_fw_version fw;
2125
2126         igb_get_fw_version(hw, &fw);
2127
2128         switch (hw->mac.type) {
2129         case e1000_i210:
2130         case e1000_i211:
2131                 if (!(igb_get_flash_presence_i210(hw))) {
2132                         snprintf(adapter->fw_version,
2133                                  sizeof(adapter->fw_version),
2134                                  "%2d.%2d-%d",
2135                                  fw.invm_major, fw.invm_minor,
2136                                  fw.invm_img_type);
2137                         break;
2138                 }
2139                 /* fall through */
2140         default:
2141                 /* if option is rom valid, display its version too */
2142                 if (fw.or_valid) {
2143                         snprintf(adapter->fw_version,
2144                                  sizeof(adapter->fw_version),
2145                                  "%d.%d, 0x%08x, %d.%d.%d",
2146                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2147                                  fw.or_major, fw.or_build, fw.or_patch);
2148                 /* no option rom */
2149                 } else if (fw.etrack_id != 0X0000) {
2150                         snprintf(adapter->fw_version,
2151                             sizeof(adapter->fw_version),
2152                             "%d.%d, 0x%08x",
2153                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2154                 } else {
2155                 snprintf(adapter->fw_version,
2156                     sizeof(adapter->fw_version),
2157                     "%d.%d.%d",
2158                     fw.eep_major, fw.eep_minor, fw.eep_build);
2159                 }
2160                 break;
2161         }
2162 }
2163
2164 /**
2165  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2166  *
2167  * @adapter: adapter struct
2168  **/
2169 static void igb_init_mas(struct igb_adapter *adapter)
2170 {
2171         struct e1000_hw *hw = &adapter->hw;
2172         u16 eeprom_data;
2173
2174         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2175         switch (hw->bus.func) {
2176         case E1000_FUNC_0:
2177                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2178                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2179                         netdev_info(adapter->netdev,
2180                                 "MAS: Enabling Media Autosense for port %d\n",
2181                                 hw->bus.func);
2182                 }
2183                 break;
2184         case E1000_FUNC_1:
2185                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2186                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2187                         netdev_info(adapter->netdev,
2188                                 "MAS: Enabling Media Autosense for port %d\n",
2189                                 hw->bus.func);
2190                 }
2191                 break;
2192         case E1000_FUNC_2:
2193                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2194                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2195                         netdev_info(adapter->netdev,
2196                                 "MAS: Enabling Media Autosense for port %d\n",
2197                                 hw->bus.func);
2198                 }
2199                 break;
2200         case E1000_FUNC_3:
2201                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2202                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2203                         netdev_info(adapter->netdev,
2204                                 "MAS: Enabling Media Autosense for port %d\n",
2205                                 hw->bus.func);
2206                 }
2207                 break;
2208         default:
2209                 /* Shouldn't get here */
2210                 netdev_err(adapter->netdev,
2211                         "MAS: Invalid port configuration, returning\n");
2212                 break;
2213         }
2214 }
2215
2216 /**
2217  *  igb_init_i2c - Init I2C interface
2218  *  @adapter: pointer to adapter structure
2219  **/
2220 static s32 igb_init_i2c(struct igb_adapter *adapter)
2221 {
2222         s32 status = 0;
2223
2224         /* I2C interface supported on i350 devices */
2225         if (adapter->hw.mac.type != e1000_i350)
2226                 return 0;
2227
2228         /* Initialize the i2c bus which is controlled by the registers.
2229          * This bus will use the i2c_algo_bit structue that implements
2230          * the protocol through toggling of the 4 bits in the register.
2231          */
2232         adapter->i2c_adap.owner = THIS_MODULE;
2233         adapter->i2c_algo = igb_i2c_algo;
2234         adapter->i2c_algo.data = adapter;
2235         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2236         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2237         strlcpy(adapter->i2c_adap.name, "igb BB",
2238                 sizeof(adapter->i2c_adap.name));
2239         status = i2c_bit_add_bus(&adapter->i2c_adap);
2240         return status;
2241 }
2242
2243 /**
2244  *  igb_probe - Device Initialization Routine
2245  *  @pdev: PCI device information struct
2246  *  @ent: entry in igb_pci_tbl
2247  *
2248  *  Returns 0 on success, negative on failure
2249  *
2250  *  igb_probe initializes an adapter identified by a pci_dev structure.
2251  *  The OS initialization, configuring of the adapter private structure,
2252  *  and a hardware reset occur.
2253  **/
2254 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2255 {
2256         struct net_device *netdev;
2257         struct igb_adapter *adapter;
2258         struct e1000_hw *hw;
2259         u16 eeprom_data = 0;
2260         s32 ret_val;
2261         static int global_quad_port_a; /* global quad port a indication */
2262         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2263         int err, pci_using_dac;
2264         u8 part_str[E1000_PBANUM_LENGTH];
2265
2266         /* Catch broken hardware that put the wrong VF device ID in
2267          * the PCIe SR-IOV capability.
2268          */
2269         if (pdev->is_virtfn) {
2270                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2271                         pci_name(pdev), pdev->vendor, pdev->device);
2272                 return -EINVAL;
2273         }
2274
2275         err = pci_enable_device_mem(pdev);
2276         if (err)
2277                 return err;
2278
2279         pci_using_dac = 0;
2280         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2281         if (!err) {
2282                 pci_using_dac = 1;
2283         } else {
2284                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2285                 if (err) {
2286                         dev_err(&pdev->dev,
2287                                 "No usable DMA configuration, aborting\n");
2288                         goto err_dma;
2289                 }
2290         }
2291
2292         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2293                                            IORESOURCE_MEM),
2294                                            igb_driver_name);
2295         if (err)
2296                 goto err_pci_reg;
2297
2298         pci_enable_pcie_error_reporting(pdev);
2299
2300         pci_set_master(pdev);
2301         pci_save_state(pdev);
2302
2303         err = -ENOMEM;
2304         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2305                                    IGB_MAX_TX_QUEUES);
2306         if (!netdev)
2307                 goto err_alloc_etherdev;
2308
2309         SET_NETDEV_DEV(netdev, &pdev->dev);
2310
2311         pci_set_drvdata(pdev, netdev);
2312         adapter = netdev_priv(netdev);
2313         adapter->netdev = netdev;
2314         adapter->pdev = pdev;
2315         hw = &adapter->hw;
2316         hw->back = adapter;
2317         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2318
2319         err = -EIO;
2320         adapter->io_addr = pci_iomap(pdev, 0, 0);
2321         if (!adapter->io_addr)
2322                 goto err_ioremap;
2323         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2324         hw->hw_addr = adapter->io_addr;
2325
2326         netdev->netdev_ops = &igb_netdev_ops;
2327         igb_set_ethtool_ops(netdev);
2328         netdev->watchdog_timeo = 5 * HZ;
2329
2330         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2331
2332         netdev->mem_start = pci_resource_start(pdev, 0);
2333         netdev->mem_end = pci_resource_end(pdev, 0);
2334
2335         /* PCI config space info */
2336         hw->vendor_id = pdev->vendor;
2337         hw->device_id = pdev->device;
2338         hw->revision_id = pdev->revision;
2339         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2340         hw->subsystem_device_id = pdev->subsystem_device;
2341
2342         /* Copy the default MAC, PHY and NVM function pointers */
2343         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2344         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2345         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2346         /* Initialize skew-specific constants */
2347         err = ei->get_invariants(hw);
2348         if (err)
2349                 goto err_sw_init;
2350
2351         /* setup the private structure */
2352         err = igb_sw_init(adapter);
2353         if (err)
2354                 goto err_sw_init;
2355
2356         igb_get_bus_info_pcie(hw);
2357
2358         hw->phy.autoneg_wait_to_complete = false;
2359
2360         /* Copper options */
2361         if (hw->phy.media_type == e1000_media_type_copper) {
2362                 hw->phy.mdix = AUTO_ALL_MODES;
2363                 hw->phy.disable_polarity_correction = false;
2364                 hw->phy.ms_type = e1000_ms_hw_default;
2365         }
2366
2367         if (igb_check_reset_block(hw))
2368                 dev_info(&pdev->dev,
2369                         "PHY reset is blocked due to SOL/IDER session.\n");
2370
2371         /* features is initialized to 0 in allocation, it might have bits
2372          * set by igb_sw_init so we should use an or instead of an
2373          * assignment.
2374          */
2375         netdev->features |= NETIF_F_SG |
2376                             NETIF_F_TSO |
2377                             NETIF_F_TSO6 |
2378                             NETIF_F_RXHASH |
2379                             NETIF_F_RXCSUM |
2380                             NETIF_F_HW_CSUM |
2381                             NETIF_F_HW_VLAN_CTAG_RX |
2382                             NETIF_F_HW_VLAN_CTAG_TX;
2383
2384         if (hw->mac.type >= e1000_82576)
2385                 netdev->features |= NETIF_F_SCTP_CRC;
2386
2387         /* copy netdev features into list of user selectable features */
2388         netdev->hw_features |= netdev->features;
2389         netdev->hw_features |= NETIF_F_RXALL;
2390
2391         if (hw->mac.type >= e1000_i350)
2392                 netdev->hw_features |= NETIF_F_NTUPLE;
2393
2394         /* set this bit last since it cannot be part of hw_features */
2395         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2396
2397         netdev->vlan_features |= NETIF_F_SG |
2398                                  NETIF_F_TSO |
2399                                  NETIF_F_TSO6 |
2400                                  NETIF_F_HW_CSUM |
2401                                  NETIF_F_SCTP_CRC;
2402
2403         netdev->mpls_features |= NETIF_F_HW_CSUM;
2404         netdev->hw_enc_features |= NETIF_F_HW_CSUM;
2405
2406         netdev->priv_flags |= IFF_SUPP_NOFCS;
2407
2408         if (pci_using_dac) {
2409                 netdev->features |= NETIF_F_HIGHDMA;
2410                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2411         }
2412
2413         netdev->priv_flags |= IFF_UNICAST_FLT;
2414
2415         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2416
2417         /* before reading the NVM, reset the controller to put the device in a
2418          * known good starting state
2419          */
2420         hw->mac.ops.reset_hw(hw);
2421
2422         /* make sure the NVM is good , i211/i210 parts can have special NVM
2423          * that doesn't contain a checksum
2424          */
2425         switch (hw->mac.type) {
2426         case e1000_i210:
2427         case e1000_i211:
2428                 if (igb_get_flash_presence_i210(hw)) {
2429                         if (hw->nvm.ops.validate(hw) < 0) {
2430                                 dev_err(&pdev->dev,
2431                                         "The NVM Checksum Is Not Valid\n");
2432                                 err = -EIO;
2433                                 goto err_eeprom;
2434                         }
2435                 }
2436                 break;
2437         default:
2438                 if (hw->nvm.ops.validate(hw) < 0) {
2439                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2440                         err = -EIO;
2441                         goto err_eeprom;
2442                 }
2443                 break;
2444         }
2445
2446         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
2447                 /* copy the MAC address out of the NVM */
2448                 if (hw->mac.ops.read_mac_addr(hw))
2449                         dev_err(&pdev->dev, "NVM Read Error\n");
2450         }
2451
2452         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2453
2454         if (!is_valid_ether_addr(netdev->dev_addr)) {
2455                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2456                 err = -EIO;
2457                 goto err_eeprom;
2458         }
2459
2460         /* get firmware version for ethtool -i */
2461         igb_set_fw_version(adapter);
2462
2463         /* configure RXPBSIZE and TXPBSIZE */
2464         if (hw->mac.type == e1000_i210) {
2465                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2466                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2467         }
2468
2469         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2470                     (unsigned long) adapter);
2471         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2472                     (unsigned long) adapter);
2473
2474         INIT_WORK(&adapter->reset_task, igb_reset_task);
2475         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2476
2477         /* Initialize link properties that are user-changeable */
2478         adapter->fc_autoneg = true;
2479         hw->mac.autoneg = true;
2480         hw->phy.autoneg_advertised = 0x2f;
2481
2482         hw->fc.requested_mode = e1000_fc_default;
2483         hw->fc.current_mode = e1000_fc_default;
2484
2485         igb_validate_mdi_setting(hw);
2486
2487         /* By default, support wake on port A */
2488         if (hw->bus.func == 0)
2489                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2490
2491         /* Check the NVM for wake support on non-port A ports */
2492         if (hw->mac.type >= e1000_82580)
2493                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2494                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2495                                  &eeprom_data);
2496         else if (hw->bus.func == 1)
2497                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2498
2499         if (eeprom_data & IGB_EEPROM_APME)
2500                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2501
2502         /* now that we have the eeprom settings, apply the special cases where
2503          * the eeprom may be wrong or the board simply won't support wake on
2504          * lan on a particular port
2505          */
2506         switch (pdev->device) {
2507         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2508                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2509                 break;
2510         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2511         case E1000_DEV_ID_82576_FIBER:
2512         case E1000_DEV_ID_82576_SERDES:
2513                 /* Wake events only supported on port A for dual fiber
2514                  * regardless of eeprom setting
2515                  */
2516                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2517                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2518                 break;
2519         case E1000_DEV_ID_82576_QUAD_COPPER:
2520         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2521                 /* if quad port adapter, disable WoL on all but port A */
2522                 if (global_quad_port_a != 0)
2523                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2524                 else
2525                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2526                 /* Reset for multiple quad port adapters */
2527                 if (++global_quad_port_a == 4)
2528                         global_quad_port_a = 0;
2529                 break;
2530         default:
2531                 /* If the device can't wake, don't set software support */
2532                 if (!device_can_wakeup(&adapter->pdev->dev))
2533                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2534         }
2535
2536         /* initialize the wol settings based on the eeprom settings */
2537         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2538                 adapter->wol |= E1000_WUFC_MAG;
2539
2540         /* Some vendors want WoL disabled by default, but still supported */
2541         if ((hw->mac.type == e1000_i350) &&
2542             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2543                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2544                 adapter->wol = 0;
2545         }
2546
2547         /* Some vendors want the ability to Use the EEPROM setting as
2548          * enable/disable only, and not for capability
2549          */
2550         if (((hw->mac.type == e1000_i350) ||
2551              (hw->mac.type == e1000_i354)) &&
2552             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
2553                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2554                 adapter->wol = 0;
2555         }
2556         if (hw->mac.type == e1000_i350) {
2557                 if (((pdev->subsystem_device == 0x5001) ||
2558                      (pdev->subsystem_device == 0x5002)) &&
2559                                 (hw->bus.func == 0)) {
2560                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2561                         adapter->wol = 0;
2562                 }
2563                 if (pdev->subsystem_device == 0x1F52)
2564                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2565         }
2566
2567         device_set_wakeup_enable(&adapter->pdev->dev,
2568                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2569
2570         /* reset the hardware with the new settings */
2571         igb_reset(adapter);
2572
2573         /* Init the I2C interface */
2574         err = igb_init_i2c(adapter);
2575         if (err) {
2576                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2577                 goto err_eeprom;
2578         }
2579
2580         /* let the f/w know that the h/w is now under the control of the
2581          * driver.
2582          */
2583         igb_get_hw_control(adapter);
2584
2585         strcpy(netdev->name, "eth%d");
2586         err = register_netdev(netdev);
2587         if (err)
2588                 goto err_register;
2589
2590         /* carrier off reporting is important to ethtool even BEFORE open */
2591         netif_carrier_off(netdev);
2592
2593 #ifdef CONFIG_IGB_DCA
2594         if (dca_add_requester(&pdev->dev) == 0) {
2595                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2596                 dev_info(&pdev->dev, "DCA enabled\n");
2597                 igb_setup_dca(adapter);
2598         }
2599
2600 #endif
2601 #ifdef CONFIG_IGB_HWMON
2602         /* Initialize the thermal sensor on i350 devices. */
2603         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2604                 u16 ets_word;
2605
2606                 /* Read the NVM to determine if this i350 device supports an
2607                  * external thermal sensor.
2608                  */
2609                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2610                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2611                         adapter->ets = true;
2612                 else
2613                         adapter->ets = false;
2614                 if (igb_sysfs_init(adapter))
2615                         dev_err(&pdev->dev,
2616                                 "failed to allocate sysfs resources\n");
2617         } else {
2618                 adapter->ets = false;
2619         }
2620 #endif
2621         /* Check if Media Autosense is enabled */
2622         adapter->ei = *ei;
2623         if (hw->dev_spec._82575.mas_capable)
2624                 igb_init_mas(adapter);
2625
2626         /* do hw tstamp init after resetting */
2627         igb_ptp_init(adapter);
2628
2629         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2630         /* print bus type/speed/width info, not applicable to i354 */
2631         if (hw->mac.type != e1000_i354) {
2632                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2633                          netdev->name,
2634                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2635                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2636                            "unknown"),
2637                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2638                           "Width x4" :
2639                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2640                           "Width x2" :
2641                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2642                           "Width x1" : "unknown"), netdev->dev_addr);
2643         }
2644
2645         if ((hw->mac.type >= e1000_i210 ||
2646              igb_get_flash_presence_i210(hw))) {
2647                 ret_val = igb_read_part_string(hw, part_str,
2648                                                E1000_PBANUM_LENGTH);
2649         } else {
2650                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2651         }
2652
2653         if (ret_val)
2654                 strcpy(part_str, "Unknown");
2655         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2656         dev_info(&pdev->dev,
2657                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2658                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2659                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2660                 adapter->num_rx_queues, adapter->num_tx_queues);
2661         if (hw->phy.media_type == e1000_media_type_copper) {
2662                 switch (hw->mac.type) {
2663                 case e1000_i350:
2664                 case e1000_i210:
2665                 case e1000_i211:
2666                         /* Enable EEE for internal copper PHY devices */
2667                         err = igb_set_eee_i350(hw, true, true);
2668                         if ((!err) &&
2669                             (!hw->dev_spec._82575.eee_disable)) {
2670                                 adapter->eee_advert =
2671                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2672                                 adapter->flags |= IGB_FLAG_EEE;
2673                         }
2674                         break;
2675                 case e1000_i354:
2676                         if ((rd32(E1000_CTRL_EXT) &
2677                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2678                                 err = igb_set_eee_i354(hw, true, true);
2679                                 if ((!err) &&
2680                                         (!hw->dev_spec._82575.eee_disable)) {
2681                                         adapter->eee_advert =
2682                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2683                                         adapter->flags |= IGB_FLAG_EEE;
2684                                 }
2685                         }
2686                         break;
2687                 default:
2688                         break;
2689                 }
2690         }
2691         pm_runtime_put_noidle(&pdev->dev);
2692         return 0;
2693
2694 err_register:
2695         igb_release_hw_control(adapter);
2696         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2697 err_eeprom:
2698         if (!igb_check_reset_block(hw))
2699                 igb_reset_phy(hw);
2700
2701         if (hw->flash_address)
2702                 iounmap(hw->flash_address);
2703 err_sw_init:
2704         kfree(adapter->shadow_vfta);
2705         igb_clear_interrupt_scheme(adapter);
2706 #ifdef CONFIG_PCI_IOV
2707         igb_disable_sriov(pdev);
2708 #endif
2709         pci_iounmap(pdev, adapter->io_addr);
2710 err_ioremap:
2711         free_netdev(netdev);
2712 err_alloc_etherdev:
2713         pci_release_selected_regions(pdev,
2714                                      pci_select_bars(pdev, IORESOURCE_MEM));
2715 err_pci_reg:
2716 err_dma:
2717         pci_disable_device(pdev);
2718         return err;
2719 }
2720
2721 #ifdef CONFIG_PCI_IOV
2722 static int igb_disable_sriov(struct pci_dev *pdev)
2723 {
2724         struct net_device *netdev = pci_get_drvdata(pdev);
2725         struct igb_adapter *adapter = netdev_priv(netdev);
2726         struct e1000_hw *hw = &adapter->hw;
2727
2728         /* reclaim resources allocated to VFs */
2729         if (adapter->vf_data) {
2730                 /* disable iov and allow time for transactions to clear */
2731                 if (pci_vfs_assigned(pdev)) {
2732                         dev_warn(&pdev->dev,
2733                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2734                         return -EPERM;
2735                 } else {
2736                         pci_disable_sriov(pdev);
2737                         msleep(500);
2738                 }
2739
2740                 kfree(adapter->vf_data);
2741                 adapter->vf_data = NULL;
2742                 adapter->vfs_allocated_count = 0;
2743                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2744                 wrfl();
2745                 msleep(100);
2746                 dev_info(&pdev->dev, "IOV Disabled\n");
2747
2748                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2749                 adapter->flags |= IGB_FLAG_DMAC;
2750         }
2751
2752         return 0;
2753 }
2754
2755 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2756 {
2757         struct net_device *netdev = pci_get_drvdata(pdev);
2758         struct igb_adapter *adapter = netdev_priv(netdev);
2759         int old_vfs = pci_num_vf(pdev);
2760         int err = 0;
2761         int i;
2762
2763         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2764                 err = -EPERM;
2765                 goto out;
2766         }
2767         if (!num_vfs)
2768                 goto out;
2769
2770         if (old_vfs) {
2771                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2772                          old_vfs, max_vfs);
2773                 adapter->vfs_allocated_count = old_vfs;
2774         } else
2775                 adapter->vfs_allocated_count = num_vfs;
2776
2777         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2778                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2779
2780         /* if allocation failed then we do not support SR-IOV */
2781         if (!adapter->vf_data) {
2782                 adapter->vfs_allocated_count = 0;
2783                 dev_err(&pdev->dev,
2784                         "Unable to allocate memory for VF Data Storage\n");
2785                 err = -ENOMEM;
2786                 goto out;
2787         }
2788
2789         /* only call pci_enable_sriov() if no VFs are allocated already */
2790         if (!old_vfs) {
2791                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2792                 if (err)
2793                         goto err_out;
2794         }
2795         dev_info(&pdev->dev, "%d VFs allocated\n",
2796                  adapter->vfs_allocated_count);
2797         for (i = 0; i < adapter->vfs_allocated_count; i++)
2798                 igb_vf_configure(adapter, i);
2799
2800         /* DMA Coalescing is not supported in IOV mode. */
2801         adapter->flags &= ~IGB_FLAG_DMAC;
2802         goto out;
2803
2804 err_out:
2805         kfree(adapter->vf_data);
2806         adapter->vf_data = NULL;
2807         adapter->vfs_allocated_count = 0;
2808 out:
2809         return err;
2810 }
2811
2812 #endif
2813 /**
2814  *  igb_remove_i2c - Cleanup  I2C interface
2815  *  @adapter: pointer to adapter structure
2816  **/
2817 static void igb_remove_i2c(struct igb_adapter *adapter)
2818 {
2819         /* free the adapter bus structure */
2820         i2c_del_adapter(&adapter->i2c_adap);
2821 }
2822
2823 /**
2824  *  igb_remove - Device Removal Routine
2825  *  @pdev: PCI device information struct
2826  *
2827  *  igb_remove is called by the PCI subsystem to alert the driver
2828  *  that it should release a PCI device.  The could be caused by a
2829  *  Hot-Plug event, or because the driver is going to be removed from
2830  *  memory.
2831  **/
2832 static void igb_remove(struct pci_dev *pdev)
2833 {
2834         struct net_device *netdev = pci_get_drvdata(pdev);
2835         struct igb_adapter *adapter = netdev_priv(netdev);
2836         struct e1000_hw *hw = &adapter->hw;
2837
2838         pm_runtime_get_noresume(&pdev->dev);
2839 #ifdef CONFIG_IGB_HWMON
2840         igb_sysfs_exit(adapter);
2841 #endif
2842         igb_remove_i2c(adapter);
2843         igb_ptp_stop(adapter);
2844         /* The watchdog timer may be rescheduled, so explicitly
2845          * disable watchdog from being rescheduled.
2846          */
2847         set_bit(__IGB_DOWN, &adapter->state);
2848         del_timer_sync(&adapter->watchdog_timer);
2849         del_timer_sync(&adapter->phy_info_timer);
2850
2851         cancel_work_sync(&adapter->reset_task);
2852         cancel_work_sync(&adapter->watchdog_task);
2853
2854 #ifdef CONFIG_IGB_DCA
2855         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2856                 dev_info(&pdev->dev, "DCA disabled\n");
2857                 dca_remove_requester(&pdev->dev);
2858                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2859                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2860         }
2861 #endif
2862
2863         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2864          * would have already happened in close and is redundant.
2865          */
2866         igb_release_hw_control(adapter);
2867
2868 #ifdef CONFIG_PCI_IOV
2869         igb_disable_sriov(pdev);
2870 #endif
2871
2872         unregister_netdev(netdev);
2873
2874         igb_clear_interrupt_scheme(adapter);
2875
2876         pci_iounmap(pdev, adapter->io_addr);
2877         if (hw->flash_address)
2878                 iounmap(hw->flash_address);
2879         pci_release_selected_regions(pdev,
2880                                      pci_select_bars(pdev, IORESOURCE_MEM));
2881
2882         kfree(adapter->shadow_vfta);
2883         free_netdev(netdev);
2884
2885         pci_disable_pcie_error_reporting(pdev);
2886
2887         pci_disable_device(pdev);
2888 }
2889
2890 /**
2891  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2892  *  @adapter: board private structure to initialize
2893  *
2894  *  This function initializes the vf specific data storage and then attempts to
2895  *  allocate the VFs.  The reason for ordering it this way is because it is much
2896  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2897  *  the memory for the VFs.
2898  **/
2899 static void igb_probe_vfs(struct igb_adapter *adapter)
2900 {
2901 #ifdef CONFIG_PCI_IOV
2902         struct pci_dev *pdev = adapter->pdev;
2903         struct e1000_hw *hw = &adapter->hw;
2904
2905         /* Virtualization features not supported on i210 family. */
2906         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2907                 return;
2908
2909         /* Of the below we really only want the effect of getting
2910          * IGB_FLAG_HAS_MSIX set (if available), without which
2911          * igb_enable_sriov() has no effect.
2912          */
2913         igb_set_interrupt_capability(adapter, true);
2914         igb_reset_interrupt_capability(adapter);
2915
2916         pci_sriov_set_totalvfs(pdev, 7);
2917         igb_enable_sriov(pdev, max_vfs);
2918
2919 #endif /* CONFIG_PCI_IOV */
2920 }
2921
2922 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2923 {
2924         struct e1000_hw *hw = &adapter->hw;
2925         u32 max_rss_queues;
2926
2927         /* Determine the maximum number of RSS queues supported. */
2928         switch (hw->mac.type) {
2929         case e1000_i211:
2930                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2931                 break;
2932         case e1000_82575:
2933         case e1000_i210:
2934                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2935                 break;
2936         case e1000_i350:
2937                 /* I350 cannot do RSS and SR-IOV at the same time */
2938                 if (!!adapter->vfs_allocated_count) {
2939                         max_rss_queues = 1;
2940                         break;
2941                 }
2942                 /* fall through */
2943         case e1000_82576:
2944                 if (!!adapter->vfs_allocated_count) {
2945                         max_rss_queues = 2;
2946                         break;
2947                 }
2948                 /* fall through */
2949         case e1000_82580:
2950         case e1000_i354:
2951         default:
2952                 max_rss_queues = IGB_MAX_RX_QUEUES;
2953                 break;
2954         }
2955
2956         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2957
2958         igb_set_flag_queue_pairs(adapter, max_rss_queues);
2959 }
2960
2961 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
2962                               const u32 max_rss_queues)
2963 {
2964         struct e1000_hw *hw = &adapter->hw;
2965
2966         /* Determine if we need to pair queues. */
2967         switch (hw->mac.type) {
2968         case e1000_82575:
2969         case e1000_i211:
2970                 /* Device supports enough interrupts without queue pairing. */
2971                 break;
2972         case e1000_82576:
2973         case e1000_82580:
2974         case e1000_i350:
2975         case e1000_i354:
2976         case e1000_i210:
2977         default:
2978                 /* If rss_queues > half of max_rss_queues, pair the queues in
2979                  * order to conserve interrupts due to limited supply.
2980                  */
2981                 if (adapter->rss_queues > (max_rss_queues / 2))
2982                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2983                 else
2984                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
2985                 break;
2986         }
2987 }
2988
2989 /**
2990  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
2991  *  @adapter: board private structure to initialize
2992  *
2993  *  igb_sw_init initializes the Adapter private data structure.
2994  *  Fields are initialized based on PCI device information and
2995  *  OS network device settings (MTU size).
2996  **/
2997 static int igb_sw_init(struct igb_adapter *adapter)
2998 {
2999         struct e1000_hw *hw = &adapter->hw;
3000         struct net_device *netdev = adapter->netdev;
3001         struct pci_dev *pdev = adapter->pdev;
3002
3003         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3004
3005         /* set default ring sizes */
3006         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3007         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3008
3009         /* set default ITR values */
3010         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3011         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3012
3013         /* set default work limits */
3014         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3015
3016         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3017                                   VLAN_HLEN;
3018         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3019
3020         spin_lock_init(&adapter->stats64_lock);
3021 #ifdef CONFIG_PCI_IOV
3022         switch (hw->mac.type) {
3023         case e1000_82576:
3024         case e1000_i350:
3025                 if (max_vfs > 7) {
3026                         dev_warn(&pdev->dev,
3027                                  "Maximum of 7 VFs per PF, using max\n");
3028                         max_vfs = adapter->vfs_allocated_count = 7;
3029                 } else
3030                         adapter->vfs_allocated_count = max_vfs;
3031                 if (adapter->vfs_allocated_count)
3032                         dev_warn(&pdev->dev,
3033                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3034                 break;
3035         default:
3036                 break;
3037         }
3038 #endif /* CONFIG_PCI_IOV */
3039
3040         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3041         adapter->flags |= IGB_FLAG_HAS_MSIX;
3042
3043         igb_probe_vfs(adapter);
3044
3045         igb_init_queue_configuration(adapter);
3046
3047         /* Setup and initialize a copy of the hw vlan table array */
3048         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3049                                        GFP_ATOMIC);
3050
3051         /* This call may decrease the number of queues */
3052         if (igb_init_interrupt_scheme(adapter, true)) {
3053                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3054                 return -ENOMEM;
3055         }
3056
3057         /* Explicitly disable IRQ since the NIC can be in any state. */
3058         igb_irq_disable(adapter);
3059
3060         if (hw->mac.type >= e1000_i350)
3061                 adapter->flags &= ~IGB_FLAG_DMAC;
3062
3063         set_bit(__IGB_DOWN, &adapter->state);
3064         return 0;
3065 }
3066
3067 /**
3068  *  igb_open - Called when a network interface is made active
3069  *  @netdev: network interface device structure
3070  *
3071  *  Returns 0 on success, negative value on failure
3072  *
3073  *  The open entry point is called when a network interface is made
3074  *  active by the system (IFF_UP).  At this point all resources needed
3075  *  for transmit and receive operations are allocated, the interrupt
3076  *  handler is registered with the OS, the watchdog timer is started,
3077  *  and the stack is notified that the interface is ready.
3078  **/
3079 static int __igb_open(struct net_device *netdev, bool resuming)
3080 {
3081         struct igb_adapter *adapter = netdev_priv(netdev);
3082         struct e1000_hw *hw = &adapter->hw;
3083         struct pci_dev *pdev = adapter->pdev;
3084         int err;
3085         int i;
3086
3087         /* disallow open during test */
3088         if (test_bit(__IGB_TESTING, &adapter->state)) {
3089                 WARN_ON(resuming);
3090                 return -EBUSY;
3091         }
3092
3093         if (!resuming)
3094                 pm_runtime_get_sync(&pdev->dev);
3095
3096         netif_carrier_off(netdev);
3097
3098         /* allocate transmit descriptors */
3099         err = igb_setup_all_tx_resources(adapter);
3100         if (err)
3101                 goto err_setup_tx;
3102
3103         /* allocate receive descriptors */
3104         err = igb_setup_all_rx_resources(adapter);
3105         if (err)
3106                 goto err_setup_rx;
3107
3108         igb_power_up_link(adapter);
3109
3110         /* before we allocate an interrupt, we must be ready to handle it.
3111          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3112          * as soon as we call pci_request_irq, so we have to setup our
3113          * clean_rx handler before we do so.
3114          */
3115         igb_configure(adapter);
3116
3117         err = igb_request_irq(adapter);
3118         if (err)
3119                 goto err_req_irq;
3120
3121         /* Notify the stack of the actual queue counts. */
3122         err = netif_set_real_num_tx_queues(adapter->netdev,
3123                                            adapter->num_tx_queues);
3124         if (err)
3125                 goto err_set_queues;
3126
3127         err = netif_set_real_num_rx_queues(adapter->netdev,
3128                                            adapter->num_rx_queues);
3129         if (err)
3130                 goto err_set_queues;
3131
3132         /* From here on the code is the same as igb_up() */
3133         clear_bit(__IGB_DOWN, &adapter->state);
3134
3135         for (i = 0; i < adapter->num_q_vectors; i++)
3136                 napi_enable(&(adapter->q_vector[i]->napi));
3137
3138         /* Clear any pending interrupts. */
3139         rd32(E1000_ICR);
3140
3141         igb_irq_enable(adapter);
3142
3143         /* notify VFs that reset has been completed */
3144         if (adapter->vfs_allocated_count) {
3145                 u32 reg_data = rd32(E1000_CTRL_EXT);
3146
3147                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3148                 wr32(E1000_CTRL_EXT, reg_data);
3149         }
3150
3151         netif_tx_start_all_queues(netdev);
3152
3153         if (!resuming)
3154                 pm_runtime_put(&pdev->dev);
3155
3156         /* start the watchdog. */
3157         hw->mac.get_link_status = 1;
3158         schedule_work(&adapter->watchdog_task);
3159
3160         return 0;
3161
3162 err_set_queues:
3163         igb_free_irq(adapter);
3164 err_req_irq:
3165         igb_release_hw_control(adapter);
3166         igb_power_down_link(adapter);
3167         igb_free_all_rx_resources(adapter);
3168 err_setup_rx:
3169         igb_free_all_tx_resources(adapter);
3170 err_setup_tx:
3171         igb_reset(adapter);
3172         if (!resuming)
3173                 pm_runtime_put(&pdev->dev);
3174
3175         return err;
3176 }
3177
3178 int igb_open(struct net_device *netdev)
3179 {
3180         return __igb_open(netdev, false);
3181 }
3182
3183 /**
3184  *  igb_close - Disables a network interface
3185  *  @netdev: network interface device structure
3186  *
3187  *  Returns 0, this is not allowed to fail
3188  *
3189  *  The close entry point is called when an interface is de-activated
3190  *  by the OS.  The hardware is still under the driver's control, but
3191  *  needs to be disabled.  A global MAC reset is issued to stop the
3192  *  hardware, and all transmit and receive resources are freed.
3193  **/
3194 static int __igb_close(struct net_device *netdev, bool suspending)
3195 {
3196         struct igb_adapter *adapter = netdev_priv(netdev);
3197         struct pci_dev *pdev = adapter->pdev;
3198
3199         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3200
3201         if (!suspending)
3202                 pm_runtime_get_sync(&pdev->dev);
3203
3204         igb_down(adapter);
3205         igb_free_irq(adapter);
3206
3207         igb_free_all_tx_resources(adapter);
3208         igb_free_all_rx_resources(adapter);
3209
3210         if (!suspending)
3211                 pm_runtime_put_sync(&pdev->dev);
3212         return 0;
3213 }
3214
3215 int igb_close(struct net_device *netdev)
3216 {
3217         return __igb_close(netdev, false);
3218 }
3219
3220 /**
3221  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3222  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3223  *
3224  *  Return 0 on success, negative on failure
3225  **/
3226 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3227 {
3228         struct device *dev = tx_ring->dev;
3229         int size;
3230
3231         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3232
3233         tx_ring->tx_buffer_info = vzalloc(size);
3234         if (!tx_ring->tx_buffer_info)
3235                 goto err;
3236
3237         /* round up to nearest 4K */
3238         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3239         tx_ring->size = ALIGN(tx_ring->size, 4096);
3240
3241         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3242                                            &tx_ring->dma, GFP_KERNEL);
3243         if (!tx_ring->desc)
3244                 goto err;
3245
3246         tx_ring->next_to_use = 0;
3247         tx_ring->next_to_clean = 0;
3248
3249         return 0;
3250
3251 err:
3252         vfree(tx_ring->tx_buffer_info);
3253         tx_ring->tx_buffer_info = NULL;
3254         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3255         return -ENOMEM;
3256 }
3257
3258 /**
3259  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3260  *                               (Descriptors) for all queues
3261  *  @adapter: board private structure
3262  *
3263  *  Return 0 on success, negative on failure
3264  **/
3265 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3266 {
3267         struct pci_dev *pdev = adapter->pdev;
3268         int i, err = 0;
3269
3270         for (i = 0; i < adapter->num_tx_queues; i++) {
3271                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3272                 if (err) {
3273                         dev_err(&pdev->dev,
3274                                 "Allocation for Tx Queue %u failed\n", i);
3275                         for (i--; i >= 0; i--)
3276                                 igb_free_tx_resources(adapter->tx_ring[i]);
3277                         break;
3278                 }
3279         }
3280
3281         return err;
3282 }
3283
3284 /**
3285  *  igb_setup_tctl - configure the transmit control registers
3286  *  @adapter: Board private structure
3287  **/
3288 void igb_setup_tctl(struct igb_adapter *adapter)
3289 {
3290         struct e1000_hw *hw = &adapter->hw;
3291         u32 tctl;
3292
3293         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3294         wr32(E1000_TXDCTL(0), 0);
3295
3296         /* Program the Transmit Control Register */
3297         tctl = rd32(E1000_TCTL);
3298         tctl &= ~E1000_TCTL_CT;
3299         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3300                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3301
3302         igb_config_collision_dist(hw);
3303
3304         /* Enable transmits */
3305         tctl |= E1000_TCTL_EN;
3306
3307         wr32(E1000_TCTL, tctl);
3308 }
3309
3310 /**
3311  *  igb_configure_tx_ring - Configure transmit ring after Reset
3312  *  @adapter: board private structure
3313  *  @ring: tx ring to configure
3314  *
3315  *  Configure a transmit ring after a reset.
3316  **/
3317 void igb_configure_tx_ring(struct igb_adapter *adapter,
3318                            struct igb_ring *ring)
3319 {
3320         struct e1000_hw *hw = &adapter->hw;
3321         u32 txdctl = 0;
3322         u64 tdba = ring->dma;
3323         int reg_idx = ring->reg_idx;
3324
3325         /* disable the queue */
3326         wr32(E1000_TXDCTL(reg_idx), 0);
3327         wrfl();
3328         mdelay(10);
3329
3330         wr32(E1000_TDLEN(reg_idx),
3331              ring->count * sizeof(union e1000_adv_tx_desc));
3332         wr32(E1000_TDBAL(reg_idx),
3333              tdba & 0x00000000ffffffffULL);
3334         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3335
3336         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3337         wr32(E1000_TDH(reg_idx), 0);
3338         writel(0, ring->tail);
3339
3340         txdctl |= IGB_TX_PTHRESH;
3341         txdctl |= IGB_TX_HTHRESH << 8;
3342         txdctl |= IGB_TX_WTHRESH << 16;
3343
3344         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3345         wr32(E1000_TXDCTL(reg_idx), txdctl);
3346 }
3347
3348 /**
3349  *  igb_configure_tx - Configure transmit Unit after Reset
3350  *  @adapter: board private structure
3351  *
3352  *  Configure the Tx unit of the MAC after a reset.
3353  **/
3354 static void igb_configure_tx(struct igb_adapter *adapter)
3355 {
3356         int i;
3357
3358         for (i = 0; i < adapter->num_tx_queues; i++)
3359                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3360 }
3361
3362 /**
3363  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3364  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3365  *
3366  *  Returns 0 on success, negative on failure
3367  **/
3368 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3369 {
3370         struct device *dev = rx_ring->dev;
3371         int size;
3372
3373         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3374
3375         rx_ring->rx_buffer_info = vzalloc(size);
3376         if (!rx_ring->rx_buffer_info)
3377                 goto err;
3378
3379         /* Round up to nearest 4K */
3380         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3381         rx_ring->size = ALIGN(rx_ring->size, 4096);
3382
3383         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3384                                            &rx_ring->dma, GFP_KERNEL);
3385         if (!rx_ring->desc)
3386                 goto err;
3387
3388         rx_ring->next_to_alloc = 0;
3389         rx_ring->next_to_clean = 0;
3390         rx_ring->next_to_use = 0;
3391
3392         return 0;
3393
3394 err:
3395         vfree(rx_ring->rx_buffer_info);
3396         rx_ring->rx_buffer_info = NULL;
3397         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3398         return -ENOMEM;
3399 }
3400
3401 /**
3402  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3403  *                               (Descriptors) for all queues
3404  *  @adapter: board private structure
3405  *
3406  *  Return 0 on success, negative on failure
3407  **/
3408 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3409 {
3410         struct pci_dev *pdev = adapter->pdev;
3411         int i, err = 0;
3412
3413         for (i = 0; i < adapter->num_rx_queues; i++) {
3414                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3415                 if (err) {
3416                         dev_err(&pdev->dev,
3417                                 "Allocation for Rx Queue %u failed\n", i);
3418                         for (i--; i >= 0; i--)
3419                                 igb_free_rx_resources(adapter->rx_ring[i]);
3420                         break;
3421                 }
3422         }
3423
3424         return err;
3425 }
3426
3427 /**
3428  *  igb_setup_mrqc - configure the multiple receive queue control registers
3429  *  @adapter: Board private structure
3430  **/
3431 static void igb_setup_mrqc(struct igb_adapter *adapter)
3432 {
3433         struct e1000_hw *hw = &adapter->hw;
3434         u32 mrqc, rxcsum;
3435         u32 j, num_rx_queues;
3436         u32 rss_key[10];
3437
3438         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3439         for (j = 0; j < 10; j++)
3440                 wr32(E1000_RSSRK(j), rss_key[j]);
3441
3442         num_rx_queues = adapter->rss_queues;
3443
3444         switch (hw->mac.type) {
3445         case e1000_82576:
3446                 /* 82576 supports 2 RSS queues for SR-IOV */
3447                 if (adapter->vfs_allocated_count)
3448                         num_rx_queues = 2;
3449                 break;
3450         default:
3451                 break;
3452         }
3453
3454         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3455                 for (j = 0; j < IGB_RETA_SIZE; j++)
3456                         adapter->rss_indir_tbl[j] =
3457                         (j * num_rx_queues) / IGB_RETA_SIZE;
3458                 adapter->rss_indir_tbl_init = num_rx_queues;
3459         }
3460         igb_write_rss_indir_tbl(adapter);
3461
3462         /* Disable raw packet checksumming so that RSS hash is placed in
3463          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3464          * offloads as they are enabled by default
3465          */
3466         rxcsum = rd32(E1000_RXCSUM);
3467         rxcsum |= E1000_RXCSUM_PCSD;
3468
3469         if (adapter->hw.mac.type >= e1000_82576)
3470                 /* Enable Receive Checksum Offload for SCTP */
3471                 rxcsum |= E1000_RXCSUM_CRCOFL;
3472
3473         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3474         wr32(E1000_RXCSUM, rxcsum);
3475
3476         /* Generate RSS hash based on packet types, TCP/UDP
3477          * port numbers and/or IPv4/v6 src and dst addresses
3478          */
3479         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3480                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3481                E1000_MRQC_RSS_FIELD_IPV6 |
3482                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3483                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3484
3485         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3486                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3487         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3488                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3489
3490         /* If VMDq is enabled then we set the appropriate mode for that, else
3491          * we default to RSS so that an RSS hash is calculated per packet even
3492          * if we are only using one queue
3493          */
3494         if (adapter->vfs_allocated_count) {
3495                 if (hw->mac.type > e1000_82575) {
3496                         /* Set the default pool for the PF's first queue */
3497                         u32 vtctl = rd32(E1000_VT_CTL);
3498
3499                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3500                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3501                         vtctl |= adapter->vfs_allocated_count <<
3502                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3503                         wr32(E1000_VT_CTL, vtctl);
3504                 }
3505                 if (adapter->rss_queues > 1)
3506                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
3507                 else
3508                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3509         } else {
3510                 if (hw->mac.type != e1000_i211)
3511                         mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
3512         }
3513         igb_vmm_control(adapter);
3514
3515         wr32(E1000_MRQC, mrqc);
3516 }
3517
3518 /**
3519  *  igb_setup_rctl - configure the receive control registers
3520  *  @adapter: Board private structure
3521  **/
3522 void igb_setup_rctl(struct igb_adapter *adapter)
3523 {
3524         struct e1000_hw *hw = &adapter->hw;
3525         u32 rctl;
3526
3527         rctl = rd32(E1000_RCTL);
3528
3529         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3530         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3531
3532         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3533                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3534
3535         /* enable stripping of CRC. It's unlikely this will break BMC
3536          * redirection as it did with e1000. Newer features require
3537          * that the HW strips the CRC.
3538          */
3539         rctl |= E1000_RCTL_SECRC;
3540
3541         /* disable store bad packets and clear size bits. */
3542         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3543
3544         /* enable LPE to allow for reception of jumbo frames */
3545         rctl |= E1000_RCTL_LPE;
3546
3547         /* disable queue 0 to prevent tail write w/o re-config */
3548         wr32(E1000_RXDCTL(0), 0);
3549
3550         /* Attention!!!  For SR-IOV PF driver operations you must enable
3551          * queue drop for all VF and PF queues to prevent head of line blocking
3552          * if an un-trusted VF does not provide descriptors to hardware.
3553          */
3554         if (adapter->vfs_allocated_count) {
3555                 /* set all queue drop enable bits */
3556                 wr32(E1000_QDE, ALL_QUEUES);
3557         }
3558
3559         /* This is useful for sniffing bad packets. */
3560         if (adapter->netdev->features & NETIF_F_RXALL) {
3561                 /* UPE and MPE will be handled by normal PROMISC logic
3562                  * in e1000e_set_rx_mode
3563                  */
3564                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3565                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3566                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3567
3568                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
3569                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3570                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3571                  * and that breaks VLANs.
3572                  */
3573         }
3574
3575         wr32(E1000_RCTL, rctl);
3576 }
3577
3578 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3579                                    int vfn)
3580 {
3581         struct e1000_hw *hw = &adapter->hw;
3582         u32 vmolr;
3583
3584         if (size > MAX_JUMBO_FRAME_SIZE)
3585                 size = MAX_JUMBO_FRAME_SIZE;
3586
3587         vmolr = rd32(E1000_VMOLR(vfn));
3588         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3589         vmolr |= size | E1000_VMOLR_LPE;
3590         wr32(E1000_VMOLR(vfn), vmolr);
3591
3592         return 0;
3593 }
3594
3595 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3596                                          int vfn, bool enable)
3597 {
3598         struct e1000_hw *hw = &adapter->hw;
3599         u32 val, reg;
3600
3601         if (hw->mac.type < e1000_82576)
3602                 return;
3603
3604         if (hw->mac.type == e1000_i350)
3605                 reg = E1000_DVMOLR(vfn);
3606         else
3607                 reg = E1000_VMOLR(vfn);
3608
3609         val = rd32(reg);
3610         if (enable)
3611                 val |= E1000_VMOLR_STRVLAN;
3612         else
3613                 val &= ~(E1000_VMOLR_STRVLAN);
3614         wr32(reg, val);
3615 }
3616
3617 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3618                                  int vfn, bool aupe)
3619 {
3620         struct e1000_hw *hw = &adapter->hw;
3621         u32 vmolr;
3622
3623         /* This register exists only on 82576 and newer so if we are older then
3624          * we should exit and do nothing
3625          */
3626         if (hw->mac.type < e1000_82576)
3627                 return;
3628
3629         vmolr = rd32(E1000_VMOLR(vfn));
3630         if (aupe)
3631                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3632         else
3633                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3634
3635         /* clear all bits that might not be set */
3636         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3637
3638         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3639                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3640         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3641          * multicast packets
3642          */
3643         if (vfn <= adapter->vfs_allocated_count)
3644                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3645
3646         wr32(E1000_VMOLR(vfn), vmolr);
3647 }
3648
3649 /**
3650  *  igb_configure_rx_ring - Configure a receive ring after Reset
3651  *  @adapter: board private structure
3652  *  @ring: receive ring to be configured
3653  *
3654  *  Configure the Rx unit of the MAC after a reset.
3655  **/
3656 void igb_configure_rx_ring(struct igb_adapter *adapter,
3657                            struct igb_ring *ring)
3658 {
3659         struct e1000_hw *hw = &adapter->hw;
3660         u64 rdba = ring->dma;
3661         int reg_idx = ring->reg_idx;
3662         u32 srrctl = 0, rxdctl = 0;
3663
3664         /* disable the queue */
3665         wr32(E1000_RXDCTL(reg_idx), 0);
3666
3667         /* Set DMA base address registers */
3668         wr32(E1000_RDBAL(reg_idx),
3669              rdba & 0x00000000ffffffffULL);
3670         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3671         wr32(E1000_RDLEN(reg_idx),
3672              ring->count * sizeof(union e1000_adv_rx_desc));
3673
3674         /* initialize head and tail */
3675         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3676         wr32(E1000_RDH(reg_idx), 0);
3677         writel(0, ring->tail);
3678
3679         /* set descriptor configuration */
3680         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3681         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3682         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3683         if (hw->mac.type >= e1000_82580)
3684                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3685         /* Only set Drop Enable if we are supporting multiple queues */
3686         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3687                 srrctl |= E1000_SRRCTL_DROP_EN;
3688
3689         wr32(E1000_SRRCTL(reg_idx), srrctl);
3690
3691         /* set filtering for VMDQ pools */
3692         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3693
3694         rxdctl |= IGB_RX_PTHRESH;
3695         rxdctl |= IGB_RX_HTHRESH << 8;
3696         rxdctl |= IGB_RX_WTHRESH << 16;
3697
3698         /* enable receive descriptor fetching */
3699         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3700         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3701 }
3702
3703 /**
3704  *  igb_configure_rx - Configure receive Unit after Reset
3705  *  @adapter: board private structure
3706  *
3707  *  Configure the Rx unit of the MAC after a reset.
3708  **/
3709 static void igb_configure_rx(struct igb_adapter *adapter)
3710 {
3711         int i;
3712
3713         /* set the correct pool for the PF default MAC address in entry 0 */
3714         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3715                          adapter->vfs_allocated_count);
3716
3717         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3718          * the Base and Length of the Rx Descriptor Ring
3719          */
3720         for (i = 0; i < adapter->num_rx_queues; i++)
3721                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3722 }
3723
3724 /**
3725  *  igb_free_tx_resources - Free Tx Resources per Queue
3726  *  @tx_ring: Tx descriptor ring for a specific queue
3727  *
3728  *  Free all transmit software resources
3729  **/
3730 void igb_free_tx_resources(struct igb_ring *tx_ring)
3731 {
3732         igb_clean_tx_ring(tx_ring);
3733
3734         vfree(tx_ring->tx_buffer_info);
3735         tx_ring->tx_buffer_info = NULL;
3736
3737         /* if not set, then don't free */
3738         if (!tx_ring->desc)
3739                 return;
3740
3741         dma_free_coherent(tx_ring->dev, tx_ring->size,
3742                           tx_ring->desc, tx_ring->dma);
3743
3744         tx_ring->desc = NULL;
3745 }
3746
3747 /**
3748  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3749  *  @adapter: board private structure
3750  *
3751  *  Free all transmit software resources
3752  **/
3753 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3754 {
3755         int i;
3756
3757         for (i = 0; i < adapter->num_tx_queues; i++)
3758                 if (adapter->tx_ring[i])
3759                         igb_free_tx_resources(adapter->tx_ring[i]);
3760 }
3761
3762 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3763                                     struct igb_tx_buffer *tx_buffer)
3764 {
3765         if (tx_buffer->skb) {
3766                 dev_kfree_skb_any(tx_buffer->skb);
3767                 if (dma_unmap_len(tx_buffer, len))
3768                         dma_unmap_single(ring->dev,
3769                                          dma_unmap_addr(tx_buffer, dma),
3770                                          dma_unmap_len(tx_buffer, len),
3771                                          DMA_TO_DEVICE);
3772         } else if (dma_unmap_len(tx_buffer, len)) {
3773                 dma_unmap_page(ring->dev,
3774                                dma_unmap_addr(tx_buffer, dma),
3775                                dma_unmap_len(tx_buffer, len),
3776                                DMA_TO_DEVICE);
3777         }
3778         tx_buffer->next_to_watch = NULL;
3779         tx_buffer->skb = NULL;
3780         dma_unmap_len_set(tx_buffer, len, 0);
3781         /* buffer_info must be completely set up in the transmit path */
3782 }
3783
3784 /**
3785  *  igb_clean_tx_ring - Free Tx Buffers
3786  *  @tx_ring: ring to be cleaned
3787  **/
3788 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3789 {
3790         struct igb_tx_buffer *buffer_info;
3791         unsigned long size;
3792         u16 i;
3793
3794         if (!tx_ring->tx_buffer_info)
3795                 return;
3796         /* Free all the Tx ring sk_buffs */
3797
3798         for (i = 0; i < tx_ring->count; i++) {
3799                 buffer_info = &tx_ring->tx_buffer_info[i];
3800                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3801         }
3802
3803         netdev_tx_reset_queue(txring_txq(tx_ring));
3804
3805         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3806         memset(tx_ring->tx_buffer_info, 0, size);
3807
3808         /* Zero out the descriptor ring */
3809         memset(tx_ring->desc, 0, tx_ring->size);
3810
3811         tx_ring->next_to_use = 0;
3812         tx_ring->next_to_clean = 0;
3813 }
3814
3815 /**
3816  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3817  *  @adapter: board private structure
3818  **/
3819 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3820 {
3821         int i;
3822
3823         for (i = 0; i < adapter->num_tx_queues; i++)
3824                 if (adapter->tx_ring[i])
3825                         igb_clean_tx_ring(adapter->tx_ring[i]);
3826 }
3827
3828 /**
3829  *  igb_free_rx_resources - Free Rx Resources
3830  *  @rx_ring: ring to clean the resources from
3831  *
3832  *  Free all receive software resources
3833  **/
3834 void igb_free_rx_resources(struct igb_ring *rx_ring)
3835 {
3836         igb_clean_rx_ring(rx_ring);
3837
3838         vfree(rx_ring->rx_buffer_info);
3839         rx_ring->rx_buffer_info = NULL;
3840
3841         /* if not set, then don't free */
3842         if (!rx_ring->desc)
3843                 return;
3844
3845         dma_free_coherent(rx_ring->dev, rx_ring->size,
3846                           rx_ring->desc, rx_ring->dma);
3847
3848         rx_ring->desc = NULL;
3849 }
3850
3851 /**
3852  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3853  *  @adapter: board private structure
3854  *
3855  *  Free all receive software resources
3856  **/
3857 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3858 {
3859         int i;
3860
3861         for (i = 0; i < adapter->num_rx_queues; i++)
3862                 if (adapter->rx_ring[i])
3863                         igb_free_rx_resources(adapter->rx_ring[i]);
3864 }
3865
3866 /**
3867  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3868  *  @rx_ring: ring to free buffers from
3869  **/
3870 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3871 {
3872         unsigned long size;
3873         u16 i;
3874
3875         if (rx_ring->skb)
3876                 dev_kfree_skb(rx_ring->skb);
3877         rx_ring->skb = NULL;
3878
3879         if (!rx_ring->rx_buffer_info)
3880                 return;
3881
3882         /* Free all the Rx ring sk_buffs */
3883         for (i = 0; i < rx_ring->count; i++) {
3884                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3885
3886                 if (!buffer_info->page)
3887                         continue;
3888
3889                 dma_unmap_page(rx_ring->dev,
3890                                buffer_info->dma,
3891                                PAGE_SIZE,
3892                                DMA_FROM_DEVICE);
3893                 __free_page(buffer_info->page);
3894
3895                 buffer_info->page = NULL;
3896         }
3897
3898         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3899         memset(rx_ring->rx_buffer_info, 0, size);
3900
3901         /* Zero out the descriptor ring */
3902         memset(rx_ring->desc, 0, rx_ring->size);
3903
3904         rx_ring->next_to_alloc = 0;
3905         rx_ring->next_to_clean = 0;
3906         rx_ring->next_to_use = 0;
3907 }
3908
3909 /**
3910  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3911  *  @adapter: board private structure
3912  **/
3913 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3914 {
3915         int i;
3916
3917         for (i = 0; i < adapter->num_rx_queues; i++)
3918                 if (adapter->rx_ring[i])
3919                         igb_clean_rx_ring(adapter->rx_ring[i]);
3920 }
3921
3922 /**
3923  *  igb_set_mac - Change the Ethernet Address of the NIC
3924  *  @netdev: network interface device structure
3925  *  @p: pointer to an address structure
3926  *
3927  *  Returns 0 on success, negative on failure
3928  **/
3929 static int igb_set_mac(struct net_device *netdev, void *p)
3930 {
3931         struct igb_adapter *adapter = netdev_priv(netdev);
3932         struct e1000_hw *hw = &adapter->hw;
3933         struct sockaddr *addr = p;
3934
3935         if (!is_valid_ether_addr(addr->sa_data))
3936                 return -EADDRNOTAVAIL;
3937
3938         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3939         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3940
3941         /* set the correct pool for the new PF MAC address in entry 0 */
3942         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3943                          adapter->vfs_allocated_count);
3944
3945         return 0;
3946 }
3947
3948 /**
3949  *  igb_write_mc_addr_list - write multicast addresses to MTA
3950  *  @netdev: network interface device structure
3951  *
3952  *  Writes multicast address list to the MTA hash table.
3953  *  Returns: -ENOMEM on failure
3954  *           0 on no addresses written
3955  *           X on writing X addresses to MTA
3956  **/
3957 static int igb_write_mc_addr_list(struct net_device *netdev)
3958 {
3959         struct igb_adapter *adapter = netdev_priv(netdev);
3960         struct e1000_hw *hw = &adapter->hw;
3961         struct netdev_hw_addr *ha;
3962         u8  *mta_list;
3963         int i;
3964
3965         if (netdev_mc_empty(netdev)) {
3966                 /* nothing to program, so clear mc list */
3967                 igb_update_mc_addr_list(hw, NULL, 0);
3968                 igb_restore_vf_multicasts(adapter);
3969                 return 0;
3970         }
3971
3972         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3973         if (!mta_list)
3974                 return -ENOMEM;
3975
3976         /* The shared function expects a packed array of only addresses. */
3977         i = 0;
3978         netdev_for_each_mc_addr(ha, netdev)
3979                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3980
3981         igb_update_mc_addr_list(hw, mta_list, i);
3982         kfree(mta_list);
3983
3984         return netdev_mc_count(netdev);
3985 }
3986
3987 /**
3988  *  igb_write_uc_addr_list - write unicast addresses to RAR table
3989  *  @netdev: network interface device structure
3990  *
3991  *  Writes unicast address list to the RAR table.
3992  *  Returns: -ENOMEM on failure/insufficient address space
3993  *           0 on no addresses written
3994  *           X on writing X addresses to the RAR table
3995  **/
3996 static int igb_write_uc_addr_list(struct net_device *netdev)
3997 {
3998         struct igb_adapter *adapter = netdev_priv(netdev);
3999         struct e1000_hw *hw = &adapter->hw;
4000         unsigned int vfn = adapter->vfs_allocated_count;
4001         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
4002         int count = 0;
4003
4004         /* return ENOMEM indicating insufficient memory for addresses */
4005         if (netdev_uc_count(netdev) > rar_entries)
4006                 return -ENOMEM;
4007
4008         if (!netdev_uc_empty(netdev) && rar_entries) {
4009                 struct netdev_hw_addr *ha;
4010
4011                 netdev_for_each_uc_addr(ha, netdev) {
4012                         if (!rar_entries)
4013                                 break;
4014                         igb_rar_set_qsel(adapter, ha->addr,
4015                                          rar_entries--,
4016                                          vfn);
4017                         count++;
4018                 }
4019         }
4020         /* write the addresses in reverse order to avoid write combining */
4021         for (; rar_entries > 0 ; rar_entries--) {
4022                 wr32(E1000_RAH(rar_entries), 0);
4023                 wr32(E1000_RAL(rar_entries), 0);
4024         }
4025         wrfl();
4026
4027         return count;
4028 }
4029
4030 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4031 {
4032         struct e1000_hw *hw = &adapter->hw;
4033         u32 i, pf_id;
4034
4035         switch (hw->mac.type) {
4036         case e1000_i210:
4037         case e1000_i211:
4038         case e1000_i350:
4039                 /* VLAN filtering needed for VLAN prio filter */
4040                 if (adapter->netdev->features & NETIF_F_NTUPLE)
4041                         break;
4042                 /* fall through */
4043         case e1000_82576:
4044         case e1000_82580:
4045         case e1000_i354:
4046                 /* VLAN filtering needed for pool filtering */
4047                 if (adapter->vfs_allocated_count)
4048                         break;
4049                 /* fall through */
4050         default:
4051                 return 1;
4052         }
4053
4054         /* We are already in VLAN promisc, nothing to do */
4055         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4056                 return 0;
4057
4058         if (!adapter->vfs_allocated_count)
4059                 goto set_vfta;
4060
4061         /* Add PF to all active pools */
4062         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4063
4064         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4065                 u32 vlvf = rd32(E1000_VLVF(i));
4066
4067                 vlvf |= BIT(pf_id);
4068                 wr32(E1000_VLVF(i), vlvf);
4069         }
4070
4071 set_vfta:
4072         /* Set all bits in the VLAN filter table array */
4073         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4074                 hw->mac.ops.write_vfta(hw, i, ~0U);
4075
4076         /* Set flag so we don't redo unnecessary work */
4077         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4078
4079         return 0;
4080 }
4081
4082 #define VFTA_BLOCK_SIZE 8
4083 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4084 {
4085         struct e1000_hw *hw = &adapter->hw;
4086         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4087         u32 vid_start = vfta_offset * 32;
4088         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4089         u32 i, vid, word, bits, pf_id;
4090
4091         /* guarantee that we don't scrub out management VLAN */
4092         vid = adapter->mng_vlan_id;
4093         if (vid >= vid_start && vid < vid_end)
4094                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4095
4096         if (!adapter->vfs_allocated_count)
4097                 goto set_vfta;
4098
4099         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4100
4101         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4102                 u32 vlvf = rd32(E1000_VLVF(i));
4103
4104                 /* pull VLAN ID from VLVF */
4105                 vid = vlvf & VLAN_VID_MASK;
4106
4107                 /* only concern ourselves with a certain range */
4108                 if (vid < vid_start || vid >= vid_end)
4109                         continue;
4110
4111                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4112                         /* record VLAN ID in VFTA */
4113                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4114
4115                         /* if PF is part of this then continue */
4116                         if (test_bit(vid, adapter->active_vlans))
4117                                 continue;
4118                 }
4119
4120                 /* remove PF from the pool */
4121                 bits = ~BIT(pf_id);
4122                 bits &= rd32(E1000_VLVF(i));
4123                 wr32(E1000_VLVF(i), bits);
4124         }
4125
4126 set_vfta:
4127         /* extract values from active_vlans and write back to VFTA */
4128         for (i = VFTA_BLOCK_SIZE; i--;) {
4129                 vid = (vfta_offset + i) * 32;
4130                 word = vid / BITS_PER_LONG;
4131                 bits = vid % BITS_PER_LONG;
4132
4133                 vfta[i] |= adapter->active_vlans[word] >> bits;
4134
4135                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4136         }
4137 }
4138
4139 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4140 {
4141         u32 i;
4142
4143         /* We are not in VLAN promisc, nothing to do */
4144         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
4145                 return;
4146
4147         /* Set flag so we don't redo unnecessary work */
4148         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
4149
4150         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
4151                 igb_scrub_vfta(adapter, i);
4152 }
4153
4154 /**
4155  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4156  *  @netdev: network interface device structure
4157  *
4158  *  The set_rx_mode entry point is called whenever the unicast or multicast
4159  *  address lists or the network interface flags are updated.  This routine is
4160  *  responsible for configuring the hardware for proper unicast, multicast,
4161  *  promiscuous mode, and all-multi behavior.
4162  **/
4163 static void igb_set_rx_mode(struct net_device *netdev)
4164 {
4165         struct igb_adapter *adapter = netdev_priv(netdev);
4166         struct e1000_hw *hw = &adapter->hw;
4167         unsigned int vfn = adapter->vfs_allocated_count;
4168         u32 rctl = 0, vmolr = 0;
4169         int count;
4170
4171         /* Check for Promiscuous and All Multicast modes */
4172         if (netdev->flags & IFF_PROMISC) {
4173                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
4174                 vmolr |= E1000_VMOLR_MPME;
4175
4176                 /* enable use of UTA filter to force packets to default pool */
4177                 if (hw->mac.type == e1000_82576)
4178                         vmolr |= E1000_VMOLR_ROPE;
4179         } else {
4180                 if (netdev->flags & IFF_ALLMULTI) {
4181                         rctl |= E1000_RCTL_MPE;
4182                         vmolr |= E1000_VMOLR_MPME;
4183                 } else {
4184                         /* Write addresses to the MTA, if the attempt fails
4185                          * then we should just turn on promiscuous mode so
4186                          * that we can at least receive multicast traffic
4187                          */
4188                         count = igb_write_mc_addr_list(netdev);
4189                         if (count < 0) {
4190                                 rctl |= E1000_RCTL_MPE;
4191                                 vmolr |= E1000_VMOLR_MPME;
4192                         } else if (count) {
4193                                 vmolr |= E1000_VMOLR_ROMPE;
4194                         }
4195                 }
4196         }
4197
4198         /* Write addresses to available RAR registers, if there is not
4199          * sufficient space to store all the addresses then enable
4200          * unicast promiscuous mode
4201          */
4202         count = igb_write_uc_addr_list(netdev);
4203         if (count < 0) {
4204                 rctl |= E1000_RCTL_UPE;
4205                 vmolr |= E1000_VMOLR_ROPE;
4206         }
4207
4208         /* enable VLAN filtering by default */
4209         rctl |= E1000_RCTL_VFE;
4210
4211         /* disable VLAN filtering for modes that require it */
4212         if ((netdev->flags & IFF_PROMISC) ||
4213             (netdev->features & NETIF_F_RXALL)) {
4214                 /* if we fail to set all rules then just clear VFE */
4215                 if (igb_vlan_promisc_enable(adapter))
4216                         rctl &= ~E1000_RCTL_VFE;
4217         } else {
4218                 igb_vlan_promisc_disable(adapter);
4219         }
4220
4221         /* update state of unicast, multicast, and VLAN filtering modes */
4222         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
4223                                      E1000_RCTL_VFE);
4224         wr32(E1000_RCTL, rctl);
4225
4226         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4227          * the VMOLR to enable the appropriate modes.  Without this workaround
4228          * we will have issues with VLAN tag stripping not being done for frames
4229          * that are only arriving because we are the default pool
4230          */
4231         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4232                 return;
4233
4234         /* set UTA to appropriate mode */
4235         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
4236
4237         vmolr |= rd32(E1000_VMOLR(vfn)) &
4238                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4239
4240         /* enable Rx jumbo frames, no need for restriction */
4241         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4242         vmolr |= MAX_JUMBO_FRAME_SIZE | E1000_VMOLR_LPE;
4243
4244         wr32(E1000_VMOLR(vfn), vmolr);
4245         wr32(E1000_RLPML, MAX_JUMBO_FRAME_SIZE);
4246
4247         igb_restore_vf_multicasts(adapter);
4248 }
4249
4250 static void igb_check_wvbr(struct igb_adapter *adapter)
4251 {
4252         struct e1000_hw *hw = &adapter->hw;
4253         u32 wvbr = 0;
4254
4255         switch (hw->mac.type) {
4256         case e1000_82576:
4257         case e1000_i350:
4258                 wvbr = rd32(E1000_WVBR);
4259                 if (!wvbr)
4260                         return;
4261                 break;
4262         default:
4263                 break;
4264         }
4265
4266         adapter->wvbr |= wvbr;
4267 }
4268
4269 #define IGB_STAGGERED_QUEUE_OFFSET 8
4270
4271 static void igb_spoof_check(struct igb_adapter *adapter)
4272 {
4273         int j;
4274
4275         if (!adapter->wvbr)
4276                 return;
4277
4278         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4279                 if (adapter->wvbr & BIT(j) ||
4280                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
4281                         dev_warn(&adapter->pdev->dev,
4282                                 "Spoof event(s) detected on VF %d\n", j);
4283                         adapter->wvbr &=
4284                                 ~(BIT(j) |
4285                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
4286                 }
4287         }
4288 }
4289
4290 /* Need to wait a few seconds after link up to get diagnostic information from
4291  * the phy
4292  */
4293 static void igb_update_phy_info(unsigned long data)
4294 {
4295         struct igb_adapter *adapter = (struct igb_adapter *) data;
4296         igb_get_phy_info(&adapter->hw);
4297 }
4298
4299 /**
4300  *  igb_has_link - check shared code for link and determine up/down
4301  *  @adapter: pointer to driver private info
4302  **/
4303 bool igb_has_link(struct igb_adapter *adapter)
4304 {
4305         struct e1000_hw *hw = &adapter->hw;
4306         bool link_active = false;
4307
4308         /* get_link_status is set on LSC (link status) interrupt or
4309          * rx sequence error interrupt.  get_link_status will stay
4310          * false until the e1000_check_for_link establishes link
4311          * for copper adapters ONLY
4312          */
4313         switch (hw->phy.media_type) {
4314         case e1000_media_type_copper:
4315                 if (!hw->mac.get_link_status)
4316                         return true;
4317         case e1000_media_type_internal_serdes:
4318                 hw->mac.ops.check_for_link(hw);
4319                 link_active = !hw->mac.get_link_status;
4320                 break;
4321         default:
4322         case e1000_media_type_unknown:
4323                 break;
4324         }
4325
4326         if (((hw->mac.type == e1000_i210) ||
4327              (hw->mac.type == e1000_i211)) &&
4328              (hw->phy.id == I210_I_PHY_ID)) {
4329                 if (!netif_carrier_ok(adapter->netdev)) {
4330                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4331                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4332                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4333                         adapter->link_check_timeout = jiffies;
4334                 }
4335         }
4336
4337         return link_active;
4338 }
4339
4340 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4341 {
4342         bool ret = false;
4343         u32 ctrl_ext, thstat;
4344
4345         /* check for thermal sensor event on i350 copper only */
4346         if (hw->mac.type == e1000_i350) {
4347                 thstat = rd32(E1000_THSTAT);
4348                 ctrl_ext = rd32(E1000_CTRL_EXT);
4349
4350                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4351                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4352                         ret = !!(thstat & event);
4353         }
4354
4355         return ret;
4356 }
4357
4358 /**
4359  *  igb_check_lvmmc - check for malformed packets received
4360  *  and indicated in LVMMC register
4361  *  @adapter: pointer to adapter
4362  **/
4363 static void igb_check_lvmmc(struct igb_adapter *adapter)
4364 {
4365         struct e1000_hw *hw = &adapter->hw;
4366         u32 lvmmc;
4367
4368         lvmmc = rd32(E1000_LVMMC);
4369         if (lvmmc) {
4370                 if (unlikely(net_ratelimit())) {
4371                         netdev_warn(adapter->netdev,
4372                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4373                                     lvmmc);
4374                 }
4375         }
4376 }
4377
4378 /**
4379  *  igb_watchdog - Timer Call-back
4380  *  @data: pointer to adapter cast into an unsigned long
4381  **/
4382 static void igb_watchdog(unsigned long data)
4383 {
4384         struct igb_adapter *adapter = (struct igb_adapter *)data;
4385         /* Do the rest outside of interrupt context */
4386         schedule_work(&adapter->watchdog_task);
4387 }
4388
4389 static void igb_watchdog_task(struct work_struct *work)
4390 {
4391         struct igb_adapter *adapter = container_of(work,
4392                                                    struct igb_adapter,
4393                                                    watchdog_task);
4394         struct e1000_hw *hw = &adapter->hw;
4395         struct e1000_phy_info *phy = &hw->phy;
4396         struct net_device *netdev = adapter->netdev;
4397         u32 link;
4398         int i;
4399         u32 connsw;
4400         u16 phy_data, retry_count = 20;
4401
4402         link = igb_has_link(adapter);
4403
4404         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4405                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4406                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4407                 else
4408                         link = false;
4409         }
4410
4411         /* Force link down if we have fiber to swap to */
4412         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4413                 if (hw->phy.media_type == e1000_media_type_copper) {
4414                         connsw = rd32(E1000_CONNSW);
4415                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4416                                 link = 0;
4417                 }
4418         }
4419         if (link) {
4420                 /* Perform a reset if the media type changed. */
4421                 if (hw->dev_spec._82575.media_changed) {
4422                         hw->dev_spec._82575.media_changed = false;
4423                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4424                         igb_reset(adapter);
4425                 }
4426                 /* Cancel scheduled suspend requests. */
4427                 pm_runtime_resume(netdev->dev.parent);
4428
4429                 if (!netif_carrier_ok(netdev)) {
4430                         u32 ctrl;
4431
4432                         hw->mac.ops.get_speed_and_duplex(hw,
4433                                                          &adapter->link_speed,
4434                                                          &adapter->link_duplex);
4435
4436                         ctrl = rd32(E1000_CTRL);
4437                         /* Links status message must follow this format */
4438                         netdev_info(netdev,
4439                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4440                                netdev->name,
4441                                adapter->link_speed,
4442                                adapter->link_duplex == FULL_DUPLEX ?
4443                                "Full" : "Half",
4444                                (ctrl & E1000_CTRL_TFCE) &&
4445                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4446                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4447                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4448
4449                         /* disable EEE if enabled */
4450                         if ((adapter->flags & IGB_FLAG_EEE) &&
4451                                 (adapter->link_duplex == HALF_DUPLEX)) {
4452                                 dev_info(&adapter->pdev->dev,
4453                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4454                                 adapter->hw.dev_spec._82575.eee_disable = true;
4455                                 adapter->flags &= ~IGB_FLAG_EEE;
4456                         }
4457
4458                         /* check if SmartSpeed worked */
4459                         igb_check_downshift(hw);
4460                         if (phy->speed_downgraded)
4461                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4462
4463                         /* check for thermal sensor event */
4464                         if (igb_thermal_sensor_event(hw,
4465                             E1000_THSTAT_LINK_THROTTLE))
4466                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4467
4468                         /* adjust timeout factor according to speed/duplex */
4469                         adapter->tx_timeout_factor = 1;
4470                         switch (adapter->link_speed) {
4471                         case SPEED_10:
4472                                 adapter->tx_timeout_factor = 14;
4473                                 break;
4474                         case SPEED_100:
4475                                 /* maybe add some timeout factor ? */
4476                                 break;
4477                         }
4478
4479                         if (adapter->link_speed != SPEED_1000)
4480                                 goto no_wait;
4481
4482                         /* wait for Remote receiver status OK */
4483 retry_read_status:
4484                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
4485                                               &phy_data)) {
4486                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
4487                                     retry_count) {
4488                                         msleep(100);
4489                                         retry_count--;
4490                                         goto retry_read_status;
4491                                 } else if (!retry_count) {
4492                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
4493                                 }
4494                         } else {
4495                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
4496                         }
4497 no_wait:
4498                         netif_carrier_on(netdev);
4499
4500                         igb_ping_all_vfs(adapter);
4501                         igb_check_vf_rate_limit(adapter);
4502
4503                         /* link state has changed, schedule phy info update */
4504                         if (!test_bit(__IGB_DOWN, &adapter->state))
4505                                 mod_timer(&adapter->phy_info_timer,
4506                                           round_jiffies(jiffies + 2 * HZ));
4507                 }
4508         } else {
4509                 if (netif_carrier_ok(netdev)) {
4510                         adapter->link_speed = 0;
4511                         adapter->link_duplex = 0;
4512
4513                         /* check for thermal sensor event */
4514                         if (igb_thermal_sensor_event(hw,
4515                             E1000_THSTAT_PWR_DOWN)) {
4516                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4517                         }
4518
4519                         /* Links status message must follow this format */
4520                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4521                                netdev->name);
4522                         netif_carrier_off(netdev);
4523
4524                         igb_ping_all_vfs(adapter);
4525
4526                         /* link state has changed, schedule phy info update */
4527                         if (!test_bit(__IGB_DOWN, &adapter->state))
4528                                 mod_timer(&adapter->phy_info_timer,
4529                                           round_jiffies(jiffies + 2 * HZ));
4530
4531                         /* link is down, time to check for alternate media */
4532                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4533                                 igb_check_swap_media(adapter);
4534                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4535                                         schedule_work(&adapter->reset_task);
4536                                         /* return immediately */
4537                                         return;
4538                                 }
4539                         }
4540                         pm_schedule_suspend(netdev->dev.parent,
4541                                             MSEC_PER_SEC * 5);
4542
4543                 /* also check for alternate media here */
4544                 } else if (!netif_carrier_ok(netdev) &&
4545                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4546                         igb_check_swap_media(adapter);
4547                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4548                                 schedule_work(&adapter->reset_task);
4549                                 /* return immediately */
4550                                 return;
4551                         }
4552                 }
4553         }
4554
4555         spin_lock(&adapter->stats64_lock);
4556         igb_update_stats(adapter, &adapter->stats64);
4557         spin_unlock(&adapter->stats64_lock);
4558
4559         for (i = 0; i < adapter->num_tx_queues; i++) {
4560                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4561                 if (!netif_carrier_ok(netdev)) {
4562                         /* We've lost link, so the controller stops DMA,
4563                          * but we've got queued Tx work that's never going
4564                          * to get done, so reset controller to flush Tx.
4565                          * (Do the reset outside of interrupt context).
4566                          */
4567                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4568                                 adapter->tx_timeout_count++;
4569                                 schedule_work(&adapter->reset_task);
4570                                 /* return immediately since reset is imminent */
4571                                 return;
4572                         }
4573                 }
4574
4575                 /* Force detection of hung controller every watchdog period */
4576                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4577         }
4578
4579         /* Cause software interrupt to ensure Rx ring is cleaned */
4580         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4581                 u32 eics = 0;
4582
4583                 for (i = 0; i < adapter->num_q_vectors; i++)
4584                         eics |= adapter->q_vector[i]->eims_value;
4585                 wr32(E1000_EICS, eics);
4586         } else {
4587                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4588         }
4589
4590         igb_spoof_check(adapter);
4591         igb_ptp_rx_hang(adapter);
4592
4593         /* Check LVMMC register on i350/i354 only */
4594         if ((adapter->hw.mac.type == e1000_i350) ||
4595             (adapter->hw.mac.type == e1000_i354))
4596                 igb_check_lvmmc(adapter);
4597
4598         /* Reset the timer */
4599         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4600                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4601                         mod_timer(&adapter->watchdog_timer,
4602                                   round_jiffies(jiffies +  HZ));
4603                 else
4604                         mod_timer(&adapter->watchdog_timer,
4605                                   round_jiffies(jiffies + 2 * HZ));
4606         }
4607 }
4608
4609 enum latency_range {
4610         lowest_latency = 0,
4611         low_latency = 1,
4612         bulk_latency = 2,
4613         latency_invalid = 255
4614 };
4615
4616 /**
4617  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4618  *  @q_vector: pointer to q_vector
4619  *
4620  *  Stores a new ITR value based on strictly on packet size.  This
4621  *  algorithm is less sophisticated than that used in igb_update_itr,
4622  *  due to the difficulty of synchronizing statistics across multiple
4623  *  receive rings.  The divisors and thresholds used by this function
4624  *  were determined based on theoretical maximum wire speed and testing
4625  *  data, in order to minimize response time while increasing bulk
4626  *  throughput.
4627  *  This functionality is controlled by ethtool's coalescing settings.
4628  *  NOTE:  This function is called only when operating in a multiqueue
4629  *         receive environment.
4630  **/
4631 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4632 {
4633         int new_val = q_vector->itr_val;
4634         int avg_wire_size = 0;
4635         struct igb_adapter *adapter = q_vector->adapter;
4636         unsigned int packets;
4637
4638         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4639          * ints/sec - ITR timer value of 120 ticks.
4640          */
4641         if (adapter->link_speed != SPEED_1000) {
4642                 new_val = IGB_4K_ITR;
4643                 goto set_itr_val;
4644         }
4645
4646         packets = q_vector->rx.total_packets;
4647         if (packets)
4648                 avg_wire_size = q_vector->rx.total_bytes / packets;
4649
4650         packets = q_vector->tx.total_packets;
4651         if (packets)
4652                 avg_wire_size = max_t(u32, avg_wire_size,
4653                                       q_vector->tx.total_bytes / packets);
4654
4655         /* if avg_wire_size isn't set no work was done */
4656         if (!avg_wire_size)
4657                 goto clear_counts;
4658
4659         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4660         avg_wire_size += 24;
4661
4662         /* Don't starve jumbo frames */
4663         avg_wire_size = min(avg_wire_size, 3000);
4664
4665         /* Give a little boost to mid-size frames */
4666         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4667                 new_val = avg_wire_size / 3;
4668         else
4669                 new_val = avg_wire_size / 2;
4670
4671         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4672         if (new_val < IGB_20K_ITR &&
4673             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4674              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4675                 new_val = IGB_20K_ITR;
4676
4677 set_itr_val:
4678         if (new_val != q_vector->itr_val) {
4679                 q_vector->itr_val = new_val;
4680                 q_vector->set_itr = 1;
4681         }
4682 clear_counts:
4683         q_vector->rx.total_bytes = 0;
4684         q_vector->rx.total_packets = 0;
4685         q_vector->tx.total_bytes = 0;
4686         q_vector->tx.total_packets = 0;
4687 }
4688
4689 /**
4690  *  igb_update_itr - update the dynamic ITR value based on statistics
4691  *  @q_vector: pointer to q_vector
4692  *  @ring_container: ring info to update the itr for
4693  *
4694  *  Stores a new ITR value based on packets and byte
4695  *  counts during the last interrupt.  The advantage of per interrupt
4696  *  computation is faster updates and more accurate ITR for the current
4697  *  traffic pattern.  Constants in this function were computed
4698  *  based on theoretical maximum wire speed and thresholds were set based
4699  *  on testing data as well as attempting to minimize response time
4700  *  while increasing bulk throughput.
4701  *  This functionality is controlled by ethtool's coalescing settings.
4702  *  NOTE:  These calculations are only valid when operating in a single-
4703  *         queue environment.
4704  **/
4705 static void igb_update_itr(struct igb_q_vector *q_vector,
4706                            struct igb_ring_container *ring_container)
4707 {
4708         unsigned int packets = ring_container->total_packets;
4709         unsigned int bytes = ring_container->total_bytes;
4710         u8 itrval = ring_container->itr;
4711
4712         /* no packets, exit with status unchanged */
4713         if (packets == 0)
4714                 return;
4715
4716         switch (itrval) {
4717         case lowest_latency:
4718                 /* handle TSO and jumbo frames */
4719                 if (bytes/packets > 8000)
4720                         itrval = bulk_latency;
4721                 else if ((packets < 5) && (bytes > 512))
4722                         itrval = low_latency;
4723                 break;
4724         case low_latency:  /* 50 usec aka 20000 ints/s */
4725                 if (bytes > 10000) {
4726                         /* this if handles the TSO accounting */
4727                         if (bytes/packets > 8000)
4728                                 itrval = bulk_latency;
4729                         else if ((packets < 10) || ((bytes/packets) > 1200))
4730                                 itrval = bulk_latency;
4731                         else if ((packets > 35))
4732                                 itrval = lowest_latency;
4733                 } else if (bytes/packets > 2000) {
4734                         itrval = bulk_latency;
4735                 } else if (packets <= 2 && bytes < 512) {
4736                         itrval = lowest_latency;
4737                 }
4738                 break;
4739         case bulk_latency: /* 250 usec aka 4000 ints/s */
4740                 if (bytes > 25000) {
4741                         if (packets > 35)
4742                                 itrval = low_latency;
4743                 } else if (bytes < 1500) {
4744                         itrval = low_latency;
4745                 }
4746                 break;
4747         }
4748
4749         /* clear work counters since we have the values we need */
4750         ring_container->total_bytes = 0;
4751         ring_container->total_packets = 0;
4752
4753         /* write updated itr to ring container */
4754         ring_container->itr = itrval;
4755 }
4756
4757 static void igb_set_itr(struct igb_q_vector *q_vector)
4758 {
4759         struct igb_adapter *adapter = q_vector->adapter;
4760         u32 new_itr = q_vector->itr_val;
4761         u8 current_itr = 0;
4762
4763         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4764         if (adapter->link_speed != SPEED_1000) {
4765                 current_itr = 0;
4766                 new_itr = IGB_4K_ITR;
4767                 goto set_itr_now;
4768         }
4769
4770         igb_update_itr(q_vector, &q_vector->tx);
4771         igb_update_itr(q_vector, &q_vector->rx);
4772
4773         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4774
4775         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4776         if (current_itr == lowest_latency &&
4777             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4778              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4779                 current_itr = low_latency;
4780
4781         switch (current_itr) {
4782         /* counts and packets in update_itr are dependent on these numbers */
4783         case lowest_latency:
4784                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4785                 break;
4786         case low_latency:
4787                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4788                 break;
4789         case bulk_latency:
4790                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4791                 break;
4792         default:
4793                 break;
4794         }
4795
4796 set_itr_now:
4797         if (new_itr != q_vector->itr_val) {
4798                 /* this attempts to bias the interrupt rate towards Bulk
4799                  * by adding intermediate steps when interrupt rate is
4800                  * increasing
4801                  */
4802                 new_itr = new_itr > q_vector->itr_val ?
4803                           max((new_itr * q_vector->itr_val) /
4804                           (new_itr + (q_vector->itr_val >> 2)),
4805                           new_itr) : new_itr;
4806                 /* Don't write the value here; it resets the adapter's
4807                  * internal timer, and causes us to delay far longer than
4808                  * we should between interrupts.  Instead, we write the ITR
4809                  * value at the beginning of the next interrupt so the timing
4810                  * ends up being correct.
4811                  */
4812                 q_vector->itr_val = new_itr;
4813                 q_vector->set_itr = 1;
4814         }
4815 }
4816
4817 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4818                             u32 type_tucmd, u32 mss_l4len_idx)
4819 {
4820         struct e1000_adv_tx_context_desc *context_desc;
4821         u16 i = tx_ring->next_to_use;
4822
4823         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4824
4825         i++;
4826         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4827
4828         /* set bits to identify this as an advanced context descriptor */
4829         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4830
4831         /* For 82575, context index must be unique per ring. */
4832         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4833                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4834
4835         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4836         context_desc->seqnum_seed       = 0;
4837         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4838         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4839 }
4840
4841 static int igb_tso(struct igb_ring *tx_ring,
4842                    struct igb_tx_buffer *first,
4843                    u8 *hdr_len)
4844 {
4845         struct sk_buff *skb = first->skb;
4846         u32 vlan_macip_lens, type_tucmd;
4847         u32 mss_l4len_idx, l4len;
4848         int err;
4849
4850         if (skb->ip_summed != CHECKSUM_PARTIAL)
4851                 return 0;
4852
4853         if (!skb_is_gso(skb))
4854                 return 0;
4855
4856         err = skb_cow_head(skb, 0);
4857         if (err < 0)
4858                 return err;
4859
4860         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4861         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4862
4863         if (first->protocol == htons(ETH_P_IP)) {
4864                 struct iphdr *iph = ip_hdr(skb);
4865                 iph->tot_len = 0;
4866                 iph->check = 0;
4867                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4868                                                          iph->daddr, 0,
4869                                                          IPPROTO_TCP,
4870                                                          0);
4871                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4872                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4873                                    IGB_TX_FLAGS_CSUM |
4874                                    IGB_TX_FLAGS_IPV4;
4875         } else if (skb_is_gso_v6(skb)) {
4876                 ipv6_hdr(skb)->payload_len = 0;
4877                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4878                                                        &ipv6_hdr(skb)->daddr,
4879                                                        0, IPPROTO_TCP, 0);
4880                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4881                                    IGB_TX_FLAGS_CSUM;
4882         }
4883
4884         /* compute header lengths */
4885         l4len = tcp_hdrlen(skb);
4886         *hdr_len = skb_transport_offset(skb) + l4len;
4887
4888         /* update gso size and bytecount with header size */
4889         first->gso_segs = skb_shinfo(skb)->gso_segs;
4890         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4891
4892         /* MSS L4LEN IDX */
4893         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4894         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4895
4896         /* VLAN MACLEN IPLEN */
4897         vlan_macip_lens = skb_network_header_len(skb);
4898         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4899         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4900
4901         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4902
4903         return 1;
4904 }
4905
4906 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
4907 {
4908         unsigned int offset = 0;
4909
4910         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
4911
4912         return offset == skb_checksum_start_offset(skb);
4913 }
4914
4915 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4916 {
4917         struct sk_buff *skb = first->skb;
4918         u32 vlan_macip_lens = 0;
4919         u32 type_tucmd = 0;
4920
4921         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4922 csum_failed:
4923                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4924                         return;
4925                 goto no_csum;
4926         }
4927
4928         switch (skb->csum_offset) {
4929         case offsetof(struct tcphdr, check):
4930                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4931                 /* fall through */
4932         case offsetof(struct udphdr, check):
4933                 break;
4934         case offsetof(struct sctphdr, checksum):
4935                 /* validate that this is actually an SCTP request */
4936                 if (((first->protocol == htons(ETH_P_IP)) &&
4937                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
4938                     ((first->protocol == htons(ETH_P_IPV6)) &&
4939                      igb_ipv6_csum_is_sctp(skb))) {
4940                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
4941                         break;
4942                 }
4943         default:
4944                 skb_checksum_help(skb);
4945                 goto csum_failed;
4946         }
4947
4948         /* update TX checksum flag */
4949         first->tx_flags |= IGB_TX_FLAGS_CSUM;
4950         vlan_macip_lens = skb_checksum_start_offset(skb) -
4951                           skb_network_offset(skb);
4952 no_csum:
4953         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4954         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4955
4956         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
4957 }
4958
4959 #define IGB_SET_FLAG(_input, _flag, _result) \
4960         ((_flag <= _result) ? \
4961          ((u32)(_input & _flag) * (_result / _flag)) : \
4962          ((u32)(_input & _flag) / (_flag / _result)))
4963
4964 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4965 {
4966         /* set type for advanced descriptor with frame checksum insertion */
4967         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4968                        E1000_ADVTXD_DCMD_DEXT |
4969                        E1000_ADVTXD_DCMD_IFCS;
4970
4971         /* set HW vlan bit if vlan is present */
4972         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4973                                  (E1000_ADVTXD_DCMD_VLE));
4974
4975         /* set segmentation bits for TSO */
4976         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4977                                  (E1000_ADVTXD_DCMD_TSE));
4978
4979         /* set timestamp bit if present */
4980         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4981                                  (E1000_ADVTXD_MAC_TSTAMP));
4982
4983         /* insert frame checksum */
4984         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4985
4986         return cmd_type;
4987 }
4988
4989 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4990                                  union e1000_adv_tx_desc *tx_desc,
4991                                  u32 tx_flags, unsigned int paylen)
4992 {
4993         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4994
4995         /* 82575 requires a unique index per ring */
4996         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4997                 olinfo_status |= tx_ring->reg_idx << 4;
4998
4999         /* insert L4 checksum */
5000         olinfo_status |= IGB_SET_FLAG(tx_flags,
5001                                       IGB_TX_FLAGS_CSUM,
5002                                       (E1000_TXD_POPTS_TXSM << 8));
5003
5004         /* insert IPv4 checksum */
5005         olinfo_status |= IGB_SET_FLAG(tx_flags,
5006                                       IGB_TX_FLAGS_IPV4,
5007                                       (E1000_TXD_POPTS_IXSM << 8));
5008
5009         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5010 }
5011
5012 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5013 {
5014         struct net_device *netdev = tx_ring->netdev;
5015
5016         netif_stop_subqueue(netdev, tx_ring->queue_index);
5017
5018         /* Herbert's original patch had:
5019          *  smp_mb__after_netif_stop_queue();
5020          * but since that doesn't exist yet, just open code it.
5021          */
5022         smp_mb();
5023
5024         /* We need to check again in a case another CPU has just
5025          * made room available.
5026          */
5027         if (igb_desc_unused(tx_ring) < size)
5028                 return -EBUSY;
5029
5030         /* A reprieve! */
5031         netif_wake_subqueue(netdev, tx_ring->queue_index);
5032
5033         u64_stats_update_begin(&tx_ring->tx_syncp2);
5034         tx_ring->tx_stats.restart_queue2++;
5035         u64_stats_update_end(&tx_ring->tx_syncp2);
5036
5037         return 0;
5038 }
5039
5040 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5041 {
5042         if (igb_desc_unused(tx_ring) >= size)
5043                 return 0;
5044         return __igb_maybe_stop_tx(tx_ring, size);
5045 }
5046
5047 static void igb_tx_map(struct igb_ring *tx_ring,
5048                        struct igb_tx_buffer *first,
5049                        const u8 hdr_len)
5050 {
5051         struct sk_buff *skb = first->skb;
5052         struct igb_tx_buffer *tx_buffer;
5053         union e1000_adv_tx_desc *tx_desc;
5054         struct skb_frag_struct *frag;
5055         dma_addr_t dma;
5056         unsigned int data_len, size;
5057         u32 tx_flags = first->tx_flags;
5058         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5059         u16 i = tx_ring->next_to_use;
5060
5061         tx_desc = IGB_TX_DESC(tx_ring, i);
5062
5063         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5064
5065         size = skb_headlen(skb);
5066         data_len = skb->data_len;
5067
5068         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5069
5070         tx_buffer = first;
5071
5072         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5073                 if (dma_mapping_error(tx_ring->dev, dma))
5074                         goto dma_error;
5075
5076                 /* record length, and DMA address */
5077                 dma_unmap_len_set(tx_buffer, len, size);
5078                 dma_unmap_addr_set(tx_buffer, dma, dma);
5079
5080                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5081
5082                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5083                         tx_desc->read.cmd_type_len =
5084                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5085
5086                         i++;
5087                         tx_desc++;
5088                         if (i == tx_ring->count) {
5089                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5090                                 i = 0;
5091                         }
5092                         tx_desc->read.olinfo_status = 0;
5093
5094                         dma += IGB_MAX_DATA_PER_TXD;
5095                         size -= IGB_MAX_DATA_PER_TXD;
5096
5097                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5098                 }
5099
5100                 if (likely(!data_len))
5101                         break;
5102
5103                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5104
5105                 i++;
5106                 tx_desc++;
5107                 if (i == tx_ring->count) {
5108                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5109                         i = 0;
5110                 }
5111                 tx_desc->read.olinfo_status = 0;
5112
5113                 size = skb_frag_size(frag);
5114                 data_len -= size;
5115
5116                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5117                                        size, DMA_TO_DEVICE);
5118
5119                 tx_buffer = &tx_ring->tx_buffer_info[i];
5120         }
5121
5122         /* write last descriptor with RS and EOP bits */
5123         cmd_type |= size | IGB_TXD_DCMD;
5124         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5125
5126         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5127
5128         /* set the timestamp */
5129         first->time_stamp = jiffies;
5130
5131         /* Force memory writes to complete before letting h/w know there
5132          * are new descriptors to fetch.  (Only applicable for weak-ordered
5133          * memory model archs, such as IA-64).
5134          *
5135          * We also need this memory barrier to make certain all of the
5136          * status bits have been updated before next_to_watch is written.
5137          */
5138         wmb();
5139
5140         /* set next_to_watch value indicating a packet is present */
5141         first->next_to_watch = tx_desc;
5142
5143         i++;
5144         if (i == tx_ring->count)
5145                 i = 0;
5146
5147         tx_ring->next_to_use = i;
5148
5149         /* Make sure there is space in the ring for the next send. */
5150         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5151
5152         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
5153                 writel(i, tx_ring->tail);
5154
5155                 /* we need this if more than one processor can write to our tail
5156                  * at a time, it synchronizes IO on IA64/Altix systems
5157                  */
5158                 mmiowb();
5159         }
5160         return;
5161
5162 dma_error:
5163         dev_err(tx_ring->dev, "TX DMA map failed\n");
5164
5165         /* clear dma mappings for failed tx_buffer_info map */
5166         for (;;) {
5167                 tx_buffer = &tx_ring->tx_buffer_info[i];
5168                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5169                 if (tx_buffer == first)
5170                         break;
5171                 if (i == 0)
5172                         i = tx_ring->count;
5173                 i--;
5174         }
5175
5176         tx_ring->next_to_use = i;
5177 }
5178
5179 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5180                                 struct igb_ring *tx_ring)
5181 {
5182         struct igb_tx_buffer *first;
5183         int tso;
5184         u32 tx_flags = 0;
5185         unsigned short f;
5186         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5187         __be16 protocol = vlan_get_protocol(skb);
5188         u8 hdr_len = 0;
5189
5190         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5191          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5192          *       + 2 desc gap to keep tail from touching head,
5193          *       + 1 desc for context descriptor,
5194          * otherwise try next time
5195          */
5196         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5197                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5198
5199         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5200                 /* this is a hard error */
5201                 return NETDEV_TX_BUSY;
5202         }
5203
5204         /* record the location of the first descriptor for this packet */
5205         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5206         first->skb = skb;
5207         first->bytecount = skb->len;
5208         first->gso_segs = 1;
5209
5210         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5211                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5212
5213                 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5214                                            &adapter->state)) {
5215                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5216                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5217
5218                         adapter->ptp_tx_skb = skb_get(skb);
5219                         adapter->ptp_tx_start = jiffies;
5220                         if (adapter->hw.mac.type == e1000_82576)
5221                                 schedule_work(&adapter->ptp_tx_work);
5222                 }
5223         }
5224
5225         skb_tx_timestamp(skb);
5226
5227         if (skb_vlan_tag_present(skb)) {
5228                 tx_flags |= IGB_TX_FLAGS_VLAN;
5229                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5230         }
5231
5232         /* record initial flags and protocol */
5233         first->tx_flags = tx_flags;
5234         first->protocol = protocol;
5235
5236         tso = igb_tso(tx_ring, first, &hdr_len);
5237         if (tso < 0)
5238                 goto out_drop;
5239         else if (!tso)
5240                 igb_tx_csum(tx_ring, first);
5241
5242         igb_tx_map(tx_ring, first, hdr_len);
5243
5244         return NETDEV_TX_OK;
5245
5246 out_drop:
5247         igb_unmap_and_free_tx_resource(tx_ring, first);
5248
5249         return NETDEV_TX_OK;
5250 }
5251
5252 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5253                                                     struct sk_buff *skb)
5254 {
5255         unsigned int r_idx = skb->queue_mapping;
5256
5257         if (r_idx >= adapter->num_tx_queues)
5258                 r_idx = r_idx % adapter->num_tx_queues;
5259
5260         return adapter->tx_ring[r_idx];
5261 }
5262
5263 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5264                                   struct net_device *netdev)
5265 {
5266         struct igb_adapter *adapter = netdev_priv(netdev);
5267
5268         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5269          * in order to meet this minimum size requirement.
5270          */
5271         if (skb_put_padto(skb, 17))
5272                 return NETDEV_TX_OK;
5273
5274         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5275 }
5276
5277 /**
5278  *  igb_tx_timeout - Respond to a Tx Hang
5279  *  @netdev: network interface device structure
5280  **/
5281 static void igb_tx_timeout(struct net_device *netdev)
5282 {
5283         struct igb_adapter *adapter = netdev_priv(netdev);
5284         struct e1000_hw *hw = &adapter->hw;
5285
5286         /* Do the reset outside of interrupt context */
5287         adapter->tx_timeout_count++;
5288
5289         if (hw->mac.type >= e1000_82580)
5290                 hw->dev_spec._82575.global_device_reset = true;
5291
5292         schedule_work(&adapter->reset_task);
5293         wr32(E1000_EICS,
5294              (adapter->eims_enable_mask & ~adapter->eims_other));
5295 }
5296
5297 static void igb_reset_task(struct work_struct *work)
5298 {
5299         struct igb_adapter *adapter;
5300         adapter = container_of(work, struct igb_adapter, reset_task);
5301
5302         igb_dump(adapter);
5303         netdev_err(adapter->netdev, "Reset adapter\n");
5304         igb_reinit_locked(adapter);
5305 }
5306
5307 /**
5308  *  igb_get_stats64 - Get System Network Statistics
5309  *  @netdev: network interface device structure
5310  *  @stats: rtnl_link_stats64 pointer
5311  **/
5312 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5313                                                 struct rtnl_link_stats64 *stats)
5314 {
5315         struct igb_adapter *adapter = netdev_priv(netdev);
5316
5317         spin_lock(&adapter->stats64_lock);
5318         igb_update_stats(adapter, &adapter->stats64);
5319         memcpy(stats, &adapter->stats64, sizeof(*stats));
5320         spin_unlock(&adapter->stats64_lock);
5321
5322         return stats;
5323 }
5324
5325 /**
5326  *  igb_change_mtu - Change the Maximum Transfer Unit
5327  *  @netdev: network interface device structure
5328  *  @new_mtu: new value for maximum frame size
5329  *
5330  *  Returns 0 on success, negative on failure
5331  **/
5332 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5333 {
5334         struct igb_adapter *adapter = netdev_priv(netdev);
5335         struct pci_dev *pdev = adapter->pdev;
5336         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5337
5338         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5339                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5340                 return -EINVAL;
5341         }
5342
5343 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5344         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5345                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5346                 return -EINVAL;
5347         }
5348
5349         /* adjust max frame to be at least the size of a standard frame */
5350         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5351                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5352
5353         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5354                 usleep_range(1000, 2000);
5355
5356         /* igb_down has a dependency on max_frame_size */
5357         adapter->max_frame_size = max_frame;
5358
5359         if (netif_running(netdev))
5360                 igb_down(adapter);
5361
5362         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5363                  netdev->mtu, new_mtu);
5364         netdev->mtu = new_mtu;
5365
5366         if (netif_running(netdev))
5367                 igb_up(adapter);
5368         else
5369                 igb_reset(adapter);
5370
5371         clear_bit(__IGB_RESETTING, &adapter->state);
5372
5373         return 0;
5374 }
5375
5376 /**
5377  *  igb_update_stats - Update the board statistics counters
5378  *  @adapter: board private structure
5379  **/
5380 void igb_update_stats(struct igb_adapter *adapter,
5381                       struct rtnl_link_stats64 *net_stats)
5382 {
5383         struct e1000_hw *hw = &adapter->hw;
5384         struct pci_dev *pdev = adapter->pdev;
5385         u32 reg, mpc;
5386         int i;
5387         u64 bytes, packets;
5388         unsigned int start;
5389         u64 _bytes, _packets;
5390
5391         /* Prevent stats update while adapter is being reset, or if the pci
5392          * connection is down.
5393          */
5394         if (adapter->link_speed == 0)
5395                 return;
5396         if (pci_channel_offline(pdev))
5397                 return;
5398
5399         bytes = 0;
5400         packets = 0;
5401
5402         rcu_read_lock();
5403         for (i = 0; i < adapter->num_rx_queues; i++) {
5404                 struct igb_ring *ring = adapter->rx_ring[i];
5405                 u32 rqdpc = rd32(E1000_RQDPC(i));
5406                 if (hw->mac.type >= e1000_i210)
5407                         wr32(E1000_RQDPC(i), 0);
5408
5409                 if (rqdpc) {
5410                         ring->rx_stats.drops += rqdpc;
5411                         net_stats->rx_fifo_errors += rqdpc;
5412                 }
5413
5414                 do {
5415                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5416                         _bytes = ring->rx_stats.bytes;
5417                         _packets = ring->rx_stats.packets;
5418                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5419                 bytes += _bytes;
5420                 packets += _packets;
5421         }
5422
5423         net_stats->rx_bytes = bytes;
5424         net_stats->rx_packets = packets;
5425
5426         bytes = 0;
5427         packets = 0;
5428         for (i = 0; i < adapter->num_tx_queues; i++) {
5429                 struct igb_ring *ring = adapter->tx_ring[i];
5430                 do {
5431                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5432                         _bytes = ring->tx_stats.bytes;
5433                         _packets = ring->tx_stats.packets;
5434                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5435                 bytes += _bytes;
5436                 packets += _packets;
5437         }
5438         net_stats->tx_bytes = bytes;
5439         net_stats->tx_packets = packets;
5440         rcu_read_unlock();
5441
5442         /* read stats registers */
5443         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5444         adapter->stats.gprc += rd32(E1000_GPRC);
5445         adapter->stats.gorc += rd32(E1000_GORCL);
5446         rd32(E1000_GORCH); /* clear GORCL */
5447         adapter->stats.bprc += rd32(E1000_BPRC);
5448         adapter->stats.mprc += rd32(E1000_MPRC);
5449         adapter->stats.roc += rd32(E1000_ROC);
5450
5451         adapter->stats.prc64 += rd32(E1000_PRC64);
5452         adapter->stats.prc127 += rd32(E1000_PRC127);
5453         adapter->stats.prc255 += rd32(E1000_PRC255);
5454         adapter->stats.prc511 += rd32(E1000_PRC511);
5455         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5456         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5457         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5458         adapter->stats.sec += rd32(E1000_SEC);
5459
5460         mpc = rd32(E1000_MPC);
5461         adapter->stats.mpc += mpc;
5462         net_stats->rx_fifo_errors += mpc;
5463         adapter->stats.scc += rd32(E1000_SCC);
5464         adapter->stats.ecol += rd32(E1000_ECOL);
5465         adapter->stats.mcc += rd32(E1000_MCC);
5466         adapter->stats.latecol += rd32(E1000_LATECOL);
5467         adapter->stats.dc += rd32(E1000_DC);
5468         adapter->stats.rlec += rd32(E1000_RLEC);
5469         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5470         adapter->stats.xontxc += rd32(E1000_XONTXC);
5471         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5472         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5473         adapter->stats.fcruc += rd32(E1000_FCRUC);
5474         adapter->stats.gptc += rd32(E1000_GPTC);
5475         adapter->stats.gotc += rd32(E1000_GOTCL);
5476         rd32(E1000_GOTCH); /* clear GOTCL */
5477         adapter->stats.rnbc += rd32(E1000_RNBC);
5478         adapter->stats.ruc += rd32(E1000_RUC);
5479         adapter->stats.rfc += rd32(E1000_RFC);
5480         adapter->stats.rjc += rd32(E1000_RJC);
5481         adapter->stats.tor += rd32(E1000_TORH);
5482         adapter->stats.tot += rd32(E1000_TOTH);
5483         adapter->stats.tpr += rd32(E1000_TPR);
5484
5485         adapter->stats.ptc64 += rd32(E1000_PTC64);
5486         adapter->stats.ptc127 += rd32(E1000_PTC127);
5487         adapter->stats.ptc255 += rd32(E1000_PTC255);
5488         adapter->stats.ptc511 += rd32(E1000_PTC511);
5489         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5490         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5491
5492         adapter->stats.mptc += rd32(E1000_MPTC);
5493         adapter->stats.bptc += rd32(E1000_BPTC);
5494
5495         adapter->stats.tpt += rd32(E1000_TPT);
5496         adapter->stats.colc += rd32(E1000_COLC);
5497
5498         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5499         /* read internal phy specific stats */
5500         reg = rd32(E1000_CTRL_EXT);
5501         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5502                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5503
5504                 /* this stat has invalid values on i210/i211 */
5505                 if ((hw->mac.type != e1000_i210) &&
5506                     (hw->mac.type != e1000_i211))
5507                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5508         }
5509
5510         adapter->stats.tsctc += rd32(E1000_TSCTC);
5511         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5512
5513         adapter->stats.iac += rd32(E1000_IAC);
5514         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5515         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5516         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5517         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5518         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5519         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5520         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5521         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5522
5523         /* Fill out the OS statistics structure */
5524         net_stats->multicast = adapter->stats.mprc;
5525         net_stats->collisions = adapter->stats.colc;
5526
5527         /* Rx Errors */
5528
5529         /* RLEC on some newer hardware can be incorrect so build
5530          * our own version based on RUC and ROC
5531          */
5532         net_stats->rx_errors = adapter->stats.rxerrc +
5533                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5534                 adapter->stats.ruc + adapter->stats.roc +
5535                 adapter->stats.cexterr;
5536         net_stats->rx_length_errors = adapter->stats.ruc +
5537                                       adapter->stats.roc;
5538         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5539         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5540         net_stats->rx_missed_errors = adapter->stats.mpc;
5541
5542         /* Tx Errors */
5543         net_stats->tx_errors = adapter->stats.ecol +
5544                                adapter->stats.latecol;
5545         net_stats->tx_aborted_errors = adapter->stats.ecol;
5546         net_stats->tx_window_errors = adapter->stats.latecol;
5547         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5548
5549         /* Tx Dropped needs to be maintained elsewhere */
5550
5551         /* Management Stats */
5552         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5553         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5554         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5555
5556         /* OS2BMC Stats */
5557         reg = rd32(E1000_MANC);
5558         if (reg & E1000_MANC_EN_BMC2OS) {
5559                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5560                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5561                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5562                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5563         }
5564 }
5565
5566 static void igb_tsync_interrupt(struct igb_adapter *adapter)
5567 {
5568         struct e1000_hw *hw = &adapter->hw;
5569         struct ptp_clock_event event;
5570         struct timespec64 ts;
5571         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
5572
5573         if (tsicr & TSINTR_SYS_WRAP) {
5574                 event.type = PTP_CLOCK_PPS;
5575                 if (adapter->ptp_caps.pps)
5576                         ptp_clock_event(adapter->ptp_clock, &event);
5577                 else
5578                         dev_err(&adapter->pdev->dev, "unexpected SYS WRAP");
5579                 ack |= TSINTR_SYS_WRAP;
5580         }
5581
5582         if (tsicr & E1000_TSICR_TXTS) {
5583                 /* retrieve hardware timestamp */
5584                 schedule_work(&adapter->ptp_tx_work);
5585                 ack |= E1000_TSICR_TXTS;
5586         }
5587
5588         if (tsicr & TSINTR_TT0) {
5589                 spin_lock(&adapter->tmreg_lock);
5590                 ts = timespec64_add(adapter->perout[0].start,
5591                                     adapter->perout[0].period);
5592                 /* u32 conversion of tv_sec is safe until y2106 */
5593                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
5594                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
5595                 tsauxc = rd32(E1000_TSAUXC);
5596                 tsauxc |= TSAUXC_EN_TT0;
5597                 wr32(E1000_TSAUXC, tsauxc);
5598                 adapter->perout[0].start = ts;
5599                 spin_unlock(&adapter->tmreg_lock);
5600                 ack |= TSINTR_TT0;
5601         }
5602
5603         if (tsicr & TSINTR_TT1) {
5604                 spin_lock(&adapter->tmreg_lock);
5605                 ts = timespec64_add(adapter->perout[1].start,
5606                                     adapter->perout[1].period);
5607                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
5608                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
5609                 tsauxc = rd32(E1000_TSAUXC);
5610                 tsauxc |= TSAUXC_EN_TT1;
5611                 wr32(E1000_TSAUXC, tsauxc);
5612                 adapter->perout[1].start = ts;
5613                 spin_unlock(&adapter->tmreg_lock);
5614                 ack |= TSINTR_TT1;
5615         }
5616
5617         if (tsicr & TSINTR_AUTT0) {
5618                 nsec = rd32(E1000_AUXSTMPL0);
5619                 sec  = rd32(E1000_AUXSTMPH0);
5620                 event.type = PTP_CLOCK_EXTTS;
5621                 event.index = 0;
5622                 event.timestamp = sec * 1000000000ULL + nsec;
5623                 ptp_clock_event(adapter->ptp_clock, &event);
5624                 ack |= TSINTR_AUTT0;
5625         }
5626
5627         if (tsicr & TSINTR_AUTT1) {
5628                 nsec = rd32(E1000_AUXSTMPL1);
5629                 sec  = rd32(E1000_AUXSTMPH1);
5630                 event.type = PTP_CLOCK_EXTTS;
5631                 event.index = 1;
5632                 event.timestamp = sec * 1000000000ULL + nsec;
5633                 ptp_clock_event(adapter->ptp_clock, &event);
5634                 ack |= TSINTR_AUTT1;
5635         }
5636
5637         /* acknowledge the interrupts */
5638         wr32(E1000_TSICR, ack);
5639 }
5640
5641 static irqreturn_t igb_msix_other(int irq, void *data)
5642 {
5643         struct igb_adapter *adapter = data;
5644         struct e1000_hw *hw = &adapter->hw;
5645         u32 icr = rd32(E1000_ICR);
5646         /* reading ICR causes bit 31 of EICR to be cleared */
5647
5648         if (icr & E1000_ICR_DRSTA)
5649                 schedule_work(&adapter->reset_task);
5650
5651         if (icr & E1000_ICR_DOUTSYNC) {
5652                 /* HW is reporting DMA is out of sync */
5653                 adapter->stats.doosync++;
5654                 /* The DMA Out of Sync is also indication of a spoof event
5655                  * in IOV mode. Check the Wrong VM Behavior register to
5656                  * see if it is really a spoof event.
5657                  */
5658                 igb_check_wvbr(adapter);
5659         }
5660
5661         /* Check for a mailbox event */
5662         if (icr & E1000_ICR_VMMB)
5663                 igb_msg_task(adapter);
5664
5665         if (icr & E1000_ICR_LSC) {
5666                 hw->mac.get_link_status = 1;
5667                 /* guard against interrupt when we're going down */
5668                 if (!test_bit(__IGB_DOWN, &adapter->state))
5669                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5670         }
5671
5672         if (icr & E1000_ICR_TS)
5673                 igb_tsync_interrupt(adapter);
5674
5675         wr32(E1000_EIMS, adapter->eims_other);
5676
5677         return IRQ_HANDLED;
5678 }
5679
5680 static void igb_write_itr(struct igb_q_vector *q_vector)
5681 {
5682         struct igb_adapter *adapter = q_vector->adapter;
5683         u32 itr_val = q_vector->itr_val & 0x7FFC;
5684
5685         if (!q_vector->set_itr)
5686                 return;
5687
5688         if (!itr_val)
5689                 itr_val = 0x4;
5690
5691         if (adapter->hw.mac.type == e1000_82575)
5692                 itr_val |= itr_val << 16;
5693         else
5694                 itr_val |= E1000_EITR_CNT_IGNR;
5695
5696         writel(itr_val, q_vector->itr_register);
5697         q_vector->set_itr = 0;
5698 }
5699
5700 static irqreturn_t igb_msix_ring(int irq, void *data)
5701 {
5702         struct igb_q_vector *q_vector = data;
5703
5704         /* Write the ITR value calculated from the previous interrupt. */
5705         igb_write_itr(q_vector);
5706
5707         napi_schedule(&q_vector->napi);
5708
5709         return IRQ_HANDLED;
5710 }
5711
5712 #ifdef CONFIG_IGB_DCA
5713 static void igb_update_tx_dca(struct igb_adapter *adapter,
5714                               struct igb_ring *tx_ring,
5715                               int cpu)
5716 {
5717         struct e1000_hw *hw = &adapter->hw;
5718         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5719
5720         if (hw->mac.type != e1000_82575)
5721                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5722
5723         /* We can enable relaxed ordering for reads, but not writes when
5724          * DCA is enabled.  This is due to a known issue in some chipsets
5725          * which will cause the DCA tag to be cleared.
5726          */
5727         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5728                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5729                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5730
5731         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5732 }
5733
5734 static void igb_update_rx_dca(struct igb_adapter *adapter,
5735                               struct igb_ring *rx_ring,
5736                               int cpu)
5737 {
5738         struct e1000_hw *hw = &adapter->hw;
5739         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5740
5741         if (hw->mac.type != e1000_82575)
5742                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5743
5744         /* We can enable relaxed ordering for reads, but not writes when
5745          * DCA is enabled.  This is due to a known issue in some chipsets
5746          * which will cause the DCA tag to be cleared.
5747          */
5748         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5749                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5750
5751         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5752 }
5753
5754 static void igb_update_dca(struct igb_q_vector *q_vector)
5755 {
5756         struct igb_adapter *adapter = q_vector->adapter;
5757         int cpu = get_cpu();
5758
5759         if (q_vector->cpu == cpu)
5760                 goto out_no_update;
5761
5762         if (q_vector->tx.ring)
5763                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5764
5765         if (q_vector->rx.ring)
5766                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5767
5768         q_vector->cpu = cpu;
5769 out_no_update:
5770         put_cpu();
5771 }
5772
5773 static void igb_setup_dca(struct igb_adapter *adapter)
5774 {
5775         struct e1000_hw *hw = &adapter->hw;
5776         int i;
5777
5778         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5779                 return;
5780
5781         /* Always use CB2 mode, difference is masked in the CB driver. */
5782         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5783
5784         for (i = 0; i < adapter->num_q_vectors; i++) {
5785                 adapter->q_vector[i]->cpu = -1;
5786                 igb_update_dca(adapter->q_vector[i]);
5787         }
5788 }
5789
5790 static int __igb_notify_dca(struct device *dev, void *data)
5791 {
5792         struct net_device *netdev = dev_get_drvdata(dev);
5793         struct igb_adapter *adapter = netdev_priv(netdev);
5794         struct pci_dev *pdev = adapter->pdev;
5795         struct e1000_hw *hw = &adapter->hw;
5796         unsigned long event = *(unsigned long *)data;
5797
5798         switch (event) {
5799         case DCA_PROVIDER_ADD:
5800                 /* if already enabled, don't do it again */
5801                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5802                         break;
5803                 if (dca_add_requester(dev) == 0) {
5804                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5805                         dev_info(&pdev->dev, "DCA enabled\n");
5806                         igb_setup_dca(adapter);
5807                         break;
5808                 }
5809                 /* Fall Through since DCA is disabled. */
5810         case DCA_PROVIDER_REMOVE:
5811                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5812                         /* without this a class_device is left
5813                          * hanging around in the sysfs model
5814                          */
5815                         dca_remove_requester(dev);
5816                         dev_info(&pdev->dev, "DCA disabled\n");
5817                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5818                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5819                 }
5820                 break;
5821         }
5822
5823         return 0;
5824 }
5825
5826 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5827                           void *p)
5828 {
5829         int ret_val;
5830
5831         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5832                                          __igb_notify_dca);
5833
5834         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5835 }
5836 #endif /* CONFIG_IGB_DCA */
5837
5838 #ifdef CONFIG_PCI_IOV
5839 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5840 {
5841         unsigned char mac_addr[ETH_ALEN];
5842
5843         eth_zero_addr(mac_addr);
5844         igb_set_vf_mac(adapter, vf, mac_addr);
5845
5846         /* By default spoof check is enabled for all VFs */
5847         adapter->vf_data[vf].spoofchk_enabled = true;
5848
5849         return 0;
5850 }
5851
5852 #endif
5853 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5854 {
5855         struct e1000_hw *hw = &adapter->hw;
5856         u32 ping;
5857         int i;
5858
5859         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5860                 ping = E1000_PF_CONTROL_MSG;
5861                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5862                         ping |= E1000_VT_MSGTYPE_CTS;
5863                 igb_write_mbx(hw, &ping, 1, i);
5864         }
5865 }
5866
5867 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5868 {
5869         struct e1000_hw *hw = &adapter->hw;
5870         u32 vmolr = rd32(E1000_VMOLR(vf));
5871         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5872
5873         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5874                             IGB_VF_FLAG_MULTI_PROMISC);
5875         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5876
5877         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5878                 vmolr |= E1000_VMOLR_MPME;
5879                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5880                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5881         } else {
5882                 /* if we have hashes and we are clearing a multicast promisc
5883                  * flag we need to write the hashes to the MTA as this step
5884                  * was previously skipped
5885                  */
5886                 if (vf_data->num_vf_mc_hashes > 30) {
5887                         vmolr |= E1000_VMOLR_MPME;
5888                 } else if (vf_data->num_vf_mc_hashes) {
5889                         int j;
5890
5891                         vmolr |= E1000_VMOLR_ROMPE;
5892                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5893                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5894                 }
5895         }
5896
5897         wr32(E1000_VMOLR(vf), vmolr);
5898
5899         /* there are flags left unprocessed, likely not supported */
5900         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5901                 return -EINVAL;
5902
5903         return 0;
5904 }
5905
5906 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5907                                   u32 *msgbuf, u32 vf)
5908 {
5909         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5910         u16 *hash_list = (u16 *)&msgbuf[1];
5911         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5912         int i;
5913
5914         /* salt away the number of multicast addresses assigned
5915          * to this VF for later use to restore when the PF multi cast
5916          * list changes
5917          */
5918         vf_data->num_vf_mc_hashes = n;
5919
5920         /* only up to 30 hash values supported */
5921         if (n > 30)
5922                 n = 30;
5923
5924         /* store the hashes for later use */
5925         for (i = 0; i < n; i++)
5926                 vf_data->vf_mc_hashes[i] = hash_list[i];
5927
5928         /* Flush and reset the mta with the new values */
5929         igb_set_rx_mode(adapter->netdev);
5930
5931         return 0;
5932 }
5933
5934 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5935 {
5936         struct e1000_hw *hw = &adapter->hw;
5937         struct vf_data_storage *vf_data;
5938         int i, j;
5939
5940         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5941                 u32 vmolr = rd32(E1000_VMOLR(i));
5942
5943                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5944
5945                 vf_data = &adapter->vf_data[i];
5946
5947                 if ((vf_data->num_vf_mc_hashes > 30) ||
5948                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5949                         vmolr |= E1000_VMOLR_MPME;
5950                 } else if (vf_data->num_vf_mc_hashes) {
5951                         vmolr |= E1000_VMOLR_ROMPE;
5952                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5953                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5954                 }
5955                 wr32(E1000_VMOLR(i), vmolr);
5956         }
5957 }
5958
5959 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5960 {
5961         struct e1000_hw *hw = &adapter->hw;
5962         u32 pool_mask, vlvf_mask, i;
5963
5964         /* create mask for VF and other pools */
5965         pool_mask = E1000_VLVF_POOLSEL_MASK;
5966         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
5967
5968         /* drop PF from pool bits */
5969         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
5970                              adapter->vfs_allocated_count);
5971
5972         /* Find the vlan filter for this id */
5973         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
5974                 u32 vlvf = rd32(E1000_VLVF(i));
5975                 u32 vfta_mask, vid, vfta;
5976
5977                 /* remove the vf from the pool */
5978                 if (!(vlvf & vlvf_mask))
5979                         continue;
5980
5981                 /* clear out bit from VLVF */
5982                 vlvf ^= vlvf_mask;
5983
5984                 /* if other pools are present, just remove ourselves */
5985                 if (vlvf & pool_mask)
5986                         goto update_vlvfb;
5987
5988                 /* if PF is present, leave VFTA */
5989                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
5990                         goto update_vlvf;
5991
5992                 vid = vlvf & E1000_VLVF_VLANID_MASK;
5993                 vfta_mask = BIT(vid % 32);
5994
5995                 /* clear bit from VFTA */
5996                 vfta = adapter->shadow_vfta[vid / 32];
5997                 if (vfta & vfta_mask)
5998                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
5999 update_vlvf:
6000                 /* clear pool selection enable */
6001                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6002                         vlvf &= E1000_VLVF_POOLSEL_MASK;
6003                 else
6004                         vlvf = 0;
6005 update_vlvfb:
6006                 /* clear pool bits */
6007                 wr32(E1000_VLVF(i), vlvf);
6008         }
6009 }
6010
6011 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6012 {
6013         u32 vlvf;
6014         int idx;
6015
6016         /* short cut the special case */
6017         if (vlan == 0)
6018                 return 0;
6019
6020         /* Search for the VLAN id in the VLVF entries */
6021         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6022                 vlvf = rd32(E1000_VLVF(idx));
6023                 if ((vlvf & VLAN_VID_MASK) == vlan)
6024                         break;
6025         }
6026
6027         return idx;
6028 }
6029
6030 void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6031 {
6032         struct e1000_hw *hw = &adapter->hw;
6033         u32 bits, pf_id;
6034         int idx;
6035
6036         idx = igb_find_vlvf_entry(hw, vid);
6037         if (!idx)
6038                 return;
6039
6040         /* See if any other pools are set for this VLAN filter
6041          * entry other than the PF.
6042          */
6043         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6044         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6045         bits &= rd32(E1000_VLVF(idx));
6046
6047         /* Disable the filter so this falls into the default pool. */
6048         if (!bits) {
6049                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6050                         wr32(E1000_VLVF(idx), BIT(pf_id));
6051                 else
6052                         wr32(E1000_VLVF(idx), 0);
6053         }
6054 }
6055
6056 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6057                            bool add, u32 vf)
6058 {
6059         int pf_id = adapter->vfs_allocated_count;
6060         struct e1000_hw *hw = &adapter->hw;
6061         int err;
6062
6063         /* If VLAN overlaps with one the PF is currently monitoring make
6064          * sure that we are able to allocate a VLVF entry.  This may be
6065          * redundant but it guarantees PF will maintain visibility to
6066          * the VLAN.
6067          */
6068         if (add && test_bit(vid, adapter->active_vlans)) {
6069                 err = igb_vfta_set(hw, vid, pf_id, true, false);
6070                 if (err)
6071                         return err;
6072         }
6073
6074         err = igb_vfta_set(hw, vid, vf, add, false);
6075
6076         if (add && !err)
6077                 return err;
6078
6079         /* If we failed to add the VF VLAN or we are removing the VF VLAN
6080          * we may need to drop the PF pool bit in order to allow us to free
6081          * up the VLVF resources.
6082          */
6083         if (test_bit(vid, adapter->active_vlans) ||
6084             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
6085                 igb_update_pf_vlvf(adapter, vid);
6086
6087         return err;
6088 }
6089
6090 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6091 {
6092         struct e1000_hw *hw = &adapter->hw;
6093
6094         if (vid)
6095                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6096         else
6097                 wr32(E1000_VMVIR(vf), 0);
6098 }
6099
6100 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
6101                                 u16 vlan, u8 qos)
6102 {
6103         int err;
6104
6105         err = igb_set_vf_vlan(adapter, vlan, true, vf);
6106         if (err)
6107                 return err;
6108
6109         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6110         igb_set_vmolr(adapter, vf, !vlan);
6111
6112         /* revoke access to previous VLAN */
6113         if (vlan != adapter->vf_data[vf].pf_vlan)
6114                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6115                                 false, vf);
6116
6117         adapter->vf_data[vf].pf_vlan = vlan;
6118         adapter->vf_data[vf].pf_qos = qos;
6119         igb_set_vf_vlan_strip(adapter, vf, true);
6120         dev_info(&adapter->pdev->dev,
6121                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6122         if (test_bit(__IGB_DOWN, &adapter->state)) {
6123                 dev_warn(&adapter->pdev->dev,
6124                          "The VF VLAN has been set, but the PF device is not up.\n");
6125                 dev_warn(&adapter->pdev->dev,
6126                          "Bring the PF device up before attempting to use the VF device.\n");
6127         }
6128
6129         return err;
6130 }
6131
6132 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
6133 {
6134         /* Restore tagless access via VLAN 0 */
6135         igb_set_vf_vlan(adapter, 0, true, vf);
6136
6137         igb_set_vmvir(adapter, 0, vf);
6138         igb_set_vmolr(adapter, vf, true);
6139
6140         /* Remove any PF assigned VLAN */
6141         if (adapter->vf_data[vf].pf_vlan)
6142                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6143                                 false, vf);
6144
6145         adapter->vf_data[vf].pf_vlan = 0;
6146         adapter->vf_data[vf].pf_qos = 0;
6147         igb_set_vf_vlan_strip(adapter, vf, false);
6148
6149         return 0;
6150 }
6151
6152 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6153                                int vf, u16 vlan, u8 qos)
6154 {
6155         struct igb_adapter *adapter = netdev_priv(netdev);
6156
6157         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
6158                 return -EINVAL;
6159
6160         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
6161                                igb_disable_port_vlan(adapter, vf);
6162 }
6163
6164 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6165 {
6166         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6167         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6168         int ret;
6169
6170         if (adapter->vf_data[vf].pf_vlan)
6171                 return -1;
6172
6173         /* VLAN 0 is a special case, don't allow it to be removed */
6174         if (!vid && !add)
6175                 return 0;
6176
6177         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
6178         if (!ret)
6179                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
6180         return ret;
6181 }
6182
6183 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6184 {
6185         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6186
6187         /* clear flags - except flag that indicates PF has set the MAC */
6188         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
6189         vf_data->last_nack = jiffies;
6190
6191         /* reset vlans for device */
6192         igb_clear_vf_vfta(adapter, vf);
6193         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
6194         igb_set_vmvir(adapter, vf_data->pf_vlan |
6195                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
6196         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
6197         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
6198
6199         /* reset multicast table array for vf */
6200         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6201
6202         /* Flush and reset the mta with the new values */
6203         igb_set_rx_mode(adapter->netdev);
6204 }
6205
6206 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6207 {
6208         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6209
6210         /* clear mac address as we were hotplug removed/added */
6211         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6212                 eth_zero_addr(vf_mac);
6213
6214         /* process remaining reset events */
6215         igb_vf_reset(adapter, vf);
6216 }
6217
6218 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6219 {
6220         struct e1000_hw *hw = &adapter->hw;
6221         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6222         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
6223         u32 reg, msgbuf[3];
6224         u8 *addr = (u8 *)(&msgbuf[1]);
6225
6226         /* process all the same items cleared in a function level reset */
6227         igb_vf_reset(adapter, vf);
6228
6229         /* set vf mac address */
6230         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
6231
6232         /* enable transmit and receive for vf */
6233         reg = rd32(E1000_VFTE);
6234         wr32(E1000_VFTE, reg | BIT(vf));
6235         reg = rd32(E1000_VFRE);
6236         wr32(E1000_VFRE, reg | BIT(vf));
6237
6238         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6239
6240         /* reply to reset with ack and vf mac address */
6241         if (!is_zero_ether_addr(vf_mac)) {
6242                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6243                 memcpy(addr, vf_mac, ETH_ALEN);
6244         } else {
6245                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
6246         }
6247         igb_write_mbx(hw, msgbuf, 3, vf);
6248 }
6249
6250 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6251 {
6252         /* The VF MAC Address is stored in a packed array of bytes
6253          * starting at the second 32 bit word of the msg array
6254          */
6255         unsigned char *addr = (char *)&msg[1];
6256         int err = -1;
6257
6258         if (is_valid_ether_addr(addr))
6259                 err = igb_set_vf_mac(adapter, vf, addr);
6260
6261         return err;
6262 }
6263
6264 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6265 {
6266         struct e1000_hw *hw = &adapter->hw;
6267         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6268         u32 msg = E1000_VT_MSGTYPE_NACK;
6269
6270         /* if device isn't clear to send it shouldn't be reading either */
6271         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6272             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6273                 igb_write_mbx(hw, &msg, 1, vf);
6274                 vf_data->last_nack = jiffies;
6275         }
6276 }
6277
6278 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6279 {
6280         struct pci_dev *pdev = adapter->pdev;
6281         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6282         struct e1000_hw *hw = &adapter->hw;
6283         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6284         s32 retval;
6285
6286         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6287
6288         if (retval) {
6289                 /* if receive failed revoke VF CTS stats and restart init */
6290                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6291                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6292                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6293                         return;
6294                 goto out;
6295         }
6296
6297         /* this is a message we already processed, do nothing */
6298         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6299                 return;
6300
6301         /* until the vf completes a reset it should not be
6302          * allowed to start any configuration.
6303          */
6304         if (msgbuf[0] == E1000_VF_RESET) {
6305                 igb_vf_reset_msg(adapter, vf);
6306                 return;
6307         }
6308
6309         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6310                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6311                         return;
6312                 retval = -1;
6313                 goto out;
6314         }
6315
6316         switch ((msgbuf[0] & 0xFFFF)) {
6317         case E1000_VF_SET_MAC_ADDR:
6318                 retval = -EINVAL;
6319                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6320                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6321                 else
6322                         dev_warn(&pdev->dev,
6323                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6324                                  vf);
6325                 break;
6326         case E1000_VF_SET_PROMISC:
6327                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6328                 break;
6329         case E1000_VF_SET_MULTICAST:
6330                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6331                 break;
6332         case E1000_VF_SET_LPE:
6333                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6334                 break;
6335         case E1000_VF_SET_VLAN:
6336                 retval = -1;
6337                 if (vf_data->pf_vlan)
6338                         dev_warn(&pdev->dev,
6339                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6340                                  vf);
6341                 else
6342                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
6343                 break;
6344         default:
6345                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6346                 retval = -1;
6347                 break;
6348         }
6349
6350         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6351 out:
6352         /* notify the VF of the results of what it sent us */
6353         if (retval)
6354                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6355         else
6356                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6357
6358         igb_write_mbx(hw, msgbuf, 1, vf);
6359 }
6360
6361 static void igb_msg_task(struct igb_adapter *adapter)
6362 {
6363         struct e1000_hw *hw = &adapter->hw;
6364         u32 vf;
6365
6366         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6367                 /* process any reset requests */
6368                 if (!igb_check_for_rst(hw, vf))
6369                         igb_vf_reset_event(adapter, vf);
6370
6371                 /* process any messages pending */
6372                 if (!igb_check_for_msg(hw, vf))
6373                         igb_rcv_msg_from_vf(adapter, vf);
6374
6375                 /* process any acks */
6376                 if (!igb_check_for_ack(hw, vf))
6377                         igb_rcv_ack_from_vf(adapter, vf);
6378         }
6379 }
6380
6381 /**
6382  *  igb_set_uta - Set unicast filter table address
6383  *  @adapter: board private structure
6384  *  @set: boolean indicating if we are setting or clearing bits
6385  *
6386  *  The unicast table address is a register array of 32-bit registers.
6387  *  The table is meant to be used in a way similar to how the MTA is used
6388  *  however due to certain limitations in the hardware it is necessary to
6389  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6390  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6391  **/
6392 static void igb_set_uta(struct igb_adapter *adapter, bool set)
6393 {
6394         struct e1000_hw *hw = &adapter->hw;
6395         u32 uta = set ? ~0 : 0;
6396         int i;
6397
6398         /* we only need to do this if VMDq is enabled */
6399         if (!adapter->vfs_allocated_count)
6400                 return;
6401
6402         for (i = hw->mac.uta_reg_count; i--;)
6403                 array_wr32(E1000_UTA, i, uta);
6404 }
6405
6406 /**
6407  *  igb_intr_msi - Interrupt Handler
6408  *  @irq: interrupt number
6409  *  @data: pointer to a network interface device structure
6410  **/
6411 static irqreturn_t igb_intr_msi(int irq, void *data)
6412 {
6413         struct igb_adapter *adapter = data;
6414         struct igb_q_vector *q_vector = adapter->q_vector[0];
6415         struct e1000_hw *hw = &adapter->hw;
6416         /* read ICR disables interrupts using IAM */
6417         u32 icr = rd32(E1000_ICR);
6418
6419         igb_write_itr(q_vector);
6420
6421         if (icr & E1000_ICR_DRSTA)
6422                 schedule_work(&adapter->reset_task);
6423
6424         if (icr & E1000_ICR_DOUTSYNC) {
6425                 /* HW is reporting DMA is out of sync */
6426                 adapter->stats.doosync++;
6427         }
6428
6429         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6430                 hw->mac.get_link_status = 1;
6431                 if (!test_bit(__IGB_DOWN, &adapter->state))
6432                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6433         }
6434
6435         if (icr & E1000_ICR_TS)
6436                 igb_tsync_interrupt(adapter);
6437
6438         napi_schedule(&q_vector->napi);
6439
6440         return IRQ_HANDLED;
6441 }
6442
6443 /**
6444  *  igb_intr - Legacy Interrupt Handler
6445  *  @irq: interrupt number
6446  *  @data: pointer to a network interface device structure
6447  **/
6448 static irqreturn_t igb_intr(int irq, void *data)
6449 {
6450         struct igb_adapter *adapter = data;
6451         struct igb_q_vector *q_vector = adapter->q_vector[0];
6452         struct e1000_hw *hw = &adapter->hw;
6453         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6454          * need for the IMC write
6455          */
6456         u32 icr = rd32(E1000_ICR);
6457
6458         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6459          * not set, then the adapter didn't send an interrupt
6460          */
6461         if (!(icr & E1000_ICR_INT_ASSERTED))
6462                 return IRQ_NONE;
6463
6464         igb_write_itr(q_vector);
6465
6466         if (icr & E1000_ICR_DRSTA)
6467                 schedule_work(&adapter->reset_task);
6468
6469         if (icr & E1000_ICR_DOUTSYNC) {
6470                 /* HW is reporting DMA is out of sync */
6471                 adapter->stats.doosync++;
6472         }
6473
6474         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6475                 hw->mac.get_link_status = 1;
6476                 /* guard against interrupt when we're going down */
6477                 if (!test_bit(__IGB_DOWN, &adapter->state))
6478                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6479         }
6480
6481         if (icr & E1000_ICR_TS)
6482                 igb_tsync_interrupt(adapter);
6483
6484         napi_schedule(&q_vector->napi);
6485
6486         return IRQ_HANDLED;
6487 }
6488
6489 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6490 {
6491         struct igb_adapter *adapter = q_vector->adapter;
6492         struct e1000_hw *hw = &adapter->hw;
6493
6494         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6495             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6496                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6497                         igb_set_itr(q_vector);
6498                 else
6499                         igb_update_ring_itr(q_vector);
6500         }
6501
6502         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6503                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6504                         wr32(E1000_EIMS, q_vector->eims_value);
6505                 else
6506                         igb_irq_enable(adapter);
6507         }
6508 }
6509
6510 /**
6511  *  igb_poll - NAPI Rx polling callback
6512  *  @napi: napi polling structure
6513  *  @budget: count of how many packets we should handle
6514  **/
6515 static int igb_poll(struct napi_struct *napi, int budget)
6516 {
6517         struct igb_q_vector *q_vector = container_of(napi,
6518                                                      struct igb_q_vector,
6519                                                      napi);
6520         bool clean_complete = true;
6521         int work_done = 0;
6522
6523 #ifdef CONFIG_IGB_DCA
6524         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6525                 igb_update_dca(q_vector);
6526 #endif
6527         if (q_vector->tx.ring)
6528                 clean_complete = igb_clean_tx_irq(q_vector, budget);
6529
6530         if (q_vector->rx.ring) {
6531                 int cleaned = igb_clean_rx_irq(q_vector, budget);
6532
6533                 work_done += cleaned;
6534                 if (cleaned >= budget)
6535                         clean_complete = false;
6536         }
6537
6538         /* If all work not completed, return budget and keep polling */
6539         if (!clean_complete)
6540                 return budget;
6541
6542         /* If not enough Rx work done, exit the polling mode */
6543         napi_complete_done(napi, work_done);
6544         igb_ring_irq_enable(q_vector);
6545
6546         return 0;
6547 }
6548
6549 /**
6550  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6551  *  @q_vector: pointer to q_vector containing needed info
6552  *  @napi_budget: Used to determine if we are in netpoll
6553  *
6554  *  returns true if ring is completely cleaned
6555  **/
6556 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
6557 {
6558         struct igb_adapter *adapter = q_vector->adapter;
6559         struct igb_ring *tx_ring = q_vector->tx.ring;
6560         struct igb_tx_buffer *tx_buffer;
6561         union e1000_adv_tx_desc *tx_desc;
6562         unsigned int total_bytes = 0, total_packets = 0;
6563         unsigned int budget = q_vector->tx.work_limit;
6564         unsigned int i = tx_ring->next_to_clean;
6565
6566         if (test_bit(__IGB_DOWN, &adapter->state))
6567                 return true;
6568
6569         tx_buffer = &tx_ring->tx_buffer_info[i];
6570         tx_desc = IGB_TX_DESC(tx_ring, i);
6571         i -= tx_ring->count;
6572
6573         do {
6574                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6575
6576                 /* if next_to_watch is not set then there is no work pending */
6577                 if (!eop_desc)
6578                         break;
6579
6580                 /* prevent any other reads prior to eop_desc */
6581                 read_barrier_depends();
6582
6583                 /* if DD is not set pending work has not been completed */
6584                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6585                         break;
6586
6587                 /* clear next_to_watch to prevent false hangs */
6588                 tx_buffer->next_to_watch = NULL;
6589
6590                 /* update the statistics for this packet */
6591                 total_bytes += tx_buffer->bytecount;
6592                 total_packets += tx_buffer->gso_segs;
6593
6594                 /* free the skb */
6595                 napi_consume_skb(tx_buffer->skb, napi_budget);
6596
6597                 /* unmap skb header data */
6598                 dma_unmap_single(tx_ring->dev,
6599                                  dma_unmap_addr(tx_buffer, dma),
6600                                  dma_unmap_len(tx_buffer, len),
6601                                  DMA_TO_DEVICE);
6602
6603                 /* clear tx_buffer data */
6604                 tx_buffer->skb = NULL;
6605                 dma_unmap_len_set(tx_buffer, len, 0);
6606
6607                 /* clear last DMA location and unmap remaining buffers */
6608                 while (tx_desc != eop_desc) {
6609                         tx_buffer++;
6610                         tx_desc++;
6611                         i++;
6612                         if (unlikely(!i)) {
6613                                 i -= tx_ring->count;
6614                                 tx_buffer = tx_ring->tx_buffer_info;
6615                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6616                         }
6617
6618                         /* unmap any remaining paged data */
6619                         if (dma_unmap_len(tx_buffer, len)) {
6620                                 dma_unmap_page(tx_ring->dev,
6621                                                dma_unmap_addr(tx_buffer, dma),
6622                                                dma_unmap_len(tx_buffer, len),
6623                                                DMA_TO_DEVICE);
6624                                 dma_unmap_len_set(tx_buffer, len, 0);
6625                         }
6626                 }
6627
6628                 /* move us one more past the eop_desc for start of next pkt */
6629                 tx_buffer++;
6630                 tx_desc++;
6631                 i++;
6632                 if (unlikely(!i)) {
6633                         i -= tx_ring->count;
6634                         tx_buffer = tx_ring->tx_buffer_info;
6635                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6636                 }
6637
6638                 /* issue prefetch for next Tx descriptor */
6639                 prefetch(tx_desc);
6640
6641                 /* update budget accounting */
6642                 budget--;
6643         } while (likely(budget));
6644
6645         netdev_tx_completed_queue(txring_txq(tx_ring),
6646                                   total_packets, total_bytes);
6647         i += tx_ring->count;
6648         tx_ring->next_to_clean = i;
6649         u64_stats_update_begin(&tx_ring->tx_syncp);
6650         tx_ring->tx_stats.bytes += total_bytes;
6651         tx_ring->tx_stats.packets += total_packets;
6652         u64_stats_update_end(&tx_ring->tx_syncp);
6653         q_vector->tx.total_bytes += total_bytes;
6654         q_vector->tx.total_packets += total_packets;
6655
6656         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6657                 struct e1000_hw *hw = &adapter->hw;
6658
6659                 /* Detect a transmit hang in hardware, this serializes the
6660                  * check with the clearing of time_stamp and movement of i
6661                  */
6662                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6663                 if (tx_buffer->next_to_watch &&
6664                     time_after(jiffies, tx_buffer->time_stamp +
6665                                (adapter->tx_timeout_factor * HZ)) &&
6666                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6667
6668                         /* detected Tx unit hang */
6669                         dev_err(tx_ring->dev,
6670                                 "Detected Tx Unit Hang\n"
6671                                 "  Tx Queue             <%d>\n"
6672                                 "  TDH                  <%x>\n"
6673                                 "  TDT                  <%x>\n"
6674                                 "  next_to_use          <%x>\n"
6675                                 "  next_to_clean        <%x>\n"
6676                                 "buffer_info[next_to_clean]\n"
6677                                 "  time_stamp           <%lx>\n"
6678                                 "  next_to_watch        <%p>\n"
6679                                 "  jiffies              <%lx>\n"
6680                                 "  desc.status          <%x>\n",
6681                                 tx_ring->queue_index,
6682                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6683                                 readl(tx_ring->tail),
6684                                 tx_ring->next_to_use,
6685                                 tx_ring->next_to_clean,
6686                                 tx_buffer->time_stamp,
6687                                 tx_buffer->next_to_watch,
6688                                 jiffies,
6689                                 tx_buffer->next_to_watch->wb.status);
6690                         netif_stop_subqueue(tx_ring->netdev,
6691                                             tx_ring->queue_index);
6692
6693                         /* we are about to reset, no point in enabling stuff */
6694                         return true;
6695                 }
6696         }
6697
6698 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6699         if (unlikely(total_packets &&
6700             netif_carrier_ok(tx_ring->netdev) &&
6701             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6702                 /* Make sure that anybody stopping the queue after this
6703                  * sees the new next_to_clean.
6704                  */
6705                 smp_mb();
6706                 if (__netif_subqueue_stopped(tx_ring->netdev,
6707                                              tx_ring->queue_index) &&
6708                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6709                         netif_wake_subqueue(tx_ring->netdev,
6710                                             tx_ring->queue_index);
6711
6712                         u64_stats_update_begin(&tx_ring->tx_syncp);
6713                         tx_ring->tx_stats.restart_queue++;
6714                         u64_stats_update_end(&tx_ring->tx_syncp);
6715                 }
6716         }
6717
6718         return !!budget;
6719 }
6720
6721 /**
6722  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6723  *  @rx_ring: rx descriptor ring to store buffers on
6724  *  @old_buff: donor buffer to have page reused
6725  *
6726  *  Synchronizes page for reuse by the adapter
6727  **/
6728 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6729                               struct igb_rx_buffer *old_buff)
6730 {
6731         struct igb_rx_buffer *new_buff;
6732         u16 nta = rx_ring->next_to_alloc;
6733
6734         new_buff = &rx_ring->rx_buffer_info[nta];
6735
6736         /* update, and store next to alloc */
6737         nta++;
6738         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6739
6740         /* transfer page from old buffer to new buffer */
6741         *new_buff = *old_buff;
6742
6743         /* sync the buffer for use by the device */
6744         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6745                                          old_buff->page_offset,
6746                                          IGB_RX_BUFSZ,
6747                                          DMA_FROM_DEVICE);
6748 }
6749
6750 static inline bool igb_page_is_reserved(struct page *page)
6751 {
6752         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
6753 }
6754
6755 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6756                                   struct page *page,
6757                                   unsigned int truesize)
6758 {
6759         /* avoid re-using remote pages */
6760         if (unlikely(igb_page_is_reserved(page)))
6761                 return false;
6762
6763 #if (PAGE_SIZE < 8192)
6764         /* if we are only owner of page we can reuse it */
6765         if (unlikely(page_count(page) != 1))
6766                 return false;
6767
6768         /* flip page offset to other buffer */
6769         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6770 #else
6771         /* move offset up to the next cache line */
6772         rx_buffer->page_offset += truesize;
6773
6774         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6775                 return false;
6776 #endif
6777
6778         /* Even if we own the page, we are not allowed to use atomic_set()
6779          * This would break get_page_unless_zero() users.
6780          */
6781         page_ref_inc(page);
6782
6783         return true;
6784 }
6785
6786 /**
6787  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6788  *  @rx_ring: rx descriptor ring to transact packets on
6789  *  @rx_buffer: buffer containing page to add
6790  *  @rx_desc: descriptor containing length of buffer written by hardware
6791  *  @skb: sk_buff to place the data into
6792  *
6793  *  This function will add the data contained in rx_buffer->page to the skb.
6794  *  This is done either through a direct copy if the data in the buffer is
6795  *  less than the skb header size, otherwise it will just attach the page as
6796  *  a frag to the skb.
6797  *
6798  *  The function will then update the page offset if necessary and return
6799  *  true if the buffer can be reused by the adapter.
6800  **/
6801 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6802                             struct igb_rx_buffer *rx_buffer,
6803                             union e1000_adv_rx_desc *rx_desc,
6804                             struct sk_buff *skb)
6805 {
6806         struct page *page = rx_buffer->page;
6807         unsigned char *va = page_address(page) + rx_buffer->page_offset;
6808         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6809 #if (PAGE_SIZE < 8192)
6810         unsigned int truesize = IGB_RX_BUFSZ;
6811 #else
6812         unsigned int truesize = SKB_DATA_ALIGN(size);
6813 #endif
6814         unsigned int pull_len;
6815
6816         if (unlikely(skb_is_nonlinear(skb)))
6817                 goto add_tail_frag;
6818
6819         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
6820                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6821                 va += IGB_TS_HDR_LEN;
6822                 size -= IGB_TS_HDR_LEN;
6823         }
6824
6825         if (likely(size <= IGB_RX_HDR_LEN)) {
6826                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6827
6828                 /* page is not reserved, we can reuse buffer as-is */
6829                 if (likely(!igb_page_is_reserved(page)))
6830                         return true;
6831
6832                 /* this page cannot be reused so discard it */
6833                 __free_page(page);
6834                 return false;
6835         }
6836
6837         /* we need the header to contain the greater of either ETH_HLEN or
6838          * 60 bytes if the skb->len is less than 60 for skb_pad.
6839          */
6840         pull_len = eth_get_headlen(va, IGB_RX_HDR_LEN);
6841
6842         /* align pull length to size of long to optimize memcpy performance */
6843         memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
6844
6845         /* update all of the pointers */
6846         va += pull_len;
6847         size -= pull_len;
6848
6849 add_tail_frag:
6850         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6851                         (unsigned long)va & ~PAGE_MASK, size, truesize);
6852
6853         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6854 }
6855
6856 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6857                                            union e1000_adv_rx_desc *rx_desc,
6858                                            struct sk_buff *skb)
6859 {
6860         struct igb_rx_buffer *rx_buffer;
6861         struct page *page;
6862
6863         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6864         page = rx_buffer->page;
6865         prefetchw(page);
6866
6867         if (likely(!skb)) {
6868                 void *page_addr = page_address(page) +
6869                                   rx_buffer->page_offset;
6870
6871                 /* prefetch first cache line of first page */
6872                 prefetch(page_addr);
6873 #if L1_CACHE_BYTES < 128
6874                 prefetch(page_addr + L1_CACHE_BYTES);
6875 #endif
6876
6877                 /* allocate a skb to store the frags */
6878                 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
6879                 if (unlikely(!skb)) {
6880                         rx_ring->rx_stats.alloc_failed++;
6881                         return NULL;
6882                 }
6883
6884                 /* we will be copying header into skb->data in
6885                  * pskb_may_pull so it is in our interest to prefetch
6886                  * it now to avoid a possible cache miss
6887                  */
6888                 prefetchw(skb->data);
6889         }
6890
6891         /* we are reusing so sync this buffer for CPU use */
6892         dma_sync_single_range_for_cpu(rx_ring->dev,
6893                                       rx_buffer->dma,
6894                                       rx_buffer->page_offset,
6895                                       IGB_RX_BUFSZ,
6896                                       DMA_FROM_DEVICE);
6897
6898         /* pull page into skb */
6899         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6900                 /* hand second half of page back to the ring */
6901                 igb_reuse_rx_page(rx_ring, rx_buffer);
6902         } else {
6903                 /* we are not reusing the buffer so unmap it */
6904                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6905                                PAGE_SIZE, DMA_FROM_DEVICE);
6906         }
6907
6908         /* clear contents of rx_buffer */
6909         rx_buffer->page = NULL;
6910
6911         return skb;
6912 }
6913
6914 static inline void igb_rx_checksum(struct igb_ring *ring,
6915                                    union e1000_adv_rx_desc *rx_desc,
6916                                    struct sk_buff *skb)
6917 {
6918         skb_checksum_none_assert(skb);
6919
6920         /* Ignore Checksum bit is set */
6921         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6922                 return;
6923
6924         /* Rx checksum disabled via ethtool */
6925         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6926                 return;
6927
6928         /* TCP/UDP checksum error bit is set */
6929         if (igb_test_staterr(rx_desc,
6930                              E1000_RXDEXT_STATERR_TCPE |
6931                              E1000_RXDEXT_STATERR_IPE)) {
6932                 /* work around errata with sctp packets where the TCPE aka
6933                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6934                  * packets, (aka let the stack check the crc32c)
6935                  */
6936                 if (!((skb->len == 60) &&
6937                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6938                         u64_stats_update_begin(&ring->rx_syncp);
6939                         ring->rx_stats.csum_err++;
6940                         u64_stats_update_end(&ring->rx_syncp);
6941                 }
6942                 /* let the stack verify checksum errors */
6943                 return;
6944         }
6945         /* It must be a TCP or UDP packet with a valid checksum */
6946         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6947                                       E1000_RXD_STAT_UDPCS))
6948                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6949
6950         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6951                 le32_to_cpu(rx_desc->wb.upper.status_error));
6952 }
6953
6954 static inline void igb_rx_hash(struct igb_ring *ring,
6955                                union e1000_adv_rx_desc *rx_desc,
6956                                struct sk_buff *skb)
6957 {
6958         if (ring->netdev->features & NETIF_F_RXHASH)
6959                 skb_set_hash(skb,
6960                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
6961                              PKT_HASH_TYPE_L3);
6962 }
6963
6964 /**
6965  *  igb_is_non_eop - process handling of non-EOP buffers
6966  *  @rx_ring: Rx ring being processed
6967  *  @rx_desc: Rx descriptor for current buffer
6968  *  @skb: current socket buffer containing buffer in progress
6969  *
6970  *  This function updates next to clean.  If the buffer is an EOP buffer
6971  *  this function exits returning false, otherwise it will place the
6972  *  sk_buff in the next buffer to be chained and return true indicating
6973  *  that this is in fact a non-EOP buffer.
6974  **/
6975 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6976                            union e1000_adv_rx_desc *rx_desc)
6977 {
6978         u32 ntc = rx_ring->next_to_clean + 1;
6979
6980         /* fetch, update, and store next to clean */
6981         ntc = (ntc < rx_ring->count) ? ntc : 0;
6982         rx_ring->next_to_clean = ntc;
6983
6984         prefetch(IGB_RX_DESC(rx_ring, ntc));
6985
6986         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6987                 return false;
6988
6989         return true;
6990 }
6991
6992 /**
6993  *  igb_cleanup_headers - Correct corrupted or empty headers
6994  *  @rx_ring: rx descriptor ring packet is being transacted on
6995  *  @rx_desc: pointer to the EOP Rx descriptor
6996  *  @skb: pointer to current skb being fixed
6997  *
6998  *  Address the case where we are pulling data in on pages only
6999  *  and as such no data is present in the skb header.
7000  *
7001  *  In addition if skb is not at least 60 bytes we need to pad it so that
7002  *  it is large enough to qualify as a valid Ethernet frame.
7003  *
7004  *  Returns true if an error was encountered and skb was freed.
7005  **/
7006 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
7007                                 union e1000_adv_rx_desc *rx_desc,
7008                                 struct sk_buff *skb)
7009 {
7010         if (unlikely((igb_test_staterr(rx_desc,
7011                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
7012                 struct net_device *netdev = rx_ring->netdev;
7013                 if (!(netdev->features & NETIF_F_RXALL)) {
7014                         dev_kfree_skb_any(skb);
7015                         return true;
7016                 }
7017         }
7018
7019         /* if eth_skb_pad returns an error the skb was freed */
7020         if (eth_skb_pad(skb))
7021                 return true;
7022
7023         return false;
7024 }
7025
7026 /**
7027  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
7028  *  @rx_ring: rx descriptor ring packet is being transacted on
7029  *  @rx_desc: pointer to the EOP Rx descriptor
7030  *  @skb: pointer to current skb being populated
7031  *
7032  *  This function checks the ring, descriptor, and packet information in
7033  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
7034  *  other fields within the skb.
7035  **/
7036 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7037                                    union e1000_adv_rx_desc *rx_desc,
7038                                    struct sk_buff *skb)
7039 {
7040         struct net_device *dev = rx_ring->netdev;
7041
7042         igb_rx_hash(rx_ring, rx_desc, skb);
7043
7044         igb_rx_checksum(rx_ring, rx_desc, skb);
7045
7046         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
7047             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
7048                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
7049
7050         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7051             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7052                 u16 vid;
7053
7054                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7055                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7056                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7057                 else
7058                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7059
7060                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7061         }
7062
7063         skb_record_rx_queue(skb, rx_ring->queue_index);
7064
7065         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
7066 }
7067
7068 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
7069 {
7070         struct igb_ring *rx_ring = q_vector->rx.ring;
7071         struct sk_buff *skb = rx_ring->skb;
7072         unsigned int total_bytes = 0, total_packets = 0;
7073         u16 cleaned_count = igb_desc_unused(rx_ring);
7074
7075         while (likely(total_packets < budget)) {
7076                 union e1000_adv_rx_desc *rx_desc;
7077
7078                 /* return some buffers to hardware, one at a time is too slow */
7079                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7080                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7081                         cleaned_count = 0;
7082                 }
7083
7084                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
7085
7086                 if (!rx_desc->wb.upper.status_error)
7087                         break;
7088
7089                 /* This memory barrier is needed to keep us from reading
7090                  * any other fields out of the rx_desc until we know the
7091                  * descriptor has been written back
7092                  */
7093                 dma_rmb();
7094
7095                 /* retrieve a buffer from the ring */
7096                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
7097
7098                 /* exit if we failed to retrieve a buffer */
7099                 if (!skb)
7100                         break;
7101
7102                 cleaned_count++;
7103
7104                 /* fetch next buffer in frame if non-eop */
7105                 if (igb_is_non_eop(rx_ring, rx_desc))
7106                         continue;
7107
7108                 /* verify the packet layout is correct */
7109                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
7110                         skb = NULL;
7111                         continue;
7112                 }
7113
7114                 /* probably a little skewed due to removing CRC */
7115                 total_bytes += skb->len;
7116
7117                 /* populate checksum, timestamp, VLAN, and protocol */
7118                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7119
7120                 napi_gro_receive(&q_vector->napi, skb);
7121
7122                 /* reset skb pointer */
7123                 skb = NULL;
7124
7125                 /* update budget accounting */
7126                 total_packets++;
7127         }
7128
7129         /* place incomplete frames back on ring for completion */
7130         rx_ring->skb = skb;
7131
7132         u64_stats_update_begin(&rx_ring->rx_syncp);
7133         rx_ring->rx_stats.packets += total_packets;
7134         rx_ring->rx_stats.bytes += total_bytes;
7135         u64_stats_update_end(&rx_ring->rx_syncp);
7136         q_vector->rx.total_packets += total_packets;
7137         q_vector->rx.total_bytes += total_bytes;
7138
7139         if (cleaned_count)
7140                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7141
7142         return total_packets;
7143 }
7144
7145 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7146                                   struct igb_rx_buffer *bi)
7147 {
7148         struct page *page = bi->page;
7149         dma_addr_t dma;
7150
7151         /* since we are recycling buffers we should seldom need to alloc */
7152         if (likely(page))
7153                 return true;
7154
7155         /* alloc new page for storage */
7156         page = dev_alloc_page();
7157         if (unlikely(!page)) {
7158                 rx_ring->rx_stats.alloc_failed++;
7159                 return false;
7160         }
7161
7162         /* map page for use */
7163         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
7164
7165         /* if mapping failed free memory back to system since
7166          * there isn't much point in holding memory we can't use
7167          */
7168         if (dma_mapping_error(rx_ring->dev, dma)) {
7169                 __free_page(page);
7170
7171                 rx_ring->rx_stats.alloc_failed++;
7172                 return false;
7173         }
7174
7175         bi->dma = dma;
7176         bi->page = page;
7177         bi->page_offset = 0;
7178
7179         return true;
7180 }
7181
7182 /**
7183  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7184  *  @adapter: address of board private structure
7185  **/
7186 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7187 {
7188         union e1000_adv_rx_desc *rx_desc;
7189         struct igb_rx_buffer *bi;
7190         u16 i = rx_ring->next_to_use;
7191
7192         /* nothing to do */
7193         if (!cleaned_count)
7194                 return;
7195
7196         rx_desc = IGB_RX_DESC(rx_ring, i);
7197         bi = &rx_ring->rx_buffer_info[i];
7198         i -= rx_ring->count;
7199
7200         do {
7201                 if (!igb_alloc_mapped_page(rx_ring, bi))
7202                         break;
7203
7204                 /* Refresh the desc even if buffer_addrs didn't change
7205                  * because each write-back erases this info.
7206                  */
7207                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7208
7209                 rx_desc++;
7210                 bi++;
7211                 i++;
7212                 if (unlikely(!i)) {
7213                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7214                         bi = rx_ring->rx_buffer_info;
7215                         i -= rx_ring->count;
7216                 }
7217
7218                 /* clear the status bits for the next_to_use descriptor */
7219                 rx_desc->wb.upper.status_error = 0;
7220
7221                 cleaned_count--;
7222         } while (cleaned_count);
7223
7224         i += rx_ring->count;
7225
7226         if (rx_ring->next_to_use != i) {
7227                 /* record the next descriptor to use */
7228                 rx_ring->next_to_use = i;
7229
7230                 /* update next to alloc since we have filled the ring */
7231                 rx_ring->next_to_alloc = i;
7232
7233                 /* Force memory writes to complete before letting h/w
7234                  * know there are new descriptors to fetch.  (Only
7235                  * applicable for weak-ordered memory model archs,
7236                  * such as IA-64).
7237                  */
7238                 wmb();
7239                 writel(i, rx_ring->tail);
7240         }
7241 }
7242
7243 /**
7244  * igb_mii_ioctl -
7245  * @netdev:
7246  * @ifreq:
7247  * @cmd:
7248  **/
7249 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7250 {
7251         struct igb_adapter *adapter = netdev_priv(netdev);
7252         struct mii_ioctl_data *data = if_mii(ifr);
7253
7254         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7255                 return -EOPNOTSUPP;
7256
7257         switch (cmd) {
7258         case SIOCGMIIPHY:
7259                 data->phy_id = adapter->hw.phy.addr;
7260                 break;
7261         case SIOCGMIIREG:
7262                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7263                                      &data->val_out))
7264                         return -EIO;
7265                 break;
7266         case SIOCSMIIREG:
7267         default:
7268                 return -EOPNOTSUPP;
7269         }
7270         return 0;
7271 }
7272
7273 /**
7274  * igb_ioctl -
7275  * @netdev:
7276  * @ifreq:
7277  * @cmd:
7278  **/
7279 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7280 {
7281         switch (cmd) {
7282         case SIOCGMIIPHY:
7283         case SIOCGMIIREG:
7284         case SIOCSMIIREG:
7285                 return igb_mii_ioctl(netdev, ifr, cmd);
7286         case SIOCGHWTSTAMP:
7287                 return igb_ptp_get_ts_config(netdev, ifr);
7288         case SIOCSHWTSTAMP:
7289                 return igb_ptp_set_ts_config(netdev, ifr);
7290         default:
7291                 return -EOPNOTSUPP;
7292         }
7293 }
7294
7295 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7296 {
7297         struct igb_adapter *adapter = hw->back;
7298
7299         pci_read_config_word(adapter->pdev, reg, value);
7300 }
7301
7302 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7303 {
7304         struct igb_adapter *adapter = hw->back;
7305
7306         pci_write_config_word(adapter->pdev, reg, *value);
7307 }
7308
7309 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7310 {
7311         struct igb_adapter *adapter = hw->back;
7312
7313         if (pcie_capability_read_word(adapter->pdev, reg, value))
7314                 return -E1000_ERR_CONFIG;
7315
7316         return 0;
7317 }
7318
7319 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7320 {
7321         struct igb_adapter *adapter = hw->back;
7322
7323         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7324                 return -E1000_ERR_CONFIG;
7325
7326         return 0;
7327 }
7328
7329 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7330 {
7331         struct igb_adapter *adapter = netdev_priv(netdev);
7332         struct e1000_hw *hw = &adapter->hw;
7333         u32 ctrl, rctl;
7334         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7335
7336         if (enable) {
7337                 /* enable VLAN tag insert/strip */
7338                 ctrl = rd32(E1000_CTRL);
7339                 ctrl |= E1000_CTRL_VME;
7340                 wr32(E1000_CTRL, ctrl);
7341
7342                 /* Disable CFI check */
7343                 rctl = rd32(E1000_RCTL);
7344                 rctl &= ~E1000_RCTL_CFIEN;
7345                 wr32(E1000_RCTL, rctl);
7346         } else {
7347                 /* disable VLAN tag insert/strip */
7348                 ctrl = rd32(E1000_CTRL);
7349                 ctrl &= ~E1000_CTRL_VME;
7350                 wr32(E1000_CTRL, ctrl);
7351         }
7352
7353         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
7354 }
7355
7356 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7357                                __be16 proto, u16 vid)
7358 {
7359         struct igb_adapter *adapter = netdev_priv(netdev);
7360         struct e1000_hw *hw = &adapter->hw;
7361         int pf_id = adapter->vfs_allocated_count;
7362
7363         /* add the filter since PF can receive vlans w/o entry in vlvf */
7364         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7365                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
7366
7367         set_bit(vid, adapter->active_vlans);
7368
7369         return 0;
7370 }
7371
7372 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7373                                 __be16 proto, u16 vid)
7374 {
7375         struct igb_adapter *adapter = netdev_priv(netdev);
7376         int pf_id = adapter->vfs_allocated_count;
7377         struct e1000_hw *hw = &adapter->hw;
7378
7379         /* remove VID from filter table */
7380         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7381                 igb_vfta_set(hw, vid, pf_id, false, true);
7382
7383         clear_bit(vid, adapter->active_vlans);
7384
7385         return 0;
7386 }
7387
7388 static void igb_restore_vlan(struct igb_adapter *adapter)
7389 {
7390         u16 vid = 1;
7391
7392         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7393         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
7394
7395         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
7396                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7397 }
7398
7399 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7400 {
7401         struct pci_dev *pdev = adapter->pdev;
7402         struct e1000_mac_info *mac = &adapter->hw.mac;
7403
7404         mac->autoneg = 0;
7405
7406         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7407          * for the switch() below to work
7408          */
7409         if ((spd & 1) || (dplx & ~1))
7410                 goto err_inval;
7411
7412         /* Fiber NIC's only allow 1000 gbps Full duplex
7413          * and 100Mbps Full duplex for 100baseFx sfp
7414          */
7415         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7416                 switch (spd + dplx) {
7417                 case SPEED_10 + DUPLEX_HALF:
7418                 case SPEED_10 + DUPLEX_FULL:
7419                 case SPEED_100 + DUPLEX_HALF:
7420                         goto err_inval;
7421                 default:
7422                         break;
7423                 }
7424         }
7425
7426         switch (spd + dplx) {
7427         case SPEED_10 + DUPLEX_HALF:
7428                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7429                 break;
7430         case SPEED_10 + DUPLEX_FULL:
7431                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7432                 break;
7433         case SPEED_100 + DUPLEX_HALF:
7434                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7435                 break;
7436         case SPEED_100 + DUPLEX_FULL:
7437                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7438                 break;
7439         case SPEED_1000 + DUPLEX_FULL:
7440                 mac->autoneg = 1;
7441                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7442                 break;
7443         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7444         default:
7445                 goto err_inval;
7446         }
7447
7448         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7449         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7450
7451         return 0;
7452
7453 err_inval:
7454         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7455         return -EINVAL;
7456 }
7457
7458 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7459                           bool runtime)
7460 {
7461         struct net_device *netdev = pci_get_drvdata(pdev);
7462         struct igb_adapter *adapter = netdev_priv(netdev);
7463         struct e1000_hw *hw = &adapter->hw;
7464         u32 ctrl, rctl, status;
7465         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7466 #ifdef CONFIG_PM
7467         int retval = 0;
7468 #endif
7469
7470         netif_device_detach(netdev);
7471
7472         if (netif_running(netdev))
7473                 __igb_close(netdev, true);
7474
7475         igb_clear_interrupt_scheme(adapter);
7476
7477 #ifdef CONFIG_PM
7478         retval = pci_save_state(pdev);
7479         if (retval)
7480                 return retval;
7481 #endif
7482
7483         status = rd32(E1000_STATUS);
7484         if (status & E1000_STATUS_LU)
7485                 wufc &= ~E1000_WUFC_LNKC;
7486
7487         if (wufc) {
7488                 igb_setup_rctl(adapter);
7489                 igb_set_rx_mode(netdev);
7490
7491                 /* turn on all-multi mode if wake on multicast is enabled */
7492                 if (wufc & E1000_WUFC_MC) {
7493                         rctl = rd32(E1000_RCTL);
7494                         rctl |= E1000_RCTL_MPE;
7495                         wr32(E1000_RCTL, rctl);
7496                 }
7497
7498                 ctrl = rd32(E1000_CTRL);
7499                 /* advertise wake from D3Cold */
7500                 #define E1000_CTRL_ADVD3WUC 0x00100000
7501                 /* phy power management enable */
7502                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7503                 ctrl |= E1000_CTRL_ADVD3WUC;
7504                 wr32(E1000_CTRL, ctrl);
7505
7506                 /* Allow time for pending master requests to run */
7507                 igb_disable_pcie_master(hw);
7508
7509                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7510                 wr32(E1000_WUFC, wufc);
7511         } else {
7512                 wr32(E1000_WUC, 0);
7513                 wr32(E1000_WUFC, 0);
7514         }
7515
7516         *enable_wake = wufc || adapter->en_mng_pt;
7517         if (!*enable_wake)
7518                 igb_power_down_link(adapter);
7519         else
7520                 igb_power_up_link(adapter);
7521
7522         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7523          * would have already happened in close and is redundant.
7524          */
7525         igb_release_hw_control(adapter);
7526
7527         pci_disable_device(pdev);
7528
7529         return 0;
7530 }
7531
7532 #ifdef CONFIG_PM
7533 #ifdef CONFIG_PM_SLEEP
7534 static int igb_suspend(struct device *dev)
7535 {
7536         int retval;
7537         bool wake;
7538         struct pci_dev *pdev = to_pci_dev(dev);
7539
7540         retval = __igb_shutdown(pdev, &wake, 0);
7541         if (retval)
7542                 return retval;
7543
7544         if (wake) {
7545                 pci_prepare_to_sleep(pdev);
7546         } else {
7547                 pci_wake_from_d3(pdev, false);
7548                 pci_set_power_state(pdev, PCI_D3hot);
7549         }
7550
7551         return 0;
7552 }
7553 #endif /* CONFIG_PM_SLEEP */
7554
7555 static int igb_resume(struct device *dev)
7556 {
7557         struct pci_dev *pdev = to_pci_dev(dev);
7558         struct net_device *netdev = pci_get_drvdata(pdev);
7559         struct igb_adapter *adapter = netdev_priv(netdev);
7560         struct e1000_hw *hw = &adapter->hw;
7561         u32 err;
7562
7563         pci_set_power_state(pdev, PCI_D0);
7564         pci_restore_state(pdev);
7565         pci_save_state(pdev);
7566
7567         if (!pci_device_is_present(pdev))
7568                 return -ENODEV;
7569         err = pci_enable_device_mem(pdev);
7570         if (err) {
7571                 dev_err(&pdev->dev,
7572                         "igb: Cannot enable PCI device from suspend\n");
7573                 return err;
7574         }
7575         pci_set_master(pdev);
7576
7577         pci_enable_wake(pdev, PCI_D3hot, 0);
7578         pci_enable_wake(pdev, PCI_D3cold, 0);
7579
7580         if (igb_init_interrupt_scheme(adapter, true)) {
7581                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7582                 return -ENOMEM;
7583         }
7584
7585         igb_reset(adapter);
7586
7587         /* let the f/w know that the h/w is now under the control of the
7588          * driver.
7589          */
7590         igb_get_hw_control(adapter);
7591
7592         wr32(E1000_WUS, ~0);
7593
7594         if (netdev->flags & IFF_UP) {
7595                 rtnl_lock();
7596                 err = __igb_open(netdev, true);
7597                 rtnl_unlock();
7598                 if (err)
7599                         return err;
7600         }
7601
7602         netif_device_attach(netdev);
7603         return 0;
7604 }
7605
7606 static int igb_runtime_idle(struct device *dev)
7607 {
7608         struct pci_dev *pdev = to_pci_dev(dev);
7609         struct net_device *netdev = pci_get_drvdata(pdev);
7610         struct igb_adapter *adapter = netdev_priv(netdev);
7611
7612         if (!igb_has_link(adapter))
7613                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7614
7615         return -EBUSY;
7616 }
7617
7618 static int igb_runtime_suspend(struct device *dev)
7619 {
7620         struct pci_dev *pdev = to_pci_dev(dev);
7621         int retval;
7622         bool wake;
7623
7624         retval = __igb_shutdown(pdev, &wake, 1);
7625         if (retval)
7626                 return retval;
7627
7628         if (wake) {
7629                 pci_prepare_to_sleep(pdev);
7630         } else {
7631                 pci_wake_from_d3(pdev, false);
7632                 pci_set_power_state(pdev, PCI_D3hot);
7633         }
7634
7635         return 0;
7636 }
7637
7638 static int igb_runtime_resume(struct device *dev)
7639 {
7640         return igb_resume(dev);
7641 }
7642 #endif /* CONFIG_PM */
7643
7644 static void igb_shutdown(struct pci_dev *pdev)
7645 {
7646         bool wake;
7647
7648         __igb_shutdown(pdev, &wake, 0);
7649
7650         if (system_state == SYSTEM_POWER_OFF) {
7651                 pci_wake_from_d3(pdev, wake);
7652                 pci_set_power_state(pdev, PCI_D3hot);
7653         }
7654 }
7655
7656 #ifdef CONFIG_PCI_IOV
7657 static int igb_sriov_reinit(struct pci_dev *dev)
7658 {
7659         struct net_device *netdev = pci_get_drvdata(dev);
7660         struct igb_adapter *adapter = netdev_priv(netdev);
7661         struct pci_dev *pdev = adapter->pdev;
7662
7663         rtnl_lock();
7664
7665         if (netif_running(netdev))
7666                 igb_close(netdev);
7667         else
7668                 igb_reset(adapter);
7669
7670         igb_clear_interrupt_scheme(adapter);
7671
7672         igb_init_queue_configuration(adapter);
7673
7674         if (igb_init_interrupt_scheme(adapter, true)) {
7675                 rtnl_unlock();
7676                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7677                 return -ENOMEM;
7678         }
7679
7680         if (netif_running(netdev))
7681                 igb_open(netdev);
7682
7683         rtnl_unlock();
7684
7685         return 0;
7686 }
7687
7688 static int igb_pci_disable_sriov(struct pci_dev *dev)
7689 {
7690         int err = igb_disable_sriov(dev);
7691
7692         if (!err)
7693                 err = igb_sriov_reinit(dev);
7694
7695         return err;
7696 }
7697
7698 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7699 {
7700         int err = igb_enable_sriov(dev, num_vfs);
7701
7702         if (err)
7703                 goto out;
7704
7705         err = igb_sriov_reinit(dev);
7706         if (!err)
7707                 return num_vfs;
7708
7709 out:
7710         return err;
7711 }
7712
7713 #endif
7714 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7715 {
7716 #ifdef CONFIG_PCI_IOV
7717         if (num_vfs == 0)
7718                 return igb_pci_disable_sriov(dev);
7719         else
7720                 return igb_pci_enable_sriov(dev, num_vfs);
7721 #endif
7722         return 0;
7723 }
7724
7725 #ifdef CONFIG_NET_POLL_CONTROLLER
7726 /* Polling 'interrupt' - used by things like netconsole to send skbs
7727  * without having to re-enable interrupts. It's not called while
7728  * the interrupt routine is executing.
7729  */
7730 static void igb_netpoll(struct net_device *netdev)
7731 {
7732         struct igb_adapter *adapter = netdev_priv(netdev);
7733         struct e1000_hw *hw = &adapter->hw;
7734         struct igb_q_vector *q_vector;
7735         int i;
7736
7737         for (i = 0; i < adapter->num_q_vectors; i++) {
7738                 q_vector = adapter->q_vector[i];
7739                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7740                         wr32(E1000_EIMC, q_vector->eims_value);
7741                 else
7742                         igb_irq_disable(adapter);
7743                 napi_schedule(&q_vector->napi);
7744         }
7745 }
7746 #endif /* CONFIG_NET_POLL_CONTROLLER */
7747
7748 /**
7749  *  igb_io_error_detected - called when PCI error is detected
7750  *  @pdev: Pointer to PCI device
7751  *  @state: The current pci connection state
7752  *
7753  *  This function is called after a PCI bus error affecting
7754  *  this device has been detected.
7755  **/
7756 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7757                                               pci_channel_state_t state)
7758 {
7759         struct net_device *netdev = pci_get_drvdata(pdev);
7760         struct igb_adapter *adapter = netdev_priv(netdev);
7761
7762         netif_device_detach(netdev);
7763
7764         if (state == pci_channel_io_perm_failure)
7765                 return PCI_ERS_RESULT_DISCONNECT;
7766
7767         if (netif_running(netdev))
7768                 igb_down(adapter);
7769         pci_disable_device(pdev);
7770
7771         /* Request a slot slot reset. */
7772         return PCI_ERS_RESULT_NEED_RESET;
7773 }
7774
7775 /**
7776  *  igb_io_slot_reset - called after the pci bus has been reset.
7777  *  @pdev: Pointer to PCI device
7778  *
7779  *  Restart the card from scratch, as if from a cold-boot. Implementation
7780  *  resembles the first-half of the igb_resume routine.
7781  **/
7782 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7783 {
7784         struct net_device *netdev = pci_get_drvdata(pdev);
7785         struct igb_adapter *adapter = netdev_priv(netdev);
7786         struct e1000_hw *hw = &adapter->hw;
7787         pci_ers_result_t result;
7788         int err;
7789
7790         if (pci_enable_device_mem(pdev)) {
7791                 dev_err(&pdev->dev,
7792                         "Cannot re-enable PCI device after reset.\n");
7793                 result = PCI_ERS_RESULT_DISCONNECT;
7794         } else {
7795                 pci_set_master(pdev);
7796                 pci_restore_state(pdev);
7797                 pci_save_state(pdev);
7798
7799                 pci_enable_wake(pdev, PCI_D3hot, 0);
7800                 pci_enable_wake(pdev, PCI_D3cold, 0);
7801
7802                 igb_reset(adapter);
7803                 wr32(E1000_WUS, ~0);
7804                 result = PCI_ERS_RESULT_RECOVERED;
7805         }
7806
7807         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7808         if (err) {
7809                 dev_err(&pdev->dev,
7810                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7811                         err);
7812                 /* non-fatal, continue */
7813         }
7814
7815         return result;
7816 }
7817
7818 /**
7819  *  igb_io_resume - called when traffic can start flowing again.
7820  *  @pdev: Pointer to PCI device
7821  *
7822  *  This callback is called when the error recovery driver tells us that
7823  *  its OK to resume normal operation. Implementation resembles the
7824  *  second-half of the igb_resume routine.
7825  */
7826 static void igb_io_resume(struct pci_dev *pdev)
7827 {
7828         struct net_device *netdev = pci_get_drvdata(pdev);
7829         struct igb_adapter *adapter = netdev_priv(netdev);
7830
7831         if (netif_running(netdev)) {
7832                 if (igb_up(adapter)) {
7833                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7834                         return;
7835                 }
7836         }
7837
7838         netif_device_attach(netdev);
7839
7840         /* let the f/w know that the h/w is now under the control of the
7841          * driver.
7842          */
7843         igb_get_hw_control(adapter);
7844 }
7845
7846 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7847                              u8 qsel)
7848 {
7849         struct e1000_hw *hw = &adapter->hw;
7850         u32 rar_low, rar_high;
7851
7852         /* HW expects these to be in network order when they are plugged
7853          * into the registers which are little endian.  In order to guarantee
7854          * that ordering we need to do an leXX_to_cpup here in order to be
7855          * ready for the byteswap that occurs with writel
7856          */
7857         rar_low = le32_to_cpup((__le32 *)(addr));
7858         rar_high = le16_to_cpup((__le16 *)(addr + 4));
7859
7860         /* Indicate to hardware the Address is Valid. */
7861         rar_high |= E1000_RAH_AV;
7862
7863         if (hw->mac.type == e1000_82575)
7864                 rar_high |= E1000_RAH_POOL_1 * qsel;
7865         else
7866                 rar_high |= E1000_RAH_POOL_1 << qsel;
7867
7868         wr32(E1000_RAL(index), rar_low);
7869         wrfl();
7870         wr32(E1000_RAH(index), rar_high);
7871         wrfl();
7872 }
7873
7874 static int igb_set_vf_mac(struct igb_adapter *adapter,
7875                           int vf, unsigned char *mac_addr)
7876 {
7877         struct e1000_hw *hw = &adapter->hw;
7878         /* VF MAC addresses start at end of receive addresses and moves
7879          * towards the first, as a result a collision should not be possible
7880          */
7881         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7882
7883         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7884
7885         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7886
7887         return 0;
7888 }
7889
7890 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7891 {
7892         struct igb_adapter *adapter = netdev_priv(netdev);
7893         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7894                 return -EINVAL;
7895         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7896         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7897         dev_info(&adapter->pdev->dev,
7898                  "Reload the VF driver to make this change effective.");
7899         if (test_bit(__IGB_DOWN, &adapter->state)) {
7900                 dev_warn(&adapter->pdev->dev,
7901                          "The VF MAC address has been set, but the PF device is not up.\n");
7902                 dev_warn(&adapter->pdev->dev,
7903                          "Bring the PF device up before attempting to use the VF device.\n");
7904         }
7905         return igb_set_vf_mac(adapter, vf, mac);
7906 }
7907
7908 static int igb_link_mbps(int internal_link_speed)
7909 {
7910         switch (internal_link_speed) {
7911         case SPEED_100:
7912                 return 100;
7913         case SPEED_1000:
7914                 return 1000;
7915         default:
7916                 return 0;
7917         }
7918 }
7919
7920 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7921                                   int link_speed)
7922 {
7923         int rf_dec, rf_int;
7924         u32 bcnrc_val;
7925
7926         if (tx_rate != 0) {
7927                 /* Calculate the rate factor values to set */
7928                 rf_int = link_speed / tx_rate;
7929                 rf_dec = (link_speed - (rf_int * tx_rate));
7930                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
7931                          tx_rate;
7932
7933                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7934                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7935                               E1000_RTTBCNRC_RF_INT_MASK);
7936                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7937         } else {
7938                 bcnrc_val = 0;
7939         }
7940
7941         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7942         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7943          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7944          */
7945         wr32(E1000_RTTBCNRM, 0x14);
7946         wr32(E1000_RTTBCNRC, bcnrc_val);
7947 }
7948
7949 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7950 {
7951         int actual_link_speed, i;
7952         bool reset_rate = false;
7953
7954         /* VF TX rate limit was not set or not supported */
7955         if ((adapter->vf_rate_link_speed == 0) ||
7956             (adapter->hw.mac.type != e1000_82576))
7957                 return;
7958
7959         actual_link_speed = igb_link_mbps(adapter->link_speed);
7960         if (actual_link_speed != adapter->vf_rate_link_speed) {
7961                 reset_rate = true;
7962                 adapter->vf_rate_link_speed = 0;
7963                 dev_info(&adapter->pdev->dev,
7964                          "Link speed has been changed. VF Transmit rate is disabled\n");
7965         }
7966
7967         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7968                 if (reset_rate)
7969                         adapter->vf_data[i].tx_rate = 0;
7970
7971                 igb_set_vf_rate_limit(&adapter->hw, i,
7972                                       adapter->vf_data[i].tx_rate,
7973                                       actual_link_speed);
7974         }
7975 }
7976
7977 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
7978                              int min_tx_rate, int max_tx_rate)
7979 {
7980         struct igb_adapter *adapter = netdev_priv(netdev);
7981         struct e1000_hw *hw = &adapter->hw;
7982         int actual_link_speed;
7983
7984         if (hw->mac.type != e1000_82576)
7985                 return -EOPNOTSUPP;
7986
7987         if (min_tx_rate)
7988                 return -EINVAL;
7989
7990         actual_link_speed = igb_link_mbps(adapter->link_speed);
7991         if ((vf >= adapter->vfs_allocated_count) ||
7992             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7993             (max_tx_rate < 0) ||
7994             (max_tx_rate > actual_link_speed))
7995                 return -EINVAL;
7996
7997         adapter->vf_rate_link_speed = actual_link_speed;
7998         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
7999         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
8000
8001         return 0;
8002 }
8003
8004 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
8005                                    bool setting)
8006 {
8007         struct igb_adapter *adapter = netdev_priv(netdev);
8008         struct e1000_hw *hw = &adapter->hw;
8009         u32 reg_val, reg_offset;
8010
8011         if (!adapter->vfs_allocated_count)
8012                 return -EOPNOTSUPP;
8013
8014         if (vf >= adapter->vfs_allocated_count)
8015                 return -EINVAL;
8016
8017         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
8018         reg_val = rd32(reg_offset);
8019         if (setting)
8020                 reg_val |= (BIT(vf) |
8021                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8022         else
8023                 reg_val &= ~(BIT(vf) |
8024                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8025         wr32(reg_offset, reg_val);
8026
8027         adapter->vf_data[vf].spoofchk_enabled = setting;
8028         return 0;
8029 }
8030
8031 static int igb_ndo_get_vf_config(struct net_device *netdev,
8032                                  int vf, struct ifla_vf_info *ivi)
8033 {
8034         struct igb_adapter *adapter = netdev_priv(netdev);
8035         if (vf >= adapter->vfs_allocated_count)
8036                 return -EINVAL;
8037         ivi->vf = vf;
8038         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
8039         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
8040         ivi->min_tx_rate = 0;
8041         ivi->vlan = adapter->vf_data[vf].pf_vlan;
8042         ivi->qos = adapter->vf_data[vf].pf_qos;
8043         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
8044         return 0;
8045 }
8046
8047 static void igb_vmm_control(struct igb_adapter *adapter)
8048 {
8049         struct e1000_hw *hw = &adapter->hw;
8050         u32 reg;
8051
8052         switch (hw->mac.type) {
8053         case e1000_82575:
8054         case e1000_i210:
8055         case e1000_i211:
8056         case e1000_i354:
8057         default:
8058                 /* replication is not supported for 82575 */
8059                 return;
8060         case e1000_82576:
8061                 /* notify HW that the MAC is adding vlan tags */
8062                 reg = rd32(E1000_DTXCTL);
8063                 reg |= E1000_DTXCTL_VLAN_ADDED;
8064                 wr32(E1000_DTXCTL, reg);
8065                 /* Fall through */
8066         case e1000_82580:
8067                 /* enable replication vlan tag stripping */
8068                 reg = rd32(E1000_RPLOLR);
8069                 reg |= E1000_RPLOLR_STRVLAN;
8070                 wr32(E1000_RPLOLR, reg);
8071                 /* Fall through */
8072         case e1000_i350:
8073                 /* none of the above registers are supported by i350 */
8074                 break;
8075         }
8076
8077         if (adapter->vfs_allocated_count) {
8078                 igb_vmdq_set_loopback_pf(hw, true);
8079                 igb_vmdq_set_replication_pf(hw, true);
8080                 igb_vmdq_set_anti_spoofing_pf(hw, true,
8081                                               adapter->vfs_allocated_count);
8082         } else {
8083                 igb_vmdq_set_loopback_pf(hw, false);
8084                 igb_vmdq_set_replication_pf(hw, false);
8085         }
8086 }
8087
8088 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
8089 {
8090         struct e1000_hw *hw = &adapter->hw;
8091         u32 dmac_thr;
8092         u16 hwm;
8093
8094         if (hw->mac.type > e1000_82580) {
8095                 if (adapter->flags & IGB_FLAG_DMAC) {
8096                         u32 reg;
8097
8098                         /* force threshold to 0. */
8099                         wr32(E1000_DMCTXTH, 0);
8100
8101                         /* DMA Coalescing high water mark needs to be greater
8102                          * than the Rx threshold. Set hwm to PBA - max frame
8103                          * size in 16B units, capping it at PBA - 6KB.
8104                          */
8105                         hwm = 64 * (pba - 6);
8106                         reg = rd32(E1000_FCRTC);
8107                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
8108                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
8109                                 & E1000_FCRTC_RTH_COAL_MASK);
8110                         wr32(E1000_FCRTC, reg);
8111
8112                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8113                          * frame size, capping it at PBA - 10KB.
8114                          */
8115                         dmac_thr = pba - 10;
8116                         reg = rd32(E1000_DMACR);
8117                         reg &= ~E1000_DMACR_DMACTHR_MASK;
8118                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
8119                                 & E1000_DMACR_DMACTHR_MASK);
8120
8121                         /* transition to L0x or L1 if available..*/
8122                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
8123
8124                         /* watchdog timer= +-1000 usec in 32usec intervals */
8125                         reg |= (1000 >> 5);
8126
8127                         /* Disable BMC-to-OS Watchdog Enable */
8128                         if (hw->mac.type != e1000_i354)
8129                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
8130
8131                         wr32(E1000_DMACR, reg);
8132
8133                         /* no lower threshold to disable
8134                          * coalescing(smart fifb)-UTRESH=0
8135                          */
8136                         wr32(E1000_DMCRTRH, 0);
8137
8138                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
8139
8140                         wr32(E1000_DMCTLX, reg);
8141
8142                         /* free space in tx packet buffer to wake from
8143                          * DMA coal
8144                          */
8145                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
8146                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
8147
8148                         /* make low power state decision controlled
8149                          * by DMA coal
8150                          */
8151                         reg = rd32(E1000_PCIEMISC);
8152                         reg &= ~E1000_PCIEMISC_LX_DECISION;
8153                         wr32(E1000_PCIEMISC, reg);
8154                 } /* endif adapter->dmac is not disabled */
8155         } else if (hw->mac.type == e1000_82580) {
8156                 u32 reg = rd32(E1000_PCIEMISC);
8157
8158                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8159                 wr32(E1000_DMACR, 0);
8160         }
8161 }
8162
8163 /**
8164  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8165  *  @hw: pointer to hardware structure
8166  *  @byte_offset: byte offset to read
8167  *  @dev_addr: device address
8168  *  @data: value read
8169  *
8170  *  Performs byte read operation over I2C interface at
8171  *  a specified device address.
8172  **/
8173 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8174                       u8 dev_addr, u8 *data)
8175 {
8176         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8177         struct i2c_client *this_client = adapter->i2c_client;
8178         s32 status;
8179         u16 swfw_mask = 0;
8180
8181         if (!this_client)
8182                 return E1000_ERR_I2C;
8183
8184         swfw_mask = E1000_SWFW_PHY0_SM;
8185
8186         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8187                 return E1000_ERR_SWFW_SYNC;
8188
8189         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8190         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8191
8192         if (status < 0)
8193                 return E1000_ERR_I2C;
8194         else {
8195                 *data = status;
8196                 return 0;
8197         }
8198 }
8199
8200 /**
8201  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8202  *  @hw: pointer to hardware structure
8203  *  @byte_offset: byte offset to write
8204  *  @dev_addr: device address
8205  *  @data: value to write
8206  *
8207  *  Performs byte write operation over I2C interface at
8208  *  a specified device address.
8209  **/
8210 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8211                        u8 dev_addr, u8 data)
8212 {
8213         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8214         struct i2c_client *this_client = adapter->i2c_client;
8215         s32 status;
8216         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8217
8218         if (!this_client)
8219                 return E1000_ERR_I2C;
8220
8221         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8222                 return E1000_ERR_SWFW_SYNC;
8223         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8224         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8225
8226         if (status)
8227                 return E1000_ERR_I2C;
8228         else
8229                 return 0;
8230
8231 }
8232
8233 int igb_reinit_queues(struct igb_adapter *adapter)
8234 {
8235         struct net_device *netdev = adapter->netdev;
8236         struct pci_dev *pdev = adapter->pdev;
8237         int err = 0;
8238
8239         if (netif_running(netdev))
8240                 igb_close(netdev);
8241
8242         igb_reset_interrupt_capability(adapter);
8243
8244         if (igb_init_interrupt_scheme(adapter, true)) {
8245                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8246                 return -ENOMEM;
8247         }
8248
8249         if (netif_running(netdev))
8250                 err = igb_open(netdev);
8251
8252         return err;
8253 }
8254 /* igb_main.c */