drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/vxlan.h>
  54 #include <net/pkt_cls.h>
  55 #include <net/tc_act/tc_gact.h>
  56 #include <net/tc_act/tc_mirred.h>
  57
  58 #include "ixgbe.h"
  59 #include "ixgbe_common.h"
  60 #include "ixgbe_dcb_82599.h"
  61 #include "ixgbe_sriov.h"
  62 #include "ixgbe_model.h"
  63
  64 char ixgbe_driver_name[] = "ixgbe";
  65 static const char ixgbe_driver_string[] =
  66                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  67 #ifdef IXGBE_FCOE
  68 char ixgbe_default_device_descr[] =
  69                               "Intel(R) 10 Gigabit Network Connection";
  70 #else
  71 static char ixgbe_default_device_descr[] =
  72                               "Intel(R) 10 Gigabit Network Connection";
  73 #endif
  74 #define DRV_VERSION "4.4.0-k"
  75 const char ixgbe_driver_version[] = DRV_VERSION;
  76 static const char ixgbe_copyright[] =
  77                                 "Copyright (c) 1999-2016 Intel Corporation.";
  78
  79 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  80
  81 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  82         [board_82598]           = &ixgbe_82598_info,
  83         [board_82599]           = &ixgbe_82599_info,
  84         [board_X540]            = &ixgbe_X540_info,
  85         [board_X550]            = &ixgbe_X550_info,
  86         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  87         [board_x550em_a]        = &ixgbe_x550em_a_info,
  88 };
  89
  90 /* ixgbe_pci_tbl - PCI Device ID Table
  91  *
  92  * Wildcard entries (PCI_ANY_ID) should come last
  93  * Last entry must be all 0s
  94  *
  95  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  96  *   Class, Class Mask, private data (not used) }
  97  */
  98 static const struct pci_device_id ixgbe_pci_tbl[] = {
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 141         /* required last entry */
 142         {0, }
 143 };
 144 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 145
 146 #ifdef CONFIG_IXGBE_DCA
 147 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 148                             void *p);
 149 static struct notifier_block dca_notifier = {
 150         .notifier_call = ixgbe_notify_dca,
 151         .next          = NULL,
 152         .priority      = 0
 153 };
 154 #endif
 155
 156 #ifdef CONFIG_PCI_IOV
 157 static unsigned int max_vfs;
 158 module_param(max_vfs, uint, 0);
 159 MODULE_PARM_DESC(max_vfs,
 160                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 161 #endif /* CONFIG_PCI_IOV */
 162
 163 static unsigned int allow_unsupported_sfp;
 164 module_param(allow_unsupported_sfp, uint, 0);
 165 MODULE_PARM_DESC(allow_unsupported_sfp,
 166                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 167
 168 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 169 static int debug = -1;
 170 module_param(debug, int, 0);
 171 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 172
 173 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 174 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 175 MODULE_LICENSE("GPL");
 176 MODULE_VERSION(DRV_VERSION);
 177
 178 static struct workqueue_struct *ixgbe_wq;
 179
 180 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 181
 182 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 183                                           u32 reg, u16 *value)
 184 {
 185         struct pci_dev *parent_dev;
 186         struct pci_bus *parent_bus;
 187
 188         parent_bus = adapter->pdev->bus->parent;
 189         if (!parent_bus)
 190                 return -1;
 191
 192         parent_dev = parent_bus->self;
 193         if (!parent_dev)
 194                 return -1;
 195
 196         if (!pci_is_pcie(parent_dev))
 197                 return -1;
 198
 199         pcie_capability_read_word(parent_dev, reg, value);
 200         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 201             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 202                 return -1;
 203         return 0;
 204 }
 205
 206 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 207 {
 208         struct ixgbe_hw *hw = &adapter->hw;
 209         u16 link_status = 0;
 210         int err;
 211
 212         hw->bus.type = ixgbe_bus_type_pci_express;
 213
 214         /* Get the negotiated link width and speed from PCI config space of the
 215          * parent, as this device is behind a switch
 216          */
 217         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 218
 219         /* assume caller will handle error case */
 220         if (err)
 221                 return err;
 222
 223         hw->bus.width = ixgbe_convert_bus_width(link_status);
 224         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 225
 226         return 0;
 227 }
 228
 229 /**
 230  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 231  * @hw: hw specific details
 232  *
 233  * This function is used by probe to determine whether a device's PCI-Express
 234  * bandwidth details should be gathered from the parent bus instead of from the
 235  * device. Used to ensure that various locations all have the correct device ID
 236  * checks.
 237  */
 238 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 239 {
 240         switch (hw->device_id) {
 241         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 242         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 243                 return true;
 244         default:
 245                 return false;
 246         }
 247 }
 248
 249 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 250                                      int expected_gts)
 251 {
 252         struct ixgbe_hw *hw = &adapter->hw;
 253         int max_gts = 0;
 254         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 255         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 256         struct pci_dev *pdev;
 257
 258         /* Some devices are not connected over PCIe and thus do not negotiate
 259          * speed. These devices do not have valid bus info, and thus any report
 260          * we generate may not be correct.
 261          */
 262         if (hw->bus.type == ixgbe_bus_type_internal)
 263                 return;
 264
 265         /* determine whether to use the parent device */
 266         if (ixgbe_pcie_from_parent(&adapter->hw))
 267                 pdev = adapter->pdev->bus->parent->self;
 268         else
 269                 pdev = adapter->pdev;
 270
 271         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 272             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 273                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 274                 return;
 275         }
 276
 277         switch (speed) {
 278         case PCIE_SPEED_2_5GT:
 279                 /* 8b/10b encoding reduces max throughput by 20% */
 280                 max_gts = 2 * width;
 281                 break;
 282         case PCIE_SPEED_5_0GT:
 283                 /* 8b/10b encoding reduces max throughput by 20% */
 284                 max_gts = 4 * width;
 285                 break;
 286         case PCIE_SPEED_8_0GT:
 287                 /* 128b/130b encoding reduces throughput by less than 2% */
 288                 max_gts = 8 * width;
 289                 break;
 290         default:
 291                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 292                 return;
 293         }
 294
 295         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 296                    max_gts);
 297         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 298                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 299                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 300                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 301                     "Unknown"),
 302                    width,
 303                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 304                     speed == PCIE_SPEED_5_0GT ? "20%" :
 305                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 306                     "Unknown"));
 307
 308         if (max_gts < expected_gts) {
 309                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 310                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 311                         expected_gts);
 312                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 313         }
 314 }
 315
 316 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 317 {
 318         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 319             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 320             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 321                 queue_work(ixgbe_wq, &adapter->service_task);
 322 }
 323
 324 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 325 {
 326         struct ixgbe_adapter *adapter = hw->back;
 327
 328         if (!hw->hw_addr)
 329                 return;
 330         hw->hw_addr = NULL;
 331         e_dev_err("Adapter removed\n");
 332         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 333                 ixgbe_service_event_schedule(adapter);
 334 }
 335
 336 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 337 {
 338         u32 value;
 339
 340         /* The following check not only optimizes a bit by not
 341          * performing a read on the status register when the
 342          * register just read was a status register read that
 343          * returned IXGBE_FAILED_READ_REG. It also blocks any
 344          * potential recursion.
 345          */
 346         if (reg == IXGBE_STATUS) {
 347                 ixgbe_remove_adapter(hw);
 348                 return;
 349         }
 350         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 351         if (value == IXGBE_FAILED_READ_REG)
 352                 ixgbe_remove_adapter(hw);
 353 }
 354
 355 /**
 356  * ixgbe_read_reg - Read from device register
 357  * @hw: hw specific details
 358  * @reg: offset of register to read
 359  *
 360  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 361  *
 362  * This function is used to read device registers. It checks for device
 363  * removal by confirming any read that returns all ones by checking the
 364  * status register value for all ones. This function avoids reading from
 365  * the hardware if a removal was previously detected in which case it
 366  * returns IXGBE_FAILED_READ_REG (all ones).
 367  */
 368 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 369 {
 370         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 371         u32 value;
 372
 373         if (ixgbe_removed(reg_addr))
 374                 return IXGBE_FAILED_READ_REG;
 375         if (unlikely(hw->phy.nw_mng_if_sel &
 376                      IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
 377                 struct ixgbe_adapter *adapter;
 378                 int i;
 379
 380                 for (i = 0; i < 200; ++i) {
 381                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 382                         if (likely(!value))
 383                                 goto writes_completed;
 384                         if (value == IXGBE_FAILED_READ_REG) {
 385                                 ixgbe_remove_adapter(hw);
 386                                 return IXGBE_FAILED_READ_REG;
 387                         }
 388                         udelay(5);
 389                 }
 390
 391                 adapter = hw->back;
 392                 e_warn(hw, "register writes incomplete %08x\n", value);
 393         }
 394
 395 writes_completed:
 396         value = readl(reg_addr + reg);
 397         if (unlikely(value == IXGBE_FAILED_READ_REG))
 398                 ixgbe_check_remove(hw, reg);
 399         return value;
 400 }
 401
 402 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 403 {
 404         u16 value;
 405
 406         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 407         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 408                 ixgbe_remove_adapter(hw);
 409                 return true;
 410         }
 411         return false;
 412 }
 413
 414 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 415 {
 416         struct ixgbe_adapter *adapter = hw->back;
 417         u16 value;
 418
 419         if (ixgbe_removed(hw->hw_addr))
 420                 return IXGBE_FAILED_READ_CFG_WORD;
 421         pci_read_config_word(adapter->pdev, reg, &value);
 422         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 423             ixgbe_check_cfg_remove(hw, adapter->pdev))
 424                 return IXGBE_FAILED_READ_CFG_WORD;
 425         return value;
 426 }
 427
 428 #ifdef CONFIG_PCI_IOV
 429 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 430 {
 431         struct ixgbe_adapter *adapter = hw->back;
 432         u32 value;
 433
 434         if (ixgbe_removed(hw->hw_addr))
 435                 return IXGBE_FAILED_READ_CFG_DWORD;
 436         pci_read_config_dword(adapter->pdev, reg, &value);
 437         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 438             ixgbe_check_cfg_remove(hw, adapter->pdev))
 439                 return IXGBE_FAILED_READ_CFG_DWORD;
 440         return value;
 441 }
 442 #endif /* CONFIG_PCI_IOV */
 443
 444 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 445 {
 446         struct ixgbe_adapter *adapter = hw->back;
 447
 448         if (ixgbe_removed(hw->hw_addr))
 449                 return;
 450         pci_write_config_word(adapter->pdev, reg, value);
 451 }
 452
 453 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 454 {
 455         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 456
 457         /* flush memory to make sure state is correct before next watchdog */
 458         smp_mb__before_atomic();
 459         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 460 }
 461
 462 struct ixgbe_reg_info {
 463         u32 ofs;
 464         char *name;
 465 };
 466
 467 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 468
 469         /* General Registers */
 470         {IXGBE_CTRL, "CTRL"},
 471         {IXGBE_STATUS, "STATUS"},
 472         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 473
 474         /* Interrupt Registers */
 475         {IXGBE_EICR, "EICR"},
 476
 477         /* RX Registers */
 478         {IXGBE_SRRCTL(0), "SRRCTL"},
 479         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 480         {IXGBE_RDLEN(0), "RDLEN"},
 481         {IXGBE_RDH(0), "RDH"},
 482         {IXGBE_RDT(0), "RDT"},
 483         {IXGBE_RXDCTL(0), "RXDCTL"},
 484         {IXGBE_RDBAL(0), "RDBAL"},
 485         {IXGBE_RDBAH(0), "RDBAH"},
 486
 487         /* TX Registers */
 488         {IXGBE_TDBAL(0), "TDBAL"},
 489         {IXGBE_TDBAH(0), "TDBAH"},
 490         {IXGBE_TDLEN(0), "TDLEN"},
 491         {IXGBE_TDH(0), "TDH"},
 492         {IXGBE_TDT(0), "TDT"},
 493         {IXGBE_TXDCTL(0), "TXDCTL"},
 494
 495         /* List Terminator */
 496         { .name = NULL }
 497 };
 498
 499
 500 /*
 501  * ixgbe_regdump - register printout routine
 502  */
 503 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 504 {
 505         int i = 0, j = 0;
 506         char rname[16];
 507         u32 regs[64];
 508
 509         switch (reginfo->ofs) {
 510         case IXGBE_SRRCTL(0):
 511                 for (i = 0; i < 64; i++)
 512                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 513                 break;
 514         case IXGBE_DCA_RXCTRL(0):
 515                 for (i = 0; i < 64; i++)
 516                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 517                 break;
 518         case IXGBE_RDLEN(0):
 519                 for (i = 0; i < 64; i++)
 520                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 521                 break;
 522         case IXGBE_RDH(0):
 523                 for (i = 0; i < 64; i++)
 524                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 525                 break;
 526         case IXGBE_RDT(0):
 527                 for (i = 0; i < 64; i++)
 528                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 529                 break;
 530         case IXGBE_RXDCTL(0):
 531                 for (i = 0; i < 64; i++)
 532                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 533                 break;
 534         case IXGBE_RDBAL(0):
 535                 for (i = 0; i < 64; i++)
 536                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 537                 break;
 538         case IXGBE_RDBAH(0):
 539                 for (i = 0; i < 64; i++)
 540                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 541                 break;
 542         case IXGBE_TDBAL(0):
 543                 for (i = 0; i < 64; i++)
 544                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 545                 break;
 546         case IXGBE_TDBAH(0):
 547                 for (i = 0; i < 64; i++)
 548                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 549                 break;
 550         case IXGBE_TDLEN(0):
 551                 for (i = 0; i < 64; i++)
 552                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 553                 break;
 554         case IXGBE_TDH(0):
 555                 for (i = 0; i < 64; i++)
 556                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 557                 break;
 558         case IXGBE_TDT(0):
 559                 for (i = 0; i < 64; i++)
 560                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 561                 break;
 562         case IXGBE_TXDCTL(0):
 563                 for (i = 0; i < 64; i++)
 564                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 565                 break;
 566         default:
 567                 pr_info("%-15s %08x\n", reginfo->name,
 568                         IXGBE_READ_REG(hw, reginfo->ofs));
 569                 return;
 570         }
 571
 572         for (i = 0; i < 8; i++) {
 573                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 574                 pr_err("%-15s", rname);
 575                 for (j = 0; j < 8; j++)
 576                         pr_cont(" %08x", regs[i*8+j]);
 577                 pr_cont("\n");
 578         }
 579
 580 }
 581
 582 /*
 583  * ixgbe_dump - Print registers, tx-rings and rx-rings
 584  */
 585 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 586 {
 587         struct net_device *netdev = adapter->netdev;
 588         struct ixgbe_hw *hw = &adapter->hw;
 589         struct ixgbe_reg_info *reginfo;
 590         int n = 0;
 591         struct ixgbe_ring *tx_ring;
 592         struct ixgbe_tx_buffer *tx_buffer;
 593         union ixgbe_adv_tx_desc *tx_desc;
 594         struct my_u0 { u64 a; u64 b; } *u0;
 595         struct ixgbe_ring *rx_ring;
 596         union ixgbe_adv_rx_desc *rx_desc;
 597         struct ixgbe_rx_buffer *rx_buffer_info;
 598         u32 staterr;
 599         int i = 0;
 600
 601         if (!netif_msg_hw(adapter))
 602                 return;
 603
 604         /* Print netdevice Info */
 605         if (netdev) {
 606                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 607                 pr_info("Device Name     state            "
 608                         "trans_start      last_rx\n");
 609                 pr_info("%-15s %016lX %016lX %016lX\n",
 610                         netdev->name,
 611                         netdev->state,
 612                         netdev->trans_start,
 613                         netdev->last_rx);
 614         }
 615
 616         /* Print Registers */
 617         dev_info(&adapter->pdev->dev, "Register Dump\n");
 618         pr_info(" Register Name   Value\n");
 619         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 620              reginfo->name; reginfo++) {
 621                 ixgbe_regdump(hw, reginfo);
 622         }
 623
 624         /* Print TX Ring Summary */
 625         if (!netdev || !netif_running(netdev))
 626                 return;
 627
 628         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 629         pr_info(" %s     %s              %s        %s\n",
 630                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 631                 "leng", "ntw", "timestamp");
 632         for (n = 0; n < adapter->num_tx_queues; n++) {
 633                 tx_ring = adapter->tx_ring[n];
 634                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 635                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 636                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 637                            (u64)dma_unmap_addr(tx_buffer, dma),
 638                            dma_unmap_len(tx_buffer, len),
 639                            tx_buffer->next_to_watch,
 640                            (u64)tx_buffer->time_stamp);
 641         }
 642
 643         /* Print TX Rings */
 644         if (!netif_msg_tx_done(adapter))
 645                 goto rx_ring_summary;
 646
 647         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 648
 649         /* Transmit Descriptor Formats
 650          *
 651          * 82598 Advanced Transmit Descriptor
 652          *   +--------------------------------------------------------------+
 653          * 0 |         Buffer Address [63:0]                                |
 654          *   +--------------------------------------------------------------+
 655          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 656          *   +--------------------------------------------------------------+
 657          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 658          *
 659          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 660          *   +--------------------------------------------------------------+
 661          * 0 |                          RSV [63:0]                          |
 662          *   +--------------------------------------------------------------+
 663          * 8 |            RSV           |  STA  |          NXTSEQ           |
 664          *   +--------------------------------------------------------------+
 665          *   63                       36 35   32 31                         0
 666          *
 667          * 82599+ Advanced Transmit Descriptor
 668          *   +--------------------------------------------------------------+
 669          * 0 |         Buffer Address [63:0]                                |
 670          *   +--------------------------------------------------------------+
 671          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 672          *   +--------------------------------------------------------------+
 673          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 674          *
 675          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 676          *   +--------------------------------------------------------------+
 677          * 0 |                          RSV [63:0]                          |
 678          *   +--------------------------------------------------------------+
 679          * 8 |            RSV           |  STA  |           RSV             |
 680          *   +--------------------------------------------------------------+
 681          *   63                       36 35   32 31                         0
 682          */
 683
 684         for (n = 0; n < adapter->num_tx_queues; n++) {
 685                 tx_ring = adapter->tx_ring[n];
 686                 pr_info("------------------------------------\n");
 687                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 688                 pr_info("------------------------------------\n");
 689                 pr_info("%s%s    %s              %s        %s          %s\n",
 690                         "T [desc]     [address 63:0  ] ",
 691                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 692                         "leng", "ntw", "timestamp", "bi->skb");
 693
 694                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 695                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 696                         tx_buffer = &tx_ring->tx_buffer_info[i];
 697                         u0 = (struct my_u0 *)tx_desc;
 698                         if (dma_unmap_len(tx_buffer, len) > 0) {
 699                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 700                                         i,
 701                                         le64_to_cpu(u0->a),
 702                                         le64_to_cpu(u0->b),
 703                                         (u64)dma_unmap_addr(tx_buffer, dma),
 704                                         dma_unmap_len(tx_buffer, len),
 705                                         tx_buffer->next_to_watch,
 706                                         (u64)tx_buffer->time_stamp,
 707                                         tx_buffer->skb);
 708                                 if (i == tx_ring->next_to_use &&
 709                                         i == tx_ring->next_to_clean)
 710                                         pr_cont(" NTC/U\n");
 711                                 else if (i == tx_ring->next_to_use)
 712                                         pr_cont(" NTU\n");
 713                                 else if (i == tx_ring->next_to_clean)
 714                                         pr_cont(" NTC\n");
 715                                 else
 716                                         pr_cont("\n");
 717
 718                                 if (netif_msg_pktdata(adapter) &&
 719                                     tx_buffer->skb)
 720                                         print_hex_dump(KERN_INFO, "",
 721                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 722                                                 tx_buffer->skb->data,
 723                                                 dma_unmap_len(tx_buffer, len),
 724                                                 true);
 725                         }
 726                 }
 727         }
 728
 729         /* Print RX Rings Summary */
 730 rx_ring_summary:
 731         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 732         pr_info("Queue [NTU] [NTC]\n");
 733         for (n = 0; n < adapter->num_rx_queues; n++) {
 734                 rx_ring = adapter->rx_ring[n];
 735                 pr_info("%5d %5X %5X\n",
 736                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 737         }
 738
 739         /* Print RX Rings */
 740         if (!netif_msg_rx_status(adapter))
 741                 return;
 742
 743         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 744
 745         /* Receive Descriptor Formats
 746          *
 747          * 82598 Advanced Receive Descriptor (Read) Format
 748          *    63                                           1        0
 749          *    +-----------------------------------------------------+
 750          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 751          *    +----------------------------------------------+------+
 752          *  8 |       Header Buffer Address [63:1]           |  DD  |
 753          *    +-----------------------------------------------------+
 754          *
 755          *
 756          * 82598 Advanced Receive Descriptor (Write-Back) Format
 757          *
 758          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 759          *   +------------------------------------------------------+
 760          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 761          *   | Packet   | IP     |   |          |     | Type | Type |
 762          *   | Checksum | Ident  |   |          |     |      |      |
 763          *   +------------------------------------------------------+
 764          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 765          *   +------------------------------------------------------+
 766          *   63       48 47    32 31            20 19               0
 767          *
 768          * 82599+ Advanced Receive Descriptor (Read) Format
 769          *    63                                           1        0
 770          *    +-----------------------------------------------------+
 771          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 772          *    +----------------------------------------------+------+
 773          *  8 |       Header Buffer Address [63:1]           |  DD  |
 774          *    +-----------------------------------------------------+
 775          *
 776          *
 777          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 778          *
 779          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 780          *   +------------------------------------------------------+
 781          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 782          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 783          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 784          *   +------------------------------------------------------+
 785          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 786          *   +------------------------------------------------------+
 787          *   63       48 47    32 31          20 19                 0
 788          */
 789
 790         for (n = 0; n < adapter->num_rx_queues; n++) {
 791                 rx_ring = adapter->rx_ring[n];
 792                 pr_info("------------------------------------\n");
 793                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 794                 pr_info("------------------------------------\n");
 795                 pr_info("%s%s%s",
 796                         "R  [desc]      [ PktBuf     A0] ",
 797                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 798                         "<-- Adv Rx Read format\n");
 799                 pr_info("%s%s%s",
 800                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 801                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 802                         "<-- Adv Rx Write-Back format\n");
 803
 804                 for (i = 0; i < rx_ring->count; i++) {
 805                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 806                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 807                         u0 = (struct my_u0 *)rx_desc;
 808                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 809                         if (staterr & IXGBE_RXD_STAT_DD) {
 810                                 /* Descriptor Done */
 811                                 pr_info("RWB[0x%03X]     %016llX "
 812                                         "%016llX ---------------- %p", i,
 813                                         le64_to_cpu(u0->a),
 814                                         le64_to_cpu(u0->b),
 815                                         rx_buffer_info->skb);
 816                         } else {
 817                                 pr_info("R  [0x%03X]     %016llX "
 818                                         "%016llX %016llX %p", i,
 819                                         le64_to_cpu(u0->a),
 820                                         le64_to_cpu(u0->b),
 821                                         (u64)rx_buffer_info->dma,
 822                                         rx_buffer_info->skb);
 823
 824                                 if (netif_msg_pktdata(adapter) &&
 825                                     rx_buffer_info->dma) {
 826                                         print_hex_dump(KERN_INFO, "",
 827                                            DUMP_PREFIX_ADDRESS, 16, 1,
 828                                            page_address(rx_buffer_info->page) +
 829                                                     rx_buffer_info->page_offset,
 830                                            ixgbe_rx_bufsz(rx_ring), true);
 831                                 }
 832                         }
 833
 834                         if (i == rx_ring->next_to_use)
 835                                 pr_cont(" NTU\n");
 836                         else if (i == rx_ring->next_to_clean)
 837                                 pr_cont(" NTC\n");
 838                         else
 839                                 pr_cont("\n");
 840
 841                 }
 842         }
 843 }
 844
 845 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 846 {
 847         u32 ctrl_ext;
 848
 849         /* Let firmware take over control of h/w */
 850         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 851         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 852                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 853 }
 854
 855 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 856 {
 857         u32 ctrl_ext;
 858
 859         /* Let firmware know the driver has taken over */
 860         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 861         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 862                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 863 }
 864
 865 /**
 866  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 867  * @adapter: pointer to adapter struct
 868  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 869  * @queue: queue to map the corresponding interrupt to
 870  * @msix_vector: the vector to map to the corresponding queue
 871  *
 872  */
 873 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 874                            u8 queue, u8 msix_vector)
 875 {
 876         u32 ivar, index;
 877         struct ixgbe_hw *hw = &adapter->hw;
 878         switch (hw->mac.type) {
 879         case ixgbe_mac_82598EB:
 880                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 881                 if (direction == -1)
 882                         direction = 0;
 883                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 884                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 885                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 886                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 887                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 888                 break;
 889         case ixgbe_mac_82599EB:
 890         case ixgbe_mac_X540:
 891         case ixgbe_mac_X550:
 892         case ixgbe_mac_X550EM_x:
 893         case ixgbe_mac_x550em_a:
 894                 if (direction == -1) {
 895                         /* other causes */
 896                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 897                         index = ((queue & 1) * 8);
 898                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 899                         ivar &= ~(0xFF << index);
 900                         ivar |= (msix_vector << index);
 901                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 902                         break;
 903                 } else {
 904                         /* tx or rx causes */
 905                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 906                         index = ((16 * (queue & 1)) + (8 * direction));
 907                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 908                         ivar &= ~(0xFF << index);
 909                         ivar |= (msix_vector << index);
 910                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 911                         break;
 912                 }
 913         default:
 914                 break;
 915         }
 916 }
 917
 918 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 919                                           u64 qmask)
 920 {
 921         u32 mask;
 922
 923         switch (adapter->hw.mac.type) {
 924         case ixgbe_mac_82598EB:
 925                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 926                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 927                 break;
 928         case ixgbe_mac_82599EB:
 929         case ixgbe_mac_X540:
 930         case ixgbe_mac_X550:
 931         case ixgbe_mac_X550EM_x:
 932         case ixgbe_mac_x550em_a:
 933                 mask = (qmask & 0xFFFFFFFF);
 934                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 935                 mask = (qmask >> 32);
 936                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 937                 break;
 938         default:
 939                 break;
 940         }
 941 }
 942
 943 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
 944                                       struct ixgbe_tx_buffer *tx_buffer)
 945 {
 946         if (tx_buffer->skb) {
 947                 dev_kfree_skb_any(tx_buffer->skb);
 948                 if (dma_unmap_len(tx_buffer, len))
 949                         dma_unmap_single(ring->dev,
 950                                          dma_unmap_addr(tx_buffer, dma),
 951                                          dma_unmap_len(tx_buffer, len),
 952                                          DMA_TO_DEVICE);
 953         } else if (dma_unmap_len(tx_buffer, len)) {
 954                 dma_unmap_page(ring->dev,
 955                                dma_unmap_addr(tx_buffer, dma),
 956                                dma_unmap_len(tx_buffer, len),
 957                                DMA_TO_DEVICE);
 958         }
 959         tx_buffer->next_to_watch = NULL;
 960         tx_buffer->skb = NULL;
 961         dma_unmap_len_set(tx_buffer, len, 0);
 962         /* tx_buffer must be completely set up in the transmit path */
 963 }
 964
 965 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 966 {
 967         struct ixgbe_hw *hw = &adapter->hw;
 968         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 969         int i;
 970         u32 data;
 971
 972         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 973             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 974                 return;
 975
 976         switch (hw->mac.type) {
 977         case ixgbe_mac_82598EB:
 978                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 979                 break;
 980         default:
 981                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 982         }
 983         hwstats->lxoffrxc += data;
 984
 985         /* refill credits (no tx hang) if we received xoff */
 986         if (!data)
 987                 return;
 988
 989         for (i = 0; i < adapter->num_tx_queues; i++)
 990                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 991                           &adapter->tx_ring[i]->state);
 992 }
 993
 994 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 995 {
 996         struct ixgbe_hw *hw = &adapter->hw;
 997         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 998         u32 xoff[8] = {0};
 999         u8 tc;
1000         int i;
1001         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1002
1003         if (adapter->ixgbe_ieee_pfc)
1004                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1005
1006         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1007                 ixgbe_update_xoff_rx_lfc(adapter);
1008                 return;
1009         }
1010
1011         /* update stats for each tc, only valid with PFC enabled */
1012         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1013                 u32 pxoffrxc;
1014
1015                 switch (hw->mac.type) {
1016                 case ixgbe_mac_82598EB:
1017                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1018                         break;
1019                 default:
1020                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1021                 }
1022                 hwstats->pxoffrxc[i] += pxoffrxc;
1023                 /* Get the TC for given UP */
1024                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1025                 xoff[tc] += pxoffrxc;
1026         }
1027
1028         /* disarm tx queues that have received xoff frames */
1029         for (i = 0; i < adapter->num_tx_queues; i++) {
1030                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1031
1032                 tc = tx_ring->dcb_tc;
1033                 if (xoff[tc])
1034                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1035         }
1036 }
1037
1038 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1039 {
1040         return ring->stats.packets;
1041 }
1042
1043 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1044 {
1045         struct ixgbe_adapter *adapter;
1046         struct ixgbe_hw *hw;
1047         u32 head, tail;
1048
1049         if (ring->l2_accel_priv)
1050                 adapter = ring->l2_accel_priv->real_adapter;
1051         else
1052                 adapter = netdev_priv(ring->netdev);
1053
1054         hw = &adapter->hw;
1055         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1056         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1057
1058         if (head != tail)
1059                 return (head < tail) ?
1060                         tail - head : (tail + ring->count - head);
1061
1062         return 0;
1063 }
1064
1065 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1066 {
1067         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1068         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1069         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1070
1071         clear_check_for_tx_hang(tx_ring);
1072
1073         /*
1074          * Check for a hung queue, but be thorough. This verifies
1075          * that a transmit has been completed since the previous
1076          * check AND there is at least one packet pending. The
1077          * ARMED bit is set to indicate a potential hang. The
1078          * bit is cleared if a pause frame is received to remove
1079          * false hang detection due to PFC or 802.3x frames. By
1080          * requiring this to fail twice we avoid races with
1081          * pfc clearing the ARMED bit and conditions where we
1082          * run the check_tx_hang logic with a transmit completion
1083          * pending but without time to complete it yet.
1084          */
1085         if (tx_done_old == tx_done && tx_pending)
1086                 /* make sure it is true for two checks in a row */
1087                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1088                                         &tx_ring->state);
1089         /* update completed stats and continue */
1090         tx_ring->tx_stats.tx_done_old = tx_done;
1091         /* reset the countdown */
1092         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1093
1094         return false;
1095 }
1096
1097 /**
1098  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1099  * @adapter: driver private struct
1100  **/
1101 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1102 {
1103
1104         /* Do the reset outside of interrupt context */
1105         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1106                 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1107                 e_warn(drv, "initiating reset due to tx timeout\n");
1108                 ixgbe_service_event_schedule(adapter);
1109         }
1110 }
1111
1112 /**
1113  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1114  **/
1115 static int ixgbe_tx_maxrate(struct net_device *netdev,
1116                             int queue_index, u32 maxrate)
1117 {
1118         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1119         struct ixgbe_hw *hw = &adapter->hw;
1120         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1121
1122         if (!maxrate)
1123                 return 0;
1124
1125         /* Calculate the rate factor values to set */
1126         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1127         bcnrc_val /= maxrate;
1128
1129         /* clear everything but the rate factor */
1130         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1131         IXGBE_RTTBCNRC_RF_DEC_MASK;
1132
1133         /* enable the rate scheduler */
1134         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1135
1136         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1137         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1138
1139         return 0;
1140 }
1141
1142 /**
1143  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1144  * @q_vector: structure containing interrupt and ring information
1145  * @tx_ring: tx ring to clean
1146  * @napi_budget: Used to determine if we are in netpoll
1147  **/
1148 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1149                                struct ixgbe_ring *tx_ring, int napi_budget)
1150 {
1151         struct ixgbe_adapter *adapter = q_vector->adapter;
1152         struct ixgbe_tx_buffer *tx_buffer;
1153         union ixgbe_adv_tx_desc *tx_desc;
1154         unsigned int total_bytes = 0, total_packets = 0;
1155         unsigned int budget = q_vector->tx.work_limit;
1156         unsigned int i = tx_ring->next_to_clean;
1157
1158         if (test_bit(__IXGBE_DOWN, &adapter->state))
1159                 return true;
1160
1161         tx_buffer = &tx_ring->tx_buffer_info[i];
1162         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1163         i -= tx_ring->count;
1164
1165         do {
1166                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1167
1168                 /* if next_to_watch is not set then there is no work pending */
1169                 if (!eop_desc)
1170                         break;
1171
1172                 /* prevent any other reads prior to eop_desc */
1173                 read_barrier_depends();
1174
1175                 /* if DD is not set pending work has not been completed */
1176                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1177                         break;
1178
1179                 /* clear next_to_watch to prevent false hangs */
1180                 tx_buffer->next_to_watch = NULL;
1181
1182                 /* update the statistics for this packet */
1183                 total_bytes += tx_buffer->bytecount;
1184                 total_packets += tx_buffer->gso_segs;
1185
1186                 /* free the skb */
1187                 napi_consume_skb(tx_buffer->skb, napi_budget);
1188
1189                 /* unmap skb header data */
1190                 dma_unmap_single(tx_ring->dev,
1191                                  dma_unmap_addr(tx_buffer, dma),
1192                                  dma_unmap_len(tx_buffer, len),
1193                                  DMA_TO_DEVICE);
1194
1195                 /* clear tx_buffer data */
1196                 tx_buffer->skb = NULL;
1197                 dma_unmap_len_set(tx_buffer, len, 0);
1198
1199                 /* unmap remaining buffers */
1200                 while (tx_desc != eop_desc) {
1201                         tx_buffer++;
1202                         tx_desc++;
1203                         i++;
1204                         if (unlikely(!i)) {
1205                                 i -= tx_ring->count;
1206                                 tx_buffer = tx_ring->tx_buffer_info;
1207                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1208                         }
1209
1210                         /* unmap any remaining paged data */
1211                         if (dma_unmap_len(tx_buffer, len)) {
1212                                 dma_unmap_page(tx_ring->dev,
1213                                                dma_unmap_addr(tx_buffer, dma),
1214                                                dma_unmap_len(tx_buffer, len),
1215                                                DMA_TO_DEVICE);
1216                                 dma_unmap_len_set(tx_buffer, len, 0);
1217                         }
1218                 }
1219
1220                 /* move us one more past the eop_desc for start of next pkt */
1221                 tx_buffer++;
1222                 tx_desc++;
1223                 i++;
1224                 if (unlikely(!i)) {
1225                         i -= tx_ring->count;
1226                         tx_buffer = tx_ring->tx_buffer_info;
1227                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1228                 }
1229
1230                 /* issue prefetch for next Tx descriptor */
1231                 prefetch(tx_desc);
1232
1233                 /* update budget accounting */
1234                 budget--;
1235         } while (likely(budget));
1236
1237         i += tx_ring->count;
1238         tx_ring->next_to_clean = i;
1239         u64_stats_update_begin(&tx_ring->syncp);
1240         tx_ring->stats.bytes += total_bytes;
1241         tx_ring->stats.packets += total_packets;
1242         u64_stats_update_end(&tx_ring->syncp);
1243         q_vector->tx.total_bytes += total_bytes;
1244         q_vector->tx.total_packets += total_packets;
1245
1246         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1247                 /* schedule immediate reset if we believe we hung */
1248                 struct ixgbe_hw *hw = &adapter->hw;
1249                 e_err(drv, "Detected Tx Unit Hang\n"
1250                         "  Tx Queue             <%d>\n"
1251                         "  TDH, TDT             <%x>, <%x>\n"
1252                         "  next_to_use          <%x>\n"
1253                         "  next_to_clean        <%x>\n"
1254                         "tx_buffer_info[next_to_clean]\n"
1255                         "  time_stamp           <%lx>\n"
1256                         "  jiffies              <%lx>\n",
1257                         tx_ring->queue_index,
1258                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1259                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1260                         tx_ring->next_to_use, i,
1261                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1262
1263                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1264
1265                 e_info(probe,
1266                        "tx hang %d detected on queue %d, resetting adapter\n",
1267                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1268
1269                 /* schedule immediate reset if we believe we hung */
1270                 ixgbe_tx_timeout_reset(adapter);
1271
1272                 /* the adapter is about to reset, no point in enabling stuff */
1273                 return true;
1274         }
1275
1276         netdev_tx_completed_queue(txring_txq(tx_ring),
1277                                   total_packets, total_bytes);
1278
1279 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1280         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1281                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1282                 /* Make sure that anybody stopping the queue after this
1283                  * sees the new next_to_clean.
1284                  */
1285                 smp_mb();
1286                 if (__netif_subqueue_stopped(tx_ring->netdev,
1287                                              tx_ring->queue_index)
1288                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1289                         netif_wake_subqueue(tx_ring->netdev,
1290                                             tx_ring->queue_index);
1291                         ++tx_ring->tx_stats.restart_queue;
1292                 }
1293         }
1294
1295         return !!budget;
1296 }
1297
1298 #ifdef CONFIG_IXGBE_DCA
1299 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1300                                 struct ixgbe_ring *tx_ring,
1301                                 int cpu)
1302 {
1303         struct ixgbe_hw *hw = &adapter->hw;
1304         u32 txctrl = 0;
1305         u16 reg_offset;
1306
1307         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1308                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1309
1310         switch (hw->mac.type) {
1311         case ixgbe_mac_82598EB:
1312                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1313                 break;
1314         case ixgbe_mac_82599EB:
1315         case ixgbe_mac_X540:
1316                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1317                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1318                 break;
1319         default:
1320                 /* for unknown hardware do not write register */
1321                 return;
1322         }
1323
1324         /*
1325          * We can enable relaxed ordering for reads, but not writes when
1326          * DCA is enabled.  This is due to a known issue in some chipsets
1327          * which will cause the DCA tag to be cleared.
1328          */
1329         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1330                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1331                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1332
1333         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1334 }
1335
1336 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1337                                 struct ixgbe_ring *rx_ring,
1338                                 int cpu)
1339 {
1340         struct ixgbe_hw *hw = &adapter->hw;
1341         u32 rxctrl = 0;
1342         u8 reg_idx = rx_ring->reg_idx;
1343
1344         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1345                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1346
1347         switch (hw->mac.type) {
1348         case ixgbe_mac_82599EB:
1349         case ixgbe_mac_X540:
1350                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1351                 break;
1352         default:
1353                 break;
1354         }
1355
1356         /*
1357          * We can enable relaxed ordering for reads, but not writes when
1358          * DCA is enabled.  This is due to a known issue in some chipsets
1359          * which will cause the DCA tag to be cleared.
1360          */
1361         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1362                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1363                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1364
1365         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1366 }
1367
1368 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1369 {
1370         struct ixgbe_adapter *adapter = q_vector->adapter;
1371         struct ixgbe_ring *ring;
1372         int cpu = get_cpu();
1373
1374         if (q_vector->cpu == cpu)
1375                 goto out_no_update;
1376
1377         ixgbe_for_each_ring(ring, q_vector->tx)
1378                 ixgbe_update_tx_dca(adapter, ring, cpu);
1379
1380         ixgbe_for_each_ring(ring, q_vector->rx)
1381                 ixgbe_update_rx_dca(adapter, ring, cpu);
1382
1383         q_vector->cpu = cpu;
1384 out_no_update:
1385         put_cpu();
1386 }
1387
1388 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1389 {
1390         int i;
1391
1392         /* always use CB2 mode, difference is masked in the CB driver */
1393         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1394                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1395                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1396         else
1397                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1398                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1399
1400         for (i = 0; i < adapter->num_q_vectors; i++) {
1401                 adapter->q_vector[i]->cpu = -1;
1402                 ixgbe_update_dca(adapter->q_vector[i]);
1403         }
1404 }
1405
1406 static int __ixgbe_notify_dca(struct device *dev, void *data)
1407 {
1408         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1409         unsigned long event = *(unsigned long *)data;
1410
1411         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1412                 return 0;
1413
1414         switch (event) {
1415         case DCA_PROVIDER_ADD:
1416                 /* if we're already enabled, don't do it again */
1417                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1418                         break;
1419                 if (dca_add_requester(dev) == 0) {
1420                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1421                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1422                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1423                         break;
1424                 }
1425                 /* Fall Through since DCA is disabled. */
1426         case DCA_PROVIDER_REMOVE:
1427                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1428                         dca_remove_requester(dev);
1429                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1430                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1431                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1432                 }
1433                 break;
1434         }
1435
1436         return 0;
1437 }
1438
1439 #endif /* CONFIG_IXGBE_DCA */
1440
1441 #define IXGBE_RSS_L4_TYPES_MASK \
1442         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1443          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1444          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1445          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1446
1447 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1448                                  union ixgbe_adv_rx_desc *rx_desc,
1449                                  struct sk_buff *skb)
1450 {
1451         u16 rss_type;
1452
1453         if (!(ring->netdev->features & NETIF_F_RXHASH))
1454                 return;
1455
1456         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1457                    IXGBE_RXDADV_RSSTYPE_MASK;
1458
1459         if (!rss_type)
1460                 return;
1461
1462         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1463                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1464                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1465 }
1466
1467 #ifdef IXGBE_FCOE
1468 /**
1469  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1470  * @ring: structure containing ring specific data
1471  * @rx_desc: advanced rx descriptor
1472  *
1473  * Returns : true if it is FCoE pkt
1474  */
1475 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1476                                     union ixgbe_adv_rx_desc *rx_desc)
1477 {
1478         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1479
1480         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1481                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1482                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1483                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1484 }
1485
1486 #endif /* IXGBE_FCOE */
1487 /**
1488  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1489  * @ring: structure containing ring specific data
1490  * @rx_desc: current Rx descriptor being processed
1491  * @skb: skb currently being received and modified
1492  **/
1493 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1494                                      union ixgbe_adv_rx_desc *rx_desc,
1495                                      struct sk_buff *skb)
1496 {
1497         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1498         __le16 hdr_info = rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1499         bool encap_pkt = false;
1500
1501         skb_checksum_none_assert(skb);
1502
1503         /* Rx csum disabled */
1504         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1505                 return;
1506
1507         if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) &&
1508             (hdr_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL >> 16))) {
1509                 encap_pkt = true;
1510                 skb->encapsulation = 1;
1511         }
1512
1513         /* if IP and error */
1514         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1515             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1516                 ring->rx_stats.csum_err++;
1517                 return;
1518         }
1519
1520         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1521                 return;
1522
1523         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1524                 /*
1525                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1526                  * checksum errors.
1527                  */
1528                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1529                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1530                         return;
1531
1532                 ring->rx_stats.csum_err++;
1533                 return;
1534         }
1535
1536         /* It must be a TCP or UDP packet with a valid checksum */
1537         skb->ip_summed = CHECKSUM_UNNECESSARY;
1538         if (encap_pkt) {
1539                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1540                         return;
1541
1542                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1543                         skb->ip_summed = CHECKSUM_NONE;
1544                         return;
1545                 }
1546                 /* If we checked the outer header let the stack know */
1547                 skb->csum_level = 1;
1548         }
1549 }
1550
1551 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1552                                     struct ixgbe_rx_buffer *bi)
1553 {
1554         struct page *page = bi->page;
1555         dma_addr_t dma;
1556
1557         /* since we are recycling buffers we should seldom need to alloc */
1558         if (likely(page))
1559                 return true;
1560
1561         /* alloc new page for storage */
1562         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1563         if (unlikely(!page)) {
1564                 rx_ring->rx_stats.alloc_rx_page_failed++;
1565                 return false;
1566         }
1567
1568         /* map page for use */
1569         dma = dma_map_page(rx_ring->dev, page, 0,
1570                            ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1571
1572         /*
1573          * if mapping failed free memory back to system since
1574          * there isn't much point in holding memory we can't use
1575          */
1576         if (dma_mapping_error(rx_ring->dev, dma)) {
1577                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1578
1579                 rx_ring->rx_stats.alloc_rx_page_failed++;
1580                 return false;
1581         }
1582
1583         bi->dma = dma;
1584         bi->page = page;
1585         bi->page_offset = 0;
1586
1587         return true;
1588 }
1589
1590 /**
1591  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1592  * @rx_ring: ring to place buffers on
1593  * @cleaned_count: number of buffers to replace
1594  **/
1595 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1596 {
1597         union ixgbe_adv_rx_desc *rx_desc;
1598         struct ixgbe_rx_buffer *bi;
1599         u16 i = rx_ring->next_to_use;
1600
1601         /* nothing to do */
1602         if (!cleaned_count)
1603                 return;
1604
1605         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1606         bi = &rx_ring->rx_buffer_info[i];
1607         i -= rx_ring->count;
1608
1609         do {
1610                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1611                         break;
1612
1613                 /*
1614                  * Refresh the desc even if buffer_addrs didn't change
1615                  * because each write-back erases this info.
1616                  */
1617                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1618
1619                 rx_desc++;
1620                 bi++;
1621                 i++;
1622                 if (unlikely(!i)) {
1623                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1624                         bi = rx_ring->rx_buffer_info;
1625                         i -= rx_ring->count;
1626                 }
1627
1628                 /* clear the status bits for the next_to_use descriptor */
1629                 rx_desc->wb.upper.status_error = 0;
1630
1631                 cleaned_count--;
1632         } while (cleaned_count);
1633
1634         i += rx_ring->count;
1635
1636         if (rx_ring->next_to_use != i) {
1637                 rx_ring->next_to_use = i;
1638
1639                 /* update next to alloc since we have filled the ring */
1640                 rx_ring->next_to_alloc = i;
1641
1642                 /* Force memory writes to complete before letting h/w
1643                  * know there are new descriptors to fetch.  (Only
1644                  * applicable for weak-ordered memory model archs,
1645                  * such as IA-64).
1646                  */
1647                 wmb();
1648                 writel(i, rx_ring->tail);
1649         }
1650 }
1651
1652 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1653                                    struct sk_buff *skb)
1654 {
1655         u16 hdr_len = skb_headlen(skb);
1656
1657         /* set gso_size to avoid messing up TCP MSS */
1658         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1659                                                  IXGBE_CB(skb)->append_cnt);
1660         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1661 }
1662
1663 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1664                                    struct sk_buff *skb)
1665 {
1666         /* if append_cnt is 0 then frame is not RSC */
1667         if (!IXGBE_CB(skb)->append_cnt)
1668                 return;
1669
1670         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1671         rx_ring->rx_stats.rsc_flush++;
1672
1673         ixgbe_set_rsc_gso_size(rx_ring, skb);
1674
1675         /* gso_size is computed using append_cnt so always clear it last */
1676         IXGBE_CB(skb)->append_cnt = 0;
1677 }
1678
1679 /**
1680  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1681  * @rx_ring: rx descriptor ring packet is being transacted on
1682  * @rx_desc: pointer to the EOP Rx descriptor
1683  * @skb: pointer to current skb being populated
1684  *
1685  * This function checks the ring, descriptor, and packet information in
1686  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1687  * other fields within the skb.
1688  **/
1689 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1690                                      union ixgbe_adv_rx_desc *rx_desc,
1691                                      struct sk_buff *skb)
1692 {
1693         struct net_device *dev = rx_ring->netdev;
1694         u32 flags = rx_ring->q_vector->adapter->flags;
1695
1696         ixgbe_update_rsc_stats(rx_ring, skb);
1697
1698         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1699
1700         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1701
1702         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1703                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1704
1705         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1706             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1707                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1708                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1709         }
1710
1711         skb_record_rx_queue(skb, rx_ring->queue_index);
1712
1713         skb->protocol = eth_type_trans(skb, dev);
1714 }
1715
1716 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1717                          struct sk_buff *skb)
1718 {
1719         skb_mark_napi_id(skb, &q_vector->napi);
1720         if (ixgbe_qv_busy_polling(q_vector))
1721                 netif_receive_skb(skb);
1722         else
1723                 napi_gro_receive(&q_vector->napi, skb);
1724 }
1725
1726 /**
1727  * ixgbe_is_non_eop - process handling of non-EOP buffers
1728  * @rx_ring: Rx ring being processed
1729  * @rx_desc: Rx descriptor for current buffer
1730  * @skb: Current socket buffer containing buffer in progress
1731  *
1732  * This function updates next to clean.  If the buffer is an EOP buffer
1733  * this function exits returning false, otherwise it will place the
1734  * sk_buff in the next buffer to be chained and return true indicating
1735  * that this is in fact a non-EOP buffer.
1736  **/
1737 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1738                              union ixgbe_adv_rx_desc *rx_desc,
1739                              struct sk_buff *skb)
1740 {
1741         u32 ntc = rx_ring->next_to_clean + 1;
1742
1743         /* fetch, update, and store next to clean */
1744         ntc = (ntc < rx_ring->count) ? ntc : 0;
1745         rx_ring->next_to_clean = ntc;
1746
1747         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1748
1749         /* update RSC append count if present */
1750         if (ring_is_rsc_enabled(rx_ring)) {
1751                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1752                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1753
1754                 if (unlikely(rsc_enabled)) {
1755                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1756
1757                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1758                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1759
1760                         /* update ntc based on RSC value */
1761                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1762                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1763                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1764                 }
1765         }
1766
1767         /* if we are the last buffer then there is nothing else to do */
1768         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1769                 return false;
1770
1771         /* place skb in next buffer to be received */
1772         rx_ring->rx_buffer_info[ntc].skb = skb;
1773         rx_ring->rx_stats.non_eop_descs++;
1774
1775         return true;
1776 }
1777
1778 /**
1779  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1780  * @rx_ring: rx descriptor ring packet is being transacted on
1781  * @skb: pointer to current skb being adjusted
1782  *
1783  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1784  * main difference between this version and the original function is that
1785  * this function can make several assumptions about the state of things
1786  * that allow for significant optimizations versus the standard function.
1787  * As a result we can do things like drop a frag and maintain an accurate
1788  * truesize for the skb.
1789  */
1790 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1791                             struct sk_buff *skb)
1792 {
1793         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1794         unsigned char *va;
1795         unsigned int pull_len;
1796
1797         /*
1798          * it is valid to use page_address instead of kmap since we are
1799          * working with pages allocated out of the lomem pool per
1800          * alloc_page(GFP_ATOMIC)
1801          */
1802         va = skb_frag_address(frag);
1803
1804         /*
1805          * we need the header to contain the greater of either ETH_HLEN or
1806          * 60 bytes if the skb->len is less than 60 for skb_pad.
1807          */
1808         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1809
1810         /* align pull length to size of long to optimize memcpy performance */
1811         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1812
1813         /* update all of the pointers */
1814         skb_frag_size_sub(frag, pull_len);
1815         frag->page_offset += pull_len;
1816         skb->data_len -= pull_len;
1817         skb->tail += pull_len;
1818 }
1819
1820 /**
1821  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1822  * @rx_ring: rx descriptor ring packet is being transacted on
1823  * @skb: pointer to current skb being updated
1824  *
1825  * This function provides a basic DMA sync up for the first fragment of an
1826  * skb.  The reason for doing this is that the first fragment cannot be
1827  * unmapped until we have reached the end of packet descriptor for a buffer
1828  * chain.
1829  */
1830 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1831                                 struct sk_buff *skb)
1832 {
1833         /* if the page was released unmap it, else just sync our portion */
1834         if (unlikely(IXGBE_CB(skb)->page_released)) {
1835                 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1836                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1837                 IXGBE_CB(skb)->page_released = false;
1838         } else {
1839                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1840
1841                 dma_sync_single_range_for_cpu(rx_ring->dev,
1842                                               IXGBE_CB(skb)->dma,
1843                                               frag->page_offset,
1844                                               ixgbe_rx_bufsz(rx_ring),
1845                                               DMA_FROM_DEVICE);
1846         }
1847         IXGBE_CB(skb)->dma = 0;
1848 }
1849
1850 /**
1851  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1852  * @rx_ring: rx descriptor ring packet is being transacted on
1853  * @rx_desc: pointer to the EOP Rx descriptor
1854  * @skb: pointer to current skb being fixed
1855  *
1856  * Check for corrupted packet headers caused by senders on the local L2
1857  * embedded NIC switch not setting up their Tx Descriptors right.  These
1858  * should be very rare.
1859  *
1860  * Also address the case where we are pulling data in on pages only
1861  * and as such no data is present in the skb header.
1862  *
1863  * In addition if skb is not at least 60 bytes we need to pad it so that
1864  * it is large enough to qualify as a valid Ethernet frame.
1865  *
1866  * Returns true if an error was encountered and skb was freed.
1867  **/
1868 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1869                                   union ixgbe_adv_rx_desc *rx_desc,
1870                                   struct sk_buff *skb)
1871 {
1872         struct net_device *netdev = rx_ring->netdev;
1873
1874         /* verify that the packet does not have any known errors */
1875         if (unlikely(ixgbe_test_staterr(rx_desc,
1876                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1877             !(netdev->features & NETIF_F_RXALL))) {
1878                 dev_kfree_skb_any(skb);
1879                 return true;
1880         }
1881
1882         /* place header in linear portion of buffer */
1883         if (skb_is_nonlinear(skb))
1884                 ixgbe_pull_tail(rx_ring, skb);
1885
1886 #ifdef IXGBE_FCOE
1887         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1888         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1889                 return false;
1890
1891 #endif
1892         /* if eth_skb_pad returns an error the skb was freed */
1893         if (eth_skb_pad(skb))
1894                 return true;
1895
1896         return false;
1897 }
1898
1899 /**
1900  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1901  * @rx_ring: rx descriptor ring to store buffers on
1902  * @old_buff: donor buffer to have page reused
1903  *
1904  * Synchronizes page for reuse by the adapter
1905  **/
1906 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1907                                 struct ixgbe_rx_buffer *old_buff)
1908 {
1909         struct ixgbe_rx_buffer *new_buff;
1910         u16 nta = rx_ring->next_to_alloc;
1911
1912         new_buff = &rx_ring->rx_buffer_info[nta];
1913
1914         /* update, and store next to alloc */
1915         nta++;
1916         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1917
1918         /* transfer page from old buffer to new buffer */
1919         *new_buff = *old_buff;
1920
1921         /* sync the buffer for use by the device */
1922         dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1923                                          new_buff->page_offset,
1924                                          ixgbe_rx_bufsz(rx_ring),
1925                                          DMA_FROM_DEVICE);
1926 }
1927
1928 static inline bool ixgbe_page_is_reserved(struct page *page)
1929 {
1930         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1931 }
1932
1933 /**
1934  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1935  * @rx_ring: rx descriptor ring to transact packets on
1936  * @rx_buffer: buffer containing page to add
1937  * @rx_desc: descriptor containing length of buffer written by hardware
1938  * @skb: sk_buff to place the data into
1939  *
1940  * This function will add the data contained in rx_buffer->page to the skb.
1941  * This is done either through a direct copy if the data in the buffer is
1942  * less than the skb header size, otherwise it will just attach the page as
1943  * a frag to the skb.
1944  *
1945  * The function will then update the page offset if necessary and return
1946  * true if the buffer can be reused by the adapter.
1947  **/
1948 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1949                               struct ixgbe_rx_buffer *rx_buffer,
1950                               union ixgbe_adv_rx_desc *rx_desc,
1951                               struct sk_buff *skb)
1952 {
1953         struct page *page = rx_buffer->page;
1954         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1955 #if (PAGE_SIZE < 8192)
1956         unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1957 #else
1958         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1959         unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1960                                    ixgbe_rx_bufsz(rx_ring);
1961 #endif
1962
1963         if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1964                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1965
1966                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1967
1968                 /* page is not reserved, we can reuse buffer as-is */
1969                 if (likely(!ixgbe_page_is_reserved(page)))
1970                         return true;
1971
1972                 /* this page cannot be reused so discard it */
1973                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1974                 return false;
1975         }
1976
1977         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1978                         rx_buffer->page_offset, size, truesize);
1979
1980         /* avoid re-using remote pages */
1981         if (unlikely(ixgbe_page_is_reserved(page)))
1982                 return false;
1983
1984 #if (PAGE_SIZE < 8192)
1985         /* if we are only owner of page we can reuse it */
1986         if (unlikely(page_count(page) != 1))
1987                 return false;
1988
1989         /* flip page offset to other buffer */
1990         rx_buffer->page_offset ^= truesize;
1991 #else
1992         /* move offset up to the next cache line */
1993         rx_buffer->page_offset += truesize;
1994
1995         if (rx_buffer->page_offset > last_offset)
1996                 return false;
1997 #endif
1998
1999         /* Even if we own the page, we are not allowed to use atomic_set()
2000          * This would break get_page_unless_zero() users.
2001          */
2002         page_ref_inc(page);
2003
2004         return true;
2005 }
2006
2007 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
2008                                              union ixgbe_adv_rx_desc *rx_desc)
2009 {
2010         struct ixgbe_rx_buffer *rx_buffer;
2011         struct sk_buff *skb;
2012         struct page *page;
2013
2014         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2015         page = rx_buffer->page;
2016         prefetchw(page);
2017
2018         skb = rx_buffer->skb;
2019
2020         if (likely(!skb)) {
2021                 void *page_addr = page_address(page) +
2022                                   rx_buffer->page_offset;
2023
2024                 /* prefetch first cache line of first page */
2025                 prefetch(page_addr);
2026 #if L1_CACHE_BYTES < 128
2027                 prefetch(page_addr + L1_CACHE_BYTES);
2028 #endif
2029
2030                 /* allocate a skb to store the frags */
2031                 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
2032                                      IXGBE_RX_HDR_SIZE);
2033                 if (unlikely(!skb)) {
2034                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2035                         return NULL;
2036                 }
2037
2038                 /*
2039                  * we will be copying header into skb->data in
2040                  * pskb_may_pull so it is in our interest to prefetch
2041                  * it now to avoid a possible cache miss
2042                  */
2043                 prefetchw(skb->data);
2044
2045                 /*
2046                  * Delay unmapping of the first packet. It carries the
2047                  * header information, HW may still access the header
2048                  * after the writeback.  Only unmap it when EOP is
2049                  * reached
2050                  */
2051                 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2052                         goto dma_sync;
2053
2054                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2055         } else {
2056                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2057                         ixgbe_dma_sync_frag(rx_ring, skb);
2058
2059 dma_sync:
2060                 /* we are reusing so sync this buffer for CPU use */
2061                 dma_sync_single_range_for_cpu(rx_ring->dev,
2062                                               rx_buffer->dma,
2063                                               rx_buffer->page_offset,
2064                                               ixgbe_rx_bufsz(rx_ring),
2065                                               DMA_FROM_DEVICE);
2066
2067                 rx_buffer->skb = NULL;
2068         }
2069
2070         /* pull page into skb */
2071         if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2072                 /* hand second half of page back to the ring */
2073                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2074         } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2075                 /* the page has been released from the ring */
2076                 IXGBE_CB(skb)->page_released = true;
2077         } else {
2078                 /* we are not reusing the buffer so unmap it */
2079                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2080                                ixgbe_rx_pg_size(rx_ring),
2081                                DMA_FROM_DEVICE);
2082         }
2083
2084         /* clear contents of buffer_info */
2085         rx_buffer->page = NULL;
2086
2087         return skb;
2088 }
2089
2090 /**
2091  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2092  * @q_vector: structure containing interrupt and ring information
2093  * @rx_ring: rx descriptor ring to transact packets on
2094  * @budget: Total limit on number of packets to process
2095  *
2096  * This function provides a "bounce buffer" approach to Rx interrupt
2097  * processing.  The advantage to this is that on systems that have
2098  * expensive overhead for IOMMU access this provides a means of avoiding
2099  * it by maintaining the mapping of the page to the syste.
2100  *
2101  * Returns amount of work completed
2102  **/
2103 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2104                                struct ixgbe_ring *rx_ring,
2105                                const int budget)
2106 {
2107         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2108 #ifdef IXGBE_FCOE
2109         struct ixgbe_adapter *adapter = q_vector->adapter;
2110         int ddp_bytes;
2111         unsigned int mss = 0;
2112 #endif /* IXGBE_FCOE */
2113         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2114
2115         while (likely(total_rx_packets < budget)) {
2116                 union ixgbe_adv_rx_desc *rx_desc;
2117                 struct sk_buff *skb;
2118
2119                 /* return some buffers to hardware, one at a time is too slow */
2120                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2121                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2122                         cleaned_count = 0;
2123                 }
2124
2125                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2126
2127                 if (!rx_desc->wb.upper.status_error)
2128                         break;
2129
2130                 /* This memory barrier is needed to keep us from reading
2131                  * any other fields out of the rx_desc until we know the
2132                  * descriptor has been written back
2133                  */
2134                 dma_rmb();
2135
2136                 /* retrieve a buffer from the ring */
2137                 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2138
2139                 /* exit if we failed to retrieve a buffer */
2140                 if (!skb)
2141                         break;
2142
2143                 cleaned_count++;
2144
2145                 /* place incomplete frames back on ring for completion */
2146                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2147                         continue;
2148
2149                 /* verify the packet layout is correct */
2150                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2151                         continue;
2152
2153                 /* probably a little skewed due to removing CRC */
2154                 total_rx_bytes += skb->len;
2155
2156                 /* populate checksum, timestamp, VLAN, and protocol */
2157                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2158
2159 #ifdef IXGBE_FCOE
2160                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2161                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2162                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2163                         /* include DDPed FCoE data */
2164                         if (ddp_bytes > 0) {
2165                                 if (!mss) {
2166                                         mss = rx_ring->netdev->mtu -
2167                                                 sizeof(struct fcoe_hdr) -
2168                                                 sizeof(struct fc_frame_header) -
2169                                                 sizeof(struct fcoe_crc_eof);
2170                                         if (mss > 512)
2171                                                 mss &= ~511;
2172                                 }
2173                                 total_rx_bytes += ddp_bytes;
2174                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2175                                                                  mss);
2176                         }
2177                         if (!ddp_bytes) {
2178                                 dev_kfree_skb_any(skb);
2179                                 continue;
2180                         }
2181                 }
2182
2183 #endif /* IXGBE_FCOE */
2184                 ixgbe_rx_skb(q_vector, skb);
2185
2186                 /* update budget accounting */
2187                 total_rx_packets++;
2188         }
2189
2190         u64_stats_update_begin(&rx_ring->syncp);
2191         rx_ring->stats.packets += total_rx_packets;
2192         rx_ring->stats.bytes += total_rx_bytes;
2193         u64_stats_update_end(&rx_ring->syncp);
2194         q_vector->rx.total_packets += total_rx_packets;
2195         q_vector->rx.total_bytes += total_rx_bytes;
2196
2197         return total_rx_packets;
2198 }
2199
2200 #ifdef CONFIG_NET_RX_BUSY_POLL
2201 /* must be called with local_bh_disable()d */
2202 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2203 {
2204         struct ixgbe_q_vector *q_vector =
2205                         container_of(napi, struct ixgbe_q_vector, napi);
2206         struct ixgbe_adapter *adapter = q_vector->adapter;
2207         struct ixgbe_ring  *ring;
2208         int found = 0;
2209
2210         if (test_bit(__IXGBE_DOWN, &adapter->state))
2211                 return LL_FLUSH_FAILED;
2212
2213         if (!ixgbe_qv_lock_poll(q_vector))
2214                 return LL_FLUSH_BUSY;
2215
2216         ixgbe_for_each_ring(ring, q_vector->rx) {
2217                 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2218 #ifdef BP_EXTENDED_STATS
2219                 if (found)
2220                         ring->stats.cleaned += found;
2221                 else
2222                         ring->stats.misses++;
2223 #endif
2224                 if (found)
2225                         break;
2226         }
2227
2228         ixgbe_qv_unlock_poll(q_vector);
2229
2230         return found;
2231 }
2232 #endif  /* CONFIG_NET_RX_BUSY_POLL */
2233
2234 /**
2235  * ixgbe_configure_msix - Configure MSI-X hardware
2236  * @adapter: board private structure
2237  *
2238  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2239  * interrupts.
2240  **/
2241 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2242 {
2243         struct ixgbe_q_vector *q_vector;
2244         int v_idx;
2245         u32 mask;
2246
2247         /* Populate MSIX to EITR Select */
2248         if (adapter->num_vfs > 32) {
2249                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2250                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2251         }
2252
2253         /*
2254          * Populate the IVAR table and set the ITR values to the
2255          * corresponding register.
2256          */
2257         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2258                 struct ixgbe_ring *ring;
2259                 q_vector = adapter->q_vector[v_idx];
2260
2261                 ixgbe_for_each_ring(ring, q_vector->rx)
2262                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2263
2264                 ixgbe_for_each_ring(ring, q_vector->tx)
2265                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2266
2267                 ixgbe_write_eitr(q_vector);
2268         }
2269
2270         switch (adapter->hw.mac.type) {
2271         case ixgbe_mac_82598EB:
2272                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2273                                v_idx);
2274                 break;
2275         case ixgbe_mac_82599EB:
2276         case ixgbe_mac_X540:
2277         case ixgbe_mac_X550:
2278         case ixgbe_mac_X550EM_x:
2279         case ixgbe_mac_x550em_a:
2280                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2281                 break;
2282         default:
2283                 break;
2284         }
2285         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2286
2287         /* set up to autoclear timer, and the vectors */
2288         mask = IXGBE_EIMS_ENABLE_MASK;
2289         mask &= ~(IXGBE_EIMS_OTHER |
2290                   IXGBE_EIMS_MAILBOX |
2291                   IXGBE_EIMS_LSC);
2292
2293         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2294 }
2295
2296 enum latency_range {
2297         lowest_latency = 0,
2298         low_latency = 1,
2299         bulk_latency = 2,
2300         latency_invalid = 255
2301 };
2302
2303 /**
2304  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2305  * @q_vector: structure containing interrupt and ring information
2306  * @ring_container: structure containing ring performance data
2307  *
2308  *      Stores a new ITR value based on packets and byte
2309  *      counts during the last interrupt.  The advantage of per interrupt
2310  *      computation is faster updates and more accurate ITR for the current
2311  *      traffic pattern.  Constants in this function were computed
2312  *      based on theoretical maximum wire speed and thresholds were set based
2313  *      on testing data as well as attempting to minimize response time
2314  *      while increasing bulk throughput.
2315  *      this functionality is controlled by the InterruptThrottleRate module
2316  *      parameter (see ixgbe_param.c)
2317  **/
2318 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2319                              struct ixgbe_ring_container *ring_container)
2320 {
2321         int bytes = ring_container->total_bytes;
2322         int packets = ring_container->total_packets;
2323         u32 timepassed_us;
2324         u64 bytes_perint;
2325         u8 itr_setting = ring_container->itr;
2326
2327         if (packets == 0)
2328                 return;
2329
2330         /* simple throttlerate management
2331          *   0-10MB/s   lowest (100000 ints/s)
2332          *  10-20MB/s   low    (20000 ints/s)
2333          *  20-1249MB/s bulk   (12000 ints/s)
2334          */
2335         /* what was last interrupt timeslice? */
2336         timepassed_us = q_vector->itr >> 2;
2337         if (timepassed_us == 0)
2338                 return;
2339
2340         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2341
2342         switch (itr_setting) {
2343         case lowest_latency:
2344                 if (bytes_perint > 10)
2345                         itr_setting = low_latency;
2346                 break;
2347         case low_latency:
2348                 if (bytes_perint > 20)
2349                         itr_setting = bulk_latency;
2350                 else if (bytes_perint <= 10)
2351                         itr_setting = lowest_latency;
2352                 break;
2353         case bulk_latency:
2354                 if (bytes_perint <= 20)
2355                         itr_setting = low_latency;
2356                 break;
2357         }
2358
2359         /* clear work counters since we have the values we need */
2360         ring_container->total_bytes = 0;
2361         ring_container->total_packets = 0;
2362
2363         /* write updated itr to ring container */
2364         ring_container->itr = itr_setting;
2365 }
2366
2367 /**
2368  * ixgbe_write_eitr - write EITR register in hardware specific way
2369  * @q_vector: structure containing interrupt and ring information
2370  *
2371  * This function is made to be called by ethtool and by the driver
2372  * when it needs to update EITR registers at runtime.  Hardware
2373  * specific quirks/differences are taken care of here.
2374  */
2375 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2376 {
2377         struct ixgbe_adapter *adapter = q_vector->adapter;
2378         struct ixgbe_hw *hw = &adapter->hw;
2379         int v_idx = q_vector->v_idx;
2380         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2381
2382         switch (adapter->hw.mac.type) {
2383         case ixgbe_mac_82598EB:
2384                 /* must write high and low 16 bits to reset counter */
2385                 itr_reg |= (itr_reg << 16);
2386                 break;
2387         case ixgbe_mac_82599EB:
2388         case ixgbe_mac_X540:
2389         case ixgbe_mac_X550:
2390         case ixgbe_mac_X550EM_x:
2391         case ixgbe_mac_x550em_a:
2392                 /*
2393                  * set the WDIS bit to not clear the timer bits and cause an
2394                  * immediate assertion of the interrupt
2395                  */
2396                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2397                 break;
2398         default:
2399                 break;
2400         }
2401         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2402 }
2403
2404 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2405 {
2406         u32 new_itr = q_vector->itr;
2407         u8 current_itr;
2408
2409         ixgbe_update_itr(q_vector, &q_vector->tx);
2410         ixgbe_update_itr(q_vector, &q_vector->rx);
2411
2412         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2413
2414         switch (current_itr) {
2415         /* counts and packets in update_itr are dependent on these numbers */
2416         case lowest_latency:
2417                 new_itr = IXGBE_100K_ITR;
2418                 break;
2419         case low_latency:
2420                 new_itr = IXGBE_20K_ITR;
2421                 break;
2422         case bulk_latency:
2423                 new_itr = IXGBE_12K_ITR;
2424                 break;
2425         default:
2426                 break;
2427         }
2428
2429         if (new_itr != q_vector->itr) {
2430                 /* do an exponential smoothing */
2431                 new_itr = (10 * new_itr * q_vector->itr) /
2432                           ((9 * new_itr) + q_vector->itr);
2433
2434                 /* save the algorithm value here */
2435                 q_vector->itr = new_itr;
2436
2437                 ixgbe_write_eitr(q_vector);
2438         }
2439 }
2440
2441 /**
2442  * ixgbe_check_overtemp_subtask - check for over temperature
2443  * @adapter: pointer to adapter
2444  **/
2445 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2446 {
2447         struct ixgbe_hw *hw = &adapter->hw;
2448         u32 eicr = adapter->interrupt_event;
2449
2450         if (test_bit(__IXGBE_DOWN, &adapter->state))
2451                 return;
2452
2453         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2454             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2455                 return;
2456
2457         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2458
2459         switch (hw->device_id) {
2460         case IXGBE_DEV_ID_82599_T3_LOM:
2461                 /*
2462                  * Since the warning interrupt is for both ports
2463                  * we don't have to check if:
2464                  *  - This interrupt wasn't for our port.
2465                  *  - We may have missed the interrupt so always have to
2466                  *    check if we  got a LSC
2467                  */
2468                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2469                     !(eicr & IXGBE_EICR_LSC))
2470                         return;
2471
2472                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2473                         u32 speed;
2474                         bool link_up = false;
2475
2476                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2477
2478                         if (link_up)
2479                                 return;
2480                 }
2481
2482                 /* Check if this is not due to overtemp */
2483                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2484                         return;
2485
2486                 break;
2487         default:
2488                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2489                         return;
2490                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2491                         return;
2492                 break;
2493         }
2494         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2495
2496         adapter->interrupt_event = 0;
2497 }
2498
2499 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2500 {
2501         struct ixgbe_hw *hw = &adapter->hw;
2502
2503         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2504             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2505                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2506                 /* write to clear the interrupt */
2507                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2508         }
2509 }
2510
2511 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2512 {
2513         struct ixgbe_hw *hw = &adapter->hw;
2514
2515         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2516                 return;
2517
2518         switch (adapter->hw.mac.type) {
2519         case ixgbe_mac_82599EB:
2520                 /*
2521                  * Need to check link state so complete overtemp check
2522                  * on service task
2523                  */
2524                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2525                      (eicr & IXGBE_EICR_LSC)) &&
2526                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2527                         adapter->interrupt_event = eicr;
2528                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2529                         ixgbe_service_event_schedule(adapter);
2530                         return;
2531                 }
2532                 return;
2533         case ixgbe_mac_X540:
2534                 if (!(eicr & IXGBE_EICR_TS))
2535                         return;
2536                 break;
2537         default:
2538                 return;
2539         }
2540
2541         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2542 }
2543
2544 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2545 {
2546         switch (hw->mac.type) {
2547         case ixgbe_mac_82598EB:
2548                 if (hw->phy.type == ixgbe_phy_nl)
2549                         return true;
2550                 return false;
2551         case ixgbe_mac_82599EB:
2552         case ixgbe_mac_X550EM_x:
2553         case ixgbe_mac_x550em_a:
2554                 switch (hw->mac.ops.get_media_type(hw)) {
2555                 case ixgbe_media_type_fiber:
2556                 case ixgbe_media_type_fiber_qsfp:
2557                         return true;
2558                 default:
2559                         return false;
2560                 }
2561         default:
2562                 return false;
2563         }
2564 }
2565
2566 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2567 {
2568         struct ixgbe_hw *hw = &adapter->hw;
2569         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2570
2571         if (!ixgbe_is_sfp(hw))
2572                 return;
2573
2574         /* Later MAC's use different SDP */
2575         if (hw->mac.type >= ixgbe_mac_X540)
2576                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2577
2578         if (eicr & eicr_mask) {
2579                 /* Clear the interrupt */
2580                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2581                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2582                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2583                         adapter->sfp_poll_time = 0;
2584                         ixgbe_service_event_schedule(adapter);
2585                 }
2586         }
2587
2588         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2589             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2590                 /* Clear the interrupt */
2591                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2592                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2593                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2594                         ixgbe_service_event_schedule(adapter);
2595                 }
2596         }
2597 }
2598
2599 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2600 {
2601         struct ixgbe_hw *hw = &adapter->hw;
2602
2603         adapter->lsc_int++;
2604         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2605         adapter->link_check_timeout = jiffies;
2606         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2607                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2608                 IXGBE_WRITE_FLUSH(hw);
2609                 ixgbe_service_event_schedule(adapter);
2610         }
2611 }
2612
2613 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2614                                            u64 qmask)
2615 {
2616         u32 mask;
2617         struct ixgbe_hw *hw = &adapter->hw;
2618
2619         switch (hw->mac.type) {
2620         case ixgbe_mac_82598EB:
2621                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2622                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2623                 break;
2624         case ixgbe_mac_82599EB:
2625         case ixgbe_mac_X540:
2626         case ixgbe_mac_X550:
2627         case ixgbe_mac_X550EM_x:
2628         case ixgbe_mac_x550em_a:
2629                 mask = (qmask & 0xFFFFFFFF);
2630                 if (mask)
2631                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2632                 mask = (qmask >> 32);
2633                 if (mask)
2634                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2635                 break;
2636         default:
2637                 break;
2638         }
2639         /* skip the flush */
2640 }
2641
2642 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2643                                             u64 qmask)
2644 {
2645         u32 mask;
2646         struct ixgbe_hw *hw = &adapter->hw;
2647
2648         switch (hw->mac.type) {
2649         case ixgbe_mac_82598EB:
2650                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2651                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2652                 break;
2653         case ixgbe_mac_82599EB:
2654         case ixgbe_mac_X540:
2655         case ixgbe_mac_X550:
2656         case ixgbe_mac_X550EM_x:
2657         case ixgbe_mac_x550em_a:
2658                 mask = (qmask & 0xFFFFFFFF);
2659                 if (mask)
2660                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2661                 mask = (qmask >> 32);
2662                 if (mask)
2663                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2664                 break;
2665         default:
2666                 break;
2667         }
2668         /* skip the flush */
2669 }
2670
2671 /**
2672  * ixgbe_irq_enable - Enable default interrupt generation settings
2673  * @adapter: board private structure
2674  **/
2675 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2676                                     bool flush)
2677 {
2678         struct ixgbe_hw *hw = &adapter->hw;
2679         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2680
2681         /* don't reenable LSC while waiting for link */
2682         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2683                 mask &= ~IXGBE_EIMS_LSC;
2684
2685         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2686                 switch (adapter->hw.mac.type) {
2687                 case ixgbe_mac_82599EB:
2688                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2689                         break;
2690                 case ixgbe_mac_X540:
2691                 case ixgbe_mac_X550:
2692                 case ixgbe_mac_X550EM_x:
2693                 case ixgbe_mac_x550em_a:
2694                         mask |= IXGBE_EIMS_TS;
2695                         break;
2696                 default:
2697                         break;
2698                 }
2699         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2700                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2701         switch (adapter->hw.mac.type) {
2702         case ixgbe_mac_82599EB:
2703                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2704                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2705                 /* fall through */
2706         case ixgbe_mac_X540:
2707         case ixgbe_mac_X550:
2708         case ixgbe_mac_X550EM_x:
2709         case ixgbe_mac_x550em_a:
2710                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2711                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2712                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2713                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2714                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2715                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2716                 mask |= IXGBE_EIMS_ECC;
2717                 mask |= IXGBE_EIMS_MAILBOX;
2718                 break;
2719         default:
2720                 break;
2721         }
2722
2723         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2724             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2725                 mask |= IXGBE_EIMS_FLOW_DIR;
2726
2727         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2728         if (queues)
2729                 ixgbe_irq_enable_queues(adapter, ~0);
2730         if (flush)
2731                 IXGBE_WRITE_FLUSH(&adapter->hw);
2732 }
2733
2734 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2735 {
2736         struct ixgbe_adapter *adapter = data;
2737         struct ixgbe_hw *hw = &adapter->hw;
2738         u32 eicr;
2739
2740         /*
2741          * Workaround for Silicon errata.  Use clear-by-write instead
2742          * of clear-by-read.  Reading with EICS will return the
2743          * interrupt causes without clearing, which later be done
2744          * with the write to EICR.
2745          */
2746         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2747
2748         /* The lower 16bits of the EICR register are for the queue interrupts
2749          * which should be masked here in order to not accidentally clear them if
2750          * the bits are high when ixgbe_msix_other is called. There is a race
2751          * condition otherwise which results in possible performance loss
2752          * especially if the ixgbe_msix_other interrupt is triggering
2753          * consistently (as it would when PPS is turned on for the X540 device)
2754          */
2755         eicr &= 0xFFFF0000;
2756
2757         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2758
2759         if (eicr & IXGBE_EICR_LSC)
2760                 ixgbe_check_lsc(adapter);
2761
2762         if (eicr & IXGBE_EICR_MAILBOX)
2763                 ixgbe_msg_task(adapter);
2764
2765         switch (hw->mac.type) {
2766         case ixgbe_mac_82599EB:
2767         case ixgbe_mac_X540:
2768         case ixgbe_mac_X550:
2769         case ixgbe_mac_X550EM_x:
2770         case ixgbe_mac_x550em_a:
2771                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2772                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2773                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2774                         ixgbe_service_event_schedule(adapter);
2775                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2776                                         IXGBE_EICR_GPI_SDP0_X540);
2777                 }
2778                 if (eicr & IXGBE_EICR_ECC) {
2779                         e_info(link, "Received ECC Err, initiating reset\n");
2780                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2781                         ixgbe_service_event_schedule(adapter);
2782                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2783                 }
2784                 /* Handle Flow Director Full threshold interrupt */
2785                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2786                         int reinit_count = 0;
2787                         int i;
2788                         for (i = 0; i < adapter->num_tx_queues; i++) {
2789                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2790                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2791                                                        &ring->state))
2792                                         reinit_count++;
2793                         }
2794                         if (reinit_count) {
2795                                 /* no more flow director interrupts until after init */
2796                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2797                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2798                                 ixgbe_service_event_schedule(adapter);
2799                         }
2800                 }
2801                 ixgbe_check_sfp_event(adapter, eicr);
2802                 ixgbe_check_overtemp_event(adapter, eicr);
2803                 break;
2804         default:
2805                 break;
2806         }
2807
2808         ixgbe_check_fan_failure(adapter, eicr);
2809
2810         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2811                 ixgbe_ptp_check_pps_event(adapter);
2812
2813         /* re-enable the original interrupt state, no lsc, no queues */
2814         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2815                 ixgbe_irq_enable(adapter, false, false);
2816
2817         return IRQ_HANDLED;
2818 }
2819
2820 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2821 {
2822         struct ixgbe_q_vector *q_vector = data;
2823
2824         /* EIAM disabled interrupts (on this vector) for us */
2825
2826         if (q_vector->rx.ring || q_vector->tx.ring)
2827                 napi_schedule_irqoff(&q_vector->napi);
2828
2829         return IRQ_HANDLED;
2830 }
2831
2832 /**
2833  * ixgbe_poll - NAPI Rx polling callback
2834  * @napi: structure for representing this polling device
2835  * @budget: how many packets driver is allowed to clean
2836  *
2837  * This function is used for legacy and MSI, NAPI mode
2838  **/
2839 int ixgbe_poll(struct napi_struct *napi, int budget)
2840 {
2841         struct ixgbe_q_vector *q_vector =
2842                                 container_of(napi, struct ixgbe_q_vector, napi);
2843         struct ixgbe_adapter *adapter = q_vector->adapter;
2844         struct ixgbe_ring *ring;
2845         int per_ring_budget, work_done = 0;
2846         bool clean_complete = true;
2847
2848 #ifdef CONFIG_IXGBE_DCA
2849         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2850                 ixgbe_update_dca(q_vector);
2851 #endif
2852
2853         ixgbe_for_each_ring(ring, q_vector->tx) {
2854                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
2855                         clean_complete = false;
2856         }
2857
2858         /* Exit if we are called by netpoll or busy polling is active */
2859         if ((budget <= 0) || !ixgbe_qv_lock_napi(q_vector))
2860                 return budget;
2861
2862         /* attempt to distribute budget to each queue fairly, but don't allow
2863          * the budget to go below 1 because we'll exit polling */
2864         if (q_vector->rx.count > 1)
2865                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2866         else
2867                 per_ring_budget = budget;
2868
2869         ixgbe_for_each_ring(ring, q_vector->rx) {
2870                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2871                                                  per_ring_budget);
2872
2873                 work_done += cleaned;
2874                 if (cleaned >= per_ring_budget)
2875                         clean_complete = false;
2876         }
2877
2878         ixgbe_qv_unlock_napi(q_vector);
2879         /* If all work not completed, return budget and keep polling */
2880         if (!clean_complete)
2881                 return budget;
2882
2883         /* all work done, exit the polling mode */
2884         napi_complete_done(napi, work_done);
2885         if (adapter->rx_itr_setting & 1)
2886                 ixgbe_set_itr(q_vector);
2887         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2888                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
2889
2890         return 0;
2891 }
2892
2893 /**
2894  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2895  * @adapter: board private structure
2896  *
2897  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2898  * interrupts from the kernel.
2899  **/
2900 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2901 {
2902         struct net_device *netdev = adapter->netdev;
2903         int vector, err;
2904         int ri = 0, ti = 0;
2905
2906         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2907                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2908                 struct msix_entry *entry = &adapter->msix_entries[vector];
2909
2910                 if (q_vector->tx.ring && q_vector->rx.ring) {
2911                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2912                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2913                         ti++;
2914                 } else if (q_vector->rx.ring) {
2915                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2916                                  "%s-%s-%d", netdev->name, "rx", ri++);
2917                 } else if (q_vector->tx.ring) {
2918                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2919                                  "%s-%s-%d", netdev->name, "tx", ti++);
2920                 } else {
2921                         /* skip this unused q_vector */
2922                         continue;
2923                 }
2924                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2925                                   q_vector->name, q_vector);
2926                 if (err) {
2927                         e_err(probe, "request_irq failed for MSIX interrupt "
2928                               "Error: %d\n", err);
2929                         goto free_queue_irqs;
2930                 }
2931                 /* If Flow Director is enabled, set interrupt affinity */
2932                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2933                         /* assign the mask for this irq */
2934                         irq_set_affinity_hint(entry->vector,
2935                                               &q_vector->affinity_mask);
2936                 }
2937         }
2938
2939         err = request_irq(adapter->msix_entries[vector].vector,
2940                           ixgbe_msix_other, 0, netdev->name, adapter);
2941         if (err) {
2942                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2943                 goto free_queue_irqs;
2944         }
2945
2946         return 0;
2947
2948 free_queue_irqs:
2949         while (vector) {
2950                 vector--;
2951                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2952                                       NULL);
2953                 free_irq(adapter->msix_entries[vector].vector,
2954                          adapter->q_vector[vector]);
2955         }
2956         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2957         pci_disable_msix(adapter->pdev);
2958         kfree(adapter->msix_entries);
2959         adapter->msix_entries = NULL;
2960         return err;
2961 }
2962
2963 /**
2964  * ixgbe_intr - legacy mode Interrupt Handler
2965  * @irq: interrupt number
2966  * @data: pointer to a network interface device structure
2967  **/
2968 static irqreturn_t ixgbe_intr(int irq, void *data)
2969 {
2970         struct ixgbe_adapter *adapter = data;
2971         struct ixgbe_hw *hw = &adapter->hw;
2972         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2973         u32 eicr;
2974
2975         /*
2976          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
2977          * before the read of EICR.
2978          */
2979         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2980
2981         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2982          * therefore no explicit interrupt disable is necessary */
2983         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2984         if (!eicr) {
2985                 /*
2986                  * shared interrupt alert!
2987                  * make sure interrupts are enabled because the read will
2988                  * have disabled interrupts due to EIAM
2989                  * finish the workaround of silicon errata on 82598.  Unmask
2990                  * the interrupt that we masked before the EICR read.
2991                  */
2992                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2993                         ixgbe_irq_enable(adapter, true, true);
2994                 return IRQ_NONE;        /* Not our interrupt */
2995         }
2996
2997         if (eicr & IXGBE_EICR_LSC)
2998                 ixgbe_check_lsc(adapter);
2999
3000         switch (hw->mac.type) {
3001         case ixgbe_mac_82599EB:
3002                 ixgbe_check_sfp_event(adapter, eicr);
3003                 /* Fall through */
3004         case ixgbe_mac_X540:
3005         case ixgbe_mac_X550:
3006         case ixgbe_mac_X550EM_x:
3007         case ixgbe_mac_x550em_a:
3008                 if (eicr & IXGBE_EICR_ECC) {
3009                         e_info(link, "Received ECC Err, initiating reset\n");
3010                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
3011                         ixgbe_service_event_schedule(adapter);
3012                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3013                 }
3014                 ixgbe_check_overtemp_event(adapter, eicr);
3015                 break;
3016         default:
3017                 break;
3018         }
3019
3020         ixgbe_check_fan_failure(adapter, eicr);
3021         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3022                 ixgbe_ptp_check_pps_event(adapter);
3023
3024         /* would disable interrupts here but EIAM disabled it */
3025         napi_schedule_irqoff(&q_vector->napi);
3026
3027         /*
3028          * re-enable link(maybe) and non-queue interrupts, no flush.
3029          * ixgbe_poll will re-enable the queue interrupts
3030          */
3031         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3032                 ixgbe_irq_enable(adapter, false, false);
3033
3034         return IRQ_HANDLED;
3035 }
3036
3037 /**
3038  * ixgbe_request_irq - initialize interrupts
3039  * @adapter: board private structure
3040  *
3041  * Attempts to configure interrupts using the best available
3042  * capabilities of the hardware and kernel.
3043  **/
3044 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3045 {
3046         struct net_device *netdev = adapter->netdev;
3047         int err;
3048
3049         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3050                 err = ixgbe_request_msix_irqs(adapter);
3051         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3052                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3053                                   netdev->name, adapter);
3054         else
3055                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3056                                   netdev->name, adapter);
3057
3058         if (err)
3059                 e_err(probe, "request_irq failed, Error %d\n", err);
3060
3061         return err;
3062 }
3063
3064 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3065 {
3066         int vector;
3067
3068         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3069                 free_irq(adapter->pdev->irq, adapter);
3070                 return;
3071         }
3072
3073         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3074                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3075                 struct msix_entry *entry = &adapter->msix_entries[vector];
3076
3077                 /* free only the irqs that were actually requested */
3078                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3079                         continue;
3080
3081                 /* clear the affinity_mask in the IRQ descriptor */
3082                 irq_set_affinity_hint(entry->vector, NULL);
3083
3084                 free_irq(entry->vector, q_vector);
3085         }
3086
3087         free_irq(adapter->msix_entries[vector++].vector, adapter);
3088 }
3089
3090 /**
3091  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3092  * @adapter: board private structure
3093  **/
3094 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3095 {
3096         switch (adapter->hw.mac.type) {
3097         case ixgbe_mac_82598EB:
3098                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3099                 break;
3100         case ixgbe_mac_82599EB:
3101         case ixgbe_mac_X540:
3102         case ixgbe_mac_X550:
3103         case ixgbe_mac_X550EM_x:
3104         case ixgbe_mac_x550em_a:
3105                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3106                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3107                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3108                 break;
3109         default:
3110                 break;
3111         }
3112         IXGBE_WRITE_FLUSH(&adapter->hw);
3113         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3114                 int vector;
3115
3116                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3117                         synchronize_irq(adapter->msix_entries[vector].vector);
3118
3119                 synchronize_irq(adapter->msix_entries[vector++].vector);
3120         } else {
3121                 synchronize_irq(adapter->pdev->irq);
3122         }
3123 }
3124
3125 /**
3126  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3127  *
3128  **/
3129 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3130 {
3131         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3132
3133         ixgbe_write_eitr(q_vector);
3134
3135         ixgbe_set_ivar(adapter, 0, 0, 0);
3136         ixgbe_set_ivar(adapter, 1, 0, 0);
3137
3138         e_info(hw, "Legacy interrupt IVAR setup done\n");
3139 }
3140
3141 /**
3142  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3143  * @adapter: board private structure
3144  * @ring: structure containing ring specific data
3145  *
3146  * Configure the Tx descriptor ring after a reset.
3147  **/
3148 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3149                              struct ixgbe_ring *ring)
3150 {
3151         struct ixgbe_hw *hw = &adapter->hw;
3152         u64 tdba = ring->dma;
3153         int wait_loop = 10;
3154         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3155         u8 reg_idx = ring->reg_idx;
3156
3157         /* disable queue to avoid issues while updating state */
3158         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3159         IXGBE_WRITE_FLUSH(hw);
3160
3161         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3162                         (tdba & DMA_BIT_MASK(32)));
3163         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3164         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3165                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3166         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3167         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3168         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3169
3170         /*
3171          * set WTHRESH to encourage burst writeback, it should not be set
3172          * higher than 1 when:
3173          * - ITR is 0 as it could cause false TX hangs
3174          * - ITR is set to > 100k int/sec and BQL is enabled
3175          *
3176          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3177          * to or less than the number of on chip descriptors, which is
3178          * currently 40.
3179          */
3180         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3181                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3182         else
3183                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3184
3185         /*
3186          * Setting PTHRESH to 32 both improves performance
3187          * and avoids a TX hang with DFP enabled
3188          */
3189         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3190                    32;          /* PTHRESH = 32 */
3191
3192         /* reinitialize flowdirector state */
3193         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3194                 ring->atr_sample_rate = adapter->atr_sample_rate;
3195                 ring->atr_count = 0;
3196                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3197         } else {
3198                 ring->atr_sample_rate = 0;
3199         }
3200
3201         /* initialize XPS */
3202         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3203                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3204
3205                 if (q_vector)
3206                         netif_set_xps_queue(ring->netdev,
3207                                             &q_vector->affinity_mask,
3208                                             ring->queue_index);
3209         }
3210
3211         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3212
3213         /* enable queue */
3214         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3215
3216         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3217         if (hw->mac.type == ixgbe_mac_82598EB &&
3218             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3219                 return;
3220
3221         /* poll to verify queue is enabled */
3222         do {
3223                 usleep_range(1000, 2000);
3224                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3225         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3226         if (!wait_loop)
3227                 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3228 }
3229
3230 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3231 {
3232         struct ixgbe_hw *hw = &adapter->hw;
3233         u32 rttdcs, mtqc;
3234         u8 tcs = netdev_get_num_tc(adapter->netdev);
3235
3236         if (hw->mac.type == ixgbe_mac_82598EB)
3237                 return;
3238
3239         /* disable the arbiter while setting MTQC */
3240         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3241         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3242         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3243
3244         /* set transmit pool layout */
3245         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3246                 mtqc = IXGBE_MTQC_VT_ENA;
3247                 if (tcs > 4)
3248                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3249                 else if (tcs > 1)
3250                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3251                 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3252                         mtqc |= IXGBE_MTQC_32VF;
3253                 else
3254                         mtqc |= IXGBE_MTQC_64VF;
3255         } else {
3256                 if (tcs > 4)
3257                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3258                 else if (tcs > 1)
3259                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3260                 else
3261                         mtqc = IXGBE_MTQC_64Q_1PB;
3262         }
3263
3264         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3265
3266         /* Enable Security TX Buffer IFG for multiple pb */
3267         if (tcs) {
3268                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3269                 sectx |= IXGBE_SECTX_DCB;
3270                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3271         }
3272
3273         /* re-enable the arbiter */
3274         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3275         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3276 }
3277
3278 /**
3279  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3280  * @adapter: board private structure
3281  *
3282  * Configure the Tx unit of the MAC after a reset.
3283  **/
3284 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3285 {
3286         struct ixgbe_hw *hw = &adapter->hw;
3287         u32 dmatxctl;
3288         u32 i;
3289
3290         ixgbe_setup_mtqc(adapter);
3291
3292         if (hw->mac.type != ixgbe_mac_82598EB) {
3293                 /* DMATXCTL.EN must be before Tx queues are enabled */
3294                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3295                 dmatxctl |= IXGBE_DMATXCTL_TE;
3296                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3297         }
3298
3299         /* Setup the HW Tx Head and Tail descriptor pointers */
3300         for (i = 0; i < adapter->num_tx_queues; i++)
3301                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3302 }
3303
3304 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3305                                  struct ixgbe_ring *ring)
3306 {
3307         struct ixgbe_hw *hw = &adapter->hw;
3308         u8 reg_idx = ring->reg_idx;
3309         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3310
3311         srrctl |= IXGBE_SRRCTL_DROP_EN;
3312
3313         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3314 }
3315
3316 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3317                                   struct ixgbe_ring *ring)
3318 {
3319         struct ixgbe_hw *hw = &adapter->hw;
3320         u8 reg_idx = ring->reg_idx;
3321         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3322
3323         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3324
3325         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3326 }
3327
3328 #ifdef CONFIG_IXGBE_DCB
3329 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3330 #else
3331 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3332 #endif
3333 {
3334         int i;
3335         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3336
3337         if (adapter->ixgbe_ieee_pfc)
3338                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3339
3340         /*
3341          * We should set the drop enable bit if:
3342          *  SR-IOV is enabled
3343          *   or
3344          *  Number of Rx queues > 1 and flow control is disabled
3345          *
3346          *  This allows us to avoid head of line blocking for security
3347          *  and performance reasons.
3348          */
3349         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3350             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3351                 for (i = 0; i < adapter->num_rx_queues; i++)
3352                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3353         } else {
3354                 for (i = 0; i < adapter->num_rx_queues; i++)
3355                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3356         }
3357 }
3358
3359 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3360
3361 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3362                                    struct ixgbe_ring *rx_ring)
3363 {
3364         struct ixgbe_hw *hw = &adapter->hw;
3365         u32 srrctl;
3366         u8 reg_idx = rx_ring->reg_idx;
3367
3368         if (hw->mac.type == ixgbe_mac_82598EB) {
3369                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3370
3371                 /*
3372                  * if VMDq is not active we must program one srrctl register
3373                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3374                  */
3375                 reg_idx &= mask;
3376         }
3377
3378         /* configure header buffer length, needed for RSC */
3379         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3380
3381         /* configure the packet buffer length */
3382         srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3383
3384         /* configure descriptor type */
3385         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3386
3387         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3388 }
3389
3390 /**
3391  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3392  * @adapter: device handle
3393  *
3394  *  - 82598/82599/X540:     128
3395  *  - X550(non-SRIOV mode): 512
3396  *  - X550(SRIOV mode):     64
3397  */
3398 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3399 {
3400         if (adapter->hw.mac.type < ixgbe_mac_X550)
3401                 return 128;
3402         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3403                 return 64;
3404         else
3405                 return 512;
3406 }
3407
3408 /**
3409  * ixgbe_store_reta - Write the RETA table to HW
3410  * @adapter: device handle
3411  *
3412  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3413  */
3414 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3415 {
3416         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3417         struct ixgbe_hw *hw = &adapter->hw;
3418         u32 reta = 0;
3419         u32 indices_multi;
3420         u8 *indir_tbl = adapter->rss_indir_tbl;
3421
3422         /* Fill out the redirection table as follows:
3423          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3424          *    indices.
3425          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3426          *  - X550:       8 bit wide entries containing 6 bit RSS index
3427          */
3428         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3429                 indices_multi = 0x11;
3430         else
3431                 indices_multi = 0x1;
3432
3433         /* Write redirection table to HW */
3434         for (i = 0; i < reta_entries; i++) {
3435                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3436                 if ((i & 3) == 3) {
3437                         if (i < 128)
3438                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3439                         else
3440                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3441                                                 reta);
3442                         reta = 0;
3443                 }
3444         }
3445 }
3446
3447 /**
3448  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3449  * @adapter: device handle
3450  *
3451  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3452  */
3453 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3454 {
3455         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3456         struct ixgbe_hw *hw = &adapter->hw;
3457         u32 vfreta = 0;
3458         unsigned int pf_pool = adapter->num_vfs;
3459
3460         /* Write redirection table to HW */
3461         for (i = 0; i < reta_entries; i++) {
3462                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3463                 if ((i & 3) == 3) {
3464                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3465                                         vfreta);
3466                         vfreta = 0;
3467                 }
3468         }
3469 }
3470
3471 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3472 {
3473         struct ixgbe_hw *hw = &adapter->hw;
3474         u32 i, j;
3475         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3476         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3477
3478         /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3479          * make full use of any rings they may have.  We will use the
3480          * PSRTYPE register to control how many rings we use within the PF.
3481          */
3482         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3483                 rss_i = 2;
3484
3485         /* Fill out hash function seeds */
3486         for (i = 0; i < 10; i++)
3487                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3488
3489         /* Fill out redirection table */
3490         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3491
3492         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3493                 if (j == rss_i)
3494                         j = 0;
3495
3496                 adapter->rss_indir_tbl[i] = j;
3497         }
3498
3499         ixgbe_store_reta(adapter);
3500 }
3501
3502 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3503 {
3504         struct ixgbe_hw *hw = &adapter->hw;
3505         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3506         unsigned int pf_pool = adapter->num_vfs;
3507         int i, j;
3508
3509         /* Fill out hash function seeds */
3510         for (i = 0; i < 10; i++)
3511                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3512                                 adapter->rss_key[i]);
3513
3514         /* Fill out the redirection table */
3515         for (i = 0, j = 0; i < 64; i++, j++) {
3516                 if (j == rss_i)
3517                         j = 0;
3518
3519                 adapter->rss_indir_tbl[i] = j;
3520         }
3521
3522         ixgbe_store_vfreta(adapter);
3523 }
3524
3525 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3526 {
3527         struct ixgbe_hw *hw = &adapter->hw;
3528         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3529         u32 rxcsum;
3530
3531         /* Disable indicating checksum in descriptor, enables RSS hash */
3532         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3533         rxcsum |= IXGBE_RXCSUM_PCSD;
3534         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3535
3536         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3537                 if (adapter->ring_feature[RING_F_RSS].mask)
3538                         mrqc = IXGBE_MRQC_RSSEN;
3539         } else {
3540                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3541
3542                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3543                         if (tcs > 4)
3544                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3545                         else if (tcs > 1)
3546                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3547                         else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3548                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3549                         else
3550                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3551                 } else {
3552                         if (tcs > 4)
3553                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3554                         else if (tcs > 1)
3555                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3556                         else
3557                                 mrqc = IXGBE_MRQC_RSSEN;
3558                 }
3559         }
3560
3561         /* Perform hash on these packet types */
3562         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3563                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3564                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3565                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3566
3567         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3568                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3569         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3570                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3571
3572         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3573         if ((hw->mac.type >= ixgbe_mac_X550) &&
3574             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3575                 unsigned int pf_pool = adapter->num_vfs;
3576
3577                 /* Enable VF RSS mode */
3578                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3579                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3580
3581                 /* Setup RSS through the VF registers */
3582                 ixgbe_setup_vfreta(adapter);
3583                 vfmrqc = IXGBE_MRQC_RSSEN;
3584                 vfmrqc |= rss_field;
3585                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3586         } else {
3587                 ixgbe_setup_reta(adapter);
3588                 mrqc |= rss_field;
3589                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3590         }
3591 }
3592
3593 /**
3594  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3595  * @adapter:    address of board private structure
3596  * @index:      index of ring to set
3597  **/
3598 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3599                                    struct ixgbe_ring *ring)
3600 {
3601         struct ixgbe_hw *hw = &adapter->hw;
3602         u32 rscctrl;
3603         u8 reg_idx = ring->reg_idx;
3604
3605         if (!ring_is_rsc_enabled(ring))
3606                 return;
3607
3608         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3609         rscctrl |= IXGBE_RSCCTL_RSCEN;
3610         /*
3611          * we must limit the number of descriptors so that the
3612          * total size of max desc * buf_len is not greater
3613          * than 65536
3614          */
3615         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3616         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3617 }
3618
3619 #define IXGBE_MAX_RX_DESC_POLL 10
3620 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3621                                        struct ixgbe_ring *ring)
3622 {
3623         struct ixgbe_hw *hw = &adapter->hw;
3624         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3625         u32 rxdctl;
3626         u8 reg_idx = ring->reg_idx;
3627
3628         if (ixgbe_removed(hw->hw_addr))
3629                 return;
3630         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3631         if (hw->mac.type == ixgbe_mac_82598EB &&
3632             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3633                 return;
3634
3635         do {
3636                 usleep_range(1000, 2000);
3637                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3638         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3639
3640         if (!wait_loop) {
3641                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3642                       "the polling period\n", reg_idx);
3643         }
3644 }
3645
3646 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3647                             struct ixgbe_ring *ring)
3648 {
3649         struct ixgbe_hw *hw = &adapter->hw;
3650         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3651         u32 rxdctl;
3652         u8 reg_idx = ring->reg_idx;
3653
3654         if (ixgbe_removed(hw->hw_addr))
3655                 return;
3656         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3657         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3658
3659         /* write value back with RXDCTL.ENABLE bit cleared */
3660         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3661
3662         if (hw->mac.type == ixgbe_mac_82598EB &&
3663             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3664                 return;
3665
3666         /* the hardware may take up to 100us to really disable the rx queue */
3667         do {
3668                 udelay(10);
3669                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3670         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3671
3672         if (!wait_loop) {
3673                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3674                       "the polling period\n", reg_idx);
3675         }
3676 }
3677
3678 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3679                              struct ixgbe_ring *ring)
3680 {
3681         struct ixgbe_hw *hw = &adapter->hw;
3682         u64 rdba = ring->dma;
3683         u32 rxdctl;
3684         u8 reg_idx = ring->reg_idx;
3685
3686         /* disable queue to avoid issues while updating state */
3687         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3688         ixgbe_disable_rx_queue(adapter, ring);
3689
3690         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3691         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3692         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3693                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3694         /* Force flushing of IXGBE_RDLEN to prevent MDD */
3695         IXGBE_WRITE_FLUSH(hw);
3696
3697         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3698         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3699         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3700
3701         ixgbe_configure_srrctl(adapter, ring);
3702         ixgbe_configure_rscctl(adapter, ring);
3703
3704         if (hw->mac.type == ixgbe_mac_82598EB) {
3705                 /*
3706                  * enable cache line friendly hardware writes:
3707                  * PTHRESH=32 descriptors (half the internal cache),
3708                  * this also removes ugly rx_no_buffer_count increment
3709                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3710                  * WTHRESH=8 burst writeback up to two cache lines
3711                  */
3712                 rxdctl &= ~0x3FFFFF;
3713                 rxdctl |=  0x080420;
3714         }
3715
3716         /* enable receive descriptor ring */
3717         rxdctl |= IXGBE_RXDCTL_ENABLE;
3718         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3719
3720         ixgbe_rx_desc_queue_enable(adapter, ring);
3721         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3722 }
3723
3724 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3725 {
3726         struct ixgbe_hw *hw = &adapter->hw;
3727         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3728         u16 pool;
3729
3730         /* PSRTYPE must be initialized in non 82598 adapters */
3731         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3732                       IXGBE_PSRTYPE_UDPHDR |
3733                       IXGBE_PSRTYPE_IPV4HDR |
3734                       IXGBE_PSRTYPE_L2HDR |
3735                       IXGBE_PSRTYPE_IPV6HDR;
3736
3737         if (hw->mac.type == ixgbe_mac_82598EB)
3738                 return;
3739
3740         if (rss_i > 3)
3741                 psrtype |= 2u << 29;
3742         else if (rss_i > 1)
3743                 psrtype |= 1u << 29;
3744
3745         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3746                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3747 }
3748
3749 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3750 {
3751         struct ixgbe_hw *hw = &adapter->hw;
3752         u32 reg_offset, vf_shift;
3753         u32 gcr_ext, vmdctl;
3754         int i;
3755
3756         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3757                 return;
3758
3759         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3760         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3761         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3762         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3763         vmdctl |= IXGBE_VT_CTL_REPLEN;
3764         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3765
3766         vf_shift = VMDQ_P(0) % 32;
3767         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3768
3769         /* Enable only the PF's pool for Tx/Rx */
3770         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(vf_shift, 31));
3771         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3772         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(vf_shift, 31));
3773         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3774         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3775                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3776
3777         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3778         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3779
3780         /* clear VLAN promisc flag so VFTA will be updated if necessary */
3781         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
3782
3783         /*
3784          * Set up VF register offsets for selected VT Mode,
3785          * i.e. 32 or 64 VFs for SR-IOV
3786          */
3787         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3788         case IXGBE_82599_VMDQ_8Q_MASK:
3789                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3790                 break;
3791         case IXGBE_82599_VMDQ_4Q_MASK:
3792                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3793                 break;
3794         default:
3795                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3796                 break;
3797         }
3798
3799         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3800
3801         for (i = 0; i < adapter->num_vfs; i++) {
3802                 /* configure spoof checking */
3803                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
3804                                           adapter->vfinfo[i].spoofchk_enabled);
3805
3806                 /* Enable/Disable RSS query feature  */
3807                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3808                                           adapter->vfinfo[i].rss_query_enabled);
3809         }
3810 }
3811
3812 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3813 {
3814         struct ixgbe_hw *hw = &adapter->hw;
3815         struct net_device *netdev = adapter->netdev;
3816         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3817         struct ixgbe_ring *rx_ring;
3818         int i;
3819         u32 mhadd, hlreg0;
3820
3821 #ifdef IXGBE_FCOE
3822         /* adjust max frame to be able to do baby jumbo for FCoE */
3823         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3824             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3825                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3826
3827 #endif /* IXGBE_FCOE */
3828
3829         /* adjust max frame to be at least the size of a standard frame */
3830         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3831                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3832
3833         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3834         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3835                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3836                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3837
3838                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3839         }
3840
3841         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3842         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3843         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3844         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3845
3846         /*
3847          * Setup the HW Rx Head and Tail Descriptor Pointers and
3848          * the Base and Length of the Rx Descriptor Ring
3849          */
3850         for (i = 0; i < adapter->num_rx_queues; i++) {
3851                 rx_ring = adapter->rx_ring[i];
3852                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3853                         set_ring_rsc_enabled(rx_ring);
3854                 else
3855                         clear_ring_rsc_enabled(rx_ring);
3856         }
3857 }
3858
3859 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3860 {
3861         struct ixgbe_hw *hw = &adapter->hw;
3862         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3863
3864         switch (hw->mac.type) {
3865         case ixgbe_mac_82598EB:
3866                 /*
3867                  * For VMDq support of different descriptor types or
3868                  * buffer sizes through the use of multiple SRRCTL
3869                  * registers, RDRXCTL.MVMEN must be set to 1
3870                  *
3871                  * also, the manual doesn't mention it clearly but DCA hints
3872                  * will only use queue 0's tags unless this bit is set.  Side
3873                  * effects of setting this bit are only that SRRCTL must be
3874                  * fully programmed [0..15]
3875                  */
3876                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3877                 break;
3878         case ixgbe_mac_X550:
3879         case ixgbe_mac_X550EM_x:
3880         case ixgbe_mac_x550em_a:
3881                 if (adapter->num_vfs)
3882                         rdrxctl |= IXGBE_RDRXCTL_PSP;
3883                 /* fall through for older HW */
3884         case ixgbe_mac_82599EB:
3885         case ixgbe_mac_X540:
3886                 /* Disable RSC for ACK packets */
3887                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3888                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3889                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3890                 /* hardware requires some bits to be set by default */
3891                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3892                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3893                 break;
3894         default:
3895                 /* We should do nothing since we don't know this hardware */
3896                 return;
3897         }
3898
3899         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3900 }
3901
3902 /**
3903  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3904  * @adapter: board private structure
3905  *
3906  * Configure the Rx unit of the MAC after a reset.
3907  **/
3908 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3909 {
3910         struct ixgbe_hw *hw = &adapter->hw;
3911         int i;
3912         u32 rxctrl, rfctl;
3913
3914         /* disable receives while setting up the descriptors */
3915         hw->mac.ops.disable_rx(hw);
3916
3917         ixgbe_setup_psrtype(adapter);
3918         ixgbe_setup_rdrxctl(adapter);
3919
3920         /* RSC Setup */
3921         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3922         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3923         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3924                 rfctl |= IXGBE_RFCTL_RSC_DIS;
3925         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3926
3927         /* Program registers for the distribution of queues */
3928         ixgbe_setup_mrqc(adapter);
3929
3930         /* set_rx_buffer_len must be called before ring initialization */
3931         ixgbe_set_rx_buffer_len(adapter);
3932
3933         /*
3934          * Setup the HW Rx Head and Tail Descriptor Pointers and
3935          * the Base and Length of the Rx Descriptor Ring
3936          */
3937         for (i = 0; i < adapter->num_rx_queues; i++)
3938                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3939
3940         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3941         /* disable drop enable for 82598 parts */
3942         if (hw->mac.type == ixgbe_mac_82598EB)
3943                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3944
3945         /* enable all receives */
3946         rxctrl |= IXGBE_RXCTRL_RXEN;
3947         hw->mac.ops.enable_rx_dma(hw, rxctrl);
3948 }
3949
3950 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3951                                  __be16 proto, u16 vid)
3952 {
3953         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3954         struct ixgbe_hw *hw = &adapter->hw;
3955
3956         /* add VID to filter table */
3957         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
3958                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
3959
3960         set_bit(vid, adapter->active_vlans);
3961
3962         return 0;
3963 }
3964
3965 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
3966 {
3967         u32 vlvf;
3968         int idx;
3969
3970         /* short cut the special case */
3971         if (vlan == 0)
3972                 return 0;
3973
3974         /* Search for the vlan id in the VLVF entries */
3975         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
3976                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
3977                 if ((vlvf & VLAN_VID_MASK) == vlan)
3978                         break;
3979         }
3980
3981         return idx;
3982 }
3983
3984 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
3985 {
3986         struct ixgbe_hw *hw = &adapter->hw;
3987         u32 bits, word;
3988         int idx;
3989
3990         idx = ixgbe_find_vlvf_entry(hw, vid);
3991         if (!idx)
3992                 return;
3993
3994         /* See if any other pools are set for this VLAN filter
3995          * entry other than the PF.
3996          */
3997         word = idx * 2 + (VMDQ_P(0) / 32);
3998         bits = ~BIT(VMDQ_P(0) % 32);
3999         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4000
4001         /* Disable the filter so this falls into the default pool. */
4002         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4003                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4004                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4005                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4006         }
4007 }
4008
4009 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4010                                   __be16 proto, u16 vid)
4011 {
4012         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4013         struct ixgbe_hw *hw = &adapter->hw;
4014
4015         /* remove VID from filter table */
4016         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4017                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4018
4019         clear_bit(vid, adapter->active_vlans);
4020
4021         return 0;
4022 }
4023
4024 /**
4025  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4026  * @adapter: driver data
4027  */
4028 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4029 {
4030         struct ixgbe_hw *hw = &adapter->hw;
4031         u32 vlnctrl;
4032         int i, j;
4033
4034         switch (hw->mac.type) {
4035         case ixgbe_mac_82598EB:
4036                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4037                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4038                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4039                 break;
4040         case ixgbe_mac_82599EB:
4041         case ixgbe_mac_X540:
4042         case ixgbe_mac_X550:
4043         case ixgbe_mac_X550EM_x:
4044         case ixgbe_mac_x550em_a:
4045                 for (i = 0; i < adapter->num_rx_queues; i++) {
4046                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4047
4048                         if (ring->l2_accel_priv)
4049                                 continue;
4050                         j = ring->reg_idx;
4051                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4052                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4053                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4054                 }
4055                 break;
4056         default:
4057                 break;
4058         }
4059 }
4060
4061 /**
4062  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4063  * @adapter: driver data
4064  */
4065 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4066 {
4067         struct ixgbe_hw *hw = &adapter->hw;
4068         u32 vlnctrl;
4069         int i, j;
4070
4071         switch (hw->mac.type) {
4072         case ixgbe_mac_82598EB:
4073                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4074                 vlnctrl |= IXGBE_VLNCTRL_VME;
4075                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4076                 break;
4077         case ixgbe_mac_82599EB:
4078         case ixgbe_mac_X540:
4079         case ixgbe_mac_X550:
4080         case ixgbe_mac_X550EM_x:
4081         case ixgbe_mac_x550em_a:
4082                 for (i = 0; i < adapter->num_rx_queues; i++) {
4083                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4084
4085                         if (ring->l2_accel_priv)
4086                                 continue;
4087                         j = ring->reg_idx;
4088                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4089                         vlnctrl |= IXGBE_RXDCTL_VME;
4090                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4091                 }
4092                 break;
4093         default:
4094                 break;
4095         }
4096 }
4097
4098 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4099 {
4100         struct ixgbe_hw *hw = &adapter->hw;
4101         u32 vlnctrl, i;
4102
4103         switch (hw->mac.type) {
4104         case ixgbe_mac_82599EB:
4105         case ixgbe_mac_X540:
4106         case ixgbe_mac_X550:
4107         case ixgbe_mac_X550EM_x:
4108         case ixgbe_mac_x550em_a:
4109         default:
4110                 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)
4111                         break;
4112                 /* fall through */
4113         case ixgbe_mac_82598EB:
4114                 /* legacy case, we can just disable VLAN filtering */
4115                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4116                 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4117                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4118                 return;
4119         }
4120
4121         /* We are already in VLAN promisc, nothing to do */
4122         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4123                 return;
4124
4125         /* Set flag so we don't redo unnecessary work */
4126         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4127
4128         /* Add PF to all active pools */
4129         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4130                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4131                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4132
4133                 vlvfb |= BIT(VMDQ_P(0) % 32);
4134                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4135         }
4136
4137         /* Set all bits in the VLAN filter table array */
4138         for (i = hw->mac.vft_size; i--;)
4139                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4140 }
4141
4142 #define VFTA_BLOCK_SIZE 8
4143 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4144 {
4145         struct ixgbe_hw *hw = &adapter->hw;
4146         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4147         u32 vid_start = vfta_offset * 32;
4148         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4149         u32 i, vid, word, bits;
4150
4151         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4152                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4153
4154                 /* pull VLAN ID from VLVF */
4155                 vid = vlvf & VLAN_VID_MASK;
4156
4157                 /* only concern outselves with a certain range */
4158                 if (vid < vid_start || vid >= vid_end)
4159                         continue;
4160
4161                 if (vlvf) {
4162                         /* record VLAN ID in VFTA */
4163                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4164
4165                         /* if PF is part of this then continue */
4166                         if (test_bit(vid, adapter->active_vlans))
4167                                 continue;
4168                 }
4169
4170                 /* remove PF from the pool */
4171                 word = i * 2 + VMDQ_P(0) / 32;
4172                 bits = ~BIT(VMDQ_P(0) % 32);
4173                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4174                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4175         }
4176
4177         /* extract values from active_vlans and write back to VFTA */
4178         for (i = VFTA_BLOCK_SIZE; i--;) {
4179                 vid = (vfta_offset + i) * 32;
4180                 word = vid / BITS_PER_LONG;
4181                 bits = vid % BITS_PER_LONG;
4182
4183                 vfta[i] |= adapter->active_vlans[word] >> bits;
4184
4185                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4186         }
4187 }
4188
4189 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4190 {
4191         struct ixgbe_hw *hw = &adapter->hw;
4192         u32 vlnctrl, i;
4193
4194         switch (hw->mac.type) {
4195         case ixgbe_mac_82599EB:
4196         case ixgbe_mac_X540:
4197         case ixgbe_mac_X550:
4198         case ixgbe_mac_X550EM_x:
4199         case ixgbe_mac_x550em_a:
4200         default:
4201                 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)
4202                         break;
4203                 /* fall through */
4204         case ixgbe_mac_82598EB:
4205                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4206                 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
4207                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4208                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4209                 return;
4210         }
4211
4212         /* We are not in VLAN promisc, nothing to do */
4213         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4214                 return;
4215
4216         /* Set flag so we don't redo unnecessary work */
4217         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4218
4219         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4220                 ixgbe_scrub_vfta(adapter, i);
4221 }
4222
4223 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4224 {
4225         u16 vid = 1;
4226
4227         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4228
4229         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4230                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4231 }
4232
4233 /**
4234  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4235  * @netdev: network interface device structure
4236  *
4237  * Writes multicast address list to the MTA hash table.
4238  * Returns: -ENOMEM on failure
4239  *                0 on no addresses written
4240  *                X on writing X addresses to MTA
4241  **/
4242 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4243 {
4244         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4245         struct ixgbe_hw *hw = &adapter->hw;
4246
4247         if (!netif_running(netdev))
4248                 return 0;
4249
4250         if (hw->mac.ops.update_mc_addr_list)
4251                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4252         else
4253                 return -ENOMEM;
4254
4255 #ifdef CONFIG_PCI_IOV
4256         ixgbe_restore_vf_multicasts(adapter);
4257 #endif
4258
4259         return netdev_mc_count(netdev);
4260 }
4261
4262 #ifdef CONFIG_PCI_IOV
4263 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4264 {
4265         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4266         struct ixgbe_hw *hw = &adapter->hw;
4267         int i;
4268
4269         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4270                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4271
4272                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4273                         hw->mac.ops.set_rar(hw, i,
4274                                             mac_table->addr,
4275                                             mac_table->pool,
4276                                             IXGBE_RAH_AV);
4277                 else
4278                         hw->mac.ops.clear_rar(hw, i);
4279         }
4280 }
4281
4282 #endif
4283 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4284 {
4285         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4286         struct ixgbe_hw *hw = &adapter->hw;
4287         int i;
4288
4289         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4290                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4291                         continue;
4292
4293                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4294
4295                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4296                         hw->mac.ops.set_rar(hw, i,
4297                                             mac_table->addr,
4298                                             mac_table->pool,
4299                                             IXGBE_RAH_AV);
4300                 else
4301                         hw->mac.ops.clear_rar(hw, i);
4302         }
4303 }
4304
4305 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4306 {
4307         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4308         struct ixgbe_hw *hw = &adapter->hw;
4309         int i;
4310
4311         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4312                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4313                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4314         }
4315
4316         ixgbe_sync_mac_table(adapter);
4317 }
4318
4319 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4320 {
4321         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4322         struct ixgbe_hw *hw = &adapter->hw;
4323         int i, count = 0;
4324
4325         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4326                 /* do not count default RAR as available */
4327                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4328                         continue;
4329
4330                 /* only count unused and addresses that belong to us */
4331                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4332                         if (mac_table->pool != pool)
4333                                 continue;
4334                 }
4335
4336                 count++;
4337         }
4338
4339         return count;
4340 }
4341
4342 /* this function destroys the first RAR entry */
4343 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4344 {
4345         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4346         struct ixgbe_hw *hw = &adapter->hw;
4347
4348         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4349         mac_table->pool = VMDQ_P(0);
4350
4351         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4352
4353         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4354                             IXGBE_RAH_AV);
4355 }
4356
4357 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4358                          const u8 *addr, u16 pool)
4359 {
4360         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4361         struct ixgbe_hw *hw = &adapter->hw;
4362         int i;
4363
4364         if (is_zero_ether_addr(addr))
4365                 return -EINVAL;
4366
4367         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4368                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4369                         continue;
4370
4371                 ether_addr_copy(mac_table->addr, addr);
4372                 mac_table->pool = pool;
4373
4374                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4375                                     IXGBE_MAC_STATE_IN_USE;
4376
4377                 ixgbe_sync_mac_table(adapter);
4378
4379                 return i;
4380         }
4381
4382         return -ENOMEM;
4383 }
4384
4385 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4386                          const u8 *addr, u16 pool)
4387 {
4388         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4389         struct ixgbe_hw *hw = &adapter->hw;
4390         int i;
4391
4392         if (is_zero_ether_addr(addr))
4393                 return -EINVAL;
4394
4395         /* search table for addr, if found clear IN_USE flag and sync */
4396         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4397                 /* we can only delete an entry if it is in use */
4398                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4399                         continue;
4400                 /* we only care about entries that belong to the given pool */
4401                 if (mac_table->pool != pool)
4402                         continue;
4403                 /* we only care about a specific MAC address */
4404                 if (!ether_addr_equal(addr, mac_table->addr))
4405                         continue;
4406
4407                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4408                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4409
4410                 ixgbe_sync_mac_table(adapter);
4411
4412                 return 0;
4413         }
4414
4415         return -ENOMEM;
4416 }
4417 /**
4418  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4419  * @netdev: network interface device structure
4420  *
4421  * Writes unicast address list to the RAR table.
4422  * Returns: -ENOMEM on failure/insufficient address space
4423  *                0 on no addresses written
4424  *                X on writing X addresses to the RAR table
4425  **/
4426 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4427 {
4428         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4429         int count = 0;
4430
4431         /* return ENOMEM indicating insufficient memory for addresses */
4432         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4433                 return -ENOMEM;
4434
4435         if (!netdev_uc_empty(netdev)) {
4436                 struct netdev_hw_addr *ha;
4437                 netdev_for_each_uc_addr(ha, netdev) {
4438                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4439                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4440                         count++;
4441                 }
4442         }
4443         return count;
4444 }
4445
4446 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4447 {
4448         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4449         int ret;
4450
4451         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4452
4453         return min_t(int, ret, 0);
4454 }
4455
4456 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4457 {
4458         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4459
4460         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4461
4462         return 0;
4463 }
4464
4465 /**
4466  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4467  * @netdev: network interface device structure
4468  *
4469  * The set_rx_method entry point is called whenever the unicast/multicast
4470  * address list or the network interface flags are updated.  This routine is
4471  * responsible for configuring the hardware for proper unicast, multicast and
4472  * promiscuous mode.
4473  **/
4474 void ixgbe_set_rx_mode(struct net_device *netdev)
4475 {
4476         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4477         struct ixgbe_hw *hw = &adapter->hw;
4478         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4479         netdev_features_t features = netdev->features;
4480         int count;
4481
4482         /* Check for Promiscuous and All Multicast modes */
4483         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4484
4485         /* set all bits that we expect to always be set */
4486         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4487         fctrl |= IXGBE_FCTRL_BAM;
4488         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4489         fctrl |= IXGBE_FCTRL_PMCF;
4490
4491         /* clear the bits we are changing the status of */
4492         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4493         if (netdev->flags & IFF_PROMISC) {
4494                 hw->addr_ctrl.user_set_promisc = true;
4495                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4496                 vmolr |= IXGBE_VMOLR_MPE;
4497                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4498         } else {
4499                 if (netdev->flags & IFF_ALLMULTI) {
4500                         fctrl |= IXGBE_FCTRL_MPE;
4501                         vmolr |= IXGBE_VMOLR_MPE;
4502                 }
4503                 hw->addr_ctrl.user_set_promisc = false;
4504         }
4505
4506         /*
4507          * Write addresses to available RAR registers, if there is not
4508          * sufficient space to store all the addresses then enable
4509          * unicast promiscuous mode
4510          */
4511         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4512                 fctrl |= IXGBE_FCTRL_UPE;
4513                 vmolr |= IXGBE_VMOLR_ROPE;
4514         }
4515
4516         /* Write addresses to the MTA, if the attempt fails
4517          * then we should just turn on promiscuous mode so
4518          * that we can at least receive multicast traffic
4519          */
4520         count = ixgbe_write_mc_addr_list(netdev);
4521         if (count < 0) {
4522                 fctrl |= IXGBE_FCTRL_MPE;
4523                 vmolr |= IXGBE_VMOLR_MPE;
4524         } else if (count) {
4525                 vmolr |= IXGBE_VMOLR_ROMPE;
4526         }
4527
4528         if (hw->mac.type != ixgbe_mac_82598EB) {
4529                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4530                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4531                            IXGBE_VMOLR_ROPE);
4532                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4533         }
4534
4535         /* This is useful for sniffing bad packets. */
4536         if (features & NETIF_F_RXALL) {
4537                 /* UPE and MPE will be handled by normal PROMISC logic
4538                  * in e1000e_set_rx_mode */
4539                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4540                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4541                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4542
4543                 fctrl &= ~(IXGBE_FCTRL_DPF);
4544                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4545         }
4546
4547         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4548
4549         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4550                 ixgbe_vlan_strip_enable(adapter);
4551         else
4552                 ixgbe_vlan_strip_disable(adapter);
4553
4554         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4555                 ixgbe_vlan_promisc_disable(adapter);
4556         else
4557                 ixgbe_vlan_promisc_enable(adapter);
4558 }
4559
4560 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4561 {
4562         int q_idx;
4563
4564         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4565                 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4566                 napi_enable(&adapter->q_vector[q_idx]->napi);
4567         }
4568 }
4569
4570 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4571 {
4572         int q_idx;
4573
4574         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4575                 napi_disable(&adapter->q_vector[q_idx]->napi);
4576                 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4577                         pr_info("QV %d locked\n", q_idx);
4578                         usleep_range(1000, 20000);
4579                 }
4580         }
4581 }
4582
4583 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter *adapter)
4584 {
4585         switch (adapter->hw.mac.type) {
4586         case ixgbe_mac_X550:
4587         case ixgbe_mac_X550EM_x:
4588         case ixgbe_mac_x550em_a:
4589                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VXLANCTRL, 0);
4590                 adapter->vxlan_port = 0;
4591                 break;
4592         default:
4593                 break;
4594         }
4595 }
4596
4597 #ifdef CONFIG_IXGBE_DCB
4598 /**
4599  * ixgbe_configure_dcb - Configure DCB hardware
4600  * @adapter: ixgbe adapter struct
4601  *
4602  * This is called by the driver on open to configure the DCB hardware.
4603  * This is also called by the gennetlink interface when reconfiguring
4604  * the DCB state.
4605  */
4606 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4607 {
4608         struct ixgbe_hw *hw = &adapter->hw;
4609         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4610
4611         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4612                 if (hw->mac.type == ixgbe_mac_82598EB)
4613                         netif_set_gso_max_size(adapter->netdev, 65536);
4614                 return;
4615         }
4616
4617         if (hw->mac.type == ixgbe_mac_82598EB)
4618                 netif_set_gso_max_size(adapter->netdev, 32768);
4619
4620 #ifdef IXGBE_FCOE
4621         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4622                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4623 #endif
4624
4625         /* reconfigure the hardware */
4626         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4627                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4628                                                 DCB_TX_CONFIG);
4629                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4630                                                 DCB_RX_CONFIG);
4631                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4632         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4633                 ixgbe_dcb_hw_ets(&adapter->hw,
4634                                  adapter->ixgbe_ieee_ets,
4635                                  max_frame);
4636                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4637                                         adapter->ixgbe_ieee_pfc->pfc_en,
4638                                         adapter->ixgbe_ieee_ets->prio_tc);
4639         }
4640
4641         /* Enable RSS Hash per TC */
4642         if (hw->mac.type != ixgbe_mac_82598EB) {
4643                 u32 msb = 0;
4644                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4645
4646                 while (rss_i) {
4647                         msb++;
4648                         rss_i >>= 1;
4649                 }
4650
4651                 /* write msb to all 8 TCs in one write */
4652                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4653         }
4654 }
4655 #endif
4656
4657 /* Additional bittime to account for IXGBE framing */
4658 #define IXGBE_ETH_FRAMING 20
4659
4660 /**
4661  * ixgbe_hpbthresh - calculate high water mark for flow control
4662  *
4663  * @adapter: board private structure to calculate for
4664  * @pb: packet buffer to calculate
4665  */
4666 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4667 {
4668         struct ixgbe_hw *hw = &adapter->hw;
4669         struct net_device *dev = adapter->netdev;
4670         int link, tc, kb, marker;
4671         u32 dv_id, rx_pba;
4672
4673         /* Calculate max LAN frame size */
4674         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4675
4676 #ifdef IXGBE_FCOE
4677         /* FCoE traffic class uses FCOE jumbo frames */
4678         if ((dev->features & NETIF_F_FCOE_MTU) &&
4679             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4680             (pb == ixgbe_fcoe_get_tc(adapter)))
4681                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4682 #endif
4683
4684         /* Calculate delay value for device */
4685         switch (hw->mac.type) {
4686         case ixgbe_mac_X540:
4687         case ixgbe_mac_X550:
4688         case ixgbe_mac_X550EM_x:
4689         case ixgbe_mac_x550em_a:
4690                 dv_id = IXGBE_DV_X540(link, tc);
4691                 break;
4692         default:
4693                 dv_id = IXGBE_DV(link, tc);
4694                 break;
4695         }
4696
4697         /* Loopback switch introduces additional latency */
4698         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4699                 dv_id += IXGBE_B2BT(tc);
4700
4701         /* Delay value is calculated in bit times convert to KB */
4702         kb = IXGBE_BT2KB(dv_id);
4703         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4704
4705         marker = rx_pba - kb;
4706
4707         /* It is possible that the packet buffer is not large enough
4708          * to provide required headroom. In this case throw an error
4709          * to user and a do the best we can.
4710          */
4711         if (marker < 0) {
4712                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4713                             "headroom to support flow control."
4714                             "Decrease MTU or number of traffic classes\n", pb);
4715                 marker = tc + 1;
4716         }
4717
4718         return marker;
4719 }
4720
4721 /**
4722  * ixgbe_lpbthresh - calculate low water mark for for flow control
4723  *
4724  * @adapter: board private structure to calculate for
4725  * @pb: packet buffer to calculate
4726  */
4727 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4728 {
4729         struct ixgbe_hw *hw = &adapter->hw;
4730         struct net_device *dev = adapter->netdev;
4731         int tc;
4732         u32 dv_id;
4733
4734         /* Calculate max LAN frame size */
4735         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4736
4737 #ifdef IXGBE_FCOE
4738         /* FCoE traffic class uses FCOE jumbo frames */
4739         if ((dev->features & NETIF_F_FCOE_MTU) &&
4740             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4741             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4742                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4743 #endif
4744
4745         /* Calculate delay value for device */
4746         switch (hw->mac.type) {
4747         case ixgbe_mac_X540:
4748         case ixgbe_mac_X550:
4749         case ixgbe_mac_X550EM_x:
4750         case ixgbe_mac_x550em_a:
4751                 dv_id = IXGBE_LOW_DV_X540(tc);
4752                 break;
4753         default:
4754                 dv_id = IXGBE_LOW_DV(tc);
4755                 break;
4756         }
4757
4758         /* Delay value is calculated in bit times convert to KB */
4759         return IXGBE_BT2KB(dv_id);
4760 }
4761
4762 /*
4763  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4764  */
4765 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4766 {
4767         struct ixgbe_hw *hw = &adapter->hw;
4768         int num_tc = netdev_get_num_tc(adapter->netdev);
4769         int i;
4770
4771         if (!num_tc)
4772                 num_tc = 1;
4773
4774         for (i = 0; i < num_tc; i++) {
4775                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4776                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4777
4778                 /* Low water marks must not be larger than high water marks */
4779                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4780                         hw->fc.low_water[i] = 0;
4781         }
4782
4783         for (; i < MAX_TRAFFIC_CLASS; i++)
4784                 hw->fc.high_water[i] = 0;
4785 }
4786
4787 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4788 {
4789         struct ixgbe_hw *hw = &adapter->hw;
4790         int hdrm;
4791         u8 tc = netdev_get_num_tc(adapter->netdev);
4792
4793         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4794             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4795                 hdrm = 32 << adapter->fdir_pballoc;
4796         else
4797                 hdrm = 0;
4798
4799         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4800         ixgbe_pbthresh_setup(adapter);
4801 }
4802
4803 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4804 {
4805         struct ixgbe_hw *hw = &adapter->hw;
4806         struct hlist_node *node2;
4807         struct ixgbe_fdir_filter *filter;
4808
4809         spin_lock(&adapter->fdir_perfect_lock);
4810
4811         if (!hlist_empty(&adapter->fdir_filter_list))
4812                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4813
4814         hlist_for_each_entry_safe(filter, node2,
4815                                   &adapter->fdir_filter_list, fdir_node) {
4816                 ixgbe_fdir_write_perfect_filter_82599(hw,
4817                                 &filter->filter,
4818                                 filter->sw_idx,
4819                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4820                                 IXGBE_FDIR_DROP_QUEUE :
4821                                 adapter->rx_ring[filter->action]->reg_idx);
4822         }
4823
4824         spin_unlock(&adapter->fdir_perfect_lock);
4825 }
4826
4827 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4828                                       struct ixgbe_adapter *adapter)
4829 {
4830         struct ixgbe_hw *hw = &adapter->hw;
4831         u32 vmolr;
4832
4833         /* No unicast promiscuous support for VMDQ devices. */
4834         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4835         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4836
4837         /* clear the affected bit */
4838         vmolr &= ~IXGBE_VMOLR_MPE;
4839
4840         if (dev->flags & IFF_ALLMULTI) {
4841                 vmolr |= IXGBE_VMOLR_MPE;
4842         } else {
4843                 vmolr |= IXGBE_VMOLR_ROMPE;
4844                 hw->mac.ops.update_mc_addr_list(hw, dev);
4845         }
4846         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4847         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4848 }
4849
4850 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4851 {
4852         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4853         int rss_i = adapter->num_rx_queues_per_pool;
4854         struct ixgbe_hw *hw = &adapter->hw;
4855         u16 pool = vadapter->pool;
4856         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4857                       IXGBE_PSRTYPE_UDPHDR |
4858                       IXGBE_PSRTYPE_IPV4HDR |
4859                       IXGBE_PSRTYPE_L2HDR |
4860                       IXGBE_PSRTYPE_IPV6HDR;
4861
4862         if (hw->mac.type == ixgbe_mac_82598EB)
4863                 return;
4864
4865         if (rss_i > 3)
4866                 psrtype |= 2u << 29;
4867         else if (rss_i > 1)
4868                 psrtype |= 1u << 29;
4869
4870         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4871 }
4872
4873 /**
4874  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4875  * @rx_ring: ring to free buffers from
4876  **/
4877 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4878 {
4879         struct device *dev = rx_ring->dev;
4880         unsigned long size;
4881         u16 i;
4882
4883         /* ring already cleared, nothing to do */
4884         if (!rx_ring->rx_buffer_info)
4885                 return;
4886
4887         /* Free all the Rx ring sk_buffs */
4888         for (i = 0; i < rx_ring->count; i++) {
4889                 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4890
4891                 if (rx_buffer->skb) {
4892                         struct sk_buff *skb = rx_buffer->skb;
4893                         if (IXGBE_CB(skb)->page_released)
4894                                 dma_unmap_page(dev,
4895                                                IXGBE_CB(skb)->dma,
4896                                                ixgbe_rx_bufsz(rx_ring),
4897                                                DMA_FROM_DEVICE);
4898                         dev_kfree_skb(skb);
4899                         rx_buffer->skb = NULL;
4900                 }
4901
4902                 if (!rx_buffer->page)
4903                         continue;
4904
4905                 dma_unmap_page(dev, rx_buffer->dma,
4906                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4907                 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4908
4909                 rx_buffer->page = NULL;
4910         }
4911
4912         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4913         memset(rx_ring->rx_buffer_info, 0, size);
4914
4915         /* Zero out the descriptor ring */
4916         memset(rx_ring->desc, 0, rx_ring->size);
4917
4918         rx_ring->next_to_alloc = 0;
4919         rx_ring->next_to_clean = 0;
4920         rx_ring->next_to_use = 0;
4921 }
4922
4923 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4924                                    struct ixgbe_ring *rx_ring)
4925 {
4926         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4927         int index = rx_ring->queue_index + vadapter->rx_base_queue;
4928
4929         /* shutdown specific queue receive and wait for dma to settle */
4930         ixgbe_disable_rx_queue(adapter, rx_ring);
4931         usleep_range(10000, 20000);
4932         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
4933         ixgbe_clean_rx_ring(rx_ring);
4934         rx_ring->l2_accel_priv = NULL;
4935 }
4936
4937 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4938                                struct ixgbe_fwd_adapter *accel)
4939 {
4940         struct ixgbe_adapter *adapter = accel->real_adapter;
4941         unsigned int rxbase = accel->rx_base_queue;
4942         unsigned int txbase = accel->tx_base_queue;
4943         int i;
4944
4945         netif_tx_stop_all_queues(vdev);
4946
4947         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4948                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4949                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4950         }
4951
4952         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4953                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4954                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4955         }
4956
4957
4958         return 0;
4959 }
4960
4961 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4962                              struct ixgbe_fwd_adapter *accel)
4963 {
4964         struct ixgbe_adapter *adapter = accel->real_adapter;
4965         unsigned int rxbase, txbase, queues;
4966         int i, baseq, err = 0;
4967
4968         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4969                 return 0;
4970
4971         baseq = accel->pool * adapter->num_rx_queues_per_pool;
4972         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4973                    accel->pool, adapter->num_rx_pools,
4974                    baseq, baseq + adapter->num_rx_queues_per_pool,
4975                    adapter->fwd_bitmask);
4976
4977         accel->netdev = vdev;
4978         accel->rx_base_queue = rxbase = baseq;
4979         accel->tx_base_queue = txbase = baseq;
4980
4981         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4982                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4983
4984         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4985                 adapter->rx_ring[rxbase + i]->netdev = vdev;
4986                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4987                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4988         }
4989
4990         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4991                 adapter->tx_ring[txbase + i]->netdev = vdev;
4992                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4993         }
4994
4995         queues = min_t(unsigned int,
4996                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4997         err = netif_set_real_num_tx_queues(vdev, queues);
4998         if (err)
4999                 goto fwd_queue_err;
5000
5001         err = netif_set_real_num_rx_queues(vdev, queues);
5002         if (err)
5003                 goto fwd_queue_err;
5004
5005         if (is_valid_ether_addr(vdev->dev_addr))
5006                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5007
5008         ixgbe_fwd_psrtype(accel);
5009         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5010         return err;
5011 fwd_queue_err:
5012         ixgbe_fwd_ring_down(vdev, accel);
5013         return err;
5014 }
5015
5016 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5017 {
5018         struct net_device *upper;
5019         struct list_head *iter;
5020         int err;
5021
5022         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5023                 if (netif_is_macvlan(upper)) {
5024                         struct macvlan_dev *dfwd = netdev_priv(upper);
5025                         struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5026
5027                         if (dfwd->fwd_priv) {
5028                                 err = ixgbe_fwd_ring_up(upper, vadapter);
5029                                 if (err)
5030                                         continue;
5031                         }
5032                 }
5033         }
5034 }
5035
5036 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5037 {
5038         struct ixgbe_hw *hw = &adapter->hw;
5039
5040         ixgbe_configure_pb(adapter);
5041 #ifdef CONFIG_IXGBE_DCB
5042         ixgbe_configure_dcb(adapter);
5043 #endif
5044         /*
5045          * We must restore virtualization before VLANs or else
5046          * the VLVF registers will not be populated
5047          */
5048         ixgbe_configure_virtualization(adapter);
5049
5050         ixgbe_set_rx_mode(adapter->netdev);
5051         ixgbe_restore_vlan(adapter);
5052
5053         switch (hw->mac.type) {
5054         case ixgbe_mac_82599EB:
5055         case ixgbe_mac_X540:
5056                 hw->mac.ops.disable_rx_buff(hw);
5057                 break;
5058         default:
5059                 break;
5060         }
5061
5062         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5063                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5064                                                 adapter->fdir_pballoc);
5065         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5066                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5067                                               adapter->fdir_pballoc);
5068                 ixgbe_fdir_filter_restore(adapter);
5069         }
5070
5071         switch (hw->mac.type) {
5072         case ixgbe_mac_82599EB:
5073         case ixgbe_mac_X540:
5074                 hw->mac.ops.enable_rx_buff(hw);
5075                 break;
5076         default:
5077                 break;
5078         }
5079
5080 #ifdef CONFIG_IXGBE_DCA
5081         /* configure DCA */
5082         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5083                 ixgbe_setup_dca(adapter);
5084 #endif /* CONFIG_IXGBE_DCA */
5085
5086 #ifdef IXGBE_FCOE
5087         /* configure FCoE L2 filters, redirection table, and Rx control */
5088         ixgbe_configure_fcoe(adapter);
5089
5090 #endif /* IXGBE_FCOE */
5091         ixgbe_configure_tx(adapter);
5092         ixgbe_configure_rx(adapter);
5093         ixgbe_configure_dfwd(adapter);
5094 }
5095
5096 /**
5097  * ixgbe_sfp_link_config - set up SFP+ link
5098  * @adapter: pointer to private adapter struct
5099  **/
5100 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5101 {
5102         /*
5103          * We are assuming the worst case scenario here, and that
5104          * is that an SFP was inserted/removed after the reset
5105          * but before SFP detection was enabled.  As such the best
5106          * solution is to just start searching as soon as we start
5107          */
5108         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5109                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5110
5111         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5112         adapter->sfp_poll_time = 0;
5113 }
5114
5115 /**
5116  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5117  * @hw: pointer to private hardware struct
5118  *
5119  * Returns 0 on success, negative on failure
5120  **/
5121 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5122 {
5123         u32 speed;
5124         bool autoneg, link_up = false;
5125         int ret = IXGBE_ERR_LINK_SETUP;
5126
5127         if (hw->mac.ops.check_link)
5128                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5129
5130         if (ret)
5131                 return ret;
5132
5133         speed = hw->phy.autoneg_advertised;
5134         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5135                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5136                                                         &autoneg);
5137         if (ret)
5138                 return ret;
5139
5140         if (hw->mac.ops.setup_link)
5141                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5142
5143         return ret;
5144 }
5145
5146 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5147 {
5148         struct ixgbe_hw *hw = &adapter->hw;
5149         u32 gpie = 0;
5150
5151         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5152                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5153                        IXGBE_GPIE_OCD;
5154                 gpie |= IXGBE_GPIE_EIAME;
5155                 /*
5156                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5157                  * this saves a register write for every interrupt
5158                  */
5159                 switch (hw->mac.type) {
5160                 case ixgbe_mac_82598EB:
5161                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5162                         break;
5163                 case ixgbe_mac_82599EB:
5164                 case ixgbe_mac_X540:
5165                 case ixgbe_mac_X550:
5166                 case ixgbe_mac_X550EM_x:
5167                 case ixgbe_mac_x550em_a:
5168                 default:
5169                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5170                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5171                         break;
5172                 }
5173         } else {
5174                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5175                  * specifically only auto mask tx and rx interrupts */
5176                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5177         }
5178
5179         /* XXX: to interrupt immediately for EICS writes, enable this */
5180         /* gpie |= IXGBE_GPIE_EIMEN; */
5181
5182         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5183                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5184
5185                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5186                 case IXGBE_82599_VMDQ_8Q_MASK:
5187                         gpie |= IXGBE_GPIE_VTMODE_16;
5188                         break;
5189                 case IXGBE_82599_VMDQ_4Q_MASK:
5190                         gpie |= IXGBE_GPIE_VTMODE_32;
5191                         break;
5192                 default:
5193                         gpie |= IXGBE_GPIE_VTMODE_64;
5194                         break;
5195                 }
5196         }
5197
5198         /* Enable Thermal over heat sensor interrupt */
5199         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5200                 switch (adapter->hw.mac.type) {
5201                 case ixgbe_mac_82599EB:
5202                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5203                         break;
5204                 default:
5205                         break;
5206                 }
5207         }
5208
5209         /* Enable fan failure interrupt */
5210         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5211                 gpie |= IXGBE_SDP1_GPIEN(hw);
5212
5213         switch (hw->mac.type) {
5214         case ixgbe_mac_82599EB:
5215                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5216                 break;
5217         case ixgbe_mac_X550EM_x:
5218         case ixgbe_mac_x550em_a:
5219                 gpie |= IXGBE_SDP0_GPIEN_X540;
5220                 break;
5221         default:
5222                 break;
5223         }
5224
5225         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5226 }
5227
5228 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5229 {
5230         struct ixgbe_hw *hw = &adapter->hw;
5231         int err;
5232         u32 ctrl_ext;
5233
5234         ixgbe_get_hw_control(adapter);
5235         ixgbe_setup_gpie(adapter);
5236
5237         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5238                 ixgbe_configure_msix(adapter);
5239         else
5240                 ixgbe_configure_msi_and_legacy(adapter);
5241
5242         /* enable the optics for 82599 SFP+ fiber */
5243         if (hw->mac.ops.enable_tx_laser)
5244                 hw->mac.ops.enable_tx_laser(hw);
5245
5246         if (hw->phy.ops.set_phy_power)
5247                 hw->phy.ops.set_phy_power(hw, true);
5248
5249         smp_mb__before_atomic();
5250         clear_bit(__IXGBE_DOWN, &adapter->state);
5251         ixgbe_napi_enable_all(adapter);
5252
5253         if (ixgbe_is_sfp(hw)) {
5254                 ixgbe_sfp_link_config(adapter);
5255         } else {
5256                 err = ixgbe_non_sfp_link_config(hw);
5257                 if (err)
5258                         e_err(probe, "link_config FAILED %d\n", err);
5259         }
5260
5261         /* clear any pending interrupts, may auto mask */
5262         IXGBE_READ_REG(hw, IXGBE_EICR);
5263         ixgbe_irq_enable(adapter, true, true);
5264
5265         /*
5266          * If this adapter has a fan, check to see if we had a failure
5267          * before we enabled the interrupt.
5268          */
5269         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5270                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5271                 if (esdp & IXGBE_ESDP_SDP1)
5272                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5273         }
5274
5275         /* bring the link up in the watchdog, this could race with our first
5276          * link up interrupt but shouldn't be a problem */
5277         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5278         adapter->link_check_timeout = jiffies;
5279         mod_timer(&adapter->service_timer, jiffies);
5280
5281         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5282         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5283         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5284         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5285 }
5286
5287 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5288 {
5289         WARN_ON(in_interrupt());
5290         /* put off any impending NetWatchDogTimeout */
5291         adapter->netdev->trans_start = jiffies;
5292
5293         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5294                 usleep_range(1000, 2000);
5295         ixgbe_down(adapter);
5296         /*
5297          * If SR-IOV enabled then wait a bit before bringing the adapter
5298          * back up to give the VFs time to respond to the reset.  The
5299          * two second wait is based upon the watchdog timer cycle in
5300          * the VF driver.
5301          */
5302         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5303                 msleep(2000);
5304         ixgbe_up(adapter);
5305         clear_bit(__IXGBE_RESETTING, &adapter->state);
5306 }
5307
5308 void ixgbe_up(struct ixgbe_adapter *adapter)
5309 {
5310         /* hardware has been reset, we need to reload some things */
5311         ixgbe_configure(adapter);
5312
5313         ixgbe_up_complete(adapter);
5314 }
5315
5316 void ixgbe_reset(struct ixgbe_adapter *adapter)
5317 {
5318         struct ixgbe_hw *hw = &adapter->hw;
5319         struct net_device *netdev = adapter->netdev;
5320         int err;
5321
5322         if (ixgbe_removed(hw->hw_addr))
5323                 return;
5324         /* lock SFP init bit to prevent race conditions with the watchdog */
5325         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5326                 usleep_range(1000, 2000);
5327
5328         /* clear all SFP and link config related flags while holding SFP_INIT */
5329         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5330                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5331         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5332
5333         err = hw->mac.ops.init_hw(hw);
5334         switch (err) {
5335         case 0:
5336         case IXGBE_ERR_SFP_NOT_PRESENT:
5337         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5338                 break;
5339         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5340                 e_dev_err("master disable timed out\n");
5341                 break;
5342         case IXGBE_ERR_EEPROM_VERSION:
5343                 /* We are running on a pre-production device, log a warning */
5344                 e_dev_warn("This device is a pre-production adapter/LOM. "
5345                            "Please be aware there may be issues associated with "
5346                            "your hardware.  If you are experiencing problems "
5347                            "please contact your Intel or hardware "
5348                            "representative who provided you with this "
5349                            "hardware.\n");
5350                 break;
5351         default:
5352                 e_dev_err("Hardware Error: %d\n", err);
5353         }
5354
5355         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5356
5357         /* flush entries out of MAC table */
5358         ixgbe_flush_sw_mac_table(adapter);
5359         __dev_uc_unsync(netdev, NULL);
5360
5361         /* do not flush user set addresses */
5362         ixgbe_mac_set_default_filter(adapter);
5363
5364         /* update SAN MAC vmdq pool selection */
5365         if (hw->mac.san_mac_rar_index)
5366                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5367
5368         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5369                 ixgbe_ptp_reset(adapter);
5370
5371         if (hw->phy.ops.set_phy_power) {
5372                 if (!netif_running(adapter->netdev) && !adapter->wol)
5373                         hw->phy.ops.set_phy_power(hw, false);
5374                 else
5375                         hw->phy.ops.set_phy_power(hw, true);
5376         }
5377 }
5378
5379 /**
5380  * ixgbe_clean_tx_ring - Free Tx Buffers
5381  * @tx_ring: ring to be cleaned
5382  **/
5383 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5384 {
5385         struct ixgbe_tx_buffer *tx_buffer_info;
5386         unsigned long size;
5387         u16 i;
5388
5389         /* ring already cleared, nothing to do */
5390         if (!tx_ring->tx_buffer_info)
5391                 return;
5392
5393         /* Free all the Tx ring sk_buffs */
5394         for (i = 0; i < tx_ring->count; i++) {
5395                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5396                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5397         }
5398
5399         netdev_tx_reset_queue(txring_txq(tx_ring));
5400
5401         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5402         memset(tx_ring->tx_buffer_info, 0, size);
5403
5404         /* Zero out the descriptor ring */
5405         memset(tx_ring->desc, 0, tx_ring->size);
5406
5407         tx_ring->next_to_use = 0;
5408         tx_ring->next_to_clean = 0;
5409 }
5410
5411 /**
5412  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5413  * @adapter: board private structure
5414  **/
5415 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5416 {
5417         int i;
5418
5419         for (i = 0; i < adapter->num_rx_queues; i++)
5420                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5421 }
5422
5423 /**
5424  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5425  * @adapter: board private structure
5426  **/
5427 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5428 {
5429         int i;
5430
5431         for (i = 0; i < adapter->num_tx_queues; i++)
5432                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5433 }
5434
5435 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5436 {
5437         struct hlist_node *node2;
5438         struct ixgbe_fdir_filter *filter;
5439
5440         spin_lock(&adapter->fdir_perfect_lock);
5441
5442         hlist_for_each_entry_safe(filter, node2,
5443                                   &adapter->fdir_filter_list, fdir_node) {
5444                 hlist_del(&filter->fdir_node);
5445                 kfree(filter);
5446         }
5447         adapter->fdir_filter_count = 0;
5448
5449         spin_unlock(&adapter->fdir_perfect_lock);
5450 }
5451
5452 void ixgbe_down(struct ixgbe_adapter *adapter)
5453 {
5454         struct net_device *netdev = adapter->netdev;
5455         struct ixgbe_hw *hw = &adapter->hw;
5456         struct net_device *upper;
5457         struct list_head *iter;
5458         int i;
5459
5460         /* signal that we are down to the interrupt handler */
5461         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5462                 return; /* do nothing if already down */
5463
5464         /* disable receives */
5465         hw->mac.ops.disable_rx(hw);
5466
5467         /* disable all enabled rx queues */
5468         for (i = 0; i < adapter->num_rx_queues; i++)
5469                 /* this call also flushes the previous write */
5470                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5471
5472         usleep_range(10000, 20000);
5473
5474         netif_tx_stop_all_queues(netdev);
5475
5476         /* call carrier off first to avoid false dev_watchdog timeouts */
5477         netif_carrier_off(netdev);
5478         netif_tx_disable(netdev);
5479
5480         /* disable any upper devices */
5481         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5482                 if (netif_is_macvlan(upper)) {
5483                         struct macvlan_dev *vlan = netdev_priv(upper);
5484
5485                         if (vlan->fwd_priv) {
5486                                 netif_tx_stop_all_queues(upper);
5487                                 netif_carrier_off(upper);
5488                                 netif_tx_disable(upper);
5489                         }
5490                 }
5491         }
5492
5493         ixgbe_irq_disable(adapter);
5494
5495         ixgbe_napi_disable_all(adapter);
5496
5497         adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5498                              IXGBE_FLAG2_RESET_REQUESTED);
5499         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5500
5501         del_timer_sync(&adapter->service_timer);
5502
5503         if (adapter->num_vfs) {
5504                 /* Clear EITR Select mapping */
5505                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5506
5507                 /* Mark all the VFs as inactive */
5508                 for (i = 0 ; i < adapter->num_vfs; i++)
5509                         adapter->vfinfo[i].clear_to_send = false;
5510
5511                 /* ping all the active vfs to let them know we are going down */
5512                 ixgbe_ping_all_vfs(adapter);
5513
5514                 /* Disable all VFTE/VFRE TX/RX */
5515                 ixgbe_disable_tx_rx(adapter);
5516         }
5517
5518         /* disable transmits in the hardware now that interrupts are off */
5519         for (i = 0; i < adapter->num_tx_queues; i++) {
5520                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5521                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5522         }
5523
5524         /* Disable the Tx DMA engine on 82599 and later MAC */
5525         switch (hw->mac.type) {
5526         case ixgbe_mac_82599EB:
5527         case ixgbe_mac_X540:
5528         case ixgbe_mac_X550:
5529         case ixgbe_mac_X550EM_x:
5530         case ixgbe_mac_x550em_a:
5531                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5532                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5533                                  ~IXGBE_DMATXCTL_TE));
5534                 break;
5535         default:
5536                 break;
5537         }
5538
5539         if (!pci_channel_offline(adapter->pdev))
5540                 ixgbe_reset(adapter);
5541
5542         /* power down the optics for 82599 SFP+ fiber */
5543         if (hw->mac.ops.disable_tx_laser)
5544                 hw->mac.ops.disable_tx_laser(hw);
5545
5546         ixgbe_clean_all_tx_rings(adapter);
5547         ixgbe_clean_all_rx_rings(adapter);
5548 }
5549
5550 /**
5551  * ixgbe_tx_timeout - Respond to a Tx Hang
5552  * @netdev: network interface device structure
5553  **/
5554 static void ixgbe_tx_timeout(struct net_device *netdev)
5555 {
5556         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5557
5558         /* Do the reset outside of interrupt context */
5559         ixgbe_tx_timeout_reset(adapter);
5560 }
5561
5562 /**
5563  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5564  * @adapter: board private structure to initialize
5565  *
5566  * ixgbe_sw_init initializes the Adapter private data structure.
5567  * Fields are initialized based on PCI device information and
5568  * OS network device settings (MTU size).
5569  **/
5570 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5571 {
5572         struct ixgbe_hw *hw = &adapter->hw;
5573         struct pci_dev *pdev = adapter->pdev;
5574         unsigned int rss, fdir;
5575         u32 fwsm;
5576         u16 device_caps;
5577         int i;
5578 #ifdef CONFIG_IXGBE_DCB
5579         int j;
5580         struct tc_configuration *tc;
5581 #endif
5582
5583         /* PCI config space info */
5584
5585         hw->vendor_id = pdev->vendor;
5586         hw->device_id = pdev->device;
5587         hw->revision_id = pdev->revision;
5588         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5589         hw->subsystem_device_id = pdev->subsystem_device;
5590
5591         /* Set common capability flags and settings */
5592         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5593         adapter->ring_feature[RING_F_RSS].limit = rss;
5594         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5595         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5596         adapter->atr_sample_rate = 20;
5597         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5598         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5599         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5600 #ifdef CONFIG_IXGBE_DCA
5601         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5602 #endif
5603 #ifdef IXGBE_FCOE
5604         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5605         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5606 #ifdef CONFIG_IXGBE_DCB
5607         /* Default traffic class to use for FCoE */
5608         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5609 #endif /* CONFIG_IXGBE_DCB */
5610 #endif /* IXGBE_FCOE */
5611
5612         /* initialize static ixgbe jump table entries */
5613         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
5614                                           GFP_KERNEL);
5615         if (!adapter->jump_tables[0])
5616                 return -ENOMEM;
5617         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
5618
5619         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
5620                 adapter->jump_tables[i] = NULL;
5621
5622         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5623                                      hw->mac.num_rar_entries,
5624                                      GFP_ATOMIC);
5625         if (!adapter->mac_table)
5626                 return -ENOMEM;
5627
5628         /* Set MAC specific capability flags and exceptions */
5629         switch (hw->mac.type) {
5630         case ixgbe_mac_82598EB:
5631                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5632
5633                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5634                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5635
5636                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5637                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5638                 adapter->atr_sample_rate = 0;
5639                 adapter->fdir_pballoc = 0;
5640 #ifdef IXGBE_FCOE
5641                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5642                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5643 #ifdef CONFIG_IXGBE_DCB
5644                 adapter->fcoe.up = 0;
5645 #endif /* IXGBE_DCB */
5646 #endif /* IXGBE_FCOE */
5647                 break;
5648         case ixgbe_mac_82599EB:
5649                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5650                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5651                 break;
5652         case ixgbe_mac_X540:
5653                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5654                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5655                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5656                 break;
5657         case ixgbe_mac_X550EM_x:
5658         case ixgbe_mac_x550em_a:
5659         case ixgbe_mac_X550:
5660 #ifdef CONFIG_IXGBE_DCA
5661                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5662 #endif
5663 #ifdef CONFIG_IXGBE_VXLAN
5664                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5665 #endif
5666                 break;
5667         default:
5668                 break;
5669         }
5670
5671 #ifdef IXGBE_FCOE
5672         /* FCoE support exists, always init the FCoE lock */
5673         spin_lock_init(&adapter->fcoe.lock);
5674
5675 #endif
5676         /* n-tuple support exists, always init our spinlock */
5677         spin_lock_init(&adapter->fdir_perfect_lock);
5678
5679 #ifdef CONFIG_IXGBE_DCB
5680         switch (hw->mac.type) {
5681         case ixgbe_mac_X540:
5682         case ixgbe_mac_X550:
5683         case ixgbe_mac_X550EM_x:
5684         case ixgbe_mac_x550em_a:
5685                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5686                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5687                 break;
5688         default:
5689                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5690                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5691                 break;
5692         }
5693
5694         /* Configure DCB traffic classes */
5695         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5696                 tc = &adapter->dcb_cfg.tc_config[j];
5697                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5698                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5699                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5700                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5701                 tc->dcb_pfc = pfc_disabled;
5702         }
5703
5704         /* Initialize default user to priority mapping, UPx->TC0 */
5705         tc = &adapter->dcb_cfg.tc_config[0];
5706         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5707         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5708
5709         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5710         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5711         adapter->dcb_cfg.pfc_mode_enable = false;
5712         adapter->dcb_set_bitmap = 0x00;
5713         adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5714         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5715                sizeof(adapter->temp_dcb_cfg));
5716
5717 #endif
5718
5719         /* default flow control settings */
5720         hw->fc.requested_mode = ixgbe_fc_full;
5721         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5722         ixgbe_pbthresh_setup(adapter);
5723         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5724         hw->fc.send_xon = true;
5725         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5726
5727 #ifdef CONFIG_PCI_IOV
5728         if (max_vfs > 0)
5729                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5730
5731         /* assign number of SR-IOV VFs */
5732         if (hw->mac.type != ixgbe_mac_82598EB) {
5733                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5734                         adapter->num_vfs = 0;
5735                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5736                 } else {
5737                         adapter->num_vfs = max_vfs;
5738                 }
5739         }
5740 #endif /* CONFIG_PCI_IOV */
5741
5742         /* enable itr by default in dynamic mode */
5743         adapter->rx_itr_setting = 1;
5744         adapter->tx_itr_setting = 1;
5745
5746         /* set default ring sizes */
5747         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5748         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5749
5750         /* Cache bit indicating need for crosstalk fix */
5751         switch (hw->mac.type) {
5752         case ixgbe_mac_82599EB:
5753         case ixgbe_mac_X550EM_x:
5754         case ixgbe_mac_x550em_a:
5755                 hw->mac.ops.get_device_caps(hw, &device_caps);
5756                 if (device_caps & IXGBE_DEVICE_CAPS_NO_CROSSTALK_WR)
5757                         adapter->need_crosstalk_fix = false;
5758                 else
5759                         adapter->need_crosstalk_fix = true;
5760                 break;
5761         default:
5762                 adapter->need_crosstalk_fix = false;
5763                 break;
5764         }
5765
5766         /* set default work limits */
5767         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5768
5769         /* initialize eeprom parameters */
5770         if (ixgbe_init_eeprom_params_generic(hw)) {
5771                 e_dev_err("EEPROM initialization failed\n");
5772                 return -EIO;
5773         }
5774
5775         /* PF holds first pool slot */
5776         set_bit(0, &adapter->fwd_bitmask);
5777         set_bit(__IXGBE_DOWN, &adapter->state);
5778
5779         return 0;
5780 }
5781
5782 /**
5783  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5784  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5785  *
5786  * Return 0 on success, negative on failure
5787  **/
5788 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5789 {
5790         struct device *dev = tx_ring->dev;
5791         int orig_node = dev_to_node(dev);
5792         int ring_node = -1;
5793         int size;
5794
5795         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5796
5797         if (tx_ring->q_vector)
5798                 ring_node = tx_ring->q_vector->numa_node;
5799
5800         tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5801         if (!tx_ring->tx_buffer_info)
5802                 tx_ring->tx_buffer_info = vzalloc(size);
5803         if (!tx_ring->tx_buffer_info)
5804                 goto err;
5805
5806         u64_stats_init(&tx_ring->syncp);
5807
5808         /* round up to nearest 4K */
5809         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5810         tx_ring->size = ALIGN(tx_ring->size, 4096);
5811
5812         set_dev_node(dev, ring_node);
5813         tx_ring->desc = dma_alloc_coherent(dev,
5814                                            tx_ring->size,
5815                                            &tx_ring->dma,
5816                                            GFP_KERNEL);
5817         set_dev_node(dev, orig_node);
5818         if (!tx_ring->desc)
5819                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5820                                                    &tx_ring->dma, GFP_KERNEL);
5821         if (!tx_ring->desc)
5822                 goto err;
5823
5824         tx_ring->next_to_use = 0;
5825         tx_ring->next_to_clean = 0;
5826         return 0;
5827
5828 err:
5829         vfree(tx_ring->tx_buffer_info);
5830         tx_ring->tx_buffer_info = NULL;
5831         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5832         return -ENOMEM;
5833 }
5834
5835 /**
5836  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5837  * @adapter: board private structure
5838  *
5839  * If this function returns with an error, then it's possible one or
5840  * more of the rings is populated (while the rest are not).  It is the
5841  * callers duty to clean those orphaned rings.
5842  *
5843  * Return 0 on success, negative on failure
5844  **/
5845 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5846 {
5847         int i, err = 0;
5848
5849         for (i = 0; i < adapter->num_tx_queues; i++) {
5850                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5851                 if (!err)
5852                         continue;
5853
5854                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5855                 goto err_setup_tx;
5856         }
5857
5858         return 0;
5859 err_setup_tx:
5860         /* rewind the index freeing the rings as we go */
5861         while (i--)
5862                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5863         return err;
5864 }
5865
5866 /**
5867  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5868  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
5869  *
5870  * Returns 0 on success, negative on failure
5871  **/
5872 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5873 {
5874         struct device *dev = rx_ring->dev;
5875         int orig_node = dev_to_node(dev);
5876         int ring_node = -1;
5877         int size;
5878
5879         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5880
5881         if (rx_ring->q_vector)
5882                 ring_node = rx_ring->q_vector->numa_node;
5883
5884         rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5885         if (!rx_ring->rx_buffer_info)
5886                 rx_ring->rx_buffer_info = vzalloc(size);
5887         if (!rx_ring->rx_buffer_info)
5888                 goto err;
5889
5890         u64_stats_init(&rx_ring->syncp);
5891
5892         /* Round up to nearest 4K */
5893         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5894         rx_ring->size = ALIGN(rx_ring->size, 4096);
5895
5896         set_dev_node(dev, ring_node);
5897         rx_ring->desc = dma_alloc_coherent(dev,
5898                                            rx_ring->size,
5899                                            &rx_ring->dma,
5900                                            GFP_KERNEL);
5901         set_dev_node(dev, orig_node);
5902         if (!rx_ring->desc)
5903                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5904                                                    &rx_ring->dma, GFP_KERNEL);
5905         if (!rx_ring->desc)
5906                 goto err;
5907
5908         rx_ring->next_to_clean = 0;
5909         rx_ring->next_to_use = 0;
5910
5911         return 0;
5912 err:
5913         vfree(rx_ring->rx_buffer_info);
5914         rx_ring->rx_buffer_info = NULL;
5915         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5916         return -ENOMEM;
5917 }
5918
5919 /**
5920  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5921  * @adapter: board private structure
5922  *
5923  * If this function returns with an error, then it's possible one or
5924  * more of the rings is populated (while the rest are not).  It is the
5925  * callers duty to clean those orphaned rings.
5926  *
5927  * Return 0 on success, negative on failure
5928  **/
5929 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5930 {
5931         int i, err = 0;
5932
5933         for (i = 0; i < adapter->num_rx_queues; i++) {
5934                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5935                 if (!err)
5936                         continue;
5937
5938                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5939                 goto err_setup_rx;
5940         }
5941
5942 #ifdef IXGBE_FCOE
5943         err = ixgbe_setup_fcoe_ddp_resources(adapter);
5944         if (!err)
5945 #endif
5946                 return 0;
5947 err_setup_rx:
5948         /* rewind the index freeing the rings as we go */
5949         while (i--)
5950                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5951         return err;
5952 }
5953
5954 /**
5955  * ixgbe_free_tx_resources - Free Tx Resources per Queue
5956  * @tx_ring: Tx descriptor ring for a specific queue
5957  *
5958  * Free all transmit software resources
5959  **/
5960 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5961 {
5962         ixgbe_clean_tx_ring(tx_ring);
5963
5964         vfree(tx_ring->tx_buffer_info);
5965         tx_ring->tx_buffer_info = NULL;
5966
5967         /* if not set, then don't free */
5968         if (!tx_ring->desc)
5969                 return;
5970
5971         dma_free_coherent(tx_ring->dev, tx_ring->size,
5972                           tx_ring->desc, tx_ring->dma);
5973
5974         tx_ring->desc = NULL;
5975 }
5976
5977 /**
5978  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5979  * @adapter: board private structure
5980  *
5981  * Free all transmit software resources
5982  **/
5983 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5984 {
5985         int i;
5986
5987         for (i = 0; i < adapter->num_tx_queues; i++)
5988                 if (adapter->tx_ring[i]->desc)
5989                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
5990 }
5991
5992 /**
5993  * ixgbe_free_rx_resources - Free Rx Resources
5994  * @rx_ring: ring to clean the resources from
5995  *
5996  * Free all receive software resources
5997  **/
5998 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5999 {
6000         ixgbe_clean_rx_ring(rx_ring);
6001
6002         vfree(rx_ring->rx_buffer_info);
6003         rx_ring->rx_buffer_info = NULL;
6004
6005         /* if not set, then don't free */
6006         if (!rx_ring->desc)
6007                 return;
6008
6009         dma_free_coherent(rx_ring->dev, rx_ring->size,
6010                           rx_ring->desc, rx_ring->dma);
6011
6012         rx_ring->desc = NULL;
6013 }
6014
6015 /**
6016  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6017  * @adapter: board private structure
6018  *
6019  * Free all receive software resources
6020  **/
6021 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6022 {
6023         int i;
6024
6025 #ifdef IXGBE_FCOE
6026         ixgbe_free_fcoe_ddp_resources(adapter);
6027
6028 #endif
6029         for (i = 0; i < adapter->num_rx_queues; i++)
6030                 if (adapter->rx_ring[i]->desc)
6031                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6032 }
6033
6034 /**
6035  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6036  * @netdev: network interface device structure
6037  * @new_mtu: new value for maximum frame size
6038  *
6039  * Returns 0 on success, negative on failure
6040  **/
6041 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6042 {
6043         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6044         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
6045
6046         /* MTU < 68 is an error and causes problems on some kernels */
6047         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
6048                 return -EINVAL;
6049
6050         /*
6051          * For 82599EB we cannot allow legacy VFs to enable their receive
6052          * paths when MTU greater than 1500 is configured.  So display a
6053          * warning that legacy VFs will be disabled.
6054          */
6055         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6056             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6057             (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
6058                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6059
6060         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6061
6062         /* must set new MTU before calling down or up */
6063         netdev->mtu = new_mtu;
6064
6065         if (netif_running(netdev))
6066                 ixgbe_reinit_locked(adapter);
6067
6068         return 0;
6069 }
6070
6071 /**
6072  * ixgbe_open - Called when a network interface is made active
6073  * @netdev: network interface device structure
6074  *
6075  * Returns 0 on success, negative value on failure
6076  *
6077  * The open entry point is called when a network interface is made
6078  * active by the system (IFF_UP).  At this point all resources needed
6079  * for transmit and receive operations are allocated, the interrupt
6080  * handler is registered with the OS, the watchdog timer is started,
6081  * and the stack is notified that the interface is ready.
6082  **/
6083 int ixgbe_open(struct net_device *netdev)
6084 {
6085         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6086         struct ixgbe_hw *hw = &adapter->hw;
6087         int err, queues;
6088
6089         /* disallow open during test */
6090         if (test_bit(__IXGBE_TESTING, &adapter->state))
6091                 return -EBUSY;
6092
6093         netif_carrier_off(netdev);
6094
6095         /* allocate transmit descriptors */
6096         err = ixgbe_setup_all_tx_resources(adapter);
6097         if (err)
6098                 goto err_setup_tx;
6099
6100         /* allocate receive descriptors */
6101         err = ixgbe_setup_all_rx_resources(adapter);
6102         if (err)
6103                 goto err_setup_rx;
6104
6105         ixgbe_configure(adapter);
6106
6107         err = ixgbe_request_irq(adapter);
6108         if (err)
6109                 goto err_req_irq;
6110
6111         /* Notify the stack of the actual queue counts. */
6112         if (adapter->num_rx_pools > 1)
6113                 queues = adapter->num_rx_queues_per_pool;
6114         else
6115                 queues = adapter->num_tx_queues;
6116
6117         err = netif_set_real_num_tx_queues(netdev, queues);
6118         if (err)
6119                 goto err_set_queues;
6120
6121         if (adapter->num_rx_pools > 1 &&
6122             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6123                 queues = IXGBE_MAX_L2A_QUEUES;
6124         else
6125                 queues = adapter->num_rx_queues;
6126         err = netif_set_real_num_rx_queues(netdev, queues);
6127         if (err)
6128                 goto err_set_queues;
6129
6130         ixgbe_ptp_init(adapter);
6131
6132         ixgbe_up_complete(adapter);
6133
6134         ixgbe_clear_vxlan_port(adapter);
6135 #ifdef CONFIG_IXGBE_VXLAN
6136         vxlan_get_rx_port(netdev);
6137 #endif
6138
6139         return 0;
6140
6141 err_set_queues:
6142         ixgbe_free_irq(adapter);
6143 err_req_irq:
6144         ixgbe_free_all_rx_resources(adapter);
6145         if (hw->phy.ops.set_phy_power && !adapter->wol)
6146                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6147 err_setup_rx:
6148         ixgbe_free_all_tx_resources(adapter);
6149 err_setup_tx:
6150         ixgbe_reset(adapter);
6151
6152         return err;
6153 }
6154
6155 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6156 {
6157         ixgbe_ptp_suspend(adapter);
6158
6159         if (adapter->hw.phy.ops.enter_lplu) {
6160                 adapter->hw.phy.reset_disable = true;
6161                 ixgbe_down(adapter);
6162                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6163                 adapter->hw.phy.reset_disable = false;
6164         } else {
6165                 ixgbe_down(adapter);
6166         }
6167
6168         ixgbe_free_irq(adapter);
6169
6170         ixgbe_free_all_tx_resources(adapter);
6171         ixgbe_free_all_rx_resources(adapter);
6172 }
6173
6174 /**
6175  * ixgbe_close - Disables a network interface
6176  * @netdev: network interface device structure
6177  *
6178  * Returns 0, this is not allowed to fail
6179  *
6180  * The close entry point is called when an interface is de-activated
6181  * by the OS.  The hardware is still under the drivers control, but
6182  * needs to be disabled.  A global MAC reset is issued to stop the
6183  * hardware, and all transmit and receive resources are freed.
6184  **/
6185 int ixgbe_close(struct net_device *netdev)
6186 {
6187         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6188
6189         ixgbe_ptp_stop(adapter);
6190
6191         ixgbe_close_suspend(adapter);
6192
6193         ixgbe_fdir_filter_exit(adapter);
6194
6195         ixgbe_release_hw_control(adapter);
6196
6197         return 0;
6198 }
6199
6200 #ifdef CONFIG_PM
6201 static int ixgbe_resume(struct pci_dev *pdev)
6202 {
6203         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6204         struct net_device *netdev = adapter->netdev;
6205         u32 err;
6206
6207         adapter->hw.hw_addr = adapter->io_addr;
6208         pci_set_power_state(pdev, PCI_D0);
6209         pci_restore_state(pdev);
6210         /*
6211          * pci_restore_state clears dev->state_saved so call
6212          * pci_save_state to restore it.
6213          */
6214         pci_save_state(pdev);
6215
6216         err = pci_enable_device_mem(pdev);
6217         if (err) {
6218                 e_dev_err("Cannot enable PCI device from suspend\n");
6219                 return err;
6220         }
6221         smp_mb__before_atomic();
6222         clear_bit(__IXGBE_DISABLED, &adapter->state);
6223         pci_set_master(pdev);
6224
6225         pci_wake_from_d3(pdev, false);
6226
6227         ixgbe_reset(adapter);
6228
6229         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6230
6231         rtnl_lock();
6232         err = ixgbe_init_interrupt_scheme(adapter);
6233         if (!err && netif_running(netdev))
6234                 err = ixgbe_open(netdev);
6235
6236         rtnl_unlock();
6237
6238         if (err)
6239                 return err;
6240
6241         netif_device_attach(netdev);
6242
6243         return 0;
6244 }
6245 #endif /* CONFIG_PM */
6246
6247 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6248 {
6249         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6250         struct net_device *netdev = adapter->netdev;
6251         struct ixgbe_hw *hw = &adapter->hw;
6252         u32 ctrl, fctrl;
6253         u32 wufc = adapter->wol;
6254 #ifdef CONFIG_PM
6255         int retval = 0;
6256 #endif
6257
6258         netif_device_detach(netdev);
6259
6260         rtnl_lock();
6261         if (netif_running(netdev))
6262                 ixgbe_close_suspend(adapter);
6263         rtnl_unlock();
6264
6265         ixgbe_clear_interrupt_scheme(adapter);
6266
6267 #ifdef CONFIG_PM
6268         retval = pci_save_state(pdev);
6269         if (retval)
6270                 return retval;
6271
6272 #endif
6273         if (hw->mac.ops.stop_link_on_d3)
6274                 hw->mac.ops.stop_link_on_d3(hw);
6275
6276         if (wufc) {
6277                 ixgbe_set_rx_mode(netdev);
6278
6279                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6280                 if (hw->mac.ops.enable_tx_laser)
6281                         hw->mac.ops.enable_tx_laser(hw);
6282
6283                 /* turn on all-multi mode if wake on multicast is enabled */
6284                 if (wufc & IXGBE_WUFC_MC) {
6285                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6286                         fctrl |= IXGBE_FCTRL_MPE;
6287                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6288                 }
6289
6290                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6291                 ctrl |= IXGBE_CTRL_GIO_DIS;
6292                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6293
6294                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6295         } else {
6296                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6297                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6298         }
6299
6300         switch (hw->mac.type) {
6301         case ixgbe_mac_82598EB:
6302                 pci_wake_from_d3(pdev, false);
6303                 break;
6304         case ixgbe_mac_82599EB:
6305         case ixgbe_mac_X540:
6306         case ixgbe_mac_X550:
6307         case ixgbe_mac_X550EM_x:
6308         case ixgbe_mac_x550em_a:
6309                 pci_wake_from_d3(pdev, !!wufc);
6310                 break;
6311         default:
6312                 break;
6313         }
6314
6315         *enable_wake = !!wufc;
6316         if (hw->phy.ops.set_phy_power && !*enable_wake)
6317                 hw->phy.ops.set_phy_power(hw, false);
6318
6319         ixgbe_release_hw_control(adapter);
6320
6321         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6322                 pci_disable_device(pdev);
6323
6324         return 0;
6325 }
6326
6327 #ifdef CONFIG_PM
6328 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6329 {
6330         int retval;
6331         bool wake;
6332
6333         retval = __ixgbe_shutdown(pdev, &wake);
6334         if (retval)
6335                 return retval;
6336
6337         if (wake) {
6338                 pci_prepare_to_sleep(pdev);
6339         } else {
6340                 pci_wake_from_d3(pdev, false);
6341                 pci_set_power_state(pdev, PCI_D3hot);
6342         }
6343
6344         return 0;
6345 }
6346 #endif /* CONFIG_PM */
6347
6348 static void ixgbe_shutdown(struct pci_dev *pdev)
6349 {
6350         bool wake;
6351
6352         __ixgbe_shutdown(pdev, &wake);
6353
6354         if (system_state == SYSTEM_POWER_OFF) {
6355                 pci_wake_from_d3(pdev, wake);
6356                 pci_set_power_state(pdev, PCI_D3hot);
6357         }
6358 }
6359
6360 /**
6361  * ixgbe_update_stats - Update the board statistics counters.
6362  * @adapter: board private structure
6363  **/
6364 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6365 {
6366         struct net_device *netdev = adapter->netdev;
6367         struct ixgbe_hw *hw = &adapter->hw;
6368         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6369         u64 total_mpc = 0;
6370         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6371         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6372         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6373         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6374
6375         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6376             test_bit(__IXGBE_RESETTING, &adapter->state))
6377                 return;
6378
6379         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6380                 u64 rsc_count = 0;
6381                 u64 rsc_flush = 0;
6382                 for (i = 0; i < adapter->num_rx_queues; i++) {
6383                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6384                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6385                 }
6386                 adapter->rsc_total_count = rsc_count;
6387                 adapter->rsc_total_flush = rsc_flush;
6388         }
6389
6390         for (i = 0; i < adapter->num_rx_queues; i++) {
6391                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6392                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6393                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6394                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6395                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6396                 bytes += rx_ring->stats.bytes;
6397                 packets += rx_ring->stats.packets;
6398         }
6399         adapter->non_eop_descs = non_eop_descs;
6400         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6401         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6402         adapter->hw_csum_rx_error = hw_csum_rx_error;
6403         netdev->stats.rx_bytes = bytes;
6404         netdev->stats.rx_packets = packets;
6405
6406         bytes = 0;
6407         packets = 0;
6408         /* gather some stats to the adapter struct that are per queue */
6409         for (i = 0; i < adapter->num_tx_queues; i++) {
6410                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6411                 restart_queue += tx_ring->tx_stats.restart_queue;
6412                 tx_busy += tx_ring->tx_stats.tx_busy;
6413                 bytes += tx_ring->stats.bytes;
6414                 packets += tx_ring->stats.packets;
6415         }
6416         adapter->restart_queue = restart_queue;
6417         adapter->tx_busy = tx_busy;
6418         netdev->stats.tx_bytes = bytes;
6419         netdev->stats.tx_packets = packets;
6420
6421         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6422
6423         /* 8 register reads */
6424         for (i = 0; i < 8; i++) {
6425                 /* for packet buffers not used, the register should read 0 */
6426                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6427                 missed_rx += mpc;
6428                 hwstats->mpc[i] += mpc;
6429                 total_mpc += hwstats->mpc[i];
6430                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6431                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6432                 switch (hw->mac.type) {
6433                 case ixgbe_mac_82598EB:
6434                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6435                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6436                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6437                         hwstats->pxonrxc[i] +=
6438                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6439                         break;
6440                 case ixgbe_mac_82599EB:
6441                 case ixgbe_mac_X540:
6442                 case ixgbe_mac_X550:
6443                 case ixgbe_mac_X550EM_x:
6444                 case ixgbe_mac_x550em_a:
6445                         hwstats->pxonrxc[i] +=
6446                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6447                         break;
6448                 default:
6449                         break;
6450                 }
6451         }
6452
6453         /*16 register reads */
6454         for (i = 0; i < 16; i++) {
6455                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6456                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6457                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6458                     (hw->mac.type == ixgbe_mac_X540) ||
6459                     (hw->mac.type == ixgbe_mac_X550) ||
6460                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6461                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6462                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6463                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6464                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6465                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6466                 }
6467         }
6468
6469         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6470         /* work around hardware counting issue */
6471         hwstats->gprc -= missed_rx;
6472
6473         ixgbe_update_xoff_received(adapter);
6474
6475         /* 82598 hardware only has a 32 bit counter in the high register */
6476         switch (hw->mac.type) {
6477         case ixgbe_mac_82598EB:
6478                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6479                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6480                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6481                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6482                 break;
6483         case ixgbe_mac_X540:
6484         case ixgbe_mac_X550:
6485         case ixgbe_mac_X550EM_x:
6486         case ixgbe_mac_x550em_a:
6487                 /* OS2BMC stats are X540 and later */
6488                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6489                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6490                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6491                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6492         case ixgbe_mac_82599EB:
6493                 for (i = 0; i < 16; i++)
6494                         adapter->hw_rx_no_dma_resources +=
6495                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6496                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6497                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6498                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6499                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6500                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6501                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6502                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6503                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6504                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6505 #ifdef IXGBE_FCOE
6506                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6507                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6508                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6509                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6510                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6511                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6512                 /* Add up per cpu counters for total ddp aloc fail */
6513                 if (adapter->fcoe.ddp_pool) {
6514                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6515                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6516                         unsigned int cpu;
6517                         u64 noddp = 0, noddp_ext_buff = 0;
6518                         for_each_possible_cpu(cpu) {
6519                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6520                                 noddp += ddp_pool->noddp;
6521                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6522                         }
6523                         hwstats->fcoe_noddp = noddp;
6524                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6525                 }
6526 #endif /* IXGBE_FCOE */
6527                 break;
6528         default:
6529                 break;
6530         }
6531         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6532         hwstats->bprc += bprc;
6533         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6534         if (hw->mac.type == ixgbe_mac_82598EB)
6535                 hwstats->mprc -= bprc;
6536         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6537         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6538         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6539         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6540         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6541         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6542         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6543         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6544         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6545         hwstats->lxontxc += lxon;
6546         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6547         hwstats->lxofftxc += lxoff;
6548         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6549         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6550         /*
6551          * 82598 errata - tx of flow control packets is included in tx counters
6552          */
6553         xon_off_tot = lxon + lxoff;
6554         hwstats->gptc -= xon_off_tot;
6555         hwstats->mptc -= xon_off_tot;
6556         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6557         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6558         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6559         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6560         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6561         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6562         hwstats->ptc64 -= xon_off_tot;
6563         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6564         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6565         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6566         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6567         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6568         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6569
6570         /* Fill out the OS statistics structure */
6571         netdev->stats.multicast = hwstats->mprc;
6572
6573         /* Rx Errors */
6574         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6575         netdev->stats.rx_dropped = 0;
6576         netdev->stats.rx_length_errors = hwstats->rlec;
6577         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6578         netdev->stats.rx_missed_errors = total_mpc;
6579 }
6580
6581 /**
6582  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6583  * @adapter: pointer to the device adapter structure
6584  **/
6585 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6586 {
6587         struct ixgbe_hw *hw = &adapter->hw;
6588         int i;
6589
6590         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6591                 return;
6592
6593         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6594
6595         /* if interface is down do nothing */
6596         if (test_bit(__IXGBE_DOWN, &adapter->state))
6597                 return;
6598
6599         /* do nothing if we are not using signature filters */
6600         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6601                 return;
6602
6603         adapter->fdir_overflow++;
6604
6605         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6606                 for (i = 0; i < adapter->num_tx_queues; i++)
6607                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6608                                 &(adapter->tx_ring[i]->state));
6609                 /* re-enable flow director interrupts */
6610                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6611         } else {
6612                 e_err(probe, "failed to finish FDIR re-initialization, "
6613                       "ignored adding FDIR ATR filters\n");
6614         }
6615 }
6616
6617 /**
6618  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6619  * @adapter: pointer to the device adapter structure
6620  *
6621  * This function serves two purposes.  First it strobes the interrupt lines
6622  * in order to make certain interrupts are occurring.  Secondly it sets the
6623  * bits needed to check for TX hangs.  As a result we should immediately
6624  * determine if a hang has occurred.
6625  */
6626 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6627 {
6628         struct ixgbe_hw *hw = &adapter->hw;
6629         u64 eics = 0;
6630         int i;
6631
6632         /* If we're down, removing or resetting, just bail */
6633         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6634             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6635             test_bit(__IXGBE_RESETTING, &adapter->state))
6636                 return;
6637
6638         /* Force detection of hung controller */
6639         if (netif_carrier_ok(adapter->netdev)) {
6640                 for (i = 0; i < adapter->num_tx_queues; i++)
6641                         set_check_for_tx_hang(adapter->tx_ring[i]);
6642         }
6643
6644         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6645                 /*
6646                  * for legacy and MSI interrupts don't set any bits
6647                  * that are enabled for EIAM, because this operation
6648                  * would set *both* EIMS and EICS for any bit in EIAM
6649                  */
6650                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6651                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6652         } else {
6653                 /* get one bit for every active tx/rx interrupt vector */
6654                 for (i = 0; i < adapter->num_q_vectors; i++) {
6655                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6656                         if (qv->rx.ring || qv->tx.ring)
6657                                 eics |= BIT_ULL(i);
6658                 }
6659         }
6660
6661         /* Cause software interrupt to ensure rings are cleaned */
6662         ixgbe_irq_rearm_queues(adapter, eics);
6663 }
6664
6665 /**
6666  * ixgbe_watchdog_update_link - update the link status
6667  * @adapter: pointer to the device adapter structure
6668  * @link_speed: pointer to a u32 to store the link_speed
6669  **/
6670 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6671 {
6672         struct ixgbe_hw *hw = &adapter->hw;
6673         u32 link_speed = adapter->link_speed;
6674         bool link_up = adapter->link_up;
6675         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6676
6677         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6678                 return;
6679
6680         if (hw->mac.ops.check_link) {
6681                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6682         } else {
6683                 /* always assume link is up, if no check link function */
6684                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6685                 link_up = true;
6686         }
6687
6688         /* If Crosstalk fix enabled do the sanity check of making sure
6689          * the SFP+ cage is empty.
6690          */
6691         if (adapter->need_crosstalk_fix) {
6692                 u32 sfp_cage_full;
6693
6694                 sfp_cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
6695                                 IXGBE_ESDP_SDP2;
6696                 if (ixgbe_is_sfp(hw) && link_up && !sfp_cage_full)
6697                         link_up = false;
6698         }
6699
6700         if (adapter->ixgbe_ieee_pfc)
6701                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6702
6703         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6704                 hw->mac.ops.fc_enable(hw);
6705                 ixgbe_set_rx_drop_en(adapter);
6706         }
6707
6708         if (link_up ||
6709             time_after(jiffies, (adapter->link_check_timeout +
6710                                  IXGBE_TRY_LINK_TIMEOUT))) {
6711                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6712                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6713                 IXGBE_WRITE_FLUSH(hw);
6714         }
6715
6716         adapter->link_up = link_up;
6717         adapter->link_speed = link_speed;
6718 }
6719
6720 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6721 {
6722 #ifdef CONFIG_IXGBE_DCB
6723         struct net_device *netdev = adapter->netdev;
6724         struct dcb_app app = {
6725                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6726                               .protocol = 0,
6727                              };
6728         u8 up = 0;
6729
6730         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6731                 up = dcb_ieee_getapp_mask(netdev, &app);
6732
6733         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6734 #endif
6735 }
6736
6737 /**
6738  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6739  *                             print link up message
6740  * @adapter: pointer to the device adapter structure
6741  **/
6742 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6743 {
6744         struct net_device *netdev = adapter->netdev;
6745         struct ixgbe_hw *hw = &adapter->hw;
6746         struct net_device *upper;
6747         struct list_head *iter;
6748         u32 link_speed = adapter->link_speed;
6749         const char *speed_str;
6750         bool flow_rx, flow_tx;
6751
6752         /* only continue if link was previously down */
6753         if (netif_carrier_ok(netdev))
6754                 return;
6755
6756         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6757
6758         switch (hw->mac.type) {
6759         case ixgbe_mac_82598EB: {
6760                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6761                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6762                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6763                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6764         }
6765                 break;
6766         case ixgbe_mac_X540:
6767         case ixgbe_mac_X550:
6768         case ixgbe_mac_X550EM_x:
6769         case ixgbe_mac_x550em_a:
6770         case ixgbe_mac_82599EB: {
6771                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6772                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6773                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6774                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6775         }
6776                 break;
6777         default:
6778                 flow_tx = false;
6779                 flow_rx = false;
6780                 break;
6781         }
6782
6783         adapter->last_rx_ptp_check = jiffies;
6784
6785         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6786                 ixgbe_ptp_start_cyclecounter(adapter);
6787
6788         switch (link_speed) {
6789         case IXGBE_LINK_SPEED_10GB_FULL:
6790                 speed_str = "10 Gbps";
6791                 break;
6792         case IXGBE_LINK_SPEED_2_5GB_FULL:
6793                 speed_str = "2.5 Gbps";
6794                 break;
6795         case IXGBE_LINK_SPEED_1GB_FULL:
6796                 speed_str = "1 Gbps";
6797                 break;
6798         case IXGBE_LINK_SPEED_100_FULL:
6799                 speed_str = "100 Mbps";
6800                 break;
6801         default:
6802                 speed_str = "unknown speed";
6803                 break;
6804         }
6805         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6806                ((flow_rx && flow_tx) ? "RX/TX" :
6807                (flow_rx ? "RX" :
6808                (flow_tx ? "TX" : "None"))));
6809
6810         netif_carrier_on(netdev);
6811         ixgbe_check_vf_rate_limit(adapter);
6812
6813         /* enable transmits */
6814         netif_tx_wake_all_queues(adapter->netdev);
6815
6816         /* enable any upper devices */
6817         rtnl_lock();
6818         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6819                 if (netif_is_macvlan(upper)) {
6820                         struct macvlan_dev *vlan = netdev_priv(upper);
6821
6822                         if (vlan->fwd_priv)
6823                                 netif_tx_wake_all_queues(upper);
6824                 }
6825         }
6826         rtnl_unlock();
6827
6828         /* update the default user priority for VFs */
6829         ixgbe_update_default_up(adapter);
6830
6831         /* ping all the active vfs to let them know link has changed */
6832         ixgbe_ping_all_vfs(adapter);
6833 }
6834
6835 /**
6836  * ixgbe_watchdog_link_is_down - update netif_carrier status and
6837  *                               print link down message
6838  * @adapter: pointer to the adapter structure
6839  **/
6840 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6841 {
6842         struct net_device *netdev = adapter->netdev;
6843         struct ixgbe_hw *hw = &adapter->hw;
6844
6845         adapter->link_up = false;
6846         adapter->link_speed = 0;
6847
6848         /* only continue if link was up previously */
6849         if (!netif_carrier_ok(netdev))
6850                 return;
6851
6852         /* poll for SFP+ cable when link is down */
6853         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6854                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6855
6856         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6857                 ixgbe_ptp_start_cyclecounter(adapter);
6858
6859         e_info(drv, "NIC Link is Down\n");
6860         netif_carrier_off(netdev);
6861
6862         /* ping all the active vfs to let them know link has changed */
6863         ixgbe_ping_all_vfs(adapter);
6864 }
6865
6866 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6867 {
6868         int i;
6869
6870         for (i = 0; i < adapter->num_tx_queues; i++) {
6871                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6872
6873                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6874                         return true;
6875         }
6876
6877         return false;
6878 }
6879
6880 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6881 {
6882         struct ixgbe_hw *hw = &adapter->hw;
6883         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6884         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6885
6886         int i, j;
6887
6888         if (!adapter->num_vfs)
6889                 return false;
6890
6891         /* resetting the PF is only needed for MAC before X550 */
6892         if (hw->mac.type >= ixgbe_mac_X550)
6893                 return false;
6894
6895         for (i = 0; i < adapter->num_vfs; i++) {
6896                 for (j = 0; j < q_per_pool; j++) {
6897                         u32 h, t;
6898
6899                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6900                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6901
6902                         if (h != t)
6903                                 return true;
6904                 }
6905         }
6906
6907         return false;
6908 }
6909
6910 /**
6911  * ixgbe_watchdog_flush_tx - flush queues on link down
6912  * @adapter: pointer to the device adapter structure
6913  **/
6914 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6915 {
6916         if (!netif_carrier_ok(adapter->netdev)) {
6917                 if (ixgbe_ring_tx_pending(adapter) ||
6918                     ixgbe_vf_tx_pending(adapter)) {
6919                         /* We've lost link, so the controller stops DMA,
6920                          * but we've got queued Tx work that's never going
6921                          * to get done, so reset controller to flush Tx.
6922                          * (Do the reset outside of interrupt context).
6923                          */
6924                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6925                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6926                 }
6927         }
6928 }
6929
6930 #ifdef CONFIG_PCI_IOV
6931 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6932                                       struct pci_dev *vfdev)
6933 {
6934         if (!pci_wait_for_pending_transaction(vfdev))
6935                 e_dev_warn("Issuing VFLR with pending transactions\n");
6936
6937         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6938         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6939
6940         msleep(100);
6941 }
6942
6943 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6944 {
6945         struct ixgbe_hw *hw = &adapter->hw;
6946         struct pci_dev *pdev = adapter->pdev;
6947         unsigned int vf;
6948         u32 gpc;
6949
6950         if (!(netif_carrier_ok(adapter->netdev)))
6951                 return;
6952
6953         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6954         if (gpc) /* If incrementing then no need for the check below */
6955                 return;
6956         /* Check to see if a bad DMA write target from an errant or
6957          * malicious VF has caused a PCIe error.  If so then we can
6958          * issue a VFLR to the offending VF(s) and then resume without
6959          * requesting a full slot reset.
6960          */
6961
6962         if (!pdev)
6963                 return;
6964
6965         /* check status reg for all VFs owned by this PF */
6966         for (vf = 0; vf < adapter->num_vfs; ++vf) {
6967                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
6968                 u16 status_reg;
6969
6970                 if (!vfdev)
6971                         continue;
6972                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6973                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
6974                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
6975                         ixgbe_issue_vf_flr(adapter, vfdev);
6976         }
6977 }
6978
6979 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6980 {
6981         u32 ssvpc;
6982
6983         /* Do not perform spoof check for 82598 or if not in IOV mode */
6984         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6985             adapter->num_vfs == 0)
6986                 return;
6987
6988         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6989
6990         /*
6991          * ssvpc register is cleared on read, if zero then no
6992          * spoofed packets in the last interval.
6993          */
6994         if (!ssvpc)
6995                 return;
6996
6997         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6998 }
6999 #else
7000 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7001 {
7002 }
7003
7004 static void
7005 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7006 {
7007 }
7008 #endif /* CONFIG_PCI_IOV */
7009
7010
7011 /**
7012  * ixgbe_watchdog_subtask - check and bring link up
7013  * @adapter: pointer to the device adapter structure
7014  **/
7015 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7016 {
7017         /* if interface is down, removing or resetting, do nothing */
7018         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7019             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7020             test_bit(__IXGBE_RESETTING, &adapter->state))
7021                 return;
7022
7023         ixgbe_watchdog_update_link(adapter);
7024
7025         if (adapter->link_up)
7026                 ixgbe_watchdog_link_is_up(adapter);
7027         else
7028                 ixgbe_watchdog_link_is_down(adapter);
7029
7030         ixgbe_check_for_bad_vf(adapter);
7031         ixgbe_spoof_check(adapter);
7032         ixgbe_update_stats(adapter);
7033
7034         ixgbe_watchdog_flush_tx(adapter);
7035 }
7036
7037 /**
7038  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7039  * @adapter: the ixgbe adapter structure
7040  **/
7041 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7042 {
7043         struct ixgbe_hw *hw = &adapter->hw;
7044         s32 err;
7045
7046         /* If crosstalk fix enabled verify the SFP+ cage is full */
7047         if (adapter->need_crosstalk_fix) {
7048                 u32 sfp_cage_full;
7049
7050                 sfp_cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
7051                                 IXGBE_ESDP_SDP2;
7052                 if (!sfp_cage_full)
7053                         return;
7054         }
7055
7056         /* not searching for SFP so there is nothing to do here */
7057         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7058             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7059                 return;
7060
7061         if (adapter->sfp_poll_time &&
7062             time_after(adapter->sfp_poll_time, jiffies))
7063                 return; /* If not yet time to poll for SFP */
7064
7065         /* someone else is in init, wait until next service event */
7066         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7067                 return;
7068
7069         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7070
7071         err = hw->phy.ops.identify_sfp(hw);
7072         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7073                 goto sfp_out;
7074
7075         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7076                 /* If no cable is present, then we need to reset
7077                  * the next time we find a good cable. */
7078                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7079         }
7080
7081         /* exit on error */
7082         if (err)
7083                 goto sfp_out;
7084
7085         /* exit if reset not needed */
7086         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7087                 goto sfp_out;
7088
7089         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7090
7091         /*
7092          * A module may be identified correctly, but the EEPROM may not have
7093          * support for that module.  setup_sfp() will fail in that case, so
7094          * we should not allow that module to load.
7095          */
7096         if (hw->mac.type == ixgbe_mac_82598EB)
7097                 err = hw->phy.ops.reset(hw);
7098         else
7099                 err = hw->mac.ops.setup_sfp(hw);
7100
7101         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7102                 goto sfp_out;
7103
7104         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7105         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7106
7107 sfp_out:
7108         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7109
7110         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7111             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7112                 e_dev_err("failed to initialize because an unsupported "
7113                           "SFP+ module type was detected.\n");
7114                 e_dev_err("Reload the driver after installing a "
7115                           "supported module.\n");
7116                 unregister_netdev(adapter->netdev);
7117         }
7118 }
7119
7120 /**
7121  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7122  * @adapter: the ixgbe adapter structure
7123  **/
7124 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7125 {
7126         struct ixgbe_hw *hw = &adapter->hw;
7127         u32 speed;
7128         bool autoneg = false;
7129
7130         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7131                 return;
7132
7133         /* someone else is in init, wait until next service event */
7134         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7135                 return;
7136
7137         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7138
7139         speed = hw->phy.autoneg_advertised;
7140         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7141                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7142
7143                 /* setup the highest link when no autoneg */
7144                 if (!autoneg) {
7145                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7146                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7147                 }
7148         }
7149
7150         if (hw->mac.ops.setup_link)
7151                 hw->mac.ops.setup_link(hw, speed, true);
7152
7153         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7154         adapter->link_check_timeout = jiffies;
7155         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7156 }
7157
7158 /**
7159  * ixgbe_service_timer - Timer Call-back
7160  * @data: pointer to adapter cast into an unsigned long
7161  **/
7162 static void ixgbe_service_timer(unsigned long data)
7163 {
7164         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7165         unsigned long next_event_offset;
7166
7167         /* poll faster when waiting for link */
7168         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7169                 next_event_offset = HZ / 10;
7170         else
7171                 next_event_offset = HZ * 2;
7172
7173         /* Reset the timer */
7174         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7175
7176         ixgbe_service_event_schedule(adapter);
7177 }
7178
7179 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7180 {
7181         struct ixgbe_hw *hw = &adapter->hw;
7182         u32 status;
7183
7184         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7185                 return;
7186
7187         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7188
7189         if (!hw->phy.ops.handle_lasi)
7190                 return;
7191
7192         status = hw->phy.ops.handle_lasi(&adapter->hw);
7193         if (status != IXGBE_ERR_OVERTEMP)
7194                 return;
7195
7196         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7197 }
7198
7199 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7200 {
7201         if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
7202                 return;
7203
7204         adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
7205
7206         /* If we're already down, removing or resetting, just bail */
7207         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7208             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7209             test_bit(__IXGBE_RESETTING, &adapter->state))
7210                 return;
7211
7212         ixgbe_dump(adapter);
7213         netdev_err(adapter->netdev, "Reset adapter\n");
7214         adapter->tx_timeout_count++;
7215
7216         rtnl_lock();
7217         ixgbe_reinit_locked(adapter);
7218         rtnl_unlock();
7219 }
7220
7221 /**
7222  * ixgbe_service_task - manages and runs subtasks
7223  * @work: pointer to work_struct containing our data
7224  **/
7225 static void ixgbe_service_task(struct work_struct *work)
7226 {
7227         struct ixgbe_adapter *adapter = container_of(work,
7228                                                      struct ixgbe_adapter,
7229                                                      service_task);
7230         if (ixgbe_removed(adapter->hw.hw_addr)) {
7231                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7232                         rtnl_lock();
7233                         ixgbe_down(adapter);
7234                         rtnl_unlock();
7235                 }
7236                 ixgbe_service_event_complete(adapter);
7237                 return;
7238         }
7239 #ifdef CONFIG_IXGBE_VXLAN
7240         rtnl_lock();
7241         if (adapter->flags2 & IXGBE_FLAG2_VXLAN_REREG_NEEDED) {
7242                 adapter->flags2 &= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED;
7243                 vxlan_get_rx_port(adapter->netdev);
7244         }
7245         rtnl_unlock();
7246 #endif /* CONFIG_IXGBE_VXLAN */
7247         ixgbe_reset_subtask(adapter);
7248         ixgbe_phy_interrupt_subtask(adapter);
7249         ixgbe_sfp_detection_subtask(adapter);
7250         ixgbe_sfp_link_config_subtask(adapter);
7251         ixgbe_check_overtemp_subtask(adapter);
7252         ixgbe_watchdog_subtask(adapter);
7253         ixgbe_fdir_reinit_subtask(adapter);
7254         ixgbe_check_hang_subtask(adapter);
7255
7256         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7257                 ixgbe_ptp_overflow_check(adapter);
7258                 ixgbe_ptp_rx_hang(adapter);
7259         }
7260
7261         ixgbe_service_event_complete(adapter);
7262 }
7263
7264 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7265                      struct ixgbe_tx_buffer *first,
7266                      u8 *hdr_len)
7267 {
7268         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7269         struct sk_buff *skb = first->skb;
7270         union {
7271                 struct iphdr *v4;
7272                 struct ipv6hdr *v6;
7273                 unsigned char *hdr;
7274         } ip;
7275         union {
7276                 struct tcphdr *tcp;
7277                 unsigned char *hdr;
7278         } l4;
7279         u32 paylen, l4_offset;
7280         int err;
7281
7282         if (skb->ip_summed != CHECKSUM_PARTIAL)
7283                 return 0;
7284
7285         if (!skb_is_gso(skb))
7286                 return 0;
7287
7288         err = skb_cow_head(skb, 0);
7289         if (err < 0)
7290                 return err;
7291
7292         ip.hdr = skb_network_header(skb);
7293         l4.hdr = skb_checksum_start(skb);
7294
7295         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7296         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7297
7298         /* initialize outer IP header fields */
7299         if (ip.v4->version == 4) {
7300                 /* IP header will have to cancel out any data that
7301                  * is not a part of the outer IP header
7302                  */
7303                 ip.v4->check = csum_fold(csum_add(lco_csum(skb),
7304                                                   csum_unfold(l4.tcp->check)));
7305                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7306
7307                 ip.v4->tot_len = 0;
7308                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7309                                    IXGBE_TX_FLAGS_CSUM |
7310                                    IXGBE_TX_FLAGS_IPV4;
7311         } else {
7312                 ip.v6->payload_len = 0;
7313                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7314                                    IXGBE_TX_FLAGS_CSUM;
7315         }
7316
7317         /* determine offset of inner transport header */
7318         l4_offset = l4.hdr - skb->data;
7319
7320         /* compute length of segmentation header */
7321         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7322
7323         /* remove payload length from inner checksum */
7324         paylen = skb->len - l4_offset;
7325         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7326
7327         /* update gso size and bytecount with header size */
7328         first->gso_segs = skb_shinfo(skb)->gso_segs;
7329         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7330
7331         /* mss_l4len_id: use 0 as index for TSO */
7332         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7333         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7334
7335         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7336         vlan_macip_lens = l4.hdr - ip.hdr;
7337         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7338         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7339
7340         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7341                           mss_l4len_idx);
7342
7343         return 1;
7344 }
7345
7346 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7347 {
7348         unsigned int offset = 0;
7349
7350         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7351
7352         return offset == skb_checksum_start_offset(skb);
7353 }
7354
7355 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7356                           struct ixgbe_tx_buffer *first)
7357 {
7358         struct sk_buff *skb = first->skb;
7359         u32 vlan_macip_lens = 0;
7360         u32 type_tucmd = 0;
7361
7362         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7363 csum_failed:
7364                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7365                                          IXGBE_TX_FLAGS_CC)))
7366                         return;
7367                 goto no_csum;
7368         }
7369
7370         switch (skb->csum_offset) {
7371         case offsetof(struct tcphdr, check):
7372                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7373                 /* fall through */
7374         case offsetof(struct udphdr, check):
7375                 break;
7376         case offsetof(struct sctphdr, checksum):
7377                 /* validate that this is actually an SCTP request */
7378                 if (((first->protocol == htons(ETH_P_IP)) &&
7379                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7380                     ((first->protocol == htons(ETH_P_IPV6)) &&
7381                      ixgbe_ipv6_csum_is_sctp(skb))) {
7382                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7383                         break;
7384                 }
7385                 /* fall through */
7386         default:
7387                 skb_checksum_help(skb);
7388                 goto csum_failed;
7389         }
7390
7391         /* update TX checksum flag */
7392         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7393         vlan_macip_lens = skb_checksum_start_offset(skb) -
7394                           skb_network_offset(skb);
7395 no_csum:
7396         /* vlan_macip_lens: MACLEN, VLAN tag */
7397         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7398         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7399
7400         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7401 }
7402
7403 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7404         ((_flag <= _result) ? \
7405          ((u32)(_input & _flag) * (_result / _flag)) : \
7406          ((u32)(_input & _flag) / (_flag / _result)))
7407
7408 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7409 {
7410         /* set type for advanced descriptor with frame checksum insertion */
7411         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7412                        IXGBE_ADVTXD_DCMD_DEXT |
7413                        IXGBE_ADVTXD_DCMD_IFCS;
7414
7415         /* set HW vlan bit if vlan is present */
7416         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7417                                    IXGBE_ADVTXD_DCMD_VLE);
7418
7419         /* set segmentation enable bits for TSO/FSO */
7420         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7421                                    IXGBE_ADVTXD_DCMD_TSE);
7422
7423         /* set timestamp bit if present */
7424         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7425                                    IXGBE_ADVTXD_MAC_TSTAMP);
7426
7427         /* insert frame checksum */
7428         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7429
7430         return cmd_type;
7431 }
7432
7433 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7434                                    u32 tx_flags, unsigned int paylen)
7435 {
7436         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7437
7438         /* enable L4 checksum for TSO and TX checksum offload */
7439         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7440                                         IXGBE_TX_FLAGS_CSUM,
7441                                         IXGBE_ADVTXD_POPTS_TXSM);
7442
7443         /* enble IPv4 checksum for TSO */
7444         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7445                                         IXGBE_TX_FLAGS_IPV4,
7446                                         IXGBE_ADVTXD_POPTS_IXSM);
7447
7448         /*
7449          * Check Context must be set if Tx switch is enabled, which it
7450          * always is for case where virtual functions are running
7451          */
7452         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7453                                         IXGBE_TX_FLAGS_CC,
7454                                         IXGBE_ADVTXD_CC);
7455
7456         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7457 }
7458
7459 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7460 {
7461         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7462
7463         /* Herbert's original patch had:
7464          *  smp_mb__after_netif_stop_queue();
7465          * but since that doesn't exist yet, just open code it.
7466          */
7467         smp_mb();
7468
7469         /* We need to check again in a case another CPU has just
7470          * made room available.
7471          */
7472         if (likely(ixgbe_desc_unused(tx_ring) < size))
7473                 return -EBUSY;
7474
7475         /* A reprieve! - use start_queue because it doesn't call schedule */
7476         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7477         ++tx_ring->tx_stats.restart_queue;
7478         return 0;
7479 }
7480
7481 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7482 {
7483         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7484                 return 0;
7485
7486         return __ixgbe_maybe_stop_tx(tx_ring, size);
7487 }
7488
7489 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7490                        IXGBE_TXD_CMD_RS)
7491
7492 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7493                          struct ixgbe_tx_buffer *first,
7494                          const u8 hdr_len)
7495 {
7496         struct sk_buff *skb = first->skb;
7497         struct ixgbe_tx_buffer *tx_buffer;
7498         union ixgbe_adv_tx_desc *tx_desc;
7499         struct skb_frag_struct *frag;
7500         dma_addr_t dma;
7501         unsigned int data_len, size;
7502         u32 tx_flags = first->tx_flags;
7503         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7504         u16 i = tx_ring->next_to_use;
7505
7506         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7507
7508         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7509
7510         size = skb_headlen(skb);
7511         data_len = skb->data_len;
7512
7513 #ifdef IXGBE_FCOE
7514         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7515                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7516                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7517                         data_len = 0;
7518                 } else {
7519                         data_len -= sizeof(struct fcoe_crc_eof);
7520                 }
7521         }
7522
7523 #endif
7524         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7525
7526         tx_buffer = first;
7527
7528         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7529                 if (dma_mapping_error(tx_ring->dev, dma))
7530                         goto dma_error;
7531
7532                 /* record length, and DMA address */
7533                 dma_unmap_len_set(tx_buffer, len, size);
7534                 dma_unmap_addr_set(tx_buffer, dma, dma);
7535
7536                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7537
7538                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7539                         tx_desc->read.cmd_type_len =
7540                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7541
7542                         i++;
7543                         tx_desc++;
7544                         if (i == tx_ring->count) {
7545                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7546                                 i = 0;
7547                         }
7548                         tx_desc->read.olinfo_status = 0;
7549
7550                         dma += IXGBE_MAX_DATA_PER_TXD;
7551                         size -= IXGBE_MAX_DATA_PER_TXD;
7552
7553                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7554                 }
7555
7556                 if (likely(!data_len))
7557                         break;
7558
7559                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7560
7561                 i++;
7562                 tx_desc++;
7563                 if (i == tx_ring->count) {
7564                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7565                         i = 0;
7566                 }
7567                 tx_desc->read.olinfo_status = 0;
7568
7569 #ifdef IXGBE_FCOE
7570                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7571 #else
7572                 size = skb_frag_size(frag);
7573 #endif
7574                 data_len -= size;
7575
7576                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7577                                        DMA_TO_DEVICE);
7578
7579                 tx_buffer = &tx_ring->tx_buffer_info[i];
7580         }
7581
7582         /* write last descriptor with RS and EOP bits */
7583         cmd_type |= size | IXGBE_TXD_CMD;
7584         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7585
7586         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7587
7588         /* set the timestamp */
7589         first->time_stamp = jiffies;
7590
7591         /*
7592          * Force memory writes to complete before letting h/w know there
7593          * are new descriptors to fetch.  (Only applicable for weak-ordered
7594          * memory model archs, such as IA-64).
7595          *
7596          * We also need this memory barrier to make certain all of the
7597          * status bits have been updated before next_to_watch is written.
7598          */
7599         wmb();
7600
7601         /* set next_to_watch value indicating a packet is present */
7602         first->next_to_watch = tx_desc;
7603
7604         i++;
7605         if (i == tx_ring->count)
7606                 i = 0;
7607
7608         tx_ring->next_to_use = i;
7609
7610         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7611
7612         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7613                 writel(i, tx_ring->tail);
7614
7615                 /* we need this if more than one processor can write to our tail
7616                  * at a time, it synchronizes IO on IA64/Altix systems
7617                  */
7618                 mmiowb();
7619         }
7620
7621         return;
7622 dma_error:
7623         dev_err(tx_ring->dev, "TX DMA map failed\n");
7624
7625         /* clear dma mappings for failed tx_buffer_info map */
7626         for (;;) {
7627                 tx_buffer = &tx_ring->tx_buffer_info[i];
7628                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7629                 if (tx_buffer == first)
7630                         break;
7631                 if (i == 0)
7632                         i = tx_ring->count;
7633                 i--;
7634         }
7635
7636         tx_ring->next_to_use = i;
7637 }
7638
7639 static void ixgbe_atr(struct ixgbe_ring *ring,
7640                       struct ixgbe_tx_buffer *first)
7641 {
7642         struct ixgbe_q_vector *q_vector = ring->q_vector;
7643         union ixgbe_atr_hash_dword input = { .dword = 0 };
7644         union ixgbe_atr_hash_dword common = { .dword = 0 };
7645         union {
7646                 unsigned char *network;
7647                 struct iphdr *ipv4;
7648                 struct ipv6hdr *ipv6;
7649         } hdr;
7650         struct tcphdr *th;
7651         unsigned int hlen;
7652         struct sk_buff *skb;
7653         __be16 vlan_id;
7654         int l4_proto;
7655
7656         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7657         if (!q_vector)
7658                 return;
7659
7660         /* do nothing if sampling is disabled */
7661         if (!ring->atr_sample_rate)
7662                 return;
7663
7664         ring->atr_count++;
7665
7666         /* currently only IPv4/IPv6 with TCP is supported */
7667         if ((first->protocol != htons(ETH_P_IP)) &&
7668             (first->protocol != htons(ETH_P_IPV6)))
7669                 return;
7670
7671         /* snag network header to get L4 type and address */
7672         skb = first->skb;
7673         hdr.network = skb_network_header(skb);
7674 #ifdef CONFIG_IXGBE_VXLAN
7675         if (skb->encapsulation &&
7676             first->protocol == htons(ETH_P_IP) &&
7677             hdr.ipv4->protocol != IPPROTO_UDP) {
7678                 struct ixgbe_adapter *adapter = q_vector->adapter;
7679
7680                 /* verify the port is recognized as VXLAN */
7681                 if (adapter->vxlan_port &&
7682                     udp_hdr(skb)->dest == adapter->vxlan_port)
7683                         hdr.network = skb_inner_network_header(skb);
7684         }
7685 #endif /* CONFIG_IXGBE_VXLAN */
7686
7687         /* Currently only IPv4/IPv6 with TCP is supported */
7688         switch (hdr.ipv4->version) {
7689         case IPVERSION:
7690                 /* access ihl as u8 to avoid unaligned access on ia64 */
7691                 hlen = (hdr.network[0] & 0x0F) << 2;
7692                 l4_proto = hdr.ipv4->protocol;
7693                 break;
7694         case 6:
7695                 hlen = hdr.network - skb->data;
7696                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
7697                 hlen -= hdr.network - skb->data;
7698                 break;
7699         default:
7700                 return;
7701         }
7702
7703         if (l4_proto != IPPROTO_TCP)
7704                 return;
7705
7706         th = (struct tcphdr *)(hdr.network + hlen);
7707
7708         /* skip this packet since the socket is closing */
7709         if (th->fin)
7710                 return;
7711
7712         /* sample on all syn packets or once every atr sample count */
7713         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7714                 return;
7715
7716         /* reset sample count */
7717         ring->atr_count = 0;
7718
7719         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7720
7721         /*
7722          * src and dst are inverted, think how the receiver sees them
7723          *
7724          * The input is broken into two sections, a non-compressed section
7725          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7726          * is XORed together and stored in the compressed dword.
7727          */
7728         input.formatted.vlan_id = vlan_id;
7729
7730         /*
7731          * since src port and flex bytes occupy the same word XOR them together
7732          * and write the value to source port portion of compressed dword
7733          */
7734         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7735                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7736         else
7737                 common.port.src ^= th->dest ^ first->protocol;
7738         common.port.dst ^= th->source;
7739
7740         switch (hdr.ipv4->version) {
7741         case IPVERSION:
7742                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7743                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7744                 break;
7745         case 6:
7746                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7747                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7748                              hdr.ipv6->saddr.s6_addr32[1] ^
7749                              hdr.ipv6->saddr.s6_addr32[2] ^
7750                              hdr.ipv6->saddr.s6_addr32[3] ^
7751                              hdr.ipv6->daddr.s6_addr32[0] ^
7752                              hdr.ipv6->daddr.s6_addr32[1] ^
7753                              hdr.ipv6->daddr.s6_addr32[2] ^
7754                              hdr.ipv6->daddr.s6_addr32[3];
7755                 break;
7756         default:
7757                 break;
7758         }
7759
7760         if (hdr.network != skb_network_header(skb))
7761                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7762
7763         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7764         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7765                                               input, common, ring->queue_index);
7766 }
7767
7768 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7769                               void *accel_priv, select_queue_fallback_t fallback)
7770 {
7771         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7772 #ifdef IXGBE_FCOE
7773         struct ixgbe_adapter *adapter;
7774         struct ixgbe_ring_feature *f;
7775         int txq;
7776 #endif
7777
7778         if (fwd_adapter)
7779                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7780
7781 #ifdef IXGBE_FCOE
7782
7783         /*
7784          * only execute the code below if protocol is FCoE
7785          * or FIP and we have FCoE enabled on the adapter
7786          */
7787         switch (vlan_get_protocol(skb)) {
7788         case htons(ETH_P_FCOE):
7789         case htons(ETH_P_FIP):
7790                 adapter = netdev_priv(dev);
7791
7792                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7793                         break;
7794         default:
7795                 return fallback(dev, skb);
7796         }
7797
7798         f = &adapter->ring_feature[RING_F_FCOE];
7799
7800         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7801                                            smp_processor_id();
7802
7803         while (txq >= f->indices)
7804                 txq -= f->indices;
7805
7806         return txq + f->offset;
7807 #else
7808         return fallback(dev, skb);
7809 #endif
7810 }
7811
7812 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7813                           struct ixgbe_adapter *adapter,
7814                           struct ixgbe_ring *tx_ring)
7815 {
7816         struct ixgbe_tx_buffer *first;
7817         int tso;
7818         u32 tx_flags = 0;
7819         unsigned short f;
7820         u16 count = TXD_USE_COUNT(skb_headlen(skb));
7821         __be16 protocol = skb->protocol;
7822         u8 hdr_len = 0;
7823
7824         /*
7825          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7826          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7827          *       + 2 desc gap to keep tail from touching head,
7828          *       + 1 desc for context descriptor,
7829          * otherwise try next time
7830          */
7831         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7832                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7833
7834         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7835                 tx_ring->tx_stats.tx_busy++;
7836                 return NETDEV_TX_BUSY;
7837         }
7838
7839         /* record the location of the first descriptor for this packet */
7840         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7841         first->skb = skb;
7842         first->bytecount = skb->len;
7843         first->gso_segs = 1;
7844
7845         /* if we have a HW VLAN tag being added default to the HW one */
7846         if (skb_vlan_tag_present(skb)) {
7847                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7848                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7849         /* else if it is a SW VLAN check the next protocol and store the tag */
7850         } else if (protocol == htons(ETH_P_8021Q)) {
7851                 struct vlan_hdr *vhdr, _vhdr;
7852                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7853                 if (!vhdr)
7854                         goto out_drop;
7855
7856                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7857                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
7858                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7859         }
7860         protocol = vlan_get_protocol(skb);
7861
7862         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7863             adapter->ptp_clock &&
7864             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7865                                    &adapter->state)) {
7866                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7867                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7868
7869                 /* schedule check for Tx timestamp */
7870                 adapter->ptp_tx_skb = skb_get(skb);
7871                 adapter->ptp_tx_start = jiffies;
7872                 schedule_work(&adapter->ptp_tx_work);
7873         }
7874
7875         skb_tx_timestamp(skb);
7876
7877 #ifdef CONFIG_PCI_IOV
7878         /*
7879          * Use the l2switch_enable flag - would be false if the DMA
7880          * Tx switch had been disabled.
7881          */
7882         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7883                 tx_flags |= IXGBE_TX_FLAGS_CC;
7884
7885 #endif
7886         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7887         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7888             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7889              (skb->priority != TC_PRIO_CONTROL))) {
7890                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7891                 tx_flags |= (skb->priority & 0x7) <<
7892                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7893                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7894                         struct vlan_ethhdr *vhdr;
7895
7896                         if (skb_cow_head(skb, 0))
7897                                 goto out_drop;
7898                         vhdr = (struct vlan_ethhdr *)skb->data;
7899                         vhdr->h_vlan_TCI = htons(tx_flags >>
7900                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
7901                 } else {
7902                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7903                 }
7904         }
7905
7906         /* record initial flags and protocol */
7907         first->tx_flags = tx_flags;
7908         first->protocol = protocol;
7909
7910 #ifdef IXGBE_FCOE
7911         /* setup tx offload for FCoE */
7912         if ((protocol == htons(ETH_P_FCOE)) &&
7913             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7914                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7915                 if (tso < 0)
7916                         goto out_drop;
7917
7918                 goto xmit_fcoe;
7919         }
7920
7921 #endif /* IXGBE_FCOE */
7922         tso = ixgbe_tso(tx_ring, first, &hdr_len);
7923         if (tso < 0)
7924                 goto out_drop;
7925         else if (!tso)
7926                 ixgbe_tx_csum(tx_ring, first);
7927
7928         /* add the ATR filter if ATR is on */
7929         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7930                 ixgbe_atr(tx_ring, first);
7931
7932 #ifdef IXGBE_FCOE
7933 xmit_fcoe:
7934 #endif /* IXGBE_FCOE */
7935         ixgbe_tx_map(tx_ring, first, hdr_len);
7936
7937         return NETDEV_TX_OK;
7938
7939 out_drop:
7940         dev_kfree_skb_any(first->skb);
7941         first->skb = NULL;
7942
7943         return NETDEV_TX_OK;
7944 }
7945
7946 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7947                                       struct net_device *netdev,
7948                                       struct ixgbe_ring *ring)
7949 {
7950         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7951         struct ixgbe_ring *tx_ring;
7952
7953         /*
7954          * The minimum packet size for olinfo paylen is 17 so pad the skb
7955          * in order to meet this minimum size requirement.
7956          */
7957         if (skb_put_padto(skb, 17))
7958                 return NETDEV_TX_OK;
7959
7960         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7961
7962         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7963 }
7964
7965 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7966                                     struct net_device *netdev)
7967 {
7968         return __ixgbe_xmit_frame(skb, netdev, NULL);
7969 }
7970
7971 /**
7972  * ixgbe_set_mac - Change the Ethernet Address of the NIC
7973  * @netdev: network interface device structure
7974  * @p: pointer to an address structure
7975  *
7976  * Returns 0 on success, negative on failure
7977  **/
7978 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7979 {
7980         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7981         struct ixgbe_hw *hw = &adapter->hw;
7982         struct sockaddr *addr = p;
7983
7984         if (!is_valid_ether_addr(addr->sa_data))
7985                 return -EADDRNOTAVAIL;
7986
7987         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7988         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7989
7990         ixgbe_mac_set_default_filter(adapter);
7991
7992         return 0;
7993 }
7994
7995 static int
7996 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7997 {
7998         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7999         struct ixgbe_hw *hw = &adapter->hw;
8000         u16 value;
8001         int rc;
8002
8003         if (prtad != hw->phy.mdio.prtad)
8004                 return -EINVAL;
8005         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8006         if (!rc)
8007                 rc = value;
8008         return rc;
8009 }
8010
8011 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8012                             u16 addr, u16 value)
8013 {
8014         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8015         struct ixgbe_hw *hw = &adapter->hw;
8016
8017         if (prtad != hw->phy.mdio.prtad)
8018                 return -EINVAL;
8019         return hw->phy.ops.write_reg(hw, addr, devad, value);
8020 }
8021
8022 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8023 {
8024         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8025
8026         switch (cmd) {
8027         case SIOCSHWTSTAMP:
8028                 return ixgbe_ptp_set_ts_config(adapter, req);
8029         case SIOCGHWTSTAMP:
8030                 return ixgbe_ptp_get_ts_config(adapter, req);
8031         default:
8032                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8033         }
8034 }
8035
8036 /**
8037  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8038  * netdev->dev_addrs
8039  * @netdev: network interface device structure
8040  *
8041  * Returns non-zero on failure
8042  **/
8043 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8044 {
8045         int err = 0;
8046         struct ixgbe_adapter *adapter = netdev_priv(dev);
8047         struct ixgbe_hw *hw = &adapter->hw;
8048
8049         if (is_valid_ether_addr(hw->mac.san_addr)) {
8050                 rtnl_lock();
8051                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8052                 rtnl_unlock();
8053
8054                 /* update SAN MAC vmdq pool selection */
8055                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8056         }
8057         return err;
8058 }
8059
8060 /**
8061  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8062  * netdev->dev_addrs
8063  * @netdev: network interface device structure
8064  *
8065  * Returns non-zero on failure
8066  **/
8067 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8068 {
8069         int err = 0;
8070         struct ixgbe_adapter *adapter = netdev_priv(dev);
8071         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8072
8073         if (is_valid_ether_addr(mac->san_addr)) {
8074                 rtnl_lock();
8075                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8076                 rtnl_unlock();
8077         }
8078         return err;
8079 }
8080
8081 #ifdef CONFIG_NET_POLL_CONTROLLER
8082 /*
8083  * Polling 'interrupt' - used by things like netconsole to send skbs
8084  * without having to re-enable interrupts. It's not called while
8085  * the interrupt routine is executing.
8086  */
8087 static void ixgbe_netpoll(struct net_device *netdev)
8088 {
8089         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8090         int i;
8091
8092         /* if interface is down do nothing */
8093         if (test_bit(__IXGBE_DOWN, &adapter->state))
8094                 return;
8095
8096         /* loop through and schedule all active queues */
8097         for (i = 0; i < adapter->num_q_vectors; i++)
8098                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8099 }
8100
8101 #endif
8102 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
8103                                                    struct rtnl_link_stats64 *stats)
8104 {
8105         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8106         int i;
8107
8108         rcu_read_lock();
8109         for (i = 0; i < adapter->num_rx_queues; i++) {
8110                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8111                 u64 bytes, packets;
8112                 unsigned int start;
8113
8114                 if (ring) {
8115                         do {
8116                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8117                                 packets = ring->stats.packets;
8118                                 bytes   = ring->stats.bytes;
8119                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8120                         stats->rx_packets += packets;
8121                         stats->rx_bytes   += bytes;
8122                 }
8123         }
8124
8125         for (i = 0; i < adapter->num_tx_queues; i++) {
8126                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8127                 u64 bytes, packets;
8128                 unsigned int start;
8129
8130                 if (ring) {
8131                         do {
8132                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8133                                 packets = ring->stats.packets;
8134                                 bytes   = ring->stats.bytes;
8135                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8136                         stats->tx_packets += packets;
8137                         stats->tx_bytes   += bytes;
8138                 }
8139         }
8140         rcu_read_unlock();
8141         /* following stats updated by ixgbe_watchdog_task() */
8142         stats->multicast        = netdev->stats.multicast;
8143         stats->rx_errors        = netdev->stats.rx_errors;
8144         stats->rx_length_errors = netdev->stats.rx_length_errors;
8145         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8146         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8147         return stats;
8148 }
8149
8150 #ifdef CONFIG_IXGBE_DCB
8151 /**
8152  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8153  * @adapter: pointer to ixgbe_adapter
8154  * @tc: number of traffic classes currently enabled
8155  *
8156  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8157  * 802.1Q priority maps to a packet buffer that exists.
8158  */
8159 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8160 {
8161         struct ixgbe_hw *hw = &adapter->hw;
8162         u32 reg, rsave;
8163         int i;
8164
8165         /* 82598 have a static priority to TC mapping that can not
8166          * be changed so no validation is needed.
8167          */
8168         if (hw->mac.type == ixgbe_mac_82598EB)
8169                 return;
8170
8171         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8172         rsave = reg;
8173
8174         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8175                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8176
8177                 /* If up2tc is out of bounds default to zero */
8178                 if (up2tc > tc)
8179                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8180         }
8181
8182         if (reg != rsave)
8183                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8184
8185         return;
8186 }
8187
8188 /**
8189  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8190  * @adapter: Pointer to adapter struct
8191  *
8192  * Populate the netdev user priority to tc map
8193  */
8194 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8195 {
8196         struct net_device *dev = adapter->netdev;
8197         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8198         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8199         u8 prio;
8200
8201         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8202                 u8 tc = 0;
8203
8204                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8205                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8206                 else if (ets)
8207                         tc = ets->prio_tc[prio];
8208
8209                 netdev_set_prio_tc_map(dev, prio, tc);
8210         }
8211 }
8212
8213 #endif /* CONFIG_IXGBE_DCB */
8214 /**
8215  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8216  *
8217  * @netdev: net device to configure
8218  * @tc: number of traffic classes to enable
8219  */
8220 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8221 {
8222         struct ixgbe_adapter *adapter = netdev_priv(dev);
8223         struct ixgbe_hw *hw = &adapter->hw;
8224         bool pools;
8225
8226         /* Hardware supports up to 8 traffic classes */
8227         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8228                 return -EINVAL;
8229
8230         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8231                 return -EINVAL;
8232
8233         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8234         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8235                 return -EBUSY;
8236
8237         /* Hardware has to reinitialize queues and interrupts to
8238          * match packet buffer alignment. Unfortunately, the
8239          * hardware is not flexible enough to do this dynamically.
8240          */
8241         if (netif_running(dev))
8242                 ixgbe_close(dev);
8243         else
8244                 ixgbe_reset(adapter);
8245
8246         ixgbe_clear_interrupt_scheme(adapter);
8247
8248 #ifdef CONFIG_IXGBE_DCB
8249         if (tc) {
8250                 netdev_set_num_tc(dev, tc);
8251                 ixgbe_set_prio_tc_map(adapter);
8252
8253                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8254
8255                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8256                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8257                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8258                 }
8259         } else {
8260                 netdev_reset_tc(dev);
8261
8262                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8263                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8264
8265                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8266
8267                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8268                 adapter->dcb_cfg.pfc_mode_enable = false;
8269         }
8270
8271         ixgbe_validate_rtr(adapter, tc);
8272
8273 #endif /* CONFIG_IXGBE_DCB */
8274         ixgbe_init_interrupt_scheme(adapter);
8275
8276         if (netif_running(dev))
8277                 return ixgbe_open(dev);
8278
8279         return 0;
8280 }
8281
8282 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8283                                struct tc_cls_u32_offload *cls)
8284 {
8285         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8286         u32 loc;
8287         int err;
8288
8289         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8290                 return -EINVAL;
8291
8292         loc = cls->knode.handle & 0xfffff;
8293
8294         spin_lock(&adapter->fdir_perfect_lock);
8295         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8296         spin_unlock(&adapter->fdir_perfect_lock);
8297         return err;
8298 }
8299
8300 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8301                                             __be16 protocol,
8302                                             struct tc_cls_u32_offload *cls)
8303 {
8304         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8305
8306         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8307                 return -EINVAL;
8308
8309         /* This ixgbe devices do not support hash tables at the moment
8310          * so abort when given hash tables.
8311          */
8312         if (cls->hnode.divisor > 0)
8313                 return -EINVAL;
8314
8315         set_bit(uhtid - 1, &adapter->tables);
8316         return 0;
8317 }
8318
8319 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8320                                             struct tc_cls_u32_offload *cls)
8321 {
8322         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8323
8324         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8325                 return -EINVAL;
8326
8327         clear_bit(uhtid - 1, &adapter->tables);
8328         return 0;
8329 }
8330
8331 #ifdef CONFIG_NET_CLS_ACT
8332 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8333                                   u8 *queue, u64 *action)
8334 {
8335         unsigned int num_vfs = adapter->num_vfs, vf;
8336         struct net_device *upper;
8337         struct list_head *iter;
8338
8339         /* redirect to a SRIOV VF */
8340         for (vf = 0; vf < num_vfs; ++vf) {
8341                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8342                 if (upper->ifindex == ifindex) {
8343                         if (adapter->num_rx_pools > 1)
8344                                 *queue = vf * 2;
8345                         else
8346                                 *queue = vf * adapter->num_rx_queues_per_pool;
8347
8348                         *action = vf + 1;
8349                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8350                         return 0;
8351                 }
8352         }
8353
8354         /* redirect to a offloaded macvlan netdev */
8355         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
8356                 if (netif_is_macvlan(upper)) {
8357                         struct macvlan_dev *dfwd = netdev_priv(upper);
8358                         struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8359
8360                         if (vadapter && vadapter->netdev->ifindex == ifindex) {
8361                                 *queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8362                                 *action = *queue;
8363                                 return 0;
8364                         }
8365                 }
8366         }
8367
8368         return -EINVAL;
8369 }
8370
8371 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8372                             struct tcf_exts *exts, u64 *action, u8 *queue)
8373 {
8374         const struct tc_action *a;
8375         int err;
8376
8377         if (tc_no_actions(exts))
8378                 return -EINVAL;
8379
8380         tc_for_each_action(a, exts) {
8381
8382                 /* Drop action */
8383                 if (is_tcf_gact_shot(a)) {
8384                         *action = IXGBE_FDIR_DROP_QUEUE;
8385                         *queue = IXGBE_FDIR_DROP_QUEUE;
8386                         return 0;
8387                 }
8388
8389                 /* Redirect to a VF or a offloaded macvlan */
8390                 if (is_tcf_mirred_redirect(a)) {
8391                         int ifindex = tcf_mirred_ifindex(a);
8392
8393                         err = handle_redirect_action(adapter, ifindex, queue,
8394                                                      action);
8395                         if (err == 0)
8396                                 return err;
8397                 }
8398         }
8399
8400         return -EINVAL;
8401 }
8402 #else
8403 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8404                             struct tcf_exts *exts, u64 *action, u8 *queue)
8405 {
8406         return -EINVAL;
8407 }
8408 #endif /* CONFIG_NET_CLS_ACT */
8409
8410 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
8411                                     union ixgbe_atr_input *mask,
8412                                     struct tc_cls_u32_offload *cls,
8413                                     struct ixgbe_mat_field *field_ptr,
8414                                     struct ixgbe_nexthdr *nexthdr)
8415 {
8416         int i, j, off;
8417         __be32 val, m;
8418         bool found_entry = false, found_jump_field = false;
8419
8420         for (i = 0; i < cls->knode.sel->nkeys; i++) {
8421                 off = cls->knode.sel->keys[i].off;
8422                 val = cls->knode.sel->keys[i].val;
8423                 m = cls->knode.sel->keys[i].mask;
8424
8425                 for (j = 0; field_ptr[j].val; j++) {
8426                         if (field_ptr[j].off == off) {
8427                                 field_ptr[j].val(input, mask, val, m);
8428                                 input->filter.formatted.flow_type |=
8429                                         field_ptr[j].type;
8430                                 found_entry = true;
8431                                 break;
8432                         }
8433                 }
8434                 if (nexthdr) {
8435                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
8436                             nexthdr->val == cls->knode.sel->keys[i].val &&
8437                             nexthdr->mask == cls->knode.sel->keys[i].mask)
8438                                 found_jump_field = true;
8439                         else
8440                                 continue;
8441                 }
8442         }
8443
8444         if (nexthdr && !found_jump_field)
8445                 return -EINVAL;
8446
8447         if (!found_entry)
8448                 return 0;
8449
8450         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
8451                                     IXGBE_ATR_L4TYPE_MASK;
8452
8453         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
8454                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
8455
8456         return 0;
8457 }
8458
8459 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
8460                                   __be16 protocol,
8461                                   struct tc_cls_u32_offload *cls)
8462 {
8463         u32 loc = cls->knode.handle & 0xfffff;
8464         struct ixgbe_hw *hw = &adapter->hw;
8465         struct ixgbe_mat_field *field_ptr;
8466         struct ixgbe_fdir_filter *input = NULL;
8467         union ixgbe_atr_input *mask = NULL;
8468         struct ixgbe_jump_table *jump = NULL;
8469         int i, err = -EINVAL;
8470         u8 queue;
8471         u32 uhtid, link_uhtid;
8472
8473         uhtid = TC_U32_USERHTID(cls->knode.handle);
8474         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
8475
8476         /* At the moment cls_u32 jumps to network layer and skips past
8477          * L2 headers. The canonical method to match L2 frames is to use
8478          * negative values. However this is error prone at best but really
8479          * just broken because there is no way to "know" what sort of hdr
8480          * is in front of the network layer. Fix cls_u32 to support L2
8481          * headers when needed.
8482          */
8483         if (protocol != htons(ETH_P_IP))
8484                 return err;
8485
8486         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
8487                 e_err(drv, "Location out of range\n");
8488                 return err;
8489         }
8490
8491         /* cls u32 is a graph starting at root node 0x800. The driver tracks
8492          * links and also the fields used to advance the parser across each
8493          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8494          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8495          * To add support for new nodes update ixgbe_model.h parse structures
8496          * this function _should_ be generic try not to hardcode values here.
8497          */
8498         if (uhtid == 0x800) {
8499                 field_ptr = (adapter->jump_tables[0])->mat;
8500         } else {
8501                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8502                         return err;
8503                 if (!adapter->jump_tables[uhtid])
8504                         return err;
8505                 field_ptr = (adapter->jump_tables[uhtid])->mat;
8506         }
8507
8508         if (!field_ptr)
8509                 return err;
8510
8511         /* At this point we know the field_ptr is valid and need to either
8512          * build cls_u32 link or attach filter. Because adding a link to
8513          * a handle that does not exist is invalid and the same for adding
8514          * rules to handles that don't exist.
8515          */
8516
8517         if (link_uhtid) {
8518                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
8519
8520                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
8521                         return err;
8522
8523                 if (!test_bit(link_uhtid - 1, &adapter->tables))
8524                         return err;
8525
8526                 for (i = 0; nexthdr[i].jump; i++) {
8527                         if (nexthdr[i].o != cls->knode.sel->offoff ||
8528                             nexthdr[i].s != cls->knode.sel->offshift ||
8529                             nexthdr[i].m != cls->knode.sel->offmask)
8530                                 return err;
8531
8532                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
8533                         if (!jump)
8534                                 return -ENOMEM;
8535                         input = kzalloc(sizeof(*input), GFP_KERNEL);
8536                         if (!input) {
8537                                 err = -ENOMEM;
8538                                 goto free_jump;
8539                         }
8540                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8541                         if (!mask) {
8542                                 err = -ENOMEM;
8543                                 goto free_input;
8544                         }
8545                         jump->input = input;
8546                         jump->mask = mask;
8547                         err = ixgbe_clsu32_build_input(input, mask, cls,
8548                                                        field_ptr, &nexthdr[i]);
8549                         if (!err) {
8550                                 jump->mat = nexthdr[i].jump;
8551                                 adapter->jump_tables[link_uhtid] = jump;
8552                                 break;
8553                         }
8554                 }
8555                 return 0;
8556         }
8557
8558         input = kzalloc(sizeof(*input), GFP_KERNEL);
8559         if (!input)
8560                 return -ENOMEM;
8561         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8562         if (!mask) {
8563                 err = -ENOMEM;
8564                 goto free_input;
8565         }
8566
8567         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
8568                 if ((adapter->jump_tables[uhtid])->input)
8569                         memcpy(input, (adapter->jump_tables[uhtid])->input,
8570                                sizeof(*input));
8571                 if ((adapter->jump_tables[uhtid])->mask)
8572                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
8573                                sizeof(*mask));
8574         }
8575         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
8576         if (err)
8577                 goto err_out;
8578
8579         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
8580                                &queue);
8581         if (err < 0)
8582                 goto err_out;
8583
8584         input->sw_idx = loc;
8585
8586         spin_lock(&adapter->fdir_perfect_lock);
8587
8588         if (hlist_empty(&adapter->fdir_filter_list)) {
8589                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
8590                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
8591                 if (err)
8592                         goto err_out_w_lock;
8593         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
8594                 err = -EINVAL;
8595                 goto err_out_w_lock;
8596         }
8597
8598         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
8599         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
8600                                                     input->sw_idx, queue);
8601         if (!err)
8602                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
8603         spin_unlock(&adapter->fdir_perfect_lock);
8604
8605         kfree(mask);
8606         return err;
8607 err_out_w_lock:
8608         spin_unlock(&adapter->fdir_perfect_lock);
8609 err_out:
8610         kfree(mask);
8611 free_input:
8612         kfree(input);
8613 free_jump:
8614         kfree(jump);
8615         return err;
8616 }
8617
8618 static int __ixgbe_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
8619                             struct tc_to_netdev *tc)
8620 {
8621         struct ixgbe_adapter *adapter = netdev_priv(dev);
8622
8623         if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) &&
8624             tc->type == TC_SETUP_CLSU32) {
8625                 switch (tc->cls_u32->command) {
8626                 case TC_CLSU32_NEW_KNODE:
8627                 case TC_CLSU32_REPLACE_KNODE:
8628                         return ixgbe_configure_clsu32(adapter,
8629                                                       proto, tc->cls_u32);
8630                 case TC_CLSU32_DELETE_KNODE:
8631                         return ixgbe_delete_clsu32(adapter, tc->cls_u32);
8632                 case TC_CLSU32_NEW_HNODE:
8633                 case TC_CLSU32_REPLACE_HNODE:
8634                         return ixgbe_configure_clsu32_add_hnode(adapter, proto,
8635                                                                 tc->cls_u32);
8636                 case TC_CLSU32_DELETE_HNODE:
8637                         return ixgbe_configure_clsu32_del_hnode(adapter,
8638                                                                 tc->cls_u32);
8639                 default:
8640                         return -EINVAL;
8641                 }
8642         }
8643
8644         if (tc->type != TC_SETUP_MQPRIO)
8645                 return -EINVAL;
8646
8647         return ixgbe_setup_tc(dev, tc->tc);
8648 }
8649
8650 #ifdef CONFIG_PCI_IOV
8651 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
8652 {
8653         struct net_device *netdev = adapter->netdev;
8654
8655         rtnl_lock();
8656         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
8657         rtnl_unlock();
8658 }
8659
8660 #endif
8661 void ixgbe_do_reset(struct net_device *netdev)
8662 {
8663         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8664
8665         if (netif_running(netdev))
8666                 ixgbe_reinit_locked(adapter);
8667         else
8668                 ixgbe_reset(adapter);
8669 }
8670
8671 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
8672                                             netdev_features_t features)
8673 {
8674         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8675
8676         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8677         if (!(features & NETIF_F_RXCSUM))
8678                 features &= ~NETIF_F_LRO;
8679
8680         /* Turn off LRO if not RSC capable */
8681         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
8682                 features &= ~NETIF_F_LRO;
8683
8684         return features;
8685 }
8686
8687 static int ixgbe_set_features(struct net_device *netdev,
8688                               netdev_features_t features)
8689 {
8690         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8691         netdev_features_t changed = netdev->features ^ features;
8692         bool need_reset = false;
8693
8694         /* Make sure RSC matches LRO, reset if change */
8695         if (!(features & NETIF_F_LRO)) {
8696                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8697                         need_reset = true;
8698                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8699         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8700                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8701                 if (adapter->rx_itr_setting == 1 ||
8702                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8703                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8704                         need_reset = true;
8705                 } else if ((changed ^ features) & NETIF_F_LRO) {
8706                         e_info(probe, "rx-usecs set too low, "
8707                                "disabling RSC\n");
8708                 }
8709         }
8710
8711         /*
8712          * Check if Flow Director n-tuple support or hw_tc support was
8713          * enabled or disabled.  If the state changed, we need to reset.
8714          */
8715         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
8716                 /* turn off ATR, enable perfect filters and reset */
8717                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8718                         need_reset = true;
8719
8720                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8721                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8722         } else {
8723                 /* turn off perfect filters, enable ATR and reset */
8724                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8725                         need_reset = true;
8726
8727                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8728
8729                 /* We cannot enable ATR if SR-IOV is enabled */
8730                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
8731                     /* We cannot enable ATR if we have 2 or more tcs */
8732                     (netdev_get_num_tc(netdev) > 1) ||
8733                     /* We cannot enable ATR if RSS is disabled */
8734                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
8735                     /* A sample rate of 0 indicates ATR disabled */
8736                     (!adapter->atr_sample_rate))
8737                         ; /* do nothing not supported */
8738                 else /* otherwise supported and set the flag */
8739                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8740         }
8741
8742         if (changed & NETIF_F_RXALL)
8743                 need_reset = true;
8744
8745         netdev->features = features;
8746
8747 #ifdef CONFIG_IXGBE_VXLAN
8748         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8749                 if (features & NETIF_F_RXCSUM)
8750                         adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8751                 else
8752                         ixgbe_clear_vxlan_port(adapter);
8753         }
8754 #endif /* CONFIG_IXGBE_VXLAN */
8755
8756         if (need_reset)
8757                 ixgbe_do_reset(netdev);
8758         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
8759                             NETIF_F_HW_VLAN_CTAG_FILTER))
8760                 ixgbe_set_rx_mode(netdev);
8761
8762         return 0;
8763 }
8764
8765 #ifdef CONFIG_IXGBE_VXLAN
8766 /**
8767  * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8768  * @dev: The port's netdev
8769  * @sa_family: Socket Family that VXLAN is notifiying us about
8770  * @port: New UDP port number that VXLAN started listening to
8771  **/
8772 static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8773                                  __be16 port)
8774 {
8775         struct ixgbe_adapter *adapter = netdev_priv(dev);
8776         struct ixgbe_hw *hw = &adapter->hw;
8777
8778         if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8779                 return;
8780
8781         if (sa_family == AF_INET6)
8782                 return;
8783
8784         if (adapter->vxlan_port == port)
8785                 return;
8786
8787         if (adapter->vxlan_port) {
8788                 netdev_info(dev,
8789                             "Hit Max num of VXLAN ports, not adding port %d\n",
8790                             ntohs(port));
8791                 return;
8792         }
8793
8794         adapter->vxlan_port = port;
8795         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, ntohs(port));
8796 }
8797
8798 /**
8799  * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8800  * @dev: The port's netdev
8801  * @sa_family: Socket Family that VXLAN is notifying us about
8802  * @port: UDP port number that VXLAN stopped listening to
8803  **/
8804 static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8805                                  __be16 port)
8806 {
8807         struct ixgbe_adapter *adapter = netdev_priv(dev);
8808
8809         if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8810                 return;
8811
8812         if (sa_family == AF_INET6)
8813                 return;
8814
8815         if (adapter->vxlan_port != port) {
8816                 netdev_info(dev, "Port %d was not found, not deleting\n",
8817                             ntohs(port));
8818                 return;
8819         }
8820
8821         ixgbe_clear_vxlan_port(adapter);
8822         adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8823 }
8824 #endif /* CONFIG_IXGBE_VXLAN */
8825
8826 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8827                              struct net_device *dev,
8828                              const unsigned char *addr, u16 vid,
8829                              u16 flags)
8830 {
8831         /* guarantee we can provide a unique filter for the unicast address */
8832         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8833                 struct ixgbe_adapter *adapter = netdev_priv(dev);
8834                 u16 pool = VMDQ_P(0);
8835
8836                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
8837                         return -ENOMEM;
8838         }
8839
8840         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8841 }
8842
8843 /**
8844  * ixgbe_configure_bridge_mode - set various bridge modes
8845  * @adapter - the private structure
8846  * @mode - requested bridge mode
8847  *
8848  * Configure some settings require for various bridge modes.
8849  **/
8850 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8851                                        __u16 mode)
8852 {
8853         struct ixgbe_hw *hw = &adapter->hw;
8854         unsigned int p, num_pools;
8855         u32 vmdctl;
8856
8857         switch (mode) {
8858         case BRIDGE_MODE_VEPA:
8859                 /* disable Tx loopback, rely on switch hairpin mode */
8860                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8861
8862                 /* must enable Rx switching replication to allow multicast
8863                  * packet reception on all VFs, and to enable source address
8864                  * pruning.
8865                  */
8866                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8867                 vmdctl |= IXGBE_VT_CTL_REPLEN;
8868                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8869
8870                 /* enable Rx source address pruning. Note, this requires
8871                  * replication to be enabled or else it does nothing.
8872                  */
8873                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8874                 for (p = 0; p < num_pools; p++) {
8875                         if (hw->mac.ops.set_source_address_pruning)
8876                                 hw->mac.ops.set_source_address_pruning(hw,
8877                                                                        true,
8878                                                                        p);
8879                 }
8880                 break;
8881         case BRIDGE_MODE_VEB:
8882                 /* enable Tx loopback for internal VF/PF communication */
8883                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
8884                                 IXGBE_PFDTXGSWC_VT_LBEN);
8885
8886                 /* disable Rx switching replication unless we have SR-IOV
8887                  * virtual functions
8888                  */
8889                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8890                 if (!adapter->num_vfs)
8891                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
8892                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8893
8894                 /* disable Rx source address pruning, since we don't expect to
8895                  * be receiving external loopback of our transmitted frames.
8896                  */
8897                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8898                 for (p = 0; p < num_pools; p++) {
8899                         if (hw->mac.ops.set_source_address_pruning)
8900                                 hw->mac.ops.set_source_address_pruning(hw,
8901                                                                        false,
8902                                                                        p);
8903                 }
8904                 break;
8905         default:
8906                 return -EINVAL;
8907         }
8908
8909         adapter->bridge_mode = mode;
8910
8911         e_info(drv, "enabling bridge mode: %s\n",
8912                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8913
8914         return 0;
8915 }
8916
8917 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
8918                                     struct nlmsghdr *nlh, u16 flags)
8919 {
8920         struct ixgbe_adapter *adapter = netdev_priv(dev);
8921         struct nlattr *attr, *br_spec;
8922         int rem;
8923
8924         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8925                 return -EOPNOTSUPP;
8926
8927         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8928         if (!br_spec)
8929                 return -EINVAL;
8930
8931         nla_for_each_nested(attr, br_spec, rem) {
8932                 int status;
8933                 __u16 mode;
8934
8935                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8936                         continue;
8937
8938                 if (nla_len(attr) < sizeof(mode))
8939                         return -EINVAL;
8940
8941                 mode = nla_get_u16(attr);
8942                 status = ixgbe_configure_bridge_mode(adapter, mode);
8943                 if (status)
8944                         return status;
8945
8946                 break;
8947         }
8948
8949         return 0;
8950 }
8951
8952 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8953                                     struct net_device *dev,
8954                                     u32 filter_mask, int nlflags)
8955 {
8956         struct ixgbe_adapter *adapter = netdev_priv(dev);
8957
8958         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8959                 return 0;
8960
8961         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
8962                                        adapter->bridge_mode, 0, 0, nlflags,
8963                                        filter_mask, NULL);
8964 }
8965
8966 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
8967 {
8968         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
8969         struct ixgbe_adapter *adapter = netdev_priv(pdev);
8970         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
8971         unsigned int limit;
8972         int pool, err;
8973
8974         /* Hardware has a limited number of available pools. Each VF, and the
8975          * PF require a pool. Check to ensure we don't attempt to use more
8976          * then the available number of pools.
8977          */
8978         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
8979                 return ERR_PTR(-EINVAL);
8980
8981 #ifdef CONFIG_RPS
8982         if (vdev->num_rx_queues != vdev->num_tx_queues) {
8983                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
8984                             vdev->name);
8985                 return ERR_PTR(-EINVAL);
8986         }
8987 #endif
8988         /* Check for hardware restriction on number of rx/tx queues */
8989         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
8990             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
8991                 netdev_info(pdev,
8992                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8993                             pdev->name);
8994                 return ERR_PTR(-EINVAL);
8995         }
8996
8997         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8998               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
8999             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9000                 return ERR_PTR(-EBUSY);
9001
9002         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9003         if (!fwd_adapter)
9004                 return ERR_PTR(-ENOMEM);
9005
9006         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9007         adapter->num_rx_pools++;
9008         set_bit(pool, &adapter->fwd_bitmask);
9009         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9010
9011         /* Enable VMDq flag so device will be set in VM mode */
9012         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9013         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9014         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9015
9016         /* Force reinit of ring allocation with VMDQ enabled */
9017         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9018         if (err)
9019                 goto fwd_add_err;
9020         fwd_adapter->pool = pool;
9021         fwd_adapter->real_adapter = adapter;
9022         err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9023         if (err)
9024                 goto fwd_add_err;
9025         netif_tx_start_all_queues(vdev);
9026         return fwd_adapter;
9027 fwd_add_err:
9028         /* unwind counter and free adapter struct */
9029         netdev_info(pdev,
9030                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9031         clear_bit(pool, &adapter->fwd_bitmask);
9032         adapter->num_rx_pools--;
9033         kfree(fwd_adapter);
9034         return ERR_PTR(err);
9035 }
9036
9037 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9038 {
9039         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9040         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9041         unsigned int limit;
9042
9043         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9044         adapter->num_rx_pools--;
9045
9046         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9047         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9048         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9049         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9050         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9051                    fwd_adapter->pool, adapter->num_rx_pools,
9052                    fwd_adapter->rx_base_queue,
9053                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9054                    adapter->fwd_bitmask);
9055         kfree(fwd_adapter);
9056 }
9057
9058 #define IXGBE_MAX_MAC_HDR_LEN           127
9059 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9060
9061 static netdev_features_t
9062 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9063                      netdev_features_t features)
9064 {
9065         unsigned int network_hdr_len, mac_hdr_len;
9066
9067         /* Make certain the headers can be described by a context descriptor */
9068         mac_hdr_len = skb_network_header(skb) - skb->data;
9069         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9070                 return features & ~(NETIF_F_HW_CSUM |
9071                                     NETIF_F_SCTP_CRC |
9072                                     NETIF_F_HW_VLAN_CTAG_TX |
9073                                     NETIF_F_TSO |
9074                                     NETIF_F_TSO6);
9075
9076         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9077         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9078                 return features & ~(NETIF_F_HW_CSUM |
9079                                     NETIF_F_SCTP_CRC |
9080                                     NETIF_F_TSO |
9081                                     NETIF_F_TSO6);
9082
9083         /* We can only support IPV4 TSO in tunnels if we can mangle the
9084          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9085          */
9086         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9087                 features &= ~NETIF_F_TSO;
9088
9089         return features;
9090 }
9091
9092 static const struct net_device_ops ixgbe_netdev_ops = {
9093         .ndo_open               = ixgbe_open,
9094         .ndo_stop               = ixgbe_close,
9095         .ndo_start_xmit         = ixgbe_xmit_frame,
9096         .ndo_select_queue       = ixgbe_select_queue,
9097         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
9098         .ndo_validate_addr      = eth_validate_addr,
9099         .ndo_set_mac_address    = ixgbe_set_mac,
9100         .ndo_change_mtu         = ixgbe_change_mtu,
9101         .ndo_tx_timeout         = ixgbe_tx_timeout,
9102         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
9103         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
9104         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
9105         .ndo_do_ioctl           = ixgbe_ioctl,
9106         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
9107         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
9108         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
9109         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
9110         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9111         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
9112         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
9113         .ndo_get_stats64        = ixgbe_get_stats64,
9114         .ndo_setup_tc           = __ixgbe_setup_tc,
9115 #ifdef CONFIG_NET_POLL_CONTROLLER
9116         .ndo_poll_controller    = ixgbe_netpoll,
9117 #endif
9118 #ifdef CONFIG_NET_RX_BUSY_POLL
9119         .ndo_busy_poll          = ixgbe_low_latency_recv,
9120 #endif
9121 #ifdef IXGBE_FCOE
9122         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9123         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9124         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9125         .ndo_fcoe_enable = ixgbe_fcoe_enable,
9126         .ndo_fcoe_disable = ixgbe_fcoe_disable,
9127         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9128         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9129 #endif /* IXGBE_FCOE */
9130         .ndo_set_features = ixgbe_set_features,
9131         .ndo_fix_features = ixgbe_fix_features,
9132         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
9133         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
9134         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
9135         .ndo_dfwd_add_station   = ixgbe_fwd_add,
9136         .ndo_dfwd_del_station   = ixgbe_fwd_del,
9137 #ifdef CONFIG_IXGBE_VXLAN
9138         .ndo_add_vxlan_port     = ixgbe_add_vxlan_port,
9139         .ndo_del_vxlan_port     = ixgbe_del_vxlan_port,
9140 #endif /* CONFIG_IXGBE_VXLAN */
9141         .ndo_features_check     = ixgbe_features_check,
9142 };
9143
9144 /**
9145  * ixgbe_enumerate_functions - Get the number of ports this device has
9146  * @adapter: adapter structure
9147  *
9148  * This function enumerates the phsyical functions co-located on a single slot,
9149  * in order to determine how many ports a device has. This is most useful in
9150  * determining the required GT/s of PCIe bandwidth necessary for optimal
9151  * performance.
9152  **/
9153 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
9154 {
9155         struct pci_dev *entry, *pdev = adapter->pdev;
9156         int physfns = 0;
9157
9158         /* Some cards can not use the generic count PCIe functions method,
9159          * because they are behind a parent switch, so we hardcode these with
9160          * the correct number of functions.
9161          */
9162         if (ixgbe_pcie_from_parent(&adapter->hw))
9163                 physfns = 4;
9164
9165         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
9166                 /* don't count virtual functions */
9167                 if (entry->is_virtfn)
9168                         continue;
9169
9170                 /* When the devices on the bus don't all match our device ID,
9171                  * we can't reliably determine the correct number of
9172                  * functions. This can occur if a function has been direct
9173                  * attached to a virtual machine using VT-d, for example. In
9174                  * this case, simply return -1 to indicate this.
9175                  */
9176                 if ((entry->vendor != pdev->vendor) ||
9177                     (entry->device != pdev->device))
9178                         return -1;
9179
9180                 physfns++;
9181         }
9182
9183         return physfns;
9184 }
9185
9186 /**
9187  * ixgbe_wol_supported - Check whether device supports WoL
9188  * @adapter: the adapter private structure
9189  * @device_id: the device ID
9190  * @subdev_id: the subsystem device ID
9191  *
9192  * This function is used by probe and ethtool to determine
9193  * which devices have WoL support
9194  *
9195  **/
9196 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
9197                          u16 subdevice_id)
9198 {
9199         struct ixgbe_hw *hw = &adapter->hw;
9200         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
9201
9202         /* WOL not supported on 82598 */
9203         if (hw->mac.type == ixgbe_mac_82598EB)
9204                 return false;
9205
9206         /* check eeprom to see if WOL is enabled for X540 and newer */
9207         if (hw->mac.type >= ixgbe_mac_X540) {
9208                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
9209                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
9210                      (hw->bus.func == 0)))
9211                         return true;
9212         }
9213
9214         /* WOL is determined based on device IDs for 82599 MACs */
9215         switch (device_id) {
9216         case IXGBE_DEV_ID_82599_SFP:
9217                 /* Only these subdevices could supports WOL */
9218                 switch (subdevice_id) {
9219                 case IXGBE_SUBDEV_ID_82599_560FLR:
9220                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
9221                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
9222                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
9223                         /* only support first port */
9224                         if (hw->bus.func != 0)
9225                                 break;
9226                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
9227                 case IXGBE_SUBDEV_ID_82599_SFP:
9228                 case IXGBE_SUBDEV_ID_82599_RNDC:
9229                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
9230                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
9231                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
9232                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
9233                         return true;
9234                 }
9235                 break;
9236         case IXGBE_DEV_ID_82599EN_SFP:
9237                 /* Only these subdevices support WOL */
9238                 switch (subdevice_id) {
9239                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
9240                         return true;
9241                 }
9242                 break;
9243         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
9244                 /* All except this subdevice support WOL */
9245                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
9246                         return true;
9247                 break;
9248         case IXGBE_DEV_ID_82599_KX4:
9249                 return  true;
9250         default:
9251                 break;
9252         }
9253
9254         return false;
9255 }
9256
9257 /**
9258  * ixgbe_probe - Device Initialization Routine
9259  * @pdev: PCI device information struct
9260  * @ent: entry in ixgbe_pci_tbl
9261  *
9262  * Returns 0 on success, negative on failure
9263  *
9264  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9265  * The OS initialization, configuring of the adapter private structure,
9266  * and a hardware reset occur.
9267  **/
9268 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9269 {
9270         struct net_device *netdev;
9271         struct ixgbe_adapter *adapter = NULL;
9272         struct ixgbe_hw *hw;
9273         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
9274         int i, err, pci_using_dac, expected_gts;
9275         unsigned int indices = MAX_TX_QUEUES;
9276         u8 part_str[IXGBE_PBANUM_LENGTH];
9277         bool disable_dev = false;
9278 #ifdef IXGBE_FCOE
9279         u16 device_caps;
9280 #endif
9281         u32 eec;
9282
9283         /* Catch broken hardware that put the wrong VF device ID in
9284          * the PCIe SR-IOV capability.
9285          */
9286         if (pdev->is_virtfn) {
9287                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
9288                      pci_name(pdev), pdev->vendor, pdev->device);
9289                 return -EINVAL;
9290         }
9291
9292         err = pci_enable_device_mem(pdev);
9293         if (err)
9294                 return err;
9295
9296         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
9297                 pci_using_dac = 1;
9298         } else {
9299                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9300                 if (err) {
9301                         dev_err(&pdev->dev,
9302                                 "No usable DMA configuration, aborting\n");
9303                         goto err_dma;
9304                 }
9305                 pci_using_dac = 0;
9306         }
9307
9308         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9309                                            IORESOURCE_MEM), ixgbe_driver_name);
9310         if (err) {
9311                 dev_err(&pdev->dev,
9312                         "pci_request_selected_regions failed 0x%x\n", err);
9313                 goto err_pci_reg;
9314         }
9315
9316         pci_enable_pcie_error_reporting(pdev);
9317
9318         pci_set_master(pdev);
9319         pci_save_state(pdev);
9320
9321         if (ii->mac == ixgbe_mac_82598EB) {
9322 #ifdef CONFIG_IXGBE_DCB
9323                 /* 8 TC w/ 4 queues per TC */
9324                 indices = 4 * MAX_TRAFFIC_CLASS;
9325 #else
9326                 indices = IXGBE_MAX_RSS_INDICES;
9327 #endif
9328         }
9329
9330         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
9331         if (!netdev) {
9332                 err = -ENOMEM;
9333                 goto err_alloc_etherdev;
9334         }
9335
9336         SET_NETDEV_DEV(netdev, &pdev->dev);
9337
9338         adapter = netdev_priv(netdev);
9339
9340         adapter->netdev = netdev;
9341         adapter->pdev = pdev;
9342         hw = &adapter->hw;
9343         hw->back = adapter;
9344         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
9345
9346         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9347                               pci_resource_len(pdev, 0));
9348         adapter->io_addr = hw->hw_addr;
9349         if (!hw->hw_addr) {
9350                 err = -EIO;
9351                 goto err_ioremap;
9352         }
9353
9354         netdev->netdev_ops = &ixgbe_netdev_ops;
9355         ixgbe_set_ethtool_ops(netdev);
9356         netdev->watchdog_timeo = 5 * HZ;
9357         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
9358
9359         /* Setup hw api */
9360         hw->mac.ops   = *ii->mac_ops;
9361         hw->mac.type  = ii->mac;
9362         hw->mvals     = ii->mvals;
9363
9364         /* EEPROM */
9365         hw->eeprom.ops = *ii->eeprom_ops;
9366         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
9367         if (ixgbe_removed(hw->hw_addr)) {
9368                 err = -EIO;
9369                 goto err_ioremap;
9370         }
9371         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9372         if (!(eec & BIT(8)))
9373                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
9374
9375         /* PHY */
9376         hw->phy.ops = *ii->phy_ops;
9377         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
9378         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9379         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
9380         hw->phy.mdio.mmds = 0;
9381         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
9382         hw->phy.mdio.dev = netdev;
9383         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
9384         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
9385
9386         ii->get_invariants(hw);
9387
9388         /* setup the private structure */
9389         err = ixgbe_sw_init(adapter);
9390         if (err)
9391                 goto err_sw_init;
9392
9393         /* Make sure the SWFW semaphore is in a valid state */
9394         if (hw->mac.ops.init_swfw_sync)
9395                 hw->mac.ops.init_swfw_sync(hw);
9396
9397         /* Make it possible the adapter to be woken up via WOL */
9398         switch (adapter->hw.mac.type) {
9399         case ixgbe_mac_82599EB:
9400         case ixgbe_mac_X540:
9401         case ixgbe_mac_X550:
9402         case ixgbe_mac_X550EM_x:
9403         case ixgbe_mac_x550em_a:
9404                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9405                 break;
9406         default:
9407                 break;
9408         }
9409
9410         /*
9411          * If there is a fan on this device and it has failed log the
9412          * failure.
9413          */
9414         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
9415                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
9416                 if (esdp & IXGBE_ESDP_SDP1)
9417                         e_crit(probe, "Fan has stopped, replace the adapter\n");
9418         }
9419
9420         if (allow_unsupported_sfp)
9421                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
9422
9423         /* reset_hw fills in the perm_addr as well */
9424         hw->phy.reset_if_overtemp = true;
9425         err = hw->mac.ops.reset_hw(hw);
9426         hw->phy.reset_if_overtemp = false;
9427         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
9428                 err = 0;
9429         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
9430                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9431                 e_dev_err("Reload the driver after installing a supported module.\n");
9432                 goto err_sw_init;
9433         } else if (err) {
9434                 e_dev_err("HW Init failed: %d\n", err);
9435                 goto err_sw_init;
9436         }
9437
9438 #ifdef CONFIG_PCI_IOV
9439         /* SR-IOV not supported on the 82598 */
9440         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9441                 goto skip_sriov;
9442         /* Mailbox */
9443         ixgbe_init_mbx_params_pf(hw);
9444         hw->mbx.ops = ii->mbx_ops;
9445         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
9446         ixgbe_enable_sriov(adapter);
9447 skip_sriov:
9448
9449 #endif
9450         netdev->features = NETIF_F_SG |
9451                            NETIF_F_TSO |
9452                            NETIF_F_TSO6 |
9453                            NETIF_F_RXHASH |
9454                            NETIF_F_RXCSUM |
9455                            NETIF_F_HW_CSUM;
9456
9457 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
9458                                     NETIF_F_GSO_GRE_CSUM | \
9459                                     NETIF_F_GSO_IPIP | \
9460                                     NETIF_F_GSO_SIT | \
9461                                     NETIF_F_GSO_UDP_TUNNEL | \
9462                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
9463
9464         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
9465         netdev->features |= NETIF_F_GSO_PARTIAL |
9466                             IXGBE_GSO_PARTIAL_FEATURES;
9467
9468         if (hw->mac.type >= ixgbe_mac_82599EB)
9469                 netdev->features |= NETIF_F_SCTP_CRC;
9470
9471         /* copy netdev features into list of user selectable features */
9472         netdev->hw_features |= netdev->features |
9473                                NETIF_F_HW_VLAN_CTAG_RX |
9474                                NETIF_F_HW_VLAN_CTAG_TX |
9475                                NETIF_F_RXALL |
9476                                NETIF_F_HW_L2FW_DOFFLOAD;
9477
9478         if (hw->mac.type >= ixgbe_mac_82599EB)
9479                 netdev->hw_features |= NETIF_F_NTUPLE |
9480                                        NETIF_F_HW_TC;
9481
9482         if (pci_using_dac)
9483                 netdev->features |= NETIF_F_HIGHDMA;
9484
9485         /* set this bit last since it cannot be part of vlan_features */
9486         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
9487                             NETIF_F_HW_VLAN_CTAG_RX |
9488                             NETIF_F_HW_VLAN_CTAG_TX;
9489
9490         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
9491         netdev->hw_enc_features |= netdev->vlan_features;
9492         netdev->mpls_features |= NETIF_F_HW_CSUM;
9493
9494         netdev->priv_flags |= IFF_UNICAST_FLT;
9495         netdev->priv_flags |= IFF_SUPP_NOFCS;
9496
9497 #ifdef CONFIG_IXGBE_DCB
9498         netdev->dcbnl_ops = &dcbnl_ops;
9499 #endif
9500
9501 #ifdef IXGBE_FCOE
9502         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
9503                 unsigned int fcoe_l;
9504
9505                 if (hw->mac.ops.get_device_caps) {
9506                         hw->mac.ops.get_device_caps(hw, &device_caps);
9507                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
9508                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
9509                 }
9510
9511
9512                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
9513                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
9514
9515                 netdev->features |= NETIF_F_FSO |
9516                                     NETIF_F_FCOE_CRC;
9517
9518                 netdev->vlan_features |= NETIF_F_FSO |
9519                                          NETIF_F_FCOE_CRC |
9520                                          NETIF_F_FCOE_MTU;
9521         }
9522 #endif /* IXGBE_FCOE */
9523
9524         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
9525                 netdev->hw_features |= NETIF_F_LRO;
9526         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9527                 netdev->features |= NETIF_F_LRO;
9528
9529         /* make sure the EEPROM is good */
9530         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
9531                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9532                 err = -EIO;
9533                 goto err_sw_init;
9534         }
9535
9536         eth_platform_get_mac_address(&adapter->pdev->dev,
9537                                      adapter->hw.mac.perm_addr);
9538
9539         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
9540
9541         if (!is_valid_ether_addr(netdev->dev_addr)) {
9542                 e_dev_err("invalid MAC address\n");
9543                 err = -EIO;
9544                 goto err_sw_init;
9545         }
9546
9547         /* Set hw->mac.addr to permanent MAC address */
9548         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
9549         ixgbe_mac_set_default_filter(adapter);
9550
9551         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
9552                     (unsigned long) adapter);
9553
9554         if (ixgbe_removed(hw->hw_addr)) {
9555                 err = -EIO;
9556                 goto err_sw_init;
9557         }
9558         INIT_WORK(&adapter->service_task, ixgbe_service_task);
9559         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
9560         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
9561
9562         err = ixgbe_init_interrupt_scheme(adapter);
9563         if (err)
9564                 goto err_sw_init;
9565
9566         /* WOL not supported for all devices */
9567         adapter->wol = 0;
9568         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
9569         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
9570                                                 pdev->subsystem_device);
9571         if (hw->wol_enabled)
9572                 adapter->wol = IXGBE_WUFC_MAG;
9573
9574         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
9575
9576         /* save off EEPROM version number */
9577         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
9578         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
9579
9580         /* pick up the PCI bus settings for reporting later */
9581         if (ixgbe_pcie_from_parent(hw))
9582                 ixgbe_get_parent_bus_info(adapter);
9583         else
9584                  hw->mac.ops.get_bus_info(hw);
9585
9586         /* calculate the expected PCIe bandwidth required for optimal
9587          * performance. Note that some older parts will never have enough
9588          * bandwidth due to being older generation PCIe parts. We clamp these
9589          * parts to ensure no warning is displayed if it can't be fixed.
9590          */
9591         switch (hw->mac.type) {
9592         case ixgbe_mac_82598EB:
9593                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
9594                 break;
9595         default:
9596                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
9597                 break;
9598         }
9599
9600         /* don't check link if we failed to enumerate functions */
9601         if (expected_gts > 0)
9602                 ixgbe_check_minimum_link(adapter, expected_gts);
9603
9604         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
9605         if (err)
9606                 strlcpy(part_str, "Unknown", sizeof(part_str));
9607         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
9608                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9609                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
9610                            part_str);
9611         else
9612                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9613                            hw->mac.type, hw->phy.type, part_str);
9614
9615         e_dev_info("%pM\n", netdev->dev_addr);
9616
9617         /* reset the hardware with the new settings */
9618         err = hw->mac.ops.start_hw(hw);
9619         if (err == IXGBE_ERR_EEPROM_VERSION) {
9620                 /* We are running on a pre-production device, log a warning */
9621                 e_dev_warn("This device is a pre-production adapter/LOM. "
9622                            "Please be aware there may be issues associated "
9623                            "with your hardware.  If you are experiencing "
9624                            "problems please contact your Intel or hardware "
9625                            "representative who provided you with this "
9626                            "hardware.\n");
9627         }
9628         strcpy(netdev->name, "eth%d");
9629         err = register_netdev(netdev);
9630         if (err)
9631                 goto err_register;
9632
9633         pci_set_drvdata(pdev, adapter);
9634
9635         /* power down the optics for 82599 SFP+ fiber */
9636         if (hw->mac.ops.disable_tx_laser)
9637                 hw->mac.ops.disable_tx_laser(hw);
9638
9639         /* carrier off reporting is important to ethtool even BEFORE open */
9640         netif_carrier_off(netdev);
9641
9642 #ifdef CONFIG_IXGBE_DCA
9643         if (dca_add_requester(&pdev->dev) == 0) {
9644                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
9645                 ixgbe_setup_dca(adapter);
9646         }
9647 #endif
9648         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
9649                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
9650                 for (i = 0; i < adapter->num_vfs; i++)
9651                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
9652         }
9653
9654         /* firmware requires driver version to be 0xFFFFFFFF
9655          * since os does not support feature
9656          */
9657         if (hw->mac.ops.set_fw_drv_ver)
9658                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
9659                                            0xFF);
9660
9661         /* add san mac addr to netdev */
9662         ixgbe_add_sanmac_netdev(netdev);
9663
9664         e_dev_info("%s\n", ixgbe_default_device_descr);
9665
9666 #ifdef CONFIG_IXGBE_HWMON
9667         if (ixgbe_sysfs_init(adapter))
9668                 e_err(probe, "failed to allocate sysfs resources\n");
9669 #endif /* CONFIG_IXGBE_HWMON */
9670
9671         ixgbe_dbg_adapter_init(adapter);
9672
9673         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9674         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
9675                 hw->mac.ops.setup_link(hw,
9676                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9677                         true);
9678
9679         return 0;
9680
9681 err_register:
9682         ixgbe_release_hw_control(adapter);
9683         ixgbe_clear_interrupt_scheme(adapter);
9684 err_sw_init:
9685         ixgbe_disable_sriov(adapter);
9686         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9687         iounmap(adapter->io_addr);
9688         kfree(adapter->jump_tables[0]);
9689         kfree(adapter->mac_table);
9690 err_ioremap:
9691         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9692         free_netdev(netdev);
9693 err_alloc_etherdev:
9694         pci_release_selected_regions(pdev,
9695                                      pci_select_bars(pdev, IORESOURCE_MEM));
9696 err_pci_reg:
9697 err_dma:
9698         if (!adapter || disable_dev)
9699                 pci_disable_device(pdev);
9700         return err;
9701 }
9702
9703 /**
9704  * ixgbe_remove - Device Removal Routine
9705  * @pdev: PCI device information struct
9706  *
9707  * ixgbe_remove is called by the PCI subsystem to alert the driver
9708  * that it should release a PCI device.  The could be caused by a
9709  * Hot-Plug event, or because the driver is going to be removed from
9710  * memory.
9711  **/
9712 static void ixgbe_remove(struct pci_dev *pdev)
9713 {
9714         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9715         struct net_device *netdev;
9716         bool disable_dev;
9717         int i;
9718
9719         /* if !adapter then we already cleaned up in probe */
9720         if (!adapter)
9721                 return;
9722
9723         netdev  = adapter->netdev;
9724         ixgbe_dbg_adapter_exit(adapter);
9725
9726         set_bit(__IXGBE_REMOVING, &adapter->state);
9727         cancel_work_sync(&adapter->service_task);
9728
9729
9730 #ifdef CONFIG_IXGBE_DCA
9731         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9732                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9733                 dca_remove_requester(&pdev->dev);
9734                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9735                                 IXGBE_DCA_CTRL_DCA_DISABLE);
9736         }
9737
9738 #endif
9739 #ifdef CONFIG_IXGBE_HWMON
9740         ixgbe_sysfs_exit(adapter);
9741 #endif /* CONFIG_IXGBE_HWMON */
9742
9743         /* remove the added san mac */
9744         ixgbe_del_sanmac_netdev(netdev);
9745
9746 #ifdef CONFIG_PCI_IOV
9747         ixgbe_disable_sriov(adapter);
9748 #endif
9749         if (netdev->reg_state == NETREG_REGISTERED)
9750                 unregister_netdev(netdev);
9751
9752         ixgbe_clear_interrupt_scheme(adapter);
9753
9754         ixgbe_release_hw_control(adapter);
9755
9756 #ifdef CONFIG_DCB
9757         kfree(adapter->ixgbe_ieee_pfc);
9758         kfree(adapter->ixgbe_ieee_ets);
9759
9760 #endif
9761         iounmap(adapter->io_addr);
9762         pci_release_selected_regions(pdev, pci_select_bars(pdev,
9763                                      IORESOURCE_MEM));
9764
9765         e_dev_info("complete\n");
9766
9767         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
9768                 if (adapter->jump_tables[i]) {
9769                         kfree(adapter->jump_tables[i]->input);
9770                         kfree(adapter->jump_tables[i]->mask);
9771                 }
9772                 kfree(adapter->jump_tables[i]);
9773         }
9774
9775         kfree(adapter->mac_table);
9776         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9777         free_netdev(netdev);
9778
9779         pci_disable_pcie_error_reporting(pdev);
9780
9781         if (disable_dev)
9782                 pci_disable_device(pdev);
9783 }
9784
9785 /**
9786  * ixgbe_io_error_detected - called when PCI error is detected
9787  * @pdev: Pointer to PCI device
9788  * @state: The current pci connection state
9789  *
9790  * This function is called after a PCI bus error affecting
9791  * this device has been detected.
9792  */
9793 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9794                                                 pci_channel_state_t state)
9795 {
9796         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9797         struct net_device *netdev = adapter->netdev;
9798
9799 #ifdef CONFIG_PCI_IOV
9800         struct ixgbe_hw *hw = &adapter->hw;
9801         struct pci_dev *bdev, *vfdev;
9802         u32 dw0, dw1, dw2, dw3;
9803         int vf, pos;
9804         u16 req_id, pf_func;
9805
9806         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9807             adapter->num_vfs == 0)
9808                 goto skip_bad_vf_detection;
9809
9810         bdev = pdev->bus->self;
9811         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9812                 bdev = bdev->bus->self;
9813
9814         if (!bdev)
9815                 goto skip_bad_vf_detection;
9816
9817         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9818         if (!pos)
9819                 goto skip_bad_vf_detection;
9820
9821         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9822         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9823         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9824         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9825         if (ixgbe_removed(hw->hw_addr))
9826                 goto skip_bad_vf_detection;
9827
9828         req_id = dw1 >> 16;
9829         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9830         if (!(req_id & 0x0080))
9831                 goto skip_bad_vf_detection;
9832
9833         pf_func = req_id & 0x01;
9834         if ((pf_func & 1) == (pdev->devfn & 1)) {
9835                 unsigned int device_id;
9836
9837                 vf = (req_id & 0x7F) >> 1;
9838                 e_dev_err("VF %d has caused a PCIe error\n", vf);
9839                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9840                                 "%8.8x\tdw3: %8.8x\n",
9841                 dw0, dw1, dw2, dw3);
9842                 switch (adapter->hw.mac.type) {
9843                 case ixgbe_mac_82599EB:
9844                         device_id = IXGBE_82599_VF_DEVICE_ID;
9845                         break;
9846                 case ixgbe_mac_X540:
9847                         device_id = IXGBE_X540_VF_DEVICE_ID;
9848                         break;
9849                 case ixgbe_mac_X550:
9850                         device_id = IXGBE_DEV_ID_X550_VF;
9851                         break;
9852                 case ixgbe_mac_X550EM_x:
9853                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
9854                         break;
9855                 case ixgbe_mac_x550em_a:
9856                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
9857                         break;
9858                 default:
9859                         device_id = 0;
9860                         break;
9861                 }
9862
9863                 /* Find the pci device of the offending VF */
9864                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
9865                 while (vfdev) {
9866                         if (vfdev->devfn == (req_id & 0xFF))
9867                                 break;
9868                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9869                                                device_id, vfdev);
9870                 }
9871                 /*
9872                  * There's a slim chance the VF could have been hot plugged,
9873                  * so if it is no longer present we don't need to issue the
9874                  * VFLR.  Just clean up the AER in that case.
9875                  */
9876                 if (vfdev) {
9877                         ixgbe_issue_vf_flr(adapter, vfdev);
9878                         /* Free device reference count */
9879                         pci_dev_put(vfdev);
9880                 }
9881
9882                 pci_cleanup_aer_uncorrect_error_status(pdev);
9883         }
9884
9885         /*
9886          * Even though the error may have occurred on the other port
9887          * we still need to increment the vf error reference count for
9888          * both ports because the I/O resume function will be called
9889          * for both of them.
9890          */
9891         adapter->vferr_refcount++;
9892
9893         return PCI_ERS_RESULT_RECOVERED;
9894
9895 skip_bad_vf_detection:
9896 #endif /* CONFIG_PCI_IOV */
9897         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
9898                 return PCI_ERS_RESULT_DISCONNECT;
9899
9900         rtnl_lock();
9901         netif_device_detach(netdev);
9902
9903         if (state == pci_channel_io_perm_failure) {
9904                 rtnl_unlock();
9905                 return PCI_ERS_RESULT_DISCONNECT;
9906         }
9907
9908         if (netif_running(netdev))
9909                 ixgbe_down(adapter);
9910
9911         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
9912                 pci_disable_device(pdev);
9913         rtnl_unlock();
9914
9915         /* Request a slot reset. */
9916         return PCI_ERS_RESULT_NEED_RESET;
9917 }
9918
9919 /**
9920  * ixgbe_io_slot_reset - called after the pci bus has been reset.
9921  * @pdev: Pointer to PCI device
9922  *
9923  * Restart the card from scratch, as if from a cold-boot.
9924  */
9925 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
9926 {
9927         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9928         pci_ers_result_t result;
9929         int err;
9930
9931         if (pci_enable_device_mem(pdev)) {
9932                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
9933                 result = PCI_ERS_RESULT_DISCONNECT;
9934         } else {
9935                 smp_mb__before_atomic();
9936                 clear_bit(__IXGBE_DISABLED, &adapter->state);
9937                 adapter->hw.hw_addr = adapter->io_addr;
9938                 pci_set_master(pdev);
9939                 pci_restore_state(pdev);
9940                 pci_save_state(pdev);
9941
9942                 pci_wake_from_d3(pdev, false);
9943
9944                 ixgbe_reset(adapter);
9945                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9946                 result = PCI_ERS_RESULT_RECOVERED;
9947         }
9948
9949         err = pci_cleanup_aer_uncorrect_error_status(pdev);
9950         if (err) {
9951                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9952                           "failed 0x%0x\n", err);
9953                 /* non-fatal, continue */
9954         }
9955
9956         return result;
9957 }
9958
9959 /**
9960  * ixgbe_io_resume - called when traffic can start flowing again.
9961  * @pdev: Pointer to PCI device
9962  *
9963  * This callback is called when the error recovery driver tells us that
9964  * its OK to resume normal operation.
9965  */
9966 static void ixgbe_io_resume(struct pci_dev *pdev)
9967 {
9968         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9969         struct net_device *netdev = adapter->netdev;
9970
9971 #ifdef CONFIG_PCI_IOV
9972         if (adapter->vferr_refcount) {
9973                 e_info(drv, "Resuming after VF err\n");
9974                 adapter->vferr_refcount--;
9975                 return;
9976         }
9977
9978 #endif
9979         if (netif_running(netdev))
9980                 ixgbe_up(adapter);
9981
9982         netif_device_attach(netdev);
9983 }
9984
9985 static const struct pci_error_handlers ixgbe_err_handler = {
9986         .error_detected = ixgbe_io_error_detected,
9987         .slot_reset = ixgbe_io_slot_reset,
9988         .resume = ixgbe_io_resume,
9989 };
9990
9991 static struct pci_driver ixgbe_driver = {
9992         .name     = ixgbe_driver_name,
9993         .id_table = ixgbe_pci_tbl,
9994         .probe    = ixgbe_probe,
9995         .remove   = ixgbe_remove,
9996 #ifdef CONFIG_PM
9997         .suspend  = ixgbe_suspend,
9998         .resume   = ixgbe_resume,
9999 #endif
10000         .shutdown = ixgbe_shutdown,
10001         .sriov_configure = ixgbe_pci_sriov_configure,
10002         .err_handler = &ixgbe_err_handler
10003 };
10004
10005 /**
10006  * ixgbe_init_module - Driver Registration Routine
10007  *
10008  * ixgbe_init_module is the first routine called when the driver is
10009  * loaded. All it does is register with the PCI subsystem.
10010  **/
10011 static int __init ixgbe_init_module(void)
10012 {
10013         int ret;
10014         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10015         pr_info("%s\n", ixgbe_copyright);
10016
10017         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10018         if (!ixgbe_wq) {
10019                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10020                 return -ENOMEM;
10021         }
10022
10023         ixgbe_dbg_init();
10024
10025         ret = pci_register_driver(&ixgbe_driver);
10026         if (ret) {
10027                 ixgbe_dbg_exit();
10028                 return ret;
10029         }
10030
10031 #ifdef CONFIG_IXGBE_DCA
10032         dca_register_notify(&dca_notifier);
10033 #endif
10034
10035         return 0;
10036 }
10037
10038 module_init(ixgbe_init_module);
10039
10040 /**
10041  * ixgbe_exit_module - Driver Exit Cleanup Routine
10042  *
10043  * ixgbe_exit_module is called just before the driver is removed
10044  * from memory.
10045  **/
10046 static void __exit ixgbe_exit_module(void)
10047 {
10048 #ifdef CONFIG_IXGBE_DCA
10049         dca_unregister_notify(&dca_notifier);
10050 #endif
10051         pci_unregister_driver(&ixgbe_driver);
10052
10053         ixgbe_dbg_exit();
10054         if (ixgbe_wq) {
10055                 destroy_workqueue(ixgbe_wq);
10056                 ixgbe_wq = NULL;
10057         }
10058 }
10059
10060 #ifdef CONFIG_IXGBE_DCA
10061 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10062                             void *p)
10063 {
10064         int ret_val;
10065
10066         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10067                                          __ixgbe_notify_dca);
10068
10069         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10070 }
10071
10072 #endif /* CONFIG_IXGBE_DCA */
10073
10074 module_exit(ixgbe_exit_module);
10075
10076 /* ixgbe_main.c */