1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/prefetch.h>
48 #include <scsi/fc/fc_fcoe.h>
51 #include "ixgbe_common.h"
52 #include "ixgbe_dcb_82599.h"
53 #include "ixgbe_sriov.h"
55 char ixgbe_driver_name[] = "ixgbe";
56 static const char ixgbe_driver_string[] =
57 "Intel(R) 10 Gigabit PCI Express Network Driver";
59 char ixgbe_default_device_descr[] =
60 "Intel(R) 10 Gigabit Network Connection";
62 static char ixgbe_default_device_descr[] =
63 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
69 __stringify(BUILD) "-k"
70 const char ixgbe_driver_version[] = DRV_VERSION;
71 static const char ixgbe_copyright[] =
72 "Copyright (c) 1999-2012 Intel Corporation.";
74 static const struct ixgbe_info *ixgbe_info_tbl[] = {
75 [board_82598] = &ixgbe_82598_info,
76 [board_82599] = &ixgbe_82599_info,
77 [board_X540] = &ixgbe_X540_info,
80 /* ixgbe_pci_tbl - PCI Device ID Table
82 * Wildcard entries (PCI_ANY_ID) should come last
83 * Last entry must be all 0s
85 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
86 * Class, Class Mask, private data (not used) }
88 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
117 /* required last entry */
120 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
122 #ifdef CONFIG_IXGBE_DCA
123 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
125 static struct notifier_block dca_notifier = {
126 .notifier_call = ixgbe_notify_dca,
132 #ifdef CONFIG_PCI_IOV
133 static unsigned int max_vfs;
134 module_param(max_vfs, uint, 0);
135 MODULE_PARM_DESC(max_vfs,
136 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");
137 #endif /* CONFIG_PCI_IOV */
139 static unsigned int allow_unsupported_sfp;
140 module_param(allow_unsupported_sfp, uint, 0);
141 MODULE_PARM_DESC(allow_unsupported_sfp,
142 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
144 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
145 static int debug = -1;
146 module_param(debug, int, 0);
147 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
149 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
150 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
151 MODULE_LICENSE("GPL");
152 MODULE_VERSION(DRV_VERSION);
154 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
156 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
157 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
158 schedule_work(&adapter->service_task);
161 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
163 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
165 /* flush memory to make sure state is correct before next watchdog */
166 smp_mb__before_clear_bit();
167 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
170 struct ixgbe_reg_info {
175 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
177 /* General Registers */
178 {IXGBE_CTRL, "CTRL"},
179 {IXGBE_STATUS, "STATUS"},
180 {IXGBE_CTRL_EXT, "CTRL_EXT"},
182 /* Interrupt Registers */
183 {IXGBE_EICR, "EICR"},
186 {IXGBE_SRRCTL(0), "SRRCTL"},
187 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
188 {IXGBE_RDLEN(0), "RDLEN"},
189 {IXGBE_RDH(0), "RDH"},
190 {IXGBE_RDT(0), "RDT"},
191 {IXGBE_RXDCTL(0), "RXDCTL"},
192 {IXGBE_RDBAL(0), "RDBAL"},
193 {IXGBE_RDBAH(0), "RDBAH"},
196 {IXGBE_TDBAL(0), "TDBAL"},
197 {IXGBE_TDBAH(0), "TDBAH"},
198 {IXGBE_TDLEN(0), "TDLEN"},
199 {IXGBE_TDH(0), "TDH"},
200 {IXGBE_TDT(0), "TDT"},
201 {IXGBE_TXDCTL(0), "TXDCTL"},
203 /* List Terminator */
209 * ixgbe_regdump - register printout routine
211 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
217 switch (reginfo->ofs) {
218 case IXGBE_SRRCTL(0):
219 for (i = 0; i < 64; i++)
220 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
222 case IXGBE_DCA_RXCTRL(0):
223 for (i = 0; i < 64; i++)
224 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
227 for (i = 0; i < 64; i++)
228 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
231 for (i = 0; i < 64; i++)
232 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
235 for (i = 0; i < 64; i++)
236 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
238 case IXGBE_RXDCTL(0):
239 for (i = 0; i < 64; i++)
240 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
243 for (i = 0; i < 64; i++)
244 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
247 for (i = 0; i < 64; i++)
248 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
251 for (i = 0; i < 64; i++)
252 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
255 for (i = 0; i < 64; i++)
256 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
259 for (i = 0; i < 64; i++)
260 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
263 for (i = 0; i < 64; i++)
264 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
267 for (i = 0; i < 64; i++)
268 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
270 case IXGBE_TXDCTL(0):
271 for (i = 0; i < 64; i++)
272 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
275 pr_info("%-15s %08x\n", reginfo->name,
276 IXGBE_READ_REG(hw, reginfo->ofs));
280 for (i = 0; i < 8; i++) {
281 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
282 pr_err("%-15s", rname);
283 for (j = 0; j < 8; j++)
284 pr_cont(" %08x", regs[i*8+j]);
291 * ixgbe_dump - Print registers, tx-rings and rx-rings
293 static void ixgbe_dump(struct ixgbe_adapter *adapter)
295 struct net_device *netdev = adapter->netdev;
296 struct ixgbe_hw *hw = &adapter->hw;
297 struct ixgbe_reg_info *reginfo;
299 struct ixgbe_ring *tx_ring;
300 struct ixgbe_tx_buffer *tx_buffer;
301 union ixgbe_adv_tx_desc *tx_desc;
302 struct my_u0 { u64 a; u64 b; } *u0;
303 struct ixgbe_ring *rx_ring;
304 union ixgbe_adv_rx_desc *rx_desc;
305 struct ixgbe_rx_buffer *rx_buffer_info;
309 if (!netif_msg_hw(adapter))
312 /* Print netdevice Info */
314 dev_info(&adapter->pdev->dev, "Net device Info\n");
315 pr_info("Device Name state "
316 "trans_start last_rx\n");
317 pr_info("%-15s %016lX %016lX %016lX\n",
324 /* Print Registers */
325 dev_info(&adapter->pdev->dev, "Register Dump\n");
326 pr_info(" Register Name Value\n");
327 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
328 reginfo->name; reginfo++) {
329 ixgbe_regdump(hw, reginfo);
332 /* Print TX Ring Summary */
333 if (!netdev || !netif_running(netdev))
336 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
337 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
338 for (n = 0; n < adapter->num_tx_queues; n++) {
339 tx_ring = adapter->tx_ring[n];
340 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
341 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
342 n, tx_ring->next_to_use, tx_ring->next_to_clean,
343 (u64)dma_unmap_addr(tx_buffer, dma),
344 dma_unmap_len(tx_buffer, len),
345 tx_buffer->next_to_watch,
346 (u64)tx_buffer->time_stamp);
350 if (!netif_msg_tx_done(adapter))
351 goto rx_ring_summary;
353 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
355 /* Transmit Descriptor Formats
357 * Advanced Transmit Descriptor
358 * +--------------------------------------------------------------+
359 * 0 | Buffer Address [63:0] |
360 * +--------------------------------------------------------------+
361 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
362 * +--------------------------------------------------------------+
363 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
366 for (n = 0; n < adapter->num_tx_queues; n++) {
367 tx_ring = adapter->tx_ring[n];
368 pr_info("------------------------------------\n");
369 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
370 pr_info("------------------------------------\n");
371 pr_info("T [desc] [address 63:0 ] "
372 "[PlPOIdStDDt Ln] [bi->dma ] "
373 "leng ntw timestamp bi->skb\n");
375 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
376 tx_desc = IXGBE_TX_DESC(tx_ring, i);
377 tx_buffer = &tx_ring->tx_buffer_info[i];
378 u0 = (struct my_u0 *)tx_desc;
379 pr_info("T [0x%03X] %016llX %016llX %016llX"
380 " %04X %p %016llX %p", i,
383 (u64)dma_unmap_addr(tx_buffer, dma),
384 dma_unmap_len(tx_buffer, len),
385 tx_buffer->next_to_watch,
386 (u64)tx_buffer->time_stamp,
388 if (i == tx_ring->next_to_use &&
389 i == tx_ring->next_to_clean)
391 else if (i == tx_ring->next_to_use)
393 else if (i == tx_ring->next_to_clean)
398 if (netif_msg_pktdata(adapter) &&
399 dma_unmap_len(tx_buffer, len) != 0)
400 print_hex_dump(KERN_INFO, "",
401 DUMP_PREFIX_ADDRESS, 16, 1,
402 phys_to_virt(dma_unmap_addr(tx_buffer,
404 dma_unmap_len(tx_buffer, len),
409 /* Print RX Rings Summary */
411 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
412 pr_info("Queue [NTU] [NTC]\n");
413 for (n = 0; n < adapter->num_rx_queues; n++) {
414 rx_ring = adapter->rx_ring[n];
415 pr_info("%5d %5X %5X\n",
416 n, rx_ring->next_to_use, rx_ring->next_to_clean);
420 if (!netif_msg_rx_status(adapter))
423 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
425 /* Advanced Receive Descriptor (Read) Format
427 * +-----------------------------------------------------+
428 * 0 | Packet Buffer Address [63:1] |A0/NSE|
429 * +----------------------------------------------+------+
430 * 8 | Header Buffer Address [63:1] | DD |
431 * +-----------------------------------------------------+
434 * Advanced Receive Descriptor (Write-Back) Format
436 * 63 48 47 32 31 30 21 20 16 15 4 3 0
437 * +------------------------------------------------------+
438 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
439 * | Checksum Ident | | | | Type | Type |
440 * +------------------------------------------------------+
441 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
442 * +------------------------------------------------------+
443 * 63 48 47 32 31 20 19 0
445 for (n = 0; n < adapter->num_rx_queues; n++) {
446 rx_ring = adapter->rx_ring[n];
447 pr_info("------------------------------------\n");
448 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
449 pr_info("------------------------------------\n");
450 pr_info("R [desc] [ PktBuf A0] "
451 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
452 "<-- Adv Rx Read format\n");
453 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
454 "[vl er S cks ln] ---------------- [bi->skb] "
455 "<-- Adv Rx Write-Back format\n");
457 for (i = 0; i < rx_ring->count; i++) {
458 rx_buffer_info = &rx_ring->rx_buffer_info[i];
459 rx_desc = IXGBE_RX_DESC(rx_ring, i);
460 u0 = (struct my_u0 *)rx_desc;
461 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
462 if (staterr & IXGBE_RXD_STAT_DD) {
463 /* Descriptor Done */
464 pr_info("RWB[0x%03X] %016llX "
465 "%016llX ---------------- %p", i,
468 rx_buffer_info->skb);
470 pr_info("R [0x%03X] %016llX "
471 "%016llX %016llX %p", i,
474 (u64)rx_buffer_info->dma,
475 rx_buffer_info->skb);
477 if (netif_msg_pktdata(adapter)) {
478 print_hex_dump(KERN_INFO, "",
479 DUMP_PREFIX_ADDRESS, 16, 1,
480 phys_to_virt(rx_buffer_info->dma),
481 ixgbe_rx_bufsz(rx_ring), true);
485 if (i == rx_ring->next_to_use)
487 else if (i == rx_ring->next_to_clean)
499 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
503 /* Let firmware take over control of h/w */
504 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
505 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
506 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
509 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
513 /* Let firmware know the driver has taken over */
514 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
515 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
516 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
520 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
521 * @adapter: pointer to adapter struct
522 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
523 * @queue: queue to map the corresponding interrupt to
524 * @msix_vector: the vector to map to the corresponding queue
527 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
528 u8 queue, u8 msix_vector)
531 struct ixgbe_hw *hw = &adapter->hw;
532 switch (hw->mac.type) {
533 case ixgbe_mac_82598EB:
534 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
537 index = (((direction * 64) + queue) >> 2) & 0x1F;
538 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
539 ivar &= ~(0xFF << (8 * (queue & 0x3)));
540 ivar |= (msix_vector << (8 * (queue & 0x3)));
541 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
543 case ixgbe_mac_82599EB:
545 if (direction == -1) {
547 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
548 index = ((queue & 1) * 8);
549 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
550 ivar &= ~(0xFF << index);
551 ivar |= (msix_vector << index);
552 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
555 /* tx or rx causes */
556 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
557 index = ((16 * (queue & 1)) + (8 * direction));
558 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
559 ivar &= ~(0xFF << index);
560 ivar |= (msix_vector << index);
561 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
569 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
574 switch (adapter->hw.mac.type) {
575 case ixgbe_mac_82598EB:
576 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
577 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
579 case ixgbe_mac_82599EB:
581 mask = (qmask & 0xFFFFFFFF);
582 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
583 mask = (qmask >> 32);
584 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
591 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
592 struct ixgbe_tx_buffer *tx_buffer)
594 if (tx_buffer->skb) {
595 dev_kfree_skb_any(tx_buffer->skb);
596 if (dma_unmap_len(tx_buffer, len))
597 dma_unmap_single(ring->dev,
598 dma_unmap_addr(tx_buffer, dma),
599 dma_unmap_len(tx_buffer, len),
601 } else if (dma_unmap_len(tx_buffer, len)) {
602 dma_unmap_page(ring->dev,
603 dma_unmap_addr(tx_buffer, dma),
604 dma_unmap_len(tx_buffer, len),
607 tx_buffer->next_to_watch = NULL;
608 tx_buffer->skb = NULL;
609 dma_unmap_len_set(tx_buffer, len, 0);
610 /* tx_buffer must be completely set up in the transmit path */
613 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
615 struct ixgbe_hw *hw = &adapter->hw;
616 struct ixgbe_hw_stats *hwstats = &adapter->stats;
620 if ((hw->fc.current_mode != ixgbe_fc_full) &&
621 (hw->fc.current_mode != ixgbe_fc_rx_pause))
624 switch (hw->mac.type) {
625 case ixgbe_mac_82598EB:
626 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
629 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
631 hwstats->lxoffrxc += data;
633 /* refill credits (no tx hang) if we received xoff */
637 for (i = 0; i < adapter->num_tx_queues; i++)
638 clear_bit(__IXGBE_HANG_CHECK_ARMED,
639 &adapter->tx_ring[i]->state);
642 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
644 struct ixgbe_hw *hw = &adapter->hw;
645 struct ixgbe_hw_stats *hwstats = &adapter->stats;
648 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
650 if (adapter->ixgbe_ieee_pfc)
651 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
653 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
654 ixgbe_update_xoff_rx_lfc(adapter);
658 /* update stats for each tc, only valid with PFC enabled */
659 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
660 switch (hw->mac.type) {
661 case ixgbe_mac_82598EB:
662 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
665 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
667 hwstats->pxoffrxc[i] += xoff[i];
670 /* disarm tx queues that have received xoff frames */
671 for (i = 0; i < adapter->num_tx_queues; i++) {
672 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
673 u8 tc = tx_ring->dcb_tc;
676 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
680 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
682 return ring->stats.packets;
685 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
687 struct ixgbe_adapter *adapter = netdev_priv(ring->netdev);
688 struct ixgbe_hw *hw = &adapter->hw;
690 u32 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
691 u32 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
694 return (head < tail) ?
695 tail - head : (tail + ring->count - head);
700 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
702 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
703 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
704 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
707 clear_check_for_tx_hang(tx_ring);
710 * Check for a hung queue, but be thorough. This verifies
711 * that a transmit has been completed since the previous
712 * check AND there is at least one packet pending. The
713 * ARMED bit is set to indicate a potential hang. The
714 * bit is cleared if a pause frame is received to remove
715 * false hang detection due to PFC or 802.3x frames. By
716 * requiring this to fail twice we avoid races with
717 * pfc clearing the ARMED bit and conditions where we
718 * run the check_tx_hang logic with a transmit completion
719 * pending but without time to complete it yet.
721 if ((tx_done_old == tx_done) && tx_pending) {
722 /* make sure it is true for two checks in a row */
723 ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
726 /* update completed stats and continue */
727 tx_ring->tx_stats.tx_done_old = tx_done;
728 /* reset the countdown */
729 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
736 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
737 * @adapter: driver private struct
739 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
742 /* Do the reset outside of interrupt context */
743 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
744 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
745 ixgbe_service_event_schedule(adapter);
750 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
751 * @q_vector: structure containing interrupt and ring information
752 * @tx_ring: tx ring to clean
754 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
755 struct ixgbe_ring *tx_ring)
757 struct ixgbe_adapter *adapter = q_vector->adapter;
758 struct ixgbe_tx_buffer *tx_buffer;
759 union ixgbe_adv_tx_desc *tx_desc;
760 unsigned int total_bytes = 0, total_packets = 0;
761 unsigned int budget = q_vector->tx.work_limit;
762 unsigned int i = tx_ring->next_to_clean;
764 if (test_bit(__IXGBE_DOWN, &adapter->state))
767 tx_buffer = &tx_ring->tx_buffer_info[i];
768 tx_desc = IXGBE_TX_DESC(tx_ring, i);
772 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
774 /* if next_to_watch is not set then there is no work pending */
778 /* prevent any other reads prior to eop_desc */
781 /* if DD is not set pending work has not been completed */
782 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
785 /* clear next_to_watch to prevent false hangs */
786 tx_buffer->next_to_watch = NULL;
788 /* update the statistics for this packet */
789 total_bytes += tx_buffer->bytecount;
790 total_packets += tx_buffer->gso_segs;
792 #ifdef CONFIG_IXGBE_PTP
793 if (unlikely(tx_buffer->tx_flags & IXGBE_TX_FLAGS_TSTAMP))
794 ixgbe_ptp_tx_hwtstamp(q_vector, tx_buffer->skb);
798 dev_kfree_skb_any(tx_buffer->skb);
800 /* unmap skb header data */
801 dma_unmap_single(tx_ring->dev,
802 dma_unmap_addr(tx_buffer, dma),
803 dma_unmap_len(tx_buffer, len),
806 /* clear tx_buffer data */
807 tx_buffer->skb = NULL;
808 dma_unmap_len_set(tx_buffer, len, 0);
810 /* unmap remaining buffers */
811 while (tx_desc != eop_desc) {
817 tx_buffer = tx_ring->tx_buffer_info;
818 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
821 /* unmap any remaining paged data */
822 if (dma_unmap_len(tx_buffer, len)) {
823 dma_unmap_page(tx_ring->dev,
824 dma_unmap_addr(tx_buffer, dma),
825 dma_unmap_len(tx_buffer, len),
827 dma_unmap_len_set(tx_buffer, len, 0);
831 /* move us one more past the eop_desc for start of next pkt */
837 tx_buffer = tx_ring->tx_buffer_info;
838 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
841 /* issue prefetch for next Tx descriptor */
844 /* update budget accounting */
846 } while (likely(budget));
849 tx_ring->next_to_clean = i;
850 u64_stats_update_begin(&tx_ring->syncp);
851 tx_ring->stats.bytes += total_bytes;
852 tx_ring->stats.packets += total_packets;
853 u64_stats_update_end(&tx_ring->syncp);
854 q_vector->tx.total_bytes += total_bytes;
855 q_vector->tx.total_packets += total_packets;
857 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
858 /* schedule immediate reset if we believe we hung */
859 struct ixgbe_hw *hw = &adapter->hw;
860 e_err(drv, "Detected Tx Unit Hang\n"
862 " TDH, TDT <%x>, <%x>\n"
863 " next_to_use <%x>\n"
864 " next_to_clean <%x>\n"
865 "tx_buffer_info[next_to_clean]\n"
866 " time_stamp <%lx>\n"
868 tx_ring->queue_index,
869 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
870 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
871 tx_ring->next_to_use, i,
872 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
874 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
877 "tx hang %d detected on queue %d, resetting adapter\n",
878 adapter->tx_timeout_count + 1, tx_ring->queue_index);
880 /* schedule immediate reset if we believe we hung */
881 ixgbe_tx_timeout_reset(adapter);
883 /* the adapter is about to reset, no point in enabling stuff */
887 netdev_tx_completed_queue(txring_txq(tx_ring),
888 total_packets, total_bytes);
890 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
891 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
892 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
893 /* Make sure that anybody stopping the queue after this
894 * sees the new next_to_clean.
897 if (__netif_subqueue_stopped(tx_ring->netdev,
898 tx_ring->queue_index)
899 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
900 netif_wake_subqueue(tx_ring->netdev,
901 tx_ring->queue_index);
902 ++tx_ring->tx_stats.restart_queue;
909 #ifdef CONFIG_IXGBE_DCA
910 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
911 struct ixgbe_ring *tx_ring,
914 struct ixgbe_hw *hw = &adapter->hw;
915 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
918 switch (hw->mac.type) {
919 case ixgbe_mac_82598EB:
920 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
922 case ixgbe_mac_82599EB:
924 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
925 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
928 /* for unknown hardware do not write register */
933 * We can enable relaxed ordering for reads, but not writes when
934 * DCA is enabled. This is due to a known issue in some chipsets
935 * which will cause the DCA tag to be cleared.
937 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
938 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
939 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
941 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
944 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
945 struct ixgbe_ring *rx_ring,
948 struct ixgbe_hw *hw = &adapter->hw;
949 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
950 u8 reg_idx = rx_ring->reg_idx;
953 switch (hw->mac.type) {
954 case ixgbe_mac_82599EB:
956 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
963 * We can enable relaxed ordering for reads, but not writes when
964 * DCA is enabled. This is due to a known issue in some chipsets
965 * which will cause the DCA tag to be cleared.
967 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
968 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
969 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
971 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
974 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
976 struct ixgbe_adapter *adapter = q_vector->adapter;
977 struct ixgbe_ring *ring;
980 if (q_vector->cpu == cpu)
983 ixgbe_for_each_ring(ring, q_vector->tx)
984 ixgbe_update_tx_dca(adapter, ring, cpu);
986 ixgbe_for_each_ring(ring, q_vector->rx)
987 ixgbe_update_rx_dca(adapter, ring, cpu);
994 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
998 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1001 /* always use CB2 mode, difference is masked in the CB driver */
1002 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1004 for (i = 0; i < adapter->num_q_vectors; i++) {
1005 adapter->q_vector[i]->cpu = -1;
1006 ixgbe_update_dca(adapter->q_vector[i]);
1010 static int __ixgbe_notify_dca(struct device *dev, void *data)
1012 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1013 unsigned long event = *(unsigned long *)data;
1015 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1019 case DCA_PROVIDER_ADD:
1020 /* if we're already enabled, don't do it again */
1021 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1023 if (dca_add_requester(dev) == 0) {
1024 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1025 ixgbe_setup_dca(adapter);
1028 /* Fall Through since DCA is disabled. */
1029 case DCA_PROVIDER_REMOVE:
1030 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1031 dca_remove_requester(dev);
1032 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1033 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1041 #endif /* CONFIG_IXGBE_DCA */
1042 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1043 union ixgbe_adv_rx_desc *rx_desc,
1044 struct sk_buff *skb)
1046 if (ring->netdev->features & NETIF_F_RXHASH)
1047 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
1052 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1053 * @ring: structure containing ring specific data
1054 * @rx_desc: advanced rx descriptor
1056 * Returns : true if it is FCoE pkt
1058 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1059 union ixgbe_adv_rx_desc *rx_desc)
1061 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1063 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1064 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1065 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1066 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1069 #endif /* IXGBE_FCOE */
1071 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1072 * @ring: structure containing ring specific data
1073 * @rx_desc: current Rx descriptor being processed
1074 * @skb: skb currently being received and modified
1076 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1077 union ixgbe_adv_rx_desc *rx_desc,
1078 struct sk_buff *skb)
1080 skb_checksum_none_assert(skb);
1082 /* Rx csum disabled */
1083 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1086 /* if IP and error */
1087 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1088 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1089 ring->rx_stats.csum_err++;
1093 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1096 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1097 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1100 * 82599 errata, UDP frames with a 0 checksum can be marked as
1103 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1104 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1107 ring->rx_stats.csum_err++;
1111 /* It must be a TCP or UDP packet with a valid checksum */
1112 skb->ip_summed = CHECKSUM_UNNECESSARY;
1115 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1117 rx_ring->next_to_use = val;
1119 /* update next to alloc since we have filled the ring */
1120 rx_ring->next_to_alloc = val;
1122 * Force memory writes to complete before letting h/w
1123 * know there are new descriptors to fetch. (Only
1124 * applicable for weak-ordered memory model archs,
1128 writel(val, rx_ring->tail);
1131 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1132 struct ixgbe_rx_buffer *bi)
1134 struct page *page = bi->page;
1135 dma_addr_t dma = bi->dma;
1137 /* since we are recycling buffers we should seldom need to alloc */
1141 /* alloc new page for storage */
1142 if (likely(!page)) {
1143 page = alloc_pages(GFP_ATOMIC | __GFP_COLD | __GFP_COMP,
1144 ixgbe_rx_pg_order(rx_ring));
1145 if (unlikely(!page)) {
1146 rx_ring->rx_stats.alloc_rx_page_failed++;
1152 /* map page for use */
1153 dma = dma_map_page(rx_ring->dev, page, 0,
1154 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1157 * if mapping failed free memory back to system since
1158 * there isn't much point in holding memory we can't use
1160 if (dma_mapping_error(rx_ring->dev, dma)) {
1161 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1164 rx_ring->rx_stats.alloc_rx_page_failed++;
1169 bi->page_offset ^= ixgbe_rx_bufsz(rx_ring);
1175 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1176 * @rx_ring: ring to place buffers on
1177 * @cleaned_count: number of buffers to replace
1179 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1181 union ixgbe_adv_rx_desc *rx_desc;
1182 struct ixgbe_rx_buffer *bi;
1183 u16 i = rx_ring->next_to_use;
1189 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1190 bi = &rx_ring->rx_buffer_info[i];
1191 i -= rx_ring->count;
1194 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1198 * Refresh the desc even if buffer_addrs didn't change
1199 * because each write-back erases this info.
1201 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1207 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1208 bi = rx_ring->rx_buffer_info;
1209 i -= rx_ring->count;
1212 /* clear the hdr_addr for the next_to_use descriptor */
1213 rx_desc->read.hdr_addr = 0;
1216 } while (cleaned_count);
1218 i += rx_ring->count;
1220 if (rx_ring->next_to_use != i)
1221 ixgbe_release_rx_desc(rx_ring, i);
1225 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1226 * @data: pointer to the start of the headers
1227 * @max_len: total length of section to find headers in
1229 * This function is meant to determine the length of headers that will
1230 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1231 * motivation of doing this is to only perform one pull for IPv4 TCP
1232 * packets so that we can do basic things like calculating the gso_size
1233 * based on the average data per packet.
1235 static unsigned int ixgbe_get_headlen(unsigned char *data,
1236 unsigned int max_len)
1239 unsigned char *network;
1242 struct vlan_hdr *vlan;
1247 u8 nexthdr = 0; /* default to not TCP */
1250 /* this should never happen, but better safe than sorry */
1251 if (max_len < ETH_HLEN)
1254 /* initialize network frame pointer */
1257 /* set first protocol and move network header forward */
1258 protocol = hdr.eth->h_proto;
1259 hdr.network += ETH_HLEN;
1261 /* handle any vlan tag if present */
1262 if (protocol == __constant_htons(ETH_P_8021Q)) {
1263 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1266 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1267 hdr.network += VLAN_HLEN;
1270 /* handle L3 protocols */
1271 if (protocol == __constant_htons(ETH_P_IP)) {
1272 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1275 /* access ihl as a u8 to avoid unaligned access on ia64 */
1276 hlen = (hdr.network[0] & 0x0F) << 2;
1278 /* verify hlen meets minimum size requirements */
1279 if (hlen < sizeof(struct iphdr))
1280 return hdr.network - data;
1282 /* record next protocol */
1283 nexthdr = hdr.ipv4->protocol;
1284 hdr.network += hlen;
1286 } else if (protocol == __constant_htons(ETH_P_FCOE)) {
1287 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1289 hdr.network += FCOE_HEADER_LEN;
1292 return hdr.network - data;
1295 /* finally sort out TCP */
1296 if (nexthdr == IPPROTO_TCP) {
1297 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1300 /* access doff as a u8 to avoid unaligned access on ia64 */
1301 hlen = (hdr.network[12] & 0xF0) >> 2;
1303 /* verify hlen meets minimum size requirements */
1304 if (hlen < sizeof(struct tcphdr))
1305 return hdr.network - data;
1307 hdr.network += hlen;
1311 * If everything has gone correctly hdr.network should be the
1312 * data section of the packet and will be the end of the header.
1313 * If not then it probably represents the end of the last recognized
1316 if ((hdr.network - data) < max_len)
1317 return hdr.network - data;
1322 static void ixgbe_get_rsc_cnt(struct ixgbe_ring *rx_ring,
1323 union ixgbe_adv_rx_desc *rx_desc,
1324 struct sk_buff *skb)
1329 if (!ring_is_rsc_enabled(rx_ring))
1332 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1333 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1335 /* If this is an RSC frame rsc_cnt should be non-zero */
1339 rsc_cnt = le32_to_cpu(rsc_enabled);
1340 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1342 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1345 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1346 struct sk_buff *skb)
1348 u16 hdr_len = skb_headlen(skb);
1350 /* set gso_size to avoid messing up TCP MSS */
1351 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1352 IXGBE_CB(skb)->append_cnt);
1355 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1356 struct sk_buff *skb)
1358 /* if append_cnt is 0 then frame is not RSC */
1359 if (!IXGBE_CB(skb)->append_cnt)
1362 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1363 rx_ring->rx_stats.rsc_flush++;
1365 ixgbe_set_rsc_gso_size(rx_ring, skb);
1367 /* gso_size is computed using append_cnt so always clear it last */
1368 IXGBE_CB(skb)->append_cnt = 0;
1372 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1373 * @rx_ring: rx descriptor ring packet is being transacted on
1374 * @rx_desc: pointer to the EOP Rx descriptor
1375 * @skb: pointer to current skb being populated
1377 * This function checks the ring, descriptor, and packet information in
1378 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1379 * other fields within the skb.
1381 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1382 union ixgbe_adv_rx_desc *rx_desc,
1383 struct sk_buff *skb)
1385 struct net_device *dev = rx_ring->netdev;
1387 ixgbe_update_rsc_stats(rx_ring, skb);
1389 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1391 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1393 #ifdef CONFIG_IXGBE_PTP
1394 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
1397 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
1398 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1399 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1400 __vlan_hwaccel_put_tag(skb, vid);
1403 skb_record_rx_queue(skb, rx_ring->queue_index);
1405 skb->protocol = eth_type_trans(skb, dev);
1408 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1409 struct sk_buff *skb)
1411 struct ixgbe_adapter *adapter = q_vector->adapter;
1413 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1414 napi_gro_receive(&q_vector->napi, skb);
1420 * ixgbe_is_non_eop - process handling of non-EOP buffers
1421 * @rx_ring: Rx ring being processed
1422 * @rx_desc: Rx descriptor for current buffer
1423 * @skb: Current socket buffer containing buffer in progress
1425 * This function updates next to clean. If the buffer is an EOP buffer
1426 * this function exits returning false, otherwise it will place the
1427 * sk_buff in the next buffer to be chained and return true indicating
1428 * that this is in fact a non-EOP buffer.
1430 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1431 union ixgbe_adv_rx_desc *rx_desc,
1432 struct sk_buff *skb)
1434 u32 ntc = rx_ring->next_to_clean + 1;
1436 /* fetch, update, and store next to clean */
1437 ntc = (ntc < rx_ring->count) ? ntc : 0;
1438 rx_ring->next_to_clean = ntc;
1440 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1442 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1445 /* append_cnt indicates packet is RSC, if so fetch nextp */
1446 if (IXGBE_CB(skb)->append_cnt) {
1447 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1448 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1449 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1452 /* place skb in next buffer to be received */
1453 rx_ring->rx_buffer_info[ntc].skb = skb;
1454 rx_ring->rx_stats.non_eop_descs++;
1460 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1461 * @rx_ring: rx descriptor ring packet is being transacted on
1462 * @rx_desc: pointer to the EOP Rx descriptor
1463 * @skb: pointer to current skb being fixed
1465 * Check for corrupted packet headers caused by senders on the local L2
1466 * embedded NIC switch not setting up their Tx Descriptors right. These
1467 * should be very rare.
1469 * Also address the case where we are pulling data in on pages only
1470 * and as such no data is present in the skb header.
1472 * In addition if skb is not at least 60 bytes we need to pad it so that
1473 * it is large enough to qualify as a valid Ethernet frame.
1475 * Returns true if an error was encountered and skb was freed.
1477 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1478 union ixgbe_adv_rx_desc *rx_desc,
1479 struct sk_buff *skb)
1481 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1482 struct net_device *netdev = rx_ring->netdev;
1484 unsigned int pull_len;
1486 /* if the page was released unmap it, else just sync our portion */
1487 if (unlikely(IXGBE_CB(skb)->page_released)) {
1488 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1489 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1490 IXGBE_CB(skb)->page_released = false;
1492 dma_sync_single_range_for_cpu(rx_ring->dev,
1495 ixgbe_rx_bufsz(rx_ring),
1498 IXGBE_CB(skb)->dma = 0;
1500 /* verify that the packet does not have any known errors */
1501 if (unlikely(ixgbe_test_staterr(rx_desc,
1502 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1503 !(netdev->features & NETIF_F_RXALL))) {
1504 dev_kfree_skb_any(skb);
1509 * it is valid to use page_address instead of kmap since we are
1510 * working with pages allocated out of the lomem pool per
1511 * alloc_page(GFP_ATOMIC)
1513 va = skb_frag_address(frag);
1516 * we need the header to contain the greater of either ETH_HLEN or
1517 * 60 bytes if the skb->len is less than 60 for skb_pad.
1519 pull_len = skb_frag_size(frag);
1521 pull_len = ixgbe_get_headlen(va, pull_len);
1523 /* align pull length to size of long to optimize memcpy performance */
1524 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1526 /* update all of the pointers */
1527 skb_frag_size_sub(frag, pull_len);
1528 frag->page_offset += pull_len;
1529 skb->data_len -= pull_len;
1530 skb->tail += pull_len;
1533 * if we sucked the frag empty then we should free it,
1534 * if there are other frags here something is screwed up in hardware
1536 if (skb_frag_size(frag) == 0) {
1537 BUG_ON(skb_shinfo(skb)->nr_frags != 1);
1538 skb_shinfo(skb)->nr_frags = 0;
1539 __skb_frag_unref(frag);
1540 skb->truesize -= ixgbe_rx_bufsz(rx_ring);
1544 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1545 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1549 /* if skb_pad returns an error the skb was freed */
1550 if (unlikely(skb->len < 60)) {
1551 int pad_len = 60 - skb->len;
1553 if (skb_pad(skb, pad_len))
1555 __skb_put(skb, pad_len);
1562 * ixgbe_can_reuse_page - determine if we can reuse a page
1563 * @rx_buffer: pointer to rx_buffer containing the page we want to reuse
1565 * Returns true if page can be reused in another Rx buffer
1567 static inline bool ixgbe_can_reuse_page(struct ixgbe_rx_buffer *rx_buffer)
1569 struct page *page = rx_buffer->page;
1571 /* if we are only owner of page and it is local we can reuse it */
1572 return likely(page_count(page) == 1) &&
1573 likely(page_to_nid(page) == numa_node_id());
1577 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1578 * @rx_ring: rx descriptor ring to store buffers on
1579 * @old_buff: donor buffer to have page reused
1581 * Syncronizes page for reuse by the adapter
1583 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1584 struct ixgbe_rx_buffer *old_buff)
1586 struct ixgbe_rx_buffer *new_buff;
1587 u16 nta = rx_ring->next_to_alloc;
1588 u16 bufsz = ixgbe_rx_bufsz(rx_ring);
1590 new_buff = &rx_ring->rx_buffer_info[nta];
1592 /* update, and store next to alloc */
1594 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1596 /* transfer page from old buffer to new buffer */
1597 new_buff->page = old_buff->page;
1598 new_buff->dma = old_buff->dma;
1600 /* flip page offset to other buffer and store to new_buff */
1601 new_buff->page_offset = old_buff->page_offset ^ bufsz;
1603 /* sync the buffer for use by the device */
1604 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1605 new_buff->page_offset, bufsz,
1608 /* bump ref count on page before it is given to the stack */
1609 get_page(new_buff->page);
1613 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1614 * @rx_ring: rx descriptor ring to transact packets on
1615 * @rx_buffer: buffer containing page to add
1616 * @rx_desc: descriptor containing length of buffer written by hardware
1617 * @skb: sk_buff to place the data into
1619 * This function is based on skb_add_rx_frag. I would have used that
1620 * function however it doesn't handle the truesize case correctly since we
1621 * are allocating more memory than might be used for a single receive.
1623 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1624 struct ixgbe_rx_buffer *rx_buffer,
1625 struct sk_buff *skb, int size)
1627 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
1628 rx_buffer->page, rx_buffer->page_offset,
1631 skb->data_len += size;
1632 skb->truesize += ixgbe_rx_bufsz(rx_ring);
1636 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1637 * @q_vector: structure containing interrupt and ring information
1638 * @rx_ring: rx descriptor ring to transact packets on
1639 * @budget: Total limit on number of packets to process
1641 * This function provides a "bounce buffer" approach to Rx interrupt
1642 * processing. The advantage to this is that on systems that have
1643 * expensive overhead for IOMMU access this provides a means of avoiding
1644 * it by maintaining the mapping of the page to the syste.
1646 * Returns true if all work is completed without reaching budget
1648 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
1649 struct ixgbe_ring *rx_ring,
1652 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1654 struct ixgbe_adapter *adapter = q_vector->adapter;
1656 #endif /* IXGBE_FCOE */
1657 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
1660 struct ixgbe_rx_buffer *rx_buffer;
1661 union ixgbe_adv_rx_desc *rx_desc;
1662 struct sk_buff *skb;
1666 /* return some buffers to hardware, one at a time is too slow */
1667 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
1668 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1672 ntc = rx_ring->next_to_clean;
1673 rx_desc = IXGBE_RX_DESC(rx_ring, ntc);
1674 rx_buffer = &rx_ring->rx_buffer_info[ntc];
1676 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
1680 * This memory barrier is needed to keep us from reading
1681 * any other fields out of the rx_desc until we know the
1682 * RXD_STAT_DD bit is set
1686 page = rx_buffer->page;
1689 skb = rx_buffer->skb;
1692 void *page_addr = page_address(page) +
1693 rx_buffer->page_offset;
1695 /* prefetch first cache line of first page */
1696 prefetch(page_addr);
1697 #if L1_CACHE_BYTES < 128
1698 prefetch(page_addr + L1_CACHE_BYTES);
1701 /* allocate a skb to store the frags */
1702 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1704 if (unlikely(!skb)) {
1705 rx_ring->rx_stats.alloc_rx_buff_failed++;
1710 * we will be copying header into skb->data in
1711 * pskb_may_pull so it is in our interest to prefetch
1712 * it now to avoid a possible cache miss
1714 prefetchw(skb->data);
1717 * Delay unmapping of the first packet. It carries the
1718 * header information, HW may still access the header
1719 * after the writeback. Only unmap it when EOP is
1722 IXGBE_CB(skb)->dma = rx_buffer->dma;
1724 /* we are reusing so sync this buffer for CPU use */
1725 dma_sync_single_range_for_cpu(rx_ring->dev,
1727 rx_buffer->page_offset,
1728 ixgbe_rx_bufsz(rx_ring),
1732 /* pull page into skb */
1733 ixgbe_add_rx_frag(rx_ring, rx_buffer, skb,
1734 le16_to_cpu(rx_desc->wb.upper.length));
1736 if (ixgbe_can_reuse_page(rx_buffer)) {
1737 /* hand second half of page back to the ring */
1738 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
1739 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
1740 /* the page has been released from the ring */
1741 IXGBE_CB(skb)->page_released = true;
1743 /* we are not reusing the buffer so unmap it */
1744 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
1745 ixgbe_rx_pg_size(rx_ring),
1749 /* clear contents of buffer_info */
1750 rx_buffer->skb = NULL;
1752 rx_buffer->page = NULL;
1754 ixgbe_get_rsc_cnt(rx_ring, rx_desc, skb);
1758 /* place incomplete frames back on ring for completion */
1759 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
1762 /* verify the packet layout is correct */
1763 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
1766 /* probably a little skewed due to removing CRC */
1767 total_rx_bytes += skb->len;
1770 /* populate checksum, timestamp, VLAN, and protocol */
1771 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
1774 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1775 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
1776 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
1778 dev_kfree_skb_any(skb);
1783 #endif /* IXGBE_FCOE */
1784 ixgbe_rx_skb(q_vector, skb);
1786 /* update budget accounting */
1788 } while (likely(budget));
1791 /* include DDPed FCoE data */
1792 if (ddp_bytes > 0) {
1795 mss = rx_ring->netdev->mtu - sizeof(struct fcoe_hdr) -
1796 sizeof(struct fc_frame_header) -
1797 sizeof(struct fcoe_crc_eof);
1800 total_rx_bytes += ddp_bytes;
1801 total_rx_packets += DIV_ROUND_UP(ddp_bytes, mss);
1804 #endif /* IXGBE_FCOE */
1805 u64_stats_update_begin(&rx_ring->syncp);
1806 rx_ring->stats.packets += total_rx_packets;
1807 rx_ring->stats.bytes += total_rx_bytes;
1808 u64_stats_update_end(&rx_ring->syncp);
1809 q_vector->rx.total_packets += total_rx_packets;
1810 q_vector->rx.total_bytes += total_rx_bytes;
1813 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1819 * ixgbe_configure_msix - Configure MSI-X hardware
1820 * @adapter: board private structure
1822 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1825 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1827 struct ixgbe_q_vector *q_vector;
1831 /* Populate MSIX to EITR Select */
1832 if (adapter->num_vfs > 32) {
1833 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
1834 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
1838 * Populate the IVAR table and set the ITR values to the
1839 * corresponding register.
1841 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
1842 struct ixgbe_ring *ring;
1843 q_vector = adapter->q_vector[v_idx];
1845 ixgbe_for_each_ring(ring, q_vector->rx)
1846 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1848 ixgbe_for_each_ring(ring, q_vector->tx)
1849 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1851 if (q_vector->tx.ring && !q_vector->rx.ring) {
1852 /* tx only vector */
1853 if (adapter->tx_itr_setting == 1)
1854 q_vector->itr = IXGBE_10K_ITR;
1856 q_vector->itr = adapter->tx_itr_setting;
1858 /* rx or rx/tx vector */
1859 if (adapter->rx_itr_setting == 1)
1860 q_vector->itr = IXGBE_20K_ITR;
1862 q_vector->itr = adapter->rx_itr_setting;
1865 ixgbe_write_eitr(q_vector);
1868 switch (adapter->hw.mac.type) {
1869 case ixgbe_mac_82598EB:
1870 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
1873 case ixgbe_mac_82599EB:
1874 case ixgbe_mac_X540:
1875 ixgbe_set_ivar(adapter, -1, 1, v_idx);
1880 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
1882 /* set up to autoclear timer, and the vectors */
1883 mask = IXGBE_EIMS_ENABLE_MASK;
1884 mask &= ~(IXGBE_EIMS_OTHER |
1885 IXGBE_EIMS_MAILBOX |
1888 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
1891 enum latency_range {
1895 latency_invalid = 255
1899 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1900 * @q_vector: structure containing interrupt and ring information
1901 * @ring_container: structure containing ring performance data
1903 * Stores a new ITR value based on packets and byte
1904 * counts during the last interrupt. The advantage of per interrupt
1905 * computation is faster updates and more accurate ITR for the current
1906 * traffic pattern. Constants in this function were computed
1907 * based on theoretical maximum wire speed and thresholds were set based
1908 * on testing data as well as attempting to minimize response time
1909 * while increasing bulk throughput.
1910 * this functionality is controlled by the InterruptThrottleRate module
1911 * parameter (see ixgbe_param.c)
1913 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
1914 struct ixgbe_ring_container *ring_container)
1916 int bytes = ring_container->total_bytes;
1917 int packets = ring_container->total_packets;
1920 u8 itr_setting = ring_container->itr;
1925 /* simple throttlerate management
1926 * 0-10MB/s lowest (100000 ints/s)
1927 * 10-20MB/s low (20000 ints/s)
1928 * 20-1249MB/s bulk (8000 ints/s)
1930 /* what was last interrupt timeslice? */
1931 timepassed_us = q_vector->itr >> 2;
1932 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1934 switch (itr_setting) {
1935 case lowest_latency:
1936 if (bytes_perint > 10)
1937 itr_setting = low_latency;
1940 if (bytes_perint > 20)
1941 itr_setting = bulk_latency;
1942 else if (bytes_perint <= 10)
1943 itr_setting = lowest_latency;
1946 if (bytes_perint <= 20)
1947 itr_setting = low_latency;
1951 /* clear work counters since we have the values we need */
1952 ring_container->total_bytes = 0;
1953 ring_container->total_packets = 0;
1955 /* write updated itr to ring container */
1956 ring_container->itr = itr_setting;
1960 * ixgbe_write_eitr - write EITR register in hardware specific way
1961 * @q_vector: structure containing interrupt and ring information
1963 * This function is made to be called by ethtool and by the driver
1964 * when it needs to update EITR registers at runtime. Hardware
1965 * specific quirks/differences are taken care of here.
1967 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
1969 struct ixgbe_adapter *adapter = q_vector->adapter;
1970 struct ixgbe_hw *hw = &adapter->hw;
1971 int v_idx = q_vector->v_idx;
1972 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1974 switch (adapter->hw.mac.type) {
1975 case ixgbe_mac_82598EB:
1976 /* must write high and low 16 bits to reset counter */
1977 itr_reg |= (itr_reg << 16);
1979 case ixgbe_mac_82599EB:
1980 case ixgbe_mac_X540:
1982 * set the WDIS bit to not clear the timer bits and cause an
1983 * immediate assertion of the interrupt
1985 itr_reg |= IXGBE_EITR_CNT_WDIS;
1990 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
1993 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
1995 u32 new_itr = q_vector->itr;
1998 ixgbe_update_itr(q_vector, &q_vector->tx);
1999 ixgbe_update_itr(q_vector, &q_vector->rx);
2001 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2003 switch (current_itr) {
2004 /* counts and packets in update_itr are dependent on these numbers */
2005 case lowest_latency:
2006 new_itr = IXGBE_100K_ITR;
2009 new_itr = IXGBE_20K_ITR;
2012 new_itr = IXGBE_8K_ITR;
2018 if (new_itr != q_vector->itr) {
2019 /* do an exponential smoothing */
2020 new_itr = (10 * new_itr * q_vector->itr) /
2021 ((9 * new_itr) + q_vector->itr);
2023 /* save the algorithm value here */
2024 q_vector->itr = new_itr;
2026 ixgbe_write_eitr(q_vector);
2031 * ixgbe_check_overtemp_subtask - check for over temperature
2032 * @adapter: pointer to adapter
2034 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2036 struct ixgbe_hw *hw = &adapter->hw;
2037 u32 eicr = adapter->interrupt_event;
2039 if (test_bit(__IXGBE_DOWN, &adapter->state))
2042 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2043 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2046 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2048 switch (hw->device_id) {
2049 case IXGBE_DEV_ID_82599_T3_LOM:
2051 * Since the warning interrupt is for both ports
2052 * we don't have to check if:
2053 * - This interrupt wasn't for our port.
2054 * - We may have missed the interrupt so always have to
2055 * check if we got a LSC
2057 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2058 !(eicr & IXGBE_EICR_LSC))
2061 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2063 bool link_up = false;
2065 hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2071 /* Check if this is not due to overtemp */
2072 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2077 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2082 "Network adapter has been stopped because it has over heated. "
2083 "Restart the computer. If the problem persists, "
2084 "power off the system and replace the adapter\n");
2086 adapter->interrupt_event = 0;
2089 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2091 struct ixgbe_hw *hw = &adapter->hw;
2093 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2094 (eicr & IXGBE_EICR_GPI_SDP1)) {
2095 e_crit(probe, "Fan has stopped, replace the adapter\n");
2096 /* write to clear the interrupt */
2097 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2101 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2103 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2106 switch (adapter->hw.mac.type) {
2107 case ixgbe_mac_82599EB:
2109 * Need to check link state so complete overtemp check
2112 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2113 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2114 adapter->interrupt_event = eicr;
2115 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2116 ixgbe_service_event_schedule(adapter);
2120 case ixgbe_mac_X540:
2121 if (!(eicr & IXGBE_EICR_TS))
2129 "Network adapter has been stopped because it has over heated. "
2130 "Restart the computer. If the problem persists, "
2131 "power off the system and replace the adapter\n");
2134 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2136 struct ixgbe_hw *hw = &adapter->hw;
2138 if (eicr & IXGBE_EICR_GPI_SDP2) {
2139 /* Clear the interrupt */
2140 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2141 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2142 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2143 ixgbe_service_event_schedule(adapter);
2147 if (eicr & IXGBE_EICR_GPI_SDP1) {
2148 /* Clear the interrupt */
2149 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2150 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2151 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2152 ixgbe_service_event_schedule(adapter);
2157 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2159 struct ixgbe_hw *hw = &adapter->hw;
2162 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2163 adapter->link_check_timeout = jiffies;
2164 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2165 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2166 IXGBE_WRITE_FLUSH(hw);
2167 ixgbe_service_event_schedule(adapter);
2171 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2175 struct ixgbe_hw *hw = &adapter->hw;
2177 switch (hw->mac.type) {
2178 case ixgbe_mac_82598EB:
2179 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2180 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2182 case ixgbe_mac_82599EB:
2183 case ixgbe_mac_X540:
2184 mask = (qmask & 0xFFFFFFFF);
2186 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2187 mask = (qmask >> 32);
2189 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2194 /* skip the flush */
2197 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2201 struct ixgbe_hw *hw = &adapter->hw;
2203 switch (hw->mac.type) {
2204 case ixgbe_mac_82598EB:
2205 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2206 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2208 case ixgbe_mac_82599EB:
2209 case ixgbe_mac_X540:
2210 mask = (qmask & 0xFFFFFFFF);
2212 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2213 mask = (qmask >> 32);
2215 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2220 /* skip the flush */
2224 * ixgbe_irq_enable - Enable default interrupt generation settings
2225 * @adapter: board private structure
2227 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2230 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2232 /* don't reenable LSC while waiting for link */
2233 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2234 mask &= ~IXGBE_EIMS_LSC;
2236 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2237 switch (adapter->hw.mac.type) {
2238 case ixgbe_mac_82599EB:
2239 mask |= IXGBE_EIMS_GPI_SDP0;
2241 case ixgbe_mac_X540:
2242 mask |= IXGBE_EIMS_TS;
2247 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2248 mask |= IXGBE_EIMS_GPI_SDP1;
2249 switch (adapter->hw.mac.type) {
2250 case ixgbe_mac_82599EB:
2251 mask |= IXGBE_EIMS_GPI_SDP1;
2252 mask |= IXGBE_EIMS_GPI_SDP2;
2253 case ixgbe_mac_X540:
2254 mask |= IXGBE_EIMS_ECC;
2255 mask |= IXGBE_EIMS_MAILBOX;
2260 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2261 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2262 mask |= IXGBE_EIMS_FLOW_DIR;
2264 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2266 ixgbe_irq_enable_queues(adapter, ~0);
2268 IXGBE_WRITE_FLUSH(&adapter->hw);
2271 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2273 struct ixgbe_adapter *adapter = data;
2274 struct ixgbe_hw *hw = &adapter->hw;
2278 * Workaround for Silicon errata. Use clear-by-write instead
2279 * of clear-by-read. Reading with EICS will return the
2280 * interrupt causes without clearing, which later be done
2281 * with the write to EICR.
2283 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2284 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2286 if (eicr & IXGBE_EICR_LSC)
2287 ixgbe_check_lsc(adapter);
2289 if (eicr & IXGBE_EICR_MAILBOX)
2290 ixgbe_msg_task(adapter);
2292 switch (hw->mac.type) {
2293 case ixgbe_mac_82599EB:
2294 case ixgbe_mac_X540:
2295 if (eicr & IXGBE_EICR_ECC)
2296 e_info(link, "Received unrecoverable ECC Err, please "
2298 /* Handle Flow Director Full threshold interrupt */
2299 if (eicr & IXGBE_EICR_FLOW_DIR) {
2300 int reinit_count = 0;
2302 for (i = 0; i < adapter->num_tx_queues; i++) {
2303 struct ixgbe_ring *ring = adapter->tx_ring[i];
2304 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2309 /* no more flow director interrupts until after init */
2310 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2311 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2312 ixgbe_service_event_schedule(adapter);
2315 ixgbe_check_sfp_event(adapter, eicr);
2316 ixgbe_check_overtemp_event(adapter, eicr);
2322 ixgbe_check_fan_failure(adapter, eicr);
2323 #ifdef CONFIG_IXGBE_PTP
2324 ixgbe_ptp_check_pps_event(adapter, eicr);
2327 /* re-enable the original interrupt state, no lsc, no queues */
2328 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2329 ixgbe_irq_enable(adapter, false, false);
2334 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2336 struct ixgbe_q_vector *q_vector = data;
2338 /* EIAM disabled interrupts (on this vector) for us */
2340 if (q_vector->rx.ring || q_vector->tx.ring)
2341 napi_schedule(&q_vector->napi);
2347 * ixgbe_poll - NAPI Rx polling callback
2348 * @napi: structure for representing this polling device
2349 * @budget: how many packets driver is allowed to clean
2351 * This function is used for legacy and MSI, NAPI mode
2353 int ixgbe_poll(struct napi_struct *napi, int budget)
2355 struct ixgbe_q_vector *q_vector =
2356 container_of(napi, struct ixgbe_q_vector, napi);
2357 struct ixgbe_adapter *adapter = q_vector->adapter;
2358 struct ixgbe_ring *ring;
2359 int per_ring_budget;
2360 bool clean_complete = true;
2362 #ifdef CONFIG_IXGBE_DCA
2363 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2364 ixgbe_update_dca(q_vector);
2367 ixgbe_for_each_ring(ring, q_vector->tx)
2368 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2370 /* attempt to distribute budget to each queue fairly, but don't allow
2371 * the budget to go below 1 because we'll exit polling */
2372 if (q_vector->rx.count > 1)
2373 per_ring_budget = max(budget/q_vector->rx.count, 1);
2375 per_ring_budget = budget;
2377 ixgbe_for_each_ring(ring, q_vector->rx)
2378 clean_complete &= ixgbe_clean_rx_irq(q_vector, ring,
2381 /* If all work not completed, return budget and keep polling */
2382 if (!clean_complete)
2385 /* all work done, exit the polling mode */
2386 napi_complete(napi);
2387 if (adapter->rx_itr_setting & 1)
2388 ixgbe_set_itr(q_vector);
2389 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2390 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2396 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2397 * @adapter: board private structure
2399 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2400 * interrupts from the kernel.
2402 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2404 struct net_device *netdev = adapter->netdev;
2408 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2409 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2410 struct msix_entry *entry = &adapter->msix_entries[vector];
2412 if (q_vector->tx.ring && q_vector->rx.ring) {
2413 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2414 "%s-%s-%d", netdev->name, "TxRx", ri++);
2416 } else if (q_vector->rx.ring) {
2417 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2418 "%s-%s-%d", netdev->name, "rx", ri++);
2419 } else if (q_vector->tx.ring) {
2420 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2421 "%s-%s-%d", netdev->name, "tx", ti++);
2423 /* skip this unused q_vector */
2426 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2427 q_vector->name, q_vector);
2429 e_err(probe, "request_irq failed for MSIX interrupt "
2430 "Error: %d\n", err);
2431 goto free_queue_irqs;
2433 /* If Flow Director is enabled, set interrupt affinity */
2434 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2435 /* assign the mask for this irq */
2436 irq_set_affinity_hint(entry->vector,
2437 &q_vector->affinity_mask);
2441 err = request_irq(adapter->msix_entries[vector].vector,
2442 ixgbe_msix_other, 0, netdev->name, adapter);
2444 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2445 goto free_queue_irqs;
2453 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2455 free_irq(adapter->msix_entries[vector].vector,
2456 adapter->q_vector[vector]);
2458 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2459 pci_disable_msix(adapter->pdev);
2460 kfree(adapter->msix_entries);
2461 adapter->msix_entries = NULL;
2466 * ixgbe_intr - legacy mode Interrupt Handler
2467 * @irq: interrupt number
2468 * @data: pointer to a network interface device structure
2470 static irqreturn_t ixgbe_intr(int irq, void *data)
2472 struct ixgbe_adapter *adapter = data;
2473 struct ixgbe_hw *hw = &adapter->hw;
2474 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2478 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2479 * before the read of EICR.
2481 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2483 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2484 * therefore no explicit interrupt disable is necessary */
2485 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2488 * shared interrupt alert!
2489 * make sure interrupts are enabled because the read will
2490 * have disabled interrupts due to EIAM
2491 * finish the workaround of silicon errata on 82598. Unmask
2492 * the interrupt that we masked before the EICR read.
2494 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2495 ixgbe_irq_enable(adapter, true, true);
2496 return IRQ_NONE; /* Not our interrupt */
2499 if (eicr & IXGBE_EICR_LSC)
2500 ixgbe_check_lsc(adapter);
2502 switch (hw->mac.type) {
2503 case ixgbe_mac_82599EB:
2504 ixgbe_check_sfp_event(adapter, eicr);
2506 case ixgbe_mac_X540:
2507 if (eicr & IXGBE_EICR_ECC)
2508 e_info(link, "Received unrecoverable ECC err, please "
2510 ixgbe_check_overtemp_event(adapter, eicr);
2516 ixgbe_check_fan_failure(adapter, eicr);
2517 #ifdef CONFIG_IXGBE_PTP
2518 ixgbe_ptp_check_pps_event(adapter, eicr);
2521 /* would disable interrupts here but EIAM disabled it */
2522 napi_schedule(&q_vector->napi);
2525 * re-enable link(maybe) and non-queue interrupts, no flush.
2526 * ixgbe_poll will re-enable the queue interrupts
2528 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2529 ixgbe_irq_enable(adapter, false, false);
2535 * ixgbe_request_irq - initialize interrupts
2536 * @adapter: board private structure
2538 * Attempts to configure interrupts using the best available
2539 * capabilities of the hardware and kernel.
2541 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2543 struct net_device *netdev = adapter->netdev;
2546 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2547 err = ixgbe_request_msix_irqs(adapter);
2548 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2549 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2550 netdev->name, adapter);
2552 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2553 netdev->name, adapter);
2556 e_err(probe, "request_irq failed, Error %d\n", err);
2561 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2565 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2566 free_irq(adapter->pdev->irq, adapter);
2570 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2571 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2572 struct msix_entry *entry = &adapter->msix_entries[vector];
2574 /* free only the irqs that were actually requested */
2575 if (!q_vector->rx.ring && !q_vector->tx.ring)
2578 /* clear the affinity_mask in the IRQ descriptor */
2579 irq_set_affinity_hint(entry->vector, NULL);
2581 free_irq(entry->vector, q_vector);
2584 free_irq(adapter->msix_entries[vector++].vector, adapter);
2588 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2589 * @adapter: board private structure
2591 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2593 switch (adapter->hw.mac.type) {
2594 case ixgbe_mac_82598EB:
2595 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2597 case ixgbe_mac_82599EB:
2598 case ixgbe_mac_X540:
2599 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2600 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2601 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2606 IXGBE_WRITE_FLUSH(&adapter->hw);
2607 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2610 for (vector = 0; vector < adapter->num_q_vectors; vector++)
2611 synchronize_irq(adapter->msix_entries[vector].vector);
2613 synchronize_irq(adapter->msix_entries[vector++].vector);
2615 synchronize_irq(adapter->pdev->irq);
2620 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2623 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2625 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2628 if (adapter->rx_itr_setting == 1)
2629 q_vector->itr = IXGBE_20K_ITR;
2631 q_vector->itr = adapter->rx_itr_setting;
2633 ixgbe_write_eitr(q_vector);
2635 ixgbe_set_ivar(adapter, 0, 0, 0);
2636 ixgbe_set_ivar(adapter, 1, 0, 0);
2638 e_info(hw, "Legacy interrupt IVAR setup done\n");
2642 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2643 * @adapter: board private structure
2644 * @ring: structure containing ring specific data
2646 * Configure the Tx descriptor ring after a reset.
2648 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2649 struct ixgbe_ring *ring)
2651 struct ixgbe_hw *hw = &adapter->hw;
2652 u64 tdba = ring->dma;
2654 u32 txdctl = IXGBE_TXDCTL_ENABLE;
2655 u8 reg_idx = ring->reg_idx;
2657 /* disable queue to avoid issues while updating state */
2658 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
2659 IXGBE_WRITE_FLUSH(hw);
2661 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
2662 (tdba & DMA_BIT_MASK(32)));
2663 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2664 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2665 ring->count * sizeof(union ixgbe_adv_tx_desc));
2666 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2667 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
2668 ring->tail = hw->hw_addr + IXGBE_TDT(reg_idx);
2671 * set WTHRESH to encourage burst writeback, it should not be set
2672 * higher than 1 when ITR is 0 as it could cause false TX hangs
2674 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2675 * to or less than the number of on chip descriptors, which is
2678 if (!ring->q_vector || (ring->q_vector->itr < 8))
2679 txdctl |= (1 << 16); /* WTHRESH = 1 */
2681 txdctl |= (8 << 16); /* WTHRESH = 8 */
2684 * Setting PTHRESH to 32 both improves performance
2685 * and avoids a TX hang with DFP enabled
2687 txdctl |= (1 << 8) | /* HTHRESH = 1 */
2688 32; /* PTHRESH = 32 */
2690 /* reinitialize flowdirector state */
2691 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2692 adapter->atr_sample_rate) {
2693 ring->atr_sample_rate = adapter->atr_sample_rate;
2694 ring->atr_count = 0;
2695 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
2697 ring->atr_sample_rate = 0;
2700 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
2703 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
2705 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2706 if (hw->mac.type == ixgbe_mac_82598EB &&
2707 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
2710 /* poll to verify queue is enabled */
2712 usleep_range(1000, 2000);
2713 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
2714 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
2716 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
2719 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
2721 struct ixgbe_hw *hw = &adapter->hw;
2723 u8 tcs = netdev_get_num_tc(adapter->netdev);
2725 if (hw->mac.type == ixgbe_mac_82598EB)
2728 /* disable the arbiter while setting MTQC */
2729 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2730 rttdcs |= IXGBE_RTTDCS_ARBDIS;
2731 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2733 /* set transmit pool layout */
2734 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2735 mtqc = IXGBE_MTQC_VT_ENA;
2737 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2739 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2740 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
2741 mtqc |= IXGBE_MTQC_32VF;
2743 mtqc |= IXGBE_MTQC_64VF;
2746 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2748 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2750 mtqc = IXGBE_MTQC_64Q_1PB;
2753 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
2755 /* Enable Security TX Buffer IFG for multiple pb */
2757 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
2758 sectx |= IXGBE_SECTX_DCB;
2759 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
2762 /* re-enable the arbiter */
2763 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
2764 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2768 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2769 * @adapter: board private structure
2771 * Configure the Tx unit of the MAC after a reset.
2773 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
2775 struct ixgbe_hw *hw = &adapter->hw;
2779 ixgbe_setup_mtqc(adapter);
2781 if (hw->mac.type != ixgbe_mac_82598EB) {
2782 /* DMATXCTL.EN must be before Tx queues are enabled */
2783 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2784 dmatxctl |= IXGBE_DMATXCTL_TE;
2785 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2788 /* Setup the HW Tx Head and Tail descriptor pointers */
2789 for (i = 0; i < adapter->num_tx_queues; i++)
2790 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
2793 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
2794 struct ixgbe_ring *ring)
2796 struct ixgbe_hw *hw = &adapter->hw;
2797 u8 reg_idx = ring->reg_idx;
2798 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2800 srrctl |= IXGBE_SRRCTL_DROP_EN;
2802 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2805 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
2806 struct ixgbe_ring *ring)
2808 struct ixgbe_hw *hw = &adapter->hw;
2809 u8 reg_idx = ring->reg_idx;
2810 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2812 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
2814 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2817 #ifdef CONFIG_IXGBE_DCB
2818 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2820 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2824 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
2826 if (adapter->ixgbe_ieee_pfc)
2827 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
2830 * We should set the drop enable bit if:
2833 * Number of Rx queues > 1 and flow control is disabled
2835 * This allows us to avoid head of line blocking for security
2836 * and performance reasons.
2838 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
2839 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
2840 for (i = 0; i < adapter->num_rx_queues; i++)
2841 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
2843 for (i = 0; i < adapter->num_rx_queues; i++)
2844 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
2848 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2850 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
2851 struct ixgbe_ring *rx_ring)
2853 struct ixgbe_hw *hw = &adapter->hw;
2855 u8 reg_idx = rx_ring->reg_idx;
2857 if (hw->mac.type == ixgbe_mac_82598EB) {
2858 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
2861 * if VMDq is not active we must program one srrctl register
2862 * per RSS queue since we have enabled RDRXCTL.MVMEN
2867 /* configure header buffer length, needed for RSC */
2868 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
2870 /* configure the packet buffer length */
2871 #if PAGE_SIZE > IXGBE_MAX_RXBUFFER
2872 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2874 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2877 /* configure descriptor type */
2878 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
2880 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2883 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
2885 struct ixgbe_hw *hw = &adapter->hw;
2886 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2887 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2888 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2889 u32 mrqc = 0, reta = 0;
2892 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2894 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
2898 * Program table for at least 2 queues w/ SR-IOV so that VFs can
2899 * make full use of any rings they may have. We will use the
2900 * PSRTYPE register to control how many rings we use within the PF.
2902 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
2905 /* Fill out hash function seeds */
2906 for (i = 0; i < 10; i++)
2907 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
2909 /* Fill out redirection table */
2910 for (i = 0, j = 0; i < 128; i++, j++) {
2913 /* reta = 4-byte sliding window of
2914 * 0x00..(indices-1)(indices-1)00..etc. */
2915 reta = (reta << 8) | (j * 0x11);
2917 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
2920 /* Disable indicating checksum in descriptor, enables RSS hash */
2921 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
2922 rxcsum |= IXGBE_RXCSUM_PCSD;
2923 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
2925 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2926 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED)
2927 mrqc = IXGBE_MRQC_RSSEN;
2929 u8 tcs = netdev_get_num_tc(adapter->netdev);
2931 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2933 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
2935 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
2936 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
2937 mrqc = IXGBE_MRQC_VMDQRSS32EN;
2939 mrqc = IXGBE_MRQC_VMDQRSS64EN;
2942 mrqc = IXGBE_MRQC_RTRSS8TCEN;
2944 mrqc = IXGBE_MRQC_RTRSS4TCEN;
2946 mrqc = IXGBE_MRQC_RSSEN;
2950 /* Perform hash on these packet types */
2951 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 |
2952 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
2953 IXGBE_MRQC_RSS_FIELD_IPV6 |
2954 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2956 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2957 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2958 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2959 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2961 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2965 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2966 * @adapter: address of board private structure
2967 * @index: index of ring to set
2969 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
2970 struct ixgbe_ring *ring)
2972 struct ixgbe_hw *hw = &adapter->hw;
2974 u8 reg_idx = ring->reg_idx;
2976 if (!ring_is_rsc_enabled(ring))
2979 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
2980 rscctrl |= IXGBE_RSCCTL_RSCEN;
2982 * we must limit the number of descriptors so that the
2983 * total size of max desc * buf_len is not greater
2986 #if (PAGE_SIZE <= 8192)
2987 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2988 #elif (PAGE_SIZE <= 16384)
2989 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2991 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2993 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
2996 #define IXGBE_MAX_RX_DESC_POLL 10
2997 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
2998 struct ixgbe_ring *ring)
3000 struct ixgbe_hw *hw = &adapter->hw;
3001 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3003 u8 reg_idx = ring->reg_idx;
3005 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3006 if (hw->mac.type == ixgbe_mac_82598EB &&
3007 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3011 usleep_range(1000, 2000);
3012 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3013 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3016 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3017 "the polling period\n", reg_idx);
3021 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3022 struct ixgbe_ring *ring)
3024 struct ixgbe_hw *hw = &adapter->hw;
3025 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3027 u8 reg_idx = ring->reg_idx;
3029 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3030 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3032 /* write value back with RXDCTL.ENABLE bit cleared */
3033 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3035 if (hw->mac.type == ixgbe_mac_82598EB &&
3036 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3039 /* the hardware may take up to 100us to really disable the rx queue */
3042 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3043 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3046 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3047 "the polling period\n", reg_idx);
3051 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3052 struct ixgbe_ring *ring)
3054 struct ixgbe_hw *hw = &adapter->hw;
3055 u64 rdba = ring->dma;
3057 u8 reg_idx = ring->reg_idx;
3059 /* disable queue to avoid issues while updating state */
3060 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3061 ixgbe_disable_rx_queue(adapter, ring);
3063 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3064 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3065 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3066 ring->count * sizeof(union ixgbe_adv_rx_desc));
3067 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3068 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3069 ring->tail = hw->hw_addr + IXGBE_RDT(reg_idx);
3071 ixgbe_configure_srrctl(adapter, ring);
3072 ixgbe_configure_rscctl(adapter, ring);
3074 /* If operating in IOV mode set RLPML for X540 */
3075 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
3076 hw->mac.type == ixgbe_mac_X540) {
3077 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
3078 rxdctl |= ((ring->netdev->mtu + ETH_HLEN +
3079 ETH_FCS_LEN + VLAN_HLEN) | IXGBE_RXDCTL_RLPML_EN);
3082 if (hw->mac.type == ixgbe_mac_82598EB) {
3084 * enable cache line friendly hardware writes:
3085 * PTHRESH=32 descriptors (half the internal cache),
3086 * this also removes ugly rx_no_buffer_count increment
3087 * HTHRESH=4 descriptors (to minimize latency on fetch)
3088 * WTHRESH=8 burst writeback up to two cache lines
3090 rxdctl &= ~0x3FFFFF;
3094 /* enable receive descriptor ring */
3095 rxdctl |= IXGBE_RXDCTL_ENABLE;
3096 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3098 ixgbe_rx_desc_queue_enable(adapter, ring);
3099 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3102 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3104 struct ixgbe_hw *hw = &adapter->hw;
3107 /* PSRTYPE must be initialized in non 82598 adapters */
3108 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3109 IXGBE_PSRTYPE_UDPHDR |
3110 IXGBE_PSRTYPE_IPV4HDR |
3111 IXGBE_PSRTYPE_L2HDR |
3112 IXGBE_PSRTYPE_IPV6HDR;
3114 if (hw->mac.type == ixgbe_mac_82598EB)
3117 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
3118 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3125 for (p = 0; p < adapter->num_rx_pools; p++)
3126 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(adapter->num_vfs + p),
3130 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3132 struct ixgbe_hw *hw = &adapter->hw;
3133 u32 reg_offset, vf_shift;
3134 u32 gcr_ext, vmdctl;
3137 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3140 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3141 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3142 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3143 vmdctl |= (adapter->num_vfs << IXGBE_VT_CTL_POOL_SHIFT);
3144 vmdctl |= IXGBE_VT_CTL_REPLEN;
3145 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3147 vf_shift = adapter->num_vfs % 32;
3148 reg_offset = (adapter->num_vfs >= 32) ? 1 : 0;
3150 /* Enable only the PF's pool for Tx/Rx */
3151 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3152 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3153 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3154 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3155 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3157 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3158 hw->mac.ops.set_vmdq(hw, 0, adapter->num_vfs);
3161 * Set up VF register offsets for selected VT Mode,
3162 * i.e. 32 or 64 VFs for SR-IOV
3164 gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
3165 gcr_ext |= IXGBE_GCR_EXT_MSIX_EN;
3166 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_64;
3167 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3169 /* enable Tx loopback for VF/PF communication */
3170 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3172 /* Enable MAC Anti-Spoofing */
3173 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3175 /* For VFs that have spoof checking turned off */
3176 for (i = 0; i < adapter->num_vfs; i++) {
3177 if (!adapter->vfinfo[i].spoofchk_enabled)
3178 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3182 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3184 struct ixgbe_hw *hw = &adapter->hw;
3185 struct net_device *netdev = adapter->netdev;
3186 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3187 struct ixgbe_ring *rx_ring;
3192 /* adjust max frame to be able to do baby jumbo for FCoE */
3193 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3194 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3195 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3197 #endif /* IXGBE_FCOE */
3198 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3199 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3200 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3201 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3203 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3206 /* MHADD will allow an extra 4 bytes past for vlan tagged frames */
3207 max_frame += VLAN_HLEN;
3209 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3210 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3211 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3212 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3215 * Setup the HW Rx Head and Tail Descriptor Pointers and
3216 * the Base and Length of the Rx Descriptor Ring
3218 for (i = 0; i < adapter->num_rx_queues; i++) {
3219 rx_ring = adapter->rx_ring[i];
3220 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3221 set_ring_rsc_enabled(rx_ring);
3223 clear_ring_rsc_enabled(rx_ring);
3227 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3229 struct ixgbe_hw *hw = &adapter->hw;
3230 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3232 switch (hw->mac.type) {
3233 case ixgbe_mac_82598EB:
3235 * For VMDq support of different descriptor types or
3236 * buffer sizes through the use of multiple SRRCTL
3237 * registers, RDRXCTL.MVMEN must be set to 1
3239 * also, the manual doesn't mention it clearly but DCA hints
3240 * will only use queue 0's tags unless this bit is set. Side
3241 * effects of setting this bit are only that SRRCTL must be
3242 * fully programmed [0..15]
3244 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3246 case ixgbe_mac_82599EB:
3247 case ixgbe_mac_X540:
3248 /* Disable RSC for ACK packets */
3249 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3250 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3251 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3252 /* hardware requires some bits to be set by default */
3253 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3254 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3257 /* We should do nothing since we don't know this hardware */
3261 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3265 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3266 * @adapter: board private structure
3268 * Configure the Rx unit of the MAC after a reset.
3270 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3272 struct ixgbe_hw *hw = &adapter->hw;
3276 /* disable receives while setting up the descriptors */
3277 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3278 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3280 ixgbe_setup_psrtype(adapter);
3281 ixgbe_setup_rdrxctl(adapter);
3283 /* Program registers for the distribution of queues */
3284 ixgbe_setup_mrqc(adapter);
3286 /* set_rx_buffer_len must be called before ring initialization */
3287 ixgbe_set_rx_buffer_len(adapter);
3290 * Setup the HW Rx Head and Tail Descriptor Pointers and
3291 * the Base and Length of the Rx Descriptor Ring
3293 for (i = 0; i < adapter->num_rx_queues; i++)
3294 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3296 /* disable drop enable for 82598 parts */
3297 if (hw->mac.type == ixgbe_mac_82598EB)
3298 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3300 /* enable all receives */
3301 rxctrl |= IXGBE_RXCTRL_RXEN;
3302 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3305 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3307 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3308 struct ixgbe_hw *hw = &adapter->hw;
3309 int pool_ndx = adapter->num_vfs;
3311 /* add VID to filter table */
3312 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, true);
3313 set_bit(vid, adapter->active_vlans);
3318 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3320 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3321 struct ixgbe_hw *hw = &adapter->hw;
3322 int pool_ndx = adapter->num_vfs;
3324 /* remove VID from filter table */
3325 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, false);
3326 clear_bit(vid, adapter->active_vlans);
3332 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3333 * @adapter: driver data
3335 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
3337 struct ixgbe_hw *hw = &adapter->hw;
3340 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3341 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3342 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3346 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3347 * @adapter: driver data
3349 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
3351 struct ixgbe_hw *hw = &adapter->hw;
3354 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3355 vlnctrl |= IXGBE_VLNCTRL_VFE;
3356 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
3357 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3361 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3362 * @adapter: driver data
3364 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3366 struct ixgbe_hw *hw = &adapter->hw;
3370 switch (hw->mac.type) {
3371 case ixgbe_mac_82598EB:
3372 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3373 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3374 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3376 case ixgbe_mac_82599EB:
3377 case ixgbe_mac_X540:
3378 for (i = 0; i < adapter->num_rx_queues; i++) {
3379 j = adapter->rx_ring[i]->reg_idx;
3380 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3381 vlnctrl &= ~IXGBE_RXDCTL_VME;
3382 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3391 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3392 * @adapter: driver data
3394 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3396 struct ixgbe_hw *hw = &adapter->hw;
3400 switch (hw->mac.type) {
3401 case ixgbe_mac_82598EB:
3402 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3403 vlnctrl |= IXGBE_VLNCTRL_VME;
3404 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3406 case ixgbe_mac_82599EB:
3407 case ixgbe_mac_X540:
3408 for (i = 0; i < adapter->num_rx_queues; i++) {
3409 j = adapter->rx_ring[i]->reg_idx;
3410 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3411 vlnctrl |= IXGBE_RXDCTL_VME;
3412 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3420 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3424 ixgbe_vlan_rx_add_vid(adapter->netdev, 0);
3426 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3427 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
3431 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3432 * @netdev: network interface device structure
3434 * Writes unicast address list to the RAR table.
3435 * Returns: -ENOMEM on failure/insufficient address space
3436 * 0 on no addresses written
3437 * X on writing X addresses to the RAR table
3439 static int ixgbe_write_uc_addr_list(struct net_device *netdev)
3441 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3442 struct ixgbe_hw *hw = &adapter->hw;
3443 unsigned int vfn = adapter->num_vfs;
3444 unsigned int rar_entries = IXGBE_MAX_PF_MACVLANS;
3447 /* return ENOMEM indicating insufficient memory for addresses */
3448 if (netdev_uc_count(netdev) > rar_entries)
3451 if (!netdev_uc_empty(netdev) && rar_entries) {
3452 struct netdev_hw_addr *ha;
3453 /* return error if we do not support writing to RAR table */
3454 if (!hw->mac.ops.set_rar)
3457 netdev_for_each_uc_addr(ha, netdev) {
3460 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3465 /* write the addresses in reverse order to avoid write combining */
3466 for (; rar_entries > 0 ; rar_entries--)
3467 hw->mac.ops.clear_rar(hw, rar_entries);
3473 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3474 * @netdev: network interface device structure
3476 * The set_rx_method entry point is called whenever the unicast/multicast
3477 * address list or the network interface flags are updated. This routine is
3478 * responsible for configuring the hardware for proper unicast, multicast and
3481 void ixgbe_set_rx_mode(struct net_device *netdev)
3483 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3484 struct ixgbe_hw *hw = &adapter->hw;
3485 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3488 /* Check for Promiscuous and All Multicast modes */
3490 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3492 /* set all bits that we expect to always be set */
3493 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
3494 fctrl |= IXGBE_FCTRL_BAM;
3495 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3496 fctrl |= IXGBE_FCTRL_PMCF;
3498 /* clear the bits we are changing the status of */
3499 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3501 if (netdev->flags & IFF_PROMISC) {
3502 hw->addr_ctrl.user_set_promisc = true;
3503 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3504 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
3505 /* don't hardware filter vlans in promisc mode */
3506 ixgbe_vlan_filter_disable(adapter);
3508 if (netdev->flags & IFF_ALLMULTI) {
3509 fctrl |= IXGBE_FCTRL_MPE;
3510 vmolr |= IXGBE_VMOLR_MPE;
3513 * Write addresses to the MTA, if the attempt fails
3514 * then we should just turn on promiscuous mode so
3515 * that we can at least receive multicast traffic
3517 hw->mac.ops.update_mc_addr_list(hw, netdev);
3518 vmolr |= IXGBE_VMOLR_ROMPE;
3520 ixgbe_vlan_filter_enable(adapter);
3521 hw->addr_ctrl.user_set_promisc = false;
3525 * Write addresses to available RAR registers, if there is not
3526 * sufficient space to store all the addresses then enable
3527 * unicast promiscuous mode
3529 count = ixgbe_write_uc_addr_list(netdev);
3531 fctrl |= IXGBE_FCTRL_UPE;
3532 vmolr |= IXGBE_VMOLR_ROPE;
3535 if (adapter->num_vfs) {
3536 ixgbe_restore_vf_multicasts(adapter);
3537 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(adapter->num_vfs)) &
3538 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3540 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(adapter->num_vfs), vmolr);
3543 /* This is useful for sniffing bad packets. */
3544 if (adapter->netdev->features & NETIF_F_RXALL) {
3545 /* UPE and MPE will be handled by normal PROMISC logic
3546 * in e1000e_set_rx_mode */
3547 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
3548 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
3549 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
3551 fctrl &= ~(IXGBE_FCTRL_DPF);
3552 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3555 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3557 if (netdev->features & NETIF_F_HW_VLAN_RX)
3558 ixgbe_vlan_strip_enable(adapter);
3560 ixgbe_vlan_strip_disable(adapter);
3563 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3567 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
3568 napi_enable(&adapter->q_vector[q_idx]->napi);
3571 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
3575 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
3576 napi_disable(&adapter->q_vector[q_idx]->napi);
3579 #ifdef CONFIG_IXGBE_DCB
3581 * ixgbe_configure_dcb - Configure DCB hardware
3582 * @adapter: ixgbe adapter struct
3584 * This is called by the driver on open to configure the DCB hardware.
3585 * This is also called by the gennetlink interface when reconfiguring
3588 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
3590 struct ixgbe_hw *hw = &adapter->hw;
3591 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3593 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
3594 if (hw->mac.type == ixgbe_mac_82598EB)
3595 netif_set_gso_max_size(adapter->netdev, 65536);
3599 if (hw->mac.type == ixgbe_mac_82598EB)
3600 netif_set_gso_max_size(adapter->netdev, 32768);
3602 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
3605 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
3606 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
3609 /* reconfigure the hardware */
3610 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
3611 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3613 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3615 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
3616 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
3617 ixgbe_dcb_hw_ets(&adapter->hw,
3618 adapter->ixgbe_ieee_ets,
3620 ixgbe_dcb_hw_pfc_config(&adapter->hw,
3621 adapter->ixgbe_ieee_pfc->pfc_en,
3622 adapter->ixgbe_ieee_ets->prio_tc);
3625 /* Enable RSS Hash per TC */
3626 if (hw->mac.type != ixgbe_mac_82598EB) {
3628 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
3635 /* write msb to all 8 TCs in one write */
3636 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
3641 /* Additional bittime to account for IXGBE framing */
3642 #define IXGBE_ETH_FRAMING 20
3645 * ixgbe_hpbthresh - calculate high water mark for flow control
3647 * @adapter: board private structure to calculate for
3648 * @pb: packet buffer to calculate
3650 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
3652 struct ixgbe_hw *hw = &adapter->hw;
3653 struct net_device *dev = adapter->netdev;
3654 int link, tc, kb, marker;
3657 /* Calculate max LAN frame size */
3658 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
3661 /* FCoE traffic class uses FCOE jumbo frames */
3662 if ((dev->features & NETIF_F_FCOE_MTU) &&
3663 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
3664 (pb == ixgbe_fcoe_get_tc(adapter)))
3665 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3668 /* Calculate delay value for device */
3669 switch (hw->mac.type) {
3670 case ixgbe_mac_X540:
3671 dv_id = IXGBE_DV_X540(link, tc);
3674 dv_id = IXGBE_DV(link, tc);
3678 /* Loopback switch introduces additional latency */
3679 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3680 dv_id += IXGBE_B2BT(tc);
3682 /* Delay value is calculated in bit times convert to KB */
3683 kb = IXGBE_BT2KB(dv_id);
3684 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
3686 marker = rx_pba - kb;
3688 /* It is possible that the packet buffer is not large enough
3689 * to provide required headroom. In this case throw an error
3690 * to user and a do the best we can.
3693 e_warn(drv, "Packet Buffer(%i) can not provide enough"
3694 "headroom to support flow control."
3695 "Decrease MTU or number of traffic classes\n", pb);
3703 * ixgbe_lpbthresh - calculate low water mark for for flow control
3705 * @adapter: board private structure to calculate for
3706 * @pb: packet buffer to calculate
3708 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter)
3710 struct ixgbe_hw *hw = &adapter->hw;
3711 struct net_device *dev = adapter->netdev;
3715 /* Calculate max LAN frame size */
3716 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
3718 /* Calculate delay value for device */
3719 switch (hw->mac.type) {
3720 case ixgbe_mac_X540:
3721 dv_id = IXGBE_LOW_DV_X540(tc);
3724 dv_id = IXGBE_LOW_DV(tc);
3728 /* Delay value is calculated in bit times convert to KB */
3729 return IXGBE_BT2KB(dv_id);
3733 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3735 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
3737 struct ixgbe_hw *hw = &adapter->hw;
3738 int num_tc = netdev_get_num_tc(adapter->netdev);
3744 hw->fc.low_water = ixgbe_lpbthresh(adapter);
3746 for (i = 0; i < num_tc; i++) {
3747 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
3749 /* Low water marks must not be larger than high water marks */
3750 if (hw->fc.low_water > hw->fc.high_water[i])
3751 hw->fc.low_water = 0;
3755 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
3757 struct ixgbe_hw *hw = &adapter->hw;
3759 u8 tc = netdev_get_num_tc(adapter->netdev);
3761 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3762 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
3763 hdrm = 32 << adapter->fdir_pballoc;
3767 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
3768 ixgbe_pbthresh_setup(adapter);
3771 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
3773 struct ixgbe_hw *hw = &adapter->hw;
3774 struct hlist_node *node, *node2;
3775 struct ixgbe_fdir_filter *filter;
3777 spin_lock(&adapter->fdir_perfect_lock);
3779 if (!hlist_empty(&adapter->fdir_filter_list))
3780 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
3782 hlist_for_each_entry_safe(filter, node, node2,
3783 &adapter->fdir_filter_list, fdir_node) {
3784 ixgbe_fdir_write_perfect_filter_82599(hw,
3787 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
3788 IXGBE_FDIR_DROP_QUEUE :
3789 adapter->rx_ring[filter->action]->reg_idx);
3792 spin_unlock(&adapter->fdir_perfect_lock);
3795 static void ixgbe_configure(struct ixgbe_adapter *adapter)
3797 struct ixgbe_hw *hw = &adapter->hw;
3799 ixgbe_configure_pb(adapter);
3800 #ifdef CONFIG_IXGBE_DCB
3801 ixgbe_configure_dcb(adapter);
3804 ixgbe_set_rx_mode(adapter->netdev);
3805 ixgbe_restore_vlan(adapter);
3808 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
3809 ixgbe_configure_fcoe(adapter);
3811 #endif /* IXGBE_FCOE */
3813 switch (hw->mac.type) {
3814 case ixgbe_mac_82599EB:
3815 case ixgbe_mac_X540:
3816 hw->mac.ops.disable_rx_buff(hw);
3822 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3823 ixgbe_init_fdir_signature_82599(&adapter->hw,
3824 adapter->fdir_pballoc);
3825 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
3826 ixgbe_init_fdir_perfect_82599(&adapter->hw,
3827 adapter->fdir_pballoc);
3828 ixgbe_fdir_filter_restore(adapter);
3831 switch (hw->mac.type) {
3832 case ixgbe_mac_82599EB:
3833 case ixgbe_mac_X540:
3834 hw->mac.ops.enable_rx_buff(hw);
3840 ixgbe_configure_virtualization(adapter);
3842 ixgbe_configure_tx(adapter);
3843 ixgbe_configure_rx(adapter);
3846 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
3848 switch (hw->phy.type) {
3849 case ixgbe_phy_sfp_avago:
3850 case ixgbe_phy_sfp_ftl:
3851 case ixgbe_phy_sfp_intel:
3852 case ixgbe_phy_sfp_unknown:
3853 case ixgbe_phy_sfp_passive_tyco:
3854 case ixgbe_phy_sfp_passive_unknown:
3855 case ixgbe_phy_sfp_active_unknown:
3856 case ixgbe_phy_sfp_ftl_active:
3859 if (hw->mac.type == ixgbe_mac_82598EB)
3867 * ixgbe_sfp_link_config - set up SFP+ link
3868 * @adapter: pointer to private adapter struct
3870 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
3873 * We are assuming the worst case scenario here, and that
3874 * is that an SFP was inserted/removed after the reset
3875 * but before SFP detection was enabled. As such the best
3876 * solution is to just start searching as soon as we start
3878 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3879 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
3881 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
3885 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3886 * @hw: pointer to private hardware struct
3888 * Returns 0 on success, negative on failure
3890 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
3893 bool negotiation, link_up = false;
3894 u32 ret = IXGBE_ERR_LINK_SETUP;
3896 if (hw->mac.ops.check_link)
3897 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
3902 autoneg = hw->phy.autoneg_advertised;
3903 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
3904 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
3909 if (hw->mac.ops.setup_link)
3910 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
3915 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
3917 struct ixgbe_hw *hw = &adapter->hw;
3920 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3921 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
3923 gpie |= IXGBE_GPIE_EIAME;
3925 * use EIAM to auto-mask when MSI-X interrupt is asserted
3926 * this saves a register write for every interrupt
3928 switch (hw->mac.type) {
3929 case ixgbe_mac_82598EB:
3930 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3932 case ixgbe_mac_82599EB:
3933 case ixgbe_mac_X540:
3935 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3936 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3940 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3941 * specifically only auto mask tx and rx interrupts */
3942 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3945 /* XXX: to interrupt immediately for EICS writes, enable this */
3946 /* gpie |= IXGBE_GPIE_EIMEN; */
3948 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3949 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
3950 gpie |= IXGBE_GPIE_VTMODE_64;
3953 /* Enable Thermal over heat sensor interrupt */
3954 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
3955 switch (adapter->hw.mac.type) {
3956 case ixgbe_mac_82599EB:
3957 gpie |= IXGBE_SDP0_GPIEN;
3959 case ixgbe_mac_X540:
3960 gpie |= IXGBE_EIMS_TS;
3967 /* Enable fan failure interrupt */
3968 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3969 gpie |= IXGBE_SDP1_GPIEN;
3971 if (hw->mac.type == ixgbe_mac_82599EB) {
3972 gpie |= IXGBE_SDP1_GPIEN;
3973 gpie |= IXGBE_SDP2_GPIEN;
3976 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3979 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
3981 struct ixgbe_hw *hw = &adapter->hw;
3985 ixgbe_get_hw_control(adapter);
3986 ixgbe_setup_gpie(adapter);
3988 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3989 ixgbe_configure_msix(adapter);
3991 ixgbe_configure_msi_and_legacy(adapter);
3993 /* enable the optics for both mult-speed fiber and 82599 SFP+ fiber */
3994 if (hw->mac.ops.enable_tx_laser &&
3995 ((hw->phy.multispeed_fiber) ||
3996 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
3997 (hw->mac.type == ixgbe_mac_82599EB))))
3998 hw->mac.ops.enable_tx_laser(hw);
4000 clear_bit(__IXGBE_DOWN, &adapter->state);
4001 ixgbe_napi_enable_all(adapter);
4003 if (ixgbe_is_sfp(hw)) {
4004 ixgbe_sfp_link_config(adapter);
4006 err = ixgbe_non_sfp_link_config(hw);
4008 e_err(probe, "link_config FAILED %d\n", err);
4011 /* clear any pending interrupts, may auto mask */
4012 IXGBE_READ_REG(hw, IXGBE_EICR);
4013 ixgbe_irq_enable(adapter, true, true);
4016 * If this adapter has a fan, check to see if we had a failure
4017 * before we enabled the interrupt.
4019 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4020 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4021 if (esdp & IXGBE_ESDP_SDP1)
4022 e_crit(drv, "Fan has stopped, replace the adapter\n");
4025 /* enable transmits */
4026 netif_tx_start_all_queues(adapter->netdev);
4028 /* bring the link up in the watchdog, this could race with our first
4029 * link up interrupt but shouldn't be a problem */
4030 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4031 adapter->link_check_timeout = jiffies;
4032 mod_timer(&adapter->service_timer, jiffies);
4034 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4035 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4036 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4037 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4040 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4042 WARN_ON(in_interrupt());
4043 /* put off any impending NetWatchDogTimeout */
4044 adapter->netdev->trans_start = jiffies;
4046 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4047 usleep_range(1000, 2000);
4048 ixgbe_down(adapter);
4050 * If SR-IOV enabled then wait a bit before bringing the adapter
4051 * back up to give the VFs time to respond to the reset. The
4052 * two second wait is based upon the watchdog timer cycle in
4055 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4058 clear_bit(__IXGBE_RESETTING, &adapter->state);
4061 void ixgbe_up(struct ixgbe_adapter *adapter)
4063 /* hardware has been reset, we need to reload some things */
4064 ixgbe_configure(adapter);
4066 ixgbe_up_complete(adapter);
4069 void ixgbe_reset(struct ixgbe_adapter *adapter)
4071 struct ixgbe_hw *hw = &adapter->hw;
4074 /* lock SFP init bit to prevent race conditions with the watchdog */
4075 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4076 usleep_range(1000, 2000);
4078 /* clear all SFP and link config related flags while holding SFP_INIT */
4079 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4080 IXGBE_FLAG2_SFP_NEEDS_RESET);
4081 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4083 err = hw->mac.ops.init_hw(hw);
4086 case IXGBE_ERR_SFP_NOT_PRESENT:
4087 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4089 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4090 e_dev_err("master disable timed out\n");
4092 case IXGBE_ERR_EEPROM_VERSION:
4093 /* We are running on a pre-production device, log a warning */
4094 e_dev_warn("This device is a pre-production adapter/LOM. "
4095 "Please be aware there may be issues associated with "
4096 "your hardware. If you are experiencing problems "
4097 "please contact your Intel or hardware "
4098 "representative who provided you with this "
4102 e_dev_err("Hardware Error: %d\n", err);
4105 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4107 /* reprogram the RAR[0] in case user changed it. */
4108 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
4113 * ixgbe_init_rx_page_offset - initialize page offset values for Rx buffers
4114 * @rx_ring: ring to setup
4116 * On many IA platforms the L1 cache has a critical stride of 4K, this
4117 * results in each receive buffer starting in the same cache set. To help
4118 * reduce the pressure on this cache set we can interleave the offsets so
4119 * that only every other buffer will be in the same cache set.
4121 static void ixgbe_init_rx_page_offset(struct ixgbe_ring *rx_ring)
4123 struct ixgbe_rx_buffer *rx_buffer = rx_ring->rx_buffer_info;
4126 for (i = 0; i < rx_ring->count; i += 2) {
4127 rx_buffer[0].page_offset = 0;
4128 rx_buffer[1].page_offset = ixgbe_rx_bufsz(rx_ring);
4129 rx_buffer = &rx_buffer[2];
4134 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4135 * @rx_ring: ring to free buffers from
4137 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4139 struct device *dev = rx_ring->dev;
4143 /* ring already cleared, nothing to do */
4144 if (!rx_ring->rx_buffer_info)
4147 /* Free all the Rx ring sk_buffs */
4148 for (i = 0; i < rx_ring->count; i++) {
4149 struct ixgbe_rx_buffer *rx_buffer;
4151 rx_buffer = &rx_ring->rx_buffer_info[i];
4152 if (rx_buffer->skb) {
4153 struct sk_buff *skb = rx_buffer->skb;
4154 if (IXGBE_CB(skb)->page_released) {
4157 ixgbe_rx_bufsz(rx_ring),
4159 IXGBE_CB(skb)->page_released = false;
4163 rx_buffer->skb = NULL;
4165 dma_unmap_page(dev, rx_buffer->dma,
4166 ixgbe_rx_pg_size(rx_ring),
4169 if (rx_buffer->page)
4170 __free_pages(rx_buffer->page,
4171 ixgbe_rx_pg_order(rx_ring));
4172 rx_buffer->page = NULL;
4175 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4176 memset(rx_ring->rx_buffer_info, 0, size);
4178 ixgbe_init_rx_page_offset(rx_ring);
4180 /* Zero out the descriptor ring */
4181 memset(rx_ring->desc, 0, rx_ring->size);
4183 rx_ring->next_to_alloc = 0;
4184 rx_ring->next_to_clean = 0;
4185 rx_ring->next_to_use = 0;
4189 * ixgbe_clean_tx_ring - Free Tx Buffers
4190 * @tx_ring: ring to be cleaned
4192 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4194 struct ixgbe_tx_buffer *tx_buffer_info;
4198 /* ring already cleared, nothing to do */
4199 if (!tx_ring->tx_buffer_info)
4202 /* Free all the Tx ring sk_buffs */
4203 for (i = 0; i < tx_ring->count; i++) {
4204 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4205 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4208 netdev_tx_reset_queue(txring_txq(tx_ring));
4210 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4211 memset(tx_ring->tx_buffer_info, 0, size);
4213 /* Zero out the descriptor ring */
4214 memset(tx_ring->desc, 0, tx_ring->size);
4216 tx_ring->next_to_use = 0;
4217 tx_ring->next_to_clean = 0;
4221 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4222 * @adapter: board private structure
4224 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4228 for (i = 0; i < adapter->num_rx_queues; i++)
4229 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4233 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4234 * @adapter: board private structure
4236 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4240 for (i = 0; i < adapter->num_tx_queues; i++)
4241 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4244 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4246 struct hlist_node *node, *node2;
4247 struct ixgbe_fdir_filter *filter;
4249 spin_lock(&adapter->fdir_perfect_lock);
4251 hlist_for_each_entry_safe(filter, node, node2,
4252 &adapter->fdir_filter_list, fdir_node) {
4253 hlist_del(&filter->fdir_node);
4256 adapter->fdir_filter_count = 0;
4258 spin_unlock(&adapter->fdir_perfect_lock);
4261 void ixgbe_down(struct ixgbe_adapter *adapter)
4263 struct net_device *netdev = adapter->netdev;
4264 struct ixgbe_hw *hw = &adapter->hw;
4268 /* signal that we are down to the interrupt handler */
4269 set_bit(__IXGBE_DOWN, &adapter->state);
4271 /* disable receives */
4272 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4273 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4275 /* disable all enabled rx queues */
4276 for (i = 0; i < adapter->num_rx_queues; i++)
4277 /* this call also flushes the previous write */
4278 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
4280 usleep_range(10000, 20000);
4282 netif_tx_stop_all_queues(netdev);
4284 /* call carrier off first to avoid false dev_watchdog timeouts */
4285 netif_carrier_off(netdev);
4286 netif_tx_disable(netdev);
4288 ixgbe_irq_disable(adapter);
4290 ixgbe_napi_disable_all(adapter);
4292 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
4293 IXGBE_FLAG2_RESET_REQUESTED);
4294 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4296 del_timer_sync(&adapter->service_timer);
4298 if (adapter->num_vfs) {
4299 /* Clear EITR Select mapping */
4300 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
4302 /* Mark all the VFs as inactive */
4303 for (i = 0 ; i < adapter->num_vfs; i++)
4304 adapter->vfinfo[i].clear_to_send = false;
4306 /* ping all the active vfs to let them know we are going down */
4307 ixgbe_ping_all_vfs(adapter);
4309 /* Disable all VFTE/VFRE TX/RX */
4310 ixgbe_disable_tx_rx(adapter);
4313 /* disable transmits in the hardware now that interrupts are off */
4314 for (i = 0; i < adapter->num_tx_queues; i++) {
4315 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
4316 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4319 /* Disable the Tx DMA engine on 82599 and X540 */
4320 switch (hw->mac.type) {
4321 case ixgbe_mac_82599EB:
4322 case ixgbe_mac_X540:
4323 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4324 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4325 ~IXGBE_DMATXCTL_TE));
4331 if (!pci_channel_offline(adapter->pdev))
4332 ixgbe_reset(adapter);
4334 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
4335 if (hw->mac.ops.disable_tx_laser &&
4336 ((hw->phy.multispeed_fiber) ||
4337 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
4338 (hw->mac.type == ixgbe_mac_82599EB))))
4339 hw->mac.ops.disable_tx_laser(hw);
4341 ixgbe_clean_all_tx_rings(adapter);
4342 ixgbe_clean_all_rx_rings(adapter);
4344 #ifdef CONFIG_IXGBE_DCA
4345 /* since we reset the hardware DCA settings were cleared */
4346 ixgbe_setup_dca(adapter);
4351 * ixgbe_tx_timeout - Respond to a Tx Hang
4352 * @netdev: network interface device structure
4354 static void ixgbe_tx_timeout(struct net_device *netdev)
4356 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4358 /* Do the reset outside of interrupt context */
4359 ixgbe_tx_timeout_reset(adapter);
4363 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4364 * @adapter: board private structure to initialize
4366 * ixgbe_sw_init initializes the Adapter private data structure.
4367 * Fields are initialized based on PCI device information and
4368 * OS network device settings (MTU size).
4370 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
4372 struct ixgbe_hw *hw = &adapter->hw;
4373 struct pci_dev *pdev = adapter->pdev;
4375 #ifdef CONFIG_IXGBE_DCB
4377 struct tc_configuration *tc;
4380 /* PCI config space info */
4382 hw->vendor_id = pdev->vendor;
4383 hw->device_id = pdev->device;
4384 hw->revision_id = pdev->revision;
4385 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4386 hw->subsystem_device_id = pdev->subsystem_device;
4388 /* Set capability flags */
4389 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
4390 adapter->ring_feature[RING_F_RSS].limit = rss;
4391 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
4392 switch (hw->mac.type) {
4393 case ixgbe_mac_82598EB:
4394 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4395 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
4396 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
4398 case ixgbe_mac_X540:
4399 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4400 case ixgbe_mac_82599EB:
4401 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
4402 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
4403 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
4404 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
4405 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4406 /* Flow Director hash filters enabled */
4407 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
4408 adapter->atr_sample_rate = 20;
4409 adapter->ring_feature[RING_F_FDIR].limit =
4410 IXGBE_MAX_FDIR_INDICES;
4411 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
4413 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
4414 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
4415 #ifdef CONFIG_IXGBE_DCB
4416 /* Default traffic class to use for FCoE */
4417 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
4419 #endif /* IXGBE_FCOE */
4425 /* n-tuple support exists, always init our spinlock */
4426 spin_lock_init(&adapter->fdir_perfect_lock);
4428 #ifdef CONFIG_IXGBE_DCB
4429 switch (hw->mac.type) {
4430 case ixgbe_mac_X540:
4431 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
4432 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
4435 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
4436 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
4440 /* Configure DCB traffic classes */
4441 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
4442 tc = &adapter->dcb_cfg.tc_config[j];
4443 tc->path[DCB_TX_CONFIG].bwg_id = 0;
4444 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
4445 tc->path[DCB_RX_CONFIG].bwg_id = 0;
4446 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
4447 tc->dcb_pfc = pfc_disabled;
4450 /* Initialize default user to priority mapping, UPx->TC0 */
4451 tc = &adapter->dcb_cfg.tc_config[0];
4452 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
4453 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
4455 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
4456 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
4457 adapter->dcb_cfg.pfc_mode_enable = false;
4458 adapter->dcb_set_bitmap = 0x00;
4459 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
4460 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
4461 sizeof(adapter->temp_dcb_cfg));
4465 /* default flow control settings */
4466 hw->fc.requested_mode = ixgbe_fc_full;
4467 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
4468 ixgbe_pbthresh_setup(adapter);
4469 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4470 hw->fc.send_xon = true;
4471 hw->fc.disable_fc_autoneg = false;
4473 /* enable itr by default in dynamic mode */
4474 adapter->rx_itr_setting = 1;
4475 adapter->tx_itr_setting = 1;
4477 /* set default ring sizes */
4478 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
4479 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
4481 /* set default work limits */
4482 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
4484 /* initialize eeprom parameters */
4485 if (ixgbe_init_eeprom_params_generic(hw)) {
4486 e_dev_err("EEPROM initialization failed\n");
4490 set_bit(__IXGBE_DOWN, &adapter->state);
4496 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4497 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4499 * Return 0 on success, negative on failure
4501 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
4503 struct device *dev = tx_ring->dev;
4504 int orig_node = dev_to_node(dev);
4508 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4510 if (tx_ring->q_vector)
4511 numa_node = tx_ring->q_vector->numa_node;
4513 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
4514 if (!tx_ring->tx_buffer_info)
4515 tx_ring->tx_buffer_info = vzalloc(size);
4516 if (!tx_ring->tx_buffer_info)
4519 /* round up to nearest 4K */
4520 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
4521 tx_ring->size = ALIGN(tx_ring->size, 4096);
4523 set_dev_node(dev, numa_node);
4524 tx_ring->desc = dma_alloc_coherent(dev,
4528 set_dev_node(dev, orig_node);
4530 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4531 &tx_ring->dma, GFP_KERNEL);
4535 tx_ring->next_to_use = 0;
4536 tx_ring->next_to_clean = 0;
4540 vfree(tx_ring->tx_buffer_info);
4541 tx_ring->tx_buffer_info = NULL;
4542 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4547 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4548 * @adapter: board private structure
4550 * If this function returns with an error, then it's possible one or
4551 * more of the rings is populated (while the rest are not). It is the
4552 * callers duty to clean those orphaned rings.
4554 * Return 0 on success, negative on failure
4556 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
4560 for (i = 0; i < adapter->num_tx_queues; i++) {
4561 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
4565 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
4571 /* rewind the index freeing the rings as we go */
4573 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4578 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4579 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4581 * Returns 0 on success, negative on failure
4583 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
4585 struct device *dev = rx_ring->dev;
4586 int orig_node = dev_to_node(dev);
4590 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4592 if (rx_ring->q_vector)
4593 numa_node = rx_ring->q_vector->numa_node;
4595 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
4596 if (!rx_ring->rx_buffer_info)
4597 rx_ring->rx_buffer_info = vzalloc(size);
4598 if (!rx_ring->rx_buffer_info)
4601 /* Round up to nearest 4K */
4602 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
4603 rx_ring->size = ALIGN(rx_ring->size, 4096);
4605 set_dev_node(dev, numa_node);
4606 rx_ring->desc = dma_alloc_coherent(dev,
4610 set_dev_node(dev, orig_node);
4612 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4613 &rx_ring->dma, GFP_KERNEL);
4617 rx_ring->next_to_clean = 0;
4618 rx_ring->next_to_use = 0;
4620 ixgbe_init_rx_page_offset(rx_ring);
4624 vfree(rx_ring->rx_buffer_info);
4625 rx_ring->rx_buffer_info = NULL;
4626 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4631 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4632 * @adapter: board private structure
4634 * If this function returns with an error, then it's possible one or
4635 * more of the rings is populated (while the rest are not). It is the
4636 * callers duty to clean those orphaned rings.
4638 * Return 0 on success, negative on failure
4640 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
4644 for (i = 0; i < adapter->num_rx_queues; i++) {
4645 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
4649 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
4655 /* rewind the index freeing the rings as we go */
4657 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4662 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4663 * @tx_ring: Tx descriptor ring for a specific queue
4665 * Free all transmit software resources
4667 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
4669 ixgbe_clean_tx_ring(tx_ring);
4671 vfree(tx_ring->tx_buffer_info);
4672 tx_ring->tx_buffer_info = NULL;
4674 /* if not set, then don't free */
4678 dma_free_coherent(tx_ring->dev, tx_ring->size,
4679 tx_ring->desc, tx_ring->dma);
4681 tx_ring->desc = NULL;
4685 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4686 * @adapter: board private structure
4688 * Free all transmit software resources
4690 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
4694 for (i = 0; i < adapter->num_tx_queues; i++)
4695 if (adapter->tx_ring[i]->desc)
4696 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4700 * ixgbe_free_rx_resources - Free Rx Resources
4701 * @rx_ring: ring to clean the resources from
4703 * Free all receive software resources
4705 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
4707 ixgbe_clean_rx_ring(rx_ring);
4709 vfree(rx_ring->rx_buffer_info);
4710 rx_ring->rx_buffer_info = NULL;
4712 /* if not set, then don't free */
4716 dma_free_coherent(rx_ring->dev, rx_ring->size,
4717 rx_ring->desc, rx_ring->dma);
4719 rx_ring->desc = NULL;
4723 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4724 * @adapter: board private structure
4726 * Free all receive software resources
4728 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
4732 for (i = 0; i < adapter->num_rx_queues; i++)
4733 if (adapter->rx_ring[i]->desc)
4734 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4738 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4739 * @netdev: network interface device structure
4740 * @new_mtu: new value for maximum frame size
4742 * Returns 0 on success, negative on failure
4744 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
4746 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4747 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4749 /* MTU < 68 is an error and causes problems on some kernels */
4750 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
4754 * For 82599EB we cannot allow PF to change MTU greater than 1500
4755 * in SR-IOV mode as it may cause buffer overruns in guest VFs that
4756 * don't allocate and chain buffers correctly.
4758 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
4759 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
4760 (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
4763 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4765 /* must set new MTU before calling down or up */
4766 netdev->mtu = new_mtu;
4768 if (netif_running(netdev))
4769 ixgbe_reinit_locked(adapter);
4775 * ixgbe_open - Called when a network interface is made active
4776 * @netdev: network interface device structure
4778 * Returns 0 on success, negative value on failure
4780 * The open entry point is called when a network interface is made
4781 * active by the system (IFF_UP). At this point all resources needed
4782 * for transmit and receive operations are allocated, the interrupt
4783 * handler is registered with the OS, the watchdog timer is started,
4784 * and the stack is notified that the interface is ready.
4786 static int ixgbe_open(struct net_device *netdev)
4788 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4791 /* disallow open during test */
4792 if (test_bit(__IXGBE_TESTING, &adapter->state))
4795 netif_carrier_off(netdev);
4797 /* allocate transmit descriptors */
4798 err = ixgbe_setup_all_tx_resources(adapter);
4802 /* allocate receive descriptors */
4803 err = ixgbe_setup_all_rx_resources(adapter);
4807 ixgbe_configure(adapter);
4809 err = ixgbe_request_irq(adapter);
4813 /* Notify the stack of the actual queue counts. */
4814 err = netif_set_real_num_tx_queues(netdev,
4815 adapter->num_rx_pools > 1 ? 1 :
4816 adapter->num_tx_queues);
4818 goto err_set_queues;
4821 err = netif_set_real_num_rx_queues(netdev,
4822 adapter->num_rx_pools > 1 ? 1 :
4823 adapter->num_rx_queues);
4825 goto err_set_queues;
4827 ixgbe_up_complete(adapter);
4832 ixgbe_free_irq(adapter);
4834 ixgbe_free_all_rx_resources(adapter);
4836 ixgbe_free_all_tx_resources(adapter);
4838 ixgbe_reset(adapter);
4844 * ixgbe_close - Disables a network interface
4845 * @netdev: network interface device structure
4847 * Returns 0, this is not allowed to fail
4849 * The close entry point is called when an interface is de-activated
4850 * by the OS. The hardware is still under the drivers control, but
4851 * needs to be disabled. A global MAC reset is issued to stop the
4852 * hardware, and all transmit and receive resources are freed.
4854 static int ixgbe_close(struct net_device *netdev)
4856 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4858 ixgbe_down(adapter);
4859 ixgbe_free_irq(adapter);
4861 ixgbe_fdir_filter_exit(adapter);
4863 ixgbe_free_all_tx_resources(adapter);
4864 ixgbe_free_all_rx_resources(adapter);
4866 ixgbe_release_hw_control(adapter);
4872 static int ixgbe_resume(struct pci_dev *pdev)
4874 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4875 struct net_device *netdev = adapter->netdev;
4878 pci_set_power_state(pdev, PCI_D0);
4879 pci_restore_state(pdev);
4881 * pci_restore_state clears dev->state_saved so call
4882 * pci_save_state to restore it.
4884 pci_save_state(pdev);
4886 err = pci_enable_device_mem(pdev);
4888 e_dev_err("Cannot enable PCI device from suspend\n");
4891 pci_set_master(pdev);
4893 pci_wake_from_d3(pdev, false);
4895 ixgbe_reset(adapter);
4897 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
4900 err = ixgbe_init_interrupt_scheme(adapter);
4901 if (!err && netif_running(netdev))
4902 err = ixgbe_open(netdev);
4909 netif_device_attach(netdev);
4913 #endif /* CONFIG_PM */
4915 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
4917 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4918 struct net_device *netdev = adapter->netdev;
4919 struct ixgbe_hw *hw = &adapter->hw;
4921 u32 wufc = adapter->wol;
4926 netif_device_detach(netdev);
4928 if (netif_running(netdev)) {
4930 ixgbe_down(adapter);
4931 ixgbe_free_irq(adapter);
4932 ixgbe_free_all_tx_resources(adapter);
4933 ixgbe_free_all_rx_resources(adapter);
4937 ixgbe_clear_interrupt_scheme(adapter);
4940 retval = pci_save_state(pdev);
4946 ixgbe_set_rx_mode(netdev);
4949 * enable the optics for both mult-speed fiber and
4950 * 82599 SFP+ fiber as we can WoL.
4952 if (hw->mac.ops.enable_tx_laser &&
4953 (hw->phy.multispeed_fiber ||
4954 (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber &&
4955 hw->mac.type == ixgbe_mac_82599EB)))
4956 hw->mac.ops.enable_tx_laser(hw);
4958 /* turn on all-multi mode if wake on multicast is enabled */
4959 if (wufc & IXGBE_WUFC_MC) {
4960 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4961 fctrl |= IXGBE_FCTRL_MPE;
4962 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4965 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
4966 ctrl |= IXGBE_CTRL_GIO_DIS;
4967 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
4969 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
4971 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
4972 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
4975 switch (hw->mac.type) {
4976 case ixgbe_mac_82598EB:
4977 pci_wake_from_d3(pdev, false);
4979 case ixgbe_mac_82599EB:
4980 case ixgbe_mac_X540:
4981 pci_wake_from_d3(pdev, !!wufc);
4987 *enable_wake = !!wufc;
4989 ixgbe_release_hw_control(adapter);
4991 pci_disable_device(pdev);
4997 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5002 retval = __ixgbe_shutdown(pdev, &wake);
5007 pci_prepare_to_sleep(pdev);
5009 pci_wake_from_d3(pdev, false);
5010 pci_set_power_state(pdev, PCI_D3hot);
5015 #endif /* CONFIG_PM */
5017 static void ixgbe_shutdown(struct pci_dev *pdev)
5021 __ixgbe_shutdown(pdev, &wake);
5023 if (system_state == SYSTEM_POWER_OFF) {
5024 pci_wake_from_d3(pdev, wake);
5025 pci_set_power_state(pdev, PCI_D3hot);
5030 * ixgbe_update_stats - Update the board statistics counters.
5031 * @adapter: board private structure
5033 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5035 struct net_device *netdev = adapter->netdev;
5036 struct ixgbe_hw *hw = &adapter->hw;
5037 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5039 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5040 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5041 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5042 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5044 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5046 u64 fcoe_noddp_counts_sum = 0, fcoe_noddp_ext_buff_counts_sum = 0;
5047 #endif /* IXGBE_FCOE */
5049 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5050 test_bit(__IXGBE_RESETTING, &adapter->state))
5053 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5056 for (i = 0; i < adapter->num_rx_queues; i++) {
5057 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5058 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5060 adapter->rsc_total_count = rsc_count;
5061 adapter->rsc_total_flush = rsc_flush;
5064 for (i = 0; i < adapter->num_rx_queues; i++) {
5065 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5066 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5067 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5068 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5069 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5070 bytes += rx_ring->stats.bytes;
5071 packets += rx_ring->stats.packets;
5073 adapter->non_eop_descs = non_eop_descs;
5074 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5075 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5076 adapter->hw_csum_rx_error = hw_csum_rx_error;
5077 netdev->stats.rx_bytes = bytes;
5078 netdev->stats.rx_packets = packets;
5082 /* gather some stats to the adapter struct that are per queue */
5083 for (i = 0; i < adapter->num_tx_queues; i++) {
5084 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5085 restart_queue += tx_ring->tx_stats.restart_queue;
5086 tx_busy += tx_ring->tx_stats.tx_busy;
5087 bytes += tx_ring->stats.bytes;
5088 packets += tx_ring->stats.packets;
5090 adapter->restart_queue = restart_queue;
5091 adapter->tx_busy = tx_busy;
5092 netdev->stats.tx_bytes = bytes;
5093 netdev->stats.tx_packets = packets;
5095 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5097 /* 8 register reads */
5098 for (i = 0; i < 8; i++) {
5099 /* for packet buffers not used, the register should read 0 */
5100 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5102 hwstats->mpc[i] += mpc;
5103 total_mpc += hwstats->mpc[i];
5104 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5105 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5106 switch (hw->mac.type) {
5107 case ixgbe_mac_82598EB:
5108 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5109 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5110 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5111 hwstats->pxonrxc[i] +=
5112 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5114 case ixgbe_mac_82599EB:
5115 case ixgbe_mac_X540:
5116 hwstats->pxonrxc[i] +=
5117 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5124 /*16 register reads */
5125 for (i = 0; i < 16; i++) {
5126 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5127 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5128 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5129 (hw->mac.type == ixgbe_mac_X540)) {
5130 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5131 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5132 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5133 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5137 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5138 /* work around hardware counting issue */
5139 hwstats->gprc -= missed_rx;
5141 ixgbe_update_xoff_received(adapter);
5143 /* 82598 hardware only has a 32 bit counter in the high register */
5144 switch (hw->mac.type) {
5145 case ixgbe_mac_82598EB:
5146 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5147 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5148 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5149 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5151 case ixgbe_mac_X540:
5152 /* OS2BMC stats are X540 only*/
5153 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5154 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5155 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5156 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5157 case ixgbe_mac_82599EB:
5158 for (i = 0; i < 16; i++)
5159 adapter->hw_rx_no_dma_resources +=
5160 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5161 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5162 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5163 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5164 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5165 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5166 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5167 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5168 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5169 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5171 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5172 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5173 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5174 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5175 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5176 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5177 /* Add up per cpu counters for total ddp aloc fail */
5178 if (fcoe->pcpu_noddp && fcoe->pcpu_noddp_ext_buff) {
5179 for_each_possible_cpu(cpu) {
5180 fcoe_noddp_counts_sum +=
5181 *per_cpu_ptr(fcoe->pcpu_noddp, cpu);
5182 fcoe_noddp_ext_buff_counts_sum +=
5184 pcpu_noddp_ext_buff, cpu);
5187 hwstats->fcoe_noddp = fcoe_noddp_counts_sum;
5188 hwstats->fcoe_noddp_ext_buff = fcoe_noddp_ext_buff_counts_sum;
5189 #endif /* IXGBE_FCOE */
5194 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5195 hwstats->bprc += bprc;
5196 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5197 if (hw->mac.type == ixgbe_mac_82598EB)
5198 hwstats->mprc -= bprc;
5199 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5200 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5201 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5202 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5203 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5204 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5205 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5206 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5207 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5208 hwstats->lxontxc += lxon;
5209 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5210 hwstats->lxofftxc += lxoff;
5211 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5212 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5214 * 82598 errata - tx of flow control packets is included in tx counters
5216 xon_off_tot = lxon + lxoff;
5217 hwstats->gptc -= xon_off_tot;
5218 hwstats->mptc -= xon_off_tot;
5219 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5220 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5221 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5222 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5223 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5224 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5225 hwstats->ptc64 -= xon_off_tot;
5226 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5227 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5228 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5229 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5230 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5231 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5233 /* Fill out the OS statistics structure */
5234 netdev->stats.multicast = hwstats->mprc;
5237 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
5238 netdev->stats.rx_dropped = 0;
5239 netdev->stats.rx_length_errors = hwstats->rlec;
5240 netdev->stats.rx_crc_errors = hwstats->crcerrs;
5241 netdev->stats.rx_missed_errors = total_mpc;
5245 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5246 * @adapter: pointer to the device adapter structure
5248 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
5250 struct ixgbe_hw *hw = &adapter->hw;
5253 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
5256 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5258 /* if interface is down do nothing */
5259 if (test_bit(__IXGBE_DOWN, &adapter->state))
5262 /* do nothing if we are not using signature filters */
5263 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
5266 adapter->fdir_overflow++;
5268 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5269 for (i = 0; i < adapter->num_tx_queues; i++)
5270 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
5271 &(adapter->tx_ring[i]->state));
5272 /* re-enable flow director interrupts */
5273 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
5275 e_err(probe, "failed to finish FDIR re-initialization, "
5276 "ignored adding FDIR ATR filters\n");
5281 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5282 * @adapter: pointer to the device adapter structure
5284 * This function serves two purposes. First it strobes the interrupt lines
5285 * in order to make certain interrupts are occurring. Secondly it sets the
5286 * bits needed to check for TX hangs. As a result we should immediately
5287 * determine if a hang has occurred.
5289 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
5291 struct ixgbe_hw *hw = &adapter->hw;
5295 /* If we're down or resetting, just bail */
5296 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5297 test_bit(__IXGBE_RESETTING, &adapter->state))
5300 /* Force detection of hung controller */
5301 if (netif_carrier_ok(adapter->netdev)) {
5302 for (i = 0; i < adapter->num_tx_queues; i++)
5303 set_check_for_tx_hang(adapter->tx_ring[i]);
5306 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5308 * for legacy and MSI interrupts don't set any bits
5309 * that are enabled for EIAM, because this operation
5310 * would set *both* EIMS and EICS for any bit in EIAM
5312 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5313 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5315 /* get one bit for every active tx/rx interrupt vector */
5316 for (i = 0; i < adapter->num_q_vectors; i++) {
5317 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5318 if (qv->rx.ring || qv->tx.ring)
5319 eics |= ((u64)1 << i);
5323 /* Cause software interrupt to ensure rings are cleaned */
5324 ixgbe_irq_rearm_queues(adapter, eics);
5329 * ixgbe_watchdog_update_link - update the link status
5330 * @adapter: pointer to the device adapter structure
5331 * @link_speed: pointer to a u32 to store the link_speed
5333 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
5335 struct ixgbe_hw *hw = &adapter->hw;
5336 u32 link_speed = adapter->link_speed;
5337 bool link_up = adapter->link_up;
5338 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
5340 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5343 if (hw->mac.ops.check_link) {
5344 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
5346 /* always assume link is up, if no check link function */
5347 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
5351 if (adapter->ixgbe_ieee_pfc)
5352 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
5354 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
5355 hw->mac.ops.fc_enable(hw);
5356 ixgbe_set_rx_drop_en(adapter);
5360 time_after(jiffies, (adapter->link_check_timeout +
5361 IXGBE_TRY_LINK_TIMEOUT))) {
5362 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5363 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
5364 IXGBE_WRITE_FLUSH(hw);
5367 adapter->link_up = link_up;
5368 adapter->link_speed = link_speed;
5372 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5373 * print link up message
5374 * @adapter: pointer to the device adapter structure
5376 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
5378 struct net_device *netdev = adapter->netdev;
5379 struct ixgbe_hw *hw = &adapter->hw;
5380 u32 link_speed = adapter->link_speed;
5381 bool flow_rx, flow_tx;
5383 /* only continue if link was previously down */
5384 if (netif_carrier_ok(netdev))
5387 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
5389 switch (hw->mac.type) {
5390 case ixgbe_mac_82598EB: {
5391 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5392 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
5393 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
5394 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
5397 case ixgbe_mac_X540:
5398 case ixgbe_mac_82599EB: {
5399 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5400 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
5401 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
5402 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
5411 #ifdef CONFIG_IXGBE_PTP
5412 ixgbe_ptp_start_cyclecounter(adapter);
5415 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
5416 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
5418 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
5420 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
5423 ((flow_rx && flow_tx) ? "RX/TX" :
5425 (flow_tx ? "TX" : "None"))));
5427 netif_carrier_on(netdev);
5428 ixgbe_check_vf_rate_limit(adapter);
5430 /* ping all the active vfs to let them know link has changed */
5431 ixgbe_ping_all_vfs(adapter);
5435 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5436 * print link down message
5437 * @adapter: pointer to the adapter structure
5439 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
5441 struct net_device *netdev = adapter->netdev;
5442 struct ixgbe_hw *hw = &adapter->hw;
5444 adapter->link_up = false;
5445 adapter->link_speed = 0;
5447 /* only continue if link was up previously */
5448 if (!netif_carrier_ok(netdev))
5451 /* poll for SFP+ cable when link is down */
5452 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
5453 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5455 #ifdef CONFIG_IXGBE_PTP
5456 ixgbe_ptp_start_cyclecounter(adapter);
5459 e_info(drv, "NIC Link is Down\n");
5460 netif_carrier_off(netdev);
5462 /* ping all the active vfs to let them know link has changed */
5463 ixgbe_ping_all_vfs(adapter);
5467 * ixgbe_watchdog_flush_tx - flush queues on link down
5468 * @adapter: pointer to the device adapter structure
5470 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
5473 int some_tx_pending = 0;
5475 if (!netif_carrier_ok(adapter->netdev)) {
5476 for (i = 0; i < adapter->num_tx_queues; i++) {
5477 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5478 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
5479 some_tx_pending = 1;
5484 if (some_tx_pending) {
5485 /* We've lost link, so the controller stops DMA,
5486 * but we've got queued Tx work that's never going
5487 * to get done, so reset controller to flush Tx.
5488 * (Do the reset outside of interrupt context).
5490 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
5495 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
5499 /* Do not perform spoof check for 82598 */
5500 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5503 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
5506 * ssvpc register is cleared on read, if zero then no
5507 * spoofed packets in the last interval.
5512 e_warn(drv, "%d Spoofed packets detected\n", ssvpc);
5516 * ixgbe_watchdog_subtask - check and bring link up
5517 * @adapter: pointer to the device adapter structure
5519 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
5521 /* if interface is down do nothing */
5522 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5523 test_bit(__IXGBE_RESETTING, &adapter->state))
5526 ixgbe_watchdog_update_link(adapter);
5528 if (adapter->link_up)
5529 ixgbe_watchdog_link_is_up(adapter);
5531 ixgbe_watchdog_link_is_down(adapter);
5533 ixgbe_spoof_check(adapter);
5534 ixgbe_update_stats(adapter);
5536 ixgbe_watchdog_flush_tx(adapter);
5540 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5541 * @adapter: the ixgbe adapter structure
5543 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
5545 struct ixgbe_hw *hw = &adapter->hw;
5548 /* not searching for SFP so there is nothing to do here */
5549 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
5550 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5553 /* someone else is in init, wait until next service event */
5554 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5557 err = hw->phy.ops.identify_sfp(hw);
5558 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5561 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
5562 /* If no cable is present, then we need to reset
5563 * the next time we find a good cable. */
5564 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5571 /* exit if reset not needed */
5572 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5575 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
5578 * A module may be identified correctly, but the EEPROM may not have
5579 * support for that module. setup_sfp() will fail in that case, so
5580 * we should not allow that module to load.
5582 if (hw->mac.type == ixgbe_mac_82598EB)
5583 err = hw->phy.ops.reset(hw);
5585 err = hw->mac.ops.setup_sfp(hw);
5587 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5590 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
5591 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
5594 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5596 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
5597 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
5598 e_dev_err("failed to initialize because an unsupported "
5599 "SFP+ module type was detected.\n");
5600 e_dev_err("Reload the driver after installing a "
5601 "supported module.\n");
5602 unregister_netdev(adapter->netdev);
5607 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5608 * @adapter: the ixgbe adapter structure
5610 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
5612 struct ixgbe_hw *hw = &adapter->hw;
5616 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
5619 /* someone else is in init, wait until next service event */
5620 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5623 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5625 autoneg = hw->phy.autoneg_advertised;
5626 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
5627 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
5628 if (hw->mac.ops.setup_link)
5629 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
5631 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5632 adapter->link_check_timeout = jiffies;
5633 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5636 #ifdef CONFIG_PCI_IOV
5637 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
5640 struct ixgbe_hw *hw = &adapter->hw;
5641 struct net_device *netdev = adapter->netdev;
5645 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
5646 if (gpc) /* If incrementing then no need for the check below */
5649 * Check to see if a bad DMA write target from an errant or
5650 * malicious VF has caused a PCIe error. If so then we can
5651 * issue a VFLR to the offending VF(s) and then resume without
5652 * requesting a full slot reset.
5655 for (vf = 0; vf < adapter->num_vfs; vf++) {
5656 ciaa = (vf << 16) | 0x80000000;
5657 /* 32 bit read so align, we really want status at offset 6 */
5658 ciaa |= PCI_COMMAND;
5659 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5660 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
5662 /* disable debug mode asap after reading data */
5663 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5664 /* Get the upper 16 bits which will be the PCI status reg */
5666 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
5667 netdev_err(netdev, "VF %d Hung DMA\n", vf);
5669 ciaa = (vf << 16) | 0x80000000;
5671 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5672 ciad = 0x00008000; /* VFLR */
5673 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
5675 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5682 * ixgbe_service_timer - Timer Call-back
5683 * @data: pointer to adapter cast into an unsigned long
5685 static void ixgbe_service_timer(unsigned long data)
5687 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
5688 unsigned long next_event_offset;
5691 /* poll faster when waiting for link */
5692 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
5693 next_event_offset = HZ / 10;
5695 next_event_offset = HZ * 2;
5697 #ifdef CONFIG_PCI_IOV
5699 * don't bother with SR-IOV VF DMA hang check if there are
5700 * no VFs or the link is down
5702 if (!adapter->num_vfs ||
5703 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5704 goto normal_timer_service;
5706 /* If we have VFs allocated then we must check for DMA hangs */
5707 ixgbe_check_for_bad_vf(adapter);
5708 next_event_offset = HZ / 50;
5709 adapter->timer_event_accumulator++;
5711 if (adapter->timer_event_accumulator >= 100)
5712 adapter->timer_event_accumulator = 0;
5716 normal_timer_service:
5718 /* Reset the timer */
5719 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
5722 ixgbe_service_event_schedule(adapter);
5725 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
5727 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
5730 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
5732 /* If we're already down or resetting, just bail */
5733 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5734 test_bit(__IXGBE_RESETTING, &adapter->state))
5737 ixgbe_dump(adapter);
5738 netdev_err(adapter->netdev, "Reset adapter\n");
5739 adapter->tx_timeout_count++;
5741 ixgbe_reinit_locked(adapter);
5745 * ixgbe_service_task - manages and runs subtasks
5746 * @work: pointer to work_struct containing our data
5748 static void ixgbe_service_task(struct work_struct *work)
5750 struct ixgbe_adapter *adapter = container_of(work,
5751 struct ixgbe_adapter,
5754 ixgbe_reset_subtask(adapter);
5755 ixgbe_sfp_detection_subtask(adapter);
5756 ixgbe_sfp_link_config_subtask(adapter);
5757 ixgbe_check_overtemp_subtask(adapter);
5758 ixgbe_watchdog_subtask(adapter);
5759 ixgbe_fdir_reinit_subtask(adapter);
5760 ixgbe_check_hang_subtask(adapter);
5761 #ifdef CONFIG_IXGBE_PTP
5762 ixgbe_ptp_overflow_check(adapter);
5765 ixgbe_service_event_complete(adapter);
5768 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
5769 struct ixgbe_tx_buffer *first,
5772 struct sk_buff *skb = first->skb;
5773 u32 vlan_macip_lens, type_tucmd;
5774 u32 mss_l4len_idx, l4len;
5776 if (!skb_is_gso(skb))
5779 if (skb_header_cloned(skb)) {
5780 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5785 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5786 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
5788 if (first->protocol == __constant_htons(ETH_P_IP)) {
5789 struct iphdr *iph = ip_hdr(skb);
5792 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5796 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5797 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5798 IXGBE_TX_FLAGS_CSUM |
5799 IXGBE_TX_FLAGS_IPV4;
5800 } else if (skb_is_gso_v6(skb)) {
5801 ipv6_hdr(skb)->payload_len = 0;
5802 tcp_hdr(skb)->check =
5803 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5804 &ipv6_hdr(skb)->daddr,
5806 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5807 IXGBE_TX_FLAGS_CSUM;
5810 /* compute header lengths */
5811 l4len = tcp_hdrlen(skb);
5812 *hdr_len = skb_transport_offset(skb) + l4len;
5814 /* update gso size and bytecount with header size */
5815 first->gso_segs = skb_shinfo(skb)->gso_segs;
5816 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5818 /* mss_l4len_id: use 1 as index for TSO */
5819 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
5820 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
5821 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
5823 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5824 vlan_macip_lens = skb_network_header_len(skb);
5825 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5826 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5828 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
5834 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
5835 struct ixgbe_tx_buffer *first)
5837 struct sk_buff *skb = first->skb;
5838 u32 vlan_macip_lens = 0;
5839 u32 mss_l4len_idx = 0;
5842 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5843 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
5844 !(first->tx_flags & IXGBE_TX_FLAGS_TXSW))
5848 switch (first->protocol) {
5849 case __constant_htons(ETH_P_IP):
5850 vlan_macip_lens |= skb_network_header_len(skb);
5851 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5852 l4_hdr = ip_hdr(skb)->protocol;
5854 case __constant_htons(ETH_P_IPV6):
5855 vlan_macip_lens |= skb_network_header_len(skb);
5856 l4_hdr = ipv6_hdr(skb)->nexthdr;
5859 if (unlikely(net_ratelimit())) {
5860 dev_warn(tx_ring->dev,
5861 "partial checksum but proto=%x!\n",
5869 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
5870 mss_l4len_idx = tcp_hdrlen(skb) <<
5871 IXGBE_ADVTXD_L4LEN_SHIFT;
5874 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
5875 mss_l4len_idx = sizeof(struct sctphdr) <<
5876 IXGBE_ADVTXD_L4LEN_SHIFT;
5879 mss_l4len_idx = sizeof(struct udphdr) <<
5880 IXGBE_ADVTXD_L4LEN_SHIFT;
5883 if (unlikely(net_ratelimit())) {
5884 dev_warn(tx_ring->dev,
5885 "partial checksum but l4 proto=%x!\n",
5891 /* update TX checksum flag */
5892 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
5895 /* vlan_macip_lens: MACLEN, VLAN tag */
5896 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5897 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5899 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
5900 type_tucmd, mss_l4len_idx);
5903 static __le32 ixgbe_tx_cmd_type(u32 tx_flags)
5905 /* set type for advanced descriptor with frame checksum insertion */
5906 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
5907 IXGBE_ADVTXD_DCMD_IFCS |
5908 IXGBE_ADVTXD_DCMD_DEXT);
5910 /* set HW vlan bit if vlan is present */
5911 if (tx_flags & IXGBE_TX_FLAGS_HW_VLAN)
5912 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
5914 #ifdef CONFIG_IXGBE_PTP
5915 if (tx_flags & IXGBE_TX_FLAGS_TSTAMP)
5916 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP);
5919 /* set segmentation enable bits for TSO/FSO */
5921 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FSO))
5923 if (tx_flags & IXGBE_TX_FLAGS_TSO)
5925 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
5930 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
5931 u32 tx_flags, unsigned int paylen)
5933 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
5935 /* enable L4 checksum for TSO and TX checksum offload */
5936 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
5937 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
5939 /* enble IPv4 checksum for TSO */
5940 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
5941 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
5943 /* use index 1 context for TSO/FSO/FCOE */
5945 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FCOE))
5947 if (tx_flags & IXGBE_TX_FLAGS_TSO)
5949 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
5952 * Check Context must be set if Tx switch is enabled, which it
5953 * always is for case where virtual functions are running
5956 if (tx_flags & (IXGBE_TX_FLAGS_TXSW | IXGBE_TX_FLAGS_FCOE))
5958 if (tx_flags & IXGBE_TX_FLAGS_TXSW)
5960 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
5962 tx_desc->read.olinfo_status = olinfo_status;
5965 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
5968 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
5969 struct ixgbe_tx_buffer *first,
5973 struct sk_buff *skb = first->skb;
5974 struct ixgbe_tx_buffer *tx_buffer;
5975 union ixgbe_adv_tx_desc *tx_desc;
5976 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
5977 unsigned int data_len = skb->data_len;
5978 unsigned int size = skb_headlen(skb);
5979 unsigned int paylen = skb->len - hdr_len;
5980 u32 tx_flags = first->tx_flags;
5982 u16 i = tx_ring->next_to_use;
5984 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5986 ixgbe_tx_olinfo_status(tx_desc, tx_flags, paylen);
5987 cmd_type = ixgbe_tx_cmd_type(tx_flags);
5990 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
5991 if (data_len < sizeof(struct fcoe_crc_eof)) {
5992 size -= sizeof(struct fcoe_crc_eof) - data_len;
5995 data_len -= sizeof(struct fcoe_crc_eof);
6000 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6001 if (dma_mapping_error(tx_ring->dev, dma))
6004 /* record length, and DMA address */
6005 dma_unmap_len_set(first, len, size);
6006 dma_unmap_addr_set(first, dma, dma);
6008 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6011 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6012 tx_desc->read.cmd_type_len =
6013 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
6017 if (i == tx_ring->count) {
6018 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6022 dma += IXGBE_MAX_DATA_PER_TXD;
6023 size -= IXGBE_MAX_DATA_PER_TXD;
6025 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6026 tx_desc->read.olinfo_status = 0;
6029 if (likely(!data_len))
6032 if (unlikely(skb->no_fcs))
6033 cmd_type &= ~(cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS));
6034 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
6038 if (i == tx_ring->count) {
6039 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6044 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6046 size = skb_frag_size(frag);
6050 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6052 if (dma_mapping_error(tx_ring->dev, dma))
6055 tx_buffer = &tx_ring->tx_buffer_info[i];
6056 dma_unmap_len_set(tx_buffer, len, size);
6057 dma_unmap_addr_set(tx_buffer, dma, dma);
6059 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6060 tx_desc->read.olinfo_status = 0;
6065 /* write last descriptor with RS and EOP bits */
6066 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
6067 tx_desc->read.cmd_type_len = cmd_type;
6069 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6071 /* set the timestamp */
6072 first->time_stamp = jiffies;
6075 * Force memory writes to complete before letting h/w know there
6076 * are new descriptors to fetch. (Only applicable for weak-ordered
6077 * memory model archs, such as IA-64).
6079 * We also need this memory barrier to make certain all of the
6080 * status bits have been updated before next_to_watch is written.
6084 /* set next_to_watch value indicating a packet is present */
6085 first->next_to_watch = tx_desc;
6088 if (i == tx_ring->count)
6091 tx_ring->next_to_use = i;
6093 /* notify HW of packet */
6094 writel(i, tx_ring->tail);
6098 dev_err(tx_ring->dev, "TX DMA map failed\n");
6100 /* clear dma mappings for failed tx_buffer_info map */
6102 tx_buffer = &tx_ring->tx_buffer_info[i];
6103 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6104 if (tx_buffer == first)
6111 tx_ring->next_to_use = i;
6114 static void ixgbe_atr(struct ixgbe_ring *ring,
6115 struct ixgbe_tx_buffer *first)
6117 struct ixgbe_q_vector *q_vector = ring->q_vector;
6118 union ixgbe_atr_hash_dword input = { .dword = 0 };
6119 union ixgbe_atr_hash_dword common = { .dword = 0 };
6121 unsigned char *network;
6123 struct ipv6hdr *ipv6;
6128 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6132 /* do nothing if sampling is disabled */
6133 if (!ring->atr_sample_rate)
6138 /* snag network header to get L4 type and address */
6139 hdr.network = skb_network_header(first->skb);
6141 /* Currently only IPv4/IPv6 with TCP is supported */
6142 if ((first->protocol != __constant_htons(ETH_P_IPV6) ||
6143 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
6144 (first->protocol != __constant_htons(ETH_P_IP) ||
6145 hdr.ipv4->protocol != IPPROTO_TCP))
6148 th = tcp_hdr(first->skb);
6150 /* skip this packet since it is invalid or the socket is closing */
6154 /* sample on all syn packets or once every atr sample count */
6155 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
6158 /* reset sample count */
6159 ring->atr_count = 0;
6161 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
6164 * src and dst are inverted, think how the receiver sees them
6166 * The input is broken into two sections, a non-compressed section
6167 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6168 * is XORed together and stored in the compressed dword.
6170 input.formatted.vlan_id = vlan_id;
6173 * since src port and flex bytes occupy the same word XOR them together
6174 * and write the value to source port portion of compressed dword
6176 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
6177 common.port.src ^= th->dest ^ __constant_htons(ETH_P_8021Q);
6179 common.port.src ^= th->dest ^ first->protocol;
6180 common.port.dst ^= th->source;
6182 if (first->protocol == __constant_htons(ETH_P_IP)) {
6183 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
6184 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
6186 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
6187 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
6188 hdr.ipv6->saddr.s6_addr32[1] ^
6189 hdr.ipv6->saddr.s6_addr32[2] ^
6190 hdr.ipv6->saddr.s6_addr32[3] ^
6191 hdr.ipv6->daddr.s6_addr32[0] ^
6192 hdr.ipv6->daddr.s6_addr32[1] ^
6193 hdr.ipv6->daddr.s6_addr32[2] ^
6194 hdr.ipv6->daddr.s6_addr32[3];
6197 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6198 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
6199 input, common, ring->queue_index);
6202 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6204 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6205 /* Herbert's original patch had:
6206 * smp_mb__after_netif_stop_queue();
6207 * but since that doesn't exist yet, just open code it. */
6210 /* We need to check again in a case another CPU has just
6211 * made room available. */
6212 if (likely(ixgbe_desc_unused(tx_ring) < size))
6215 /* A reprieve! - use start_queue because it doesn't call schedule */
6216 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6217 ++tx_ring->tx_stats.restart_queue;
6221 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6223 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6225 return __ixgbe_maybe_stop_tx(tx_ring, size);
6228 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
6230 struct ixgbe_adapter *adapter = netdev_priv(dev);
6231 int txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
6234 __be16 protocol = vlan_get_protocol(skb);
6236 if (((protocol == htons(ETH_P_FCOE)) ||
6237 (protocol == htons(ETH_P_FIP))) &&
6238 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6239 struct ixgbe_ring_feature *f;
6241 f = &adapter->ring_feature[RING_F_FCOE];
6243 while (txq >= f->indices)
6245 txq += adapter->ring_feature[RING_F_FCOE].offset;
6251 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
6252 while (unlikely(txq >= dev->real_num_tx_queues))
6253 txq -= dev->real_num_tx_queues;
6257 return skb_tx_hash(dev, skb);
6260 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
6261 struct ixgbe_adapter *adapter,
6262 struct ixgbe_ring *tx_ring)
6264 struct ixgbe_tx_buffer *first;
6267 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6270 u16 count = TXD_USE_COUNT(skb_headlen(skb));
6271 __be16 protocol = skb->protocol;
6275 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6276 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6277 * + 2 desc gap to keep tail from touching head,
6278 * + 1 desc for context descriptor,
6279 * otherwise try next time
6281 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6282 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6283 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6285 count += skb_shinfo(skb)->nr_frags;
6287 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
6288 tx_ring->tx_stats.tx_busy++;
6289 return NETDEV_TX_BUSY;
6292 /* record the location of the first descriptor for this packet */
6293 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6295 first->bytecount = skb->len;
6296 first->gso_segs = 1;
6298 /* if we have a HW VLAN tag being added default to the HW one */
6299 if (vlan_tx_tag_present(skb)) {
6300 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
6301 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6302 /* else if it is a SW VLAN check the next protocol and store the tag */
6303 } else if (protocol == __constant_htons(ETH_P_8021Q)) {
6304 struct vlan_hdr *vhdr, _vhdr;
6305 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
6309 protocol = vhdr->h_vlan_encapsulated_proto;
6310 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
6311 IXGBE_TX_FLAGS_VLAN_SHIFT;
6312 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
6315 skb_tx_timestamp(skb);
6317 #ifdef CONFIG_IXGBE_PTP
6318 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6319 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6320 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
6324 #ifdef CONFIG_PCI_IOV
6326 * Use the l2switch_enable flag - would be false if the DMA
6327 * Tx switch had been disabled.
6329 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6330 tx_flags |= IXGBE_TX_FLAGS_TXSW;
6333 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6334 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
6335 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
6336 (skb->priority != TC_PRIO_CONTROL))) {
6337 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
6338 tx_flags |= (skb->priority & 0x7) <<
6339 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
6340 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
6341 struct vlan_ethhdr *vhdr;
6342 if (skb_header_cloned(skb) &&
6343 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
6345 vhdr = (struct vlan_ethhdr *)skb->data;
6346 vhdr->h_vlan_TCI = htons(tx_flags >>
6347 IXGBE_TX_FLAGS_VLAN_SHIFT);
6349 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6353 /* record initial flags and protocol */
6354 first->tx_flags = tx_flags;
6355 first->protocol = protocol;
6358 /* setup tx offload for FCoE */
6359 if ((protocol == __constant_htons(ETH_P_FCOE)) &&
6360 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6361 tso = ixgbe_fso(tx_ring, first, &hdr_len);
6368 #endif /* IXGBE_FCOE */
6369 tso = ixgbe_tso(tx_ring, first, &hdr_len);
6373 ixgbe_tx_csum(tx_ring, first);
6375 /* add the ATR filter if ATR is on */
6376 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
6377 ixgbe_atr(tx_ring, first);
6381 #endif /* IXGBE_FCOE */
6382 ixgbe_tx_map(tx_ring, first, hdr_len);
6384 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
6386 return NETDEV_TX_OK;
6389 dev_kfree_skb_any(first->skb);
6392 return NETDEV_TX_OK;
6395 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
6396 struct net_device *netdev)
6398 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6399 struct ixgbe_ring *tx_ring;
6402 * The minimum packet size for olinfo paylen is 17 so pad the skb
6403 * in order to meet this minimum size requirement.
6405 if (unlikely(skb->len < 17)) {
6406 if (skb_pad(skb, 17 - skb->len))
6407 return NETDEV_TX_OK;
6411 tx_ring = adapter->tx_ring[skb->queue_mapping];
6412 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
6416 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6417 * @netdev: network interface device structure
6418 * @p: pointer to an address structure
6420 * Returns 0 on success, negative on failure
6422 static int ixgbe_set_mac(struct net_device *netdev, void *p)
6424 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6425 struct ixgbe_hw *hw = &adapter->hw;
6426 struct sockaddr *addr = p;
6428 if (!is_valid_ether_addr(addr->sa_data))
6429 return -EADDRNOTAVAIL;
6431 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
6432 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
6434 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
6441 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
6443 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6444 struct ixgbe_hw *hw = &adapter->hw;
6448 if (prtad != hw->phy.mdio.prtad)
6450 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
6456 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
6457 u16 addr, u16 value)
6459 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6460 struct ixgbe_hw *hw = &adapter->hw;
6462 if (prtad != hw->phy.mdio.prtad)
6464 return hw->phy.ops.write_reg(hw, addr, devad, value);
6467 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
6469 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6472 #ifdef CONFIG_IXGBE_PTP
6474 return ixgbe_ptp_hwtstamp_ioctl(adapter, req, cmd);
6477 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
6482 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6484 * @netdev: network interface device structure
6486 * Returns non-zero on failure
6488 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
6491 struct ixgbe_adapter *adapter = netdev_priv(dev);
6492 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6494 if (is_valid_ether_addr(mac->san_addr)) {
6496 err = dev_addr_add(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6503 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6505 * @netdev: network interface device structure
6507 * Returns non-zero on failure
6509 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
6512 struct ixgbe_adapter *adapter = netdev_priv(dev);
6513 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6515 if (is_valid_ether_addr(mac->san_addr)) {
6517 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6523 #ifdef CONFIG_NET_POLL_CONTROLLER
6525 * Polling 'interrupt' - used by things like netconsole to send skbs
6526 * without having to re-enable interrupts. It's not called while
6527 * the interrupt routine is executing.
6529 static void ixgbe_netpoll(struct net_device *netdev)
6531 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6534 /* if interface is down do nothing */
6535 if (test_bit(__IXGBE_DOWN, &adapter->state))
6538 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
6539 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
6540 for (i = 0; i < adapter->num_q_vectors; i++)
6541 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
6543 ixgbe_intr(adapter->pdev->irq, netdev);
6545 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
6549 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
6550 struct rtnl_link_stats64 *stats)
6552 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6556 for (i = 0; i < adapter->num_rx_queues; i++) {
6557 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
6563 start = u64_stats_fetch_begin_bh(&ring->syncp);
6564 packets = ring->stats.packets;
6565 bytes = ring->stats.bytes;
6566 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6567 stats->rx_packets += packets;
6568 stats->rx_bytes += bytes;
6572 for (i = 0; i < adapter->num_tx_queues; i++) {
6573 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
6579 start = u64_stats_fetch_begin_bh(&ring->syncp);
6580 packets = ring->stats.packets;
6581 bytes = ring->stats.bytes;
6582 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6583 stats->tx_packets += packets;
6584 stats->tx_bytes += bytes;
6588 /* following stats updated by ixgbe_watchdog_task() */
6589 stats->multicast = netdev->stats.multicast;
6590 stats->rx_errors = netdev->stats.rx_errors;
6591 stats->rx_length_errors = netdev->stats.rx_length_errors;
6592 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
6593 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
6597 #ifdef CONFIG_IXGBE_DCB
6599 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6600 * @adapter: pointer to ixgbe_adapter
6601 * @tc: number of traffic classes currently enabled
6603 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6604 * 802.1Q priority maps to a packet buffer that exists.
6606 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
6608 struct ixgbe_hw *hw = &adapter->hw;
6612 /* 82598 have a static priority to TC mapping that can not
6613 * be changed so no validation is needed.
6615 if (hw->mac.type == ixgbe_mac_82598EB)
6618 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
6621 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
6622 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
6624 /* If up2tc is out of bounds default to zero */
6626 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
6630 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
6636 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
6637 * @adapter: Pointer to adapter struct
6639 * Populate the netdev user priority to tc map
6641 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
6643 struct net_device *dev = adapter->netdev;
6644 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
6645 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
6648 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
6651 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
6652 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
6654 tc = ets->prio_tc[prio];
6656 netdev_set_prio_tc_map(dev, prio, tc);
6661 * ixgbe_setup_tc - configure net_device for multiple traffic classes
6663 * @netdev: net device to configure
6664 * @tc: number of traffic classes to enable
6666 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
6668 struct ixgbe_adapter *adapter = netdev_priv(dev);
6669 struct ixgbe_hw *hw = &adapter->hw;
6671 /* Multiple traffic classes requires multiple queues */
6672 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6673 e_err(drv, "Enable failed, needs MSI-X\n");
6677 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6678 e_err(drv, "Enable failed, SR-IOV enabled\n");
6682 /* Hardware supports up to 8 traffic classes */
6683 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
6684 (hw->mac.type == ixgbe_mac_82598EB &&
6685 tc < MAX_TRAFFIC_CLASS))
6688 /* Hardware has to reinitialize queues and interrupts to
6689 * match packet buffer alignment. Unfortunately, the
6690 * hardware is not flexible enough to do this dynamically.
6692 if (netif_running(dev))
6694 ixgbe_clear_interrupt_scheme(adapter);
6697 netdev_set_num_tc(dev, tc);
6698 ixgbe_set_prio_tc_map(adapter);
6700 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
6701 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6703 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
6704 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
6705 adapter->hw.fc.requested_mode = ixgbe_fc_none;
6708 netdev_reset_tc(dev);
6710 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
6711 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
6713 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6714 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6716 adapter->temp_dcb_cfg.pfc_mode_enable = false;
6717 adapter->dcb_cfg.pfc_mode_enable = false;
6720 ixgbe_init_interrupt_scheme(adapter);
6721 ixgbe_validate_rtr(adapter, tc);
6722 if (netif_running(dev))
6728 #endif /* CONFIG_IXGBE_DCB */
6729 void ixgbe_do_reset(struct net_device *netdev)
6731 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6733 if (netif_running(netdev))
6734 ixgbe_reinit_locked(adapter);
6736 ixgbe_reset(adapter);
6739 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
6740 netdev_features_t features)
6742 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6744 /* return error if RXHASH is being enabled when RSS is not supported */
6745 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
6746 features &= ~NETIF_F_RXHASH;
6748 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6749 if (!(features & NETIF_F_RXCSUM))
6750 features &= ~NETIF_F_LRO;
6752 /* Turn off LRO if not RSC capable */
6753 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
6754 features &= ~NETIF_F_LRO;
6759 static int ixgbe_set_features(struct net_device *netdev,
6760 netdev_features_t features)
6762 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6763 netdev_features_t changed = netdev->features ^ features;
6764 bool need_reset = false;
6766 /* Make sure RSC matches LRO, reset if change */
6767 if (!(features & NETIF_F_LRO)) {
6768 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
6770 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
6771 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
6772 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
6773 if (adapter->rx_itr_setting == 1 ||
6774 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
6775 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
6777 } else if ((changed ^ features) & NETIF_F_LRO) {
6778 e_info(probe, "rx-usecs set too low, "
6784 * Check if Flow Director n-tuple support was enabled or disabled. If
6785 * the state changed, we need to reset.
6787 if (!(features & NETIF_F_NTUPLE)) {
6788 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
6789 /* turn off Flow Director, set ATR and reset */
6790 if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) &&
6791 !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
6792 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6795 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6796 } else if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) {
6797 /* turn off ATR, enable perfect filters and reset */
6798 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6799 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6803 if (features & NETIF_F_HW_VLAN_RX)
6804 ixgbe_vlan_strip_enable(adapter);
6806 ixgbe_vlan_strip_disable(adapter);
6808 if (changed & NETIF_F_RXALL)
6811 netdev->features = features;
6813 ixgbe_do_reset(netdev);
6818 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm,
6819 struct net_device *dev,
6820 unsigned char *addr,
6823 struct ixgbe_adapter *adapter = netdev_priv(dev);
6824 int err = -EOPNOTSUPP;
6826 if (ndm->ndm_state & NUD_PERMANENT) {
6827 pr_info("%s: FDB only supports static addresses\n",
6832 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6833 if (is_unicast_ether_addr(addr))
6834 err = dev_uc_add_excl(dev, addr);
6835 else if (is_multicast_ether_addr(addr))
6836 err = dev_mc_add_excl(dev, addr);
6841 /* Only return duplicate errors if NLM_F_EXCL is set */
6842 if (err == -EEXIST && !(flags & NLM_F_EXCL))
6848 static int ixgbe_ndo_fdb_del(struct ndmsg *ndm,
6849 struct net_device *dev,
6850 unsigned char *addr)
6852 struct ixgbe_adapter *adapter = netdev_priv(dev);
6853 int err = -EOPNOTSUPP;
6855 if (ndm->ndm_state & NUD_PERMANENT) {
6856 pr_info("%s: FDB only supports static addresses\n",
6861 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6862 if (is_unicast_ether_addr(addr))
6863 err = dev_uc_del(dev, addr);
6864 else if (is_multicast_ether_addr(addr))
6865 err = dev_mc_del(dev, addr);
6873 static int ixgbe_ndo_fdb_dump(struct sk_buff *skb,
6874 struct netlink_callback *cb,
6875 struct net_device *dev,
6878 struct ixgbe_adapter *adapter = netdev_priv(dev);
6880 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6881 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
6886 static const struct net_device_ops ixgbe_netdev_ops = {
6887 .ndo_open = ixgbe_open,
6888 .ndo_stop = ixgbe_close,
6889 .ndo_start_xmit = ixgbe_xmit_frame,
6890 .ndo_select_queue = ixgbe_select_queue,
6891 .ndo_set_rx_mode = ixgbe_set_rx_mode,
6892 .ndo_validate_addr = eth_validate_addr,
6893 .ndo_set_mac_address = ixgbe_set_mac,
6894 .ndo_change_mtu = ixgbe_change_mtu,
6895 .ndo_tx_timeout = ixgbe_tx_timeout,
6896 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
6897 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
6898 .ndo_do_ioctl = ixgbe_ioctl,
6899 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
6900 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
6901 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
6902 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
6903 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
6904 .ndo_get_stats64 = ixgbe_get_stats64,
6905 #ifdef CONFIG_IXGBE_DCB
6906 .ndo_setup_tc = ixgbe_setup_tc,
6908 #ifdef CONFIG_NET_POLL_CONTROLLER
6909 .ndo_poll_controller = ixgbe_netpoll,
6912 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
6913 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
6914 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
6915 .ndo_fcoe_enable = ixgbe_fcoe_enable,
6916 .ndo_fcoe_disable = ixgbe_fcoe_disable,
6917 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
6918 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
6919 #endif /* IXGBE_FCOE */
6920 .ndo_set_features = ixgbe_set_features,
6921 .ndo_fix_features = ixgbe_fix_features,
6922 .ndo_fdb_add = ixgbe_ndo_fdb_add,
6923 .ndo_fdb_del = ixgbe_ndo_fdb_del,
6924 .ndo_fdb_dump = ixgbe_ndo_fdb_dump,
6927 static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter,
6928 const struct ixgbe_info *ii)
6930 #ifdef CONFIG_PCI_IOV
6931 struct ixgbe_hw *hw = &adapter->hw;
6933 if (hw->mac.type == ixgbe_mac_82598EB)
6936 /* The 82599 supports up to 64 VFs per physical function
6937 * but this implementation limits allocation to 63 so that
6938 * basic networking resources are still available to the
6939 * physical function. If the user requests greater thn
6940 * 63 VFs then it is an error - reset to default of zero.
6942 adapter->num_vfs = (max_vfs > 63) ? 0 : max_vfs;
6943 ixgbe_enable_sriov(adapter, ii);
6944 #endif /* CONFIG_PCI_IOV */
6948 * ixgbe_wol_supported - Check whether device supports WoL
6949 * @hw: hw specific details
6950 * @device_id: the device ID
6951 * @subdev_id: the subsystem device ID
6953 * This function is used by probe and ethtool to determine
6954 * which devices have WoL support
6957 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
6960 struct ixgbe_hw *hw = &adapter->hw;
6961 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
6962 int is_wol_supported = 0;
6964 switch (device_id) {
6965 case IXGBE_DEV_ID_82599_SFP:
6966 /* Only these subdevices could supports WOL */
6967 switch (subdevice_id) {
6968 case IXGBE_SUBDEV_ID_82599_560FLR:
6969 /* only support first port */
6970 if (hw->bus.func != 0)
6972 case IXGBE_SUBDEV_ID_82599_SFP:
6973 is_wol_supported = 1;
6977 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
6978 /* All except this subdevice support WOL */
6979 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
6980 is_wol_supported = 1;
6982 case IXGBE_DEV_ID_82599_KX4:
6983 is_wol_supported = 1;
6985 case IXGBE_DEV_ID_X540T:
6986 /* check eeprom to see if enabled wol */
6987 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
6988 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
6989 (hw->bus.func == 0))) {
6990 is_wol_supported = 1;
6995 return is_wol_supported;
6999 * ixgbe_probe - Device Initialization Routine
7000 * @pdev: PCI device information struct
7001 * @ent: entry in ixgbe_pci_tbl
7003 * Returns 0 on success, negative on failure
7005 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
7006 * The OS initialization, configuring of the adapter private structure,
7007 * and a hardware reset occur.
7009 static int __devinit ixgbe_probe(struct pci_dev *pdev,
7010 const struct pci_device_id *ent)
7012 struct net_device *netdev;
7013 struct ixgbe_adapter *adapter = NULL;
7014 struct ixgbe_hw *hw;
7015 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
7016 static int cards_found;
7017 int i, err, pci_using_dac;
7018 u8 part_str[IXGBE_PBANUM_LENGTH];
7019 unsigned int indices = num_possible_cpus();
7025 /* Catch broken hardware that put the wrong VF device ID in
7026 * the PCIe SR-IOV capability.
7028 if (pdev->is_virtfn) {
7029 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
7030 pci_name(pdev), pdev->vendor, pdev->device);
7034 err = pci_enable_device_mem(pdev);
7038 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
7039 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
7042 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
7044 err = dma_set_coherent_mask(&pdev->dev,
7048 "No usable DMA configuration, aborting\n");
7055 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7056 IORESOURCE_MEM), ixgbe_driver_name);
7059 "pci_request_selected_regions failed 0x%x\n", err);
7063 pci_enable_pcie_error_reporting(pdev);
7065 pci_set_master(pdev);
7066 pci_save_state(pdev);
7068 #ifdef CONFIG_IXGBE_DCB
7069 indices *= MAX_TRAFFIC_CLASS;
7072 if (ii->mac == ixgbe_mac_82598EB)
7073 #ifdef CONFIG_IXGBE_DCB
7074 indices = min_t(unsigned int, indices, MAX_TRAFFIC_CLASS * 4);
7076 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
7079 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
7082 indices += min_t(unsigned int, num_possible_cpus(),
7083 IXGBE_MAX_FCOE_INDICES);
7085 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
7088 goto err_alloc_etherdev;
7091 SET_NETDEV_DEV(netdev, &pdev->dev);
7093 adapter = netdev_priv(netdev);
7094 pci_set_drvdata(pdev, adapter);
7096 adapter->netdev = netdev;
7097 adapter->pdev = pdev;
7100 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7102 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7103 pci_resource_len(pdev, 0));
7109 for (i = 1; i <= 5; i++) {
7110 if (pci_resource_len(pdev, i) == 0)
7114 netdev->netdev_ops = &ixgbe_netdev_ops;
7115 ixgbe_set_ethtool_ops(netdev);
7116 netdev->watchdog_timeo = 5 * HZ;
7117 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
7119 adapter->bd_number = cards_found;
7122 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
7123 hw->mac.type = ii->mac;
7126 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
7127 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
7128 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7129 if (!(eec & (1 << 8)))
7130 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
7133 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
7134 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
7135 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7136 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
7137 hw->phy.mdio.mmds = 0;
7138 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
7139 hw->phy.mdio.dev = netdev;
7140 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
7141 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
7143 ii->get_invariants(hw);
7145 /* setup the private structure */
7146 err = ixgbe_sw_init(adapter);
7150 /* Make it possible the adapter to be woken up via WOL */
7151 switch (adapter->hw.mac.type) {
7152 case ixgbe_mac_82599EB:
7153 case ixgbe_mac_X540:
7154 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7161 * If there is a fan on this device and it has failed log the
7164 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
7165 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
7166 if (esdp & IXGBE_ESDP_SDP1)
7167 e_crit(probe, "Fan has stopped, replace the adapter\n");
7170 if (allow_unsupported_sfp)
7171 hw->allow_unsupported_sfp = allow_unsupported_sfp;
7173 /* reset_hw fills in the perm_addr as well */
7174 hw->phy.reset_if_overtemp = true;
7175 err = hw->mac.ops.reset_hw(hw);
7176 hw->phy.reset_if_overtemp = false;
7177 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
7178 hw->mac.type == ixgbe_mac_82598EB) {
7180 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
7181 e_dev_err("failed to load because an unsupported SFP+ "
7182 "module type was detected.\n");
7183 e_dev_err("Reload the driver after installing a supported "
7187 e_dev_err("HW Init failed: %d\n", err);
7191 ixgbe_probe_vf(adapter, ii);
7193 netdev->features = NETIF_F_SG |
7196 NETIF_F_HW_VLAN_TX |
7197 NETIF_F_HW_VLAN_RX |
7198 NETIF_F_HW_VLAN_FILTER |
7204 netdev->hw_features = netdev->features;
7206 switch (adapter->hw.mac.type) {
7207 case ixgbe_mac_82599EB:
7208 case ixgbe_mac_X540:
7209 netdev->features |= NETIF_F_SCTP_CSUM;
7210 netdev->hw_features |= NETIF_F_SCTP_CSUM |
7217 netdev->hw_features |= NETIF_F_RXALL;
7219 netdev->vlan_features |= NETIF_F_TSO;
7220 netdev->vlan_features |= NETIF_F_TSO6;
7221 netdev->vlan_features |= NETIF_F_IP_CSUM;
7222 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
7223 netdev->vlan_features |= NETIF_F_SG;
7225 netdev->priv_flags |= IFF_UNICAST_FLT;
7226 netdev->priv_flags |= IFF_SUPP_NOFCS;
7228 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7229 adapter->flags &= ~(IXGBE_FLAG_RSS_ENABLED |
7230 IXGBE_FLAG_DCB_ENABLED);
7232 #ifdef CONFIG_IXGBE_DCB
7233 netdev->dcbnl_ops = &dcbnl_ops;
7237 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7238 if (hw->mac.ops.get_device_caps) {
7239 hw->mac.ops.get_device_caps(hw, &device_caps);
7240 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
7241 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
7244 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7245 netdev->vlan_features |= NETIF_F_FCOE_CRC;
7246 netdev->vlan_features |= NETIF_F_FSO;
7247 netdev->vlan_features |= NETIF_F_FCOE_MTU;
7249 #endif /* IXGBE_FCOE */
7250 if (pci_using_dac) {
7251 netdev->features |= NETIF_F_HIGHDMA;
7252 netdev->vlan_features |= NETIF_F_HIGHDMA;
7255 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
7256 netdev->hw_features |= NETIF_F_LRO;
7257 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7258 netdev->features |= NETIF_F_LRO;
7260 /* make sure the EEPROM is good */
7261 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
7262 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7267 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
7268 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
7270 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
7271 e_dev_err("invalid MAC address\n");
7276 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
7277 (unsigned long) adapter);
7279 INIT_WORK(&adapter->service_task, ixgbe_service_task);
7280 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
7282 err = ixgbe_init_interrupt_scheme(adapter);
7286 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED)) {
7287 netdev->hw_features &= ~NETIF_F_RXHASH;
7288 netdev->features &= ~NETIF_F_RXHASH;
7291 /* WOL not supported for all devices */
7293 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
7294 if (ixgbe_wol_supported(adapter, pdev->device, pdev->subsystem_device))
7295 adapter->wol = IXGBE_WUFC_MAG;
7297 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
7299 #ifdef CONFIG_IXGBE_PTP
7300 ixgbe_ptp_init(adapter);
7301 #endif /* CONFIG_IXGBE_PTP*/
7303 /* save off EEPROM version number */
7304 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
7305 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
7307 /* pick up the PCI bus settings for reporting later */
7308 hw->mac.ops.get_bus_info(hw);
7310 /* print bus type/speed/width info */
7311 e_dev_info("(PCI Express:%s:%s) %pM\n",
7312 (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
7313 hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
7315 (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
7316 hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
7317 hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
7321 err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
7323 strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
7324 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
7325 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7326 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
7329 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7330 hw->mac.type, hw->phy.type, part_str);
7332 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
7333 e_dev_warn("PCI-Express bandwidth available for this card is "
7334 "not sufficient for optimal performance.\n");
7335 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7339 /* reset the hardware with the new settings */
7340 err = hw->mac.ops.start_hw(hw);
7341 if (err == IXGBE_ERR_EEPROM_VERSION) {
7342 /* We are running on a pre-production device, log a warning */
7343 e_dev_warn("This device is a pre-production adapter/LOM. "
7344 "Please be aware there may be issues associated "
7345 "with your hardware. If you are experiencing "
7346 "problems please contact your Intel or hardware "
7347 "representative who provided you with this "
7350 strcpy(netdev->name, "eth%d");
7351 err = register_netdev(netdev);
7355 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
7356 if (hw->mac.ops.disable_tx_laser &&
7357 ((hw->phy.multispeed_fiber) ||
7358 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
7359 (hw->mac.type == ixgbe_mac_82599EB))))
7360 hw->mac.ops.disable_tx_laser(hw);
7362 /* carrier off reporting is important to ethtool even BEFORE open */
7363 netif_carrier_off(netdev);
7365 #ifdef CONFIG_IXGBE_DCA
7366 if (dca_add_requester(&pdev->dev) == 0) {
7367 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
7368 ixgbe_setup_dca(adapter);
7371 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7372 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
7373 for (i = 0; i < adapter->num_vfs; i++)
7374 ixgbe_vf_configuration(pdev, (i | 0x10000000));
7377 /* firmware requires driver version to be 0xFFFFFFFF
7378 * since os does not support feature
7380 if (hw->mac.ops.set_fw_drv_ver)
7381 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
7384 /* add san mac addr to netdev */
7385 ixgbe_add_sanmac_netdev(netdev);
7387 e_dev_info("%s\n", ixgbe_default_device_descr);
7390 #ifdef CONFIG_IXGBE_HWMON
7391 if (ixgbe_sysfs_init(adapter))
7392 e_err(probe, "failed to allocate sysfs resources\n");
7393 #endif /* CONFIG_IXGBE_HWMON */
7398 ixgbe_release_hw_control(adapter);
7399 ixgbe_clear_interrupt_scheme(adapter);
7401 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7402 ixgbe_disable_sriov(adapter);
7403 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7404 iounmap(hw->hw_addr);
7406 free_netdev(netdev);
7408 pci_release_selected_regions(pdev,
7409 pci_select_bars(pdev, IORESOURCE_MEM));
7412 pci_disable_device(pdev);
7417 * ixgbe_remove - Device Removal Routine
7418 * @pdev: PCI device information struct
7420 * ixgbe_remove is called by the PCI subsystem to alert the driver
7421 * that it should release a PCI device. The could be caused by a
7422 * Hot-Plug event, or because the driver is going to be removed from
7425 static void __devexit ixgbe_remove(struct pci_dev *pdev)
7427 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7428 struct net_device *netdev = adapter->netdev;
7430 set_bit(__IXGBE_DOWN, &adapter->state);
7431 cancel_work_sync(&adapter->service_task);
7433 #ifdef CONFIG_IXGBE_PTP
7434 ixgbe_ptp_stop(adapter);
7437 #ifdef CONFIG_IXGBE_DCA
7438 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
7439 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
7440 dca_remove_requester(&pdev->dev);
7441 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
7445 #ifdef CONFIG_IXGBE_HWMON
7446 ixgbe_sysfs_exit(adapter);
7447 #endif /* CONFIG_IXGBE_HWMON */
7450 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7451 ixgbe_cleanup_fcoe(adapter);
7453 #endif /* IXGBE_FCOE */
7455 /* remove the added san mac */
7456 ixgbe_del_sanmac_netdev(netdev);
7458 if (netdev->reg_state == NETREG_REGISTERED)
7459 unregister_netdev(netdev);
7461 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7462 if (!(ixgbe_check_vf_assignment(adapter)))
7463 ixgbe_disable_sriov(adapter);
7465 e_dev_warn("Unloading driver while VFs are assigned "
7466 "- VFs will not be deallocated\n");
7469 ixgbe_clear_interrupt_scheme(adapter);
7471 ixgbe_release_hw_control(adapter);
7474 kfree(adapter->ixgbe_ieee_pfc);
7475 kfree(adapter->ixgbe_ieee_ets);
7478 iounmap(adapter->hw.hw_addr);
7479 pci_release_selected_regions(pdev, pci_select_bars(pdev,
7482 e_dev_info("complete\n");
7484 free_netdev(netdev);
7486 pci_disable_pcie_error_reporting(pdev);
7488 pci_disable_device(pdev);
7492 * ixgbe_io_error_detected - called when PCI error is detected
7493 * @pdev: Pointer to PCI device
7494 * @state: The current pci connection state
7496 * This function is called after a PCI bus error affecting
7497 * this device has been detected.
7499 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
7500 pci_channel_state_t state)
7502 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7503 struct net_device *netdev = adapter->netdev;
7505 #ifdef CONFIG_PCI_IOV
7506 struct pci_dev *bdev, *vfdev;
7507 u32 dw0, dw1, dw2, dw3;
7509 u16 req_id, pf_func;
7511 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7512 adapter->num_vfs == 0)
7513 goto skip_bad_vf_detection;
7515 bdev = pdev->bus->self;
7516 while (bdev && (bdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT))
7517 bdev = bdev->bus->self;
7520 goto skip_bad_vf_detection;
7522 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
7524 goto skip_bad_vf_detection;
7526 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
7527 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
7528 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
7529 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
7532 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7533 if (!(req_id & 0x0080))
7534 goto skip_bad_vf_detection;
7536 pf_func = req_id & 0x01;
7537 if ((pf_func & 1) == (pdev->devfn & 1)) {
7538 unsigned int device_id;
7540 vf = (req_id & 0x7F) >> 1;
7541 e_dev_err("VF %d has caused a PCIe error\n", vf);
7542 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7543 "%8.8x\tdw3: %8.8x\n",
7544 dw0, dw1, dw2, dw3);
7545 switch (adapter->hw.mac.type) {
7546 case ixgbe_mac_82599EB:
7547 device_id = IXGBE_82599_VF_DEVICE_ID;
7549 case ixgbe_mac_X540:
7550 device_id = IXGBE_X540_VF_DEVICE_ID;
7557 /* Find the pci device of the offending VF */
7558 vfdev = pci_get_device(IXGBE_INTEL_VENDOR_ID, device_id, NULL);
7560 if (vfdev->devfn == (req_id & 0xFF))
7562 vfdev = pci_get_device(IXGBE_INTEL_VENDOR_ID,
7566 * There's a slim chance the VF could have been hot plugged,
7567 * so if it is no longer present we don't need to issue the
7568 * VFLR. Just clean up the AER in that case.
7571 e_dev_err("Issuing VFLR to VF %d\n", vf);
7572 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
7575 pci_cleanup_aer_uncorrect_error_status(pdev);
7579 * Even though the error may have occurred on the other port
7580 * we still need to increment the vf error reference count for
7581 * both ports because the I/O resume function will be called
7584 adapter->vferr_refcount++;
7586 return PCI_ERS_RESULT_RECOVERED;
7588 skip_bad_vf_detection:
7589 #endif /* CONFIG_PCI_IOV */
7590 netif_device_detach(netdev);
7592 if (state == pci_channel_io_perm_failure)
7593 return PCI_ERS_RESULT_DISCONNECT;
7595 if (netif_running(netdev))
7596 ixgbe_down(adapter);
7597 pci_disable_device(pdev);
7599 /* Request a slot reset. */
7600 return PCI_ERS_RESULT_NEED_RESET;
7604 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7605 * @pdev: Pointer to PCI device
7607 * Restart the card from scratch, as if from a cold-boot.
7609 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
7611 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7612 pci_ers_result_t result;
7615 if (pci_enable_device_mem(pdev)) {
7616 e_err(probe, "Cannot re-enable PCI device after reset.\n");
7617 result = PCI_ERS_RESULT_DISCONNECT;
7619 pci_set_master(pdev);
7620 pci_restore_state(pdev);
7621 pci_save_state(pdev);
7623 pci_wake_from_d3(pdev, false);
7625 ixgbe_reset(adapter);
7626 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7627 result = PCI_ERS_RESULT_RECOVERED;
7630 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7632 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7633 "failed 0x%0x\n", err);
7634 /* non-fatal, continue */
7641 * ixgbe_io_resume - called when traffic can start flowing again.
7642 * @pdev: Pointer to PCI device
7644 * This callback is called when the error recovery driver tells us that
7645 * its OK to resume normal operation.
7647 static void ixgbe_io_resume(struct pci_dev *pdev)
7649 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7650 struct net_device *netdev = adapter->netdev;
7652 #ifdef CONFIG_PCI_IOV
7653 if (adapter->vferr_refcount) {
7654 e_info(drv, "Resuming after VF err\n");
7655 adapter->vferr_refcount--;
7660 if (netif_running(netdev))
7663 netif_device_attach(netdev);
7666 static struct pci_error_handlers ixgbe_err_handler = {
7667 .error_detected = ixgbe_io_error_detected,
7668 .slot_reset = ixgbe_io_slot_reset,
7669 .resume = ixgbe_io_resume,
7672 static struct pci_driver ixgbe_driver = {
7673 .name = ixgbe_driver_name,
7674 .id_table = ixgbe_pci_tbl,
7675 .probe = ixgbe_probe,
7676 .remove = __devexit_p(ixgbe_remove),
7678 .suspend = ixgbe_suspend,
7679 .resume = ixgbe_resume,
7681 .shutdown = ixgbe_shutdown,
7682 .err_handler = &ixgbe_err_handler
7686 * ixgbe_init_module - Driver Registration Routine
7688 * ixgbe_init_module is the first routine called when the driver is
7689 * loaded. All it does is register with the PCI subsystem.
7691 static int __init ixgbe_init_module(void)
7694 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
7695 pr_info("%s\n", ixgbe_copyright);
7697 #ifdef CONFIG_IXGBE_DCA
7698 dca_register_notify(&dca_notifier);
7701 ret = pci_register_driver(&ixgbe_driver);
7705 module_init(ixgbe_init_module);
7708 * ixgbe_exit_module - Driver Exit Cleanup Routine
7710 * ixgbe_exit_module is called just before the driver is removed
7713 static void __exit ixgbe_exit_module(void)
7715 #ifdef CONFIG_IXGBE_DCA
7716 dca_unregister_notify(&dca_notifier);
7718 pci_unregister_driver(&ixgbe_driver);
7719 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7722 #ifdef CONFIG_IXGBE_DCA
7723 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
7728 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
7729 __ixgbe_notify_dca);
7731 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7734 #endif /* CONFIG_IXGBE_DCA */
7736 module_exit(ixgbe_exit_module);