net/mlx5e: Direct TIR per RQ
[cascardo/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
1 /*
2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include "en.h"
34
35 static void mlx5e_get_drvinfo(struct net_device *dev,
36                               struct ethtool_drvinfo *drvinfo)
37 {
38         struct mlx5e_priv *priv = netdev_priv(dev);
39         struct mlx5_core_dev *mdev = priv->mdev;
40
41         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42         strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
43                 sizeof(drvinfo->version));
44         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45                  "%d.%d.%d",
46                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
47         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48                 sizeof(drvinfo->bus_info));
49 }
50
51 static const struct {
52         u32 supported;
53         u32 advertised;
54         u32 speed;
55 } ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER] = {
56         [MLX5E_1000BASE_CX_SGMII] = {
57                 .supported  = SUPPORTED_1000baseKX_Full,
58                 .advertised = ADVERTISED_1000baseKX_Full,
59                 .speed      = 1000,
60         },
61         [MLX5E_1000BASE_KX] = {
62                 .supported  = SUPPORTED_1000baseKX_Full,
63                 .advertised = ADVERTISED_1000baseKX_Full,
64                 .speed      = 1000,
65         },
66         [MLX5E_10GBASE_CX4] = {
67                 .supported  = SUPPORTED_10000baseKX4_Full,
68                 .advertised = ADVERTISED_10000baseKX4_Full,
69                 .speed      = 10000,
70         },
71         [MLX5E_10GBASE_KX4] = {
72                 .supported  = SUPPORTED_10000baseKX4_Full,
73                 .advertised = ADVERTISED_10000baseKX4_Full,
74                 .speed      = 10000,
75         },
76         [MLX5E_10GBASE_KR] = {
77                 .supported  = SUPPORTED_10000baseKR_Full,
78                 .advertised = ADVERTISED_10000baseKR_Full,
79                 .speed      = 10000,
80         },
81         [MLX5E_20GBASE_KR2] = {
82                 .supported  = SUPPORTED_20000baseKR2_Full,
83                 .advertised = ADVERTISED_20000baseKR2_Full,
84                 .speed      = 20000,
85         },
86         [MLX5E_40GBASE_CR4] = {
87                 .supported  = SUPPORTED_40000baseCR4_Full,
88                 .advertised = ADVERTISED_40000baseCR4_Full,
89                 .speed      = 40000,
90         },
91         [MLX5E_40GBASE_KR4] = {
92                 .supported  = SUPPORTED_40000baseKR4_Full,
93                 .advertised = ADVERTISED_40000baseKR4_Full,
94                 .speed      = 40000,
95         },
96         [MLX5E_56GBASE_R4] = {
97                 .supported  = SUPPORTED_56000baseKR4_Full,
98                 .advertised = ADVERTISED_56000baseKR4_Full,
99                 .speed      = 56000,
100         },
101         [MLX5E_10GBASE_CR] = {
102                 .supported  = SUPPORTED_10000baseKR_Full,
103                 .advertised = ADVERTISED_10000baseKR_Full,
104                 .speed      = 10000,
105         },
106         [MLX5E_10GBASE_SR] = {
107                 .supported  = SUPPORTED_10000baseKR_Full,
108                 .advertised = ADVERTISED_10000baseKR_Full,
109                 .speed      = 10000,
110         },
111         [MLX5E_10GBASE_ER] = {
112                 .supported  = SUPPORTED_10000baseKR_Full,
113                 .advertised = ADVERTISED_10000baseKR_Full,
114                 .speed      = 10000,
115         },
116         [MLX5E_40GBASE_SR4] = {
117                 .supported  = SUPPORTED_40000baseSR4_Full,
118                 .advertised = ADVERTISED_40000baseSR4_Full,
119                 .speed      = 40000,
120         },
121         [MLX5E_40GBASE_LR4] = {
122                 .supported  = SUPPORTED_40000baseLR4_Full,
123                 .advertised = ADVERTISED_40000baseLR4_Full,
124                 .speed      = 40000,
125         },
126         [MLX5E_100GBASE_CR4] = {
127                 .speed      = 100000,
128         },
129         [MLX5E_100GBASE_SR4] = {
130                 .speed      = 100000,
131         },
132         [MLX5E_100GBASE_KR4] = {
133                 .speed      = 100000,
134         },
135         [MLX5E_100GBASE_LR4] = {
136                 .speed      = 100000,
137         },
138         [MLX5E_100BASE_TX]   = {
139                 .speed      = 100,
140         },
141         [MLX5E_1000BASE_T]    = {
142                 .supported  = SUPPORTED_1000baseT_Full,
143                 .advertised = ADVERTISED_1000baseT_Full,
144                 .speed      = 1000,
145         },
146         [MLX5E_10GBASE_T]    = {
147                 .supported  = SUPPORTED_10000baseT_Full,
148                 .advertised = ADVERTISED_10000baseT_Full,
149                 .speed      = 1000,
150         },
151         [MLX5E_25GBASE_CR]   = {
152                 .speed      = 25000,
153         },
154         [MLX5E_25GBASE_KR]   = {
155                 .speed      = 25000,
156         },
157         [MLX5E_25GBASE_SR]   = {
158                 .speed      = 25000,
159         },
160         [MLX5E_50GBASE_CR2]  = {
161                 .speed      = 50000,
162         },
163         [MLX5E_50GBASE_KR2]  = {
164                 .speed      = 50000,
165         },
166 };
167
168 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
169 {
170         struct mlx5_core_dev *mdev = priv->mdev;
171         u8 pfc_en_tx;
172         u8 pfc_en_rx;
173         int err;
174
175         err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
176
177         return err ? 0 : pfc_en_tx | pfc_en_rx;
178 }
179
180 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
181 #define MLX5E_NUM_RQ_STATS(priv) \
182         (NUM_RQ_STATS * priv->params.num_channels * \
183          test_bit(MLX5E_STATE_OPENED, &priv->state))
184 #define MLX5E_NUM_SQ_STATS(priv) \
185         (NUM_SQ_STATS * priv->params.num_channels * priv->params.num_tc * \
186          test_bit(MLX5E_STATE_OPENED, &priv->state))
187 #define MLX5E_NUM_PFC_COUNTERS(priv) hweight8(mlx5e_query_pfc_combined(priv))
188
189 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
190 {
191         struct mlx5e_priv *priv = netdev_priv(dev);
192
193         switch (sset) {
194         case ETH_SS_STATS:
195                 return NUM_SW_COUNTERS +
196                        MLX5E_NUM_Q_CNTRS(priv) +
197                        NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
198                        MLX5E_NUM_RQ_STATS(priv) +
199                        MLX5E_NUM_SQ_STATS(priv) +
200                        MLX5E_NUM_PFC_COUNTERS(priv);
201         /* fallthrough */
202         default:
203                 return -EOPNOTSUPP;
204         }
205 }
206
207 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
208 {
209         int i, j, tc, prio, idx = 0;
210         unsigned long pfc_combined;
211
212         /* SW counters */
213         for (i = 0; i < NUM_SW_COUNTERS; i++)
214                 strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].name);
215
216         /* Q counters */
217         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
218                 strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].name);
219
220         /* VPORT counters */
221         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
222                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
223                        vport_stats_desc[i].name);
224
225         /* PPORT counters */
226         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
227                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
228                        pport_802_3_stats_desc[i].name);
229
230         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
231                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
232                        pport_2863_stats_desc[i].name);
233
234         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
235                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
236                        pport_2819_stats_desc[i].name);
237
238         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
239                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
240                         sprintf(data + (idx++) * ETH_GSTRING_LEN, "prio%d_%s",
241                                 prio,
242                                 pport_per_prio_traffic_stats_desc[i].name);
243         }
244
245         pfc_combined = mlx5e_query_pfc_combined(priv);
246         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
247                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
248                         sprintf(data + (idx++) * ETH_GSTRING_LEN, "prio%d_%s",
249                                 prio, pport_per_prio_pfc_stats_desc[i].name);
250                 }
251         }
252
253         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
254                 return;
255
256         /* per channel counters */
257         for (i = 0; i < priv->params.num_channels; i++)
258                 for (j = 0; j < NUM_RQ_STATS; j++)
259                         sprintf(data + (idx++) * ETH_GSTRING_LEN, "rx%d_%s", i,
260                                 rq_stats_desc[j].name);
261
262         for (tc = 0; tc < priv->params.num_tc; tc++)
263                 for (i = 0; i < priv->params.num_channels; i++)
264                         for (j = 0; j < NUM_SQ_STATS; j++)
265                                 sprintf(data + (idx++) * ETH_GSTRING_LEN,
266                                         "tx%d_%s",
267                                         priv->channeltc_to_txq_map[i][tc],
268                                         sq_stats_desc[j].name);
269 }
270
271 static void mlx5e_get_strings(struct net_device *dev,
272                               uint32_t stringset, uint8_t *data)
273 {
274         struct mlx5e_priv *priv = netdev_priv(dev);
275
276         switch (stringset) {
277         case ETH_SS_PRIV_FLAGS:
278                 break;
279
280         case ETH_SS_TEST:
281                 break;
282
283         case ETH_SS_STATS:
284                 mlx5e_fill_stats_strings(priv, data);
285                 break;
286         }
287 }
288
289 static void mlx5e_get_ethtool_stats(struct net_device *dev,
290                                     struct ethtool_stats *stats, u64 *data)
291 {
292         struct mlx5e_priv *priv = netdev_priv(dev);
293         int i, j, tc, prio, idx = 0;
294         unsigned long pfc_combined;
295
296         if (!data)
297                 return;
298
299         mutex_lock(&priv->state_lock);
300         if (test_bit(MLX5E_STATE_OPENED, &priv->state))
301                 mlx5e_update_stats(priv);
302         mutex_unlock(&priv->state_lock);
303
304         for (i = 0; i < NUM_SW_COUNTERS; i++)
305                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
306                                                    sw_stats_desc, i);
307
308         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
309                 data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
310                                                    q_stats_desc, i);
311
312         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
313                 data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
314                                                   vport_stats_desc, i);
315
316         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
317                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
318                                                   pport_802_3_stats_desc, i);
319
320         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
321                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
322                                                   pport_2863_stats_desc, i);
323
324         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
325                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
326                                                   pport_2819_stats_desc, i);
327
328         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
329                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
330                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
331                                                  pport_per_prio_traffic_stats_desc, i);
332         }
333
334         pfc_combined = mlx5e_query_pfc_combined(priv);
335         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
336                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
337                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
338                                                           pport_per_prio_pfc_stats_desc, i);
339                 }
340         }
341
342         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
343                 return;
344
345         /* per channel counters */
346         for (i = 0; i < priv->params.num_channels; i++)
347                 for (j = 0; j < NUM_RQ_STATS; j++)
348                         data[idx++] =
349                                MLX5E_READ_CTR64_CPU(&priv->channel[i]->rq.stats,
350                                                     rq_stats_desc, j);
351
352         for (tc = 0; tc < priv->params.num_tc; tc++)
353                 for (i = 0; i < priv->params.num_channels; i++)
354                         for (j = 0; j < NUM_SQ_STATS; j++)
355                                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->channel[i]->sq[tc].stats,
356                                                                    sq_stats_desc, j);
357 }
358
359 static void mlx5e_get_ringparam(struct net_device *dev,
360                                 struct ethtool_ringparam *param)
361 {
362         struct mlx5e_priv *priv = netdev_priv(dev);
363         int rq_wq_type = priv->params.rq_wq_type;
364
365         param->rx_max_pending = 1 << mlx5_max_log_rq_size(rq_wq_type);
366         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
367         param->rx_pending     = 1 << priv->params.log_rq_size;
368         param->tx_pending     = 1 << priv->params.log_sq_size;
369 }
370
371 static int mlx5e_set_ringparam(struct net_device *dev,
372                                struct ethtool_ringparam *param)
373 {
374         struct mlx5e_priv *priv = netdev_priv(dev);
375         bool was_opened;
376         int rq_wq_type = priv->params.rq_wq_type;
377         u16 min_rx_wqes;
378         u8 log_rq_size;
379         u8 log_sq_size;
380         int err = 0;
381
382         if (param->rx_jumbo_pending) {
383                 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
384                             __func__);
385                 return -EINVAL;
386         }
387         if (param->rx_mini_pending) {
388                 netdev_info(dev, "%s: rx_mini_pending not supported\n",
389                             __func__);
390                 return -EINVAL;
391         }
392         if (param->rx_pending < (1 << mlx5_min_log_rq_size(rq_wq_type))) {
393                 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
394                             __func__, param->rx_pending,
395                             1 << mlx5_min_log_rq_size(rq_wq_type));
396                 return -EINVAL;
397         }
398         if (param->rx_pending > (1 << mlx5_max_log_rq_size(rq_wq_type))) {
399                 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
400                             __func__, param->rx_pending,
401                             1 << mlx5_max_log_rq_size(rq_wq_type));
402                 return -EINVAL;
403         }
404         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
405                 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
406                             __func__, param->tx_pending,
407                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
408                 return -EINVAL;
409         }
410         if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
411                 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
412                             __func__, param->tx_pending,
413                             1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
414                 return -EINVAL;
415         }
416
417         log_rq_size = order_base_2(param->rx_pending);
418         log_sq_size = order_base_2(param->tx_pending);
419         min_rx_wqes = mlx5_min_rx_wqes(rq_wq_type, param->rx_pending);
420
421         if (log_rq_size == priv->params.log_rq_size &&
422             log_sq_size == priv->params.log_sq_size &&
423             min_rx_wqes == priv->params.min_rx_wqes)
424                 return 0;
425
426         mutex_lock(&priv->state_lock);
427
428         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
429         if (was_opened)
430                 mlx5e_close_locked(dev);
431
432         priv->params.log_rq_size = log_rq_size;
433         priv->params.log_sq_size = log_sq_size;
434         priv->params.min_rx_wqes = min_rx_wqes;
435
436         if (was_opened)
437                 err = mlx5e_open_locked(dev);
438
439         mutex_unlock(&priv->state_lock);
440
441         return err;
442 }
443
444 static void mlx5e_get_channels(struct net_device *dev,
445                                struct ethtool_channels *ch)
446 {
447         struct mlx5e_priv *priv = netdev_priv(dev);
448
449         ch->max_combined   = mlx5e_get_max_num_channels(priv->mdev);
450         ch->combined_count = priv->params.num_channels;
451 }
452
453 static int mlx5e_set_channels(struct net_device *dev,
454                               struct ethtool_channels *ch)
455 {
456         struct mlx5e_priv *priv = netdev_priv(dev);
457         int ncv = mlx5e_get_max_num_channels(priv->mdev);
458         unsigned int count = ch->combined_count;
459         bool was_opened;
460         int err = 0;
461
462         if (!count) {
463                 netdev_info(dev, "%s: combined_count=0 not supported\n",
464                             __func__);
465                 return -EINVAL;
466         }
467         if (ch->rx_count || ch->tx_count) {
468                 netdev_info(dev, "%s: separate rx/tx count not supported\n",
469                             __func__);
470                 return -EINVAL;
471         }
472         if (count > ncv) {
473                 netdev_info(dev, "%s: count (%d) > max (%d)\n",
474                             __func__, count, ncv);
475                 return -EINVAL;
476         }
477
478         if (priv->params.num_channels == count)
479                 return 0;
480
481         mutex_lock(&priv->state_lock);
482
483         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
484         if (was_opened)
485                 mlx5e_close_locked(dev);
486
487         priv->params.num_channels = count;
488         mlx5e_build_default_indir_rqt(priv->mdev, priv->params.indirection_rqt,
489                                       MLX5E_INDIR_RQT_SIZE, count);
490
491         if (was_opened)
492                 err = mlx5e_open_locked(dev);
493
494         mutex_unlock(&priv->state_lock);
495
496         return err;
497 }
498
499 static int mlx5e_get_coalesce(struct net_device *netdev,
500                               struct ethtool_coalesce *coal)
501 {
502         struct mlx5e_priv *priv = netdev_priv(netdev);
503
504         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
505                 return -ENOTSUPP;
506
507         coal->rx_coalesce_usecs       = priv->params.rx_cq_moderation_usec;
508         coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation_pkts;
509         coal->tx_coalesce_usecs       = priv->params.tx_cq_moderation_usec;
510         coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation_pkts;
511
512         return 0;
513 }
514
515 static int mlx5e_set_coalesce(struct net_device *netdev,
516                               struct ethtool_coalesce *coal)
517 {
518         struct mlx5e_priv *priv    = netdev_priv(netdev);
519         struct mlx5_core_dev *mdev = priv->mdev;
520         struct mlx5e_channel *c;
521         int tc;
522         int i;
523
524         if (!MLX5_CAP_GEN(mdev, cq_moderation))
525                 return -ENOTSUPP;
526
527         mutex_lock(&priv->state_lock);
528         priv->params.tx_cq_moderation_usec = coal->tx_coalesce_usecs;
529         priv->params.tx_cq_moderation_pkts = coal->tx_max_coalesced_frames;
530         priv->params.rx_cq_moderation_usec = coal->rx_coalesce_usecs;
531         priv->params.rx_cq_moderation_pkts = coal->rx_max_coalesced_frames;
532
533         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
534                 goto out;
535
536         for (i = 0; i < priv->params.num_channels; ++i) {
537                 c = priv->channel[i];
538
539                 for (tc = 0; tc < c->num_tc; tc++) {
540                         mlx5_core_modify_cq_moderation(mdev,
541                                                 &c->sq[tc].cq.mcq,
542                                                 coal->tx_coalesce_usecs,
543                                                 coal->tx_max_coalesced_frames);
544                 }
545
546                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
547                                                coal->rx_coalesce_usecs,
548                                                coal->rx_max_coalesced_frames);
549         }
550
551 out:
552         mutex_unlock(&priv->state_lock);
553         return 0;
554 }
555
556 static u32 ptys2ethtool_supported_link(u32 eth_proto_cap)
557 {
558         int i;
559         u32 supported_modes = 0;
560
561         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
562                 if (eth_proto_cap & MLX5E_PROT_MASK(i))
563                         supported_modes |= ptys2ethtool_table[i].supported;
564         }
565         return supported_modes;
566 }
567
568 static u32 ptys2ethtool_adver_link(u32 eth_proto_cap)
569 {
570         int i;
571         u32 advertising_modes = 0;
572
573         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
574                 if (eth_proto_cap & MLX5E_PROT_MASK(i))
575                         advertising_modes |= ptys2ethtool_table[i].advertised;
576         }
577         return advertising_modes;
578 }
579
580 static u32 ptys2ethtool_supported_port(u32 eth_proto_cap)
581 {
582         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
583                            | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
584                            | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
585                            | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
586                            | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
587                            | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
588                 return SUPPORTED_FIBRE;
589         }
590
591         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
592                            | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
593                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
594                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
595                            | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
596                 return SUPPORTED_Backplane;
597         }
598         return 0;
599 }
600
601 static void get_speed_duplex(struct net_device *netdev,
602                              u32 eth_proto_oper,
603                              struct ethtool_cmd *cmd)
604 {
605         int i;
606         u32 speed = SPEED_UNKNOWN;
607         u8 duplex = DUPLEX_UNKNOWN;
608
609         if (!netif_carrier_ok(netdev))
610                 goto out;
611
612         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
613                 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
614                         speed = ptys2ethtool_table[i].speed;
615                         duplex = DUPLEX_FULL;
616                         break;
617                 }
618         }
619 out:
620         ethtool_cmd_speed_set(cmd, speed);
621         cmd->duplex = duplex;
622 }
623
624 static void get_supported(u32 eth_proto_cap, u32 *supported)
625 {
626         *supported |= ptys2ethtool_supported_port(eth_proto_cap);
627         *supported |= ptys2ethtool_supported_link(eth_proto_cap);
628         *supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
629 }
630
631 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
632                             u8 rx_pause, u32 *advertising)
633 {
634         *advertising |= ptys2ethtool_adver_link(eth_proto_cap);
635         *advertising |= tx_pause ? ADVERTISED_Pause : 0;
636         *advertising |= (tx_pause ^ rx_pause) ? ADVERTISED_Asym_Pause : 0;
637 }
638
639 static u8 get_connector_port(u32 eth_proto)
640 {
641         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
642                          | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
643                          | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
644                          | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
645                         return PORT_FIBRE;
646         }
647
648         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
649                          | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
650                          | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
651                         return PORT_DA;
652         }
653
654         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
655                          | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
656                          | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
657                          | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
658                         return PORT_NONE;
659         }
660
661         return PORT_OTHER;
662 }
663
664 static void get_lp_advertising(u32 eth_proto_lp, u32 *lp_advertising)
665 {
666         *lp_advertising = ptys2ethtool_adver_link(eth_proto_lp);
667 }
668
669 static int mlx5e_get_settings(struct net_device *netdev,
670                               struct ethtool_cmd *cmd)
671 {
672         struct mlx5e_priv *priv    = netdev_priv(netdev);
673         struct mlx5_core_dev *mdev = priv->mdev;
674         u32 out[MLX5_ST_SZ_DW(ptys_reg)];
675         u32 eth_proto_cap;
676         u32 eth_proto_admin;
677         u32 eth_proto_lp;
678         u32 eth_proto_oper;
679         int err;
680
681         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
682
683         if (err) {
684                 netdev_err(netdev, "%s: query port ptys failed: %d\n",
685                            __func__, err);
686                 goto err_query_ptys;
687         }
688
689         eth_proto_cap   = MLX5_GET(ptys_reg, out, eth_proto_capability);
690         eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
691         eth_proto_oper  = MLX5_GET(ptys_reg, out, eth_proto_oper);
692         eth_proto_lp    = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
693
694         cmd->supported   = 0;
695         cmd->advertising = 0;
696
697         get_supported(eth_proto_cap, &cmd->supported);
698         get_advertising(eth_proto_admin, 0, 0, &cmd->advertising);
699         get_speed_duplex(netdev, eth_proto_oper, cmd);
700
701         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
702
703         cmd->port = get_connector_port(eth_proto_oper);
704         get_lp_advertising(eth_proto_lp, &cmd->lp_advertising);
705
706         cmd->transceiver = XCVR_INTERNAL;
707
708 err_query_ptys:
709         return err;
710 }
711
712 static u32 mlx5e_ethtool2ptys_adver_link(u32 link_modes)
713 {
714         u32 i, ptys_modes = 0;
715
716         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
717                 if (ptys2ethtool_table[i].advertised & link_modes)
718                         ptys_modes |= MLX5E_PROT_MASK(i);
719         }
720
721         return ptys_modes;
722 }
723
724 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
725 {
726         u32 i, speed_links = 0;
727
728         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
729                 if (ptys2ethtool_table[i].speed == speed)
730                         speed_links |= MLX5E_PROT_MASK(i);
731         }
732
733         return speed_links;
734 }
735
736 static int mlx5e_set_settings(struct net_device *netdev,
737                               struct ethtool_cmd *cmd)
738 {
739         struct mlx5e_priv *priv    = netdev_priv(netdev);
740         struct mlx5_core_dev *mdev = priv->mdev;
741         u32 link_modes;
742         u32 speed;
743         u32 eth_proto_cap, eth_proto_admin;
744         enum mlx5_port_status ps;
745         int err;
746
747         speed = ethtool_cmd_speed(cmd);
748
749         link_modes = cmd->autoneg == AUTONEG_ENABLE ?
750                 mlx5e_ethtool2ptys_adver_link(cmd->advertising) :
751                 mlx5e_ethtool2ptys_speed_link(speed);
752
753         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
754         if (err) {
755                 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
756                            __func__, err);
757                 goto out;
758         }
759
760         link_modes = link_modes & eth_proto_cap;
761         if (!link_modes) {
762                 netdev_err(netdev, "%s: Not supported link mode(s) requested",
763                            __func__);
764                 err = -EINVAL;
765                 goto out;
766         }
767
768         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
769         if (err) {
770                 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
771                            __func__, err);
772                 goto out;
773         }
774
775         if (link_modes == eth_proto_admin)
776                 goto out;
777
778         mlx5_query_port_admin_status(mdev, &ps);
779         if (ps == MLX5_PORT_UP)
780                 mlx5_set_port_admin_status(mdev, MLX5_PORT_DOWN);
781         mlx5_set_port_proto(mdev, link_modes, MLX5_PTYS_EN);
782         if (ps == MLX5_PORT_UP)
783                 mlx5_set_port_admin_status(mdev, MLX5_PORT_UP);
784
785 out:
786         return err;
787 }
788
789 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
790 {
791         struct mlx5e_priv *priv = netdev_priv(netdev);
792
793         return sizeof(priv->params.toeplitz_hash_key);
794 }
795
796 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
797 {
798         return MLX5E_INDIR_RQT_SIZE;
799 }
800
801 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
802                           u8 *hfunc)
803 {
804         struct mlx5e_priv *priv = netdev_priv(netdev);
805
806         if (indir)
807                 memcpy(indir, priv->params.indirection_rqt,
808                        sizeof(priv->params.indirection_rqt));
809
810         if (key)
811                 memcpy(key, priv->params.toeplitz_hash_key,
812                        sizeof(priv->params.toeplitz_hash_key));
813
814         if (hfunc)
815                 *hfunc = priv->params.rss_hfunc;
816
817         return 0;
818 }
819
820 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
821 {
822         struct mlx5_core_dev *mdev = priv->mdev;
823         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
824         int i;
825
826         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
827         mlx5e_build_tir_ctx_hash(tirc, priv);
828
829         for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
830                 mlx5_core_modify_tir(mdev, priv->indir_tirn[i], in, inlen);
831 }
832
833 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
834                           const u8 *key, const u8 hfunc)
835 {
836         struct mlx5e_priv *priv = netdev_priv(dev);
837         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
838         void *in;
839
840         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
841             (hfunc != ETH_RSS_HASH_XOR) &&
842             (hfunc != ETH_RSS_HASH_TOP))
843                 return -EINVAL;
844
845         in = mlx5_vzalloc(inlen);
846         if (!in)
847                 return -ENOMEM;
848
849         mutex_lock(&priv->state_lock);
850
851         if (indir) {
852                 u32 rqtn = priv->indir_rqtn;
853
854                 memcpy(priv->params.indirection_rqt, indir,
855                        sizeof(priv->params.indirection_rqt));
856                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0);
857         }
858
859         if (key)
860                 memcpy(priv->params.toeplitz_hash_key, key,
861                        sizeof(priv->params.toeplitz_hash_key));
862
863         if (hfunc != ETH_RSS_HASH_NO_CHANGE)
864                 priv->params.rss_hfunc = hfunc;
865
866         mlx5e_modify_tirs_hash(priv, in, inlen);
867
868         mutex_unlock(&priv->state_lock);
869
870         kvfree(in);
871
872         return 0;
873 }
874
875 static int mlx5e_get_rxnfc(struct net_device *netdev,
876                            struct ethtool_rxnfc *info, u32 *rule_locs)
877 {
878         struct mlx5e_priv *priv = netdev_priv(netdev);
879         int err = 0;
880
881         switch (info->cmd) {
882         case ETHTOOL_GRXRINGS:
883                 info->data = priv->params.num_channels;
884                 break;
885         default:
886                 err = -EOPNOTSUPP;
887                 break;
888         }
889
890         return err;
891 }
892
893 static int mlx5e_get_tunable(struct net_device *dev,
894                              const struct ethtool_tunable *tuna,
895                              void *data)
896 {
897         const struct mlx5e_priv *priv = netdev_priv(dev);
898         int err = 0;
899
900         switch (tuna->id) {
901         case ETHTOOL_TX_COPYBREAK:
902                 *(u32 *)data = priv->params.tx_max_inline;
903                 break;
904         default:
905                 err = -EINVAL;
906                 break;
907         }
908
909         return err;
910 }
911
912 static int mlx5e_set_tunable(struct net_device *dev,
913                              const struct ethtool_tunable *tuna,
914                              const void *data)
915 {
916         struct mlx5e_priv *priv = netdev_priv(dev);
917         struct mlx5_core_dev *mdev = priv->mdev;
918         bool was_opened;
919         u32 val;
920         int err = 0;
921
922         switch (tuna->id) {
923         case ETHTOOL_TX_COPYBREAK:
924                 val = *(u32 *)data;
925                 if (val > mlx5e_get_max_inline_cap(mdev)) {
926                         err = -EINVAL;
927                         break;
928                 }
929
930                 mutex_lock(&priv->state_lock);
931
932                 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
933                 if (was_opened)
934                         mlx5e_close_locked(dev);
935
936                 priv->params.tx_max_inline = val;
937
938                 if (was_opened)
939                         err = mlx5e_open_locked(dev);
940
941                 mutex_unlock(&priv->state_lock);
942                 break;
943         default:
944                 err = -EINVAL;
945                 break;
946         }
947
948         return err;
949 }
950
951 static void mlx5e_get_pauseparam(struct net_device *netdev,
952                                  struct ethtool_pauseparam *pauseparam)
953 {
954         struct mlx5e_priv *priv    = netdev_priv(netdev);
955         struct mlx5_core_dev *mdev = priv->mdev;
956         int err;
957
958         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
959                                     &pauseparam->tx_pause);
960         if (err) {
961                 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
962                            __func__, err);
963         }
964 }
965
966 static int mlx5e_set_pauseparam(struct net_device *netdev,
967                                 struct ethtool_pauseparam *pauseparam)
968 {
969         struct mlx5e_priv *priv    = netdev_priv(netdev);
970         struct mlx5_core_dev *mdev = priv->mdev;
971         int err;
972
973         if (pauseparam->autoneg)
974                 return -EINVAL;
975
976         err = mlx5_set_port_pause(mdev,
977                                   pauseparam->rx_pause ? 1 : 0,
978                                   pauseparam->tx_pause ? 1 : 0);
979         if (err) {
980                 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
981                            __func__, err);
982         }
983
984         return err;
985 }
986
987 static int mlx5e_get_ts_info(struct net_device *dev,
988                              struct ethtool_ts_info *info)
989 {
990         struct mlx5e_priv *priv = netdev_priv(dev);
991         int ret;
992
993         ret = ethtool_op_get_ts_info(dev, info);
994         if (ret)
995                 return ret;
996
997         info->phc_index = priv->tstamp.ptp ?
998                           ptp_clock_index(priv->tstamp.ptp) : -1;
999
1000         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1001                 return 0;
1002
1003         info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1004                                  SOF_TIMESTAMPING_RX_HARDWARE |
1005                                  SOF_TIMESTAMPING_RAW_HARDWARE;
1006
1007         info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |
1008                          (BIT(1) << HWTSTAMP_TX_ON);
1009
1010         info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |
1011                            (BIT(1) << HWTSTAMP_FILTER_ALL);
1012
1013         return 0;
1014 }
1015
1016 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1017 {
1018         __u32 ret = 0;
1019
1020         if (MLX5_CAP_GEN(mdev, wol_g))
1021                 ret |= WAKE_MAGIC;
1022
1023         if (MLX5_CAP_GEN(mdev, wol_s))
1024                 ret |= WAKE_MAGICSECURE;
1025
1026         if (MLX5_CAP_GEN(mdev, wol_a))
1027                 ret |= WAKE_ARP;
1028
1029         if (MLX5_CAP_GEN(mdev, wol_b))
1030                 ret |= WAKE_BCAST;
1031
1032         if (MLX5_CAP_GEN(mdev, wol_m))
1033                 ret |= WAKE_MCAST;
1034
1035         if (MLX5_CAP_GEN(mdev, wol_u))
1036                 ret |= WAKE_UCAST;
1037
1038         if (MLX5_CAP_GEN(mdev, wol_p))
1039                 ret |= WAKE_PHY;
1040
1041         return ret;
1042 }
1043
1044 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1045 {
1046         __u32 ret = 0;
1047
1048         if (mode & MLX5_WOL_MAGIC)
1049                 ret |= WAKE_MAGIC;
1050
1051         if (mode & MLX5_WOL_SECURED_MAGIC)
1052                 ret |= WAKE_MAGICSECURE;
1053
1054         if (mode & MLX5_WOL_ARP)
1055                 ret |= WAKE_ARP;
1056
1057         if (mode & MLX5_WOL_BROADCAST)
1058                 ret |= WAKE_BCAST;
1059
1060         if (mode & MLX5_WOL_MULTICAST)
1061                 ret |= WAKE_MCAST;
1062
1063         if (mode & MLX5_WOL_UNICAST)
1064                 ret |= WAKE_UCAST;
1065
1066         if (mode & MLX5_WOL_PHY_ACTIVITY)
1067                 ret |= WAKE_PHY;
1068
1069         return ret;
1070 }
1071
1072 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1073 {
1074         u8 ret = 0;
1075
1076         if (mode & WAKE_MAGIC)
1077                 ret |= MLX5_WOL_MAGIC;
1078
1079         if (mode & WAKE_MAGICSECURE)
1080                 ret |= MLX5_WOL_SECURED_MAGIC;
1081
1082         if (mode & WAKE_ARP)
1083                 ret |= MLX5_WOL_ARP;
1084
1085         if (mode & WAKE_BCAST)
1086                 ret |= MLX5_WOL_BROADCAST;
1087
1088         if (mode & WAKE_MCAST)
1089                 ret |= MLX5_WOL_MULTICAST;
1090
1091         if (mode & WAKE_UCAST)
1092                 ret |= MLX5_WOL_UNICAST;
1093
1094         if (mode & WAKE_PHY)
1095                 ret |= MLX5_WOL_PHY_ACTIVITY;
1096
1097         return ret;
1098 }
1099
1100 static void mlx5e_get_wol(struct net_device *netdev,
1101                           struct ethtool_wolinfo *wol)
1102 {
1103         struct mlx5e_priv *priv = netdev_priv(netdev);
1104         struct mlx5_core_dev *mdev = priv->mdev;
1105         u8 mlx5_wol_mode;
1106         int err;
1107
1108         memset(wol, 0, sizeof(*wol));
1109
1110         wol->supported = mlx5e_get_wol_supported(mdev);
1111         if (!wol->supported)
1112                 return;
1113
1114         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1115         if (err)
1116                 return;
1117
1118         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1119 }
1120
1121 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1122 {
1123         struct mlx5e_priv *priv = netdev_priv(netdev);
1124         struct mlx5_core_dev *mdev = priv->mdev;
1125         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1126         u32 mlx5_wol_mode;
1127
1128         if (!wol_supported)
1129                 return -ENOTSUPP;
1130
1131         if (wol->wolopts & ~wol_supported)
1132                 return -EINVAL;
1133
1134         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1135
1136         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1137 }
1138
1139 static int mlx5e_set_phys_id(struct net_device *dev,
1140                              enum ethtool_phys_id_state state)
1141 {
1142         struct mlx5e_priv *priv = netdev_priv(dev);
1143         struct mlx5_core_dev *mdev = priv->mdev;
1144         u16 beacon_duration;
1145
1146         if (!MLX5_CAP_GEN(mdev, beacon_led))
1147                 return -EOPNOTSUPP;
1148
1149         switch (state) {
1150         case ETHTOOL_ID_ACTIVE:
1151                 beacon_duration = MLX5_BEACON_DURATION_INF;
1152                 break;
1153         case ETHTOOL_ID_INACTIVE:
1154                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1155                 break;
1156         default:
1157                 return -EOPNOTSUPP;
1158         }
1159
1160         return mlx5_set_port_beacon(mdev, beacon_duration);
1161 }
1162
1163 static int mlx5e_get_module_info(struct net_device *netdev,
1164                                  struct ethtool_modinfo *modinfo)
1165 {
1166         struct mlx5e_priv *priv = netdev_priv(netdev);
1167         struct mlx5_core_dev *dev = priv->mdev;
1168         int size_read = 0;
1169         u8 data[4];
1170
1171         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1172         if (size_read < 2)
1173                 return -EIO;
1174
1175         /* data[0] = identifier byte */
1176         switch (data[0]) {
1177         case MLX5_MODULE_ID_QSFP:
1178                 modinfo->type       = ETH_MODULE_SFF_8436;
1179                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1180                 break;
1181         case MLX5_MODULE_ID_QSFP_PLUS:
1182         case MLX5_MODULE_ID_QSFP28:
1183                 /* data[1] = revision id */
1184                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1185                         modinfo->type       = ETH_MODULE_SFF_8636;
1186                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1187                 } else {
1188                         modinfo->type       = ETH_MODULE_SFF_8436;
1189                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1190                 }
1191                 break;
1192         case MLX5_MODULE_ID_SFP:
1193                 modinfo->type       = ETH_MODULE_SFF_8472;
1194                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1195                 break;
1196         default:
1197                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1198                            __func__, data[0]);
1199                 return -EINVAL;
1200         }
1201
1202         return 0;
1203 }
1204
1205 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1206                                    struct ethtool_eeprom *ee,
1207                                    u8 *data)
1208 {
1209         struct mlx5e_priv *priv = netdev_priv(netdev);
1210         struct mlx5_core_dev *mdev = priv->mdev;
1211         int offset = ee->offset;
1212         int size_read;
1213         int i = 0;
1214
1215         if (!ee->len)
1216                 return -EINVAL;
1217
1218         memset(data, 0, ee->len);
1219
1220         while (i < ee->len) {
1221                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1222                                                      data + i);
1223
1224                 if (!size_read)
1225                         /* Done reading */
1226                         return 0;
1227
1228                 if (size_read < 0) {
1229                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1230                                    __func__, size_read);
1231                         return 0;
1232                 }
1233
1234                 i += size_read;
1235                 offset += size_read;
1236         }
1237
1238         return 0;
1239 }
1240
1241 const struct ethtool_ops mlx5e_ethtool_ops = {
1242         .get_drvinfo       = mlx5e_get_drvinfo,
1243         .get_link          = ethtool_op_get_link,
1244         .get_strings       = mlx5e_get_strings,
1245         .get_sset_count    = mlx5e_get_sset_count,
1246         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1247         .get_ringparam     = mlx5e_get_ringparam,
1248         .set_ringparam     = mlx5e_set_ringparam,
1249         .get_channels      = mlx5e_get_channels,
1250         .set_channels      = mlx5e_set_channels,
1251         .get_coalesce      = mlx5e_get_coalesce,
1252         .set_coalesce      = mlx5e_set_coalesce,
1253         .get_settings      = mlx5e_get_settings,
1254         .set_settings      = mlx5e_set_settings,
1255         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1256         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1257         .get_rxfh          = mlx5e_get_rxfh,
1258         .set_rxfh          = mlx5e_set_rxfh,
1259         .get_rxnfc         = mlx5e_get_rxnfc,
1260         .get_tunable       = mlx5e_get_tunable,
1261         .set_tunable       = mlx5e_set_tunable,
1262         .get_pauseparam    = mlx5e_get_pauseparam,
1263         .set_pauseparam    = mlx5e_set_pauseparam,
1264         .get_ts_info       = mlx5e_get_ts_info,
1265         .set_phys_id       = mlx5e_set_phys_id,
1266         .get_wol           = mlx5e_get_wol,
1267         .set_wol           = mlx5e_set_wol,
1268         .get_module_info   = mlx5e_get_module_info,
1269         .get_module_eeprom = mlx5e_get_module_eeprom,
1270 };