mlxsw: core: Use devm_kzalloc to allocate mlxsw_hwmon structure
[cascardo/linux.git] / drivers / net / ethernet / mellanox / mlxsw / core.c
1 /*
2  * drivers/net/ethernet/mellanox/mlxsw/core.c
3  * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4  * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5  * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6  * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. Neither the names of the copyright holders nor the names of its
17  *    contributors may be used to endorse or promote products derived from
18  *    this software without specific prior written permission.
19  *
20  * Alternatively, this software may be distributed under the terms of the
21  * GNU General Public License ("GPL") version 2 as published by the Free
22  * Software Foundation.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34  * POSSIBILITY OF SUCH DAMAGE.
35  */
36
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/device.h>
40 #include <linux/export.h>
41 #include <linux/err.h>
42 #include <linux/if_link.h>
43 #include <linux/debugfs.h>
44 #include <linux/seq_file.h>
45 #include <linux/u64_stats_sync.h>
46 #include <linux/netdevice.h>
47 #include <linux/wait.h>
48 #include <linux/skbuff.h>
49 #include <linux/etherdevice.h>
50 #include <linux/types.h>
51 #include <linux/string.h>
52 #include <linux/gfp.h>
53 #include <linux/random.h>
54 #include <linux/jiffies.h>
55 #include <linux/mutex.h>
56 #include <linux/rcupdate.h>
57 #include <linux/slab.h>
58 #include <asm/byteorder.h>
59
60 #include "core.h"
61 #include "item.h"
62 #include "cmd.h"
63 #include "port.h"
64 #include "trap.h"
65 #include "emad.h"
66 #include "reg.h"
67
68 static LIST_HEAD(mlxsw_core_driver_list);
69 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
70
71 static const char mlxsw_core_driver_name[] = "mlxsw_core";
72
73 static struct dentry *mlxsw_core_dbg_root;
74
75 struct mlxsw_core_pcpu_stats {
76         u64                     trap_rx_packets[MLXSW_TRAP_ID_MAX];
77         u64                     trap_rx_bytes[MLXSW_TRAP_ID_MAX];
78         u64                     port_rx_packets[MLXSW_PORT_MAX_PORTS];
79         u64                     port_rx_bytes[MLXSW_PORT_MAX_PORTS];
80         struct u64_stats_sync   syncp;
81         u32                     trap_rx_dropped[MLXSW_TRAP_ID_MAX];
82         u32                     port_rx_dropped[MLXSW_PORT_MAX_PORTS];
83         u32                     trap_rx_invalid;
84         u32                     port_rx_invalid;
85 };
86
87 struct mlxsw_core {
88         struct mlxsw_driver *driver;
89         const struct mlxsw_bus *bus;
90         void *bus_priv;
91         const struct mlxsw_bus_info *bus_info;
92         struct list_head rx_listener_list;
93         struct list_head event_listener_list;
94         struct {
95                 struct sk_buff *resp_skb;
96                 u64 tid;
97                 wait_queue_head_t wait;
98                 bool trans_active;
99                 struct mutex lock; /* One EMAD transaction at a time. */
100                 bool use_emad;
101         } emad;
102         struct mlxsw_core_pcpu_stats __percpu *pcpu_stats;
103         struct dentry *dbg_dir;
104         struct {
105                 struct debugfs_blob_wrapper vsd_blob;
106                 struct debugfs_blob_wrapper psid_blob;
107         } dbg;
108         struct {
109                 u8 *mapping; /* lag_id+port_index to local_port mapping */
110         } lag;
111         struct mlxsw_hwmon *hwmon;
112         unsigned long driver_priv[0];
113         /* driver_priv has to be always the last item */
114 };
115
116 struct mlxsw_rx_listener_item {
117         struct list_head list;
118         struct mlxsw_rx_listener rxl;
119         void *priv;
120 };
121
122 struct mlxsw_event_listener_item {
123         struct list_head list;
124         struct mlxsw_event_listener el;
125         void *priv;
126 };
127
128 /******************
129  * EMAD processing
130  ******************/
131
132 /* emad_eth_hdr_dmac
133  * Destination MAC in EMAD's Ethernet header.
134  * Must be set to 01:02:c9:00:00:01
135  */
136 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
137
138 /* emad_eth_hdr_smac
139  * Source MAC in EMAD's Ethernet header.
140  * Must be set to 00:02:c9:01:02:03
141  */
142 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
143
144 /* emad_eth_hdr_ethertype
145  * Ethertype in EMAD's Ethernet header.
146  * Must be set to 0x8932
147  */
148 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
149
150 /* emad_eth_hdr_mlx_proto
151  * Mellanox protocol.
152  * Must be set to 0x0.
153  */
154 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
155
156 /* emad_eth_hdr_ver
157  * Mellanox protocol version.
158  * Must be set to 0x0.
159  */
160 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
161
162 /* emad_op_tlv_type
163  * Type of the TLV.
164  * Must be set to 0x1 (operation TLV).
165  */
166 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
167
168 /* emad_op_tlv_len
169  * Length of the operation TLV in u32.
170  * Must be set to 0x4.
171  */
172 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
173
174 /* emad_op_tlv_dr
175  * Direct route bit. Setting to 1 indicates the EMAD is a direct route
176  * EMAD. DR TLV must follow.
177  *
178  * Note: Currently not supported and must not be set.
179  */
180 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
181
182 /* emad_op_tlv_status
183  * Returned status in case of EMAD response. Must be set to 0 in case
184  * of EMAD request.
185  * 0x0 - success
186  * 0x1 - device is busy. Requester should retry
187  * 0x2 - Mellanox protocol version not supported
188  * 0x3 - unknown TLV
189  * 0x4 - register not supported
190  * 0x5 - operation class not supported
191  * 0x6 - EMAD method not supported
192  * 0x7 - bad parameter (e.g. port out of range)
193  * 0x8 - resource not available
194  * 0x9 - message receipt acknowledgment. Requester should retry
195  * 0x70 - internal error
196  */
197 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
198
199 /* emad_op_tlv_register_id
200  * Register ID of register within register TLV.
201  */
202 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
203
204 /* emad_op_tlv_r
205  * Response bit. Setting to 1 indicates Response, otherwise request.
206  */
207 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
208
209 /* emad_op_tlv_method
210  * EMAD method type.
211  * 0x1 - query
212  * 0x2 - write
213  * 0x3 - send (currently not supported)
214  * 0x4 - event
215  */
216 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
217
218 /* emad_op_tlv_class
219  * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
220  */
221 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
222
223 /* emad_op_tlv_tid
224  * EMAD transaction ID. Used for pairing request and response EMADs.
225  */
226 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
227
228 /* emad_reg_tlv_type
229  * Type of the TLV.
230  * Must be set to 0x3 (register TLV).
231  */
232 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
233
234 /* emad_reg_tlv_len
235  * Length of the operation TLV in u32.
236  */
237 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
238
239 /* emad_end_tlv_type
240  * Type of the TLV.
241  * Must be set to 0x0 (end TLV).
242  */
243 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
244
245 /* emad_end_tlv_len
246  * Length of the end TLV in u32.
247  * Must be set to 1.
248  */
249 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
250
251 enum mlxsw_core_reg_access_type {
252         MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
253         MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
254 };
255
256 static inline const char *
257 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
258 {
259         switch (type) {
260         case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
261                 return "query";
262         case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
263                 return "write";
264         }
265         BUG();
266 }
267
268 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
269 {
270         mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
271         mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
272 }
273
274 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
275                                     const struct mlxsw_reg_info *reg,
276                                     char *payload)
277 {
278         mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
279         mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
280         memcpy(reg_tlv + sizeof(u32), payload, reg->len);
281 }
282
283 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
284                                    const struct mlxsw_reg_info *reg,
285                                    enum mlxsw_core_reg_access_type type,
286                                    struct mlxsw_core *mlxsw_core)
287 {
288         mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
289         mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
290         mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
291         mlxsw_emad_op_tlv_status_set(op_tlv, 0);
292         mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
293         mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
294         if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
295                 mlxsw_emad_op_tlv_method_set(op_tlv,
296                                              MLXSW_EMAD_OP_TLV_METHOD_QUERY);
297         else
298                 mlxsw_emad_op_tlv_method_set(op_tlv,
299                                              MLXSW_EMAD_OP_TLV_METHOD_WRITE);
300         mlxsw_emad_op_tlv_class_set(op_tlv,
301                                     MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
302         mlxsw_emad_op_tlv_tid_set(op_tlv, mlxsw_core->emad.tid);
303 }
304
305 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
306 {
307         char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
308
309         mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
310         mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
311         mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
312         mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
313         mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
314
315         skb_reset_mac_header(skb);
316
317         return 0;
318 }
319
320 static void mlxsw_emad_construct(struct sk_buff *skb,
321                                  const struct mlxsw_reg_info *reg,
322                                  char *payload,
323                                  enum mlxsw_core_reg_access_type type,
324                                  struct mlxsw_core *mlxsw_core)
325 {
326         char *buf;
327
328         buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
329         mlxsw_emad_pack_end_tlv(buf);
330
331         buf = skb_push(skb, reg->len + sizeof(u32));
332         mlxsw_emad_pack_reg_tlv(buf, reg, payload);
333
334         buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
335         mlxsw_emad_pack_op_tlv(buf, reg, type, mlxsw_core);
336
337         mlxsw_emad_construct_eth_hdr(skb);
338 }
339
340 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
341 {
342         return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN));
343 }
344
345 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
346 {
347         return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN +
348                                       MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)));
349 }
350
351 static char *mlxsw_emad_reg_payload(const char *op_tlv)
352 {
353         return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
354 }
355
356 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
357 {
358         char *op_tlv;
359
360         op_tlv = mlxsw_emad_op_tlv(skb);
361         return mlxsw_emad_op_tlv_tid_get(op_tlv);
362 }
363
364 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
365 {
366         char *op_tlv;
367
368         op_tlv = mlxsw_emad_op_tlv(skb);
369         return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
370 }
371
372 #define MLXSW_EMAD_TIMEOUT_MS 200
373
374 static int __mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
375                                  struct sk_buff *skb,
376                                  const struct mlxsw_tx_info *tx_info)
377 {
378         int err;
379         int ret;
380
381         mlxsw_core->emad.trans_active = true;
382
383         err = mlxsw_core_skb_transmit(mlxsw_core->driver_priv, skb, tx_info);
384         if (err) {
385                 dev_err(mlxsw_core->bus_info->dev, "Failed to transmit EMAD (tid=%llx)\n",
386                         mlxsw_core->emad.tid);
387                 dev_kfree_skb(skb);
388                 goto trans_inactive_out;
389         }
390
391         ret = wait_event_timeout(mlxsw_core->emad.wait,
392                                  !(mlxsw_core->emad.trans_active),
393                                  msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS));
394         if (!ret) {
395                 dev_warn(mlxsw_core->bus_info->dev, "EMAD timed-out (tid=%llx)\n",
396                          mlxsw_core->emad.tid);
397                 err = -EIO;
398                 goto trans_inactive_out;
399         }
400
401         return 0;
402
403 trans_inactive_out:
404         mlxsw_core->emad.trans_active = false;
405         return err;
406 }
407
408 static int mlxsw_emad_process_status(struct mlxsw_core *mlxsw_core,
409                                      char *op_tlv)
410 {
411         enum mlxsw_emad_op_tlv_status status;
412         u64 tid;
413
414         status = mlxsw_emad_op_tlv_status_get(op_tlv);
415         tid = mlxsw_emad_op_tlv_tid_get(op_tlv);
416
417         switch (status) {
418         case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
419                 return 0;
420         case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
421         case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
422                 dev_warn(mlxsw_core->bus_info->dev, "Reg access status again (tid=%llx,status=%x(%s))\n",
423                          tid, status, mlxsw_emad_op_tlv_status_str(status));
424                 return -EAGAIN;
425         case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
426         case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
427         case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
428         case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
429         case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
430         case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
431         case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
432         case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
433         default:
434                 dev_err(mlxsw_core->bus_info->dev, "Reg access status failed (tid=%llx,status=%x(%s))\n",
435                         tid, status, mlxsw_emad_op_tlv_status_str(status));
436                 return -EIO;
437         }
438 }
439
440 static int mlxsw_emad_process_status_skb(struct mlxsw_core *mlxsw_core,
441                                          struct sk_buff *skb)
442 {
443         return mlxsw_emad_process_status(mlxsw_core, mlxsw_emad_op_tlv(skb));
444 }
445
446 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
447                                struct sk_buff *skb,
448                                const struct mlxsw_tx_info *tx_info)
449 {
450         struct sk_buff *trans_skb;
451         int n_retry;
452         int err;
453
454         n_retry = 0;
455 retry:
456         /* We copy the EMAD to a new skb, since we might need
457          * to retransmit it in case of failure.
458          */
459         trans_skb = skb_copy(skb, GFP_KERNEL);
460         if (!trans_skb) {
461                 err = -ENOMEM;
462                 goto out;
463         }
464
465         err = __mlxsw_emad_transmit(mlxsw_core, trans_skb, tx_info);
466         if (!err) {
467                 struct sk_buff *resp_skb = mlxsw_core->emad.resp_skb;
468
469                 err = mlxsw_emad_process_status_skb(mlxsw_core, resp_skb);
470                 if (err)
471                         dev_kfree_skb(resp_skb);
472                 if (!err || err != -EAGAIN)
473                         goto out;
474         }
475         if (n_retry++ < MLXSW_EMAD_MAX_RETRY)
476                 goto retry;
477
478 out:
479         dev_kfree_skb(skb);
480         mlxsw_core->emad.tid++;
481         return err;
482 }
483
484 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
485                                         void *priv)
486 {
487         struct mlxsw_core *mlxsw_core = priv;
488
489         if (mlxsw_emad_is_resp(skb) &&
490             mlxsw_core->emad.trans_active &&
491             mlxsw_emad_get_tid(skb) == mlxsw_core->emad.tid) {
492                 mlxsw_core->emad.resp_skb = skb;
493                 mlxsw_core->emad.trans_active = false;
494                 wake_up(&mlxsw_core->emad.wait);
495         } else {
496                 dev_kfree_skb(skb);
497         }
498 }
499
500 static const struct mlxsw_rx_listener mlxsw_emad_rx_listener = {
501         .func = mlxsw_emad_rx_listener_func,
502         .local_port = MLXSW_PORT_DONT_CARE,
503         .trap_id = MLXSW_TRAP_ID_ETHEMAD,
504 };
505
506 static int mlxsw_emad_traps_set(struct mlxsw_core *mlxsw_core)
507 {
508         char htgt_pl[MLXSW_REG_HTGT_LEN];
509         char hpkt_pl[MLXSW_REG_HPKT_LEN];
510         int err;
511
512         mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD);
513         err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
514         if (err)
515                 return err;
516
517         mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
518                             MLXSW_TRAP_ID_ETHEMAD);
519         return mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
520 }
521
522 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
523 {
524         int err;
525
526         /* Set the upper 32 bits of the transaction ID field to a random
527          * number. This allows us to discard EMADs addressed to other
528          * devices.
529          */
530         get_random_bytes(&mlxsw_core->emad.tid, 4);
531         mlxsw_core->emad.tid = mlxsw_core->emad.tid << 32;
532
533         init_waitqueue_head(&mlxsw_core->emad.wait);
534         mlxsw_core->emad.trans_active = false;
535         mutex_init(&mlxsw_core->emad.lock);
536
537         err = mlxsw_core_rx_listener_register(mlxsw_core,
538                                               &mlxsw_emad_rx_listener,
539                                               mlxsw_core);
540         if (err)
541                 return err;
542
543         err = mlxsw_emad_traps_set(mlxsw_core);
544         if (err)
545                 goto err_emad_trap_set;
546
547         mlxsw_core->emad.use_emad = true;
548
549         return 0;
550
551 err_emad_trap_set:
552         mlxsw_core_rx_listener_unregister(mlxsw_core,
553                                           &mlxsw_emad_rx_listener,
554                                           mlxsw_core);
555         return err;
556 }
557
558 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
559 {
560         char hpkt_pl[MLXSW_REG_HPKT_LEN];
561
562         mlxsw_core->emad.use_emad = false;
563         mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
564                             MLXSW_TRAP_ID_ETHEMAD);
565         mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
566
567         mlxsw_core_rx_listener_unregister(mlxsw_core,
568                                           &mlxsw_emad_rx_listener,
569                                           mlxsw_core);
570 }
571
572 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
573                                         u16 reg_len)
574 {
575         struct sk_buff *skb;
576         u16 emad_len;
577
578         emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
579                     (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
580                     sizeof(u32) + mlxsw_core->driver->txhdr_len);
581         if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
582                 return NULL;
583
584         skb = netdev_alloc_skb(NULL, emad_len);
585         if (!skb)
586                 return NULL;
587         memset(skb->data, 0, emad_len);
588         skb_reserve(skb, emad_len);
589
590         return skb;
591 }
592
593 /*****************
594  * Core functions
595  *****************/
596
597 static int mlxsw_core_rx_stats_dbg_read(struct seq_file *file, void *data)
598 {
599         struct mlxsw_core *mlxsw_core = file->private;
600         struct mlxsw_core_pcpu_stats *p;
601         u64 rx_packets, rx_bytes;
602         u64 tmp_rx_packets, tmp_rx_bytes;
603         u32 rx_dropped, rx_invalid;
604         unsigned int start;
605         int i;
606         int j;
607         static const char hdr[] =
608                 "     NUM   RX_PACKETS     RX_BYTES RX_DROPPED\n";
609
610         seq_printf(file, hdr);
611         for (i = 0; i < MLXSW_TRAP_ID_MAX; i++) {
612                 rx_packets = 0;
613                 rx_bytes = 0;
614                 rx_dropped = 0;
615                 for_each_possible_cpu(j) {
616                         p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
617                         do {
618                                 start = u64_stats_fetch_begin(&p->syncp);
619                                 tmp_rx_packets = p->trap_rx_packets[i];
620                                 tmp_rx_bytes = p->trap_rx_bytes[i];
621                         } while (u64_stats_fetch_retry(&p->syncp, start));
622
623                         rx_packets += tmp_rx_packets;
624                         rx_bytes += tmp_rx_bytes;
625                         rx_dropped += p->trap_rx_dropped[i];
626                 }
627                 seq_printf(file, "trap %3d %12llu %12llu %10u\n",
628                            i, rx_packets, rx_bytes, rx_dropped);
629         }
630         rx_invalid = 0;
631         for_each_possible_cpu(j) {
632                 p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
633                 rx_invalid += p->trap_rx_invalid;
634         }
635         seq_printf(file, "trap INV                           %10u\n",
636                    rx_invalid);
637
638         for (i = 0; i < MLXSW_PORT_MAX_PORTS; i++) {
639                 rx_packets = 0;
640                 rx_bytes = 0;
641                 rx_dropped = 0;
642                 for_each_possible_cpu(j) {
643                         p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
644                         do {
645                                 start = u64_stats_fetch_begin(&p->syncp);
646                                 tmp_rx_packets = p->port_rx_packets[i];
647                                 tmp_rx_bytes = p->port_rx_bytes[i];
648                         } while (u64_stats_fetch_retry(&p->syncp, start));
649
650                         rx_packets += tmp_rx_packets;
651                         rx_bytes += tmp_rx_bytes;
652                         rx_dropped += p->port_rx_dropped[i];
653                 }
654                 seq_printf(file, "port %3d %12llu %12llu %10u\n",
655                            i, rx_packets, rx_bytes, rx_dropped);
656         }
657         rx_invalid = 0;
658         for_each_possible_cpu(j) {
659                 p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
660                 rx_invalid += p->port_rx_invalid;
661         }
662         seq_printf(file, "port INV                           %10u\n",
663                    rx_invalid);
664         return 0;
665 }
666
667 static int mlxsw_core_rx_stats_dbg_open(struct inode *inode, struct file *f)
668 {
669         struct mlxsw_core *mlxsw_core = inode->i_private;
670
671         return single_open(f, mlxsw_core_rx_stats_dbg_read, mlxsw_core);
672 }
673
674 static const struct file_operations mlxsw_core_rx_stats_dbg_ops = {
675         .owner = THIS_MODULE,
676         .open = mlxsw_core_rx_stats_dbg_open,
677         .release = single_release,
678         .read = seq_read,
679         .llseek = seq_lseek
680 };
681
682 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
683                                     const char *buf, size_t size)
684 {
685         __be32 *m = (__be32 *) buf;
686         int i;
687         int count = size / sizeof(__be32);
688
689         for (i = count - 1; i >= 0; i--)
690                 if (m[i])
691                         break;
692         i++;
693         count = i ? i : 1;
694         for (i = 0; i < count; i += 4)
695                 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
696                         i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
697                         be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
698 }
699
700 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
701 {
702         spin_lock(&mlxsw_core_driver_list_lock);
703         list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
704         spin_unlock(&mlxsw_core_driver_list_lock);
705         return 0;
706 }
707 EXPORT_SYMBOL(mlxsw_core_driver_register);
708
709 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
710 {
711         spin_lock(&mlxsw_core_driver_list_lock);
712         list_del(&mlxsw_driver->list);
713         spin_unlock(&mlxsw_core_driver_list_lock);
714 }
715 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
716
717 static struct mlxsw_driver *__driver_find(const char *kind)
718 {
719         struct mlxsw_driver *mlxsw_driver;
720
721         list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
722                 if (strcmp(mlxsw_driver->kind, kind) == 0)
723                         return mlxsw_driver;
724         }
725         return NULL;
726 }
727
728 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
729 {
730         struct mlxsw_driver *mlxsw_driver;
731
732         spin_lock(&mlxsw_core_driver_list_lock);
733         mlxsw_driver = __driver_find(kind);
734         if (!mlxsw_driver) {
735                 spin_unlock(&mlxsw_core_driver_list_lock);
736                 request_module(MLXSW_MODULE_ALIAS_PREFIX "%s", kind);
737                 spin_lock(&mlxsw_core_driver_list_lock);
738                 mlxsw_driver = __driver_find(kind);
739         }
740         if (mlxsw_driver) {
741                 if (!try_module_get(mlxsw_driver->owner))
742                         mlxsw_driver = NULL;
743         }
744
745         spin_unlock(&mlxsw_core_driver_list_lock);
746         return mlxsw_driver;
747 }
748
749 static void mlxsw_core_driver_put(const char *kind)
750 {
751         struct mlxsw_driver *mlxsw_driver;
752
753         spin_lock(&mlxsw_core_driver_list_lock);
754         mlxsw_driver = __driver_find(kind);
755         spin_unlock(&mlxsw_core_driver_list_lock);
756         if (!mlxsw_driver)
757                 return;
758         module_put(mlxsw_driver->owner);
759 }
760
761 static int mlxsw_core_debugfs_init(struct mlxsw_core *mlxsw_core)
762 {
763         const struct mlxsw_bus_info *bus_info = mlxsw_core->bus_info;
764
765         mlxsw_core->dbg_dir = debugfs_create_dir(bus_info->device_name,
766                                                  mlxsw_core_dbg_root);
767         if (!mlxsw_core->dbg_dir)
768                 return -ENOMEM;
769         debugfs_create_file("rx_stats", S_IRUGO, mlxsw_core->dbg_dir,
770                             mlxsw_core, &mlxsw_core_rx_stats_dbg_ops);
771         mlxsw_core->dbg.vsd_blob.data = (void *) &bus_info->vsd;
772         mlxsw_core->dbg.vsd_blob.size = sizeof(bus_info->vsd);
773         debugfs_create_blob("vsd", S_IRUGO, mlxsw_core->dbg_dir,
774                             &mlxsw_core->dbg.vsd_blob);
775         mlxsw_core->dbg.psid_blob.data = (void *) &bus_info->psid;
776         mlxsw_core->dbg.psid_blob.size = sizeof(bus_info->psid);
777         debugfs_create_blob("psid", S_IRUGO, mlxsw_core->dbg_dir,
778                             &mlxsw_core->dbg.psid_blob);
779         return 0;
780 }
781
782 static void mlxsw_core_debugfs_fini(struct mlxsw_core *mlxsw_core)
783 {
784         debugfs_remove_recursive(mlxsw_core->dbg_dir);
785 }
786
787 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
788                                    const struct mlxsw_bus *mlxsw_bus,
789                                    void *bus_priv)
790 {
791         const char *device_kind = mlxsw_bus_info->device_kind;
792         struct mlxsw_core *mlxsw_core;
793         struct mlxsw_driver *mlxsw_driver;
794         size_t alloc_size;
795         int err;
796
797         mlxsw_driver = mlxsw_core_driver_get(device_kind);
798         if (!mlxsw_driver)
799                 return -EINVAL;
800         alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
801         mlxsw_core = kzalloc(alloc_size, GFP_KERNEL);
802         if (!mlxsw_core) {
803                 err = -ENOMEM;
804                 goto err_core_alloc;
805         }
806
807         INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
808         INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
809         mlxsw_core->driver = mlxsw_driver;
810         mlxsw_core->bus = mlxsw_bus;
811         mlxsw_core->bus_priv = bus_priv;
812         mlxsw_core->bus_info = mlxsw_bus_info;
813
814         mlxsw_core->pcpu_stats =
815                 netdev_alloc_pcpu_stats(struct mlxsw_core_pcpu_stats);
816         if (!mlxsw_core->pcpu_stats) {
817                 err = -ENOMEM;
818                 goto err_alloc_stats;
819         }
820
821         if (mlxsw_driver->profile->used_max_lag &&
822             mlxsw_driver->profile->used_max_port_per_lag) {
823                 alloc_size = sizeof(u8) * mlxsw_driver->profile->max_lag *
824                              mlxsw_driver->profile->max_port_per_lag;
825                 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
826                 if (!mlxsw_core->lag.mapping) {
827                         err = -ENOMEM;
828                         goto err_alloc_lag_mapping;
829                 }
830         }
831
832         err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile);
833         if (err)
834                 goto err_bus_init;
835
836         err = mlxsw_emad_init(mlxsw_core);
837         if (err)
838                 goto err_emad_init;
839
840         err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
841         if (err)
842                 goto err_hwmon_init;
843
844         err = mlxsw_driver->init(mlxsw_core->driver_priv, mlxsw_core,
845                                  mlxsw_bus_info);
846         if (err)
847                 goto err_driver_init;
848
849         err = mlxsw_core_debugfs_init(mlxsw_core);
850         if (err)
851                 goto err_debugfs_init;
852
853         return 0;
854
855 err_debugfs_init:
856         mlxsw_core->driver->fini(mlxsw_core->driver_priv);
857 err_driver_init:
858 err_hwmon_init:
859         mlxsw_emad_fini(mlxsw_core);
860 err_emad_init:
861         mlxsw_bus->fini(bus_priv);
862 err_bus_init:
863         kfree(mlxsw_core->lag.mapping);
864 err_alloc_lag_mapping:
865         free_percpu(mlxsw_core->pcpu_stats);
866 err_alloc_stats:
867         kfree(mlxsw_core);
868 err_core_alloc:
869         mlxsw_core_driver_put(device_kind);
870         return err;
871 }
872 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
873
874 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core)
875 {
876         const char *device_kind = mlxsw_core->bus_info->device_kind;
877
878         mlxsw_core_debugfs_fini(mlxsw_core);
879         mlxsw_core->driver->fini(mlxsw_core->driver_priv);
880         mlxsw_emad_fini(mlxsw_core);
881         mlxsw_core->bus->fini(mlxsw_core->bus_priv);
882         kfree(mlxsw_core->lag.mapping);
883         free_percpu(mlxsw_core->pcpu_stats);
884         kfree(mlxsw_core);
885         mlxsw_core_driver_put(device_kind);
886 }
887 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
888
889 static struct mlxsw_core *__mlxsw_core_get(void *driver_priv)
890 {
891         return container_of(driver_priv, struct mlxsw_core, driver_priv);
892 }
893
894 bool mlxsw_core_skb_transmit_busy(void *driver_priv,
895                                   const struct mlxsw_tx_info *tx_info)
896 {
897         struct mlxsw_core *mlxsw_core = __mlxsw_core_get(driver_priv);
898
899         return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
900                                                   tx_info);
901 }
902 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
903
904 int mlxsw_core_skb_transmit(void *driver_priv, struct sk_buff *skb,
905                             const struct mlxsw_tx_info *tx_info)
906 {
907         struct mlxsw_core *mlxsw_core = __mlxsw_core_get(driver_priv);
908
909         return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
910                                              tx_info);
911 }
912 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
913
914 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
915                                    const struct mlxsw_rx_listener *rxl_b)
916 {
917         return (rxl_a->func == rxl_b->func &&
918                 rxl_a->local_port == rxl_b->local_port &&
919                 rxl_a->trap_id == rxl_b->trap_id);
920 }
921
922 static struct mlxsw_rx_listener_item *
923 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
924                         const struct mlxsw_rx_listener *rxl,
925                         void *priv)
926 {
927         struct mlxsw_rx_listener_item *rxl_item;
928
929         list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
930                 if (__is_rx_listener_equal(&rxl_item->rxl, rxl) &&
931                     rxl_item->priv == priv)
932                         return rxl_item;
933         }
934         return NULL;
935 }
936
937 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
938                                     const struct mlxsw_rx_listener *rxl,
939                                     void *priv)
940 {
941         struct mlxsw_rx_listener_item *rxl_item;
942
943         rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
944         if (rxl_item)
945                 return -EEXIST;
946         rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
947         if (!rxl_item)
948                 return -ENOMEM;
949         rxl_item->rxl = *rxl;
950         rxl_item->priv = priv;
951
952         list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
953         return 0;
954 }
955 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
956
957 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
958                                        const struct mlxsw_rx_listener *rxl,
959                                        void *priv)
960 {
961         struct mlxsw_rx_listener_item *rxl_item;
962
963         rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
964         if (!rxl_item)
965                 return;
966         list_del_rcu(&rxl_item->list);
967         synchronize_rcu();
968         kfree(rxl_item);
969 }
970 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
971
972 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
973                                            void *priv)
974 {
975         struct mlxsw_event_listener_item *event_listener_item = priv;
976         struct mlxsw_reg_info reg;
977         char *payload;
978         char *op_tlv = mlxsw_emad_op_tlv(skb);
979         char *reg_tlv = mlxsw_emad_reg_tlv(skb);
980
981         reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
982         reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
983         payload = mlxsw_emad_reg_payload(op_tlv);
984         event_listener_item->el.func(&reg, payload, event_listener_item->priv);
985         dev_kfree_skb(skb);
986 }
987
988 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
989                                       const struct mlxsw_event_listener *el_b)
990 {
991         return (el_a->func == el_b->func &&
992                 el_a->trap_id == el_b->trap_id);
993 }
994
995 static struct mlxsw_event_listener_item *
996 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
997                            const struct mlxsw_event_listener *el,
998                            void *priv)
999 {
1000         struct mlxsw_event_listener_item *el_item;
1001
1002         list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
1003                 if (__is_event_listener_equal(&el_item->el, el) &&
1004                     el_item->priv == priv)
1005                         return el_item;
1006         }
1007         return NULL;
1008 }
1009
1010 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
1011                                        const struct mlxsw_event_listener *el,
1012                                        void *priv)
1013 {
1014         int err;
1015         struct mlxsw_event_listener_item *el_item;
1016         const struct mlxsw_rx_listener rxl = {
1017                 .func = mlxsw_core_event_listener_func,
1018                 .local_port = MLXSW_PORT_DONT_CARE,
1019                 .trap_id = el->trap_id,
1020         };
1021
1022         el_item = __find_event_listener_item(mlxsw_core, el, priv);
1023         if (el_item)
1024                 return -EEXIST;
1025         el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
1026         if (!el_item)
1027                 return -ENOMEM;
1028         el_item->el = *el;
1029         el_item->priv = priv;
1030
1031         err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item);
1032         if (err)
1033                 goto err_rx_listener_register;
1034
1035         /* No reason to save item if we did not manage to register an RX
1036          * listener for it.
1037          */
1038         list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
1039
1040         return 0;
1041
1042 err_rx_listener_register:
1043         kfree(el_item);
1044         return err;
1045 }
1046 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
1047
1048 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
1049                                           const struct mlxsw_event_listener *el,
1050                                           void *priv)
1051 {
1052         struct mlxsw_event_listener_item *el_item;
1053         const struct mlxsw_rx_listener rxl = {
1054                 .func = mlxsw_core_event_listener_func,
1055                 .local_port = MLXSW_PORT_DONT_CARE,
1056                 .trap_id = el->trap_id,
1057         };
1058
1059         el_item = __find_event_listener_item(mlxsw_core, el, priv);
1060         if (!el_item)
1061                 return;
1062         mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item);
1063         list_del(&el_item->list);
1064         kfree(el_item);
1065 }
1066 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
1067
1068 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
1069                                       const struct mlxsw_reg_info *reg,
1070                                       char *payload,
1071                                       enum mlxsw_core_reg_access_type type)
1072 {
1073         int err;
1074         char *op_tlv;
1075         struct sk_buff *skb;
1076         struct mlxsw_tx_info tx_info = {
1077                 .local_port = MLXSW_PORT_CPU_PORT,
1078                 .is_emad = true,
1079         };
1080
1081         skb = mlxsw_emad_alloc(mlxsw_core, reg->len);
1082         if (!skb)
1083                 return -ENOMEM;
1084
1085         mlxsw_emad_construct(skb, reg, payload, type, mlxsw_core);
1086         mlxsw_core->driver->txhdr_construct(skb, &tx_info);
1087
1088         dev_dbg(mlxsw_core->bus_info->dev, "EMAD send (tid=%llx)\n",
1089                 mlxsw_core->emad.tid);
1090         mlxsw_core_buf_dump_dbg(mlxsw_core, skb->data, skb->len);
1091
1092         err = mlxsw_emad_transmit(mlxsw_core, skb, &tx_info);
1093         if (!err) {
1094                 op_tlv = mlxsw_emad_op_tlv(mlxsw_core->emad.resp_skb);
1095                 memcpy(payload, mlxsw_emad_reg_payload(op_tlv),
1096                        reg->len);
1097
1098                 dev_dbg(mlxsw_core->bus_info->dev, "EMAD recv (tid=%llx)\n",
1099                         mlxsw_core->emad.tid - 1);
1100                 mlxsw_core_buf_dump_dbg(mlxsw_core,
1101                                         mlxsw_core->emad.resp_skb->data,
1102                                         mlxsw_core->emad.resp_skb->len);
1103
1104                 dev_kfree_skb(mlxsw_core->emad.resp_skb);
1105         }
1106
1107         return err;
1108 }
1109
1110 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
1111                                      const struct mlxsw_reg_info *reg,
1112                                      char *payload,
1113                                      enum mlxsw_core_reg_access_type type)
1114 {
1115         int err, n_retry;
1116         char *in_mbox, *out_mbox, *tmp;
1117
1118         in_mbox = mlxsw_cmd_mbox_alloc();
1119         if (!in_mbox)
1120                 return -ENOMEM;
1121
1122         out_mbox = mlxsw_cmd_mbox_alloc();
1123         if (!out_mbox) {
1124                 err = -ENOMEM;
1125                 goto free_in_mbox;
1126         }
1127
1128         mlxsw_emad_pack_op_tlv(in_mbox, reg, type, mlxsw_core);
1129         tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
1130         mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
1131
1132         n_retry = 0;
1133 retry:
1134         err = mlxsw_cmd_access_reg(mlxsw_core, in_mbox, out_mbox);
1135         if (!err) {
1136                 err = mlxsw_emad_process_status(mlxsw_core, out_mbox);
1137                 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
1138                         goto retry;
1139         }
1140
1141         if (!err)
1142                 memcpy(payload, mlxsw_emad_reg_payload(out_mbox),
1143                        reg->len);
1144
1145         mlxsw_core->emad.tid++;
1146         mlxsw_cmd_mbox_free(out_mbox);
1147 free_in_mbox:
1148         mlxsw_cmd_mbox_free(in_mbox);
1149         return err;
1150 }
1151
1152 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
1153                                  const struct mlxsw_reg_info *reg,
1154                                  char *payload,
1155                                  enum mlxsw_core_reg_access_type type)
1156 {
1157         u64 cur_tid;
1158         int err;
1159
1160         if (mutex_lock_interruptible(&mlxsw_core->emad.lock)) {
1161                 dev_err(mlxsw_core->bus_info->dev, "Reg access interrupted (reg_id=%x(%s),type=%s)\n",
1162                         reg->id, mlxsw_reg_id_str(reg->id),
1163                         mlxsw_core_reg_access_type_str(type));
1164                 return -EINTR;
1165         }
1166
1167         cur_tid = mlxsw_core->emad.tid;
1168         dev_dbg(mlxsw_core->bus_info->dev, "Reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
1169                 cur_tid, reg->id, mlxsw_reg_id_str(reg->id),
1170                 mlxsw_core_reg_access_type_str(type));
1171
1172         /* During initialization EMAD interface is not available to us,
1173          * so we default to command interface. We switch to EMAD interface
1174          * after setting the appropriate traps.
1175          */
1176         if (!mlxsw_core->emad.use_emad)
1177                 err = mlxsw_core_reg_access_cmd(mlxsw_core, reg,
1178                                                 payload, type);
1179         else
1180                 err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
1181                                                  payload, type);
1182
1183         if (err)
1184                 dev_err(mlxsw_core->bus_info->dev, "Reg access failed (tid=%llx,reg_id=%x(%s),type=%s)\n",
1185                         cur_tid, reg->id, mlxsw_reg_id_str(reg->id),
1186                         mlxsw_core_reg_access_type_str(type));
1187
1188         mutex_unlock(&mlxsw_core->emad.lock);
1189         return err;
1190 }
1191
1192 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
1193                     const struct mlxsw_reg_info *reg, char *payload)
1194 {
1195         return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1196                                      MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
1197 }
1198 EXPORT_SYMBOL(mlxsw_reg_query);
1199
1200 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
1201                     const struct mlxsw_reg_info *reg, char *payload)
1202 {
1203         return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1204                                      MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
1205 }
1206 EXPORT_SYMBOL(mlxsw_reg_write);
1207
1208 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1209                             struct mlxsw_rx_info *rx_info)
1210 {
1211         struct mlxsw_rx_listener_item *rxl_item;
1212         const struct mlxsw_rx_listener *rxl;
1213         struct mlxsw_core_pcpu_stats *pcpu_stats;
1214         u8 local_port;
1215         bool found = false;
1216
1217         if (rx_info->is_lag) {
1218                 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
1219                                     __func__, rx_info->u.lag_id,
1220                                     rx_info->trap_id);
1221                 /* Upper layer does not care if the skb came from LAG or not,
1222                  * so just get the local_port for the lag port and push it up.
1223                  */
1224                 local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
1225                                                         rx_info->u.lag_id,
1226                                                         rx_info->lag_port_index);
1227         } else {
1228                 local_port = rx_info->u.sys_port;
1229         }
1230
1231         dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
1232                             __func__, local_port, rx_info->trap_id);
1233
1234         if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
1235             (local_port >= MLXSW_PORT_MAX_PORTS))
1236                 goto drop;
1237
1238         rcu_read_lock();
1239         list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
1240                 rxl = &rxl_item->rxl;
1241                 if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
1242                      rxl->local_port == local_port) &&
1243                     rxl->trap_id == rx_info->trap_id) {
1244                         found = true;
1245                         break;
1246                 }
1247         }
1248         rcu_read_unlock();
1249         if (!found)
1250                 goto drop;
1251
1252         pcpu_stats = this_cpu_ptr(mlxsw_core->pcpu_stats);
1253         u64_stats_update_begin(&pcpu_stats->syncp);
1254         pcpu_stats->port_rx_packets[local_port]++;
1255         pcpu_stats->port_rx_bytes[local_port] += skb->len;
1256         pcpu_stats->trap_rx_packets[rx_info->trap_id]++;
1257         pcpu_stats->trap_rx_bytes[rx_info->trap_id] += skb->len;
1258         u64_stats_update_end(&pcpu_stats->syncp);
1259
1260         rxl->func(skb, local_port, rxl_item->priv);
1261         return;
1262
1263 drop:
1264         if (rx_info->trap_id >= MLXSW_TRAP_ID_MAX)
1265                 this_cpu_inc(mlxsw_core->pcpu_stats->trap_rx_invalid);
1266         else
1267                 this_cpu_inc(mlxsw_core->pcpu_stats->trap_rx_dropped[rx_info->trap_id]);
1268         if (local_port >= MLXSW_PORT_MAX_PORTS)
1269                 this_cpu_inc(mlxsw_core->pcpu_stats->port_rx_invalid);
1270         else
1271                 this_cpu_inc(mlxsw_core->pcpu_stats->port_rx_dropped[local_port]);
1272         dev_kfree_skb(skb);
1273 }
1274 EXPORT_SYMBOL(mlxsw_core_skb_receive);
1275
1276 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
1277                                         u16 lag_id, u8 port_index)
1278 {
1279         return mlxsw_core->driver->profile->max_port_per_lag * lag_id +
1280                port_index;
1281 }
1282
1283 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
1284                                 u16 lag_id, u8 port_index, u8 local_port)
1285 {
1286         int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1287                                                  lag_id, port_index);
1288
1289         mlxsw_core->lag.mapping[index] = local_port;
1290 }
1291 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
1292
1293 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
1294                               u16 lag_id, u8 port_index)
1295 {
1296         int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1297                                                  lag_id, port_index);
1298
1299         return mlxsw_core->lag.mapping[index];
1300 }
1301 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
1302
1303 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
1304                                   u16 lag_id, u8 local_port)
1305 {
1306         int i;
1307
1308         for (i = 0; i < mlxsw_core->driver->profile->max_port_per_lag; i++) {
1309                 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1310                                                          lag_id, i);
1311
1312                 if (mlxsw_core->lag.mapping[index] == local_port)
1313                         mlxsw_core->lag.mapping[index] = 0;
1314         }
1315 }
1316 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
1317
1318 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
1319                    u32 in_mod, bool out_mbox_direct,
1320                    char *in_mbox, size_t in_mbox_size,
1321                    char *out_mbox, size_t out_mbox_size)
1322 {
1323         u8 status;
1324         int err;
1325
1326         BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
1327         if (!mlxsw_core->bus->cmd_exec)
1328                 return -EOPNOTSUPP;
1329
1330         dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1331                 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
1332         if (in_mbox) {
1333                 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
1334                 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
1335         }
1336
1337         err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
1338                                         opcode_mod, in_mod, out_mbox_direct,
1339                                         in_mbox, in_mbox_size,
1340                                         out_mbox, out_mbox_size, &status);
1341
1342         if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
1343                 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
1344                         opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1345                         in_mod, status, mlxsw_cmd_status_str(status));
1346         } else if (err == -ETIMEDOUT) {
1347                 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1348                         opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1349                         in_mod);
1350         }
1351
1352         if (!err && out_mbox) {
1353                 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
1354                 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
1355         }
1356         return err;
1357 }
1358 EXPORT_SYMBOL(mlxsw_cmd_exec);
1359
1360 static int __init mlxsw_core_module_init(void)
1361 {
1362         mlxsw_core_dbg_root = debugfs_create_dir(mlxsw_core_driver_name, NULL);
1363         if (!mlxsw_core_dbg_root)
1364                 return -ENOMEM;
1365         return 0;
1366 }
1367
1368 static void __exit mlxsw_core_module_exit(void)
1369 {
1370         debugfs_remove_recursive(mlxsw_core_dbg_root);
1371 }
1372
1373 module_init(mlxsw_core_module_init);
1374 module_exit(mlxsw_core_module_exit);
1375
1376 MODULE_LICENSE("Dual BSD/GPL");
1377 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
1378 MODULE_DESCRIPTION("Mellanox switch device core driver");