2 * drivers/net/ethernet/mellanox/mlxsw/core.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/device.h>
40 #include <linux/export.h>
41 #include <linux/err.h>
42 #include <linux/if_link.h>
43 #include <linux/debugfs.h>
44 #include <linux/seq_file.h>
45 #include <linux/u64_stats_sync.h>
46 #include <linux/netdevice.h>
47 #include <linux/wait.h>
48 #include <linux/skbuff.h>
49 #include <linux/etherdevice.h>
50 #include <linux/types.h>
51 #include <linux/string.h>
52 #include <linux/gfp.h>
53 #include <linux/random.h>
54 #include <linux/jiffies.h>
55 #include <linux/mutex.h>
56 #include <linux/rcupdate.h>
57 #include <linux/slab.h>
58 #include <linux/workqueue.h>
59 #include <asm/byteorder.h>
60 #include <net/devlink.h>
70 static LIST_HEAD(mlxsw_core_driver_list);
71 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
73 static const char mlxsw_core_driver_name[] = "mlxsw_core";
75 static struct dentry *mlxsw_core_dbg_root;
77 static struct workqueue_struct *mlxsw_wq;
79 struct mlxsw_core_pcpu_stats {
80 u64 trap_rx_packets[MLXSW_TRAP_ID_MAX];
81 u64 trap_rx_bytes[MLXSW_TRAP_ID_MAX];
82 u64 port_rx_packets[MLXSW_PORT_MAX_PORTS];
83 u64 port_rx_bytes[MLXSW_PORT_MAX_PORTS];
84 struct u64_stats_sync syncp;
85 u32 trap_rx_dropped[MLXSW_TRAP_ID_MAX];
86 u32 port_rx_dropped[MLXSW_PORT_MAX_PORTS];
92 struct mlxsw_driver *driver;
93 const struct mlxsw_bus *bus;
95 const struct mlxsw_bus_info *bus_info;
96 struct list_head rx_listener_list;
97 struct list_head event_listener_list;
99 struct sk_buff *resp_skb;
101 wait_queue_head_t wait;
103 struct mutex lock; /* One EMAD transaction at a time. */
106 struct mlxsw_core_pcpu_stats __percpu *pcpu_stats;
107 struct dentry *dbg_dir;
109 struct debugfs_blob_wrapper vsd_blob;
110 struct debugfs_blob_wrapper psid_blob;
113 u8 *mapping; /* lag_id+port_index to local_port mapping */
115 struct mlxsw_hwmon *hwmon;
116 unsigned long driver_priv[0];
117 /* driver_priv has to be always the last item */
120 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
122 return mlxsw_core->driver_priv;
124 EXPORT_SYMBOL(mlxsw_core_driver_priv);
126 struct mlxsw_rx_listener_item {
127 struct list_head list;
128 struct mlxsw_rx_listener rxl;
132 struct mlxsw_event_listener_item {
133 struct list_head list;
134 struct mlxsw_event_listener el;
143 * Destination MAC in EMAD's Ethernet header.
144 * Must be set to 01:02:c9:00:00:01
146 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
149 * Source MAC in EMAD's Ethernet header.
150 * Must be set to 00:02:c9:01:02:03
152 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
154 /* emad_eth_hdr_ethertype
155 * Ethertype in EMAD's Ethernet header.
156 * Must be set to 0x8932
158 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
160 /* emad_eth_hdr_mlx_proto
162 * Must be set to 0x0.
164 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
167 * Mellanox protocol version.
168 * Must be set to 0x0.
170 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
174 * Must be set to 0x1 (operation TLV).
176 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
179 * Length of the operation TLV in u32.
180 * Must be set to 0x4.
182 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
185 * Direct route bit. Setting to 1 indicates the EMAD is a direct route
186 * EMAD. DR TLV must follow.
188 * Note: Currently not supported and must not be set.
190 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
192 /* emad_op_tlv_status
193 * Returned status in case of EMAD response. Must be set to 0 in case
196 * 0x1 - device is busy. Requester should retry
197 * 0x2 - Mellanox protocol version not supported
199 * 0x4 - register not supported
200 * 0x5 - operation class not supported
201 * 0x6 - EMAD method not supported
202 * 0x7 - bad parameter (e.g. port out of range)
203 * 0x8 - resource not available
204 * 0x9 - message receipt acknowledgment. Requester should retry
205 * 0x70 - internal error
207 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
209 /* emad_op_tlv_register_id
210 * Register ID of register within register TLV.
212 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
215 * Response bit. Setting to 1 indicates Response, otherwise request.
217 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
219 /* emad_op_tlv_method
223 * 0x3 - send (currently not supported)
226 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
229 * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
231 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
234 * EMAD transaction ID. Used for pairing request and response EMADs.
236 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
240 * Must be set to 0x3 (register TLV).
242 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
245 * Length of the operation TLV in u32.
247 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
251 * Must be set to 0x0 (end TLV).
253 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
256 * Length of the end TLV in u32.
259 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
261 enum mlxsw_core_reg_access_type {
262 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
263 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
266 static inline const char *
267 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
270 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
272 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
278 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
280 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
281 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
284 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
285 const struct mlxsw_reg_info *reg,
288 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
289 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
290 memcpy(reg_tlv + sizeof(u32), payload, reg->len);
293 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
294 const struct mlxsw_reg_info *reg,
295 enum mlxsw_core_reg_access_type type,
296 struct mlxsw_core *mlxsw_core)
298 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
299 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
300 mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
301 mlxsw_emad_op_tlv_status_set(op_tlv, 0);
302 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
303 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
304 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
305 mlxsw_emad_op_tlv_method_set(op_tlv,
306 MLXSW_EMAD_OP_TLV_METHOD_QUERY);
308 mlxsw_emad_op_tlv_method_set(op_tlv,
309 MLXSW_EMAD_OP_TLV_METHOD_WRITE);
310 mlxsw_emad_op_tlv_class_set(op_tlv,
311 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
312 mlxsw_emad_op_tlv_tid_set(op_tlv, mlxsw_core->emad.tid);
315 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
317 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
319 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
320 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
321 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
322 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
323 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
325 skb_reset_mac_header(skb);
330 static void mlxsw_emad_construct(struct sk_buff *skb,
331 const struct mlxsw_reg_info *reg,
333 enum mlxsw_core_reg_access_type type,
334 struct mlxsw_core *mlxsw_core)
338 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
339 mlxsw_emad_pack_end_tlv(buf);
341 buf = skb_push(skb, reg->len + sizeof(u32));
342 mlxsw_emad_pack_reg_tlv(buf, reg, payload);
344 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
345 mlxsw_emad_pack_op_tlv(buf, reg, type, mlxsw_core);
347 mlxsw_emad_construct_eth_hdr(skb);
350 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
352 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN));
355 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
357 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN +
358 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)));
361 static char *mlxsw_emad_reg_payload(const char *op_tlv)
363 return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
366 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
370 op_tlv = mlxsw_emad_op_tlv(skb);
371 return mlxsw_emad_op_tlv_tid_get(op_tlv);
374 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
378 op_tlv = mlxsw_emad_op_tlv(skb);
379 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
382 #define MLXSW_EMAD_TIMEOUT_MS 200
384 static int __mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
386 const struct mlxsw_tx_info *tx_info)
391 mlxsw_core->emad.trans_active = true;
393 err = mlxsw_core_skb_transmit(mlxsw_core, skb, tx_info);
395 dev_err(mlxsw_core->bus_info->dev, "Failed to transmit EMAD (tid=%llx)\n",
396 mlxsw_core->emad.tid);
398 goto trans_inactive_out;
401 ret = wait_event_timeout(mlxsw_core->emad.wait,
402 !(mlxsw_core->emad.trans_active),
403 msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS));
405 dev_warn(mlxsw_core->bus_info->dev, "EMAD timed-out (tid=%llx)\n",
406 mlxsw_core->emad.tid);
408 goto trans_inactive_out;
414 mlxsw_core->emad.trans_active = false;
418 static int mlxsw_emad_process_status(struct mlxsw_core *mlxsw_core,
421 enum mlxsw_emad_op_tlv_status status;
424 status = mlxsw_emad_op_tlv_status_get(op_tlv);
425 tid = mlxsw_emad_op_tlv_tid_get(op_tlv);
428 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
430 case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
431 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
432 dev_warn(mlxsw_core->bus_info->dev, "Reg access status again (tid=%llx,status=%x(%s))\n",
433 tid, status, mlxsw_emad_op_tlv_status_str(status));
435 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
436 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
437 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
438 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
439 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
440 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
441 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
442 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
444 dev_err(mlxsw_core->bus_info->dev, "Reg access status failed (tid=%llx,status=%x(%s))\n",
445 tid, status, mlxsw_emad_op_tlv_status_str(status));
450 static int mlxsw_emad_process_status_skb(struct mlxsw_core *mlxsw_core,
453 return mlxsw_emad_process_status(mlxsw_core, mlxsw_emad_op_tlv(skb));
456 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
458 const struct mlxsw_tx_info *tx_info)
460 struct sk_buff *trans_skb;
466 /* We copy the EMAD to a new skb, since we might need
467 * to retransmit it in case of failure.
469 trans_skb = skb_copy(skb, GFP_KERNEL);
475 err = __mlxsw_emad_transmit(mlxsw_core, trans_skb, tx_info);
477 struct sk_buff *resp_skb = mlxsw_core->emad.resp_skb;
479 err = mlxsw_emad_process_status_skb(mlxsw_core, resp_skb);
481 dev_kfree_skb(resp_skb);
482 if (!err || err != -EAGAIN)
485 if (n_retry++ < MLXSW_EMAD_MAX_RETRY)
490 mlxsw_core->emad.tid++;
494 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
497 struct mlxsw_core *mlxsw_core = priv;
499 if (mlxsw_emad_is_resp(skb) &&
500 mlxsw_core->emad.trans_active &&
501 mlxsw_emad_get_tid(skb) == mlxsw_core->emad.tid) {
502 mlxsw_core->emad.resp_skb = skb;
503 mlxsw_core->emad.trans_active = false;
504 wake_up(&mlxsw_core->emad.wait);
510 static const struct mlxsw_rx_listener mlxsw_emad_rx_listener = {
511 .func = mlxsw_emad_rx_listener_func,
512 .local_port = MLXSW_PORT_DONT_CARE,
513 .trap_id = MLXSW_TRAP_ID_ETHEMAD,
516 static int mlxsw_emad_traps_set(struct mlxsw_core *mlxsw_core)
518 char htgt_pl[MLXSW_REG_HTGT_LEN];
519 char hpkt_pl[MLXSW_REG_HPKT_LEN];
522 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD);
523 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
527 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
528 MLXSW_TRAP_ID_ETHEMAD);
529 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
532 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
536 /* Set the upper 32 bits of the transaction ID field to a random
537 * number. This allows us to discard EMADs addressed to other
540 get_random_bytes(&mlxsw_core->emad.tid, 4);
541 mlxsw_core->emad.tid = mlxsw_core->emad.tid << 32;
543 init_waitqueue_head(&mlxsw_core->emad.wait);
544 mlxsw_core->emad.trans_active = false;
545 mutex_init(&mlxsw_core->emad.lock);
547 err = mlxsw_core_rx_listener_register(mlxsw_core,
548 &mlxsw_emad_rx_listener,
553 err = mlxsw_emad_traps_set(mlxsw_core);
555 goto err_emad_trap_set;
557 mlxsw_core->emad.use_emad = true;
562 mlxsw_core_rx_listener_unregister(mlxsw_core,
563 &mlxsw_emad_rx_listener,
568 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
570 char hpkt_pl[MLXSW_REG_HPKT_LEN];
572 mlxsw_core->emad.use_emad = false;
573 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
574 MLXSW_TRAP_ID_ETHEMAD);
575 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
577 mlxsw_core_rx_listener_unregister(mlxsw_core,
578 &mlxsw_emad_rx_listener,
582 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
588 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
589 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
590 sizeof(u32) + mlxsw_core->driver->txhdr_len);
591 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
594 skb = netdev_alloc_skb(NULL, emad_len);
597 memset(skb->data, 0, emad_len);
598 skb_reserve(skb, emad_len);
607 static int mlxsw_core_rx_stats_dbg_read(struct seq_file *file, void *data)
609 struct mlxsw_core *mlxsw_core = file->private;
610 struct mlxsw_core_pcpu_stats *p;
611 u64 rx_packets, rx_bytes;
612 u64 tmp_rx_packets, tmp_rx_bytes;
613 u32 rx_dropped, rx_invalid;
617 static const char hdr[] =
618 " NUM RX_PACKETS RX_BYTES RX_DROPPED\n";
620 seq_printf(file, hdr);
621 for (i = 0; i < MLXSW_TRAP_ID_MAX; i++) {
625 for_each_possible_cpu(j) {
626 p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
628 start = u64_stats_fetch_begin(&p->syncp);
629 tmp_rx_packets = p->trap_rx_packets[i];
630 tmp_rx_bytes = p->trap_rx_bytes[i];
631 } while (u64_stats_fetch_retry(&p->syncp, start));
633 rx_packets += tmp_rx_packets;
634 rx_bytes += tmp_rx_bytes;
635 rx_dropped += p->trap_rx_dropped[i];
637 seq_printf(file, "trap %3d %12llu %12llu %10u\n",
638 i, rx_packets, rx_bytes, rx_dropped);
641 for_each_possible_cpu(j) {
642 p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
643 rx_invalid += p->trap_rx_invalid;
645 seq_printf(file, "trap INV %10u\n",
648 for (i = 0; i < MLXSW_PORT_MAX_PORTS; i++) {
652 for_each_possible_cpu(j) {
653 p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
655 start = u64_stats_fetch_begin(&p->syncp);
656 tmp_rx_packets = p->port_rx_packets[i];
657 tmp_rx_bytes = p->port_rx_bytes[i];
658 } while (u64_stats_fetch_retry(&p->syncp, start));
660 rx_packets += tmp_rx_packets;
661 rx_bytes += tmp_rx_bytes;
662 rx_dropped += p->port_rx_dropped[i];
664 seq_printf(file, "port %3d %12llu %12llu %10u\n",
665 i, rx_packets, rx_bytes, rx_dropped);
668 for_each_possible_cpu(j) {
669 p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
670 rx_invalid += p->port_rx_invalid;
672 seq_printf(file, "port INV %10u\n",
677 static int mlxsw_core_rx_stats_dbg_open(struct inode *inode, struct file *f)
679 struct mlxsw_core *mlxsw_core = inode->i_private;
681 return single_open(f, mlxsw_core_rx_stats_dbg_read, mlxsw_core);
684 static const struct file_operations mlxsw_core_rx_stats_dbg_ops = {
685 .owner = THIS_MODULE,
686 .open = mlxsw_core_rx_stats_dbg_open,
687 .release = single_release,
692 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
693 const char *buf, size_t size)
695 __be32 *m = (__be32 *) buf;
697 int count = size / sizeof(__be32);
699 for (i = count - 1; i >= 0; i--)
704 for (i = 0; i < count; i += 4)
705 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
706 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
707 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
710 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
712 spin_lock(&mlxsw_core_driver_list_lock);
713 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
714 spin_unlock(&mlxsw_core_driver_list_lock);
717 EXPORT_SYMBOL(mlxsw_core_driver_register);
719 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
721 spin_lock(&mlxsw_core_driver_list_lock);
722 list_del(&mlxsw_driver->list);
723 spin_unlock(&mlxsw_core_driver_list_lock);
725 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
727 static struct mlxsw_driver *__driver_find(const char *kind)
729 struct mlxsw_driver *mlxsw_driver;
731 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
732 if (strcmp(mlxsw_driver->kind, kind) == 0)
738 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
740 struct mlxsw_driver *mlxsw_driver;
742 spin_lock(&mlxsw_core_driver_list_lock);
743 mlxsw_driver = __driver_find(kind);
745 spin_unlock(&mlxsw_core_driver_list_lock);
746 request_module(MLXSW_MODULE_ALIAS_PREFIX "%s", kind);
747 spin_lock(&mlxsw_core_driver_list_lock);
748 mlxsw_driver = __driver_find(kind);
751 if (!try_module_get(mlxsw_driver->owner))
755 spin_unlock(&mlxsw_core_driver_list_lock);
759 static void mlxsw_core_driver_put(const char *kind)
761 struct mlxsw_driver *mlxsw_driver;
763 spin_lock(&mlxsw_core_driver_list_lock);
764 mlxsw_driver = __driver_find(kind);
765 spin_unlock(&mlxsw_core_driver_list_lock);
768 module_put(mlxsw_driver->owner);
771 static int mlxsw_core_debugfs_init(struct mlxsw_core *mlxsw_core)
773 const struct mlxsw_bus_info *bus_info = mlxsw_core->bus_info;
775 mlxsw_core->dbg_dir = debugfs_create_dir(bus_info->device_name,
776 mlxsw_core_dbg_root);
777 if (!mlxsw_core->dbg_dir)
779 debugfs_create_file("rx_stats", S_IRUGO, mlxsw_core->dbg_dir,
780 mlxsw_core, &mlxsw_core_rx_stats_dbg_ops);
781 mlxsw_core->dbg.vsd_blob.data = (void *) &bus_info->vsd;
782 mlxsw_core->dbg.vsd_blob.size = sizeof(bus_info->vsd);
783 debugfs_create_blob("vsd", S_IRUGO, mlxsw_core->dbg_dir,
784 &mlxsw_core->dbg.vsd_blob);
785 mlxsw_core->dbg.psid_blob.data = (void *) &bus_info->psid;
786 mlxsw_core->dbg.psid_blob.size = sizeof(bus_info->psid);
787 debugfs_create_blob("psid", S_IRUGO, mlxsw_core->dbg_dir,
788 &mlxsw_core->dbg.psid_blob);
792 static void mlxsw_core_debugfs_fini(struct mlxsw_core *mlxsw_core)
794 debugfs_remove_recursive(mlxsw_core->dbg_dir);
797 static int mlxsw_devlink_port_split(struct devlink *devlink,
798 unsigned int port_index,
801 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
803 if (port_index >= MLXSW_PORT_MAX_PORTS)
805 if (!mlxsw_core->driver->port_split)
807 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count);
810 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
811 unsigned int port_index)
813 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
815 if (port_index >= MLXSW_PORT_MAX_PORTS)
817 if (!mlxsw_core->driver->port_unsplit)
819 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index);
823 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
824 unsigned int sb_index, u16 pool_index,
825 struct devlink_sb_pool_info *pool_info)
827 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
828 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
830 if (!mlxsw_driver->sb_pool_get)
832 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
833 pool_index, pool_info);
837 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
838 unsigned int sb_index, u16 pool_index, u32 size,
839 enum devlink_sb_threshold_type threshold_type)
841 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
842 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
844 if (!mlxsw_driver->sb_pool_set)
846 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
847 pool_index, size, threshold_type);
850 static void *__dl_port(struct devlink_port *devlink_port)
852 return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
855 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
856 unsigned int sb_index, u16 pool_index,
859 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
860 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
861 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
863 if (!mlxsw_driver->sb_port_pool_get)
865 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
866 pool_index, p_threshold);
869 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
870 unsigned int sb_index, u16 pool_index,
873 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
874 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
875 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
877 if (!mlxsw_driver->sb_port_pool_set)
879 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
880 pool_index, threshold);
884 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
885 unsigned int sb_index, u16 tc_index,
886 enum devlink_sb_pool_type pool_type,
887 u16 *p_pool_index, u32 *p_threshold)
889 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
890 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
891 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
893 if (!mlxsw_driver->sb_tc_pool_bind_get)
895 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
897 p_pool_index, p_threshold);
901 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
902 unsigned int sb_index, u16 tc_index,
903 enum devlink_sb_pool_type pool_type,
904 u16 pool_index, u32 threshold)
906 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
907 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
908 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
910 if (!mlxsw_driver->sb_tc_pool_bind_set)
912 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
914 pool_index, threshold);
917 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
918 unsigned int sb_index)
920 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
921 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
923 if (!mlxsw_driver->sb_occ_snapshot)
925 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
928 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
929 unsigned int sb_index)
931 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
932 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
934 if (!mlxsw_driver->sb_occ_max_clear)
936 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
940 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
941 unsigned int sb_index, u16 pool_index,
942 u32 *p_cur, u32 *p_max)
944 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
945 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
946 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
948 if (!mlxsw_driver->sb_occ_port_pool_get)
950 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
951 pool_index, p_cur, p_max);
955 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
956 unsigned int sb_index, u16 tc_index,
957 enum devlink_sb_pool_type pool_type,
958 u32 *p_cur, u32 *p_max)
960 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
961 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
962 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
964 if (!mlxsw_driver->sb_occ_tc_port_bind_get)
966 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
968 pool_type, p_cur, p_max);
971 static const struct devlink_ops mlxsw_devlink_ops = {
972 .port_split = mlxsw_devlink_port_split,
973 .port_unsplit = mlxsw_devlink_port_unsplit,
974 .sb_pool_get = mlxsw_devlink_sb_pool_get,
975 .sb_pool_set = mlxsw_devlink_sb_pool_set,
976 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get,
977 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set,
978 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get,
979 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set,
980 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot,
981 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear,
982 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get,
983 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get,
986 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
987 const struct mlxsw_bus *mlxsw_bus,
990 const char *device_kind = mlxsw_bus_info->device_kind;
991 struct mlxsw_core *mlxsw_core;
992 struct mlxsw_driver *mlxsw_driver;
993 struct devlink *devlink;
997 mlxsw_driver = mlxsw_core_driver_get(device_kind);
1000 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
1001 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size);
1004 goto err_devlink_alloc;
1007 mlxsw_core = devlink_priv(devlink);
1008 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1009 INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1010 mlxsw_core->driver = mlxsw_driver;
1011 mlxsw_core->bus = mlxsw_bus;
1012 mlxsw_core->bus_priv = bus_priv;
1013 mlxsw_core->bus_info = mlxsw_bus_info;
1015 mlxsw_core->pcpu_stats =
1016 netdev_alloc_pcpu_stats(struct mlxsw_core_pcpu_stats);
1017 if (!mlxsw_core->pcpu_stats) {
1019 goto err_alloc_stats;
1022 if (mlxsw_driver->profile->used_max_lag &&
1023 mlxsw_driver->profile->used_max_port_per_lag) {
1024 alloc_size = sizeof(u8) * mlxsw_driver->profile->max_lag *
1025 mlxsw_driver->profile->max_port_per_lag;
1026 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1027 if (!mlxsw_core->lag.mapping) {
1029 goto err_alloc_lag_mapping;
1033 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile);
1037 err = mlxsw_emad_init(mlxsw_core);
1041 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
1043 goto err_hwmon_init;
1045 err = devlink_register(devlink, mlxsw_bus_info->dev);
1047 goto err_devlink_register;
1049 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info);
1051 goto err_driver_init;
1053 err = mlxsw_core_debugfs_init(mlxsw_core);
1055 goto err_debugfs_init;
1060 mlxsw_core->driver->fini(mlxsw_core);
1062 devlink_unregister(devlink);
1063 err_devlink_register:
1065 mlxsw_emad_fini(mlxsw_core);
1067 mlxsw_bus->fini(bus_priv);
1069 kfree(mlxsw_core->lag.mapping);
1070 err_alloc_lag_mapping:
1071 free_percpu(mlxsw_core->pcpu_stats);
1073 devlink_free(devlink);
1075 mlxsw_core_driver_put(device_kind);
1078 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
1080 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core)
1082 const char *device_kind = mlxsw_core->bus_info->device_kind;
1083 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1085 mlxsw_core_debugfs_fini(mlxsw_core);
1086 mlxsw_core->driver->fini(mlxsw_core);
1087 devlink_unregister(devlink);
1088 mlxsw_emad_fini(mlxsw_core);
1089 mlxsw_core->bus->fini(mlxsw_core->bus_priv);
1090 kfree(mlxsw_core->lag.mapping);
1091 free_percpu(mlxsw_core->pcpu_stats);
1092 devlink_free(devlink);
1093 mlxsw_core_driver_put(device_kind);
1095 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
1097 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
1098 const struct mlxsw_tx_info *tx_info)
1100 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
1103 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
1105 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1106 const struct mlxsw_tx_info *tx_info)
1108 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
1111 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
1113 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
1114 const struct mlxsw_rx_listener *rxl_b)
1116 return (rxl_a->func == rxl_b->func &&
1117 rxl_a->local_port == rxl_b->local_port &&
1118 rxl_a->trap_id == rxl_b->trap_id);
1121 static struct mlxsw_rx_listener_item *
1122 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
1123 const struct mlxsw_rx_listener *rxl,
1126 struct mlxsw_rx_listener_item *rxl_item;
1128 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
1129 if (__is_rx_listener_equal(&rxl_item->rxl, rxl) &&
1130 rxl_item->priv == priv)
1136 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
1137 const struct mlxsw_rx_listener *rxl,
1140 struct mlxsw_rx_listener_item *rxl_item;
1142 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1145 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
1148 rxl_item->rxl = *rxl;
1149 rxl_item->priv = priv;
1151 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
1154 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
1156 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
1157 const struct mlxsw_rx_listener *rxl,
1160 struct mlxsw_rx_listener_item *rxl_item;
1162 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1165 list_del_rcu(&rxl_item->list);
1169 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
1171 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
1174 struct mlxsw_event_listener_item *event_listener_item = priv;
1175 struct mlxsw_reg_info reg;
1177 char *op_tlv = mlxsw_emad_op_tlv(skb);
1178 char *reg_tlv = mlxsw_emad_reg_tlv(skb);
1180 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
1181 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
1182 payload = mlxsw_emad_reg_payload(op_tlv);
1183 event_listener_item->el.func(®, payload, event_listener_item->priv);
1187 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
1188 const struct mlxsw_event_listener *el_b)
1190 return (el_a->func == el_b->func &&
1191 el_a->trap_id == el_b->trap_id);
1194 static struct mlxsw_event_listener_item *
1195 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
1196 const struct mlxsw_event_listener *el,
1199 struct mlxsw_event_listener_item *el_item;
1201 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
1202 if (__is_event_listener_equal(&el_item->el, el) &&
1203 el_item->priv == priv)
1209 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
1210 const struct mlxsw_event_listener *el,
1214 struct mlxsw_event_listener_item *el_item;
1215 const struct mlxsw_rx_listener rxl = {
1216 .func = mlxsw_core_event_listener_func,
1217 .local_port = MLXSW_PORT_DONT_CARE,
1218 .trap_id = el->trap_id,
1221 el_item = __find_event_listener_item(mlxsw_core, el, priv);
1224 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
1228 el_item->priv = priv;
1230 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item);
1232 goto err_rx_listener_register;
1234 /* No reason to save item if we did not manage to register an RX
1237 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
1241 err_rx_listener_register:
1245 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
1247 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
1248 const struct mlxsw_event_listener *el,
1251 struct mlxsw_event_listener_item *el_item;
1252 const struct mlxsw_rx_listener rxl = {
1253 .func = mlxsw_core_event_listener_func,
1254 .local_port = MLXSW_PORT_DONT_CARE,
1255 .trap_id = el->trap_id,
1258 el_item = __find_event_listener_item(mlxsw_core, el, priv);
1261 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item);
1262 list_del(&el_item->list);
1265 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
1267 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
1268 const struct mlxsw_reg_info *reg,
1270 enum mlxsw_core_reg_access_type type)
1274 struct sk_buff *skb;
1275 struct mlxsw_tx_info tx_info = {
1276 .local_port = MLXSW_PORT_CPU_PORT,
1280 skb = mlxsw_emad_alloc(mlxsw_core, reg->len);
1284 mlxsw_emad_construct(skb, reg, payload, type, mlxsw_core);
1285 mlxsw_core->driver->txhdr_construct(skb, &tx_info);
1287 dev_dbg(mlxsw_core->bus_info->dev, "EMAD send (tid=%llx)\n",
1288 mlxsw_core->emad.tid);
1289 mlxsw_core_buf_dump_dbg(mlxsw_core, skb->data, skb->len);
1291 err = mlxsw_emad_transmit(mlxsw_core, skb, &tx_info);
1293 op_tlv = mlxsw_emad_op_tlv(mlxsw_core->emad.resp_skb);
1294 memcpy(payload, mlxsw_emad_reg_payload(op_tlv),
1297 dev_dbg(mlxsw_core->bus_info->dev, "EMAD recv (tid=%llx)\n",
1298 mlxsw_core->emad.tid - 1);
1299 mlxsw_core_buf_dump_dbg(mlxsw_core,
1300 mlxsw_core->emad.resp_skb->data,
1301 mlxsw_core->emad.resp_skb->len);
1303 dev_kfree_skb(mlxsw_core->emad.resp_skb);
1309 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
1310 const struct mlxsw_reg_info *reg,
1312 enum mlxsw_core_reg_access_type type)
1315 char *in_mbox, *out_mbox, *tmp;
1317 in_mbox = mlxsw_cmd_mbox_alloc();
1321 out_mbox = mlxsw_cmd_mbox_alloc();
1327 mlxsw_emad_pack_op_tlv(in_mbox, reg, type, mlxsw_core);
1328 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
1329 mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
1333 err = mlxsw_cmd_access_reg(mlxsw_core, in_mbox, out_mbox);
1335 err = mlxsw_emad_process_status(mlxsw_core, out_mbox);
1336 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
1341 memcpy(payload, mlxsw_emad_reg_payload(out_mbox),
1344 mlxsw_core->emad.tid++;
1345 mlxsw_cmd_mbox_free(out_mbox);
1347 mlxsw_cmd_mbox_free(in_mbox);
1351 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
1352 const struct mlxsw_reg_info *reg,
1354 enum mlxsw_core_reg_access_type type)
1359 if (mutex_lock_interruptible(&mlxsw_core->emad.lock)) {
1360 dev_err(mlxsw_core->bus_info->dev, "Reg access interrupted (reg_id=%x(%s),type=%s)\n",
1361 reg->id, mlxsw_reg_id_str(reg->id),
1362 mlxsw_core_reg_access_type_str(type));
1366 cur_tid = mlxsw_core->emad.tid;
1367 dev_dbg(mlxsw_core->bus_info->dev, "Reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
1368 cur_tid, reg->id, mlxsw_reg_id_str(reg->id),
1369 mlxsw_core_reg_access_type_str(type));
1371 /* During initialization EMAD interface is not available to us,
1372 * so we default to command interface. We switch to EMAD interface
1373 * after setting the appropriate traps.
1375 if (!mlxsw_core->emad.use_emad)
1376 err = mlxsw_core_reg_access_cmd(mlxsw_core, reg,
1379 err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
1383 dev_err(mlxsw_core->bus_info->dev, "Reg access failed (tid=%llx,reg_id=%x(%s),type=%s)\n",
1384 cur_tid, reg->id, mlxsw_reg_id_str(reg->id),
1385 mlxsw_core_reg_access_type_str(type));
1387 mutex_unlock(&mlxsw_core->emad.lock);
1391 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
1392 const struct mlxsw_reg_info *reg, char *payload)
1394 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1395 MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
1397 EXPORT_SYMBOL(mlxsw_reg_query);
1399 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
1400 const struct mlxsw_reg_info *reg, char *payload)
1402 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1403 MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
1405 EXPORT_SYMBOL(mlxsw_reg_write);
1407 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1408 struct mlxsw_rx_info *rx_info)
1410 struct mlxsw_rx_listener_item *rxl_item;
1411 const struct mlxsw_rx_listener *rxl;
1412 struct mlxsw_core_pcpu_stats *pcpu_stats;
1416 if (rx_info->is_lag) {
1417 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
1418 __func__, rx_info->u.lag_id,
1420 /* Upper layer does not care if the skb came from LAG or not,
1421 * so just get the local_port for the lag port and push it up.
1423 local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
1425 rx_info->lag_port_index);
1427 local_port = rx_info->u.sys_port;
1430 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
1431 __func__, local_port, rx_info->trap_id);
1433 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
1434 (local_port >= MLXSW_PORT_MAX_PORTS))
1438 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
1439 rxl = &rxl_item->rxl;
1440 if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
1441 rxl->local_port == local_port) &&
1442 rxl->trap_id == rx_info->trap_id) {
1451 pcpu_stats = this_cpu_ptr(mlxsw_core->pcpu_stats);
1452 u64_stats_update_begin(&pcpu_stats->syncp);
1453 pcpu_stats->port_rx_packets[local_port]++;
1454 pcpu_stats->port_rx_bytes[local_port] += skb->len;
1455 pcpu_stats->trap_rx_packets[rx_info->trap_id]++;
1456 pcpu_stats->trap_rx_bytes[rx_info->trap_id] += skb->len;
1457 u64_stats_update_end(&pcpu_stats->syncp);
1459 rxl->func(skb, local_port, rxl_item->priv);
1463 if (rx_info->trap_id >= MLXSW_TRAP_ID_MAX)
1464 this_cpu_inc(mlxsw_core->pcpu_stats->trap_rx_invalid);
1466 this_cpu_inc(mlxsw_core->pcpu_stats->trap_rx_dropped[rx_info->trap_id]);
1467 if (local_port >= MLXSW_PORT_MAX_PORTS)
1468 this_cpu_inc(mlxsw_core->pcpu_stats->port_rx_invalid);
1470 this_cpu_inc(mlxsw_core->pcpu_stats->port_rx_dropped[local_port]);
1473 EXPORT_SYMBOL(mlxsw_core_skb_receive);
1475 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
1476 u16 lag_id, u8 port_index)
1478 return mlxsw_core->driver->profile->max_port_per_lag * lag_id +
1482 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
1483 u16 lag_id, u8 port_index, u8 local_port)
1485 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1486 lag_id, port_index);
1488 mlxsw_core->lag.mapping[index] = local_port;
1490 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
1492 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
1493 u16 lag_id, u8 port_index)
1495 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1496 lag_id, port_index);
1498 return mlxsw_core->lag.mapping[index];
1500 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
1502 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
1503 u16 lag_id, u8 local_port)
1507 for (i = 0; i < mlxsw_core->driver->profile->max_port_per_lag; i++) {
1508 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1511 if (mlxsw_core->lag.mapping[index] == local_port)
1512 mlxsw_core->lag.mapping[index] = 0;
1515 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
1517 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core,
1518 struct mlxsw_core_port *mlxsw_core_port, u8 local_port,
1519 struct net_device *dev, bool split, u32 split_group)
1521 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1522 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1525 devlink_port_split_set(devlink_port, split_group);
1526 devlink_port_type_eth_set(devlink_port, dev);
1527 return devlink_port_register(devlink, devlink_port, local_port);
1529 EXPORT_SYMBOL(mlxsw_core_port_init);
1531 void mlxsw_core_port_fini(struct mlxsw_core_port *mlxsw_core_port)
1533 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1535 devlink_port_unregister(devlink_port);
1537 EXPORT_SYMBOL(mlxsw_core_port_fini);
1539 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
1540 u32 in_mod, bool out_mbox_direct,
1541 char *in_mbox, size_t in_mbox_size,
1542 char *out_mbox, size_t out_mbox_size)
1547 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
1548 if (!mlxsw_core->bus->cmd_exec)
1551 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1552 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
1554 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
1555 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
1558 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
1559 opcode_mod, in_mod, out_mbox_direct,
1560 in_mbox, in_mbox_size,
1561 out_mbox, out_mbox_size, &status);
1563 if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
1564 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
1565 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1566 in_mod, status, mlxsw_cmd_status_str(status));
1567 } else if (err == -ETIMEDOUT) {
1568 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1569 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1573 if (!err && out_mbox) {
1574 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
1575 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
1579 EXPORT_SYMBOL(mlxsw_cmd_exec);
1581 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
1583 return queue_delayed_work(mlxsw_wq, dwork, delay);
1585 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
1587 static int __init mlxsw_core_module_init(void)
1591 mlxsw_wq = create_workqueue(mlxsw_core_driver_name);
1594 mlxsw_core_dbg_root = debugfs_create_dir(mlxsw_core_driver_name, NULL);
1595 if (!mlxsw_core_dbg_root) {
1597 goto err_debugfs_create_dir;
1601 err_debugfs_create_dir:
1602 destroy_workqueue(mlxsw_wq);
1606 static void __exit mlxsw_core_module_exit(void)
1608 debugfs_remove_recursive(mlxsw_core_dbg_root);
1609 destroy_workqueue(mlxsw_wq);
1612 module_init(mlxsw_core_module_init);
1613 module_exit(mlxsw_core_module_exit);
1615 MODULE_LICENSE("Dual BSD/GPL");
1616 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
1617 MODULE_DESCRIPTION("Mellanox switch device core driver");