drivers/net/ethernet/mellanox/mlxsw/spectrum.c

   1 /*
   2  * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
   3  * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
   4  * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
   5  * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
   6  * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. Neither the names of the copyright holders nor the names of its
  17  *    contributors may be used to endorse or promote products derived from
  18  *    this software without specific prior written permission.
  19  *
  20  * Alternatively, this software may be distributed under the terms of the
  21  * GNU General Public License ("GPL") version 2 as published by the Free
  22  * Software Foundation.
  23  *
  24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  27  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  28  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  34  * POSSIBILITY OF SUCH DAMAGE.
  35  */
  36
  37 #include <linux/kernel.h>
  38 #include <linux/module.h>
  39 #include <linux/types.h>
  40 #include <linux/netdevice.h>
  41 #include <linux/etherdevice.h>
  42 #include <linux/ethtool.h>
  43 #include <linux/slab.h>
  44 #include <linux/device.h>
  45 #include <linux/skbuff.h>
  46 #include <linux/if_vlan.h>
  47 #include <linux/if_bridge.h>
  48 #include <linux/workqueue.h>
  49 #include <linux/jiffies.h>
  50 #include <linux/bitops.h>
  51 #include <linux/list.h>
  52 #include <linux/notifier.h>
  53 #include <linux/dcbnl.h>
  54 #include <net/switchdev.h>
  55 #include <generated/utsrelease.h>
  56
  57 #include "spectrum.h"
  58 #include "core.h"
  59 #include "reg.h"
  60 #include "port.h"
  61 #include "trap.h"
  62 #include "txheader.h"
  63
  64 static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
  65 static const char mlxsw_sp_driver_version[] = "1.0";
  66
  67 /* tx_hdr_version
  68  * Tx header version.
  69  * Must be set to 1.
  70  */
  71 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
  72
  73 /* tx_hdr_ctl
  74  * Packet control type.
  75  * 0 - Ethernet control (e.g. EMADs, LACP)
  76  * 1 - Ethernet data
  77  */
  78 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
  79
  80 /* tx_hdr_proto
  81  * Packet protocol type. Must be set to 1 (Ethernet).
  82  */
  83 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
  84
  85 /* tx_hdr_rx_is_router
  86  * Packet is sent from the router. Valid for data packets only.
  87  */
  88 MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
  89
  90 /* tx_hdr_fid_valid
  91  * Indicates if the 'fid' field is valid and should be used for
  92  * forwarding lookup. Valid for data packets only.
  93  */
  94 MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
  95
  96 /* tx_hdr_swid
  97  * Switch partition ID. Must be set to 0.
  98  */
  99 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
 100
 101 /* tx_hdr_control_tclass
 102  * Indicates if the packet should use the control TClass and not one
 103  * of the data TClasses.
 104  */
 105 MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
 106
 107 /* tx_hdr_etclass
 108  * Egress TClass to be used on the egress device on the egress port.
 109  */
 110 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
 111
 112 /* tx_hdr_port_mid
 113  * Destination local port for unicast packets.
 114  * Destination multicast ID for multicast packets.
 115  *
 116  * Control packets are directed to a specific egress port, while data
 117  * packets are transmitted through the CPU port (0) into the switch partition,
 118  * where forwarding rules are applied.
 119  */
 120 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
 121
 122 /* tx_hdr_fid
 123  * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
 124  * set, otherwise calculated based on the packet's VID using VID to FID mapping.
 125  * Valid for data packets only.
 126  */
 127 MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
 128
 129 /* tx_hdr_type
 130  * 0 - Data packets
 131  * 6 - Control packets
 132  */
 133 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
 134
 135 static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
 136                                      const struct mlxsw_tx_info *tx_info)
 137 {
 138         char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
 139
 140         memset(txhdr, 0, MLXSW_TXHDR_LEN);
 141
 142         mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
 143         mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
 144         mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
 145         mlxsw_tx_hdr_swid_set(txhdr, 0);
 146         mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
 147         mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
 148         mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
 149 }
 150
 151 static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
 152 {
 153         char spad_pl[MLXSW_REG_SPAD_LEN];
 154         int err;
 155
 156         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
 157         if (err)
 158                 return err;
 159         mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
 160         return 0;
 161 }
 162
 163 static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
 164                                           bool is_up)
 165 {
 166         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 167         char paos_pl[MLXSW_REG_PAOS_LEN];
 168
 169         mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
 170                             is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
 171                             MLXSW_PORT_ADMIN_STATUS_DOWN);
 172         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
 173 }
 174
 175 static int mlxsw_sp_port_oper_status_get(struct mlxsw_sp_port *mlxsw_sp_port,
 176                                          bool *p_is_up)
 177 {
 178         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 179         char paos_pl[MLXSW_REG_PAOS_LEN];
 180         u8 oper_status;
 181         int err;
 182
 183         mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port, 0);
 184         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
 185         if (err)
 186                 return err;
 187         oper_status = mlxsw_reg_paos_oper_status_get(paos_pl);
 188         *p_is_up = oper_status == MLXSW_PORT_ADMIN_STATUS_UP ? true : false;
 189         return 0;
 190 }
 191
 192 static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
 193                                       unsigned char *addr)
 194 {
 195         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 196         char ppad_pl[MLXSW_REG_PPAD_LEN];
 197
 198         mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
 199         mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
 200         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
 201 }
 202
 203 static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
 204 {
 205         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 206         unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
 207
 208         ether_addr_copy(addr, mlxsw_sp->base_mac);
 209         addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
 210         return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
 211 }
 212
 213 static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
 214                                        u16 vid, enum mlxsw_reg_spms_state state)
 215 {
 216         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 217         char *spms_pl;
 218         int err;
 219
 220         spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
 221         if (!spms_pl)
 222                 return -ENOMEM;
 223         mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
 224         mlxsw_reg_spms_vid_pack(spms_pl, vid, state);
 225         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
 226         kfree(spms_pl);
 227         return err;
 228 }
 229
 230 static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
 231 {
 232         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 233         char pmtu_pl[MLXSW_REG_PMTU_LEN];
 234         int max_mtu;
 235         int err;
 236
 237         mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
 238         mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
 239         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
 240         if (err)
 241                 return err;
 242         max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
 243
 244         if (mtu > max_mtu)
 245                 return -EINVAL;
 246
 247         mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
 248         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
 249 }
 250
 251 static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
 252                                     u8 swid)
 253 {
 254         char pspa_pl[MLXSW_REG_PSPA_LEN];
 255
 256         mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
 257         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
 258 }
 259
 260 static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
 261 {
 262         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 263
 264         return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
 265                                         swid);
 266 }
 267
 268 static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
 269                                      bool enable)
 270 {
 271         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 272         char svpe_pl[MLXSW_REG_SVPE_LEN];
 273
 274         mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
 275         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
 276 }
 277
 278 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
 279                                  enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
 280                                  u16 vid)
 281 {
 282         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 283         char svfa_pl[MLXSW_REG_SVFA_LEN];
 284
 285         mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
 286                             fid, vid);
 287         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
 288 }
 289
 290 static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
 291                                           u16 vid, bool learn_enable)
 292 {
 293         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 294         char *spvmlr_pl;
 295         int err;
 296
 297         spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
 298         if (!spvmlr_pl)
 299                 return -ENOMEM;
 300         mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
 301                               learn_enable);
 302         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
 303         kfree(spvmlr_pl);
 304         return err;
 305 }
 306
 307 static int
 308 mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
 309 {
 310         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 311         char sspr_pl[MLXSW_REG_SSPR_LEN];
 312
 313         mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
 314         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
 315 }
 316
 317 static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
 318                                          u8 local_port, u8 *p_module,
 319                                          u8 *p_width, u8 *p_lane)
 320 {
 321         char pmlp_pl[MLXSW_REG_PMLP_LEN];
 322         int err;
 323
 324         mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
 325         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
 326         if (err)
 327                 return err;
 328         *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
 329         *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
 330         *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
 331         return 0;
 332 }
 333
 334 static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
 335                                     u8 module, u8 width, u8 lane)
 336 {
 337         char pmlp_pl[MLXSW_REG_PMLP_LEN];
 338         int i;
 339
 340         mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
 341         mlxsw_reg_pmlp_width_set(pmlp_pl, width);
 342         for (i = 0; i < width; i++) {
 343                 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
 344                 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i);  /* Rx & Tx */
 345         }
 346
 347         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
 348 }
 349
 350 static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
 351 {
 352         char pmlp_pl[MLXSW_REG_PMLP_LEN];
 353
 354         mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
 355         mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
 356         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
 357 }
 358
 359 static int mlxsw_sp_port_open(struct net_device *dev)
 360 {
 361         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 362         int err;
 363
 364         err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
 365         if (err)
 366                 return err;
 367         netif_start_queue(dev);
 368         return 0;
 369 }
 370
 371 static int mlxsw_sp_port_stop(struct net_device *dev)
 372 {
 373         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 374
 375         netif_stop_queue(dev);
 376         return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
 377 }
 378
 379 static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
 380                                       struct net_device *dev)
 381 {
 382         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 383         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 384         struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
 385         const struct mlxsw_tx_info tx_info = {
 386                 .local_port = mlxsw_sp_port->local_port,
 387                 .is_emad = false,
 388         };
 389         u64 len;
 390         int err;
 391
 392         if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
 393                 return NETDEV_TX_BUSY;
 394
 395         if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
 396                 struct sk_buff *skb_orig = skb;
 397
 398                 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
 399                 if (!skb) {
 400                         this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
 401                         dev_kfree_skb_any(skb_orig);
 402                         return NETDEV_TX_OK;
 403                 }
 404         }
 405
 406         if (eth_skb_pad(skb)) {
 407                 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
 408                 return NETDEV_TX_OK;
 409         }
 410
 411         mlxsw_sp_txhdr_construct(skb, &tx_info);
 412         len = skb->len;
 413         /* Due to a race we might fail here because of a full queue. In that
 414          * unlikely case we simply drop the packet.
 415          */
 416         err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
 417
 418         if (!err) {
 419                 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
 420                 u64_stats_update_begin(&pcpu_stats->syncp);
 421                 pcpu_stats->tx_packets++;
 422                 pcpu_stats->tx_bytes += len;
 423                 u64_stats_update_end(&pcpu_stats->syncp);
 424         } else {
 425                 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
 426                 dev_kfree_skb_any(skb);
 427         }
 428         return NETDEV_TX_OK;
 429 }
 430
 431 static void mlxsw_sp_set_rx_mode(struct net_device *dev)
 432 {
 433 }
 434
 435 static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
 436 {
 437         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 438         struct sockaddr *addr = p;
 439         int err;
 440
 441         if (!is_valid_ether_addr(addr->sa_data))
 442                 return -EADDRNOTAVAIL;
 443
 444         err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
 445         if (err)
 446                 return err;
 447         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
 448         return 0;
 449 }
 450
 451 static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
 452                                  bool pause_en, bool pfc_en, u16 delay)
 453 {
 454         u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
 455
 456         delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
 457                          MLXSW_SP_PAUSE_DELAY;
 458
 459         if (pause_en || pfc_en)
 460                 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
 461                                                     pg_size + delay, pg_size);
 462         else
 463                 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
 464 }
 465
 466 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
 467                                  u8 *prio_tc, bool pause_en,
 468                                  struct ieee_pfc *my_pfc)
 469 {
 470         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 471         u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
 472         u16 delay = !!my_pfc ? my_pfc->delay : 0;
 473         char pbmc_pl[MLXSW_REG_PBMC_LEN];
 474         int i, j, err;
 475
 476         mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
 477         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
 478         if (err)
 479                 return err;
 480
 481         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
 482                 bool configure = false;
 483                 bool pfc = false;
 484
 485                 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
 486                         if (prio_tc[j] == i) {
 487                                 pfc = pfc_en & BIT(j);
 488                                 configure = true;
 489                                 break;
 490                         }
 491                 }
 492
 493                 if (!configure)
 494                         continue;
 495                 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
 496         }
 497
 498         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
 499 }
 500
 501 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
 502                                       int mtu, bool pause_en)
 503 {
 504         u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
 505         bool dcb_en = !!mlxsw_sp_port->dcb.ets;
 506         struct ieee_pfc *my_pfc;
 507         u8 *prio_tc;
 508
 509         prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
 510         my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
 511
 512         return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
 513                                             pause_en, my_pfc);
 514 }
 515
 516 static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
 517 {
 518         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 519         bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
 520         int err;
 521
 522         err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
 523         if (err)
 524                 return err;
 525         err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
 526         if (err)
 527                 goto err_port_mtu_set;
 528         dev->mtu = mtu;
 529         return 0;
 530
 531 err_port_mtu_set:
 532         mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
 533         return err;
 534 }
 535
 536 static struct rtnl_link_stats64 *
 537 mlxsw_sp_port_get_stats64(struct net_device *dev,
 538                           struct rtnl_link_stats64 *stats)
 539 {
 540         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 541         struct mlxsw_sp_port_pcpu_stats *p;
 542         u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
 543         u32 tx_dropped = 0;
 544         unsigned int start;
 545         int i;
 546
 547         for_each_possible_cpu(i) {
 548                 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
 549                 do {
 550                         start = u64_stats_fetch_begin_irq(&p->syncp);
 551                         rx_packets      = p->rx_packets;
 552                         rx_bytes        = p->rx_bytes;
 553                         tx_packets      = p->tx_packets;
 554                         tx_bytes        = p->tx_bytes;
 555                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 556
 557                 stats->rx_packets       += rx_packets;
 558                 stats->rx_bytes         += rx_bytes;
 559                 stats->tx_packets       += tx_packets;
 560                 stats->tx_bytes         += tx_bytes;
 561                 /* tx_dropped is u32, updated without syncp protection. */
 562                 tx_dropped      += p->tx_dropped;
 563         }
 564         stats->tx_dropped       = tx_dropped;
 565         return stats;
 566 }
 567
 568 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
 569                            u16 vid_end, bool is_member, bool untagged)
 570 {
 571         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 572         char *spvm_pl;
 573         int err;
 574
 575         spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
 576         if (!spvm_pl)
 577                 return -ENOMEM;
 578
 579         mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
 580                             vid_end, is_member, untagged);
 581         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
 582         kfree(spvm_pl);
 583         return err;
 584 }
 585
 586 static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
 587 {
 588         enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
 589         u16 vid, last_visited_vid;
 590         int err;
 591
 592         for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
 593                 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
 594                                                    vid);
 595                 if (err) {
 596                         last_visited_vid = vid;
 597                         goto err_port_vid_to_fid_set;
 598                 }
 599         }
 600
 601         err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
 602         if (err) {
 603                 last_visited_vid = VLAN_N_VID;
 604                 goto err_port_vid_to_fid_set;
 605         }
 606
 607         return 0;
 608
 609 err_port_vid_to_fid_set:
 610         for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
 611                 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
 612                                              vid);
 613         return err;
 614 }
 615
 616 static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
 617 {
 618         enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
 619         u16 vid;
 620         int err;
 621
 622         err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
 623         if (err)
 624                 return err;
 625
 626         for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
 627                 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
 628                                                    vid, vid);
 629                 if (err)
 630                         return err;
 631         }
 632
 633         return 0;
 634 }
 635
 636 static struct mlxsw_sp_vfid *
 637 mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp, u16 vid)
 638 {
 639         struct mlxsw_sp_vfid *vfid;
 640
 641         list_for_each_entry(vfid, &mlxsw_sp->port_vfids.list, list) {
 642                 if (vfid->vid == vid)
 643                         return vfid;
 644         }
 645
 646         return NULL;
 647 }
 648
 649 static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
 650 {
 651         return find_first_zero_bit(mlxsw_sp->port_vfids.mapped,
 652                                    MLXSW_SP_VFID_PORT_MAX);
 653 }
 654
 655 static int __mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp, u16 vfid)
 656 {
 657         u16 fid = mlxsw_sp_vfid_to_fid(vfid);
 658         char sfmr_pl[MLXSW_REG_SFMR_LEN];
 659
 660         mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_CREATE_FID, fid, 0);
 661         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
 662 }
 663
 664 static void __mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp, u16 vfid)
 665 {
 666         u16 fid = mlxsw_sp_vfid_to_fid(vfid);
 667         char sfmr_pl[MLXSW_REG_SFMR_LEN];
 668
 669         mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_DESTROY_FID, fid, 0);
 670         mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
 671 }
 672
 673 static struct mlxsw_sp_vfid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
 674                                                   u16 vid)
 675 {
 676         struct device *dev = mlxsw_sp->bus_info->dev;
 677         struct mlxsw_sp_vfid *vfid;
 678         u16 n_vfid;
 679         int err;
 680
 681         n_vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
 682         if (n_vfid == MLXSW_SP_VFID_PORT_MAX) {
 683                 dev_err(dev, "No available vFIDs\n");
 684                 return ERR_PTR(-ERANGE);
 685         }
 686
 687         err = __mlxsw_sp_vfid_create(mlxsw_sp, n_vfid);
 688         if (err) {
 689                 dev_err(dev, "Failed to create vFID=%d\n", n_vfid);
 690                 return ERR_PTR(err);
 691         }
 692
 693         vfid = kzalloc(sizeof(*vfid), GFP_KERNEL);
 694         if (!vfid)
 695                 goto err_allocate_vfid;
 696
 697         vfid->vfid = n_vfid;
 698         vfid->vid = vid;
 699
 700         list_add(&vfid->list, &mlxsw_sp->port_vfids.list);
 701         set_bit(n_vfid, mlxsw_sp->port_vfids.mapped);
 702
 703         return vfid;
 704
 705 err_allocate_vfid:
 706         __mlxsw_sp_vfid_destroy(mlxsw_sp, n_vfid);
 707         return ERR_PTR(-ENOMEM);
 708 }
 709
 710 static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
 711                                   struct mlxsw_sp_vfid *vfid)
 712 {
 713         clear_bit(vfid->vfid, mlxsw_sp->port_vfids.mapped);
 714         list_del(&vfid->list);
 715
 716         __mlxsw_sp_vfid_destroy(mlxsw_sp, vfid->vfid);
 717
 718         kfree(vfid);
 719 }
 720
 721 static struct mlxsw_sp_port *
 722 mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port,
 723                            struct mlxsw_sp_vfid *vfid)
 724 {
 725         struct mlxsw_sp_port *mlxsw_sp_vport;
 726
 727         mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
 728         if (!mlxsw_sp_vport)
 729                 return NULL;
 730
 731         /* dev will be set correctly after the VLAN device is linked
 732          * with the real device. In case of bridge SELF invocation, dev
 733          * will remain as is.
 734          */
 735         mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
 736         mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 737         mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
 738         mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
 739         mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
 740         mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
 741         mlxsw_sp_vport->vport.vfid = vfid;
 742         mlxsw_sp_vport->vport.vid = vfid->vid;
 743
 744         list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
 745
 746         return mlxsw_sp_vport;
 747 }
 748
 749 static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
 750 {
 751         list_del(&mlxsw_sp_vport->vport.list);
 752         kfree(mlxsw_sp_vport);
 753 }
 754
 755 int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
 756                           u16 vid)
 757 {
 758         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 759         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 760         struct mlxsw_sp_port *mlxsw_sp_vport;
 761         struct mlxsw_sp_vfid *vfid;
 762         int err;
 763
 764         /* VLAN 0 is added to HW filter when device goes up, but it is
 765          * reserved in our case, so simply return.
 766          */
 767         if (!vid)
 768                 return 0;
 769
 770         if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid)) {
 771                 netdev_warn(dev, "VID=%d already configured\n", vid);
 772                 return 0;
 773         }
 774
 775         vfid = mlxsw_sp_vfid_find(mlxsw_sp, vid);
 776         if (!vfid) {
 777                 vfid = mlxsw_sp_vfid_create(mlxsw_sp, vid);
 778                 if (IS_ERR(vfid)) {
 779                         netdev_err(dev, "Failed to create vFID for VID=%d\n",
 780                                    vid);
 781                         return PTR_ERR(vfid);
 782                 }
 783         }
 784
 785         mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vfid);
 786         if (!mlxsw_sp_vport) {
 787                 netdev_err(dev, "Failed to create vPort for VID=%d\n", vid);
 788                 err = -ENOMEM;
 789                 goto err_port_vport_create;
 790         }
 791
 792         if (!vfid->nr_vports) {
 793                 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid,
 794                                                true);
 795                 if (err) {
 796                         netdev_err(dev, "Failed to setup flooding for vFID=%d\n",
 797                                    vfid->vfid);
 798                         goto err_vport_flood_set;
 799                 }
 800         }
 801
 802         /* When adding the first VLAN interface on a bridged port we need to
 803          * transition all the active 802.1Q bridge VLANs to use explicit
 804          * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
 805          */
 806         if (list_is_singular(&mlxsw_sp_port->vports_list)) {
 807                 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
 808                 if (err) {
 809                         netdev_err(dev, "Failed to set to Virtual mode\n");
 810                         goto err_port_vp_mode_trans;
 811                 }
 812         }
 813
 814         err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
 815                                            MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
 816                                            true,
 817                                            mlxsw_sp_vfid_to_fid(vfid->vfid),
 818                                            vid);
 819         if (err) {
 820                 netdev_err(dev, "Failed to map {Port, VID=%d} to vFID=%d\n",
 821                            vid, vfid->vfid);
 822                 goto err_port_vid_to_fid_set;
 823         }
 824
 825         err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
 826         if (err) {
 827                 netdev_err(dev, "Failed to disable learning for VID=%d\n", vid);
 828                 goto err_port_vid_learning_set;
 829         }
 830
 831         err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, false);
 832         if (err) {
 833                 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
 834                            vid);
 835                 goto err_port_add_vid;
 836         }
 837
 838         err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
 839                                           MLXSW_REG_SPMS_STATE_FORWARDING);
 840         if (err) {
 841                 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
 842                 goto err_port_stp_state_set;
 843         }
 844
 845         vfid->nr_vports++;
 846
 847         return 0;
 848
 849 err_port_stp_state_set:
 850         mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
 851 err_port_add_vid:
 852         mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
 853 err_port_vid_learning_set:
 854         mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
 855                                      MLXSW_REG_SVFA_MT_PORT_VID_TO_FID, false,
 856                                      mlxsw_sp_vfid_to_fid(vfid->vfid), vid);
 857 err_port_vid_to_fid_set:
 858         if (list_is_singular(&mlxsw_sp_port->vports_list))
 859                 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
 860 err_port_vp_mode_trans:
 861         if (!vfid->nr_vports)
 862                 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false);
 863 err_vport_flood_set:
 864         mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
 865 err_port_vport_create:
 866         if (!vfid->nr_vports)
 867                 mlxsw_sp_vfid_destroy(mlxsw_sp, vfid);
 868         return err;
 869 }
 870
 871 int mlxsw_sp_port_kill_vid(struct net_device *dev,
 872                            __be16 __always_unused proto, u16 vid)
 873 {
 874         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 875         struct mlxsw_sp_port *mlxsw_sp_vport;
 876         struct mlxsw_sp_vfid *vfid;
 877         int err;
 878
 879         /* VLAN 0 is removed from HW filter when device goes down, but
 880          * it is reserved in our case, so simply return.
 881          */
 882         if (!vid)
 883                 return 0;
 884
 885         mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
 886         if (!mlxsw_sp_vport) {
 887                 netdev_warn(dev, "VID=%d does not exist\n", vid);
 888                 return 0;
 889         }
 890
 891         vfid = mlxsw_sp_vport->vport.vfid;
 892
 893         err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
 894                                           MLXSW_REG_SPMS_STATE_DISCARDING);
 895         if (err) {
 896                 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
 897                 return err;
 898         }
 899
 900         err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
 901         if (err) {
 902                 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
 903                            vid);
 904                 return err;
 905         }
 906
 907         err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
 908         if (err) {
 909                 netdev_err(dev, "Failed to enable learning for VID=%d\n", vid);
 910                 return err;
 911         }
 912
 913         err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
 914                                            MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
 915                                            false,
 916                                            mlxsw_sp_vfid_to_fid(vfid->vfid),
 917                                            vid);
 918         if (err) {
 919                 netdev_err(dev, "Failed to invalidate {Port, VID=%d} to vFID=%d mapping\n",
 920                            vid, vfid->vfid);
 921                 return err;
 922         }
 923
 924         /* When removing the last VLAN interface on a bridged port we need to
 925          * transition all active 802.1Q bridge VLANs to use VID to FID
 926          * mappings and set port's mode to VLAN mode.
 927          */
 928         if (list_is_singular(&mlxsw_sp_port->vports_list)) {
 929                 err = mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
 930                 if (err) {
 931                         netdev_err(dev, "Failed to set to VLAN mode\n");
 932                         return err;
 933                 }
 934         }
 935
 936         vfid->nr_vports--;
 937         mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
 938
 939         /* Destroy the vFID if no vPorts are assigned to it anymore. */
 940         if (!vfid->nr_vports)
 941                 mlxsw_sp_vfid_destroy(mlxsw_sp_port->mlxsw_sp, vfid);
 942
 943         return 0;
 944 }
 945
 946 static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
 947                                             size_t len)
 948 {
 949         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 950         u8 module = mlxsw_sp_port->mapping.module;
 951         u8 width = mlxsw_sp_port->mapping.width;
 952         u8 lane = mlxsw_sp_port->mapping.lane;
 953         int err;
 954
 955         if (!mlxsw_sp_port->split)
 956                 err = snprintf(name, len, "p%d", module + 1);
 957         else
 958                 err = snprintf(name, len, "p%ds%d", module + 1,
 959                                lane / width);
 960
 961         if (err >= len)
 962                 return -EINVAL;
 963
 964         return 0;
 965 }
 966
 967 static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
 968         .ndo_open               = mlxsw_sp_port_open,
 969         .ndo_stop               = mlxsw_sp_port_stop,
 970         .ndo_start_xmit         = mlxsw_sp_port_xmit,
 971         .ndo_set_rx_mode        = mlxsw_sp_set_rx_mode,
 972         .ndo_set_mac_address    = mlxsw_sp_port_set_mac_address,
 973         .ndo_change_mtu         = mlxsw_sp_port_change_mtu,
 974         .ndo_get_stats64        = mlxsw_sp_port_get_stats64,
 975         .ndo_vlan_rx_add_vid    = mlxsw_sp_port_add_vid,
 976         .ndo_vlan_rx_kill_vid   = mlxsw_sp_port_kill_vid,
 977         .ndo_fdb_add            = switchdev_port_fdb_add,
 978         .ndo_fdb_del            = switchdev_port_fdb_del,
 979         .ndo_fdb_dump           = switchdev_port_fdb_dump,
 980         .ndo_bridge_setlink     = switchdev_port_bridge_setlink,
 981         .ndo_bridge_getlink     = switchdev_port_bridge_getlink,
 982         .ndo_bridge_dellink     = switchdev_port_bridge_dellink,
 983         .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
 984 };
 985
 986 static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
 987                                       struct ethtool_drvinfo *drvinfo)
 988 {
 989         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 990         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 991
 992         strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
 993         strlcpy(drvinfo->version, mlxsw_sp_driver_version,
 994                 sizeof(drvinfo->version));
 995         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
 996                  "%d.%d.%d",
 997                  mlxsw_sp->bus_info->fw_rev.major,
 998                  mlxsw_sp->bus_info->fw_rev.minor,
 999                  mlxsw_sp->bus_info->fw_rev.subminor);
1000         strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1001                 sizeof(drvinfo->bus_info));
1002 }
1003
1004 static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1005                                          struct ethtool_pauseparam *pause)
1006 {
1007         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1008
1009         pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1010         pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1011 }
1012
1013 static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1014                                    struct ethtool_pauseparam *pause)
1015 {
1016         char pfcc_pl[MLXSW_REG_PFCC_LEN];
1017
1018         mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1019         mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1020         mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1021
1022         return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1023                                pfcc_pl);
1024 }
1025
1026 static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1027                                         struct ethtool_pauseparam *pause)
1028 {
1029         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1030         bool pause_en = pause->tx_pause || pause->rx_pause;
1031         int err;
1032
1033         if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1034                 netdev_err(dev, "PFC already enabled on port\n");
1035                 return -EINVAL;
1036         }
1037
1038         if (pause->autoneg) {
1039                 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1040                 return -EINVAL;
1041         }
1042
1043         err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1044         if (err) {
1045                 netdev_err(dev, "Failed to configure port's headroom\n");
1046                 return err;
1047         }
1048
1049         err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1050         if (err) {
1051                 netdev_err(dev, "Failed to set PAUSE parameters\n");
1052                 goto err_port_pause_configure;
1053         }
1054
1055         mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1056         mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1057
1058         return 0;
1059
1060 err_port_pause_configure:
1061         pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1062         mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1063         return err;
1064 }
1065
1066 struct mlxsw_sp_port_hw_stats {
1067         char str[ETH_GSTRING_LEN];
1068         u64 (*getter)(char *payload);
1069 };
1070
1071 static const struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
1072         {
1073                 .str = "a_frames_transmitted_ok",
1074                 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1075         },
1076         {
1077                 .str = "a_frames_received_ok",
1078                 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1079         },
1080         {
1081                 .str = "a_frame_check_sequence_errors",
1082                 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1083         },
1084         {
1085                 .str = "a_alignment_errors",
1086                 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1087         },
1088         {
1089                 .str = "a_octets_transmitted_ok",
1090                 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1091         },
1092         {
1093                 .str = "a_octets_received_ok",
1094                 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1095         },
1096         {
1097                 .str = "a_multicast_frames_xmitted_ok",
1098                 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1099         },
1100         {
1101                 .str = "a_broadcast_frames_xmitted_ok",
1102                 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1103         },
1104         {
1105                 .str = "a_multicast_frames_received_ok",
1106                 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1107         },
1108         {
1109                 .str = "a_broadcast_frames_received_ok",
1110                 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1111         },
1112         {
1113                 .str = "a_in_range_length_errors",
1114                 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1115         },
1116         {
1117                 .str = "a_out_of_range_length_field",
1118                 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1119         },
1120         {
1121                 .str = "a_frame_too_long_errors",
1122                 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1123         },
1124         {
1125                 .str = "a_symbol_error_during_carrier",
1126                 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1127         },
1128         {
1129                 .str = "a_mac_control_frames_transmitted",
1130                 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1131         },
1132         {
1133                 .str = "a_mac_control_frames_received",
1134                 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1135         },
1136         {
1137                 .str = "a_unsupported_opcodes_received",
1138                 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1139         },
1140         {
1141                 .str = "a_pause_mac_ctrl_frames_received",
1142                 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1143         },
1144         {
1145                 .str = "a_pause_mac_ctrl_frames_xmitted",
1146                 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1147         },
1148 };
1149
1150 #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1151
1152 static void mlxsw_sp_port_get_strings(struct net_device *dev,
1153                                       u32 stringset, u8 *data)
1154 {
1155         u8 *p = data;
1156         int i;
1157
1158         switch (stringset) {
1159         case ETH_SS_STATS:
1160                 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1161                         memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1162                                ETH_GSTRING_LEN);
1163                         p += ETH_GSTRING_LEN;
1164                 }
1165                 break;
1166         }
1167 }
1168
1169 static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1170                                      enum ethtool_phys_id_state state)
1171 {
1172         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1173         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1174         char mlcr_pl[MLXSW_REG_MLCR_LEN];
1175         bool active;
1176
1177         switch (state) {
1178         case ETHTOOL_ID_ACTIVE:
1179                 active = true;
1180                 break;
1181         case ETHTOOL_ID_INACTIVE:
1182                 active = false;
1183                 break;
1184         default:
1185                 return -EOPNOTSUPP;
1186         }
1187
1188         mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1189         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1190 }
1191
1192 static void mlxsw_sp_port_get_stats(struct net_device *dev,
1193                                     struct ethtool_stats *stats, u64 *data)
1194 {
1195         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1196         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1197         char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1198         int i;
1199         int err;
1200
1201         mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port,
1202                              MLXSW_REG_PPCNT_IEEE_8023_CNT, 0);
1203         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1204         for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++)
1205                 data[i] = !err ? mlxsw_sp_port_hw_stats[i].getter(ppcnt_pl) : 0;
1206 }
1207
1208 static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1209 {
1210         switch (sset) {
1211         case ETH_SS_STATS:
1212                 return MLXSW_SP_PORT_HW_STATS_LEN;
1213         default:
1214                 return -EOPNOTSUPP;
1215         }
1216 }
1217
1218 struct mlxsw_sp_port_link_mode {
1219         u32 mask;
1220         u32 supported;
1221         u32 advertised;
1222         u32 speed;
1223 };
1224
1225 static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1226         {
1227                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1228                 .supported      = SUPPORTED_100baseT_Full,
1229                 .advertised     = ADVERTISED_100baseT_Full,
1230                 .speed          = 100,
1231         },
1232         {
1233                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1234                 .speed          = 100,
1235         },
1236         {
1237                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1238                                   MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1239                 .supported      = SUPPORTED_1000baseKX_Full,
1240                 .advertised     = ADVERTISED_1000baseKX_Full,
1241                 .speed          = 1000,
1242         },
1243         {
1244                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1245                 .supported      = SUPPORTED_10000baseT_Full,
1246                 .advertised     = ADVERTISED_10000baseT_Full,
1247                 .speed          = 10000,
1248         },
1249         {
1250                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1251                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1252                 .supported      = SUPPORTED_10000baseKX4_Full,
1253                 .advertised     = ADVERTISED_10000baseKX4_Full,
1254                 .speed          = 10000,
1255         },
1256         {
1257                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1258                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1259                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1260                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1261                 .supported      = SUPPORTED_10000baseKR_Full,
1262                 .advertised     = ADVERTISED_10000baseKR_Full,
1263                 .speed          = 10000,
1264         },
1265         {
1266                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1267                 .supported      = SUPPORTED_20000baseKR2_Full,
1268                 .advertised     = ADVERTISED_20000baseKR2_Full,
1269                 .speed          = 20000,
1270         },
1271         {
1272                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1273                 .supported      = SUPPORTED_40000baseCR4_Full,
1274                 .advertised     = ADVERTISED_40000baseCR4_Full,
1275                 .speed          = 40000,
1276         },
1277         {
1278                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1279                 .supported      = SUPPORTED_40000baseKR4_Full,
1280                 .advertised     = ADVERTISED_40000baseKR4_Full,
1281                 .speed          = 40000,
1282         },
1283         {
1284                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1285                 .supported      = SUPPORTED_40000baseSR4_Full,
1286                 .advertised     = ADVERTISED_40000baseSR4_Full,
1287                 .speed          = 40000,
1288         },
1289         {
1290                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1291                 .supported      = SUPPORTED_40000baseLR4_Full,
1292                 .advertised     = ADVERTISED_40000baseLR4_Full,
1293                 .speed          = 40000,
1294         },
1295         {
1296                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1297                                   MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1298                                   MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1299                 .speed          = 25000,
1300         },
1301         {
1302                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1303                                   MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1304                                   MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1305                 .speed          = 50000,
1306         },
1307         {
1308                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1309                 .supported      = SUPPORTED_56000baseKR4_Full,
1310                 .advertised     = ADVERTISED_56000baseKR4_Full,
1311                 .speed          = 56000,
1312         },
1313         {
1314                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1315                                   MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1316                                   MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1317                                   MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1318                 .speed          = 100000,
1319         },
1320 };
1321
1322 #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1323
1324 static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1325 {
1326         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1327                               MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1328                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1329                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1330                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1331                               MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1332                 return SUPPORTED_FIBRE;
1333
1334         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1335                               MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1336                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1337                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1338                               MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1339                 return SUPPORTED_Backplane;
1340         return 0;
1341 }
1342
1343 static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1344 {
1345         u32 modes = 0;
1346         int i;
1347
1348         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1349                 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1350                         modes |= mlxsw_sp_port_link_mode[i].supported;
1351         }
1352         return modes;
1353 }
1354
1355 static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1356 {
1357         u32 modes = 0;
1358         int i;
1359
1360         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1361                 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1362                         modes |= mlxsw_sp_port_link_mode[i].advertised;
1363         }
1364         return modes;
1365 }
1366
1367 static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1368                                             struct ethtool_cmd *cmd)
1369 {
1370         u32 speed = SPEED_UNKNOWN;
1371         u8 duplex = DUPLEX_UNKNOWN;
1372         int i;
1373
1374         if (!carrier_ok)
1375                 goto out;
1376
1377         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1378                 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1379                         speed = mlxsw_sp_port_link_mode[i].speed;
1380                         duplex = DUPLEX_FULL;
1381                         break;
1382                 }
1383         }
1384 out:
1385         ethtool_cmd_speed_set(cmd, speed);
1386         cmd->duplex = duplex;
1387 }
1388
1389 static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1390 {
1391         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1392                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1393                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1394                               MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1395                 return PORT_FIBRE;
1396
1397         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1398                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1399                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1400                 return PORT_DA;
1401
1402         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1403                               MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1404                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1405                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1406                 return PORT_NONE;
1407
1408         return PORT_OTHER;
1409 }
1410
1411 static int mlxsw_sp_port_get_settings(struct net_device *dev,
1412                                       struct ethtool_cmd *cmd)
1413 {
1414         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1415         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1416         char ptys_pl[MLXSW_REG_PTYS_LEN];
1417         u32 eth_proto_cap;
1418         u32 eth_proto_admin;
1419         u32 eth_proto_oper;
1420         int err;
1421
1422         mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1423         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1424         if (err) {
1425                 netdev_err(dev, "Failed to get proto");
1426                 return err;
1427         }
1428         mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1429                               &eth_proto_admin, &eth_proto_oper);
1430
1431         cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1432                          mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
1433                          SUPPORTED_Pause | SUPPORTED_Asym_Pause;
1434         cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1435         mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1436                                         eth_proto_oper, cmd);
1437
1438         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1439         cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1440         cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1441
1442         cmd->transceiver = XCVR_INTERNAL;
1443         return 0;
1444 }
1445
1446 static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1447 {
1448         u32 ptys_proto = 0;
1449         int i;
1450
1451         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1452                 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1453                         ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1454         }
1455         return ptys_proto;
1456 }
1457
1458 static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1459 {
1460         u32 ptys_proto = 0;
1461         int i;
1462
1463         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1464                 if (speed == mlxsw_sp_port_link_mode[i].speed)
1465                         ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1466         }
1467         return ptys_proto;
1468 }
1469
1470 static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1471 {
1472         u32 ptys_proto = 0;
1473         int i;
1474
1475         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1476                 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1477                         ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1478         }
1479         return ptys_proto;
1480 }
1481
1482 static int mlxsw_sp_port_set_settings(struct net_device *dev,
1483                                       struct ethtool_cmd *cmd)
1484 {
1485         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1486         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1487         char ptys_pl[MLXSW_REG_PTYS_LEN];
1488         u32 speed;
1489         u32 eth_proto_new;
1490         u32 eth_proto_cap;
1491         u32 eth_proto_admin;
1492         bool is_up;
1493         int err;
1494
1495         speed = ethtool_cmd_speed(cmd);
1496
1497         eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1498                 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1499                 mlxsw_sp_to_ptys_speed(speed);
1500
1501         mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1502         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1503         if (err) {
1504                 netdev_err(dev, "Failed to get proto");
1505                 return err;
1506         }
1507         mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1508
1509         eth_proto_new = eth_proto_new & eth_proto_cap;
1510         if (!eth_proto_new) {
1511                 netdev_err(dev, "Not supported proto admin requested");
1512                 return -EINVAL;
1513         }
1514         if (eth_proto_new == eth_proto_admin)
1515                 return 0;
1516
1517         mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1518         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1519         if (err) {
1520                 netdev_err(dev, "Failed to set proto admin");
1521                 return err;
1522         }
1523
1524         err = mlxsw_sp_port_oper_status_get(mlxsw_sp_port, &is_up);
1525         if (err) {
1526                 netdev_err(dev, "Failed to get oper status");
1527                 return err;
1528         }
1529         if (!is_up)
1530                 return 0;
1531
1532         err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1533         if (err) {
1534                 netdev_err(dev, "Failed to set admin status");
1535                 return err;
1536         }
1537
1538         err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1539         if (err) {
1540                 netdev_err(dev, "Failed to set admin status");
1541                 return err;
1542         }
1543
1544         return 0;
1545 }
1546
1547 static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1548         .get_drvinfo            = mlxsw_sp_port_get_drvinfo,
1549         .get_link               = ethtool_op_get_link,
1550         .get_pauseparam         = mlxsw_sp_port_get_pauseparam,
1551         .set_pauseparam         = mlxsw_sp_port_set_pauseparam,
1552         .get_strings            = mlxsw_sp_port_get_strings,
1553         .set_phys_id            = mlxsw_sp_port_set_phys_id,
1554         .get_ethtool_stats      = mlxsw_sp_port_get_stats,
1555         .get_sset_count         = mlxsw_sp_port_get_sset_count,
1556         .get_settings           = mlxsw_sp_port_get_settings,
1557         .set_settings           = mlxsw_sp_port_set_settings,
1558 };
1559
1560 static int
1561 mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1562 {
1563         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1564         u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1565         char ptys_pl[MLXSW_REG_PTYS_LEN];
1566         u32 eth_proto_admin;
1567
1568         eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1569         mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1570                             eth_proto_admin);
1571         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1572 }
1573
1574 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1575                           enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1576                           bool dwrr, u8 dwrr_weight)
1577 {
1578         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1579         char qeec_pl[MLXSW_REG_QEEC_LEN];
1580
1581         mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1582                             next_index);
1583         mlxsw_reg_qeec_de_set(qeec_pl, true);
1584         mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1585         mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1586         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1587 }
1588
1589 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1590                                   enum mlxsw_reg_qeec_hr hr, u8 index,
1591                                   u8 next_index, u32 maxrate)
1592 {
1593         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1594         char qeec_pl[MLXSW_REG_QEEC_LEN];
1595
1596         mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1597                             next_index);
1598         mlxsw_reg_qeec_mase_set(qeec_pl, true);
1599         mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1600         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1601 }
1602
1603 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1604                               u8 switch_prio, u8 tclass)
1605 {
1606         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1607         char qtct_pl[MLXSW_REG_QTCT_LEN];
1608
1609         mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
1610                             tclass);
1611         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
1612 }
1613
1614 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
1615 {
1616         int err, i;
1617
1618         /* Setup the elements hierarcy, so that each TC is linked to
1619          * one subgroup, which are all member in the same group.
1620          */
1621         err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1622                                     MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
1623                                     0);
1624         if (err)
1625                 return err;
1626         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1627                 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1628                                             MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
1629                                             0, false, 0);
1630                 if (err)
1631                         return err;
1632         }
1633         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1634                 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1635                                             MLXSW_REG_QEEC_HIERARCY_TC, i, i,
1636                                             false, 0);
1637                 if (err)
1638                         return err;
1639         }
1640
1641         /* Make sure the max shaper is disabled in all hierarcies that
1642          * support it.
1643          */
1644         err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1645                                             MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
1646                                             MLXSW_REG_QEEC_MAS_DIS);
1647         if (err)
1648                 return err;
1649         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1650                 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1651                                                     MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
1652                                                     i, 0,
1653                                                     MLXSW_REG_QEEC_MAS_DIS);
1654                 if (err)
1655                         return err;
1656         }
1657         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1658                 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1659                                                     MLXSW_REG_QEEC_HIERARCY_TC,
1660                                                     i, i,
1661                                                     MLXSW_REG_QEEC_MAS_DIS);
1662                 if (err)
1663                         return err;
1664         }
1665
1666         /* Map all priorities to traffic class 0. */
1667         for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1668                 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
1669                 if (err)
1670                         return err;
1671         }
1672
1673         return 0;
1674 }
1675
1676 static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
1677                                 bool split, u8 module, u8 width, u8 lane)
1678 {
1679         struct mlxsw_sp_port *mlxsw_sp_port;
1680         struct net_device *dev;
1681         size_t bytes;
1682         int err;
1683
1684         dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
1685         if (!dev)
1686                 return -ENOMEM;
1687         mlxsw_sp_port = netdev_priv(dev);
1688         mlxsw_sp_port->dev = dev;
1689         mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
1690         mlxsw_sp_port->local_port = local_port;
1691         mlxsw_sp_port->split = split;
1692         mlxsw_sp_port->mapping.module = module;
1693         mlxsw_sp_port->mapping.width = width;
1694         mlxsw_sp_port->mapping.lane = lane;
1695         bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
1696         mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
1697         if (!mlxsw_sp_port->active_vlans) {
1698                 err = -ENOMEM;
1699                 goto err_port_active_vlans_alloc;
1700         }
1701         mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
1702         if (!mlxsw_sp_port->untagged_vlans) {
1703                 err = -ENOMEM;
1704                 goto err_port_untagged_vlans_alloc;
1705         }
1706         INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
1707
1708         mlxsw_sp_port->pcpu_stats =
1709                 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
1710         if (!mlxsw_sp_port->pcpu_stats) {
1711                 err = -ENOMEM;
1712                 goto err_alloc_stats;
1713         }
1714
1715         dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
1716         dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
1717
1718         err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
1719         if (err) {
1720                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
1721                         mlxsw_sp_port->local_port);
1722                 goto err_dev_addr_init;
1723         }
1724
1725         netif_carrier_off(dev);
1726
1727         dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
1728                          NETIF_F_HW_VLAN_CTAG_FILTER;
1729
1730         /* Each packet needs to have a Tx header (metadata) on top all other
1731          * headers.
1732          */
1733         dev->hard_header_len += MLXSW_TXHDR_LEN;
1734
1735         err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
1736         if (err) {
1737                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
1738                         mlxsw_sp_port->local_port);
1739                 goto err_port_system_port_mapping_set;
1740         }
1741
1742         err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
1743         if (err) {
1744                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
1745                         mlxsw_sp_port->local_port);
1746                 goto err_port_swid_set;
1747         }
1748
1749         err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
1750         if (err) {
1751                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
1752                         mlxsw_sp_port->local_port);
1753                 goto err_port_speed_by_width_set;
1754         }
1755
1756         err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
1757         if (err) {
1758                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
1759                         mlxsw_sp_port->local_port);
1760                 goto err_port_mtu_set;
1761         }
1762
1763         err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1764         if (err)
1765                 goto err_port_admin_status_set;
1766
1767         err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
1768         if (err) {
1769                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
1770                         mlxsw_sp_port->local_port);
1771                 goto err_port_buffers_init;
1772         }
1773
1774         err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
1775         if (err) {
1776                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
1777                         mlxsw_sp_port->local_port);
1778                 goto err_port_ets_init;
1779         }
1780
1781         /* ETS and buffers must be initialized before DCB. */
1782         err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
1783         if (err) {
1784                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
1785                         mlxsw_sp_port->local_port);
1786                 goto err_port_dcb_init;
1787         }
1788
1789         mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
1790         err = register_netdev(dev);
1791         if (err) {
1792                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
1793                         mlxsw_sp_port->local_port);
1794                 goto err_register_netdev;
1795         }
1796
1797         err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
1798                                    mlxsw_sp_port->local_port, dev,
1799                                    mlxsw_sp_port->split, module);
1800         if (err) {
1801                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
1802                         mlxsw_sp_port->local_port);
1803                 goto err_core_port_init;
1804         }
1805
1806         err = mlxsw_sp_port_vlan_init(mlxsw_sp_port);
1807         if (err)
1808                 goto err_port_vlan_init;
1809
1810         mlxsw_sp->ports[local_port] = mlxsw_sp_port;
1811         return 0;
1812
1813 err_port_vlan_init:
1814         mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
1815 err_core_port_init:
1816         unregister_netdev(dev);
1817 err_register_netdev:
1818 err_port_dcb_init:
1819 err_port_ets_init:
1820 err_port_buffers_init:
1821 err_port_admin_status_set:
1822 err_port_mtu_set:
1823 err_port_speed_by_width_set:
1824 err_port_swid_set:
1825 err_port_system_port_mapping_set:
1826 err_dev_addr_init:
1827         free_percpu(mlxsw_sp_port->pcpu_stats);
1828 err_alloc_stats:
1829         kfree(mlxsw_sp_port->untagged_vlans);
1830 err_port_untagged_vlans_alloc:
1831         kfree(mlxsw_sp_port->active_vlans);
1832 err_port_active_vlans_alloc:
1833         free_netdev(dev);
1834         return err;
1835 }
1836
1837 static void mlxsw_sp_port_vports_fini(struct mlxsw_sp_port *mlxsw_sp_port)
1838 {
1839         struct net_device *dev = mlxsw_sp_port->dev;
1840         struct mlxsw_sp_port *mlxsw_sp_vport, *tmp;
1841
1842         list_for_each_entry_safe(mlxsw_sp_vport, tmp,
1843                                  &mlxsw_sp_port->vports_list, vport.list) {
1844                 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
1845
1846                 /* vPorts created for VLAN devices should already be gone
1847                  * by now, since we unregistered the port netdev.
1848                  */
1849                 WARN_ON(is_vlan_dev(mlxsw_sp_vport->dev));
1850                 mlxsw_sp_port_kill_vid(dev, 0, vid);
1851         }
1852 }
1853
1854 static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1855 {
1856         struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
1857
1858         if (!mlxsw_sp_port)
1859                 return;
1860         mlxsw_sp->ports[local_port] = NULL;
1861         mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
1862         unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
1863         mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
1864         mlxsw_sp_port_vports_fini(mlxsw_sp_port);
1865         mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
1866         mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
1867         mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
1868         free_percpu(mlxsw_sp_port->pcpu_stats);
1869         kfree(mlxsw_sp_port->untagged_vlans);
1870         kfree(mlxsw_sp_port->active_vlans);
1871         free_netdev(mlxsw_sp_port->dev);
1872 }
1873
1874 static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
1875 {
1876         int i;
1877
1878         for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
1879                 mlxsw_sp_port_remove(mlxsw_sp, i);
1880         kfree(mlxsw_sp->ports);
1881 }
1882
1883 static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
1884 {
1885         u8 module, width, lane;
1886         size_t alloc_size;
1887         int i;
1888         int err;
1889
1890         alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
1891         mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
1892         if (!mlxsw_sp->ports)
1893                 return -ENOMEM;
1894
1895         for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
1896                 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
1897                                                     &width, &lane);
1898                 if (err)
1899                         goto err_port_module_info_get;
1900                 if (!width)
1901                         continue;
1902                 mlxsw_sp->port_to_module[i] = module;
1903                 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
1904                                            lane);
1905                 if (err)
1906                         goto err_port_create;
1907         }
1908         return 0;
1909
1910 err_port_create:
1911 err_port_module_info_get:
1912         for (i--; i >= 1; i--)
1913                 mlxsw_sp_port_remove(mlxsw_sp, i);
1914         kfree(mlxsw_sp->ports);
1915         return err;
1916 }
1917
1918 static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
1919 {
1920         u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
1921
1922         return local_port - offset;
1923 }
1924
1925 static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
1926                                       u8 module, unsigned int count)
1927 {
1928         u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
1929         int err, i;
1930
1931         for (i = 0; i < count; i++) {
1932                 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
1933                                                width, i * width);
1934                 if (err)
1935                         goto err_port_module_map;
1936         }
1937
1938         for (i = 0; i < count; i++) {
1939                 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
1940                 if (err)
1941                         goto err_port_swid_set;
1942         }
1943
1944         for (i = 0; i < count; i++) {
1945                 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
1946                                            module, width, i * width);
1947                 if (err)
1948                         goto err_port_create;
1949         }
1950
1951         return 0;
1952
1953 err_port_create:
1954         for (i--; i >= 0; i--)
1955                 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
1956         i = count;
1957 err_port_swid_set:
1958         for (i--; i >= 0; i--)
1959                 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
1960                                          MLXSW_PORT_SWID_DISABLED_PORT);
1961         i = count;
1962 err_port_module_map:
1963         for (i--; i >= 0; i--)
1964                 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
1965         return err;
1966 }
1967
1968 static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
1969                                          u8 base_port, unsigned int count)
1970 {
1971         u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
1972         int i;
1973
1974         /* Split by four means we need to re-create two ports, otherwise
1975          * only one.
1976          */
1977         count = count / 2;
1978
1979         for (i = 0; i < count; i++) {
1980                 local_port = base_port + i * 2;
1981                 module = mlxsw_sp->port_to_module[local_port];
1982
1983                 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
1984                                          0);
1985         }
1986
1987         for (i = 0; i < count; i++)
1988                 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
1989
1990         for (i = 0; i < count; i++) {
1991                 local_port = base_port + i * 2;
1992                 module = mlxsw_sp->port_to_module[local_port];
1993
1994                 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
1995                                      width, 0);
1996         }
1997 }
1998
1999 static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2000                                unsigned int count)
2001 {
2002         struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2003         struct mlxsw_sp_port *mlxsw_sp_port;
2004         u8 module, cur_width, base_port;
2005         int i;
2006         int err;
2007
2008         mlxsw_sp_port = mlxsw_sp->ports[local_port];
2009         if (!mlxsw_sp_port) {
2010                 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2011                         local_port);
2012                 return -EINVAL;
2013         }
2014
2015         module = mlxsw_sp_port->mapping.module;
2016         cur_width = mlxsw_sp_port->mapping.width;
2017
2018         if (count != 2 && count != 4) {
2019                 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2020                 return -EINVAL;
2021         }
2022
2023         if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2024                 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2025                 return -EINVAL;
2026         }
2027
2028         /* Make sure we have enough slave (even) ports for the split. */
2029         if (count == 2) {
2030                 base_port = local_port;
2031                 if (mlxsw_sp->ports[base_port + 1]) {
2032                         netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2033                         return -EINVAL;
2034                 }
2035         } else {
2036                 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2037                 if (mlxsw_sp->ports[base_port + 1] ||
2038                     mlxsw_sp->ports[base_port + 3]) {
2039                         netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2040                         return -EINVAL;
2041                 }
2042         }
2043
2044         for (i = 0; i < count; i++)
2045                 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2046
2047         err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2048         if (err) {
2049                 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2050                 goto err_port_split_create;
2051         }
2052
2053         return 0;
2054
2055 err_port_split_create:
2056         mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2057         return err;
2058 }
2059
2060 static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
2061 {
2062         struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2063         struct mlxsw_sp_port *mlxsw_sp_port;
2064         u8 cur_width, base_port;
2065         unsigned int count;
2066         int i;
2067
2068         mlxsw_sp_port = mlxsw_sp->ports[local_port];
2069         if (!mlxsw_sp_port) {
2070                 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2071                         local_port);
2072                 return -EINVAL;
2073         }
2074
2075         if (!mlxsw_sp_port->split) {
2076                 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2077                 return -EINVAL;
2078         }
2079
2080         cur_width = mlxsw_sp_port->mapping.width;
2081         count = cur_width == 1 ? 4 : 2;
2082
2083         base_port = mlxsw_sp_cluster_base_port_get(local_port);
2084
2085         /* Determine which ports to remove. */
2086         if (count == 2 && local_port >= base_port + 2)
2087                 base_port = base_port + 2;
2088
2089         for (i = 0; i < count; i++)
2090                 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2091
2092         mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
2093
2094         return 0;
2095 }
2096
2097 static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2098                                      char *pude_pl, void *priv)
2099 {
2100         struct mlxsw_sp *mlxsw_sp = priv;
2101         struct mlxsw_sp_port *mlxsw_sp_port;
2102         enum mlxsw_reg_pude_oper_status status;
2103         u8 local_port;
2104
2105         local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2106         mlxsw_sp_port = mlxsw_sp->ports[local_port];
2107         if (!mlxsw_sp_port) {
2108                 dev_warn(mlxsw_sp->bus_info->dev, "Port %d: Link event received for non-existent port\n",
2109                          local_port);
2110                 return;
2111         }
2112
2113         status = mlxsw_reg_pude_oper_status_get(pude_pl);
2114         if (status == MLXSW_PORT_OPER_STATUS_UP) {
2115                 netdev_info(mlxsw_sp_port->dev, "link up\n");
2116                 netif_carrier_on(mlxsw_sp_port->dev);
2117         } else {
2118                 netdev_info(mlxsw_sp_port->dev, "link down\n");
2119                 netif_carrier_off(mlxsw_sp_port->dev);
2120         }
2121 }
2122
2123 static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2124         .func = mlxsw_sp_pude_event_func,
2125         .trap_id = MLXSW_TRAP_ID_PUDE,
2126 };
2127
2128 static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2129                                    enum mlxsw_event_trap_id trap_id)
2130 {
2131         struct mlxsw_event_listener *el;
2132         char hpkt_pl[MLXSW_REG_HPKT_LEN];
2133         int err;
2134
2135         switch (trap_id) {
2136         case MLXSW_TRAP_ID_PUDE:
2137                 el = &mlxsw_sp_pude_event;
2138                 break;
2139         }
2140         err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2141         if (err)
2142                 return err;
2143
2144         mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2145         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2146         if (err)
2147                 goto err_event_trap_set;
2148
2149         return 0;
2150
2151 err_event_trap_set:
2152         mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2153         return err;
2154 }
2155
2156 static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2157                                       enum mlxsw_event_trap_id trap_id)
2158 {
2159         struct mlxsw_event_listener *el;
2160
2161         switch (trap_id) {
2162         case MLXSW_TRAP_ID_PUDE:
2163                 el = &mlxsw_sp_pude_event;
2164                 break;
2165         }
2166         mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2167 }
2168
2169 static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2170                                       void *priv)
2171 {
2172         struct mlxsw_sp *mlxsw_sp = priv;
2173         struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2174         struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2175
2176         if (unlikely(!mlxsw_sp_port)) {
2177                 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2178                                      local_port);
2179                 return;
2180         }
2181
2182         skb->dev = mlxsw_sp_port->dev;
2183
2184         pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2185         u64_stats_update_begin(&pcpu_stats->syncp);
2186         pcpu_stats->rx_packets++;
2187         pcpu_stats->rx_bytes += skb->len;
2188         u64_stats_update_end(&pcpu_stats->syncp);
2189
2190         skb->protocol = eth_type_trans(skb, skb->dev);
2191         netif_receive_skb(skb);
2192 }
2193
2194 static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
2195         {
2196                 .func = mlxsw_sp_rx_listener_func,
2197                 .local_port = MLXSW_PORT_DONT_CARE,
2198                 .trap_id = MLXSW_TRAP_ID_FDB_MC,
2199         },
2200         /* Traps for specific L2 packet types, not trapped as FDB MC */
2201         {
2202                 .func = mlxsw_sp_rx_listener_func,
2203                 .local_port = MLXSW_PORT_DONT_CARE,
2204                 .trap_id = MLXSW_TRAP_ID_STP,
2205         },
2206         {
2207                 .func = mlxsw_sp_rx_listener_func,
2208                 .local_port = MLXSW_PORT_DONT_CARE,
2209                 .trap_id = MLXSW_TRAP_ID_LACP,
2210         },
2211         {
2212                 .func = mlxsw_sp_rx_listener_func,
2213                 .local_port = MLXSW_PORT_DONT_CARE,
2214                 .trap_id = MLXSW_TRAP_ID_EAPOL,
2215         },
2216         {
2217                 .func = mlxsw_sp_rx_listener_func,
2218                 .local_port = MLXSW_PORT_DONT_CARE,
2219                 .trap_id = MLXSW_TRAP_ID_LLDP,
2220         },
2221         {
2222                 .func = mlxsw_sp_rx_listener_func,
2223                 .local_port = MLXSW_PORT_DONT_CARE,
2224                 .trap_id = MLXSW_TRAP_ID_MMRP,
2225         },
2226         {
2227                 .func = mlxsw_sp_rx_listener_func,
2228                 .local_port = MLXSW_PORT_DONT_CARE,
2229                 .trap_id = MLXSW_TRAP_ID_MVRP,
2230         },
2231         {
2232                 .func = mlxsw_sp_rx_listener_func,
2233                 .local_port = MLXSW_PORT_DONT_CARE,
2234                 .trap_id = MLXSW_TRAP_ID_RPVST,
2235         },
2236         {
2237                 .func = mlxsw_sp_rx_listener_func,
2238                 .local_port = MLXSW_PORT_DONT_CARE,
2239                 .trap_id = MLXSW_TRAP_ID_DHCP,
2240         },
2241         {
2242                 .func = mlxsw_sp_rx_listener_func,
2243                 .local_port = MLXSW_PORT_DONT_CARE,
2244                 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
2245         },
2246         {
2247                 .func = mlxsw_sp_rx_listener_func,
2248                 .local_port = MLXSW_PORT_DONT_CARE,
2249                 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
2250         },
2251         {
2252                 .func = mlxsw_sp_rx_listener_func,
2253                 .local_port = MLXSW_PORT_DONT_CARE,
2254                 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
2255         },
2256         {
2257                 .func = mlxsw_sp_rx_listener_func,
2258                 .local_port = MLXSW_PORT_DONT_CARE,
2259                 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
2260         },
2261         {
2262                 .func = mlxsw_sp_rx_listener_func,
2263                 .local_port = MLXSW_PORT_DONT_CARE,
2264                 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
2265         },
2266 };
2267
2268 static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2269 {
2270         char htgt_pl[MLXSW_REG_HTGT_LEN];
2271         char hpkt_pl[MLXSW_REG_HPKT_LEN];
2272         int i;
2273         int err;
2274
2275         mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2276         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2277         if (err)
2278                 return err;
2279
2280         mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2281         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2282         if (err)
2283                 return err;
2284
2285         for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2286                 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2287                                                       &mlxsw_sp_rx_listener[i],
2288                                                       mlxsw_sp);
2289                 if (err)
2290                         goto err_rx_listener_register;
2291
2292                 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
2293                                     mlxsw_sp_rx_listener[i].trap_id);
2294                 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2295                 if (err)
2296                         goto err_rx_trap_set;
2297         }
2298         return 0;
2299
2300 err_rx_trap_set:
2301         mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2302                                           &mlxsw_sp_rx_listener[i],
2303                                           mlxsw_sp);
2304 err_rx_listener_register:
2305         for (i--; i >= 0; i--) {
2306                 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
2307                                     mlxsw_sp_rx_listener[i].trap_id);
2308                 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2309
2310                 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2311                                                   &mlxsw_sp_rx_listener[i],
2312                                                   mlxsw_sp);
2313         }
2314         return err;
2315 }
2316
2317 static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2318 {
2319         char hpkt_pl[MLXSW_REG_HPKT_LEN];
2320         int i;
2321
2322         for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2323                 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
2324                                     mlxsw_sp_rx_listener[i].trap_id);
2325                 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2326
2327                 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2328                                                   &mlxsw_sp_rx_listener[i],
2329                                                   mlxsw_sp);
2330         }
2331 }
2332
2333 static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2334                                  enum mlxsw_reg_sfgc_type type,
2335                                  enum mlxsw_reg_sfgc_bridge_type bridge_type)
2336 {
2337         enum mlxsw_flood_table_type table_type;
2338         enum mlxsw_sp_flood_table flood_table;
2339         char sfgc_pl[MLXSW_REG_SFGC_LEN];
2340
2341         if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
2342                 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
2343         else
2344                 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
2345
2346         if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2347                 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2348         else
2349                 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
2350
2351         mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2352                             flood_table);
2353         return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2354 }
2355
2356 static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2357 {
2358         int type, err;
2359
2360         for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2361                 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2362                         continue;
2363
2364                 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2365                                             MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2366                 if (err)
2367                         return err;
2368
2369                 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2370                                             MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2371                 if (err)
2372                         return err;
2373         }
2374
2375         return 0;
2376 }
2377
2378 static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2379 {
2380         char slcr_pl[MLXSW_REG_SLCR_LEN];
2381
2382         mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2383                                      MLXSW_REG_SLCR_LAG_HASH_DMAC |
2384                                      MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2385                                      MLXSW_REG_SLCR_LAG_HASH_VLANID |
2386                                      MLXSW_REG_SLCR_LAG_HASH_SIP |
2387                                      MLXSW_REG_SLCR_LAG_HASH_DIP |
2388                                      MLXSW_REG_SLCR_LAG_HASH_SPORT |
2389                                      MLXSW_REG_SLCR_LAG_HASH_DPORT |
2390                                      MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2391         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2392 }
2393
2394 static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
2395                          const struct mlxsw_bus_info *mlxsw_bus_info)
2396 {
2397         struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2398         int err;
2399
2400         mlxsw_sp->core = mlxsw_core;
2401         mlxsw_sp->bus_info = mlxsw_bus_info;
2402         INIT_LIST_HEAD(&mlxsw_sp->port_vfids.list);
2403         INIT_LIST_HEAD(&mlxsw_sp->br_vfids.list);
2404         INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
2405
2406         err = mlxsw_sp_base_mac_get(mlxsw_sp);
2407         if (err) {
2408                 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2409                 return err;
2410         }
2411
2412         err = mlxsw_sp_ports_create(mlxsw_sp);
2413         if (err) {
2414                 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2415                 return err;
2416         }
2417
2418         err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2419         if (err) {
2420                 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
2421                 goto err_event_register;
2422         }
2423
2424         err = mlxsw_sp_traps_init(mlxsw_sp);
2425         if (err) {
2426                 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2427                 goto err_rx_listener_register;
2428         }
2429
2430         err = mlxsw_sp_flood_init(mlxsw_sp);
2431         if (err) {
2432                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2433                 goto err_flood_init;
2434         }
2435
2436         err = mlxsw_sp_buffers_init(mlxsw_sp);
2437         if (err) {
2438                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2439                 goto err_buffers_init;
2440         }
2441
2442         err = mlxsw_sp_lag_init(mlxsw_sp);
2443         if (err) {
2444                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2445                 goto err_lag_init;
2446         }
2447
2448         err = mlxsw_sp_switchdev_init(mlxsw_sp);
2449         if (err) {
2450                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2451                 goto err_switchdev_init;
2452         }
2453
2454         return 0;
2455
2456 err_switchdev_init:
2457 err_lag_init:
2458         mlxsw_sp_buffers_fini(mlxsw_sp);
2459 err_buffers_init:
2460 err_flood_init:
2461         mlxsw_sp_traps_fini(mlxsw_sp);
2462 err_rx_listener_register:
2463         mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2464 err_event_register:
2465         mlxsw_sp_ports_remove(mlxsw_sp);
2466         return err;
2467 }
2468
2469 static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
2470 {
2471         struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2472
2473         mlxsw_sp_switchdev_fini(mlxsw_sp);
2474         mlxsw_sp_buffers_fini(mlxsw_sp);
2475         mlxsw_sp_traps_fini(mlxsw_sp);
2476         mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2477         mlxsw_sp_ports_remove(mlxsw_sp);
2478 }
2479
2480 static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2481         .used_max_vepa_channels         = 1,
2482         .max_vepa_channels              = 0,
2483         .used_max_lag                   = 1,
2484         .max_lag                        = MLXSW_SP_LAG_MAX,
2485         .used_max_port_per_lag          = 1,
2486         .max_port_per_lag               = MLXSW_SP_PORT_PER_LAG_MAX,
2487         .used_max_mid                   = 1,
2488         .max_mid                        = MLXSW_SP_MID_MAX,
2489         .used_max_pgt                   = 1,
2490         .max_pgt                        = 0,
2491         .used_max_system_port           = 1,
2492         .max_system_port                = 64,
2493         .used_max_vlan_groups           = 1,
2494         .max_vlan_groups                = 127,
2495         .used_max_regions               = 1,
2496         .max_regions                    = 400,
2497         .used_flood_tables              = 1,
2498         .used_flood_mode                = 1,
2499         .flood_mode                     = 3,
2500         .max_fid_offset_flood_tables    = 2,
2501         .fid_offset_flood_table_size    = VLAN_N_VID - 1,
2502         .max_fid_flood_tables           = 2,
2503         .fid_flood_table_size           = MLXSW_SP_VFID_MAX,
2504         .used_max_ib_mc                 = 1,
2505         .max_ib_mc                      = 0,
2506         .used_max_pkey                  = 1,
2507         .max_pkey                       = 0,
2508         .swid_config                    = {
2509                 {
2510                         .used_type      = 1,
2511                         .type           = MLXSW_PORT_SWID_TYPE_ETH,
2512                 }
2513         },
2514 };
2515
2516 static struct mlxsw_driver mlxsw_sp_driver = {
2517         .kind                           = MLXSW_DEVICE_KIND_SPECTRUM,
2518         .owner                          = THIS_MODULE,
2519         .priv_size                      = sizeof(struct mlxsw_sp),
2520         .init                           = mlxsw_sp_init,
2521         .fini                           = mlxsw_sp_fini,
2522         .port_split                     = mlxsw_sp_port_split,
2523         .port_unsplit                   = mlxsw_sp_port_unsplit,
2524         .sb_pool_get                    = mlxsw_sp_sb_pool_get,
2525         .sb_pool_set                    = mlxsw_sp_sb_pool_set,
2526         .sb_port_pool_get               = mlxsw_sp_sb_port_pool_get,
2527         .sb_port_pool_set               = mlxsw_sp_sb_port_pool_set,
2528         .sb_tc_pool_bind_get            = mlxsw_sp_sb_tc_pool_bind_get,
2529         .sb_tc_pool_bind_set            = mlxsw_sp_sb_tc_pool_bind_set,
2530         .sb_occ_snapshot                = mlxsw_sp_sb_occ_snapshot,
2531         .sb_occ_max_clear               = mlxsw_sp_sb_occ_max_clear,
2532         .sb_occ_port_pool_get           = mlxsw_sp_sb_occ_port_pool_get,
2533         .sb_occ_tc_port_bind_get        = mlxsw_sp_sb_occ_tc_port_bind_get,
2534         .txhdr_construct                = mlxsw_sp_txhdr_construct,
2535         .txhdr_len                      = MLXSW_TXHDR_LEN,
2536         .profile                        = &mlxsw_sp_config_profile,
2537 };
2538
2539 static int
2540 mlxsw_sp_port_fdb_flush_by_port(const struct mlxsw_sp_port *mlxsw_sp_port)
2541 {
2542         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2543         char sfdf_pl[MLXSW_REG_SFDF_LEN];
2544
2545         mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT);
2546         mlxsw_reg_sfdf_system_port_set(sfdf_pl, mlxsw_sp_port->local_port);
2547
2548         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2549 }
2550
2551 static int
2552 mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
2553                                     u16 fid)
2554 {
2555         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2556         char sfdf_pl[MLXSW_REG_SFDF_LEN];
2557
2558         mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
2559         mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
2560         mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
2561                                                 mlxsw_sp_port->local_port);
2562
2563         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2564 }
2565
2566 static int
2567 mlxsw_sp_port_fdb_flush_by_lag_id(const struct mlxsw_sp_port *mlxsw_sp_port)
2568 {
2569         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2570         char sfdf_pl[MLXSW_REG_SFDF_LEN];
2571
2572         mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG);
2573         mlxsw_reg_sfdf_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
2574
2575         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2576 }
2577
2578 static int
2579 mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
2580                                       u16 fid)
2581 {
2582         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2583         char sfdf_pl[MLXSW_REG_SFDF_LEN];
2584
2585         mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
2586         mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
2587         mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
2588
2589         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
2590 }
2591
2592 static int
2593 __mlxsw_sp_port_fdb_flush(const struct mlxsw_sp_port *mlxsw_sp_port)
2594 {
2595         int err, last_err = 0;
2596         u16 vid;
2597
2598         for (vid = 1; vid < VLAN_N_VID - 1; vid++) {
2599                 err = mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, vid);
2600                 if (err)
2601                         last_err = err;
2602         }
2603
2604         return last_err;
2605 }
2606
2607 static int
2608 __mlxsw_sp_port_fdb_flush_lagged(const struct mlxsw_sp_port *mlxsw_sp_port)
2609 {
2610         int err, last_err = 0;
2611         u16 vid;
2612
2613         for (vid = 1; vid < VLAN_N_VID - 1; vid++) {
2614                 err = mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port, vid);
2615                 if (err)
2616                         last_err = err;
2617         }
2618
2619         return last_err;
2620 }
2621
2622 static int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port)
2623 {
2624         if (!list_empty(&mlxsw_sp_port->vports_list))
2625                 if (mlxsw_sp_port->lagged)
2626                         return __mlxsw_sp_port_fdb_flush_lagged(mlxsw_sp_port);
2627                 else
2628                         return __mlxsw_sp_port_fdb_flush(mlxsw_sp_port);
2629         else
2630                 if (mlxsw_sp_port->lagged)
2631                         return mlxsw_sp_port_fdb_flush_by_lag_id(mlxsw_sp_port);
2632                 else
2633                         return mlxsw_sp_port_fdb_flush_by_port(mlxsw_sp_port);
2634 }
2635
2636 static int mlxsw_sp_vport_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_vport)
2637 {
2638         u16 vfid = mlxsw_sp_vport_vfid_get(mlxsw_sp_vport);
2639         u16 fid = mlxsw_sp_vfid_to_fid(vfid);
2640
2641         if (mlxsw_sp_vport->lagged)
2642                 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_vport,
2643                                                              fid);
2644         else
2645                 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_vport, fid);
2646 }
2647
2648 static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2649 {
2650         return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2651 }
2652
2653 static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
2654                                          struct net_device *br_dev)
2655 {
2656         return !mlxsw_sp->master_bridge.dev ||
2657                mlxsw_sp->master_bridge.dev == br_dev;
2658 }
2659
2660 static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
2661                                        struct net_device *br_dev)
2662 {
2663         mlxsw_sp->master_bridge.dev = br_dev;
2664         mlxsw_sp->master_bridge.ref_count++;
2665 }
2666
2667 static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
2668 {
2669         if (--mlxsw_sp->master_bridge.ref_count == 0)
2670                 mlxsw_sp->master_bridge.dev = NULL;
2671 }
2672
2673 static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
2674                                      struct net_device *br_dev)
2675 {
2676         struct net_device *dev = mlxsw_sp_port->dev;
2677         int err;
2678
2679         /* When port is not bridged untagged packets are tagged with
2680          * PVID=VID=1, thereby creating an implicit VLAN interface in
2681          * the device. Remove it and let bridge code take care of its
2682          * own VLANs.
2683          */
2684         err = mlxsw_sp_port_kill_vid(dev, 0, 1);
2685         if (err)
2686                 return err;
2687
2688         mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
2689
2690         mlxsw_sp_port->learning = 1;
2691         mlxsw_sp_port->learning_sync = 1;
2692         mlxsw_sp_port->uc_flood = 1;
2693         mlxsw_sp_port->bridged = 1;
2694
2695         return 0;
2696 }
2697
2698 static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port,
2699                                        bool flush_fdb)
2700 {
2701         struct net_device *dev = mlxsw_sp_port->dev;
2702
2703         if (flush_fdb && mlxsw_sp_port_fdb_flush(mlxsw_sp_port))
2704                 netdev_err(mlxsw_sp_port->dev, "Failed to flush FDB\n");
2705
2706         mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
2707
2708         mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
2709
2710         mlxsw_sp_port->learning = 0;
2711         mlxsw_sp_port->learning_sync = 0;
2712         mlxsw_sp_port->uc_flood = 0;
2713         mlxsw_sp_port->bridged = 0;
2714
2715         /* Add implicit VLAN interface in the device, so that untagged
2716          * packets will be classified to the default vFID.
2717          */
2718         mlxsw_sp_port_add_vid(dev, 0, 1);
2719 }
2720
2721 static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
2722 {
2723         char sldr_pl[MLXSW_REG_SLDR_LEN];
2724
2725         mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
2726         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2727 }
2728
2729 static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
2730 {
2731         char sldr_pl[MLXSW_REG_SLDR_LEN];
2732
2733         mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
2734         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2735 }
2736
2737 static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
2738                                      u16 lag_id, u8 port_index)
2739 {
2740         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2741         char slcor_pl[MLXSW_REG_SLCOR_LEN];
2742
2743         mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
2744                                       lag_id, port_index);
2745         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2746 }
2747
2748 static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
2749                                         u16 lag_id)
2750 {
2751         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2752         char slcor_pl[MLXSW_REG_SLCOR_LEN];
2753
2754         mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
2755                                          lag_id);
2756         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2757 }
2758
2759 static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
2760                                         u16 lag_id)
2761 {
2762         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2763         char slcor_pl[MLXSW_REG_SLCOR_LEN];
2764
2765         mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
2766                                         lag_id);
2767         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2768 }
2769
2770 static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
2771                                          u16 lag_id)
2772 {
2773         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2774         char slcor_pl[MLXSW_REG_SLCOR_LEN];
2775
2776         mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
2777                                          lag_id);
2778         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2779 }
2780
2781 static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
2782                                   struct net_device *lag_dev,
2783                                   u16 *p_lag_id)
2784 {
2785         struct mlxsw_sp_upper *lag;
2786         int free_lag_id = -1;
2787         int i;
2788
2789         for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
2790                 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
2791                 if (lag->ref_count) {
2792                         if (lag->dev == lag_dev) {
2793                                 *p_lag_id = i;
2794                                 return 0;
2795                         }
2796                 } else if (free_lag_id < 0) {
2797                         free_lag_id = i;
2798                 }
2799         }
2800         if (free_lag_id < 0)
2801                 return -EBUSY;
2802         *p_lag_id = free_lag_id;
2803         return 0;
2804 }
2805
2806 static bool
2807 mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
2808                           struct net_device *lag_dev,
2809                           struct netdev_lag_upper_info *lag_upper_info)
2810 {
2811         u16 lag_id;
2812
2813         if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
2814                 return false;
2815         if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
2816                 return false;
2817         return true;
2818 }
2819
2820 static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
2821                                        u16 lag_id, u8 *p_port_index)
2822 {
2823         int i;
2824
2825         for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
2826                 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
2827                         *p_port_index = i;
2828                         return 0;
2829                 }
2830         }
2831         return -EBUSY;
2832 }
2833
2834 static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
2835                                   struct net_device *lag_dev)
2836 {
2837         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2838         struct mlxsw_sp_upper *lag;
2839         u16 lag_id;
2840         u8 port_index;
2841         int err;
2842
2843         err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
2844         if (err)
2845                 return err;
2846         lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
2847         if (!lag->ref_count) {
2848                 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
2849                 if (err)
2850                         return err;
2851                 lag->dev = lag_dev;
2852         }
2853
2854         err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
2855         if (err)
2856                 return err;
2857         err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
2858         if (err)
2859                 goto err_col_port_add;
2860         err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
2861         if (err)
2862                 goto err_col_port_enable;
2863
2864         mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
2865                                    mlxsw_sp_port->local_port);
2866         mlxsw_sp_port->lag_id = lag_id;
2867         mlxsw_sp_port->lagged = 1;
2868         lag->ref_count++;
2869         return 0;
2870
2871 err_col_port_enable:
2872         mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
2873 err_col_port_add:
2874         if (!lag->ref_count)
2875                 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
2876         return err;
2877 }
2878
2879 static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport,
2880                                         struct net_device *br_dev,
2881                                         bool flush_fdb);
2882
2883 static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
2884                                     struct net_device *lag_dev)
2885 {
2886         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2887         struct mlxsw_sp_port *mlxsw_sp_vport;
2888         struct mlxsw_sp_upper *lag;
2889         u16 lag_id = mlxsw_sp_port->lag_id;
2890
2891         if (!mlxsw_sp_port->lagged)
2892                 return;
2893         lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
2894         WARN_ON(lag->ref_count == 0);
2895
2896         mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
2897         mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
2898
2899         /* In case we leave a LAG device that has bridges built on top,
2900          * then their teardown sequence is never issued and we need to
2901          * invoke the necessary cleanup routines ourselves.
2902          */
2903         list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
2904                             vport.list) {
2905                 struct net_device *br_dev;
2906
2907                 if (!mlxsw_sp_vport->bridged)
2908                         continue;
2909
2910                 br_dev = mlxsw_sp_vport_br_get(mlxsw_sp_vport);
2911                 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport, br_dev, false);
2912         }
2913
2914         if (mlxsw_sp_port->bridged) {
2915                 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
2916                 mlxsw_sp_port_bridge_leave(mlxsw_sp_port, false);
2917         }
2918
2919         if (lag->ref_count == 1) {
2920                 if (mlxsw_sp_port_fdb_flush_by_lag_id(mlxsw_sp_port))
2921                         netdev_err(mlxsw_sp_port->dev, "Failed to flush FDB\n");
2922                 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
2923         }
2924
2925         mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
2926                                      mlxsw_sp_port->local_port);
2927         mlxsw_sp_port->lagged = 0;
2928         lag->ref_count--;
2929 }
2930
2931 static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
2932                                       u16 lag_id)
2933 {
2934         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2935         char sldr_pl[MLXSW_REG_SLDR_LEN];
2936
2937         mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
2938                                          mlxsw_sp_port->local_port);
2939         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2940 }
2941
2942 static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
2943                                          u16 lag_id)
2944 {
2945         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2946         char sldr_pl[MLXSW_REG_SLDR_LEN];
2947
2948         mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
2949                                             mlxsw_sp_port->local_port);
2950         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2951 }
2952
2953 static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
2954                                        bool lag_tx_enabled)
2955 {
2956         if (lag_tx_enabled)
2957                 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
2958                                                   mlxsw_sp_port->lag_id);
2959         else
2960                 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
2961                                                      mlxsw_sp_port->lag_id);
2962 }
2963
2964 static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
2965                                      struct netdev_lag_lower_state_info *info)
2966 {
2967         return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
2968 }
2969
2970 static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
2971                                    struct net_device *vlan_dev)
2972 {
2973         struct mlxsw_sp_port *mlxsw_sp_vport;
2974         u16 vid = vlan_dev_vlan_id(vlan_dev);
2975
2976         mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
2977         if (WARN_ON(!mlxsw_sp_vport))
2978                 return -EINVAL;
2979
2980         mlxsw_sp_vport->dev = vlan_dev;
2981
2982         return 0;
2983 }
2984
2985 static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
2986                                       struct net_device *vlan_dev)
2987 {
2988         struct mlxsw_sp_port *mlxsw_sp_vport;
2989         u16 vid = vlan_dev_vlan_id(vlan_dev);
2990
2991         mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
2992         if (WARN_ON(!mlxsw_sp_vport))
2993                 return;
2994
2995         /* When removing a VLAN device while still bridged we should first
2996          * remove it from the bridge, as we receive the bridge's notification
2997          * when the vPort is already gone.
2998          */
2999         if (mlxsw_sp_vport->bridged) {
3000                 struct net_device *br_dev;
3001
3002                 br_dev = mlxsw_sp_vport_br_get(mlxsw_sp_vport);
3003                 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport, br_dev, true);
3004         }
3005
3006         mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
3007 }
3008
3009 static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
3010                                                unsigned long event, void *ptr)
3011 {
3012         struct netdev_notifier_changeupper_info *info;
3013         struct mlxsw_sp_port *mlxsw_sp_port;
3014         struct net_device *upper_dev;
3015         struct mlxsw_sp *mlxsw_sp;
3016         int err = 0;
3017
3018         mlxsw_sp_port = netdev_priv(dev);
3019         mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3020         info = ptr;
3021
3022         switch (event) {
3023         case NETDEV_PRECHANGEUPPER:
3024                 upper_dev = info->upper_dev;
3025                 if (!is_vlan_dev(upper_dev) &&
3026                     !netif_is_lag_master(upper_dev) &&
3027                     !netif_is_bridge_master(upper_dev))
3028                         return -EINVAL;
3029                 if (!info->linking)
3030                         break;
3031                 /* HW limitation forbids to put ports to multiple bridges. */
3032                 if (netif_is_bridge_master(upper_dev) &&
3033                     !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
3034                         return -EINVAL;
3035                 if (netif_is_lag_master(upper_dev) &&
3036                     !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
3037                                                info->upper_info))
3038                         return -EINVAL;
3039                 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
3040                         return -EINVAL;
3041                 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
3042                     !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
3043                         return -EINVAL;
3044                 break;
3045         case NETDEV_CHANGEUPPER:
3046                 upper_dev = info->upper_dev;
3047                 if (is_vlan_dev(upper_dev)) {
3048                         if (info->linking)
3049                                 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
3050                                                               upper_dev);
3051                         else
3052                                  mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
3053                                                            upper_dev);
3054                 } else if (netif_is_bridge_master(upper_dev)) {
3055                         if (info->linking)
3056                                 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
3057                                                                 upper_dev);
3058                         else
3059                                 mlxsw_sp_port_bridge_leave(mlxsw_sp_port, true);
3060                 } else if (netif_is_lag_master(upper_dev)) {
3061                         if (info->linking)
3062                                 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
3063                                                              upper_dev);
3064                         else
3065                                 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
3066                                                         upper_dev);
3067                 } else {
3068                         err = -EINVAL;
3069                         WARN_ON(1);
3070                 }
3071                 break;
3072         }
3073
3074         return err;
3075 }
3076
3077 static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
3078                                                unsigned long event, void *ptr)
3079 {
3080         struct netdev_notifier_changelowerstate_info *info;
3081         struct mlxsw_sp_port *mlxsw_sp_port;
3082         int err;
3083
3084         mlxsw_sp_port = netdev_priv(dev);
3085         info = ptr;
3086
3087         switch (event) {
3088         case NETDEV_CHANGELOWERSTATE:
3089                 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
3090                         err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
3091                                                         info->lower_state_info);
3092                         if (err)
3093                                 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
3094                 }
3095                 break;
3096         }
3097
3098         return 0;
3099 }
3100
3101 static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
3102                                          unsigned long event, void *ptr)
3103 {
3104         switch (event) {
3105         case NETDEV_PRECHANGEUPPER:
3106         case NETDEV_CHANGEUPPER:
3107                 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
3108         case NETDEV_CHANGELOWERSTATE:
3109                 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
3110         }
3111
3112         return 0;
3113 }
3114
3115 static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
3116                                         unsigned long event, void *ptr)
3117 {
3118         struct net_device *dev;
3119         struct list_head *iter;
3120         int ret;
3121
3122         netdev_for_each_lower_dev(lag_dev, dev, iter) {
3123                 if (mlxsw_sp_port_dev_check(dev)) {
3124                         ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
3125                         if (ret)
3126                                 return ret;
3127                 }
3128         }
3129
3130         return 0;
3131 }
3132
3133 static struct mlxsw_sp_vfid *
3134 mlxsw_sp_br_vfid_find(const struct mlxsw_sp *mlxsw_sp,
3135                       const struct net_device *br_dev)
3136 {
3137         struct mlxsw_sp_vfid *vfid;
3138
3139         list_for_each_entry(vfid, &mlxsw_sp->br_vfids.list, list) {
3140                 if (vfid->br_dev == br_dev)
3141                         return vfid;
3142         }
3143
3144         return NULL;
3145 }
3146
3147 static u16 mlxsw_sp_vfid_to_br_vfid(u16 vfid)
3148 {
3149         return vfid - MLXSW_SP_VFID_PORT_MAX;
3150 }
3151
3152 static u16 mlxsw_sp_br_vfid_to_vfid(u16 br_vfid)
3153 {
3154         return MLXSW_SP_VFID_PORT_MAX + br_vfid;
3155 }
3156
3157 static u16 mlxsw_sp_avail_br_vfid_get(const struct mlxsw_sp *mlxsw_sp)
3158 {
3159         return find_first_zero_bit(mlxsw_sp->br_vfids.mapped,
3160                                    MLXSW_SP_VFID_BR_MAX);
3161 }
3162
3163 static struct mlxsw_sp_vfid *mlxsw_sp_br_vfid_create(struct mlxsw_sp *mlxsw_sp,
3164                                                      struct net_device *br_dev)
3165 {
3166         struct device *dev = mlxsw_sp->bus_info->dev;
3167         struct mlxsw_sp_vfid *vfid;
3168         u16 n_vfid;
3169         int err;
3170
3171         n_vfid = mlxsw_sp_br_vfid_to_vfid(mlxsw_sp_avail_br_vfid_get(mlxsw_sp));
3172         if (n_vfid == MLXSW_SP_VFID_MAX) {
3173                 dev_err(dev, "No available vFIDs\n");
3174                 return ERR_PTR(-ERANGE);
3175         }
3176
3177         err = __mlxsw_sp_vfid_create(mlxsw_sp, n_vfid);
3178         if (err) {
3179                 dev_err(dev, "Failed to create vFID=%d\n", n_vfid);
3180                 return ERR_PTR(err);
3181         }
3182
3183         vfid = kzalloc(sizeof(*vfid), GFP_KERNEL);
3184         if (!vfid)
3185                 goto err_allocate_vfid;
3186
3187         vfid->vfid = n_vfid;
3188         vfid->br_dev = br_dev;
3189
3190         list_add(&vfid->list, &mlxsw_sp->br_vfids.list);
3191         set_bit(mlxsw_sp_vfid_to_br_vfid(n_vfid), mlxsw_sp->br_vfids.mapped);
3192
3193         return vfid;
3194
3195 err_allocate_vfid:
3196         __mlxsw_sp_vfid_destroy(mlxsw_sp, n_vfid);
3197         return ERR_PTR(-ENOMEM);
3198 }
3199
3200 static void mlxsw_sp_br_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
3201                                      struct mlxsw_sp_vfid *vfid)
3202 {
3203         u16 br_vfid = mlxsw_sp_vfid_to_br_vfid(vfid->vfid);
3204
3205         clear_bit(br_vfid, mlxsw_sp->br_vfids.mapped);
3206         list_del(&vfid->list);
3207
3208         __mlxsw_sp_vfid_destroy(mlxsw_sp, vfid->vfid);
3209
3210         kfree(vfid);
3211 }
3212
3213 static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport,
3214                                         struct net_device *br_dev,
3215                                         bool flush_fdb)
3216 {
3217         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3218         u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
3219         struct net_device *dev = mlxsw_sp_vport->dev;
3220         struct mlxsw_sp_vfid *vfid, *new_vfid;
3221         int err;
3222
3223         vfid = mlxsw_sp_br_vfid_find(mlxsw_sp, br_dev);
3224         if (WARN_ON(!vfid))
3225                 return;
3226
3227         /* We need a vFID to go back to after leaving the bridge's vFID. */
3228         new_vfid = mlxsw_sp_vfid_find(mlxsw_sp, vid);
3229         if (!new_vfid) {
3230                 new_vfid = mlxsw_sp_vfid_create(mlxsw_sp, vid);
3231                 if (IS_ERR(new_vfid)) {
3232                         netdev_err(dev, "Failed to create vFID for VID=%d\n",
3233                                    vid);
3234                         return;
3235                 }
3236         }
3237
3238         /* Invalidate existing {Port, VID} to vFID mapping and create a new
3239          * one for the new vFID.
3240          */
3241         err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
3242                                            MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
3243                                            false,
3244                                            mlxsw_sp_vfid_to_fid(vfid->vfid),
3245                                            vid);
3246         if (err) {
3247                 netdev_err(dev, "Failed to invalidate {Port, VID} to vFID=%d mapping\n",
3248                            vfid->vfid);
3249                 goto err_port_vid_to_fid_invalidate;
3250         }
3251
3252         err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
3253                                            MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
3254                                            true,
3255                                            mlxsw_sp_vfid_to_fid(new_vfid->vfid),
3256                                            vid);
3257         if (err) {
3258                 netdev_err(dev, "Failed to map {Port, VID} to vFID=%d\n",
3259                            new_vfid->vfid);
3260                 goto err_port_vid_to_fid_validate;
3261         }
3262
3263         err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
3264         if (err) {
3265                 netdev_err(dev, "Failed to disable learning\n");
3266                 goto err_port_vid_learning_set;
3267         }
3268
3269         err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false);
3270         if (err) {
3271                 netdev_err(dev, "Failed clear to clear flooding\n");
3272                 goto err_vport_flood_set;
3273         }
3274
3275         err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
3276                                           MLXSW_REG_SPMS_STATE_FORWARDING);
3277         if (err) {
3278                 netdev_err(dev, "Failed to set STP state\n");
3279                 goto err_port_stp_state_set;
3280         }
3281
3282         if (flush_fdb && mlxsw_sp_vport_fdb_flush(mlxsw_sp_vport))
3283                 netdev_err(dev, "Failed to flush FDB\n");
3284
3285         /* Switch between the vFIDs and destroy the old one if needed. */
3286         new_vfid->nr_vports++;
3287         mlxsw_sp_vport->vport.vfid = new_vfid;
3288         vfid->nr_vports--;
3289         if (!vfid->nr_vports)
3290                 mlxsw_sp_br_vfid_destroy(mlxsw_sp, vfid);
3291
3292         mlxsw_sp_vport->learning = 0;
3293         mlxsw_sp_vport->learning_sync = 0;
3294         mlxsw_sp_vport->uc_flood = 0;
3295         mlxsw_sp_vport->bridged = 0;
3296
3297         return;
3298
3299 err_port_stp_state_set:
3300 err_vport_flood_set:
3301 err_port_vid_learning_set:
3302 err_port_vid_to_fid_validate:
3303 err_port_vid_to_fid_invalidate:
3304         /* Rollback vFID only if new. */
3305         if (!new_vfid->nr_vports)
3306                 mlxsw_sp_vfid_destroy(mlxsw_sp, new_vfid);
3307 }
3308
3309 static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3310                                       struct net_device *br_dev)
3311 {
3312         struct mlxsw_sp_vfid *old_vfid = mlxsw_sp_vport->vport.vfid;
3313         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3314         u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
3315         struct net_device *dev = mlxsw_sp_vport->dev;
3316         struct mlxsw_sp_vfid *vfid;
3317         int err;
3318
3319         vfid = mlxsw_sp_br_vfid_find(mlxsw_sp, br_dev);
3320         if (!vfid) {
3321                 vfid = mlxsw_sp_br_vfid_create(mlxsw_sp, br_dev);
3322                 if (IS_ERR(vfid)) {
3323                         netdev_err(dev, "Failed to create bridge vFID\n");
3324                         return PTR_ERR(vfid);
3325                 }
3326         }
3327
3328         err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, true);
3329         if (err) {
3330                 netdev_err(dev, "Failed to setup flooding for vFID=%d\n",
3331                            vfid->vfid);
3332                 goto err_port_flood_set;
3333         }
3334
3335         err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
3336         if (err) {
3337                 netdev_err(dev, "Failed to enable learning\n");
3338                 goto err_port_vid_learning_set;
3339         }
3340
3341         /* We need to invalidate existing {Port, VID} to vFID mapping and
3342          * create a new one for the bridge's vFID.
3343          */
3344         err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
3345                                            MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
3346                                            false,
3347                                            mlxsw_sp_vfid_to_fid(old_vfid->vfid),
3348                                            vid);
3349         if (err) {
3350                 netdev_err(dev, "Failed to invalidate {Port, VID} to vFID=%d mapping\n",
3351                            old_vfid->vfid);
3352                 goto err_port_vid_to_fid_invalidate;
3353         }
3354
3355         err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
3356                                            MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
3357                                            true,
3358                                            mlxsw_sp_vfid_to_fid(vfid->vfid),
3359                                            vid);
3360         if (err) {
3361                 netdev_err(dev, "Failed to map {Port, VID} to vFID=%d\n",
3362                            vfid->vfid);
3363                 goto err_port_vid_to_fid_validate;
3364         }
3365
3366         /* Switch between the vFIDs and destroy the old one if needed. */
3367         vfid->nr_vports++;
3368         mlxsw_sp_vport->vport.vfid = vfid;
3369         old_vfid->nr_vports--;
3370         if (!old_vfid->nr_vports)
3371                 mlxsw_sp_vfid_destroy(mlxsw_sp, old_vfid);
3372
3373         mlxsw_sp_vport->learning = 1;
3374         mlxsw_sp_vport->learning_sync = 1;
3375         mlxsw_sp_vport->uc_flood = 1;
3376         mlxsw_sp_vport->bridged = 1;
3377
3378         return 0;
3379
3380 err_port_vid_to_fid_validate:
3381         mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
3382                                      MLXSW_REG_SVFA_MT_PORT_VID_TO_FID, false,
3383                                      mlxsw_sp_vfid_to_fid(old_vfid->vfid), vid);
3384 err_port_vid_to_fid_invalidate:
3385         mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
3386 err_port_vid_learning_set:
3387         mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false);
3388 err_port_flood_set:
3389         if (!vfid->nr_vports)
3390                 mlxsw_sp_br_vfid_destroy(mlxsw_sp, vfid);
3391         return err;
3392 }
3393
3394 static bool
3395 mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
3396                                   const struct net_device *br_dev)
3397 {
3398         struct mlxsw_sp_port *mlxsw_sp_vport;
3399
3400         list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
3401                             vport.list) {
3402                 if (mlxsw_sp_vport_br_get(mlxsw_sp_vport) == br_dev)
3403                         return false;
3404         }
3405
3406         return true;
3407 }
3408
3409 static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
3410                                           unsigned long event, void *ptr,
3411                                           u16 vid)
3412 {
3413         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
3414         struct netdev_notifier_changeupper_info *info = ptr;
3415         struct mlxsw_sp_port *mlxsw_sp_vport;
3416         struct net_device *upper_dev;
3417         int err = 0;
3418
3419         mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3420
3421         switch (event) {
3422         case NETDEV_PRECHANGEUPPER:
3423                 upper_dev = info->upper_dev;
3424                 if (!netif_is_bridge_master(upper_dev))
3425                         return -EINVAL;
3426                 if (!info->linking)
3427                         break;
3428                 /* We can't have multiple VLAN interfaces configured on
3429                  * the same port and being members in the same bridge.
3430                  */
3431                 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
3432                                                        upper_dev))
3433                         return -EINVAL;
3434                 break;
3435         case NETDEV_CHANGEUPPER:
3436                 upper_dev = info->upper_dev;
3437                 if (info->linking) {
3438                         if (WARN_ON(!mlxsw_sp_vport))
3439                                 return -EINVAL;
3440                         err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
3441                                                          upper_dev);
3442                 } else {
3443                         /* We ignore bridge's unlinking notifications if vPort
3444                          * is gone, since we already left the bridge when the
3445                          * VLAN device was unlinked from the real device.
3446                          */
3447                         if (!mlxsw_sp_vport)
3448                                 return 0;
3449                         mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport, upper_dev,
3450                                                     true);
3451                 }
3452         }
3453
3454         return err;
3455 }
3456
3457 static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
3458                                               unsigned long event, void *ptr,
3459                                               u16 vid)
3460 {
3461         struct net_device *dev;
3462         struct list_head *iter;
3463         int ret;
3464
3465         netdev_for_each_lower_dev(lag_dev, dev, iter) {
3466                 if (mlxsw_sp_port_dev_check(dev)) {
3467                         ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
3468                                                              vid);
3469                         if (ret)
3470                                 return ret;
3471                 }
3472         }
3473
3474         return 0;
3475 }
3476
3477 static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
3478                                          unsigned long event, void *ptr)
3479 {
3480         struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
3481         u16 vid = vlan_dev_vlan_id(vlan_dev);
3482
3483         if (mlxsw_sp_port_dev_check(real_dev))
3484                 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
3485                                                       vid);
3486         else if (netif_is_lag_master(real_dev))
3487                 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
3488                                                           vid);
3489
3490         return 0;
3491 }
3492
3493 static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
3494                                     unsigned long event, void *ptr)
3495 {
3496         struct net_device *dev = netdev_notifier_info_to_dev(ptr);
3497         int err = 0;
3498
3499         if (mlxsw_sp_port_dev_check(dev))
3500                 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
3501         else if (netif_is_lag_master(dev))
3502                 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
3503         else if (is_vlan_dev(dev))
3504                 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
3505
3506         return notifier_from_errno(err);
3507 }
3508
3509 static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
3510         .notifier_call = mlxsw_sp_netdevice_event,
3511 };
3512
3513 static int __init mlxsw_sp_module_init(void)
3514 {
3515         int err;
3516
3517         register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3518         err = mlxsw_core_driver_register(&mlxsw_sp_driver);
3519         if (err)
3520                 goto err_core_driver_register;
3521         return 0;
3522
3523 err_core_driver_register:
3524         unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3525         return err;
3526 }
3527
3528 static void __exit mlxsw_sp_module_exit(void)
3529 {
3530         mlxsw_core_driver_unregister(&mlxsw_sp_driver);
3531         unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
3532 }
3533
3534 module_init(mlxsw_sp_module_init);
3535 module_exit(mlxsw_sp_module_exit);
3536
3537 MODULE_LICENSE("Dual BSD/GPL");
3538 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
3539 MODULE_DESCRIPTION("Mellanox Spectrum driver");
3540 MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);