1 /* QLogic qed NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
9 #include <linux/types.h>
10 #include <asm/byteorder.h>
11 #include <asm/param.h>
12 #include <linux/delay.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/etherdevice.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/slab.h>
20 #include <linux/stddef.h>
21 #include <linux/string.h>
22 #include <linux/version.h>
23 #include <linux/workqueue.h>
24 #include <linux/bitops.h>
25 #include <linux/bug.h>
27 #include <linux/qed/qed_chain.h>
29 #include "qed_dev_api.h"
30 #include <linux/qed/qed_eth_if.h>
34 #include "qed_reg_addr.h"
40 QED_RSS_IPV4_TCP = 0x4,
41 QED_RSS_IPV6_TCP = 0x8,
42 QED_RSS_IPV4_UDP = 0x10,
43 QED_RSS_IPV6_UDP = 0x20,
46 /* Should be the same as ETH_RSS_IND_TABLE_ENTRIES_NUM */
47 #define QED_RSS_IND_TABLE_SIZE 128
48 #define QED_RSS_KEY_SIZE 10 /* size in 32b chunks */
50 struct qed_rss_params {
54 u8 update_rss_capabilities;
55 u8 update_rss_ind_table;
58 u8 rss_table_size_log;
59 u16 rss_ind_table[QED_RSS_IND_TABLE_SIZE];
60 u32 rss_key[QED_RSS_KEY_SIZE];
63 enum qed_filter_opcode {
67 QED_FILTER_REPLACE, /* Delete all MACs and add new one instead */
68 QED_FILTER_FLUSH, /* Removes all filters */
71 enum qed_filter_ucast_type {
76 QED_FILTER_INNER_VLAN,
77 QED_FILTER_INNER_PAIR,
78 QED_FILTER_INNER_MAC_VNI_PAIR,
79 QED_FILTER_MAC_VNI_PAIR,
83 struct qed_filter_ucast {
84 enum qed_filter_opcode opcode;
85 enum qed_filter_ucast_type type;
89 u8 vport_to_remove_from;
90 unsigned char mac[ETH_ALEN];
96 struct qed_filter_mcast {
97 /* MOVE is not supported for multicast */
98 enum qed_filter_opcode opcode;
100 u8 vport_to_remove_from;
102 #define QED_MAX_MC_ADDRS 64
103 unsigned char mac[QED_MAX_MC_ADDRS][ETH_ALEN];
106 struct qed_filter_accept_flags {
107 u8 update_rx_mode_config;
108 u8 update_tx_mode_config;
111 #define QED_ACCEPT_NONE 0x01
112 #define QED_ACCEPT_UCAST_MATCHED 0x02
113 #define QED_ACCEPT_UCAST_UNMATCHED 0x04
114 #define QED_ACCEPT_MCAST_MATCHED 0x08
115 #define QED_ACCEPT_MCAST_UNMATCHED 0x10
116 #define QED_ACCEPT_BCAST 0x20
119 struct qed_sp_vport_update_params {
122 u8 update_vport_active_rx_flg;
123 u8 vport_active_rx_flg;
124 u8 update_vport_active_tx_flg;
125 u8 vport_active_tx_flg;
126 u8 update_approx_mcast_flg;
127 u8 update_accept_any_vlan_flg;
129 unsigned long bins[8];
130 struct qed_rss_params *rss_params;
131 struct qed_filter_accept_flags accept_flags;
134 #define QED_MAX_SGES_NUM 16
135 #define CRC32_POLY 0x1edc6f41
137 static int qed_sp_vport_start(struct qed_hwfn *p_hwfn,
143 u8 inner_vlan_removal_en_flg)
145 struct vport_start_ramrod_data *p_ramrod = NULL;
146 struct qed_spq_entry *p_ent = NULL;
147 struct qed_sp_init_data init_data;
152 rc = qed_fw_vport(p_hwfn, vport_id, &abs_vport_id);
156 memset(&init_data, 0, sizeof(init_data));
157 init_data.cid = qed_spq_get_cid(p_hwfn);
158 init_data.opaque_fid = opaque_fid;
159 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
161 rc = qed_sp_init_request(p_hwfn, &p_ent,
162 ETH_RAMROD_VPORT_START,
163 PROTOCOLID_ETH, &init_data);
167 p_ramrod = &p_ent->ramrod.vport_start;
168 p_ramrod->vport_id = abs_vport_id;
170 p_ramrod->mtu = cpu_to_le16(mtu);
171 p_ramrod->inner_vlan_removal_en = inner_vlan_removal_en_flg;
172 p_ramrod->drop_ttl0_en = drop_ttl0_flg;
174 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 1);
175 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 1);
177 p_ramrod->rx_mode.state = cpu_to_le16(rx_mode);
179 /* TPA related fields */
180 memset(&p_ramrod->tpa_param, 0,
181 sizeof(struct eth_vport_tpa_param));
183 /* Software Function ID in hwfn (PFs are 0 - 15, VFs are 16 - 135) */
184 p_ramrod->sw_fid = qed_concrete_to_sw_fid(p_hwfn->cdev,
187 return qed_spq_post(p_hwfn, p_ent, NULL);
191 qed_sp_vport_update_rss(struct qed_hwfn *p_hwfn,
192 struct vport_update_ramrod_data *p_ramrod,
193 struct qed_rss_params *p_params)
195 struct eth_vport_rss_config *rss = &p_ramrod->rss_config;
196 u16 abs_l2_queue = 0, capabilities = 0;
200 p_ramrod->common.update_rss_flg = 0;
204 BUILD_BUG_ON(QED_RSS_IND_TABLE_SIZE !=
205 ETH_RSS_IND_TABLE_ENTRIES_NUM);
207 rc = qed_fw_rss_eng(p_hwfn, p_params->rss_eng_id, &rss->rss_id);
211 p_ramrod->common.update_rss_flg = p_params->update_rss_config;
212 rss->update_rss_capabilities = p_params->update_rss_capabilities;
213 rss->update_rss_ind_table = p_params->update_rss_ind_table;
214 rss->update_rss_key = p_params->update_rss_key;
216 rss->rss_mode = p_params->rss_enable ?
217 ETH_VPORT_RSS_MODE_REGULAR :
218 ETH_VPORT_RSS_MODE_DISABLED;
220 SET_FIELD(capabilities,
221 ETH_VPORT_RSS_CONFIG_IPV4_CAPABILITY,
222 !!(p_params->rss_caps & QED_RSS_IPV4));
223 SET_FIELD(capabilities,
224 ETH_VPORT_RSS_CONFIG_IPV6_CAPABILITY,
225 !!(p_params->rss_caps & QED_RSS_IPV6));
226 SET_FIELD(capabilities,
227 ETH_VPORT_RSS_CONFIG_IPV4_TCP_CAPABILITY,
228 !!(p_params->rss_caps & QED_RSS_IPV4_TCP));
229 SET_FIELD(capabilities,
230 ETH_VPORT_RSS_CONFIG_IPV6_TCP_CAPABILITY,
231 !!(p_params->rss_caps & QED_RSS_IPV6_TCP));
232 SET_FIELD(capabilities,
233 ETH_VPORT_RSS_CONFIG_IPV4_UDP_CAPABILITY,
234 !!(p_params->rss_caps & QED_RSS_IPV4_UDP));
235 SET_FIELD(capabilities,
236 ETH_VPORT_RSS_CONFIG_IPV6_UDP_CAPABILITY,
237 !!(p_params->rss_caps & QED_RSS_IPV6_UDP));
238 rss->tbl_size = p_params->rss_table_size_log;
240 rss->capabilities = cpu_to_le16(capabilities);
242 DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP,
243 "update rss flag %d, rss_mode = %d, update_caps = %d, capabilities = %d, update_ind = %d, update_rss_key = %d\n",
244 p_ramrod->common.update_rss_flg,
245 rss->rss_mode, rss->update_rss_capabilities,
246 capabilities, rss->update_rss_ind_table,
247 rss->update_rss_key);
249 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
250 rc = qed_fw_l2_queue(p_hwfn,
251 (u8)p_params->rss_ind_table[i],
256 rss->indirection_table[i] = cpu_to_le16(abs_l2_queue);
257 DP_VERBOSE(p_hwfn, NETIF_MSG_IFUP, "i= %d, queue = %d\n",
258 i, rss->indirection_table[i]);
261 for (i = 0; i < 10; i++)
262 rss->rss_key[i] = cpu_to_le32(p_params->rss_key[i]);
268 qed_sp_update_accept_mode(struct qed_hwfn *p_hwfn,
269 struct vport_update_ramrod_data *p_ramrod,
270 struct qed_filter_accept_flags accept_flags)
272 p_ramrod->common.update_rx_mode_flg =
273 accept_flags.update_rx_mode_config;
275 p_ramrod->common.update_tx_mode_flg =
276 accept_flags.update_tx_mode_config;
278 /* Set Rx mode accept flags */
279 if (p_ramrod->common.update_rx_mode_flg) {
280 u8 accept_filter = accept_flags.rx_accept_filter;
283 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_DROP_ALL,
284 !(!!(accept_filter & QED_ACCEPT_UCAST_MATCHED) ||
285 !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED)));
287 SET_FIELD(state, ETH_VPORT_RX_MODE_UCAST_ACCEPT_UNMATCHED,
288 !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED));
290 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_DROP_ALL,
291 !(!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) ||
292 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
294 SET_FIELD(state, ETH_VPORT_RX_MODE_MCAST_ACCEPT_ALL,
295 (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) &&
296 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
298 SET_FIELD(state, ETH_VPORT_RX_MODE_BCAST_ACCEPT_ALL,
299 !!(accept_filter & QED_ACCEPT_BCAST));
301 p_ramrod->rx_mode.state = cpu_to_le16(state);
302 DP_VERBOSE(p_hwfn, QED_MSG_SP,
303 "p_ramrod->rx_mode.state = 0x%x\n", state);
306 /* Set Tx mode accept flags */
307 if (p_ramrod->common.update_tx_mode_flg) {
308 u8 accept_filter = accept_flags.tx_accept_filter;
311 SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_DROP_ALL,
312 !!(accept_filter & QED_ACCEPT_NONE));
314 SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_ACCEPT_ALL,
315 (!!(accept_filter & QED_ACCEPT_UCAST_MATCHED) &&
316 !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED)));
318 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_DROP_ALL,
319 !!(accept_filter & QED_ACCEPT_NONE));
321 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_ACCEPT_ALL,
322 (!!(accept_filter & QED_ACCEPT_MCAST_MATCHED) &&
323 !!(accept_filter & QED_ACCEPT_MCAST_UNMATCHED)));
325 SET_FIELD(state, ETH_VPORT_TX_MODE_BCAST_ACCEPT_ALL,
326 !!(accept_filter & QED_ACCEPT_BCAST));
328 p_ramrod->tx_mode.state = cpu_to_le16(state);
329 DP_VERBOSE(p_hwfn, QED_MSG_SP,
330 "p_ramrod->tx_mode.state = 0x%x\n", state);
335 qed_sp_update_mcast_bin(struct qed_hwfn *p_hwfn,
336 struct vport_update_ramrod_data *p_ramrod,
337 struct qed_sp_vport_update_params *p_params)
341 memset(&p_ramrod->approx_mcast.bins, 0,
342 sizeof(p_ramrod->approx_mcast.bins));
344 if (p_params->update_approx_mcast_flg) {
345 p_ramrod->common.update_approx_mcast_flg = 1;
346 for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
347 u32 *p_bins = (u32 *)p_params->bins;
348 __le32 val = cpu_to_le32(p_bins[i]);
350 p_ramrod->approx_mcast.bins[i] = val;
356 qed_sp_vport_update(struct qed_hwfn *p_hwfn,
357 struct qed_sp_vport_update_params *p_params,
358 enum spq_mode comp_mode,
359 struct qed_spq_comp_cb *p_comp_data)
361 struct qed_rss_params *p_rss_params = p_params->rss_params;
362 struct vport_update_ramrod_data_cmn *p_cmn;
363 struct qed_sp_init_data init_data;
364 struct vport_update_ramrod_data *p_ramrod = NULL;
365 struct qed_spq_entry *p_ent = NULL;
369 rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
373 memset(&init_data, 0, sizeof(init_data));
374 init_data.cid = qed_spq_get_cid(p_hwfn);
375 init_data.opaque_fid = p_params->opaque_fid;
376 init_data.comp_mode = comp_mode;
377 init_data.p_comp_data = p_comp_data;
379 rc = qed_sp_init_request(p_hwfn, &p_ent,
380 ETH_RAMROD_VPORT_UPDATE,
381 PROTOCOLID_ETH, &init_data);
385 /* Copy input params to ramrod according to FW struct */
386 p_ramrod = &p_ent->ramrod.vport_update;
387 p_cmn = &p_ramrod->common;
389 p_cmn->vport_id = abs_vport_id;
390 p_cmn->rx_active_flg = p_params->vport_active_rx_flg;
391 p_cmn->update_rx_active_flg = p_params->update_vport_active_rx_flg;
392 p_cmn->tx_active_flg = p_params->vport_active_tx_flg;
393 p_cmn->update_tx_active_flg = p_params->update_vport_active_tx_flg;
394 p_cmn->accept_any_vlan = p_params->accept_any_vlan;
395 p_cmn->update_accept_any_vlan_flg =
396 p_params->update_accept_any_vlan_flg;
397 rc = qed_sp_vport_update_rss(p_hwfn, p_ramrod, p_rss_params);
399 /* Return spq entry which is taken in qed_sp_init_request()*/
400 qed_spq_return_entry(p_hwfn, p_ent);
404 /* Update mcast bins for VFs, PF doesn't use this functionality */
405 qed_sp_update_mcast_bin(p_hwfn, p_ramrod, p_params);
407 qed_sp_update_accept_mode(p_hwfn, p_ramrod, p_params->accept_flags);
408 return qed_spq_post(p_hwfn, p_ent, NULL);
411 static int qed_sp_vport_stop(struct qed_hwfn *p_hwfn,
415 struct vport_stop_ramrod_data *p_ramrod;
416 struct qed_sp_init_data init_data;
417 struct qed_spq_entry *p_ent;
421 rc = qed_fw_vport(p_hwfn, vport_id, &abs_vport_id);
425 memset(&init_data, 0, sizeof(init_data));
426 init_data.cid = qed_spq_get_cid(p_hwfn);
427 init_data.opaque_fid = opaque_fid;
428 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
430 rc = qed_sp_init_request(p_hwfn, &p_ent,
431 ETH_RAMROD_VPORT_STOP,
432 PROTOCOLID_ETH, &init_data);
436 p_ramrod = &p_ent->ramrod.vport_stop;
437 p_ramrod->vport_id = abs_vport_id;
439 return qed_spq_post(p_hwfn, p_ent, NULL);
442 static int qed_filter_accept_cmd(struct qed_dev *cdev,
444 struct qed_filter_accept_flags accept_flags,
445 u8 update_accept_any_vlan,
447 enum spq_mode comp_mode,
448 struct qed_spq_comp_cb *p_comp_data)
450 struct qed_sp_vport_update_params vport_update_params;
453 /* Prepare and send the vport rx_mode change */
454 memset(&vport_update_params, 0, sizeof(vport_update_params));
455 vport_update_params.vport_id = vport;
456 vport_update_params.accept_flags = accept_flags;
457 vport_update_params.update_accept_any_vlan_flg = update_accept_any_vlan;
458 vport_update_params.accept_any_vlan = accept_any_vlan;
460 for_each_hwfn(cdev, i) {
461 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
463 vport_update_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
465 rc = qed_sp_vport_update(p_hwfn, &vport_update_params,
466 comp_mode, p_comp_data);
468 DP_ERR(cdev, "Update rx_mode failed %d\n", rc);
472 DP_VERBOSE(p_hwfn, QED_MSG_SP,
473 "Accept filter configured, flags = [Rx]%x [Tx]%x\n",
474 accept_flags.rx_accept_filter,
475 accept_flags.tx_accept_filter);
476 if (update_accept_any_vlan)
477 DP_VERBOSE(p_hwfn, QED_MSG_SP,
478 "accept_any_vlan=%d configured\n",
485 static int qed_sp_release_queue_cid(
486 struct qed_hwfn *p_hwfn,
487 struct qed_hw_cid_data *p_cid_data)
489 if (!p_cid_data->b_cid_allocated)
492 qed_cxt_release_cid(p_hwfn, p_cid_data->cid);
494 p_cid_data->b_cid_allocated = false;
500 qed_sp_eth_rxq_start_ramrod(struct qed_hwfn *p_hwfn,
503 struct qed_queue_start_common_params *params,
506 dma_addr_t bd_chain_phys_addr,
507 dma_addr_t cqe_pbl_addr,
510 struct rx_queue_start_ramrod_data *p_ramrod = NULL;
511 struct qed_spq_entry *p_ent = NULL;
512 struct qed_sp_init_data init_data;
513 struct qed_hw_cid_data *p_rx_cid;
518 /* Store information for the stop */
519 p_rx_cid = &p_hwfn->p_rx_cids[params->queue_id];
521 p_rx_cid->opaque_fid = opaque_fid;
522 p_rx_cid->vport_id = params->vport_id;
524 rc = qed_fw_vport(p_hwfn, params->vport_id, &abs_vport_id);
528 rc = qed_fw_l2_queue(p_hwfn, params->queue_id, &abs_rx_q_id);
532 DP_VERBOSE(p_hwfn, QED_MSG_SP,
533 "opaque_fid=0x%x, cid=0x%x, rx_qid=0x%x, vport_id=0x%x, sb_id=0x%x\n",
534 opaque_fid, cid, params->queue_id, params->vport_id,
538 memset(&init_data, 0, sizeof(init_data));
540 init_data.opaque_fid = opaque_fid;
541 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
543 rc = qed_sp_init_request(p_hwfn, &p_ent,
544 ETH_RAMROD_RX_QUEUE_START,
545 PROTOCOLID_ETH, &init_data);
549 p_ramrod = &p_ent->ramrod.rx_queue_start;
551 p_ramrod->sb_id = cpu_to_le16(params->sb);
552 p_ramrod->sb_index = params->sb_idx;
553 p_ramrod->vport_id = abs_vport_id;
554 p_ramrod->stats_counter_id = stats_id;
555 p_ramrod->rx_queue_id = cpu_to_le16(abs_rx_q_id);
556 p_ramrod->complete_cqe_flg = 0;
557 p_ramrod->complete_event_flg = 1;
559 p_ramrod->bd_max_bytes = cpu_to_le16(bd_max_bytes);
560 DMA_REGPAIR_LE(p_ramrod->bd_base, bd_chain_phys_addr);
562 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
563 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, cqe_pbl_addr);
565 rc = qed_spq_post(p_hwfn, p_ent, NULL);
571 qed_sp_eth_rx_queue_start(struct qed_hwfn *p_hwfn,
573 struct qed_queue_start_common_params *params,
575 dma_addr_t bd_chain_phys_addr,
576 dma_addr_t cqe_pbl_addr,
578 void __iomem **pp_prod)
580 struct qed_hw_cid_data *p_rx_cid;
581 u64 init_prod_val = 0;
582 u16 abs_l2_queue = 0;
586 rc = qed_fw_l2_queue(p_hwfn, params->queue_id, &abs_l2_queue);
590 rc = qed_fw_vport(p_hwfn, params->vport_id, &abs_stats_id);
594 *pp_prod = (u8 __iomem *)p_hwfn->regview +
595 GTT_BAR0_MAP_REG_MSDM_RAM +
596 MSTORM_PRODS_OFFSET(abs_l2_queue);
598 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
599 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u64),
600 (u32 *)(&init_prod_val));
602 /* Allocate a CID for the queue */
603 p_rx_cid = &p_hwfn->p_rx_cids[params->queue_id];
604 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_ETH,
607 DP_NOTICE(p_hwfn, "Failed to acquire cid\n");
610 p_rx_cid->b_cid_allocated = true;
612 rc = qed_sp_eth_rxq_start_ramrod(p_hwfn,
623 qed_sp_release_queue_cid(p_hwfn, p_rx_cid);
628 static int qed_sp_eth_rx_queue_stop(struct qed_hwfn *p_hwfn,
630 bool eq_completion_only,
633 struct qed_hw_cid_data *p_rx_cid = &p_hwfn->p_rx_cids[rx_queue_id];
634 struct rx_queue_stop_ramrod_data *p_ramrod = NULL;
635 struct qed_spq_entry *p_ent = NULL;
636 struct qed_sp_init_data init_data;
641 memset(&init_data, 0, sizeof(init_data));
642 init_data.cid = p_rx_cid->cid;
643 init_data.opaque_fid = p_rx_cid->opaque_fid;
644 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
646 rc = qed_sp_init_request(p_hwfn, &p_ent,
647 ETH_RAMROD_RX_QUEUE_STOP,
648 PROTOCOLID_ETH, &init_data);
652 p_ramrod = &p_ent->ramrod.rx_queue_stop;
654 qed_fw_vport(p_hwfn, p_rx_cid->vport_id, &p_ramrod->vport_id);
655 qed_fw_l2_queue(p_hwfn, rx_queue_id, &abs_rx_q_id);
656 p_ramrod->rx_queue_id = cpu_to_le16(abs_rx_q_id);
658 /* Cleaning the queue requires the completion to arrive there.
659 * In addition, VFs require the answer to come as eqe to PF.
661 p_ramrod->complete_cqe_flg =
662 (!!(p_rx_cid->opaque_fid == p_hwfn->hw_info.opaque_fid) &&
663 !eq_completion_only) || cqe_completion;
664 p_ramrod->complete_event_flg =
665 !(p_rx_cid->opaque_fid == p_hwfn->hw_info.opaque_fid) ||
668 rc = qed_spq_post(p_hwfn, p_ent, NULL);
672 return qed_sp_release_queue_cid(p_hwfn, p_rx_cid);
676 qed_sp_eth_txq_start_ramrod(struct qed_hwfn *p_hwfn,
679 struct qed_queue_start_common_params *p_params,
683 union qed_qm_pq_params *p_pq_params)
685 struct tx_queue_start_ramrod_data *p_ramrod = NULL;
686 struct qed_spq_entry *p_ent = NULL;
687 struct qed_sp_init_data init_data;
688 struct qed_hw_cid_data *p_tx_cid;
693 /* Store information for the stop */
694 p_tx_cid = &p_hwfn->p_tx_cids[p_params->queue_id];
696 p_tx_cid->opaque_fid = opaque_fid;
698 rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
703 memset(&init_data, 0, sizeof(init_data));
705 init_data.opaque_fid = opaque_fid;
706 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
708 rc = qed_sp_init_request(p_hwfn, &p_ent,
709 ETH_RAMROD_TX_QUEUE_START,
710 PROTOCOLID_ETH, &init_data);
714 p_ramrod = &p_ent->ramrod.tx_queue_start;
715 p_ramrod->vport_id = abs_vport_id;
717 p_ramrod->sb_id = cpu_to_le16(p_params->sb);
718 p_ramrod->sb_index = p_params->sb_idx;
719 p_ramrod->stats_counter_id = stats_id;
721 p_ramrod->pbl_size = cpu_to_le16(pbl_size);
722 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, pbl_addr);
724 pq_id = qed_get_qm_pq(p_hwfn,
727 p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
729 return qed_spq_post(p_hwfn, p_ent, NULL);
733 qed_sp_eth_tx_queue_start(struct qed_hwfn *p_hwfn,
735 struct qed_queue_start_common_params *p_params,
738 void __iomem **pp_doorbell)
740 struct qed_hw_cid_data *p_tx_cid;
741 union qed_qm_pq_params pq_params;
745 rc = qed_fw_vport(p_hwfn, p_params->vport_id, &abs_stats_id);
749 p_tx_cid = &p_hwfn->p_tx_cids[p_params->queue_id];
750 memset(p_tx_cid, 0, sizeof(*p_tx_cid));
751 memset(&pq_params, 0, sizeof(pq_params));
753 /* Allocate a CID for the queue */
754 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_ETH,
757 DP_NOTICE(p_hwfn, "Failed to acquire cid\n");
760 p_tx_cid->b_cid_allocated = true;
762 DP_VERBOSE(p_hwfn, QED_MSG_SP,
763 "opaque_fid=0x%x, cid=0x%x, tx_qid=0x%x, vport_id=0x%x, sb_id=0x%x\n",
764 opaque_fid, p_tx_cid->cid,
765 p_params->queue_id, p_params->vport_id, p_params->sb);
767 rc = qed_sp_eth_txq_start_ramrod(p_hwfn,
776 *pp_doorbell = (u8 __iomem *)p_hwfn->doorbells +
777 qed_db_addr(p_tx_cid->cid, DQ_DEMS_LEGACY);
780 qed_sp_release_queue_cid(p_hwfn, p_tx_cid);
785 static int qed_sp_eth_tx_queue_stop(struct qed_hwfn *p_hwfn,
788 struct qed_hw_cid_data *p_tx_cid = &p_hwfn->p_tx_cids[tx_queue_id];
789 struct qed_spq_entry *p_ent = NULL;
790 struct qed_sp_init_data init_data;
794 memset(&init_data, 0, sizeof(init_data));
795 init_data.cid = p_tx_cid->cid;
796 init_data.opaque_fid = p_tx_cid->opaque_fid;
797 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
799 rc = qed_sp_init_request(p_hwfn, &p_ent,
800 ETH_RAMROD_TX_QUEUE_STOP,
801 PROTOCOLID_ETH, &init_data);
805 rc = qed_spq_post(p_hwfn, p_ent, NULL);
809 return qed_sp_release_queue_cid(p_hwfn, p_tx_cid);
812 static enum eth_filter_action
813 qed_filter_action(enum qed_filter_opcode opcode)
815 enum eth_filter_action action = MAX_ETH_FILTER_ACTION;
819 action = ETH_FILTER_ACTION_ADD;
821 case QED_FILTER_REMOVE:
822 action = ETH_FILTER_ACTION_REMOVE;
824 case QED_FILTER_FLUSH:
825 action = ETH_FILTER_ACTION_REMOVE_ALL;
828 action = MAX_ETH_FILTER_ACTION;
834 static void qed_set_fw_mac_addr(__le16 *fw_msb,
839 ((u8 *)fw_msb)[0] = mac[1];
840 ((u8 *)fw_msb)[1] = mac[0];
841 ((u8 *)fw_mid)[0] = mac[3];
842 ((u8 *)fw_mid)[1] = mac[2];
843 ((u8 *)fw_lsb)[0] = mac[5];
844 ((u8 *)fw_lsb)[1] = mac[4];
848 qed_filter_ucast_common(struct qed_hwfn *p_hwfn,
850 struct qed_filter_ucast *p_filter_cmd,
851 struct vport_filter_update_ramrod_data **pp_ramrod,
852 struct qed_spq_entry **pp_ent,
853 enum spq_mode comp_mode,
854 struct qed_spq_comp_cb *p_comp_data)
856 u8 vport_to_add_to = 0, vport_to_remove_from = 0;
857 struct vport_filter_update_ramrod_data *p_ramrod;
858 struct eth_filter_cmd *p_first_filter;
859 struct eth_filter_cmd *p_second_filter;
860 struct qed_sp_init_data init_data;
861 enum eth_filter_action action;
864 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from,
865 &vport_to_remove_from);
869 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to,
875 memset(&init_data, 0, sizeof(init_data));
876 init_data.cid = qed_spq_get_cid(p_hwfn);
877 init_data.opaque_fid = opaque_fid;
878 init_data.comp_mode = comp_mode;
879 init_data.p_comp_data = p_comp_data;
881 rc = qed_sp_init_request(p_hwfn, pp_ent,
882 ETH_RAMROD_FILTERS_UPDATE,
883 PROTOCOLID_ETH, &init_data);
887 *pp_ramrod = &(*pp_ent)->ramrod.vport_filter_update;
888 p_ramrod = *pp_ramrod;
889 p_ramrod->filter_cmd_hdr.rx = p_filter_cmd->is_rx_filter ? 1 : 0;
890 p_ramrod->filter_cmd_hdr.tx = p_filter_cmd->is_tx_filter ? 1 : 0;
892 switch (p_filter_cmd->opcode) {
893 case QED_FILTER_REPLACE:
894 case QED_FILTER_MOVE:
895 p_ramrod->filter_cmd_hdr.cmd_cnt = 2; break;
897 p_ramrod->filter_cmd_hdr.cmd_cnt = 1; break;
900 p_first_filter = &p_ramrod->filter_cmds[0];
901 p_second_filter = &p_ramrod->filter_cmds[1];
903 switch (p_filter_cmd->type) {
905 p_first_filter->type = ETH_FILTER_TYPE_MAC; break;
906 case QED_FILTER_VLAN:
907 p_first_filter->type = ETH_FILTER_TYPE_VLAN; break;
908 case QED_FILTER_MAC_VLAN:
909 p_first_filter->type = ETH_FILTER_TYPE_PAIR; break;
910 case QED_FILTER_INNER_MAC:
911 p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC; break;
912 case QED_FILTER_INNER_VLAN:
913 p_first_filter->type = ETH_FILTER_TYPE_INNER_VLAN; break;
914 case QED_FILTER_INNER_PAIR:
915 p_first_filter->type = ETH_FILTER_TYPE_INNER_PAIR; break;
916 case QED_FILTER_INNER_MAC_VNI_PAIR:
917 p_first_filter->type = ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR;
919 case QED_FILTER_MAC_VNI_PAIR:
920 p_first_filter->type = ETH_FILTER_TYPE_MAC_VNI_PAIR; break;
922 p_first_filter->type = ETH_FILTER_TYPE_VNI; break;
925 if ((p_first_filter->type == ETH_FILTER_TYPE_MAC) ||
926 (p_first_filter->type == ETH_FILTER_TYPE_PAIR) ||
927 (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC) ||
928 (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR) ||
929 (p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) ||
930 (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR)) {
931 qed_set_fw_mac_addr(&p_first_filter->mac_msb,
932 &p_first_filter->mac_mid,
933 &p_first_filter->mac_lsb,
934 (u8 *)p_filter_cmd->mac);
937 if ((p_first_filter->type == ETH_FILTER_TYPE_VLAN) ||
938 (p_first_filter->type == ETH_FILTER_TYPE_PAIR) ||
939 (p_first_filter->type == ETH_FILTER_TYPE_INNER_VLAN) ||
940 (p_first_filter->type == ETH_FILTER_TYPE_INNER_PAIR))
941 p_first_filter->vlan_id = cpu_to_le16(p_filter_cmd->vlan);
943 if ((p_first_filter->type == ETH_FILTER_TYPE_INNER_MAC_VNI_PAIR) ||
944 (p_first_filter->type == ETH_FILTER_TYPE_MAC_VNI_PAIR) ||
945 (p_first_filter->type == ETH_FILTER_TYPE_VNI))
946 p_first_filter->vni = cpu_to_le32(p_filter_cmd->vni);
948 if (p_filter_cmd->opcode == QED_FILTER_MOVE) {
949 p_second_filter->type = p_first_filter->type;
950 p_second_filter->mac_msb = p_first_filter->mac_msb;
951 p_second_filter->mac_mid = p_first_filter->mac_mid;
952 p_second_filter->mac_lsb = p_first_filter->mac_lsb;
953 p_second_filter->vlan_id = p_first_filter->vlan_id;
954 p_second_filter->vni = p_first_filter->vni;
956 p_first_filter->action = ETH_FILTER_ACTION_REMOVE;
958 p_first_filter->vport_id = vport_to_remove_from;
960 p_second_filter->action = ETH_FILTER_ACTION_ADD;
961 p_second_filter->vport_id = vport_to_add_to;
962 } else if (p_filter_cmd->opcode == QED_FILTER_REPLACE) {
963 p_first_filter->vport_id = vport_to_add_to;
964 memcpy(p_second_filter, p_first_filter,
965 sizeof(*p_second_filter));
966 p_first_filter->action = ETH_FILTER_ACTION_REMOVE_ALL;
967 p_second_filter->action = ETH_FILTER_ACTION_ADD;
969 action = qed_filter_action(p_filter_cmd->opcode);
971 if (action == MAX_ETH_FILTER_ACTION) {
973 "%d is not supported yet\n",
974 p_filter_cmd->opcode);
978 p_first_filter->action = action;
979 p_first_filter->vport_id = (p_filter_cmd->opcode ==
981 vport_to_remove_from :
988 static int qed_sp_eth_filter_ucast(struct qed_hwfn *p_hwfn,
990 struct qed_filter_ucast *p_filter_cmd,
991 enum spq_mode comp_mode,
992 struct qed_spq_comp_cb *p_comp_data)
994 struct vport_filter_update_ramrod_data *p_ramrod = NULL;
995 struct qed_spq_entry *p_ent = NULL;
996 struct eth_filter_cmd_header *p_header;
999 rc = qed_filter_ucast_common(p_hwfn, opaque_fid, p_filter_cmd,
1001 comp_mode, p_comp_data);
1003 DP_ERR(p_hwfn, "Uni. filter command failed %d\n", rc);
1006 p_header = &p_ramrod->filter_cmd_hdr;
1007 p_header->assert_on_error = p_filter_cmd->assert_on_error;
1009 rc = qed_spq_post(p_hwfn, p_ent, NULL);
1012 "Unicast filter ADD command failed %d\n",
1017 DP_VERBOSE(p_hwfn, QED_MSG_SP,
1018 "Unicast filter configured, opcode = %s, type = %s, cmd_cnt = %d, is_rx_filter = %d, is_tx_filter = %d\n",
1019 (p_filter_cmd->opcode == QED_FILTER_ADD) ? "ADD" :
1020 ((p_filter_cmd->opcode == QED_FILTER_REMOVE) ?
1022 ((p_filter_cmd->opcode == QED_FILTER_MOVE) ?
1023 "MOVE" : "REPLACE")),
1024 (p_filter_cmd->type == QED_FILTER_MAC) ? "MAC" :
1025 ((p_filter_cmd->type == QED_FILTER_VLAN) ?
1026 "VLAN" : "MAC & VLAN"),
1027 p_ramrod->filter_cmd_hdr.cmd_cnt,
1028 p_filter_cmd->is_rx_filter,
1029 p_filter_cmd->is_tx_filter);
1030 DP_VERBOSE(p_hwfn, QED_MSG_SP,
1031 "vport_to_add_to = %d, vport_to_remove_from = %d, mac = %2x:%2x:%2x:%2x:%2x:%2x, vlan = %d\n",
1032 p_filter_cmd->vport_to_add_to,
1033 p_filter_cmd->vport_to_remove_from,
1034 p_filter_cmd->mac[0],
1035 p_filter_cmd->mac[1],
1036 p_filter_cmd->mac[2],
1037 p_filter_cmd->mac[3],
1038 p_filter_cmd->mac[4],
1039 p_filter_cmd->mac[5],
1040 p_filter_cmd->vlan);
1045 /*******************************************************************************
1047 * Calculates crc 32 on a buffer
1048 * Note: crc32_length MUST be aligned to 8
1050 ******************************************************************************/
1051 static u32 qed_calc_crc32c(u8 *crc32_packet,
1059 u8 current_byte = 0;
1060 u32 crc32_result = crc32_seed;
1062 if ((!crc32_packet) ||
1063 (crc32_length == 0) ||
1064 ((crc32_length % 8) != 0))
1065 return crc32_result;
1066 for (byte = 0; byte < crc32_length; byte++) {
1067 current_byte = crc32_packet[byte];
1068 for (bit = 0; bit < 8; bit++) {
1069 msb = (u8)(crc32_result >> 31);
1070 crc32_result = crc32_result << 1;
1071 if (msb != (0x1 & (current_byte >> bit))) {
1072 crc32_result = crc32_result ^ CRC32_POLY;
1073 crc32_result |= 1; /*crc32_result[0] = 1;*/
1077 return crc32_result;
1080 static inline u32 qed_crc32c_le(u32 seed,
1084 u32 packet_buf[2] = { 0 };
1086 memcpy((u8 *)(&packet_buf[0]), &mac[0], 6);
1087 return qed_calc_crc32c((u8 *)packet_buf, 8, seed, 0);
1090 static u8 qed_mcast_bin_from_mac(u8 *mac)
1092 u32 crc = qed_crc32c_le(ETH_MULTICAST_BIN_FROM_MAC_SEED,
1099 qed_sp_eth_filter_mcast(struct qed_hwfn *p_hwfn,
1101 struct qed_filter_mcast *p_filter_cmd,
1102 enum spq_mode comp_mode,
1103 struct qed_spq_comp_cb *p_comp_data)
1105 unsigned long bins[ETH_MULTICAST_MAC_BINS_IN_REGS];
1106 struct vport_update_ramrod_data *p_ramrod = NULL;
1107 struct qed_spq_entry *p_ent = NULL;
1108 struct qed_sp_init_data init_data;
1109 u8 abs_vport_id = 0;
1112 if (p_filter_cmd->opcode == QED_FILTER_ADD) {
1113 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_add_to,
1118 rc = qed_fw_vport(p_hwfn, p_filter_cmd->vport_to_remove_from,
1125 memset(&init_data, 0, sizeof(init_data));
1126 init_data.cid = qed_spq_get_cid(p_hwfn);
1127 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1128 init_data.comp_mode = comp_mode;
1129 init_data.p_comp_data = p_comp_data;
1131 rc = qed_sp_init_request(p_hwfn, &p_ent,
1132 ETH_RAMROD_VPORT_UPDATE,
1133 PROTOCOLID_ETH, &init_data);
1135 DP_ERR(p_hwfn, "Multi-cast command failed %d\n", rc);
1139 p_ramrod = &p_ent->ramrod.vport_update;
1140 p_ramrod->common.update_approx_mcast_flg = 1;
1142 /* explicitly clear out the entire vector */
1143 memset(&p_ramrod->approx_mcast.bins, 0,
1144 sizeof(p_ramrod->approx_mcast.bins));
1145 memset(bins, 0, sizeof(unsigned long) *
1146 ETH_MULTICAST_MAC_BINS_IN_REGS);
1147 /* filter ADD op is explicit set op and it removes
1148 * any existing filters for the vport
1150 if (p_filter_cmd->opcode == QED_FILTER_ADD) {
1151 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1154 bit = qed_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1155 __set_bit(bit, bins);
1158 /* Convert to correct endianity */
1159 for (i = 0; i < ETH_MULTICAST_MAC_BINS_IN_REGS; i++) {
1160 u32 *p_bins = (u32 *)bins;
1161 struct vport_update_ramrod_mcast *approx_mcast;
1163 approx_mcast = &p_ramrod->approx_mcast;
1164 approx_mcast->bins[i] = cpu_to_le32(p_bins[i]);
1168 p_ramrod->common.vport_id = abs_vport_id;
1170 return qed_spq_post(p_hwfn, p_ent, NULL);
1174 qed_filter_mcast_cmd(struct qed_dev *cdev,
1175 struct qed_filter_mcast *p_filter_cmd,
1176 enum spq_mode comp_mode,
1177 struct qed_spq_comp_cb *p_comp_data)
1182 /* only ADD and REMOVE operations are supported for multi-cast */
1183 if ((p_filter_cmd->opcode != QED_FILTER_ADD &&
1184 (p_filter_cmd->opcode != QED_FILTER_REMOVE)) ||
1185 (p_filter_cmd->num_mc_addrs > QED_MAX_MC_ADDRS))
1188 for_each_hwfn(cdev, i) {
1189 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1196 opaque_fid = p_hwfn->hw_info.opaque_fid;
1198 rc = qed_sp_eth_filter_mcast(p_hwfn,
1207 static int qed_filter_ucast_cmd(struct qed_dev *cdev,
1208 struct qed_filter_ucast *p_filter_cmd,
1209 enum spq_mode comp_mode,
1210 struct qed_spq_comp_cb *p_comp_data)
1215 for_each_hwfn(cdev, i) {
1216 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1222 opaque_fid = p_hwfn->hw_info.opaque_fid;
1224 rc = qed_sp_eth_filter_ucast(p_hwfn,
1234 static int qed_fill_eth_dev_info(struct qed_dev *cdev,
1235 struct qed_dev_eth_info *info)
1239 memset(info, 0, sizeof(*info));
1243 if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
1244 for_each_hwfn(cdev, i)
1245 info->num_queues += FEAT_NUM(&cdev->hwfns[i],
1247 if (cdev->int_params.fp_msix_cnt)
1248 info->num_queues = min_t(u8, info->num_queues,
1249 cdev->int_params.fp_msix_cnt);
1251 info->num_queues = cdev->num_hwfns;
1254 info->num_vlan_filters = RESC_NUM(&cdev->hwfns[0], QED_VLAN);
1255 ether_addr_copy(info->port_mac,
1256 cdev->hwfns[0].hw_info.hw_mac_addr);
1258 qed_fill_dev_info(cdev, &info->common);
1263 static void qed_register_eth_ops(struct qed_dev *cdev,
1264 struct qed_eth_cb_ops *ops,
1267 cdev->protocol_ops.eth = ops;
1268 cdev->ops_cookie = cookie;
1271 static int qed_start_vport(struct qed_dev *cdev,
1275 u8 inner_vlan_removal_en_flg)
1279 for_each_hwfn(cdev, i) {
1280 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1282 rc = qed_sp_vport_start(p_hwfn,
1283 p_hwfn->hw_info.concrete_fid,
1284 p_hwfn->hw_info.opaque_fid,
1288 inner_vlan_removal_en_flg);
1291 DP_ERR(cdev, "Failed to start VPORT\n");
1295 qed_hw_start_fastpath(p_hwfn);
1297 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1298 "Started V-PORT %d with MTU %d\n",
1302 qed_reset_vport_stats(cdev);
1307 static int qed_stop_vport(struct qed_dev *cdev,
1312 for_each_hwfn(cdev, i) {
1313 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1315 rc = qed_sp_vport_stop(p_hwfn,
1316 p_hwfn->hw_info.opaque_fid,
1320 DP_ERR(cdev, "Failed to stop VPORT\n");
1327 static int qed_update_vport(struct qed_dev *cdev,
1328 struct qed_update_vport_params *params)
1330 struct qed_sp_vport_update_params sp_params;
1331 struct qed_rss_params sp_rss_params;
1337 memset(&sp_params, 0, sizeof(sp_params));
1338 memset(&sp_rss_params, 0, sizeof(sp_rss_params));
1340 /* Translate protocol params into sp params */
1341 sp_params.vport_id = params->vport_id;
1342 sp_params.update_vport_active_rx_flg =
1343 params->update_vport_active_flg;
1344 sp_params.update_vport_active_tx_flg =
1345 params->update_vport_active_flg;
1346 sp_params.vport_active_rx_flg = params->vport_active_flg;
1347 sp_params.vport_active_tx_flg = params->vport_active_flg;
1348 sp_params.accept_any_vlan = params->accept_any_vlan;
1349 sp_params.update_accept_any_vlan_flg =
1350 params->update_accept_any_vlan_flg;
1352 /* RSS - is a bit tricky, since upper-layer isn't familiar with hwfns.
1353 * We need to re-fix the rss values per engine for CMT.
1355 if (cdev->num_hwfns > 1 && params->update_rss_flg) {
1356 struct qed_update_vport_rss_params *rss =
1357 ¶ms->rss_params;
1360 /* Find largest entry, since it's possible RSS needs to
1361 * be disabled [in case only 1 queue per-hwfn]
1363 for (k = 0; k < QED_RSS_IND_TABLE_SIZE; k++)
1364 max = (max > rss->rss_ind_table[k]) ?
1365 max : rss->rss_ind_table[k];
1367 /* Either fix RSS values or disable RSS */
1368 if (cdev->num_hwfns < max + 1) {
1369 int divisor = (max + cdev->num_hwfns - 1) /
1372 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1373 "CMT - fixing RSS values (modulo %02x)\n",
1376 for (k = 0; k < QED_RSS_IND_TABLE_SIZE; k++)
1377 rss->rss_ind_table[k] =
1378 rss->rss_ind_table[k] % divisor;
1380 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1381 "CMT - 1 queue per-hwfn; Disabling RSS\n");
1382 params->update_rss_flg = 0;
1386 /* Now, update the RSS configuration for actual configuration */
1387 if (params->update_rss_flg) {
1388 sp_rss_params.update_rss_config = 1;
1389 sp_rss_params.rss_enable = 1;
1390 sp_rss_params.update_rss_capabilities = 1;
1391 sp_rss_params.update_rss_ind_table = 1;
1392 sp_rss_params.update_rss_key = 1;
1393 sp_rss_params.rss_caps = QED_RSS_IPV4 |
1395 QED_RSS_IPV4_TCP | QED_RSS_IPV6_TCP;
1396 sp_rss_params.rss_table_size_log = 7; /* 2^7 = 128 */
1397 memcpy(sp_rss_params.rss_ind_table,
1398 params->rss_params.rss_ind_table,
1399 QED_RSS_IND_TABLE_SIZE * sizeof(u16));
1400 memcpy(sp_rss_params.rss_key, params->rss_params.rss_key,
1401 QED_RSS_KEY_SIZE * sizeof(u32));
1403 sp_params.rss_params = &sp_rss_params;
1405 for_each_hwfn(cdev, i) {
1406 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
1408 sp_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
1409 rc = qed_sp_vport_update(p_hwfn, &sp_params,
1410 QED_SPQ_MODE_EBLOCK,
1413 DP_ERR(cdev, "Failed to update VPORT\n");
1417 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1418 "Updated V-PORT %d: active_flag %d [update %d]\n",
1419 params->vport_id, params->vport_active_flg,
1420 params->update_vport_active_flg);
1426 static int qed_start_rxq(struct qed_dev *cdev,
1427 struct qed_queue_start_common_params *params,
1429 dma_addr_t bd_chain_phys_addr,
1430 dma_addr_t cqe_pbl_addr,
1432 void __iomem **pp_prod)
1435 struct qed_hwfn *p_hwfn;
1437 hwfn_index = params->rss_id % cdev->num_hwfns;
1438 p_hwfn = &cdev->hwfns[hwfn_index];
1440 /* Fix queue ID in 100g mode */
1441 params->queue_id /= cdev->num_hwfns;
1443 rc = qed_sp_eth_rx_queue_start(p_hwfn,
1444 p_hwfn->hw_info.opaque_fid,
1453 DP_ERR(cdev, "Failed to start RXQ#%d\n", params->queue_id);
1457 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1458 "Started RX-Q %d [rss %d] on V-PORT %d and SB %d\n",
1459 params->queue_id, params->rss_id, params->vport_id,
1465 static int qed_stop_rxq(struct qed_dev *cdev,
1466 struct qed_stop_rxq_params *params)
1469 struct qed_hwfn *p_hwfn;
1471 hwfn_index = params->rss_id % cdev->num_hwfns;
1472 p_hwfn = &cdev->hwfns[hwfn_index];
1474 rc = qed_sp_eth_rx_queue_stop(p_hwfn,
1475 params->rx_queue_id / cdev->num_hwfns,
1476 params->eq_completion_only,
1479 DP_ERR(cdev, "Failed to stop RXQ#%d\n", params->rx_queue_id);
1486 static int qed_start_txq(struct qed_dev *cdev,
1487 struct qed_queue_start_common_params *p_params,
1488 dma_addr_t pbl_addr,
1490 void __iomem **pp_doorbell)
1492 struct qed_hwfn *p_hwfn;
1495 hwfn_index = p_params->rss_id % cdev->num_hwfns;
1496 p_hwfn = &cdev->hwfns[hwfn_index];
1498 /* Fix queue ID in 100g mode */
1499 p_params->queue_id /= cdev->num_hwfns;
1501 rc = qed_sp_eth_tx_queue_start(p_hwfn,
1502 p_hwfn->hw_info.opaque_fid,
1509 DP_ERR(cdev, "Failed to start TXQ#%d\n", p_params->queue_id);
1513 DP_VERBOSE(cdev, (QED_MSG_SPQ | NETIF_MSG_IFUP),
1514 "Started TX-Q %d [rss %d] on V-PORT %d and SB %d\n",
1515 p_params->queue_id, p_params->rss_id, p_params->vport_id,
1521 #define QED_HW_STOP_RETRY_LIMIT (10)
1522 static int qed_fastpath_stop(struct qed_dev *cdev)
1524 qed_hw_stop_fastpath(cdev);
1529 static int qed_stop_txq(struct qed_dev *cdev,
1530 struct qed_stop_txq_params *params)
1532 struct qed_hwfn *p_hwfn;
1535 hwfn_index = params->rss_id % cdev->num_hwfns;
1536 p_hwfn = &cdev->hwfns[hwfn_index];
1538 rc = qed_sp_eth_tx_queue_stop(p_hwfn,
1539 params->tx_queue_id / cdev->num_hwfns);
1541 DP_ERR(cdev, "Failed to stop TXQ#%d\n", params->tx_queue_id);
1548 static int qed_configure_filter_rx_mode(struct qed_dev *cdev,
1549 enum qed_filter_rx_mode_type type)
1551 struct qed_filter_accept_flags accept_flags;
1553 memset(&accept_flags, 0, sizeof(accept_flags));
1555 accept_flags.update_rx_mode_config = 1;
1556 accept_flags.update_tx_mode_config = 1;
1557 accept_flags.rx_accept_filter = QED_ACCEPT_UCAST_MATCHED |
1558 QED_ACCEPT_MCAST_MATCHED |
1560 accept_flags.tx_accept_filter = QED_ACCEPT_UCAST_MATCHED |
1561 QED_ACCEPT_MCAST_MATCHED |
1564 if (type == QED_FILTER_RX_MODE_TYPE_PROMISC)
1565 accept_flags.rx_accept_filter |= QED_ACCEPT_UCAST_UNMATCHED |
1566 QED_ACCEPT_MCAST_UNMATCHED;
1567 else if (type == QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC)
1568 accept_flags.rx_accept_filter |= QED_ACCEPT_MCAST_UNMATCHED;
1570 return qed_filter_accept_cmd(cdev, 0, accept_flags, false, false,
1571 QED_SPQ_MODE_CB, NULL);
1574 static int qed_configure_filter_ucast(struct qed_dev *cdev,
1575 struct qed_filter_ucast_params *params)
1577 struct qed_filter_ucast ucast;
1579 if (!params->vlan_valid && !params->mac_valid) {
1582 "Tried configuring a unicast filter, but both MAC and VLAN are not set\n");
1586 memset(&ucast, 0, sizeof(ucast));
1587 switch (params->type) {
1588 case QED_FILTER_XCAST_TYPE_ADD:
1589 ucast.opcode = QED_FILTER_ADD;
1591 case QED_FILTER_XCAST_TYPE_DEL:
1592 ucast.opcode = QED_FILTER_REMOVE;
1594 case QED_FILTER_XCAST_TYPE_REPLACE:
1595 ucast.opcode = QED_FILTER_REPLACE;
1598 DP_NOTICE(cdev, "Unknown unicast filter type %d\n",
1602 if (params->vlan_valid && params->mac_valid) {
1603 ucast.type = QED_FILTER_MAC_VLAN;
1604 ether_addr_copy(ucast.mac, params->mac);
1605 ucast.vlan = params->vlan;
1606 } else if (params->mac_valid) {
1607 ucast.type = QED_FILTER_MAC;
1608 ether_addr_copy(ucast.mac, params->mac);
1610 ucast.type = QED_FILTER_VLAN;
1611 ucast.vlan = params->vlan;
1614 ucast.is_rx_filter = true;
1615 ucast.is_tx_filter = true;
1617 return qed_filter_ucast_cmd(cdev, &ucast, QED_SPQ_MODE_CB, NULL);
1620 static int qed_configure_filter_mcast(struct qed_dev *cdev,
1621 struct qed_filter_mcast_params *params)
1623 struct qed_filter_mcast mcast;
1626 memset(&mcast, 0, sizeof(mcast));
1627 switch (params->type) {
1628 case QED_FILTER_XCAST_TYPE_ADD:
1629 mcast.opcode = QED_FILTER_ADD;
1631 case QED_FILTER_XCAST_TYPE_DEL:
1632 mcast.opcode = QED_FILTER_REMOVE;
1635 DP_NOTICE(cdev, "Unknown multicast filter type %d\n",
1639 mcast.num_mc_addrs = params->num;
1640 for (i = 0; i < mcast.num_mc_addrs; i++)
1641 ether_addr_copy(mcast.mac[i], params->mac[i]);
1643 return qed_filter_mcast_cmd(cdev, &mcast,
1644 QED_SPQ_MODE_CB, NULL);
1647 static int qed_configure_filter(struct qed_dev *cdev,
1648 struct qed_filter_params *params)
1650 enum qed_filter_rx_mode_type accept_flags;
1652 switch (params->type) {
1653 case QED_FILTER_TYPE_UCAST:
1654 return qed_configure_filter_ucast(cdev, ¶ms->filter.ucast);
1655 case QED_FILTER_TYPE_MCAST:
1656 return qed_configure_filter_mcast(cdev, ¶ms->filter.mcast);
1657 case QED_FILTER_TYPE_RX_MODE:
1658 accept_flags = params->filter.accept_flags;
1659 return qed_configure_filter_rx_mode(cdev, accept_flags);
1661 DP_NOTICE(cdev, "Unknown filter type %d\n",
1667 static int qed_fp_cqe_completion(struct qed_dev *dev,
1669 struct eth_slow_path_rx_cqe *cqe)
1671 return qed_eth_cqe_completion(&dev->hwfns[rss_id % dev->num_hwfns],
1675 static const struct qed_eth_ops qed_eth_ops_pass = {
1676 .common = &qed_common_ops_pass,
1677 .fill_dev_info = &qed_fill_eth_dev_info,
1678 .register_ops = &qed_register_eth_ops,
1679 .vport_start = &qed_start_vport,
1680 .vport_stop = &qed_stop_vport,
1681 .vport_update = &qed_update_vport,
1682 .q_rx_start = &qed_start_rxq,
1683 .q_rx_stop = &qed_stop_rxq,
1684 .q_tx_start = &qed_start_txq,
1685 .q_tx_stop = &qed_stop_txq,
1686 .filter_config = &qed_configure_filter,
1687 .fastpath_stop = &qed_fastpath_stop,
1688 .eth_cqe_completion = &qed_fp_cqe_completion,
1689 .get_vport_stats = &qed_get_vport_stats,
1692 const struct qed_eth_ops *qed_get_eth_ops(u32 version)
1694 if (version != QED_ETH_INTERFACE_VERSION) {
1695 pr_notice("Cannot supply ethtool operations [%08x != %08x]\n",
1696 version, QED_ETH_INTERFACE_VERSION);
1700 return &qed_eth_ops_pass;
1702 EXPORT_SYMBOL(qed_get_eth_ops);
1704 void qed_put_eth_ops(void)
1706 /* TODO - reference count for module? */
1708 EXPORT_SYMBOL(qed_put_eth_ops);