qed: Add VF->PF channel infrastructure
[cascardo/linux.git] / drivers / net / ethernet / qlogic / qed / qed_main.c
1 /* QLogic qed NIC Driver
2  * Copyright (c) 2015 QLogic Corporation
3  *
4  * This software is available under the terms of the GNU General Public License
5  * (GPL) Version 2, available from the file COPYING in the main directory of
6  * this source tree.
7  */
8
9 #include <linux/stddef.h>
10 #include <linux/pci.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/version.h>
14 #include <linux/delay.h>
15 #include <asm/byteorder.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/string.h>
18 #include <linux/module.h>
19 #include <linux/interrupt.h>
20 #include <linux/workqueue.h>
21 #include <linux/ethtool.h>
22 #include <linux/etherdevice.h>
23 #include <linux/vmalloc.h>
24 #include <linux/qed/qed_if.h>
25
26 #include "qed.h"
27 #include "qed_sriov.h"
28 #include "qed_sp.h"
29 #include "qed_dev_api.h"
30 #include "qed_mcp.h"
31 #include "qed_hw.h"
32 #include "qed_selftest.h"
33
34 static char version[] =
35         "QLogic FastLinQ 4xxxx Core Module qed " DRV_MODULE_VERSION "\n";
36
37 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Core Module");
38 MODULE_LICENSE("GPL");
39 MODULE_VERSION(DRV_MODULE_VERSION);
40
41 #define FW_FILE_VERSION                         \
42         __stringify(FW_MAJOR_VERSION) "."       \
43         __stringify(FW_MINOR_VERSION) "."       \
44         __stringify(FW_REVISION_VERSION) "."    \
45         __stringify(FW_ENGINEERING_VERSION)
46
47 #define QED_FW_FILE_NAME        \
48         "qed/qed_init_values_zipped-" FW_FILE_VERSION ".bin"
49
50 MODULE_FIRMWARE(QED_FW_FILE_NAME);
51
52 static int __init qed_init(void)
53 {
54         pr_notice("qed_init called\n");
55
56         pr_info("%s", version);
57
58         return 0;
59 }
60
61 static void __exit qed_cleanup(void)
62 {
63         pr_notice("qed_cleanup called\n");
64 }
65
66 module_init(qed_init);
67 module_exit(qed_cleanup);
68
69 /* Check if the DMA controller on the machine can properly handle the DMA
70  * addressing required by the device.
71 */
72 static int qed_set_coherency_mask(struct qed_dev *cdev)
73 {
74         struct device *dev = &cdev->pdev->dev;
75
76         if (dma_set_mask(dev, DMA_BIT_MASK(64)) == 0) {
77                 if (dma_set_coherent_mask(dev, DMA_BIT_MASK(64)) != 0) {
78                         DP_NOTICE(cdev,
79                                   "Can't request 64-bit consistent allocations\n");
80                         return -EIO;
81                 }
82         } else if (dma_set_mask(dev, DMA_BIT_MASK(32)) != 0) {
83                 DP_NOTICE(cdev, "Can't request 64b/32b DMA addresses\n");
84                 return -EIO;
85         }
86
87         return 0;
88 }
89
90 static void qed_free_pci(struct qed_dev *cdev)
91 {
92         struct pci_dev *pdev = cdev->pdev;
93
94         if (cdev->doorbells)
95                 iounmap(cdev->doorbells);
96         if (cdev->regview)
97                 iounmap(cdev->regview);
98         if (atomic_read(&pdev->enable_cnt) == 1)
99                 pci_release_regions(pdev);
100
101         pci_disable_device(pdev);
102 }
103
104 #define PCI_REVISION_ID_ERROR_VAL       0xff
105
106 /* Performs PCI initializations as well as initializing PCI-related parameters
107  * in the device structrue. Returns 0 in case of success.
108  */
109 static int qed_init_pci(struct qed_dev *cdev,
110                         struct pci_dev *pdev)
111 {
112         u8 rev_id;
113         int rc;
114
115         cdev->pdev = pdev;
116
117         rc = pci_enable_device(pdev);
118         if (rc) {
119                 DP_NOTICE(cdev, "Cannot enable PCI device\n");
120                 goto err0;
121         }
122
123         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
124                 DP_NOTICE(cdev, "No memory region found in bar #0\n");
125                 rc = -EIO;
126                 goto err1;
127         }
128
129         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
130                 DP_NOTICE(cdev, "No memory region found in bar #2\n");
131                 rc = -EIO;
132                 goto err1;
133         }
134
135         if (atomic_read(&pdev->enable_cnt) == 1) {
136                 rc = pci_request_regions(pdev, "qed");
137                 if (rc) {
138                         DP_NOTICE(cdev,
139                                   "Failed to request PCI memory resources\n");
140                         goto err1;
141                 }
142                 pci_set_master(pdev);
143                 pci_save_state(pdev);
144         }
145
146         pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
147         if (rev_id == PCI_REVISION_ID_ERROR_VAL) {
148                 DP_NOTICE(cdev,
149                           "Detected PCI device error [rev_id 0x%x]. Probably due to prior indication. Aborting.\n",
150                           rev_id);
151                 rc = -ENODEV;
152                 goto err2;
153         }
154         if (!pci_is_pcie(pdev)) {
155                 DP_NOTICE(cdev, "The bus is not PCI Express\n");
156                 rc = -EIO;
157                 goto err2;
158         }
159
160         cdev->pci_params.pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
161         if (cdev->pci_params.pm_cap == 0)
162                 DP_NOTICE(cdev, "Cannot find power management capability\n");
163
164         rc = qed_set_coherency_mask(cdev);
165         if (rc)
166                 goto err2;
167
168         cdev->pci_params.mem_start = pci_resource_start(pdev, 0);
169         cdev->pci_params.mem_end = pci_resource_end(pdev, 0);
170         cdev->pci_params.irq = pdev->irq;
171
172         cdev->regview = pci_ioremap_bar(pdev, 0);
173         if (!cdev->regview) {
174                 DP_NOTICE(cdev, "Cannot map register space, aborting\n");
175                 rc = -ENOMEM;
176                 goto err2;
177         }
178
179         cdev->db_phys_addr = pci_resource_start(cdev->pdev, 2);
180         cdev->db_size = pci_resource_len(cdev->pdev, 2);
181         cdev->doorbells = ioremap_wc(cdev->db_phys_addr, cdev->db_size);
182         if (!cdev->doorbells) {
183                 DP_NOTICE(cdev, "Cannot map doorbell space\n");
184                 return -ENOMEM;
185         }
186
187         return 0;
188
189 err2:
190         pci_release_regions(pdev);
191 err1:
192         pci_disable_device(pdev);
193 err0:
194         return rc;
195 }
196
197 int qed_fill_dev_info(struct qed_dev *cdev,
198                       struct qed_dev_info *dev_info)
199 {
200         struct qed_ptt  *ptt;
201
202         memset(dev_info, 0, sizeof(struct qed_dev_info));
203
204         dev_info->num_hwfns = cdev->num_hwfns;
205         dev_info->pci_mem_start = cdev->pci_params.mem_start;
206         dev_info->pci_mem_end = cdev->pci_params.mem_end;
207         dev_info->pci_irq = cdev->pci_params.irq;
208         dev_info->is_mf_default = IS_MF_DEFAULT(&cdev->hwfns[0]);
209         ether_addr_copy(dev_info->hw_mac, cdev->hwfns[0].hw_info.hw_mac_addr);
210
211         dev_info->fw_major = FW_MAJOR_VERSION;
212         dev_info->fw_minor = FW_MINOR_VERSION;
213         dev_info->fw_rev = FW_REVISION_VERSION;
214         dev_info->fw_eng = FW_ENGINEERING_VERSION;
215         dev_info->mf_mode = cdev->mf_mode;
216
217         qed_mcp_get_mfw_ver(cdev, &dev_info->mfw_rev);
218
219         ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
220         if (ptt) {
221                 qed_mcp_get_flash_size(QED_LEADING_HWFN(cdev), ptt,
222                                        &dev_info->flash_size);
223
224                 qed_ptt_release(QED_LEADING_HWFN(cdev), ptt);
225         }
226
227         return 0;
228 }
229
230 static void qed_free_cdev(struct qed_dev *cdev)
231 {
232         kfree((void *)cdev);
233 }
234
235 static struct qed_dev *qed_alloc_cdev(struct pci_dev *pdev)
236 {
237         struct qed_dev *cdev;
238
239         cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
240         if (!cdev)
241                 return cdev;
242
243         qed_init_struct(cdev);
244
245         return cdev;
246 }
247
248 /* Sets the requested power state */
249 static int qed_set_power_state(struct qed_dev *cdev,
250                                pci_power_t state)
251 {
252         if (!cdev)
253                 return -ENODEV;
254
255         DP_VERBOSE(cdev, NETIF_MSG_DRV, "Omitting Power state change\n");
256         return 0;
257 }
258
259 /* probing */
260 static struct qed_dev *qed_probe(struct pci_dev *pdev,
261                                  enum qed_protocol protocol,
262                                  u32 dp_module,
263                                  u8 dp_level)
264 {
265         struct qed_dev *cdev;
266         int rc;
267
268         cdev = qed_alloc_cdev(pdev);
269         if (!cdev)
270                 goto err0;
271
272         cdev->protocol = protocol;
273
274         qed_init_dp(cdev, dp_module, dp_level);
275
276         rc = qed_init_pci(cdev, pdev);
277         if (rc) {
278                 DP_ERR(cdev, "init pci failed\n");
279                 goto err1;
280         }
281         DP_INFO(cdev, "PCI init completed successfully\n");
282
283         rc = qed_hw_prepare(cdev, QED_PCI_DEFAULT);
284         if (rc) {
285                 DP_ERR(cdev, "hw prepare failed\n");
286                 goto err2;
287         }
288
289         DP_INFO(cdev, "qed_probe completed successffuly\n");
290
291         return cdev;
292
293 err2:
294         qed_free_pci(cdev);
295 err1:
296         qed_free_cdev(cdev);
297 err0:
298         return NULL;
299 }
300
301 static void qed_remove(struct qed_dev *cdev)
302 {
303         if (!cdev)
304                 return;
305
306         qed_hw_remove(cdev);
307
308         qed_free_pci(cdev);
309
310         qed_set_power_state(cdev, PCI_D3hot);
311
312         qed_free_cdev(cdev);
313 }
314
315 static void qed_disable_msix(struct qed_dev *cdev)
316 {
317         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
318                 pci_disable_msix(cdev->pdev);
319                 kfree(cdev->int_params.msix_table);
320         } else if (cdev->int_params.out.int_mode == QED_INT_MODE_MSI) {
321                 pci_disable_msi(cdev->pdev);
322         }
323
324         memset(&cdev->int_params.out, 0, sizeof(struct qed_int_param));
325 }
326
327 static int qed_enable_msix(struct qed_dev *cdev,
328                            struct qed_int_params *int_params)
329 {
330         int i, rc, cnt;
331
332         cnt = int_params->in.num_vectors;
333
334         for (i = 0; i < cnt; i++)
335                 int_params->msix_table[i].entry = i;
336
337         rc = pci_enable_msix_range(cdev->pdev, int_params->msix_table,
338                                    int_params->in.min_msix_cnt, cnt);
339         if (rc < cnt && rc >= int_params->in.min_msix_cnt &&
340             (rc % cdev->num_hwfns)) {
341                 pci_disable_msix(cdev->pdev);
342
343                 /* If fastpath is initialized, we need at least one interrupt
344                  * per hwfn [and the slow path interrupts]. New requested number
345                  * should be a multiple of the number of hwfns.
346                  */
347                 cnt = (rc / cdev->num_hwfns) * cdev->num_hwfns;
348                 DP_NOTICE(cdev,
349                           "Trying to enable MSI-X with less vectors (%d out of %d)\n",
350                           cnt, int_params->in.num_vectors);
351                 rc = pci_enable_msix_exact(cdev->pdev,
352                                            int_params->msix_table, cnt);
353                 if (!rc)
354                         rc = cnt;
355         }
356
357         if (rc > 0) {
358                 /* MSI-x configuration was achieved */
359                 int_params->out.int_mode = QED_INT_MODE_MSIX;
360                 int_params->out.num_vectors = rc;
361                 rc = 0;
362         } else {
363                 DP_NOTICE(cdev,
364                           "Failed to enable MSI-X [Requested %d vectors][rc %d]\n",
365                           cnt, rc);
366         }
367
368         return rc;
369 }
370
371 /* This function outputs the int mode and the number of enabled msix vector */
372 static int qed_set_int_mode(struct qed_dev *cdev, bool force_mode)
373 {
374         struct qed_int_params *int_params = &cdev->int_params;
375         struct msix_entry *tbl;
376         int rc = 0, cnt;
377
378         switch (int_params->in.int_mode) {
379         case QED_INT_MODE_MSIX:
380                 /* Allocate MSIX table */
381                 cnt = int_params->in.num_vectors;
382                 int_params->msix_table = kcalloc(cnt, sizeof(*tbl), GFP_KERNEL);
383                 if (!int_params->msix_table) {
384                         rc = -ENOMEM;
385                         goto out;
386                 }
387
388                 /* Enable MSIX */
389                 rc = qed_enable_msix(cdev, int_params);
390                 if (!rc)
391                         goto out;
392
393                 DP_NOTICE(cdev, "Failed to enable MSI-X\n");
394                 kfree(int_params->msix_table);
395                 if (force_mode)
396                         goto out;
397                 /* Fallthrough */
398
399         case QED_INT_MODE_MSI:
400                 rc = pci_enable_msi(cdev->pdev);
401                 if (!rc) {
402                         int_params->out.int_mode = QED_INT_MODE_MSI;
403                         goto out;
404                 }
405
406                 DP_NOTICE(cdev, "Failed to enable MSI\n");
407                 if (force_mode)
408                         goto out;
409                 /* Fallthrough */
410
411         case QED_INT_MODE_INTA:
412                         int_params->out.int_mode = QED_INT_MODE_INTA;
413                         rc = 0;
414                         goto out;
415         default:
416                 DP_NOTICE(cdev, "Unknown int_mode value %d\n",
417                           int_params->in.int_mode);
418                 rc = -EINVAL;
419         }
420
421 out:
422         cdev->int_coalescing_mode = QED_COAL_MODE_ENABLE;
423
424         return rc;
425 }
426
427 static void qed_simd_handler_config(struct qed_dev *cdev, void *token,
428                                     int index, void(*handler)(void *))
429 {
430         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
431         int relative_idx = index / cdev->num_hwfns;
432
433         hwfn->simd_proto_handler[relative_idx].func = handler;
434         hwfn->simd_proto_handler[relative_idx].token = token;
435 }
436
437 static void qed_simd_handler_clean(struct qed_dev *cdev, int index)
438 {
439         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
440         int relative_idx = index / cdev->num_hwfns;
441
442         memset(&hwfn->simd_proto_handler[relative_idx], 0,
443                sizeof(struct qed_simd_fp_handler));
444 }
445
446 static irqreturn_t qed_msix_sp_int(int irq, void *tasklet)
447 {
448         tasklet_schedule((struct tasklet_struct *)tasklet);
449         return IRQ_HANDLED;
450 }
451
452 static irqreturn_t qed_single_int(int irq, void *dev_instance)
453 {
454         struct qed_dev *cdev = (struct qed_dev *)dev_instance;
455         struct qed_hwfn *hwfn;
456         irqreturn_t rc = IRQ_NONE;
457         u64 status;
458         int i, j;
459
460         for (i = 0; i < cdev->num_hwfns; i++) {
461                 status = qed_int_igu_read_sisr_reg(&cdev->hwfns[i]);
462
463                 if (!status)
464                         continue;
465
466                 hwfn = &cdev->hwfns[i];
467
468                 /* Slowpath interrupt */
469                 if (unlikely(status & 0x1)) {
470                         tasklet_schedule(hwfn->sp_dpc);
471                         status &= ~0x1;
472                         rc = IRQ_HANDLED;
473                 }
474
475                 /* Fastpath interrupts */
476                 for (j = 0; j < 64; j++) {
477                         if ((0x2ULL << j) & status) {
478                                 hwfn->simd_proto_handler[j].func(
479                                         hwfn->simd_proto_handler[j].token);
480                                 status &= ~(0x2ULL << j);
481                                 rc = IRQ_HANDLED;
482                         }
483                 }
484
485                 if (unlikely(status))
486                         DP_VERBOSE(hwfn, NETIF_MSG_INTR,
487                                    "got an unknown interrupt status 0x%llx\n",
488                                    status);
489         }
490
491         return rc;
492 }
493
494 int qed_slowpath_irq_req(struct qed_hwfn *hwfn)
495 {
496         struct qed_dev *cdev = hwfn->cdev;
497         int rc = 0;
498         u8 id;
499
500         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
501                 id = hwfn->my_id;
502                 snprintf(hwfn->name, NAME_SIZE, "sp-%d-%02x:%02x.%02x",
503                          id, cdev->pdev->bus->number,
504                          PCI_SLOT(cdev->pdev->devfn), hwfn->abs_pf_id);
505                 rc = request_irq(cdev->int_params.msix_table[id].vector,
506                                  qed_msix_sp_int, 0, hwfn->name, hwfn->sp_dpc);
507                 if (!rc)
508                         DP_VERBOSE(hwfn, (NETIF_MSG_INTR | QED_MSG_SP),
509                                    "Requested slowpath MSI-X\n");
510         } else {
511                 unsigned long flags = 0;
512
513                 snprintf(cdev->name, NAME_SIZE, "%02x:%02x.%02x",
514                          cdev->pdev->bus->number, PCI_SLOT(cdev->pdev->devfn),
515                          PCI_FUNC(cdev->pdev->devfn));
516
517                 if (cdev->int_params.out.int_mode == QED_INT_MODE_INTA)
518                         flags |= IRQF_SHARED;
519
520                 rc = request_irq(cdev->pdev->irq, qed_single_int,
521                                  flags, cdev->name, cdev);
522         }
523
524         return rc;
525 }
526
527 static void qed_slowpath_irq_free(struct qed_dev *cdev)
528 {
529         int i;
530
531         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
532                 for_each_hwfn(cdev, i) {
533                         if (!cdev->hwfns[i].b_int_requested)
534                                 break;
535                         synchronize_irq(cdev->int_params.msix_table[i].vector);
536                         free_irq(cdev->int_params.msix_table[i].vector,
537                                  cdev->hwfns[i].sp_dpc);
538                 }
539         } else {
540                 if (QED_LEADING_HWFN(cdev)->b_int_requested)
541                         free_irq(cdev->pdev->irq, cdev);
542         }
543         qed_int_disable_post_isr_release(cdev);
544 }
545
546 static int qed_nic_stop(struct qed_dev *cdev)
547 {
548         int i, rc;
549
550         rc = qed_hw_stop(cdev);
551
552         for (i = 0; i < cdev->num_hwfns; i++) {
553                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
554
555                 if (p_hwfn->b_sp_dpc_enabled) {
556                         tasklet_disable(p_hwfn->sp_dpc);
557                         p_hwfn->b_sp_dpc_enabled = false;
558                         DP_VERBOSE(cdev, NETIF_MSG_IFDOWN,
559                                    "Disabled sp taskelt [hwfn %d] at %p\n",
560                                    i, p_hwfn->sp_dpc);
561                 }
562         }
563
564         return rc;
565 }
566
567 static int qed_nic_reset(struct qed_dev *cdev)
568 {
569         int rc;
570
571         rc = qed_hw_reset(cdev);
572         if (rc)
573                 return rc;
574
575         qed_resc_free(cdev);
576
577         return 0;
578 }
579
580 static int qed_nic_setup(struct qed_dev *cdev)
581 {
582         int rc;
583
584         rc = qed_resc_alloc(cdev);
585         if (rc)
586                 return rc;
587
588         DP_INFO(cdev, "Allocated qed resources\n");
589
590         qed_resc_setup(cdev);
591
592         return rc;
593 }
594
595 static int qed_set_int_fp(struct qed_dev *cdev, u16 cnt)
596 {
597         int limit = 0;
598
599         /* Mark the fastpath as free/used */
600         cdev->int_params.fp_initialized = cnt ? true : false;
601
602         if (cdev->int_params.out.int_mode != QED_INT_MODE_MSIX)
603                 limit = cdev->num_hwfns * 63;
604         else if (cdev->int_params.fp_msix_cnt)
605                 limit = cdev->int_params.fp_msix_cnt;
606
607         if (!limit)
608                 return -ENOMEM;
609
610         return min_t(int, cnt, limit);
611 }
612
613 static int qed_get_int_fp(struct qed_dev *cdev, struct qed_int_info *info)
614 {
615         memset(info, 0, sizeof(struct qed_int_info));
616
617         if (!cdev->int_params.fp_initialized) {
618                 DP_INFO(cdev,
619                         "Protocol driver requested interrupt information, but its support is not yet configured\n");
620                 return -EINVAL;
621         }
622
623         /* Need to expose only MSI-X information; Single IRQ is handled solely
624          * by qed.
625          */
626         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
627                 int msix_base = cdev->int_params.fp_msix_base;
628
629                 info->msix_cnt = cdev->int_params.fp_msix_cnt;
630                 info->msix = &cdev->int_params.msix_table[msix_base];
631         }
632
633         return 0;
634 }
635
636 static int qed_slowpath_setup_int(struct qed_dev *cdev,
637                                   enum qed_int_mode int_mode)
638 {
639         struct qed_sb_cnt_info sb_cnt_info;
640         int rc;
641         int i;
642         memset(&cdev->int_params, 0, sizeof(struct qed_int_params));
643
644         cdev->int_params.in.int_mode = int_mode;
645         for_each_hwfn(cdev, i) {
646                 memset(&sb_cnt_info, 0, sizeof(sb_cnt_info));
647                 qed_int_get_num_sbs(&cdev->hwfns[i], &sb_cnt_info);
648                 cdev->int_params.in.num_vectors += sb_cnt_info.sb_cnt;
649                 cdev->int_params.in.num_vectors++; /* slowpath */
650         }
651
652         /* We want a minimum of one slowpath and one fastpath vector per hwfn */
653         cdev->int_params.in.min_msix_cnt = cdev->num_hwfns * 2;
654
655         rc = qed_set_int_mode(cdev, false);
656         if (rc)  {
657                 DP_ERR(cdev, "qed_slowpath_setup_int ERR\n");
658                 return rc;
659         }
660
661         cdev->int_params.fp_msix_base = cdev->num_hwfns;
662         cdev->int_params.fp_msix_cnt = cdev->int_params.out.num_vectors -
663                                        cdev->num_hwfns;
664
665         return 0;
666 }
667
668 u32 qed_unzip_data(struct qed_hwfn *p_hwfn, u32 input_len,
669                    u8 *input_buf, u32 max_size, u8 *unzip_buf)
670 {
671         int rc;
672
673         p_hwfn->stream->next_in = input_buf;
674         p_hwfn->stream->avail_in = input_len;
675         p_hwfn->stream->next_out = unzip_buf;
676         p_hwfn->stream->avail_out = max_size;
677
678         rc = zlib_inflateInit2(p_hwfn->stream, MAX_WBITS);
679
680         if (rc != Z_OK) {
681                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "zlib init failed, rc = %d\n",
682                            rc);
683                 return 0;
684         }
685
686         rc = zlib_inflate(p_hwfn->stream, Z_FINISH);
687         zlib_inflateEnd(p_hwfn->stream);
688
689         if (rc != Z_OK && rc != Z_STREAM_END) {
690                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "FW unzip error: %s, rc=%d\n",
691                            p_hwfn->stream->msg, rc);
692                 return 0;
693         }
694
695         return p_hwfn->stream->total_out / 4;
696 }
697
698 static int qed_alloc_stream_mem(struct qed_dev *cdev)
699 {
700         int i;
701         void *workspace;
702
703         for_each_hwfn(cdev, i) {
704                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
705
706                 p_hwfn->stream = kzalloc(sizeof(*p_hwfn->stream), GFP_KERNEL);
707                 if (!p_hwfn->stream)
708                         return -ENOMEM;
709
710                 workspace = vzalloc(zlib_inflate_workspacesize());
711                 if (!workspace)
712                         return -ENOMEM;
713                 p_hwfn->stream->workspace = workspace;
714         }
715
716         return 0;
717 }
718
719 static void qed_free_stream_mem(struct qed_dev *cdev)
720 {
721         int i;
722
723         for_each_hwfn(cdev, i) {
724                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
725
726                 if (!p_hwfn->stream)
727                         return;
728
729                 vfree(p_hwfn->stream->workspace);
730                 kfree(p_hwfn->stream);
731         }
732 }
733
734 static void qed_update_pf_params(struct qed_dev *cdev,
735                                  struct qed_pf_params *params)
736 {
737         int i;
738
739         for (i = 0; i < cdev->num_hwfns; i++) {
740                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
741
742                 p_hwfn->pf_params = *params;
743         }
744 }
745
746 static int qed_slowpath_start(struct qed_dev *cdev,
747                               struct qed_slowpath_params *params)
748 {
749         struct qed_tunn_start_params tunn_info;
750         struct qed_mcp_drv_version drv_version;
751         const u8 *data = NULL;
752         struct qed_hwfn *hwfn;
753         int rc = -EINVAL;
754
755         if (qed_iov_wq_start(cdev))
756                 goto err;
757
758         rc = request_firmware(&cdev->firmware, QED_FW_FILE_NAME,
759                               &cdev->pdev->dev);
760         if (rc) {
761                 DP_NOTICE(cdev,
762                           "Failed to find fw file - /lib/firmware/%s\n",
763                           QED_FW_FILE_NAME);
764                 goto err;
765         }
766
767         rc = qed_nic_setup(cdev);
768         if (rc)
769                 goto err;
770
771         rc = qed_slowpath_setup_int(cdev, params->int_mode);
772         if (rc)
773                 goto err1;
774
775         /* Allocate stream for unzipping */
776         rc = qed_alloc_stream_mem(cdev);
777         if (rc) {
778                 DP_NOTICE(cdev, "Failed to allocate stream memory\n");
779                 goto err2;
780         }
781
782         /* Start the slowpath */
783         data = cdev->firmware->data;
784
785         memset(&tunn_info, 0, sizeof(tunn_info));
786         tunn_info.tunn_mode |=  1 << QED_MODE_VXLAN_TUNN |
787                                 1 << QED_MODE_L2GRE_TUNN |
788                                 1 << QED_MODE_IPGRE_TUNN |
789                                 1 << QED_MODE_L2GENEVE_TUNN |
790                                 1 << QED_MODE_IPGENEVE_TUNN;
791
792         tunn_info.tunn_clss_vxlan = QED_TUNN_CLSS_MAC_VLAN;
793         tunn_info.tunn_clss_l2gre = QED_TUNN_CLSS_MAC_VLAN;
794         tunn_info.tunn_clss_ipgre = QED_TUNN_CLSS_MAC_VLAN;
795
796         rc = qed_hw_init(cdev, &tunn_info, true,
797                          cdev->int_params.out.int_mode,
798                          true, data);
799         if (rc)
800                 goto err2;
801
802         DP_INFO(cdev,
803                 "HW initialization and function start completed successfully\n");
804
805         hwfn = QED_LEADING_HWFN(cdev);
806         drv_version.version = (params->drv_major << 24) |
807                               (params->drv_minor << 16) |
808                               (params->drv_rev << 8) |
809                               (params->drv_eng);
810         strlcpy(drv_version.name, params->name,
811                 MCP_DRV_VER_STR_SIZE - 4);
812         rc = qed_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
813                                       &drv_version);
814         if (rc) {
815                 DP_NOTICE(cdev, "Failed sending drv version command\n");
816                 return rc;
817         }
818
819         qed_reset_vport_stats(cdev);
820
821         return 0;
822
823 err2:
824         qed_hw_timers_stop_all(cdev);
825         qed_slowpath_irq_free(cdev);
826         qed_free_stream_mem(cdev);
827         qed_disable_msix(cdev);
828 err1:
829         qed_resc_free(cdev);
830 err:
831         release_firmware(cdev->firmware);
832
833         qed_iov_wq_stop(cdev, false);
834
835         return rc;
836 }
837
838 static int qed_slowpath_stop(struct qed_dev *cdev)
839 {
840         if (!cdev)
841                 return -ENODEV;
842
843         qed_free_stream_mem(cdev);
844
845         qed_nic_stop(cdev);
846         qed_slowpath_irq_free(cdev);
847
848         qed_disable_msix(cdev);
849         qed_nic_reset(cdev);
850
851         qed_iov_wq_stop(cdev, true);
852
853         release_firmware(cdev->firmware);
854
855         return 0;
856 }
857
858 static void qed_set_id(struct qed_dev *cdev, char name[NAME_SIZE],
859                        char ver_str[VER_SIZE])
860 {
861         int i;
862
863         memcpy(cdev->name, name, NAME_SIZE);
864         for_each_hwfn(cdev, i)
865                 snprintf(cdev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
866
867         memcpy(cdev->ver_str, ver_str, VER_SIZE);
868         cdev->drv_type = DRV_ID_DRV_TYPE_LINUX;
869 }
870
871 static u32 qed_sb_init(struct qed_dev *cdev,
872                        struct qed_sb_info *sb_info,
873                        void *sb_virt_addr,
874                        dma_addr_t sb_phy_addr, u16 sb_id,
875                        enum qed_sb_type type)
876 {
877         struct qed_hwfn *p_hwfn;
878         int hwfn_index;
879         u16 rel_sb_id;
880         u8 n_hwfns;
881         u32 rc;
882
883         /* RoCE uses single engine and CMT uses two engines. When using both
884          * we force only a single engine. Storage uses only engine 0 too.
885          */
886         if (type == QED_SB_TYPE_L2_QUEUE)
887                 n_hwfns = cdev->num_hwfns;
888         else
889                 n_hwfns = 1;
890
891         hwfn_index = sb_id % n_hwfns;
892         p_hwfn = &cdev->hwfns[hwfn_index];
893         rel_sb_id = sb_id / n_hwfns;
894
895         DP_VERBOSE(cdev, NETIF_MSG_INTR,
896                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
897                    hwfn_index, rel_sb_id, sb_id);
898
899         rc = qed_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
900                              sb_virt_addr, sb_phy_addr, rel_sb_id);
901
902         return rc;
903 }
904
905 static u32 qed_sb_release(struct qed_dev *cdev,
906                           struct qed_sb_info *sb_info,
907                           u16 sb_id)
908 {
909         struct qed_hwfn *p_hwfn;
910         int hwfn_index;
911         u16 rel_sb_id;
912         u32 rc;
913
914         hwfn_index = sb_id % cdev->num_hwfns;
915         p_hwfn = &cdev->hwfns[hwfn_index];
916         rel_sb_id = sb_id / cdev->num_hwfns;
917
918         DP_VERBOSE(cdev, NETIF_MSG_INTR,
919                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
920                    hwfn_index, rel_sb_id, sb_id);
921
922         rc = qed_int_sb_release(p_hwfn, sb_info, rel_sb_id);
923
924         return rc;
925 }
926
927 static bool qed_can_link_change(struct qed_dev *cdev)
928 {
929         return true;
930 }
931
932 static int qed_set_link(struct qed_dev *cdev,
933                         struct qed_link_params *params)
934 {
935         struct qed_hwfn *hwfn;
936         struct qed_mcp_link_params *link_params;
937         struct qed_ptt *ptt;
938         int rc;
939
940         if (!cdev)
941                 return -ENODEV;
942
943         /* The link should be set only once per PF */
944         hwfn = &cdev->hwfns[0];
945
946         ptt = qed_ptt_acquire(hwfn);
947         if (!ptt)
948                 return -EBUSY;
949
950         link_params = qed_mcp_get_link_params(hwfn);
951         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
952                 link_params->speed.autoneg = params->autoneg;
953         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS) {
954                 link_params->speed.advertised_speeds = 0;
955                 if ((params->adv_speeds & SUPPORTED_1000baseT_Half) ||
956                     (params->adv_speeds & SUPPORTED_1000baseT_Full))
957                         link_params->speed.advertised_speeds |=
958                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G;
959                 if (params->adv_speeds & SUPPORTED_10000baseKR_Full)
960                         link_params->speed.advertised_speeds |=
961                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G;
962                 if (params->adv_speeds & SUPPORTED_40000baseLR4_Full)
963                         link_params->speed.advertised_speeds |=
964                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G;
965                 if (params->adv_speeds & 0)
966                         link_params->speed.advertised_speeds |=
967                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G;
968                 if (params->adv_speeds & 0)
969                         link_params->speed.advertised_speeds |=
970                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G;
971         }
972         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_FORCED_SPEED)
973                 link_params->speed.forced_speed = params->forced_speed;
974         if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
975                 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
976                         link_params->pause.autoneg = true;
977                 else
978                         link_params->pause.autoneg = false;
979                 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
980                         link_params->pause.forced_rx = true;
981                 else
982                         link_params->pause.forced_rx = false;
983                 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
984                         link_params->pause.forced_tx = true;
985                 else
986                         link_params->pause.forced_tx = false;
987         }
988         if (params->override_flags & QED_LINK_OVERRIDE_LOOPBACK_MODE) {
989                 switch (params->loopback_mode) {
990                 case QED_LINK_LOOPBACK_INT_PHY:
991                         link_params->loopback_mode = PMM_LOOPBACK_INT_PHY;
992                         break;
993                 case QED_LINK_LOOPBACK_EXT_PHY:
994                         link_params->loopback_mode = PMM_LOOPBACK_EXT_PHY;
995                         break;
996                 case QED_LINK_LOOPBACK_EXT:
997                         link_params->loopback_mode = PMM_LOOPBACK_EXT;
998                         break;
999                 case QED_LINK_LOOPBACK_MAC:
1000                         link_params->loopback_mode = PMM_LOOPBACK_MAC;
1001                         break;
1002                 default:
1003                         link_params->loopback_mode = PMM_LOOPBACK_NONE;
1004                         break;
1005                 }
1006         }
1007
1008         rc = qed_mcp_set_link(hwfn, ptt, params->link_up);
1009
1010         qed_ptt_release(hwfn, ptt);
1011
1012         return rc;
1013 }
1014
1015 static int qed_get_port_type(u32 media_type)
1016 {
1017         int port_type;
1018
1019         switch (media_type) {
1020         case MEDIA_SFPP_10G_FIBER:
1021         case MEDIA_SFP_1G_FIBER:
1022         case MEDIA_XFP_FIBER:
1023         case MEDIA_KR:
1024                 port_type = PORT_FIBRE;
1025                 break;
1026         case MEDIA_DA_TWINAX:
1027                 port_type = PORT_DA;
1028                 break;
1029         case MEDIA_BASE_T:
1030                 port_type = PORT_TP;
1031                 break;
1032         case MEDIA_NOT_PRESENT:
1033                 port_type = PORT_NONE;
1034                 break;
1035         case MEDIA_UNSPECIFIED:
1036         default:
1037                 port_type = PORT_OTHER;
1038                 break;
1039         }
1040         return port_type;
1041 }
1042
1043 static void qed_fill_link(struct qed_hwfn *hwfn,
1044                           struct qed_link_output *if_link)
1045 {
1046         struct qed_mcp_link_params params;
1047         struct qed_mcp_link_state link;
1048         struct qed_mcp_link_capabilities link_caps;
1049         u32 media_type;
1050
1051         memset(if_link, 0, sizeof(*if_link));
1052
1053         /* Prepare source inputs */
1054         memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
1055         memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
1056         memcpy(&link_caps, qed_mcp_get_link_capabilities(hwfn),
1057                sizeof(link_caps));
1058
1059         /* Set the link parameters to pass to protocol driver */
1060         if (link.link_up)
1061                 if_link->link_up = true;
1062
1063         /* TODO - at the moment assume supported and advertised speed equal */
1064         if_link->supported_caps = SUPPORTED_FIBRE;
1065         if (params.speed.autoneg)
1066                 if_link->supported_caps |= SUPPORTED_Autoneg;
1067         if (params.pause.autoneg ||
1068             (params.pause.forced_rx && params.pause.forced_tx))
1069                 if_link->supported_caps |= SUPPORTED_Asym_Pause;
1070         if (params.pause.autoneg || params.pause.forced_rx ||
1071             params.pause.forced_tx)
1072                 if_link->supported_caps |= SUPPORTED_Pause;
1073
1074         if_link->advertised_caps = if_link->supported_caps;
1075         if (params.speed.advertised_speeds &
1076             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1077                 if_link->advertised_caps |= SUPPORTED_1000baseT_Half |
1078                                            SUPPORTED_1000baseT_Full;
1079         if (params.speed.advertised_speeds &
1080             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1081                 if_link->advertised_caps |= SUPPORTED_10000baseKR_Full;
1082         if (params.speed.advertised_speeds &
1083                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1084                 if_link->advertised_caps |= SUPPORTED_40000baseLR4_Full;
1085         if (params.speed.advertised_speeds &
1086                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1087                 if_link->advertised_caps |= 0;
1088         if (params.speed.advertised_speeds &
1089                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G)
1090                 if_link->advertised_caps |= 0;
1091
1092         if (link_caps.speed_capabilities &
1093             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1094                 if_link->supported_caps |= SUPPORTED_1000baseT_Half |
1095                                            SUPPORTED_1000baseT_Full;
1096         if (link_caps.speed_capabilities &
1097             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1098                 if_link->supported_caps |= SUPPORTED_10000baseKR_Full;
1099         if (link_caps.speed_capabilities &
1100                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1101                 if_link->supported_caps |= SUPPORTED_40000baseLR4_Full;
1102         if (link_caps.speed_capabilities &
1103                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1104                 if_link->supported_caps |= 0;
1105         if (link_caps.speed_capabilities &
1106                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G)
1107                 if_link->supported_caps |= 0;
1108
1109         if (link.link_up)
1110                 if_link->speed = link.speed;
1111
1112         /* TODO - fill duplex properly */
1113         if_link->duplex = DUPLEX_FULL;
1114         qed_mcp_get_media_type(hwfn->cdev, &media_type);
1115         if_link->port = qed_get_port_type(media_type);
1116
1117         if_link->autoneg = params.speed.autoneg;
1118
1119         if (params.pause.autoneg)
1120                 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
1121         if (params.pause.forced_rx)
1122                 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
1123         if (params.pause.forced_tx)
1124                 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
1125
1126         /* Link partner capabilities */
1127         if (link.partner_adv_speed &
1128             QED_LINK_PARTNER_SPEED_1G_HD)
1129                 if_link->lp_caps |= SUPPORTED_1000baseT_Half;
1130         if (link.partner_adv_speed &
1131             QED_LINK_PARTNER_SPEED_1G_FD)
1132                 if_link->lp_caps |= SUPPORTED_1000baseT_Full;
1133         if (link.partner_adv_speed &
1134             QED_LINK_PARTNER_SPEED_10G)
1135                 if_link->lp_caps |= SUPPORTED_10000baseKR_Full;
1136         if (link.partner_adv_speed &
1137             QED_LINK_PARTNER_SPEED_40G)
1138                 if_link->lp_caps |= SUPPORTED_40000baseLR4_Full;
1139         if (link.partner_adv_speed &
1140             QED_LINK_PARTNER_SPEED_50G)
1141                 if_link->lp_caps |= 0;
1142         if (link.partner_adv_speed &
1143             QED_LINK_PARTNER_SPEED_100G)
1144                 if_link->lp_caps |= 0;
1145
1146         if (link.an_complete)
1147                 if_link->lp_caps |= SUPPORTED_Autoneg;
1148
1149         if (link.partner_adv_pause)
1150                 if_link->lp_caps |= SUPPORTED_Pause;
1151         if (link.partner_adv_pause == QED_LINK_PARTNER_ASYMMETRIC_PAUSE ||
1152             link.partner_adv_pause == QED_LINK_PARTNER_BOTH_PAUSE)
1153                 if_link->lp_caps |= SUPPORTED_Asym_Pause;
1154 }
1155
1156 static void qed_get_current_link(struct qed_dev *cdev,
1157                                  struct qed_link_output *if_link)
1158 {
1159         qed_fill_link(&cdev->hwfns[0], if_link);
1160 }
1161
1162 void qed_link_update(struct qed_hwfn *hwfn)
1163 {
1164         void *cookie = hwfn->cdev->ops_cookie;
1165         struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common;
1166         struct qed_link_output if_link;
1167
1168         qed_fill_link(hwfn, &if_link);
1169
1170         if (IS_LEAD_HWFN(hwfn) && cookie)
1171                 op->link_update(cookie, &if_link);
1172 }
1173
1174 static int qed_drain(struct qed_dev *cdev)
1175 {
1176         struct qed_hwfn *hwfn;
1177         struct qed_ptt *ptt;
1178         int i, rc;
1179
1180         for_each_hwfn(cdev, i) {
1181                 hwfn = &cdev->hwfns[i];
1182                 ptt = qed_ptt_acquire(hwfn);
1183                 if (!ptt) {
1184                         DP_NOTICE(hwfn, "Failed to drain NIG; No PTT\n");
1185                         return -EBUSY;
1186                 }
1187                 rc = qed_mcp_drain(hwfn, ptt);
1188                 if (rc)
1189                         return rc;
1190                 qed_ptt_release(hwfn, ptt);
1191         }
1192
1193         return 0;
1194 }
1195
1196 static int qed_set_led(struct qed_dev *cdev, enum qed_led_mode mode)
1197 {
1198         struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1199         struct qed_ptt *ptt;
1200         int status = 0;
1201
1202         ptt = qed_ptt_acquire(hwfn);
1203         if (!ptt)
1204                 return -EAGAIN;
1205
1206         status = qed_mcp_set_led(hwfn, ptt, mode);
1207
1208         qed_ptt_release(hwfn, ptt);
1209
1210         return status;
1211 }
1212
1213 struct qed_selftest_ops qed_selftest_ops_pass = {
1214         .selftest_memory = &qed_selftest_memory,
1215         .selftest_interrupt = &qed_selftest_interrupt,
1216         .selftest_register = &qed_selftest_register,
1217         .selftest_clock = &qed_selftest_clock,
1218 };
1219
1220 const struct qed_common_ops qed_common_ops_pass = {
1221         .selftest = &qed_selftest_ops_pass,
1222         .probe = &qed_probe,
1223         .remove = &qed_remove,
1224         .set_power_state = &qed_set_power_state,
1225         .set_id = &qed_set_id,
1226         .update_pf_params = &qed_update_pf_params,
1227         .slowpath_start = &qed_slowpath_start,
1228         .slowpath_stop = &qed_slowpath_stop,
1229         .set_fp_int = &qed_set_int_fp,
1230         .get_fp_int = &qed_get_int_fp,
1231         .sb_init = &qed_sb_init,
1232         .sb_release = &qed_sb_release,
1233         .simd_handler_config = &qed_simd_handler_config,
1234         .simd_handler_clean = &qed_simd_handler_clean,
1235         .can_link_change = &qed_can_link_change,
1236         .set_link = &qed_set_link,
1237         .get_link = &qed_get_current_link,
1238         .drain = &qed_drain,
1239         .update_msglvl = &qed_init_dp,
1240         .chain_alloc = &qed_chain_alloc,
1241         .chain_free = &qed_chain_free,
1242         .set_led = &qed_set_led,
1243 };